xref: /llvm-project/llvm/test/CodeGen/RISCV/rvv/vfma-vp.ll (revision 8ce81f17a16b8b689895c7c093d0401a75c09882) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=riscv32 -mattr=+d,+zvfh,+zfbfmin,+zvfbfmin,+v \
3; RUN:     -target-abi=ilp32d -verify-machineinstrs < %s | FileCheck %s \
4; RUN:     --check-prefixes=CHECK,ZVFH
5; RUN: llc -mtriple=riscv64 -mattr=+d,+zvfh,+zfbfmin,+zvfbfmin,+v \
6; RUN:     -target-abi=lp64d -verify-machineinstrs < %s | FileCheck %s \
7; RUN:     --check-prefixes=CHECK,ZVFH
8; RUN: llc -mtriple=riscv32 -mattr=+d,+zfhmin,+zvfhmin,+zfbfmin,+zvfbfmin,+v \
9; RUN:     -target-abi=ilp32d -verify-machineinstrs < %s | FileCheck %s \
10; RUN:     --check-prefixes=CHECK,ZVFHMIN
11; RUN: llc -mtriple=riscv64 -mattr=+d,+zfhmin,+zvfhmin,+zfbfmin,+zvfbfmin,+v \
12; RUN:     -target-abi=lp64d -verify-machineinstrs < %s | FileCheck %s \
13; RUN:     --check-prefixes=CHECK,ZVFHMIN
14
15declare <vscale x 1 x bfloat> @llvm.vp.fma.nxv1bf16(<vscale x 1 x bfloat>, <vscale x 1 x bfloat>, <vscale x 1 x bfloat>, <vscale x 1 x i1>, i32)
16
17define <vscale x 1 x bfloat> @vfma_vv_nxv1bf16(<vscale x 1 x bfloat> %va, <vscale x 1 x bfloat> %b, <vscale x 1 x bfloat> %c, <vscale x 1 x i1> %m, i32 zeroext %evl) {
18; CHECK-LABEL: vfma_vv_nxv1bf16:
19; CHECK:       # %bb.0:
20; CHECK-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
21; CHECK-NEXT:    vfwcvtbf16.f.f.v v11, v10, v0.t
22; CHECK-NEXT:    vfwcvtbf16.f.f.v v10, v8, v0.t
23; CHECK-NEXT:    vfwcvtbf16.f.f.v v12, v9, v0.t
24; CHECK-NEXT:    vsetvli zero, zero, e32, mf2, ta, ma
25; CHECK-NEXT:    vfmadd.vv v12, v10, v11, v0.t
26; CHECK-NEXT:    vsetvli zero, zero, e16, mf4, ta, ma
27; CHECK-NEXT:    vfncvtbf16.f.f.w v8, v12, v0.t
28; CHECK-NEXT:    ret
29  %v = call <vscale x 1 x bfloat> @llvm.vp.fma.nxv1bf16(<vscale x 1 x bfloat> %va, <vscale x 1 x bfloat> %b, <vscale x 1 x bfloat> %c, <vscale x 1 x i1> %m, i32 %evl)
30  ret <vscale x 1 x bfloat> %v
31}
32
33define <vscale x 1 x bfloat> @vfma_vv_nxv1bf16_unmasked(<vscale x 1 x bfloat> %va, <vscale x 1 x bfloat> %b, <vscale x 1 x bfloat> %c, i32 zeroext %evl) {
34; CHECK-LABEL: vfma_vv_nxv1bf16_unmasked:
35; CHECK:       # %bb.0:
36; CHECK-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
37; CHECK-NEXT:    vfwcvtbf16.f.f.v v11, v10
38; CHECK-NEXT:    vfwcvtbf16.f.f.v v10, v8
39; CHECK-NEXT:    vfwcvtbf16.f.f.v v12, v9
40; CHECK-NEXT:    vsetvli zero, zero, e32, mf2, ta, ma
41; CHECK-NEXT:    vfmadd.vv v12, v10, v11
42; CHECK-NEXT:    vsetvli zero, zero, e16, mf4, ta, ma
43; CHECK-NEXT:    vfncvtbf16.f.f.w v8, v12
44; CHECK-NEXT:    ret
45  %v = call <vscale x 1 x bfloat> @llvm.vp.fma.nxv1bf16(<vscale x 1 x bfloat> %va, <vscale x 1 x bfloat> %b, <vscale x 1 x bfloat> %c, <vscale x 1 x i1> splat (i1 true), i32 %evl)
46  ret <vscale x 1 x bfloat> %v
47}
48
49define <vscale x 1 x bfloat> @vfma_vf_nxv1bf16(<vscale x 1 x bfloat> %va, bfloat %b, <vscale x 1 x bfloat> %vc, <vscale x 1 x i1> %m, i32 zeroext %evl) {
50; CHECK-LABEL: vfma_vf_nxv1bf16:
51; CHECK:       # %bb.0:
52; CHECK-NEXT:    fmv.x.h a1, fa0
53; CHECK-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
54; CHECK-NEXT:    vfwcvtbf16.f.f.v v10, v9, v0.t
55; CHECK-NEXT:    vmv.v.x v9, a1
56; CHECK-NEXT:    vfwcvtbf16.f.f.v v11, v8, v0.t
57; CHECK-NEXT:    vfwcvtbf16.f.f.v v12, v9, v0.t
58; CHECK-NEXT:    vsetvli zero, zero, e32, mf2, ta, ma
59; CHECK-NEXT:    vfmadd.vv v12, v11, v10, v0.t
60; CHECK-NEXT:    vsetvli zero, zero, e16, mf4, ta, ma
61; CHECK-NEXT:    vfncvtbf16.f.f.w v8, v12, v0.t
62; CHECK-NEXT:    ret
63  %elt.head = insertelement <vscale x 1 x bfloat> poison, bfloat %b, i32 0
64  %vb = shufflevector <vscale x 1 x bfloat> %elt.head, <vscale x 1 x bfloat> poison, <vscale x 1 x i32> zeroinitializer
65  %v = call <vscale x 1 x bfloat> @llvm.vp.fma.nxv1bf16(<vscale x 1 x bfloat> %va, <vscale x 1 x bfloat> %vb, <vscale x 1 x bfloat> %vc, <vscale x 1 x i1> %m, i32 %evl)
66  ret <vscale x 1 x bfloat> %v
67}
68
69define <vscale x 1 x bfloat> @vfma_vf_nxv1bf16_commute(<vscale x 1 x bfloat> %va, bfloat %b, <vscale x 1 x bfloat> %vc, <vscale x 1 x i1> %m, i32 zeroext %evl) {
70; CHECK-LABEL: vfma_vf_nxv1bf16_commute:
71; CHECK:       # %bb.0:
72; CHECK-NEXT:    fmv.x.h a1, fa0
73; CHECK-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
74; CHECK-NEXT:    vfwcvtbf16.f.f.v v10, v9, v0.t
75; CHECK-NEXT:    vmv.v.x v9, a1
76; CHECK-NEXT:    vfwcvtbf16.f.f.v v11, v8, v0.t
77; CHECK-NEXT:    vfwcvtbf16.f.f.v v8, v9, v0.t
78; CHECK-NEXT:    vsetvli zero, zero, e32, mf2, ta, ma
79; CHECK-NEXT:    vfmadd.vv v11, v8, v10, v0.t
80; CHECK-NEXT:    vsetvli zero, zero, e16, mf4, ta, ma
81; CHECK-NEXT:    vfncvtbf16.f.f.w v8, v11, v0.t
82; CHECK-NEXT:    ret
83  %elt.head = insertelement <vscale x 1 x bfloat> poison, bfloat %b, i32 0
84  %vb = shufflevector <vscale x 1 x bfloat> %elt.head, <vscale x 1 x bfloat> poison, <vscale x 1 x i32> zeroinitializer
85  %v = call <vscale x 1 x bfloat> @llvm.vp.fma.nxv1bf16(<vscale x 1 x bfloat> %vb, <vscale x 1 x bfloat> %va, <vscale x 1 x bfloat> %vc, <vscale x 1 x i1> %m, i32 %evl)
86  ret <vscale x 1 x bfloat> %v
87}
88
89define <vscale x 1 x bfloat> @vfma_vf_nxv1bf16_unmasked(<vscale x 1 x bfloat> %va, bfloat %b, <vscale x 1 x bfloat> %vc, i32 zeroext %evl) {
90; CHECK-LABEL: vfma_vf_nxv1bf16_unmasked:
91; CHECK:       # %bb.0:
92; CHECK-NEXT:    fmv.x.h a1, fa0
93; CHECK-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
94; CHECK-NEXT:    vfwcvtbf16.f.f.v v10, v9
95; CHECK-NEXT:    vmv.v.x v9, a1
96; CHECK-NEXT:    vfwcvtbf16.f.f.v v11, v8
97; CHECK-NEXT:    vfwcvtbf16.f.f.v v12, v9
98; CHECK-NEXT:    vsetvli zero, zero, e32, mf2, ta, ma
99; CHECK-NEXT:    vfmadd.vv v12, v11, v10
100; CHECK-NEXT:    vsetvli zero, zero, e16, mf4, ta, ma
101; CHECK-NEXT:    vfncvtbf16.f.f.w v8, v12
102; CHECK-NEXT:    ret
103  %elt.head = insertelement <vscale x 1 x bfloat> poison, bfloat %b, i32 0
104  %vb = shufflevector <vscale x 1 x bfloat> %elt.head, <vscale x 1 x bfloat> poison, <vscale x 1 x i32> zeroinitializer
105  %v = call <vscale x 1 x bfloat> @llvm.vp.fma.nxv1bf16(<vscale x 1 x bfloat> %va, <vscale x 1 x bfloat> %vb, <vscale x 1 x bfloat> %vc, <vscale x 1 x i1> splat (i1 true), i32 %evl)
106  ret <vscale x 1 x bfloat> %v
107}
108
109define <vscale x 1 x bfloat> @vfma_vf_nxv1bf16_unmasked_commute(<vscale x 1 x bfloat> %va, bfloat %b, <vscale x 1 x bfloat> %vc, i32 zeroext %evl) {
110; CHECK-LABEL: vfma_vf_nxv1bf16_unmasked_commute:
111; CHECK:       # %bb.0:
112; CHECK-NEXT:    fmv.x.h a1, fa0
113; CHECK-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
114; CHECK-NEXT:    vfwcvtbf16.f.f.v v10, v9
115; CHECK-NEXT:    vmv.v.x v9, a1
116; CHECK-NEXT:    vfwcvtbf16.f.f.v v11, v8
117; CHECK-NEXT:    vfwcvtbf16.f.f.v v12, v9
118; CHECK-NEXT:    vsetvli zero, zero, e32, mf2, ta, ma
119; CHECK-NEXT:    vfmadd.vv v12, v11, v10
120; CHECK-NEXT:    vsetvli zero, zero, e16, mf4, ta, ma
121; CHECK-NEXT:    vfncvtbf16.f.f.w v8, v12
122; CHECK-NEXT:    ret
123  %elt.head = insertelement <vscale x 1 x bfloat> poison, bfloat %b, i32 0
124  %vb = shufflevector <vscale x 1 x bfloat> %elt.head, <vscale x 1 x bfloat> poison, <vscale x 1 x i32> zeroinitializer
125  %v = call <vscale x 1 x bfloat> @llvm.vp.fma.nxv1bf16(<vscale x 1 x bfloat> %vb, <vscale x 1 x bfloat> %va, <vscale x 1 x bfloat> %vc, <vscale x 1 x i1> splat (i1 true), i32 %evl)
126  ret <vscale x 1 x bfloat> %v
127}
128
129declare <vscale x 2 x bfloat> @llvm.vp.fma.nxv2bf16(<vscale x 2 x bfloat>, <vscale x 2 x bfloat>, <vscale x 2 x bfloat>, <vscale x 2 x i1>, i32)
130
131define <vscale x 2 x bfloat> @vfma_vv_nxv2bf16(<vscale x 2 x bfloat> %va, <vscale x 2 x bfloat> %b, <vscale x 2 x bfloat> %c, <vscale x 2 x i1> %m, i32 zeroext %evl) {
132; CHECK-LABEL: vfma_vv_nxv2bf16:
133; CHECK:       # %bb.0:
134; CHECK-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
135; CHECK-NEXT:    vfwcvtbf16.f.f.v v11, v10, v0.t
136; CHECK-NEXT:    vfwcvtbf16.f.f.v v10, v8, v0.t
137; CHECK-NEXT:    vfwcvtbf16.f.f.v v12, v9, v0.t
138; CHECK-NEXT:    vsetvli zero, zero, e32, m1, ta, ma
139; CHECK-NEXT:    vfmadd.vv v12, v10, v11, v0.t
140; CHECK-NEXT:    vsetvli zero, zero, e16, mf2, ta, ma
141; CHECK-NEXT:    vfncvtbf16.f.f.w v8, v12, v0.t
142; CHECK-NEXT:    ret
143  %v = call <vscale x 2 x bfloat> @llvm.vp.fma.nxv2bf16(<vscale x 2 x bfloat> %va, <vscale x 2 x bfloat> %b, <vscale x 2 x bfloat> %c, <vscale x 2 x i1> %m, i32 %evl)
144  ret <vscale x 2 x bfloat> %v
145}
146
147define <vscale x 2 x bfloat> @vfma_vv_nxv2bf16_unmasked(<vscale x 2 x bfloat> %va, <vscale x 2 x bfloat> %b, <vscale x 2 x bfloat> %c, i32 zeroext %evl) {
148; CHECK-LABEL: vfma_vv_nxv2bf16_unmasked:
149; CHECK:       # %bb.0:
150; CHECK-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
151; CHECK-NEXT:    vfwcvtbf16.f.f.v v11, v10
152; CHECK-NEXT:    vfwcvtbf16.f.f.v v10, v8
153; CHECK-NEXT:    vfwcvtbf16.f.f.v v12, v9
154; CHECK-NEXT:    vsetvli zero, zero, e32, m1, ta, ma
155; CHECK-NEXT:    vfmadd.vv v12, v10, v11
156; CHECK-NEXT:    vsetvli zero, zero, e16, mf2, ta, ma
157; CHECK-NEXT:    vfncvtbf16.f.f.w v8, v12
158; CHECK-NEXT:    ret
159  %v = call <vscale x 2 x bfloat> @llvm.vp.fma.nxv2bf16(<vscale x 2 x bfloat> %va, <vscale x 2 x bfloat> %b, <vscale x 2 x bfloat> %c, <vscale x 2 x i1> splat (i1 true), i32 %evl)
160  ret <vscale x 2 x bfloat> %v
161}
162
163define <vscale x 2 x bfloat> @vfma_vf_nxv2bf16(<vscale x 2 x bfloat> %va, bfloat %b, <vscale x 2 x bfloat> %vc, <vscale x 2 x i1> %m, i32 zeroext %evl) {
164; CHECK-LABEL: vfma_vf_nxv2bf16:
165; CHECK:       # %bb.0:
166; CHECK-NEXT:    fmv.x.h a1, fa0
167; CHECK-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
168; CHECK-NEXT:    vfwcvtbf16.f.f.v v10, v9, v0.t
169; CHECK-NEXT:    vmv.v.x v9, a1
170; CHECK-NEXT:    vfwcvtbf16.f.f.v v11, v8, v0.t
171; CHECK-NEXT:    vfwcvtbf16.f.f.v v12, v9, v0.t
172; CHECK-NEXT:    vsetvli zero, zero, e32, m1, ta, ma
173; CHECK-NEXT:    vfmadd.vv v12, v11, v10, v0.t
174; CHECK-NEXT:    vsetvli zero, zero, e16, mf2, ta, ma
175; CHECK-NEXT:    vfncvtbf16.f.f.w v8, v12, v0.t
176; CHECK-NEXT:    ret
177  %elt.head = insertelement <vscale x 2 x bfloat> poison, bfloat %b, i32 0
178  %vb = shufflevector <vscale x 2 x bfloat> %elt.head, <vscale x 2 x bfloat> poison, <vscale x 2 x i32> zeroinitializer
179  %v = call <vscale x 2 x bfloat> @llvm.vp.fma.nxv2bf16(<vscale x 2 x bfloat> %va, <vscale x 2 x bfloat> %vb, <vscale x 2 x bfloat> %vc, <vscale x 2 x i1> %m, i32 %evl)
180  ret <vscale x 2 x bfloat> %v
181}
182
183define <vscale x 2 x bfloat> @vfma_vf_nxv2bf16_commute(<vscale x 2 x bfloat> %va, bfloat %b, <vscale x 2 x bfloat> %vc, <vscale x 2 x i1> %m, i32 zeroext %evl) {
184; CHECK-LABEL: vfma_vf_nxv2bf16_commute:
185; CHECK:       # %bb.0:
186; CHECK-NEXT:    fmv.x.h a1, fa0
187; CHECK-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
188; CHECK-NEXT:    vfwcvtbf16.f.f.v v10, v9, v0.t
189; CHECK-NEXT:    vmv.v.x v9, a1
190; CHECK-NEXT:    vfwcvtbf16.f.f.v v11, v8, v0.t
191; CHECK-NEXT:    vfwcvtbf16.f.f.v v8, v9, v0.t
192; CHECK-NEXT:    vsetvli zero, zero, e32, m1, ta, ma
193; CHECK-NEXT:    vfmadd.vv v11, v8, v10, v0.t
194; CHECK-NEXT:    vsetvli zero, zero, e16, mf2, ta, ma
195; CHECK-NEXT:    vfncvtbf16.f.f.w v8, v11, v0.t
196; CHECK-NEXT:    ret
197  %elt.head = insertelement <vscale x 2 x bfloat> poison, bfloat %b, i32 0
198  %vb = shufflevector <vscale x 2 x bfloat> %elt.head, <vscale x 2 x bfloat> poison, <vscale x 2 x i32> zeroinitializer
199  %v = call <vscale x 2 x bfloat> @llvm.vp.fma.nxv2bf16(<vscale x 2 x bfloat> %vb, <vscale x 2 x bfloat> %va, <vscale x 2 x bfloat> %vc, <vscale x 2 x i1> %m, i32 %evl)
200  ret <vscale x 2 x bfloat> %v
201}
202
203define <vscale x 2 x bfloat> @vfma_vf_nxv2bf16_unmasked(<vscale x 2 x bfloat> %va, bfloat %b, <vscale x 2 x bfloat> %vc, i32 zeroext %evl) {
204; CHECK-LABEL: vfma_vf_nxv2bf16_unmasked:
205; CHECK:       # %bb.0:
206; CHECK-NEXT:    fmv.x.h a1, fa0
207; CHECK-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
208; CHECK-NEXT:    vfwcvtbf16.f.f.v v10, v9
209; CHECK-NEXT:    vmv.v.x v9, a1
210; CHECK-NEXT:    vfwcvtbf16.f.f.v v11, v8
211; CHECK-NEXT:    vfwcvtbf16.f.f.v v12, v9
212; CHECK-NEXT:    vsetvli zero, zero, e32, m1, ta, ma
213; CHECK-NEXT:    vfmadd.vv v12, v11, v10
214; CHECK-NEXT:    vsetvli zero, zero, e16, mf2, ta, ma
215; CHECK-NEXT:    vfncvtbf16.f.f.w v8, v12
216; CHECK-NEXT:    ret
217  %elt.head = insertelement <vscale x 2 x bfloat> poison, bfloat %b, i32 0
218  %vb = shufflevector <vscale x 2 x bfloat> %elt.head, <vscale x 2 x bfloat> poison, <vscale x 2 x i32> zeroinitializer
219  %v = call <vscale x 2 x bfloat> @llvm.vp.fma.nxv2bf16(<vscale x 2 x bfloat> %va, <vscale x 2 x bfloat> %vb, <vscale x 2 x bfloat> %vc, <vscale x 2 x i1> splat (i1 true), i32 %evl)
220  ret <vscale x 2 x bfloat> %v
221}
222
223define <vscale x 2 x bfloat> @vfma_vf_nxv2bf16_unmasked_commute(<vscale x 2 x bfloat> %va, bfloat %b, <vscale x 2 x bfloat> %vc, i32 zeroext %evl) {
224; CHECK-LABEL: vfma_vf_nxv2bf16_unmasked_commute:
225; CHECK:       # %bb.0:
226; CHECK-NEXT:    fmv.x.h a1, fa0
227; CHECK-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
228; CHECK-NEXT:    vfwcvtbf16.f.f.v v10, v9
229; CHECK-NEXT:    vmv.v.x v9, a1
230; CHECK-NEXT:    vfwcvtbf16.f.f.v v11, v8
231; CHECK-NEXT:    vfwcvtbf16.f.f.v v12, v9
232; CHECK-NEXT:    vsetvli zero, zero, e32, m1, ta, ma
233; CHECK-NEXT:    vfmadd.vv v12, v11, v10
234; CHECK-NEXT:    vsetvli zero, zero, e16, mf2, ta, ma
235; CHECK-NEXT:    vfncvtbf16.f.f.w v8, v12
236; CHECK-NEXT:    ret
237  %elt.head = insertelement <vscale x 2 x bfloat> poison, bfloat %b, i32 0
238  %vb = shufflevector <vscale x 2 x bfloat> %elt.head, <vscale x 2 x bfloat> poison, <vscale x 2 x i32> zeroinitializer
239  %v = call <vscale x 2 x bfloat> @llvm.vp.fma.nxv2bf16(<vscale x 2 x bfloat> %vb, <vscale x 2 x bfloat> %va, <vscale x 2 x bfloat> %vc, <vscale x 2 x i1> splat (i1 true), i32 %evl)
240  ret <vscale x 2 x bfloat> %v
241}
242
243declare <vscale x 4 x bfloat> @llvm.vp.fma.nxv4bf16(<vscale x 4 x bfloat>, <vscale x 4 x bfloat>, <vscale x 4 x bfloat>, <vscale x 4 x i1>, i32)
244
245define <vscale x 4 x bfloat> @vfma_vv_nxv4bf16(<vscale x 4 x bfloat> %va, <vscale x 4 x bfloat> %b, <vscale x 4 x bfloat> %c, <vscale x 4 x i1> %m, i32 zeroext %evl) {
246; CHECK-LABEL: vfma_vv_nxv4bf16:
247; CHECK:       # %bb.0:
248; CHECK-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
249; CHECK-NEXT:    vfwcvtbf16.f.f.v v12, v10, v0.t
250; CHECK-NEXT:    vfwcvtbf16.f.f.v v10, v8, v0.t
251; CHECK-NEXT:    vfwcvtbf16.f.f.v v14, v9, v0.t
252; CHECK-NEXT:    vsetvli zero, zero, e32, m2, ta, ma
253; CHECK-NEXT:    vfmadd.vv v14, v10, v12, v0.t
254; CHECK-NEXT:    vsetvli zero, zero, e16, m1, ta, ma
255; CHECK-NEXT:    vfncvtbf16.f.f.w v8, v14, v0.t
256; CHECK-NEXT:    ret
257  %v = call <vscale x 4 x bfloat> @llvm.vp.fma.nxv4bf16(<vscale x 4 x bfloat> %va, <vscale x 4 x bfloat> %b, <vscale x 4 x bfloat> %c, <vscale x 4 x i1> %m, i32 %evl)
258  ret <vscale x 4 x bfloat> %v
259}
260
261define <vscale x 4 x bfloat> @vfma_vv_nxv4bf16_unmasked(<vscale x 4 x bfloat> %va, <vscale x 4 x bfloat> %b, <vscale x 4 x bfloat> %c, i32 zeroext %evl) {
262; CHECK-LABEL: vfma_vv_nxv4bf16_unmasked:
263; CHECK:       # %bb.0:
264; CHECK-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
265; CHECK-NEXT:    vfwcvtbf16.f.f.v v12, v10
266; CHECK-NEXT:    vfwcvtbf16.f.f.v v10, v8
267; CHECK-NEXT:    vfwcvtbf16.f.f.v v14, v9
268; CHECK-NEXT:    vsetvli zero, zero, e32, m2, ta, ma
269; CHECK-NEXT:    vfmadd.vv v14, v10, v12
270; CHECK-NEXT:    vsetvli zero, zero, e16, m1, ta, ma
271; CHECK-NEXT:    vfncvtbf16.f.f.w v8, v14
272; CHECK-NEXT:    ret
273  %v = call <vscale x 4 x bfloat> @llvm.vp.fma.nxv4bf16(<vscale x 4 x bfloat> %va, <vscale x 4 x bfloat> %b, <vscale x 4 x bfloat> %c, <vscale x 4 x i1> splat (i1 true), i32 %evl)
274  ret <vscale x 4 x bfloat> %v
275}
276
277define <vscale x 4 x bfloat> @vfma_vf_nxv4bf16(<vscale x 4 x bfloat> %va, bfloat %b, <vscale x 4 x bfloat> %vc, <vscale x 4 x i1> %m, i32 zeroext %evl) {
278; CHECK-LABEL: vfma_vf_nxv4bf16:
279; CHECK:       # %bb.0:
280; CHECK-NEXT:    fmv.x.h a1, fa0
281; CHECK-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
282; CHECK-NEXT:    vfwcvtbf16.f.f.v v10, v9, v0.t
283; CHECK-NEXT:    vmv.v.x v9, a1
284; CHECK-NEXT:    vfwcvtbf16.f.f.v v12, v8, v0.t
285; CHECK-NEXT:    vfwcvtbf16.f.f.v v14, v9, v0.t
286; CHECK-NEXT:    vsetvli zero, zero, e32, m2, ta, ma
287; CHECK-NEXT:    vfmadd.vv v14, v12, v10, v0.t
288; CHECK-NEXT:    vsetvli zero, zero, e16, m1, ta, ma
289; CHECK-NEXT:    vfncvtbf16.f.f.w v8, v14, v0.t
290; CHECK-NEXT:    ret
291  %elt.head = insertelement <vscale x 4 x bfloat> poison, bfloat %b, i32 0
292  %vb = shufflevector <vscale x 4 x bfloat> %elt.head, <vscale x 4 x bfloat> poison, <vscale x 4 x i32> zeroinitializer
293  %v = call <vscale x 4 x bfloat> @llvm.vp.fma.nxv4bf16(<vscale x 4 x bfloat> %va, <vscale x 4 x bfloat> %vb, <vscale x 4 x bfloat> %vc, <vscale x 4 x i1> %m, i32 %evl)
294  ret <vscale x 4 x bfloat> %v
295}
296
297define <vscale x 4 x bfloat> @vfma_vf_nxv4bf16_commute(<vscale x 4 x bfloat> %va, bfloat %b, <vscale x 4 x bfloat> %vc, <vscale x 4 x i1> %m, i32 zeroext %evl) {
298; CHECK-LABEL: vfma_vf_nxv4bf16_commute:
299; CHECK:       # %bb.0:
300; CHECK-NEXT:    fmv.x.h a1, fa0
301; CHECK-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
302; CHECK-NEXT:    vfwcvtbf16.f.f.v v10, v9, v0.t
303; CHECK-NEXT:    vmv.v.x v9, a1
304; CHECK-NEXT:    vfwcvtbf16.f.f.v v12, v8, v0.t
305; CHECK-NEXT:    vfwcvtbf16.f.f.v v14, v9, v0.t
306; CHECK-NEXT:    vsetvli zero, zero, e32, m2, ta, ma
307; CHECK-NEXT:    vfmadd.vv v12, v14, v10, v0.t
308; CHECK-NEXT:    vsetvli zero, zero, e16, m1, ta, ma
309; CHECK-NEXT:    vfncvtbf16.f.f.w v8, v12, v0.t
310; CHECK-NEXT:    ret
311  %elt.head = insertelement <vscale x 4 x bfloat> poison, bfloat %b, i32 0
312  %vb = shufflevector <vscale x 4 x bfloat> %elt.head, <vscale x 4 x bfloat> poison, <vscale x 4 x i32> zeroinitializer
313  %v = call <vscale x 4 x bfloat> @llvm.vp.fma.nxv4bf16(<vscale x 4 x bfloat> %vb, <vscale x 4 x bfloat> %va, <vscale x 4 x bfloat> %vc, <vscale x 4 x i1> %m, i32 %evl)
314  ret <vscale x 4 x bfloat> %v
315}
316
317define <vscale x 4 x bfloat> @vfma_vf_nxv4bf16_unmasked(<vscale x 4 x bfloat> %va, bfloat %b, <vscale x 4 x bfloat> %vc, i32 zeroext %evl) {
318; CHECK-LABEL: vfma_vf_nxv4bf16_unmasked:
319; CHECK:       # %bb.0:
320; CHECK-NEXT:    fmv.x.h a1, fa0
321; CHECK-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
322; CHECK-NEXT:    vfwcvtbf16.f.f.v v10, v9
323; CHECK-NEXT:    vmv.v.x v9, a1
324; CHECK-NEXT:    vfwcvtbf16.f.f.v v12, v8
325; CHECK-NEXT:    vfwcvtbf16.f.f.v v14, v9
326; CHECK-NEXT:    vsetvli zero, zero, e32, m2, ta, ma
327; CHECK-NEXT:    vfmadd.vv v14, v12, v10
328; CHECK-NEXT:    vsetvli zero, zero, e16, m1, ta, ma
329; CHECK-NEXT:    vfncvtbf16.f.f.w v8, v14
330; CHECK-NEXT:    ret
331  %elt.head = insertelement <vscale x 4 x bfloat> poison, bfloat %b, i32 0
332  %vb = shufflevector <vscale x 4 x bfloat> %elt.head, <vscale x 4 x bfloat> poison, <vscale x 4 x i32> zeroinitializer
333  %v = call <vscale x 4 x bfloat> @llvm.vp.fma.nxv4bf16(<vscale x 4 x bfloat> %va, <vscale x 4 x bfloat> %vb, <vscale x 4 x bfloat> %vc, <vscale x 4 x i1> splat (i1 true), i32 %evl)
334  ret <vscale x 4 x bfloat> %v
335}
336
337define <vscale x 4 x bfloat> @vfma_vf_nxv4bf16_unmasked_commute(<vscale x 4 x bfloat> %va, bfloat %b, <vscale x 4 x bfloat> %vc, i32 zeroext %evl) {
338; CHECK-LABEL: vfma_vf_nxv4bf16_unmasked_commute:
339; CHECK:       # %bb.0:
340; CHECK-NEXT:    fmv.x.h a1, fa0
341; CHECK-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
342; CHECK-NEXT:    vfwcvtbf16.f.f.v v10, v9
343; CHECK-NEXT:    vmv.v.x v9, a1
344; CHECK-NEXT:    vfwcvtbf16.f.f.v v12, v8
345; CHECK-NEXT:    vfwcvtbf16.f.f.v v14, v9
346; CHECK-NEXT:    vsetvli zero, zero, e32, m2, ta, ma
347; CHECK-NEXT:    vfmadd.vv v14, v12, v10
348; CHECK-NEXT:    vsetvli zero, zero, e16, m1, ta, ma
349; CHECK-NEXT:    vfncvtbf16.f.f.w v8, v14
350; CHECK-NEXT:    ret
351  %elt.head = insertelement <vscale x 4 x bfloat> poison, bfloat %b, i32 0
352  %vb = shufflevector <vscale x 4 x bfloat> %elt.head, <vscale x 4 x bfloat> poison, <vscale x 4 x i32> zeroinitializer
353  %v = call <vscale x 4 x bfloat> @llvm.vp.fma.nxv4bf16(<vscale x 4 x bfloat> %vb, <vscale x 4 x bfloat> %va, <vscale x 4 x bfloat> %vc, <vscale x 4 x i1> splat (i1 true), i32 %evl)
354  ret <vscale x 4 x bfloat> %v
355}
356
357declare <vscale x 8 x bfloat> @llvm.vp.fma.nxv8bf16(<vscale x 8 x bfloat>, <vscale x 8 x bfloat>, <vscale x 8 x bfloat>, <vscale x 8 x i1>, i32)
358
359define <vscale x 8 x bfloat> @vfma_vv_nxv8bf16(<vscale x 8 x bfloat> %va, <vscale x 8 x bfloat> %b, <vscale x 8 x bfloat> %c, <vscale x 8 x i1> %m, i32 zeroext %evl) {
360; CHECK-LABEL: vfma_vv_nxv8bf16:
361; CHECK:       # %bb.0:
362; CHECK-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
363; CHECK-NEXT:    vfwcvtbf16.f.f.v v16, v12, v0.t
364; CHECK-NEXT:    vfwcvtbf16.f.f.v v12, v8, v0.t
365; CHECK-NEXT:    vfwcvtbf16.f.f.v v20, v10, v0.t
366; CHECK-NEXT:    vsetvli zero, zero, e32, m4, ta, ma
367; CHECK-NEXT:    vfmadd.vv v20, v12, v16, v0.t
368; CHECK-NEXT:    vsetvli zero, zero, e16, m2, ta, ma
369; CHECK-NEXT:    vfncvtbf16.f.f.w v8, v20, v0.t
370; CHECK-NEXT:    ret
371  %v = call <vscale x 8 x bfloat> @llvm.vp.fma.nxv8bf16(<vscale x 8 x bfloat> %va, <vscale x 8 x bfloat> %b, <vscale x 8 x bfloat> %c, <vscale x 8 x i1> %m, i32 %evl)
372  ret <vscale x 8 x bfloat> %v
373}
374
375define <vscale x 8 x bfloat> @vfma_vv_nxv8bf16_unmasked(<vscale x 8 x bfloat> %va, <vscale x 8 x bfloat> %b, <vscale x 8 x bfloat> %c, i32 zeroext %evl) {
376; CHECK-LABEL: vfma_vv_nxv8bf16_unmasked:
377; CHECK:       # %bb.0:
378; CHECK-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
379; CHECK-NEXT:    vfwcvtbf16.f.f.v v16, v12
380; CHECK-NEXT:    vfwcvtbf16.f.f.v v12, v8
381; CHECK-NEXT:    vfwcvtbf16.f.f.v v20, v10
382; CHECK-NEXT:    vsetvli zero, zero, e32, m4, ta, ma
383; CHECK-NEXT:    vfmadd.vv v20, v12, v16
384; CHECK-NEXT:    vsetvli zero, zero, e16, m2, ta, ma
385; CHECK-NEXT:    vfncvtbf16.f.f.w v8, v20
386; CHECK-NEXT:    ret
387  %v = call <vscale x 8 x bfloat> @llvm.vp.fma.nxv8bf16(<vscale x 8 x bfloat> %va, <vscale x 8 x bfloat> %b, <vscale x 8 x bfloat> %c, <vscale x 8 x i1> splat (i1 true), i32 %evl)
388  ret <vscale x 8 x bfloat> %v
389}
390
391define <vscale x 8 x bfloat> @vfma_vf_nxv8bf16(<vscale x 8 x bfloat> %va, bfloat %b, <vscale x 8 x bfloat> %vc, <vscale x 8 x i1> %m, i32 zeroext %evl) {
392; CHECK-LABEL: vfma_vf_nxv8bf16:
393; CHECK:       # %bb.0:
394; CHECK-NEXT:    fmv.x.h a1, fa0
395; CHECK-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
396; CHECK-NEXT:    vfwcvtbf16.f.f.v v12, v10, v0.t
397; CHECK-NEXT:    vmv.v.x v10, a1
398; CHECK-NEXT:    vfwcvtbf16.f.f.v v16, v8, v0.t
399; CHECK-NEXT:    vfwcvtbf16.f.f.v v20, v10, v0.t
400; CHECK-NEXT:    vsetvli zero, zero, e32, m4, ta, ma
401; CHECK-NEXT:    vfmadd.vv v20, v16, v12, v0.t
402; CHECK-NEXT:    vsetvli zero, zero, e16, m2, ta, ma
403; CHECK-NEXT:    vfncvtbf16.f.f.w v8, v20, v0.t
404; CHECK-NEXT:    ret
405  %elt.head = insertelement <vscale x 8 x bfloat> poison, bfloat %b, i32 0
406  %vb = shufflevector <vscale x 8 x bfloat> %elt.head, <vscale x 8 x bfloat> poison, <vscale x 8 x i32> zeroinitializer
407  %v = call <vscale x 8 x bfloat> @llvm.vp.fma.nxv8bf16(<vscale x 8 x bfloat> %va, <vscale x 8 x bfloat> %vb, <vscale x 8 x bfloat> %vc, <vscale x 8 x i1> %m, i32 %evl)
408  ret <vscale x 8 x bfloat> %v
409}
410
411define <vscale x 8 x bfloat> @vfma_vf_nxv8bf16_commute(<vscale x 8 x bfloat> %va, bfloat %b, <vscale x 8 x bfloat> %vc, <vscale x 8 x i1> %m, i32 zeroext %evl) {
412; CHECK-LABEL: vfma_vf_nxv8bf16_commute:
413; CHECK:       # %bb.0:
414; CHECK-NEXT:    fmv.x.h a1, fa0
415; CHECK-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
416; CHECK-NEXT:    vfwcvtbf16.f.f.v v12, v10, v0.t
417; CHECK-NEXT:    vmv.v.x v10, a1
418; CHECK-NEXT:    vfwcvtbf16.f.f.v v16, v8, v0.t
419; CHECK-NEXT:    vfwcvtbf16.f.f.v v20, v10, v0.t
420; CHECK-NEXT:    vsetvli zero, zero, e32, m4, ta, ma
421; CHECK-NEXT:    vfmadd.vv v16, v20, v12, v0.t
422; CHECK-NEXT:    vsetvli zero, zero, e16, m2, ta, ma
423; CHECK-NEXT:    vfncvtbf16.f.f.w v8, v16, v0.t
424; CHECK-NEXT:    ret
425  %elt.head = insertelement <vscale x 8 x bfloat> poison, bfloat %b, i32 0
426  %vb = shufflevector <vscale x 8 x bfloat> %elt.head, <vscale x 8 x bfloat> poison, <vscale x 8 x i32> zeroinitializer
427  %v = call <vscale x 8 x bfloat> @llvm.vp.fma.nxv8bf16(<vscale x 8 x bfloat> %vb, <vscale x 8 x bfloat> %va, <vscale x 8 x bfloat> %vc, <vscale x 8 x i1> %m, i32 %evl)
428  ret <vscale x 8 x bfloat> %v
429}
430
431define <vscale x 8 x bfloat> @vfma_vf_nxv8bf16_unmasked(<vscale x 8 x bfloat> %va, bfloat %b, <vscale x 8 x bfloat> %vc, i32 zeroext %evl) {
432; CHECK-LABEL: vfma_vf_nxv8bf16_unmasked:
433; CHECK:       # %bb.0:
434; CHECK-NEXT:    fmv.x.h a1, fa0
435; CHECK-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
436; CHECK-NEXT:    vfwcvtbf16.f.f.v v12, v10
437; CHECK-NEXT:    vmv.v.x v10, a1
438; CHECK-NEXT:    vfwcvtbf16.f.f.v v16, v8
439; CHECK-NEXT:    vfwcvtbf16.f.f.v v20, v10
440; CHECK-NEXT:    vsetvli zero, zero, e32, m4, ta, ma
441; CHECK-NEXT:    vfmadd.vv v20, v16, v12
442; CHECK-NEXT:    vsetvli zero, zero, e16, m2, ta, ma
443; CHECK-NEXT:    vfncvtbf16.f.f.w v8, v20
444; CHECK-NEXT:    ret
445  %elt.head = insertelement <vscale x 8 x bfloat> poison, bfloat %b, i32 0
446  %vb = shufflevector <vscale x 8 x bfloat> %elt.head, <vscale x 8 x bfloat> poison, <vscale x 8 x i32> zeroinitializer
447  %v = call <vscale x 8 x bfloat> @llvm.vp.fma.nxv8bf16(<vscale x 8 x bfloat> %va, <vscale x 8 x bfloat> %vb, <vscale x 8 x bfloat> %vc, <vscale x 8 x i1> splat (i1 true), i32 %evl)
448  ret <vscale x 8 x bfloat> %v
449}
450
451define <vscale x 8 x bfloat> @vfma_vf_nxv8bf16_unmasked_commute(<vscale x 8 x bfloat> %va, bfloat %b, <vscale x 8 x bfloat> %vc, i32 zeroext %evl) {
452; CHECK-LABEL: vfma_vf_nxv8bf16_unmasked_commute:
453; CHECK:       # %bb.0:
454; CHECK-NEXT:    fmv.x.h a1, fa0
455; CHECK-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
456; CHECK-NEXT:    vfwcvtbf16.f.f.v v12, v10
457; CHECK-NEXT:    vmv.v.x v10, a1
458; CHECK-NEXT:    vfwcvtbf16.f.f.v v16, v8
459; CHECK-NEXT:    vfwcvtbf16.f.f.v v20, v10
460; CHECK-NEXT:    vsetvli zero, zero, e32, m4, ta, ma
461; CHECK-NEXT:    vfmadd.vv v20, v16, v12
462; CHECK-NEXT:    vsetvli zero, zero, e16, m2, ta, ma
463; CHECK-NEXT:    vfncvtbf16.f.f.w v8, v20
464; CHECK-NEXT:    ret
465  %elt.head = insertelement <vscale x 8 x bfloat> poison, bfloat %b, i32 0
466  %vb = shufflevector <vscale x 8 x bfloat> %elt.head, <vscale x 8 x bfloat> poison, <vscale x 8 x i32> zeroinitializer
467  %v = call <vscale x 8 x bfloat> @llvm.vp.fma.nxv8bf16(<vscale x 8 x bfloat> %vb, <vscale x 8 x bfloat> %va, <vscale x 8 x bfloat> %vc, <vscale x 8 x i1> splat (i1 true), i32 %evl)
468  ret <vscale x 8 x bfloat> %v
469}
470
471declare <vscale x 16 x bfloat> @llvm.vp.fma.nxv16bf16(<vscale x 16 x bfloat>, <vscale x 16 x bfloat>, <vscale x 16 x bfloat>, <vscale x 16 x i1>, i32)
472
473define <vscale x 16 x bfloat> @vfma_vv_nxv16bf16(<vscale x 16 x bfloat> %va, <vscale x 16 x bfloat> %b, <vscale x 16 x bfloat> %c, <vscale x 16 x i1> %m, i32 zeroext %evl) {
474; CHECK-LABEL: vfma_vv_nxv16bf16:
475; CHECK:       # %bb.0:
476; CHECK-NEXT:    addi sp, sp, -16
477; CHECK-NEXT:    .cfi_def_cfa_offset 16
478; CHECK-NEXT:    csrr a1, vlenb
479; CHECK-NEXT:    slli a1, a1, 3
480; CHECK-NEXT:    sub sp, sp, a1
481; CHECK-NEXT:    .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x08, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 8 * vlenb
482; CHECK-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
483; CHECK-NEXT:    vfwcvtbf16.f.f.v v24, v16, v0.t
484; CHECK-NEXT:    addi a0, sp, 16
485; CHECK-NEXT:    vs8r.v v24, (a0) # Unknown-size Folded Spill
486; CHECK-NEXT:    vfwcvtbf16.f.f.v v24, v8, v0.t
487; CHECK-NEXT:    vfwcvtbf16.f.f.v v16, v12, v0.t
488; CHECK-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
489; CHECK-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
490; CHECK-NEXT:    vfmadd.vv v16, v24, v8, v0.t
491; CHECK-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
492; CHECK-NEXT:    vfncvtbf16.f.f.w v8, v16, v0.t
493; CHECK-NEXT:    csrr a0, vlenb
494; CHECK-NEXT:    slli a0, a0, 3
495; CHECK-NEXT:    add sp, sp, a0
496; CHECK-NEXT:    .cfi_def_cfa sp, 16
497; CHECK-NEXT:    addi sp, sp, 16
498; CHECK-NEXT:    .cfi_def_cfa_offset 0
499; CHECK-NEXT:    ret
500  %v = call <vscale x 16 x bfloat> @llvm.vp.fma.nxv16bf16(<vscale x 16 x bfloat> %va, <vscale x 16 x bfloat> %b, <vscale x 16 x bfloat> %c, <vscale x 16 x i1> %m, i32 %evl)
501  ret <vscale x 16 x bfloat> %v
502}
503
504define <vscale x 16 x bfloat> @vfma_vv_nxv16bf16_unmasked(<vscale x 16 x bfloat> %va, <vscale x 16 x bfloat> %b, <vscale x 16 x bfloat> %c, i32 zeroext %evl) {
505; CHECK-LABEL: vfma_vv_nxv16bf16_unmasked:
506; CHECK:       # %bb.0:
507; CHECK-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
508; CHECK-NEXT:    vfwcvtbf16.f.f.v v24, v16
509; CHECK-NEXT:    vfwcvtbf16.f.f.v v16, v8
510; CHECK-NEXT:    vfwcvtbf16.f.f.v v0, v12
511; CHECK-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
512; CHECK-NEXT:    vfmadd.vv v0, v16, v24
513; CHECK-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
514; CHECK-NEXT:    vfncvtbf16.f.f.w v8, v0
515; CHECK-NEXT:    ret
516  %v = call <vscale x 16 x bfloat> @llvm.vp.fma.nxv16bf16(<vscale x 16 x bfloat> %va, <vscale x 16 x bfloat> %b, <vscale x 16 x bfloat> %c, <vscale x 16 x i1> splat (i1 true), i32 %evl)
517  ret <vscale x 16 x bfloat> %v
518}
519
520define <vscale x 16 x bfloat> @vfma_vf_nxv16bf16(<vscale x 16 x bfloat> %va, bfloat %b, <vscale x 16 x bfloat> %vc, <vscale x 16 x i1> %m, i32 zeroext %evl) {
521; CHECK-LABEL: vfma_vf_nxv16bf16:
522; CHECK:       # %bb.0:
523; CHECK-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
524; CHECK-NEXT:    vmv4r.v v16, v8
525; CHECK-NEXT:    fmv.x.h a0, fa0
526; CHECK-NEXT:    vfwcvtbf16.f.f.v v24, v12, v0.t
527; CHECK-NEXT:    vmv8r.v v8, v24
528; CHECK-NEXT:    vmv.v.x v4, a0
529; CHECK-NEXT:    vfwcvtbf16.f.f.v v24, v16, v0.t
530; CHECK-NEXT:    vfwcvtbf16.f.f.v v16, v4, v0.t
531; CHECK-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
532; CHECK-NEXT:    vfmadd.vv v16, v24, v8, v0.t
533; CHECK-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
534; CHECK-NEXT:    vfncvtbf16.f.f.w v8, v16, v0.t
535; CHECK-NEXT:    ret
536  %elt.head = insertelement <vscale x 16 x bfloat> poison, bfloat %b, i32 0
537  %vb = shufflevector <vscale x 16 x bfloat> %elt.head, <vscale x 16 x bfloat> poison, <vscale x 16 x i32> zeroinitializer
538  %v = call <vscale x 16 x bfloat> @llvm.vp.fma.nxv16bf16(<vscale x 16 x bfloat> %va, <vscale x 16 x bfloat> %vb, <vscale x 16 x bfloat> %vc, <vscale x 16 x i1> %m, i32 %evl)
539  ret <vscale x 16 x bfloat> %v
540}
541
542define <vscale x 16 x bfloat> @vfma_vf_nxv16bf16_commute(<vscale x 16 x bfloat> %va, bfloat %b, <vscale x 16 x bfloat> %vc, <vscale x 16 x i1> %m, i32 zeroext %evl) {
543; CHECK-LABEL: vfma_vf_nxv16bf16_commute:
544; CHECK:       # %bb.0:
545; CHECK-NEXT:    fmv.x.h a1, fa0
546; CHECK-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
547; CHECK-NEXT:    vfwcvtbf16.f.f.v v16, v12, v0.t
548; CHECK-NEXT:    vmv.v.x v4, a1
549; CHECK-NEXT:    vfwcvtbf16.f.f.v v24, v8, v0.t
550; CHECK-NEXT:    vfwcvtbf16.f.f.v v8, v4, v0.t
551; CHECK-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
552; CHECK-NEXT:    vfmadd.vv v24, v8, v16, v0.t
553; CHECK-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
554; CHECK-NEXT:    vfncvtbf16.f.f.w v8, v24, v0.t
555; CHECK-NEXT:    ret
556  %elt.head = insertelement <vscale x 16 x bfloat> poison, bfloat %b, i32 0
557  %vb = shufflevector <vscale x 16 x bfloat> %elt.head, <vscale x 16 x bfloat> poison, <vscale x 16 x i32> zeroinitializer
558  %v = call <vscale x 16 x bfloat> @llvm.vp.fma.nxv16bf16(<vscale x 16 x bfloat> %vb, <vscale x 16 x bfloat> %va, <vscale x 16 x bfloat> %vc, <vscale x 16 x i1> %m, i32 %evl)
559  ret <vscale x 16 x bfloat> %v
560}
561
562define <vscale x 16 x bfloat> @vfma_vf_nxv16bf16_unmasked(<vscale x 16 x bfloat> %va, bfloat %b, <vscale x 16 x bfloat> %vc, i32 zeroext %evl) {
563; CHECK-LABEL: vfma_vf_nxv16bf16_unmasked:
564; CHECK:       # %bb.0:
565; CHECK-NEXT:    fmv.x.h a1, fa0
566; CHECK-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
567; CHECK-NEXT:    vfwcvtbf16.f.f.v v16, v12
568; CHECK-NEXT:    vmv.v.x v12, a1
569; CHECK-NEXT:    vfwcvtbf16.f.f.v v24, v8
570; CHECK-NEXT:    vfwcvtbf16.f.f.v v0, v12
571; CHECK-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
572; CHECK-NEXT:    vfmadd.vv v0, v24, v16
573; CHECK-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
574; CHECK-NEXT:    vfncvtbf16.f.f.w v8, v0
575; CHECK-NEXT:    ret
576  %elt.head = insertelement <vscale x 16 x bfloat> poison, bfloat %b, i32 0
577  %vb = shufflevector <vscale x 16 x bfloat> %elt.head, <vscale x 16 x bfloat> poison, <vscale x 16 x i32> zeroinitializer
578  %v = call <vscale x 16 x bfloat> @llvm.vp.fma.nxv16bf16(<vscale x 16 x bfloat> %va, <vscale x 16 x bfloat> %vb, <vscale x 16 x bfloat> %vc, <vscale x 16 x i1> splat (i1 true), i32 %evl)
579  ret <vscale x 16 x bfloat> %v
580}
581
582define <vscale x 16 x bfloat> @vfma_vf_nxv16bf16_unmasked_commute(<vscale x 16 x bfloat> %va, bfloat %b, <vscale x 16 x bfloat> %vc, i32 zeroext %evl) {
583; CHECK-LABEL: vfma_vf_nxv16bf16_unmasked_commute:
584; CHECK:       # %bb.0:
585; CHECK-NEXT:    fmv.x.h a1, fa0
586; CHECK-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
587; CHECK-NEXT:    vfwcvtbf16.f.f.v v16, v12
588; CHECK-NEXT:    vmv.v.x v12, a1
589; CHECK-NEXT:    vfwcvtbf16.f.f.v v24, v8
590; CHECK-NEXT:    vfwcvtbf16.f.f.v v0, v12
591; CHECK-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
592; CHECK-NEXT:    vfmadd.vv v0, v24, v16
593; CHECK-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
594; CHECK-NEXT:    vfncvtbf16.f.f.w v8, v0
595; CHECK-NEXT:    ret
596  %elt.head = insertelement <vscale x 16 x bfloat> poison, bfloat %b, i32 0
597  %vb = shufflevector <vscale x 16 x bfloat> %elt.head, <vscale x 16 x bfloat> poison, <vscale x 16 x i32> zeroinitializer
598  %v = call <vscale x 16 x bfloat> @llvm.vp.fma.nxv16bf16(<vscale x 16 x bfloat> %vb, <vscale x 16 x bfloat> %va, <vscale x 16 x bfloat> %vc, <vscale x 16 x i1> splat (i1 true), i32 %evl)
599  ret <vscale x 16 x bfloat> %v
600}
601
602declare <vscale x 32 x bfloat> @llvm.vp.fma.nxv32bf16(<vscale x 32 x bfloat>, <vscale x 32 x bfloat>, <vscale x 32 x bfloat>, <vscale x 32 x i1>, i32)
603
604define <vscale x 32 x bfloat> @vfma_vv_nxv32bf16(<vscale x 32 x bfloat> %va, <vscale x 32 x bfloat> %b, <vscale x 32 x bfloat> %c, <vscale x 32 x i1> %m, i32 zeroext %evl) {
605; CHECK-LABEL: vfma_vv_nxv32bf16:
606; CHECK:       # %bb.0:
607; CHECK-NEXT:    addi sp, sp, -16
608; CHECK-NEXT:    .cfi_def_cfa_offset 16
609; CHECK-NEXT:    csrr a2, vlenb
610; CHECK-NEXT:    slli a2, a2, 3
611; CHECK-NEXT:    mv a3, a2
612; CHECK-NEXT:    slli a2, a2, 2
613; CHECK-NEXT:    add a2, a2, a3
614; CHECK-NEXT:    sub sp, sp, a2
615; CHECK-NEXT:    .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x28, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 40 * vlenb
616; CHECK-NEXT:    vsetvli a2, zero, e8, mf2, ta, ma
617; CHECK-NEXT:    vmv1r.v v7, v0
618; CHECK-NEXT:    csrr a2, vlenb
619; CHECK-NEXT:    slli a2, a2, 5
620; CHECK-NEXT:    add a2, sp, a2
621; CHECK-NEXT:    addi a2, a2, 16
622; CHECK-NEXT:    vs8r.v v16, (a2) # Unknown-size Folded Spill
623; CHECK-NEXT:    vmv8r.v v24, v8
624; CHECK-NEXT:    vl8re16.v v8, (a0)
625; CHECK-NEXT:    csrr a2, vlenb
626; CHECK-NEXT:    slli a0, a2, 1
627; CHECK-NEXT:    srli a2, a2, 2
628; CHECK-NEXT:    sub a3, a1, a0
629; CHECK-NEXT:    vslidedown.vx v0, v0, a2
630; CHECK-NEXT:    sltu a2, a1, a3
631; CHECK-NEXT:    addi a2, a2, -1
632; CHECK-NEXT:    and a2, a2, a3
633; CHECK-NEXT:    csrr a3, vlenb
634; CHECK-NEXT:    slli a3, a3, 4
635; CHECK-NEXT:    add a3, sp, a3
636; CHECK-NEXT:    addi a3, a3, 16
637; CHECK-NEXT:    vs8r.v v8, (a3) # Unknown-size Folded Spill
638; CHECK-NEXT:    vsetvli zero, a2, e16, m4, ta, ma
639; CHECK-NEXT:    vfwcvtbf16.f.f.v v16, v12, v0.t
640; CHECK-NEXT:    csrr a2, vlenb
641; CHECK-NEXT:    slli a2, a2, 3
642; CHECK-NEXT:    add a2, sp, a2
643; CHECK-NEXT:    addi a2, a2, 16
644; CHECK-NEXT:    vs8r.v v16, (a2) # Unknown-size Folded Spill
645; CHECK-NEXT:    csrr a2, vlenb
646; CHECK-NEXT:    slli a2, a2, 3
647; CHECK-NEXT:    mv a3, a2
648; CHECK-NEXT:    slli a2, a2, 1
649; CHECK-NEXT:    add a2, a2, a3
650; CHECK-NEXT:    add a2, sp, a2
651; CHECK-NEXT:    addi a2, a2, 16
652; CHECK-NEXT:    vs8r.v v24, (a2) # Unknown-size Folded Spill
653; CHECK-NEXT:    vfwcvtbf16.f.f.v v16, v28, v0.t
654; CHECK-NEXT:    csrr a2, vlenb
655; CHECK-NEXT:    slli a2, a2, 5
656; CHECK-NEXT:    add a2, sp, a2
657; CHECK-NEXT:    addi a2, a2, 16
658; CHECK-NEXT:    vl8r.v v8, (a2) # Unknown-size Folded Reload
659; CHECK-NEXT:    vfwcvtbf16.f.f.v v24, v12, v0.t
660; CHECK-NEXT:    csrr a2, vlenb
661; CHECK-NEXT:    slli a2, a2, 3
662; CHECK-NEXT:    add a2, sp, a2
663; CHECK-NEXT:    addi a2, a2, 16
664; CHECK-NEXT:    vl8r.v v8, (a2) # Unknown-size Folded Reload
665; CHECK-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
666; CHECK-NEXT:    vfmadd.vv v24, v16, v8, v0.t
667; CHECK-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
668; CHECK-NEXT:    vfncvtbf16.f.f.w v12, v24, v0.t
669; CHECK-NEXT:    addi a2, sp, 16
670; CHECK-NEXT:    vs8r.v v8, (a2) # Unknown-size Folded Spill
671; CHECK-NEXT:    bltu a1, a0, .LBB30_2
672; CHECK-NEXT:  # %bb.1:
673; CHECK-NEXT:    mv a1, a0
674; CHECK-NEXT:  .LBB30_2:
675; CHECK-NEXT:    vmv1r.v v0, v7
676; CHECK-NEXT:    csrr a0, vlenb
677; CHECK-NEXT:    slli a0, a0, 4
678; CHECK-NEXT:    add a0, sp, a0
679; CHECK-NEXT:    addi a0, a0, 16
680; CHECK-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
681; CHECK-NEXT:    vsetvli zero, a1, e16, m4, ta, ma
682; CHECK-NEXT:    vfwcvtbf16.f.f.v v24, v8, v0.t
683; CHECK-NEXT:    csrr a0, vlenb
684; CHECK-NEXT:    slli a0, a0, 3
685; CHECK-NEXT:    add a0, sp, a0
686; CHECK-NEXT:    addi a0, a0, 16
687; CHECK-NEXT:    vs8r.v v24, (a0) # Unknown-size Folded Spill
688; CHECK-NEXT:    csrr a0, vlenb
689; CHECK-NEXT:    slli a0, a0, 3
690; CHECK-NEXT:    mv a1, a0
691; CHECK-NEXT:    slli a0, a0, 1
692; CHECK-NEXT:    add a0, a0, a1
693; CHECK-NEXT:    add a0, sp, a0
694; CHECK-NEXT:    addi a0, a0, 16
695; CHECK-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
696; CHECK-NEXT:    vfwcvtbf16.f.f.v v16, v8, v0.t
697; CHECK-NEXT:    csrr a0, vlenb
698; CHECK-NEXT:    slli a0, a0, 4
699; CHECK-NEXT:    add a0, sp, a0
700; CHECK-NEXT:    addi a0, a0, 16
701; CHECK-NEXT:    vs8r.v v16, (a0) # Unknown-size Folded Spill
702; CHECK-NEXT:    csrr a0, vlenb
703; CHECK-NEXT:    slli a0, a0, 5
704; CHECK-NEXT:    add a0, sp, a0
705; CHECK-NEXT:    addi a0, a0, 16
706; CHECK-NEXT:    vl8r.v v24, (a0) # Unknown-size Folded Reload
707; CHECK-NEXT:    vfwcvtbf16.f.f.v v8, v24, v0.t
708; CHECK-NEXT:    csrr a0, vlenb
709; CHECK-NEXT:    slli a0, a0, 3
710; CHECK-NEXT:    add a0, sp, a0
711; CHECK-NEXT:    addi a0, a0, 16
712; CHECK-NEXT:    vl8r.v v24, (a0) # Unknown-size Folded Reload
713; CHECK-NEXT:    csrr a0, vlenb
714; CHECK-NEXT:    slli a0, a0, 4
715; CHECK-NEXT:    add a0, sp, a0
716; CHECK-NEXT:    addi a0, a0, 16
717; CHECK-NEXT:    vl8r.v v16, (a0) # Unknown-size Folded Reload
718; CHECK-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
719; CHECK-NEXT:    vfmadd.vv v8, v16, v24, v0.t
720; CHECK-NEXT:    vmv.v.v v16, v8
721; CHECK-NEXT:    addi a0, sp, 16
722; CHECK-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
723; CHECK-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
724; CHECK-NEXT:    vfncvtbf16.f.f.w v8, v16, v0.t
725; CHECK-NEXT:    csrr a0, vlenb
726; CHECK-NEXT:    slli a0, a0, 3
727; CHECK-NEXT:    mv a1, a0
728; CHECK-NEXT:    slli a0, a0, 2
729; CHECK-NEXT:    add a0, a0, a1
730; CHECK-NEXT:    add sp, sp, a0
731; CHECK-NEXT:    .cfi_def_cfa sp, 16
732; CHECK-NEXT:    addi sp, sp, 16
733; CHECK-NEXT:    .cfi_def_cfa_offset 0
734; CHECK-NEXT:    ret
735  %v = call <vscale x 32 x bfloat> @llvm.vp.fma.nxv32bf16(<vscale x 32 x bfloat> %va, <vscale x 32 x bfloat> %b, <vscale x 32 x bfloat> %c, <vscale x 32 x i1> %m, i32 %evl)
736  ret <vscale x 32 x bfloat> %v
737}
738
739define <vscale x 32 x bfloat> @vfma_vv_nxv32bf16_unmasked(<vscale x 32 x bfloat> %va, <vscale x 32 x bfloat> %b, <vscale x 32 x bfloat> %c, i32 zeroext %evl) {
740; CHECK-LABEL: vfma_vv_nxv32bf16_unmasked:
741; CHECK:       # %bb.0:
742; CHECK-NEXT:    addi sp, sp, -16
743; CHECK-NEXT:    .cfi_def_cfa_offset 16
744; CHECK-NEXT:    csrr a2, vlenb
745; CHECK-NEXT:    slli a2, a2, 5
746; CHECK-NEXT:    sub sp, sp, a2
747; CHECK-NEXT:    .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 32 * vlenb
748; CHECK-NEXT:    csrr a2, vlenb
749; CHECK-NEXT:    slli a2, a2, 3
750; CHECK-NEXT:    mv a3, a2
751; CHECK-NEXT:    slli a2, a2, 1
752; CHECK-NEXT:    add a2, a2, a3
753; CHECK-NEXT:    add a2, sp, a2
754; CHECK-NEXT:    addi a2, a2, 16
755; CHECK-NEXT:    vs8r.v v16, (a2) # Unknown-size Folded Spill
756; CHECK-NEXT:    vl8re16.v v16, (a0)
757; CHECK-NEXT:    csrr a2, vlenb
758; CHECK-NEXT:    vsetvli a0, zero, e8, m4, ta, ma
759; CHECK-NEXT:    vmset.m v24
760; CHECK-NEXT:    slli a0, a2, 1
761; CHECK-NEXT:    srli a2, a2, 2
762; CHECK-NEXT:    sub a3, a1, a0
763; CHECK-NEXT:    vsetvli a4, zero, e8, mf2, ta, ma
764; CHECK-NEXT:    vslidedown.vx v0, v24, a2
765; CHECK-NEXT:    sltu a2, a1, a3
766; CHECK-NEXT:    addi a2, a2, -1
767; CHECK-NEXT:    and a2, a2, a3
768; CHECK-NEXT:    csrr a3, vlenb
769; CHECK-NEXT:    slli a3, a3, 3
770; CHECK-NEXT:    add a3, sp, a3
771; CHECK-NEXT:    addi a3, a3, 16
772; CHECK-NEXT:    vs8r.v v16, (a3) # Unknown-size Folded Spill
773; CHECK-NEXT:    vsetvli zero, a2, e16, m4, ta, ma
774; CHECK-NEXT:    vfwcvtbf16.f.f.v v24, v20, v0.t
775; CHECK-NEXT:    addi a2, sp, 16
776; CHECK-NEXT:    vs8r.v v24, (a2) # Unknown-size Folded Spill
777; CHECK-NEXT:    csrr a2, vlenb
778; CHECK-NEXT:    slli a2, a2, 4
779; CHECK-NEXT:    add a2, sp, a2
780; CHECK-NEXT:    addi a2, a2, 16
781; CHECK-NEXT:    vs8r.v v8, (a2) # Unknown-size Folded Spill
782; CHECK-NEXT:    vfwcvtbf16.f.f.v v24, v12, v0.t
783; CHECK-NEXT:    csrr a2, vlenb
784; CHECK-NEXT:    slli a2, a2, 3
785; CHECK-NEXT:    mv a3, a2
786; CHECK-NEXT:    slli a2, a2, 1
787; CHECK-NEXT:    add a2, a2, a3
788; CHECK-NEXT:    add a2, sp, a2
789; CHECK-NEXT:    addi a2, a2, 16
790; CHECK-NEXT:    vl8r.v v16, (a2) # Unknown-size Folded Reload
791; CHECK-NEXT:    vfwcvtbf16.f.f.v v8, v20, v0.t
792; CHECK-NEXT:    addi a2, sp, 16
793; CHECK-NEXT:    vl8r.v v16, (a2) # Unknown-size Folded Reload
794; CHECK-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
795; CHECK-NEXT:    vfmadd.vv v8, v24, v16, v0.t
796; CHECK-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
797; CHECK-NEXT:    vfncvtbf16.f.f.w v20, v8, v0.t
798; CHECK-NEXT:    bltu a1, a0, .LBB31_2
799; CHECK-NEXT:  # %bb.1:
800; CHECK-NEXT:    mv a1, a0
801; CHECK-NEXT:  .LBB31_2:
802; CHECK-NEXT:    csrr a0, vlenb
803; CHECK-NEXT:    slli a0, a0, 3
804; CHECK-NEXT:    add a0, sp, a0
805; CHECK-NEXT:    addi a0, a0, 16
806; CHECK-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
807; CHECK-NEXT:    vsetvli zero, a1, e16, m4, ta, ma
808; CHECK-NEXT:    vfwcvtbf16.f.f.v v24, v8
809; CHECK-NEXT:    addi a0, sp, 16
810; CHECK-NEXT:    vs8r.v v24, (a0) # Unknown-size Folded Spill
811; CHECK-NEXT:    csrr a0, vlenb
812; CHECK-NEXT:    slli a0, a0, 4
813; CHECK-NEXT:    add a0, sp, a0
814; CHECK-NEXT:    addi a0, a0, 16
815; CHECK-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
816; CHECK-NEXT:    vfwcvtbf16.f.f.v v24, v8
817; CHECK-NEXT:    csrr a0, vlenb
818; CHECK-NEXT:    slli a0, a0, 3
819; CHECK-NEXT:    mv a1, a0
820; CHECK-NEXT:    slli a0, a0, 1
821; CHECK-NEXT:    add a0, a0, a1
822; CHECK-NEXT:    add a0, sp, a0
823; CHECK-NEXT:    addi a0, a0, 16
824; CHECK-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
825; CHECK-NEXT:    vfwcvtbf16.f.f.v v0, v8
826; CHECK-NEXT:    addi a0, sp, 16
827; CHECK-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
828; CHECK-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
829; CHECK-NEXT:    vfmadd.vv v0, v24, v8
830; CHECK-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
831; CHECK-NEXT:    vfncvtbf16.f.f.w v16, v0
832; CHECK-NEXT:    vmv8r.v v8, v16
833; CHECK-NEXT:    csrr a0, vlenb
834; CHECK-NEXT:    slli a0, a0, 5
835; CHECK-NEXT:    add sp, sp, a0
836; CHECK-NEXT:    .cfi_def_cfa sp, 16
837; CHECK-NEXT:    addi sp, sp, 16
838; CHECK-NEXT:    .cfi_def_cfa_offset 0
839; CHECK-NEXT:    ret
840  %v = call <vscale x 32 x bfloat> @llvm.vp.fma.nxv32bf16(<vscale x 32 x bfloat> %va, <vscale x 32 x bfloat> %b, <vscale x 32 x bfloat> %c, <vscale x 32 x i1> splat (i1 true), i32 %evl)
841  ret <vscale x 32 x bfloat> %v
842}
843
844define <vscale x 32 x bfloat> @vfma_vf_nxv32bf16(<vscale x 32 x bfloat> %va, bfloat %b, <vscale x 32 x bfloat> %vc, <vscale x 32 x i1> %m, i32 zeroext %evl) {
845; CHECK-LABEL: vfma_vf_nxv32bf16:
846; CHECK:       # %bb.0:
847; CHECK-NEXT:    addi sp, sp, -16
848; CHECK-NEXT:    .cfi_def_cfa_offset 16
849; CHECK-NEXT:    csrr a1, vlenb
850; CHECK-NEXT:    slli a1, a1, 3
851; CHECK-NEXT:    mv a2, a1
852; CHECK-NEXT:    slli a1, a1, 2
853; CHECK-NEXT:    add a1, a1, a2
854; CHECK-NEXT:    sub sp, sp, a1
855; CHECK-NEXT:    .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x28, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 40 * vlenb
856; CHECK-NEXT:    vsetvli a1, zero, e8, mf2, ta, ma
857; CHECK-NEXT:    vmv1r.v v7, v0
858; CHECK-NEXT:    vmv8r.v v24, v8
859; CHECK-NEXT:    fmv.x.h a2, fa0
860; CHECK-NEXT:    csrr a3, vlenb
861; CHECK-NEXT:    slli a1, a3, 1
862; CHECK-NEXT:    srli a3, a3, 2
863; CHECK-NEXT:    sub a4, a0, a1
864; CHECK-NEXT:    vslidedown.vx v0, v0, a3
865; CHECK-NEXT:    sltu a3, a0, a4
866; CHECK-NEXT:    addi a3, a3, -1
867; CHECK-NEXT:    and a3, a3, a4
868; CHECK-NEXT:    csrr a4, vlenb
869; CHECK-NEXT:    slli a4, a4, 4
870; CHECK-NEXT:    add a4, sp, a4
871; CHECK-NEXT:    addi a4, a4, 16
872; CHECK-NEXT:    vs8r.v v16, (a4) # Unknown-size Folded Spill
873; CHECK-NEXT:    vsetvli zero, a3, e16, m4, ta, ma
874; CHECK-NEXT:    vfwcvtbf16.f.f.v v8, v20, v0.t
875; CHECK-NEXT:    csrr a4, vlenb
876; CHECK-NEXT:    slli a4, a4, 3
877; CHECK-NEXT:    add a4, sp, a4
878; CHECK-NEXT:    addi a4, a4, 16
879; CHECK-NEXT:    vs8r.v v8, (a4) # Unknown-size Folded Spill
880; CHECK-NEXT:    csrr a4, vlenb
881; CHECK-NEXT:    slli a4, a4, 3
882; CHECK-NEXT:    mv a5, a4
883; CHECK-NEXT:    slli a4, a4, 1
884; CHECK-NEXT:    add a4, a4, a5
885; CHECK-NEXT:    add a4, sp, a4
886; CHECK-NEXT:    addi a4, a4, 16
887; CHECK-NEXT:    vs8r.v v24, (a4) # Unknown-size Folded Spill
888; CHECK-NEXT:    vfwcvtbf16.f.f.v v16, v28, v0.t
889; CHECK-NEXT:    vsetvli a4, zero, e16, m8, ta, ma
890; CHECK-NEXT:    vmv.v.x v24, a2
891; CHECK-NEXT:    csrr a2, vlenb
892; CHECK-NEXT:    slli a2, a2, 5
893; CHECK-NEXT:    add a2, sp, a2
894; CHECK-NEXT:    addi a2, a2, 16
895; CHECK-NEXT:    vs8r.v v24, (a2) # Unknown-size Folded Spill
896; CHECK-NEXT:    csrr a2, vlenb
897; CHECK-NEXT:    slli a2, a2, 5
898; CHECK-NEXT:    add a2, sp, a2
899; CHECK-NEXT:    addi a2, a2, 16
900; CHECK-NEXT:    vl8r.v v8, (a2) # Unknown-size Folded Reload
901; CHECK-NEXT:    vsetvli zero, a3, e16, m4, ta, ma
902; CHECK-NEXT:    vfwcvtbf16.f.f.v v24, v12, v0.t
903; CHECK-NEXT:    csrr a2, vlenb
904; CHECK-NEXT:    slli a2, a2, 3
905; CHECK-NEXT:    add a2, sp, a2
906; CHECK-NEXT:    addi a2, a2, 16
907; CHECK-NEXT:    vl8r.v v8, (a2) # Unknown-size Folded Reload
908; CHECK-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
909; CHECK-NEXT:    vfmadd.vv v24, v16, v8, v0.t
910; CHECK-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
911; CHECK-NEXT:    vfncvtbf16.f.f.w v12, v24, v0.t
912; CHECK-NEXT:    addi a2, sp, 16
913; CHECK-NEXT:    vs8r.v v8, (a2) # Unknown-size Folded Spill
914; CHECK-NEXT:    bltu a0, a1, .LBB32_2
915; CHECK-NEXT:  # %bb.1:
916; CHECK-NEXT:    mv a0, a1
917; CHECK-NEXT:  .LBB32_2:
918; CHECK-NEXT:    vmv1r.v v0, v7
919; CHECK-NEXT:    csrr a1, vlenb
920; CHECK-NEXT:    slli a1, a1, 4
921; CHECK-NEXT:    add a1, sp, a1
922; CHECK-NEXT:    addi a1, a1, 16
923; CHECK-NEXT:    vl8r.v v8, (a1) # Unknown-size Folded Reload
924; CHECK-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
925; CHECK-NEXT:    vfwcvtbf16.f.f.v v24, v8, v0.t
926; CHECK-NEXT:    csrr a0, vlenb
927; CHECK-NEXT:    slli a0, a0, 3
928; CHECK-NEXT:    add a0, sp, a0
929; CHECK-NEXT:    addi a0, a0, 16
930; CHECK-NEXT:    vs8r.v v24, (a0) # Unknown-size Folded Spill
931; CHECK-NEXT:    csrr a0, vlenb
932; CHECK-NEXT:    slli a0, a0, 3
933; CHECK-NEXT:    mv a1, a0
934; CHECK-NEXT:    slli a0, a0, 1
935; CHECK-NEXT:    add a0, a0, a1
936; CHECK-NEXT:    add a0, sp, a0
937; CHECK-NEXT:    addi a0, a0, 16
938; CHECK-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
939; CHECK-NEXT:    vfwcvtbf16.f.f.v v16, v8, v0.t
940; CHECK-NEXT:    csrr a0, vlenb
941; CHECK-NEXT:    slli a0, a0, 4
942; CHECK-NEXT:    add a0, sp, a0
943; CHECK-NEXT:    addi a0, a0, 16
944; CHECK-NEXT:    vs8r.v v16, (a0) # Unknown-size Folded Spill
945; CHECK-NEXT:    csrr a0, vlenb
946; CHECK-NEXT:    slli a0, a0, 5
947; CHECK-NEXT:    add a0, sp, a0
948; CHECK-NEXT:    addi a0, a0, 16
949; CHECK-NEXT:    vl8r.v v24, (a0) # Unknown-size Folded Reload
950; CHECK-NEXT:    vfwcvtbf16.f.f.v v8, v24, v0.t
951; CHECK-NEXT:    csrr a0, vlenb
952; CHECK-NEXT:    slli a0, a0, 3
953; CHECK-NEXT:    add a0, sp, a0
954; CHECK-NEXT:    addi a0, a0, 16
955; CHECK-NEXT:    vl8r.v v24, (a0) # Unknown-size Folded Reload
956; CHECK-NEXT:    csrr a0, vlenb
957; CHECK-NEXT:    slli a0, a0, 4
958; CHECK-NEXT:    add a0, sp, a0
959; CHECK-NEXT:    addi a0, a0, 16
960; CHECK-NEXT:    vl8r.v v16, (a0) # Unknown-size Folded Reload
961; CHECK-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
962; CHECK-NEXT:    vfmadd.vv v8, v16, v24, v0.t
963; CHECK-NEXT:    vmv.v.v v16, v8
964; CHECK-NEXT:    addi a0, sp, 16
965; CHECK-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
966; CHECK-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
967; CHECK-NEXT:    vfncvtbf16.f.f.w v8, v16, v0.t
968; CHECK-NEXT:    csrr a0, vlenb
969; CHECK-NEXT:    slli a0, a0, 3
970; CHECK-NEXT:    mv a1, a0
971; CHECK-NEXT:    slli a0, a0, 2
972; CHECK-NEXT:    add a0, a0, a1
973; CHECK-NEXT:    add sp, sp, a0
974; CHECK-NEXT:    .cfi_def_cfa sp, 16
975; CHECK-NEXT:    addi sp, sp, 16
976; CHECK-NEXT:    .cfi_def_cfa_offset 0
977; CHECK-NEXT:    ret
978  %elt.head = insertelement <vscale x 32 x bfloat> poison, bfloat %b, i32 0
979  %vb = shufflevector <vscale x 32 x bfloat> %elt.head, <vscale x 32 x bfloat> poison, <vscale x 32 x i32> zeroinitializer
980  %v = call <vscale x 32 x bfloat> @llvm.vp.fma.nxv32bf16(<vscale x 32 x bfloat> %va, <vscale x 32 x bfloat> %vb, <vscale x 32 x bfloat> %vc, <vscale x 32 x i1> %m, i32 %evl)
981  ret <vscale x 32 x bfloat> %v
982}
983
984define <vscale x 32 x bfloat> @vfma_vf_nxv32bf16_commute(<vscale x 32 x bfloat> %va, bfloat %b, <vscale x 32 x bfloat> %vc, <vscale x 32 x i1> %m, i32 zeroext %evl) {
985; CHECK-LABEL: vfma_vf_nxv32bf16_commute:
986; CHECK:       # %bb.0:
987; CHECK-NEXT:    addi sp, sp, -16
988; CHECK-NEXT:    .cfi_def_cfa_offset 16
989; CHECK-NEXT:    csrr a1, vlenb
990; CHECK-NEXT:    slli a1, a1, 3
991; CHECK-NEXT:    mv a2, a1
992; CHECK-NEXT:    slli a1, a1, 2
993; CHECK-NEXT:    add a1, a1, a2
994; CHECK-NEXT:    sub sp, sp, a1
995; CHECK-NEXT:    .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x28, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 40 * vlenb
996; CHECK-NEXT:    vsetvli a1, zero, e16, m8, ta, ma
997; CHECK-NEXT:    vmv1r.v v7, v0
998; CHECK-NEXT:    fmv.x.h a1, fa0
999; CHECK-NEXT:    csrr a2, vlenb
1000; CHECK-NEXT:    vmv.v.x v24, a1
1001; CHECK-NEXT:    csrr a1, vlenb
1002; CHECK-NEXT:    slli a1, a1, 5
1003; CHECK-NEXT:    add a1, sp, a1
1004; CHECK-NEXT:    addi a1, a1, 16
1005; CHECK-NEXT:    vs8r.v v24, (a1) # Unknown-size Folded Spill
1006; CHECK-NEXT:    slli a1, a2, 1
1007; CHECK-NEXT:    srli a2, a2, 2
1008; CHECK-NEXT:    sub a3, a0, a1
1009; CHECK-NEXT:    vsetvli a4, zero, e8, mf2, ta, ma
1010; CHECK-NEXT:    vslidedown.vx v0, v0, a2
1011; CHECK-NEXT:    sltu a2, a0, a3
1012; CHECK-NEXT:    addi a2, a2, -1
1013; CHECK-NEXT:    and a2, a2, a3
1014; CHECK-NEXT:    csrr a3, vlenb
1015; CHECK-NEXT:    slli a3, a3, 4
1016; CHECK-NEXT:    add a3, sp, a3
1017; CHECK-NEXT:    addi a3, a3, 16
1018; CHECK-NEXT:    vs8r.v v16, (a3) # Unknown-size Folded Spill
1019; CHECK-NEXT:    vsetvli zero, a2, e16, m4, ta, ma
1020; CHECK-NEXT:    vfwcvtbf16.f.f.v v24, v20, v0.t
1021; CHECK-NEXT:    csrr a2, vlenb
1022; CHECK-NEXT:    slli a2, a2, 3
1023; CHECK-NEXT:    add a2, sp, a2
1024; CHECK-NEXT:    addi a2, a2, 16
1025; CHECK-NEXT:    vs8r.v v24, (a2) # Unknown-size Folded Spill
1026; CHECK-NEXT:    csrr a2, vlenb
1027; CHECK-NEXT:    slli a2, a2, 5
1028; CHECK-NEXT:    add a2, sp, a2
1029; CHECK-NEXT:    addi a2, a2, 16
1030; CHECK-NEXT:    vl8r.v v24, (a2) # Unknown-size Folded Reload
1031; CHECK-NEXT:    vfwcvtbf16.f.f.v v16, v28, v0.t
1032; CHECK-NEXT:    vmv4r.v v24, v8
1033; CHECK-NEXT:    csrr a2, vlenb
1034; CHECK-NEXT:    slli a2, a2, 3
1035; CHECK-NEXT:    mv a3, a2
1036; CHECK-NEXT:    slli a2, a2, 1
1037; CHECK-NEXT:    add a2, a2, a3
1038; CHECK-NEXT:    add a2, sp, a2
1039; CHECK-NEXT:    addi a2, a2, 16
1040; CHECK-NEXT:    vs8r.v v24, (a2) # Unknown-size Folded Spill
1041; CHECK-NEXT:    vfwcvtbf16.f.f.v v24, v12, v0.t
1042; CHECK-NEXT:    csrr a2, vlenb
1043; CHECK-NEXT:    slli a2, a2, 3
1044; CHECK-NEXT:    add a2, sp, a2
1045; CHECK-NEXT:    addi a2, a2, 16
1046; CHECK-NEXT:    vl8r.v v8, (a2) # Unknown-size Folded Reload
1047; CHECK-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
1048; CHECK-NEXT:    vfmadd.vv v24, v16, v8, v0.t
1049; CHECK-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
1050; CHECK-NEXT:    vfncvtbf16.f.f.w v12, v24, v0.t
1051; CHECK-NEXT:    addi a2, sp, 16
1052; CHECK-NEXT:    vs8r.v v8, (a2) # Unknown-size Folded Spill
1053; CHECK-NEXT:    bltu a0, a1, .LBB33_2
1054; CHECK-NEXT:  # %bb.1:
1055; CHECK-NEXT:    mv a0, a1
1056; CHECK-NEXT:  .LBB33_2:
1057; CHECK-NEXT:    vmv1r.v v0, v7
1058; CHECK-NEXT:    csrr a1, vlenb
1059; CHECK-NEXT:    slli a1, a1, 4
1060; CHECK-NEXT:    add a1, sp, a1
1061; CHECK-NEXT:    addi a1, a1, 16
1062; CHECK-NEXT:    vl8r.v v16, (a1) # Unknown-size Folded Reload
1063; CHECK-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
1064; CHECK-NEXT:    vfwcvtbf16.f.f.v v24, v16, v0.t
1065; CHECK-NEXT:    csrr a0, vlenb
1066; CHECK-NEXT:    slli a0, a0, 3
1067; CHECK-NEXT:    add a0, sp, a0
1068; CHECK-NEXT:    addi a0, a0, 16
1069; CHECK-NEXT:    vs8r.v v24, (a0) # Unknown-size Folded Spill
1070; CHECK-NEXT:    csrr a0, vlenb
1071; CHECK-NEXT:    slli a0, a0, 3
1072; CHECK-NEXT:    mv a1, a0
1073; CHECK-NEXT:    slli a0, a0, 1
1074; CHECK-NEXT:    add a0, a0, a1
1075; CHECK-NEXT:    add a0, sp, a0
1076; CHECK-NEXT:    addi a0, a0, 16
1077; CHECK-NEXT:    vl8r.v v16, (a0) # Unknown-size Folded Reload
1078; CHECK-NEXT:    vfwcvtbf16.f.f.v v8, v16, v0.t
1079; CHECK-NEXT:    csrr a0, vlenb
1080; CHECK-NEXT:    slli a0, a0, 5
1081; CHECK-NEXT:    add a0, sp, a0
1082; CHECK-NEXT:    addi a0, a0, 16
1083; CHECK-NEXT:    vl8r.v v16, (a0) # Unknown-size Folded Reload
1084; CHECK-NEXT:    vfwcvtbf16.f.f.v v24, v16, v0.t
1085; CHECK-NEXT:    csrr a0, vlenb
1086; CHECK-NEXT:    slli a0, a0, 3
1087; CHECK-NEXT:    mv a1, a0
1088; CHECK-NEXT:    slli a0, a0, 1
1089; CHECK-NEXT:    add a0, a0, a1
1090; CHECK-NEXT:    add a0, sp, a0
1091; CHECK-NEXT:    addi a0, a0, 16
1092; CHECK-NEXT:    vs8r.v v24, (a0) # Unknown-size Folded Spill
1093; CHECK-NEXT:    csrr a0, vlenb
1094; CHECK-NEXT:    slli a0, a0, 3
1095; CHECK-NEXT:    add a0, sp, a0
1096; CHECK-NEXT:    addi a0, a0, 16
1097; CHECK-NEXT:    vl8r.v v16, (a0) # Unknown-size Folded Reload
1098; CHECK-NEXT:    csrr a0, vlenb
1099; CHECK-NEXT:    slli a0, a0, 3
1100; CHECK-NEXT:    mv a1, a0
1101; CHECK-NEXT:    slli a0, a0, 1
1102; CHECK-NEXT:    add a0, a0, a1
1103; CHECK-NEXT:    add a0, sp, a0
1104; CHECK-NEXT:    addi a0, a0, 16
1105; CHECK-NEXT:    vl8r.v v24, (a0) # Unknown-size Folded Reload
1106; CHECK-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
1107; CHECK-NEXT:    vfmadd.vv v8, v24, v16, v0.t
1108; CHECK-NEXT:    vmv.v.v v16, v8
1109; CHECK-NEXT:    addi a0, sp, 16
1110; CHECK-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
1111; CHECK-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
1112; CHECK-NEXT:    vfncvtbf16.f.f.w v8, v16, v0.t
1113; CHECK-NEXT:    csrr a0, vlenb
1114; CHECK-NEXT:    slli a0, a0, 3
1115; CHECK-NEXT:    mv a1, a0
1116; CHECK-NEXT:    slli a0, a0, 2
1117; CHECK-NEXT:    add a0, a0, a1
1118; CHECK-NEXT:    add sp, sp, a0
1119; CHECK-NEXT:    .cfi_def_cfa sp, 16
1120; CHECK-NEXT:    addi sp, sp, 16
1121; CHECK-NEXT:    .cfi_def_cfa_offset 0
1122; CHECK-NEXT:    ret
1123  %elt.head = insertelement <vscale x 32 x bfloat> poison, bfloat %b, i32 0
1124  %vb = shufflevector <vscale x 32 x bfloat> %elt.head, <vscale x 32 x bfloat> poison, <vscale x 32 x i32> zeroinitializer
1125  %v = call <vscale x 32 x bfloat> @llvm.vp.fma.nxv32bf16(<vscale x 32 x bfloat> %vb, <vscale x 32 x bfloat> %va, <vscale x 32 x bfloat> %vc, <vscale x 32 x i1> %m, i32 %evl)
1126  ret <vscale x 32 x bfloat> %v
1127}
1128
1129define <vscale x 32 x bfloat> @vfma_vf_nxv32bf16_unmasked(<vscale x 32 x bfloat> %va, bfloat %b, <vscale x 32 x bfloat> %vc, i32 zeroext %evl) {
1130; CHECK-LABEL: vfma_vf_nxv32bf16_unmasked:
1131; CHECK:       # %bb.0:
1132; CHECK-NEXT:    addi sp, sp, -16
1133; CHECK-NEXT:    .cfi_def_cfa_offset 16
1134; CHECK-NEXT:    csrr a1, vlenb
1135; CHECK-NEXT:    slli a1, a1, 5
1136; CHECK-NEXT:    sub sp, sp, a1
1137; CHECK-NEXT:    .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 32 * vlenb
1138; CHECK-NEXT:    fmv.x.h a2, fa0
1139; CHECK-NEXT:    csrr a3, vlenb
1140; CHECK-NEXT:    vsetvli a1, zero, e8, m4, ta, ma
1141; CHECK-NEXT:    vmset.m v24
1142; CHECK-NEXT:    slli a1, a3, 1
1143; CHECK-NEXT:    srli a3, a3, 2
1144; CHECK-NEXT:    sub a4, a0, a1
1145; CHECK-NEXT:    vsetvli a5, zero, e8, mf2, ta, ma
1146; CHECK-NEXT:    vslidedown.vx v0, v24, a3
1147; CHECK-NEXT:    sltu a3, a0, a4
1148; CHECK-NEXT:    addi a3, a3, -1
1149; CHECK-NEXT:    and a3, a3, a4
1150; CHECK-NEXT:    csrr a4, vlenb
1151; CHECK-NEXT:    slli a4, a4, 4
1152; CHECK-NEXT:    add a4, sp, a4
1153; CHECK-NEXT:    addi a4, a4, 16
1154; CHECK-NEXT:    vs8r.v v16, (a4) # Unknown-size Folded Spill
1155; CHECK-NEXT:    vsetvli zero, a3, e16, m4, ta, ma
1156; CHECK-NEXT:    vfwcvtbf16.f.f.v v24, v20, v0.t
1157; CHECK-NEXT:    addi a4, sp, 16
1158; CHECK-NEXT:    vs8r.v v24, (a4) # Unknown-size Folded Spill
1159; CHECK-NEXT:    csrr a4, vlenb
1160; CHECK-NEXT:    slli a4, a4, 3
1161; CHECK-NEXT:    add a4, sp, a4
1162; CHECK-NEXT:    addi a4, a4, 16
1163; CHECK-NEXT:    vs8r.v v8, (a4) # Unknown-size Folded Spill
1164; CHECK-NEXT:    vfwcvtbf16.f.f.v v16, v12, v0.t
1165; CHECK-NEXT:    vsetvli a4, zero, e16, m8, ta, ma
1166; CHECK-NEXT:    vmv.v.x v8, a2
1167; CHECK-NEXT:    csrr a2, vlenb
1168; CHECK-NEXT:    slli a2, a2, 3
1169; CHECK-NEXT:    mv a4, a2
1170; CHECK-NEXT:    slli a2, a2, 1
1171; CHECK-NEXT:    add a2, a2, a4
1172; CHECK-NEXT:    add a2, sp, a2
1173; CHECK-NEXT:    addi a2, a2, 16
1174; CHECK-NEXT:    vs8r.v v8, (a2) # Unknown-size Folded Spill
1175; CHECK-NEXT:    csrr a2, vlenb
1176; CHECK-NEXT:    slli a2, a2, 3
1177; CHECK-NEXT:    mv a4, a2
1178; CHECK-NEXT:    slli a2, a2, 1
1179; CHECK-NEXT:    add a2, a2, a4
1180; CHECK-NEXT:    add a2, sp, a2
1181; CHECK-NEXT:    addi a2, a2, 16
1182; CHECK-NEXT:    vl8r.v v24, (a2) # Unknown-size Folded Reload
1183; CHECK-NEXT:    vsetvli zero, a3, e16, m4, ta, ma
1184; CHECK-NEXT:    vfwcvtbf16.f.f.v v8, v28, v0.t
1185; CHECK-NEXT:    addi a2, sp, 16
1186; CHECK-NEXT:    vl8r.v v24, (a2) # Unknown-size Folded Reload
1187; CHECK-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
1188; CHECK-NEXT:    vfmadd.vv v8, v16, v24, v0.t
1189; CHECK-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
1190; CHECK-NEXT:    vfncvtbf16.f.f.w v20, v8, v0.t
1191; CHECK-NEXT:    bltu a0, a1, .LBB34_2
1192; CHECK-NEXT:  # %bb.1:
1193; CHECK-NEXT:    mv a0, a1
1194; CHECK-NEXT:  .LBB34_2:
1195; CHECK-NEXT:    csrr a1, vlenb
1196; CHECK-NEXT:    slli a1, a1, 4
1197; CHECK-NEXT:    add a1, sp, a1
1198; CHECK-NEXT:    addi a1, a1, 16
1199; CHECK-NEXT:    vl8r.v v24, (a1) # Unknown-size Folded Reload
1200; CHECK-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
1201; CHECK-NEXT:    vfwcvtbf16.f.f.v v8, v24
1202; CHECK-NEXT:    addi a0, sp, 16
1203; CHECK-NEXT:    vs8r.v v8, (a0) # Unknown-size Folded Spill
1204; CHECK-NEXT:    csrr a0, vlenb
1205; CHECK-NEXT:    slli a0, a0, 3
1206; CHECK-NEXT:    add a0, sp, a0
1207; CHECK-NEXT:    addi a0, a0, 16
1208; CHECK-NEXT:    vl8r.v v0, (a0) # Unknown-size Folded Reload
1209; CHECK-NEXT:    vfwcvtbf16.f.f.v v24, v0
1210; CHECK-NEXT:    csrr a0, vlenb
1211; CHECK-NEXT:    slli a0, a0, 3
1212; CHECK-NEXT:    mv a1, a0
1213; CHECK-NEXT:    slli a0, a0, 1
1214; CHECK-NEXT:    add a0, a0, a1
1215; CHECK-NEXT:    add a0, sp, a0
1216; CHECK-NEXT:    addi a0, a0, 16
1217; CHECK-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
1218; CHECK-NEXT:    vfwcvtbf16.f.f.v v0, v8
1219; CHECK-NEXT:    addi a0, sp, 16
1220; CHECK-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
1221; CHECK-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
1222; CHECK-NEXT:    vfmadd.vv v0, v24, v8
1223; CHECK-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
1224; CHECK-NEXT:    vfncvtbf16.f.f.w v16, v0
1225; CHECK-NEXT:    vmv8r.v v8, v16
1226; CHECK-NEXT:    csrr a0, vlenb
1227; CHECK-NEXT:    slli a0, a0, 5
1228; CHECK-NEXT:    add sp, sp, a0
1229; CHECK-NEXT:    .cfi_def_cfa sp, 16
1230; CHECK-NEXT:    addi sp, sp, 16
1231; CHECK-NEXT:    .cfi_def_cfa_offset 0
1232; CHECK-NEXT:    ret
1233  %elt.head = insertelement <vscale x 32 x bfloat> poison, bfloat %b, i32 0
1234  %vb = shufflevector <vscale x 32 x bfloat> %elt.head, <vscale x 32 x bfloat> poison, <vscale x 32 x i32> zeroinitializer
1235  %v = call <vscale x 32 x bfloat> @llvm.vp.fma.nxv32bf16(<vscale x 32 x bfloat> %va, <vscale x 32 x bfloat> %vb, <vscale x 32 x bfloat> %vc, <vscale x 32 x i1> splat (i1 true), i32 %evl)
1236  ret <vscale x 32 x bfloat> %v
1237}
1238
1239define <vscale x 32 x bfloat> @vfma_vf_nxv32bf16_unmasked_commute(<vscale x 32 x bfloat> %va, bfloat %b, <vscale x 32 x bfloat> %vc, i32 zeroext %evl) {
1240; CHECK-LABEL: vfma_vf_nxv32bf16_unmasked_commute:
1241; CHECK:       # %bb.0:
1242; CHECK-NEXT:    addi sp, sp, -16
1243; CHECK-NEXT:    .cfi_def_cfa_offset 16
1244; CHECK-NEXT:    csrr a1, vlenb
1245; CHECK-NEXT:    slli a1, a1, 5
1246; CHECK-NEXT:    sub sp, sp, a1
1247; CHECK-NEXT:    .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 32 * vlenb
1248; CHECK-NEXT:    csrr a1, vlenb
1249; CHECK-NEXT:    slli a1, a1, 3
1250; CHECK-NEXT:    mv a2, a1
1251; CHECK-NEXT:    slli a1, a1, 1
1252; CHECK-NEXT:    add a1, a1, a2
1253; CHECK-NEXT:    add a1, sp, a1
1254; CHECK-NEXT:    addi a1, a1, 16
1255; CHECK-NEXT:    vs8r.v v8, (a1) # Unknown-size Folded Spill
1256; CHECK-NEXT:    fmv.x.h a1, fa0
1257; CHECK-NEXT:    csrr a2, vlenb
1258; CHECK-NEXT:    vsetvli a3, zero, e16, m8, ta, ma
1259; CHECK-NEXT:    vmset.m v24
1260; CHECK-NEXT:    vmv.v.x v8, a1
1261; CHECK-NEXT:    slli a1, a2, 1
1262; CHECK-NEXT:    srli a2, a2, 2
1263; CHECK-NEXT:    sub a3, a0, a1
1264; CHECK-NEXT:    vsetvli a4, zero, e8, mf2, ta, ma
1265; CHECK-NEXT:    vslidedown.vx v0, v24, a2
1266; CHECK-NEXT:    sltu a2, a0, a3
1267; CHECK-NEXT:    addi a2, a2, -1
1268; CHECK-NEXT:    and a2, a2, a3
1269; CHECK-NEXT:    csrr a3, vlenb
1270; CHECK-NEXT:    slli a3, a3, 4
1271; CHECK-NEXT:    add a3, sp, a3
1272; CHECK-NEXT:    addi a3, a3, 16
1273; CHECK-NEXT:    vs8r.v v16, (a3) # Unknown-size Folded Spill
1274; CHECK-NEXT:    vsetvli zero, a2, e16, m4, ta, ma
1275; CHECK-NEXT:    vfwcvtbf16.f.f.v v24, v20, v0.t
1276; CHECK-NEXT:    addi a2, sp, 16
1277; CHECK-NEXT:    vs8r.v v24, (a2) # Unknown-size Folded Spill
1278; CHECK-NEXT:    csrr a2, vlenb
1279; CHECK-NEXT:    slli a2, a2, 3
1280; CHECK-NEXT:    add a2, sp, a2
1281; CHECK-NEXT:    addi a2, a2, 16
1282; CHECK-NEXT:    vs8r.v v8, (a2) # Unknown-size Folded Spill
1283; CHECK-NEXT:    vfwcvtbf16.f.f.v v24, v12, v0.t
1284; CHECK-NEXT:    csrr a2, vlenb
1285; CHECK-NEXT:    slli a2, a2, 3
1286; CHECK-NEXT:    mv a3, a2
1287; CHECK-NEXT:    slli a2, a2, 1
1288; CHECK-NEXT:    add a2, a2, a3
1289; CHECK-NEXT:    add a2, sp, a2
1290; CHECK-NEXT:    addi a2, a2, 16
1291; CHECK-NEXT:    vl8r.v v16, (a2) # Unknown-size Folded Reload
1292; CHECK-NEXT:    vfwcvtbf16.f.f.v v8, v20, v0.t
1293; CHECK-NEXT:    addi a2, sp, 16
1294; CHECK-NEXT:    vl8r.v v16, (a2) # Unknown-size Folded Reload
1295; CHECK-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
1296; CHECK-NEXT:    vfmadd.vv v8, v24, v16, v0.t
1297; CHECK-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
1298; CHECK-NEXT:    vfncvtbf16.f.f.w v20, v8, v0.t
1299; CHECK-NEXT:    bltu a0, a1, .LBB35_2
1300; CHECK-NEXT:  # %bb.1:
1301; CHECK-NEXT:    mv a0, a1
1302; CHECK-NEXT:  .LBB35_2:
1303; CHECK-NEXT:    csrr a1, vlenb
1304; CHECK-NEXT:    slli a1, a1, 4
1305; CHECK-NEXT:    add a1, sp, a1
1306; CHECK-NEXT:    addi a1, a1, 16
1307; CHECK-NEXT:    vl8r.v v24, (a1) # Unknown-size Folded Reload
1308; CHECK-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
1309; CHECK-NEXT:    vfwcvtbf16.f.f.v v8, v24
1310; CHECK-NEXT:    addi a0, sp, 16
1311; CHECK-NEXT:    vs8r.v v8, (a0) # Unknown-size Folded Spill
1312; CHECK-NEXT:    csrr a0, vlenb
1313; CHECK-NEXT:    slli a0, a0, 3
1314; CHECK-NEXT:    mv a1, a0
1315; CHECK-NEXT:    slli a0, a0, 1
1316; CHECK-NEXT:    add a0, a0, a1
1317; CHECK-NEXT:    add a0, sp, a0
1318; CHECK-NEXT:    addi a0, a0, 16
1319; CHECK-NEXT:    vl8r.v v0, (a0) # Unknown-size Folded Reload
1320; CHECK-NEXT:    vfwcvtbf16.f.f.v v24, v0
1321; CHECK-NEXT:    csrr a0, vlenb
1322; CHECK-NEXT:    slli a0, a0, 3
1323; CHECK-NEXT:    add a0, sp, a0
1324; CHECK-NEXT:    addi a0, a0, 16
1325; CHECK-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
1326; CHECK-NEXT:    vfwcvtbf16.f.f.v v0, v8
1327; CHECK-NEXT:    addi a0, sp, 16
1328; CHECK-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
1329; CHECK-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
1330; CHECK-NEXT:    vfmadd.vv v0, v24, v8
1331; CHECK-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
1332; CHECK-NEXT:    vfncvtbf16.f.f.w v16, v0
1333; CHECK-NEXT:    vmv8r.v v8, v16
1334; CHECK-NEXT:    csrr a0, vlenb
1335; CHECK-NEXT:    slli a0, a0, 5
1336; CHECK-NEXT:    add sp, sp, a0
1337; CHECK-NEXT:    .cfi_def_cfa sp, 16
1338; CHECK-NEXT:    addi sp, sp, 16
1339; CHECK-NEXT:    .cfi_def_cfa_offset 0
1340; CHECK-NEXT:    ret
1341  %elt.head = insertelement <vscale x 32 x bfloat> poison, bfloat %b, i32 0
1342  %vb = shufflevector <vscale x 32 x bfloat> %elt.head, <vscale x 32 x bfloat> poison, <vscale x 32 x i32> zeroinitializer
1343  %v = call <vscale x 32 x bfloat> @llvm.vp.fma.nxv32bf16(<vscale x 32 x bfloat> %vb, <vscale x 32 x bfloat> %va, <vscale x 32 x bfloat> %vc, <vscale x 32 x i1> splat (i1 true), i32 %evl)
1344  ret <vscale x 32 x bfloat> %v
1345}
1346
1347declare <vscale x 1 x half> @llvm.vp.fma.nxv1f16(<vscale x 1 x half>, <vscale x 1 x half>, <vscale x 1 x half>, <vscale x 1 x i1>, i32)
1348
1349define <vscale x 1 x half> @vfma_vv_nxv1f16(<vscale x 1 x half> %va, <vscale x 1 x half> %b, <vscale x 1 x half> %c, <vscale x 1 x i1> %m, i32 zeroext %evl) {
1350; ZVFH-LABEL: vfma_vv_nxv1f16:
1351; ZVFH:       # %bb.0:
1352; ZVFH-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
1353; ZVFH-NEXT:    vfmadd.vv v9, v8, v10, v0.t
1354; ZVFH-NEXT:    vmv1r.v v8, v9
1355; ZVFH-NEXT:    ret
1356;
1357; ZVFHMIN-LABEL: vfma_vv_nxv1f16:
1358; ZVFHMIN:       # %bb.0:
1359; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
1360; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v10, v0.t
1361; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v8, v0.t
1362; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v9, v0.t
1363; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, mf2, ta, ma
1364; ZVFHMIN-NEXT:    vfmadd.vv v12, v10, v11, v0.t
1365; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf4, ta, ma
1366; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v12, v0.t
1367; ZVFHMIN-NEXT:    ret
1368  %v = call <vscale x 1 x half> @llvm.vp.fma.nxv1f16(<vscale x 1 x half> %va, <vscale x 1 x half> %b, <vscale x 1 x half> %c, <vscale x 1 x i1> %m, i32 %evl)
1369  ret <vscale x 1 x half> %v
1370}
1371
1372define <vscale x 1 x half> @vfma_vv_nxv1f16_unmasked(<vscale x 1 x half> %va, <vscale x 1 x half> %b, <vscale x 1 x half> %c, i32 zeroext %evl) {
1373; ZVFH-LABEL: vfma_vv_nxv1f16_unmasked:
1374; ZVFH:       # %bb.0:
1375; ZVFH-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
1376; ZVFH-NEXT:    vfmadd.vv v8, v9, v10
1377; ZVFH-NEXT:    ret
1378;
1379; ZVFHMIN-LABEL: vfma_vv_nxv1f16_unmasked:
1380; ZVFHMIN:       # %bb.0:
1381; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
1382; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v10
1383; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v8
1384; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v9
1385; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, mf2, ta, ma
1386; ZVFHMIN-NEXT:    vfmadd.vv v12, v10, v11
1387; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf4, ta, ma
1388; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v12
1389; ZVFHMIN-NEXT:    ret
1390  %v = call <vscale x 1 x half> @llvm.vp.fma.nxv1f16(<vscale x 1 x half> %va, <vscale x 1 x half> %b, <vscale x 1 x half> %c, <vscale x 1 x i1> splat (i1 true), i32 %evl)
1391  ret <vscale x 1 x half> %v
1392}
1393
1394define <vscale x 1 x half> @vfma_vf_nxv1f16(<vscale x 1 x half> %va, half %b, <vscale x 1 x half> %vc, <vscale x 1 x i1> %m, i32 zeroext %evl) {
1395; ZVFH-LABEL: vfma_vf_nxv1f16:
1396; ZVFH:       # %bb.0:
1397; ZVFH-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
1398; ZVFH-NEXT:    vfmadd.vf v8, fa0, v9, v0.t
1399; ZVFH-NEXT:    ret
1400;
1401; ZVFHMIN-LABEL: vfma_vf_nxv1f16:
1402; ZVFHMIN:       # %bb.0:
1403; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
1404; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
1405; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v9, v0.t
1406; ZVFHMIN-NEXT:    vmv.v.x v9, a1
1407; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v8, v0.t
1408; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v9, v0.t
1409; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, mf2, ta, ma
1410; ZVFHMIN-NEXT:    vfmadd.vv v12, v11, v10, v0.t
1411; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf4, ta, ma
1412; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v12, v0.t
1413; ZVFHMIN-NEXT:    ret
1414  %elt.head = insertelement <vscale x 1 x half> poison, half %b, i32 0
1415  %vb = shufflevector <vscale x 1 x half> %elt.head, <vscale x 1 x half> poison, <vscale x 1 x i32> zeroinitializer
1416  %v = call <vscale x 1 x half> @llvm.vp.fma.nxv1f16(<vscale x 1 x half> %va, <vscale x 1 x half> %vb, <vscale x 1 x half> %vc, <vscale x 1 x i1> %m, i32 %evl)
1417  ret <vscale x 1 x half> %v
1418}
1419
1420define <vscale x 1 x half> @vfma_vf_nxv1f16_commute(<vscale x 1 x half> %va, half %b, <vscale x 1 x half> %vc, <vscale x 1 x i1> %m, i32 zeroext %evl) {
1421; ZVFH-LABEL: vfma_vf_nxv1f16_commute:
1422; ZVFH:       # %bb.0:
1423; ZVFH-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
1424; ZVFH-NEXT:    vfmadd.vf v8, fa0, v9, v0.t
1425; ZVFH-NEXT:    ret
1426;
1427; ZVFHMIN-LABEL: vfma_vf_nxv1f16_commute:
1428; ZVFHMIN:       # %bb.0:
1429; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
1430; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
1431; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v9, v0.t
1432; ZVFHMIN-NEXT:    vmv.v.x v9, a1
1433; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v8, v0.t
1434; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v9, v0.t
1435; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, mf2, ta, ma
1436; ZVFHMIN-NEXT:    vfmadd.vv v11, v8, v10, v0.t
1437; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf4, ta, ma
1438; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v11, v0.t
1439; ZVFHMIN-NEXT:    ret
1440  %elt.head = insertelement <vscale x 1 x half> poison, half %b, i32 0
1441  %vb = shufflevector <vscale x 1 x half> %elt.head, <vscale x 1 x half> poison, <vscale x 1 x i32> zeroinitializer
1442  %v = call <vscale x 1 x half> @llvm.vp.fma.nxv1f16(<vscale x 1 x half> %vb, <vscale x 1 x half> %va, <vscale x 1 x half> %vc, <vscale x 1 x i1> %m, i32 %evl)
1443  ret <vscale x 1 x half> %v
1444}
1445
1446define <vscale x 1 x half> @vfma_vf_nxv1f16_unmasked(<vscale x 1 x half> %va, half %b, <vscale x 1 x half> %vc, i32 zeroext %evl) {
1447; ZVFH-LABEL: vfma_vf_nxv1f16_unmasked:
1448; ZVFH:       # %bb.0:
1449; ZVFH-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
1450; ZVFH-NEXT:    vfmadd.vf v8, fa0, v9
1451; ZVFH-NEXT:    ret
1452;
1453; ZVFHMIN-LABEL: vfma_vf_nxv1f16_unmasked:
1454; ZVFHMIN:       # %bb.0:
1455; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
1456; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
1457; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v9
1458; ZVFHMIN-NEXT:    vmv.v.x v9, a1
1459; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v8
1460; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v9
1461; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, mf2, ta, ma
1462; ZVFHMIN-NEXT:    vfmadd.vv v12, v11, v10
1463; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf4, ta, ma
1464; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v12
1465; ZVFHMIN-NEXT:    ret
1466  %elt.head = insertelement <vscale x 1 x half> poison, half %b, i32 0
1467  %vb = shufflevector <vscale x 1 x half> %elt.head, <vscale x 1 x half> poison, <vscale x 1 x i32> zeroinitializer
1468  %v = call <vscale x 1 x half> @llvm.vp.fma.nxv1f16(<vscale x 1 x half> %va, <vscale x 1 x half> %vb, <vscale x 1 x half> %vc, <vscale x 1 x i1> splat (i1 true), i32 %evl)
1469  ret <vscale x 1 x half> %v
1470}
1471
1472define <vscale x 1 x half> @vfma_vf_nxv1f16_unmasked_commute(<vscale x 1 x half> %va, half %b, <vscale x 1 x half> %vc, i32 zeroext %evl) {
1473; ZVFH-LABEL: vfma_vf_nxv1f16_unmasked_commute:
1474; ZVFH:       # %bb.0:
1475; ZVFH-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
1476; ZVFH-NEXT:    vfmadd.vf v8, fa0, v9
1477; ZVFH-NEXT:    ret
1478;
1479; ZVFHMIN-LABEL: vfma_vf_nxv1f16_unmasked_commute:
1480; ZVFHMIN:       # %bb.0:
1481; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
1482; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
1483; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v9
1484; ZVFHMIN-NEXT:    vmv.v.x v9, a1
1485; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v8
1486; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v9
1487; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, mf2, ta, ma
1488; ZVFHMIN-NEXT:    vfmadd.vv v12, v11, v10
1489; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf4, ta, ma
1490; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v12
1491; ZVFHMIN-NEXT:    ret
1492  %elt.head = insertelement <vscale x 1 x half> poison, half %b, i32 0
1493  %vb = shufflevector <vscale x 1 x half> %elt.head, <vscale x 1 x half> poison, <vscale x 1 x i32> zeroinitializer
1494  %v = call <vscale x 1 x half> @llvm.vp.fma.nxv1f16(<vscale x 1 x half> %vb, <vscale x 1 x half> %va, <vscale x 1 x half> %vc, <vscale x 1 x i1> splat (i1 true), i32 %evl)
1495  ret <vscale x 1 x half> %v
1496}
1497
1498declare <vscale x 2 x half> @llvm.vp.fma.nxv2f16(<vscale x 2 x half>, <vscale x 2 x half>, <vscale x 2 x half>, <vscale x 2 x i1>, i32)
1499
1500define <vscale x 2 x half> @vfma_vv_nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x half> %b, <vscale x 2 x half> %c, <vscale x 2 x i1> %m, i32 zeroext %evl) {
1501; ZVFH-LABEL: vfma_vv_nxv2f16:
1502; ZVFH:       # %bb.0:
1503; ZVFH-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
1504; ZVFH-NEXT:    vfmadd.vv v9, v8, v10, v0.t
1505; ZVFH-NEXT:    vmv1r.v v8, v9
1506; ZVFH-NEXT:    ret
1507;
1508; ZVFHMIN-LABEL: vfma_vv_nxv2f16:
1509; ZVFHMIN:       # %bb.0:
1510; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
1511; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v10, v0.t
1512; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v8, v0.t
1513; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v9, v0.t
1514; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m1, ta, ma
1515; ZVFHMIN-NEXT:    vfmadd.vv v12, v10, v11, v0.t
1516; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf2, ta, ma
1517; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v12, v0.t
1518; ZVFHMIN-NEXT:    ret
1519  %v = call <vscale x 2 x half> @llvm.vp.fma.nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x half> %b, <vscale x 2 x half> %c, <vscale x 2 x i1> %m, i32 %evl)
1520  ret <vscale x 2 x half> %v
1521}
1522
1523define <vscale x 2 x half> @vfma_vv_nxv2f16_unmasked(<vscale x 2 x half> %va, <vscale x 2 x half> %b, <vscale x 2 x half> %c, i32 zeroext %evl) {
1524; ZVFH-LABEL: vfma_vv_nxv2f16_unmasked:
1525; ZVFH:       # %bb.0:
1526; ZVFH-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
1527; ZVFH-NEXT:    vfmadd.vv v8, v9, v10
1528; ZVFH-NEXT:    ret
1529;
1530; ZVFHMIN-LABEL: vfma_vv_nxv2f16_unmasked:
1531; ZVFHMIN:       # %bb.0:
1532; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
1533; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v10
1534; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v8
1535; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v9
1536; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m1, ta, ma
1537; ZVFHMIN-NEXT:    vfmadd.vv v12, v10, v11
1538; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf2, ta, ma
1539; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v12
1540; ZVFHMIN-NEXT:    ret
1541  %v = call <vscale x 2 x half> @llvm.vp.fma.nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x half> %b, <vscale x 2 x half> %c, <vscale x 2 x i1> splat (i1 true), i32 %evl)
1542  ret <vscale x 2 x half> %v
1543}
1544
1545define <vscale x 2 x half> @vfma_vf_nxv2f16(<vscale x 2 x half> %va, half %b, <vscale x 2 x half> %vc, <vscale x 2 x i1> %m, i32 zeroext %evl) {
1546; ZVFH-LABEL: vfma_vf_nxv2f16:
1547; ZVFH:       # %bb.0:
1548; ZVFH-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
1549; ZVFH-NEXT:    vfmadd.vf v8, fa0, v9, v0.t
1550; ZVFH-NEXT:    ret
1551;
1552; ZVFHMIN-LABEL: vfma_vf_nxv2f16:
1553; ZVFHMIN:       # %bb.0:
1554; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
1555; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
1556; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v9, v0.t
1557; ZVFHMIN-NEXT:    vmv.v.x v9, a1
1558; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v8, v0.t
1559; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v9, v0.t
1560; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m1, ta, ma
1561; ZVFHMIN-NEXT:    vfmadd.vv v12, v11, v10, v0.t
1562; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf2, ta, ma
1563; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v12, v0.t
1564; ZVFHMIN-NEXT:    ret
1565  %elt.head = insertelement <vscale x 2 x half> poison, half %b, i32 0
1566  %vb = shufflevector <vscale x 2 x half> %elt.head, <vscale x 2 x half> poison, <vscale x 2 x i32> zeroinitializer
1567  %v = call <vscale x 2 x half> @llvm.vp.fma.nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x half> %vb, <vscale x 2 x half> %vc, <vscale x 2 x i1> %m, i32 %evl)
1568  ret <vscale x 2 x half> %v
1569}
1570
1571define <vscale x 2 x half> @vfma_vf_nxv2f16_commute(<vscale x 2 x half> %va, half %b, <vscale x 2 x half> %vc, <vscale x 2 x i1> %m, i32 zeroext %evl) {
1572; ZVFH-LABEL: vfma_vf_nxv2f16_commute:
1573; ZVFH:       # %bb.0:
1574; ZVFH-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
1575; ZVFH-NEXT:    vfmadd.vf v8, fa0, v9, v0.t
1576; ZVFH-NEXT:    ret
1577;
1578; ZVFHMIN-LABEL: vfma_vf_nxv2f16_commute:
1579; ZVFHMIN:       # %bb.0:
1580; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
1581; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
1582; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v9, v0.t
1583; ZVFHMIN-NEXT:    vmv.v.x v9, a1
1584; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v8, v0.t
1585; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v9, v0.t
1586; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m1, ta, ma
1587; ZVFHMIN-NEXT:    vfmadd.vv v11, v8, v10, v0.t
1588; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf2, ta, ma
1589; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v11, v0.t
1590; ZVFHMIN-NEXT:    ret
1591  %elt.head = insertelement <vscale x 2 x half> poison, half %b, i32 0
1592  %vb = shufflevector <vscale x 2 x half> %elt.head, <vscale x 2 x half> poison, <vscale x 2 x i32> zeroinitializer
1593  %v = call <vscale x 2 x half> @llvm.vp.fma.nxv2f16(<vscale x 2 x half> %vb, <vscale x 2 x half> %va, <vscale x 2 x half> %vc, <vscale x 2 x i1> %m, i32 %evl)
1594  ret <vscale x 2 x half> %v
1595}
1596
1597define <vscale x 2 x half> @vfma_vf_nxv2f16_unmasked(<vscale x 2 x half> %va, half %b, <vscale x 2 x half> %vc, i32 zeroext %evl) {
1598; ZVFH-LABEL: vfma_vf_nxv2f16_unmasked:
1599; ZVFH:       # %bb.0:
1600; ZVFH-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
1601; ZVFH-NEXT:    vfmadd.vf v8, fa0, v9
1602; ZVFH-NEXT:    ret
1603;
1604; ZVFHMIN-LABEL: vfma_vf_nxv2f16_unmasked:
1605; ZVFHMIN:       # %bb.0:
1606; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
1607; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
1608; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v9
1609; ZVFHMIN-NEXT:    vmv.v.x v9, a1
1610; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v8
1611; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v9
1612; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m1, ta, ma
1613; ZVFHMIN-NEXT:    vfmadd.vv v12, v11, v10
1614; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf2, ta, ma
1615; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v12
1616; ZVFHMIN-NEXT:    ret
1617  %elt.head = insertelement <vscale x 2 x half> poison, half %b, i32 0
1618  %vb = shufflevector <vscale x 2 x half> %elt.head, <vscale x 2 x half> poison, <vscale x 2 x i32> zeroinitializer
1619  %v = call <vscale x 2 x half> @llvm.vp.fma.nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x half> %vb, <vscale x 2 x half> %vc, <vscale x 2 x i1> splat (i1 true), i32 %evl)
1620  ret <vscale x 2 x half> %v
1621}
1622
1623define <vscale x 2 x half> @vfma_vf_nxv2f16_unmasked_commute(<vscale x 2 x half> %va, half %b, <vscale x 2 x half> %vc, i32 zeroext %evl) {
1624; ZVFH-LABEL: vfma_vf_nxv2f16_unmasked_commute:
1625; ZVFH:       # %bb.0:
1626; ZVFH-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
1627; ZVFH-NEXT:    vfmadd.vf v8, fa0, v9
1628; ZVFH-NEXT:    ret
1629;
1630; ZVFHMIN-LABEL: vfma_vf_nxv2f16_unmasked_commute:
1631; ZVFHMIN:       # %bb.0:
1632; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
1633; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
1634; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v9
1635; ZVFHMIN-NEXT:    vmv.v.x v9, a1
1636; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v8
1637; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v9
1638; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m1, ta, ma
1639; ZVFHMIN-NEXT:    vfmadd.vv v12, v11, v10
1640; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf2, ta, ma
1641; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v12
1642; ZVFHMIN-NEXT:    ret
1643  %elt.head = insertelement <vscale x 2 x half> poison, half %b, i32 0
1644  %vb = shufflevector <vscale x 2 x half> %elt.head, <vscale x 2 x half> poison, <vscale x 2 x i32> zeroinitializer
1645  %v = call <vscale x 2 x half> @llvm.vp.fma.nxv2f16(<vscale x 2 x half> %vb, <vscale x 2 x half> %va, <vscale x 2 x half> %vc, <vscale x 2 x i1> splat (i1 true), i32 %evl)
1646  ret <vscale x 2 x half> %v
1647}
1648
1649declare <vscale x 4 x half> @llvm.vp.fma.nxv4f16(<vscale x 4 x half>, <vscale x 4 x half>, <vscale x 4 x half>, <vscale x 4 x i1>, i32)
1650
1651define <vscale x 4 x half> @vfma_vv_nxv4f16(<vscale x 4 x half> %va, <vscale x 4 x half> %b, <vscale x 4 x half> %c, <vscale x 4 x i1> %m, i32 zeroext %evl) {
1652; ZVFH-LABEL: vfma_vv_nxv4f16:
1653; ZVFH:       # %bb.0:
1654; ZVFH-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
1655; ZVFH-NEXT:    vfmadd.vv v9, v8, v10, v0.t
1656; ZVFH-NEXT:    vmv.v.v v8, v9
1657; ZVFH-NEXT:    ret
1658;
1659; ZVFHMIN-LABEL: vfma_vv_nxv4f16:
1660; ZVFHMIN:       # %bb.0:
1661; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
1662; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v10, v0.t
1663; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v8, v0.t
1664; ZVFHMIN-NEXT:    vfwcvt.f.f.v v14, v9, v0.t
1665; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m2, ta, ma
1666; ZVFHMIN-NEXT:    vfmadd.vv v14, v10, v12, v0.t
1667; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m1, ta, ma
1668; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v14, v0.t
1669; ZVFHMIN-NEXT:    ret
1670  %v = call <vscale x 4 x half> @llvm.vp.fma.nxv4f16(<vscale x 4 x half> %va, <vscale x 4 x half> %b, <vscale x 4 x half> %c, <vscale x 4 x i1> %m, i32 %evl)
1671  ret <vscale x 4 x half> %v
1672}
1673
1674define <vscale x 4 x half> @vfma_vv_nxv4f16_unmasked(<vscale x 4 x half> %va, <vscale x 4 x half> %b, <vscale x 4 x half> %c, i32 zeroext %evl) {
1675; ZVFH-LABEL: vfma_vv_nxv4f16_unmasked:
1676; ZVFH:       # %bb.0:
1677; ZVFH-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
1678; ZVFH-NEXT:    vfmadd.vv v8, v9, v10
1679; ZVFH-NEXT:    ret
1680;
1681; ZVFHMIN-LABEL: vfma_vv_nxv4f16_unmasked:
1682; ZVFHMIN:       # %bb.0:
1683; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
1684; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v10
1685; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v8
1686; ZVFHMIN-NEXT:    vfwcvt.f.f.v v14, v9
1687; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m2, ta, ma
1688; ZVFHMIN-NEXT:    vfmadd.vv v14, v10, v12
1689; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m1, ta, ma
1690; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v14
1691; ZVFHMIN-NEXT:    ret
1692  %v = call <vscale x 4 x half> @llvm.vp.fma.nxv4f16(<vscale x 4 x half> %va, <vscale x 4 x half> %b, <vscale x 4 x half> %c, <vscale x 4 x i1> splat (i1 true), i32 %evl)
1693  ret <vscale x 4 x half> %v
1694}
1695
1696define <vscale x 4 x half> @vfma_vf_nxv4f16(<vscale x 4 x half> %va, half %b, <vscale x 4 x half> %vc, <vscale x 4 x i1> %m, i32 zeroext %evl) {
1697; ZVFH-LABEL: vfma_vf_nxv4f16:
1698; ZVFH:       # %bb.0:
1699; ZVFH-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
1700; ZVFH-NEXT:    vfmadd.vf v8, fa0, v9, v0.t
1701; ZVFH-NEXT:    ret
1702;
1703; ZVFHMIN-LABEL: vfma_vf_nxv4f16:
1704; ZVFHMIN:       # %bb.0:
1705; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
1706; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
1707; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v9, v0.t
1708; ZVFHMIN-NEXT:    vmv.v.x v9, a1
1709; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v8, v0.t
1710; ZVFHMIN-NEXT:    vfwcvt.f.f.v v14, v9, v0.t
1711; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m2, ta, ma
1712; ZVFHMIN-NEXT:    vfmadd.vv v14, v12, v10, v0.t
1713; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m1, ta, ma
1714; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v14, v0.t
1715; ZVFHMIN-NEXT:    ret
1716  %elt.head = insertelement <vscale x 4 x half> poison, half %b, i32 0
1717  %vb = shufflevector <vscale x 4 x half> %elt.head, <vscale x 4 x half> poison, <vscale x 4 x i32> zeroinitializer
1718  %v = call <vscale x 4 x half> @llvm.vp.fma.nxv4f16(<vscale x 4 x half> %va, <vscale x 4 x half> %vb, <vscale x 4 x half> %vc, <vscale x 4 x i1> %m, i32 %evl)
1719  ret <vscale x 4 x half> %v
1720}
1721
1722define <vscale x 4 x half> @vfma_vf_nxv4f16_commute(<vscale x 4 x half> %va, half %b, <vscale x 4 x half> %vc, <vscale x 4 x i1> %m, i32 zeroext %evl) {
1723; ZVFH-LABEL: vfma_vf_nxv4f16_commute:
1724; ZVFH:       # %bb.0:
1725; ZVFH-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
1726; ZVFH-NEXT:    vfmadd.vf v8, fa0, v9, v0.t
1727; ZVFH-NEXT:    ret
1728;
1729; ZVFHMIN-LABEL: vfma_vf_nxv4f16_commute:
1730; ZVFHMIN:       # %bb.0:
1731; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
1732; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
1733; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v9, v0.t
1734; ZVFHMIN-NEXT:    vmv.v.x v9, a1
1735; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v8, v0.t
1736; ZVFHMIN-NEXT:    vfwcvt.f.f.v v14, v9, v0.t
1737; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m2, ta, ma
1738; ZVFHMIN-NEXT:    vfmadd.vv v12, v14, v10, v0.t
1739; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m1, ta, ma
1740; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v12, v0.t
1741; ZVFHMIN-NEXT:    ret
1742  %elt.head = insertelement <vscale x 4 x half> poison, half %b, i32 0
1743  %vb = shufflevector <vscale x 4 x half> %elt.head, <vscale x 4 x half> poison, <vscale x 4 x i32> zeroinitializer
1744  %v = call <vscale x 4 x half> @llvm.vp.fma.nxv4f16(<vscale x 4 x half> %vb, <vscale x 4 x half> %va, <vscale x 4 x half> %vc, <vscale x 4 x i1> %m, i32 %evl)
1745  ret <vscale x 4 x half> %v
1746}
1747
1748define <vscale x 4 x half> @vfma_vf_nxv4f16_unmasked(<vscale x 4 x half> %va, half %b, <vscale x 4 x half> %vc, i32 zeroext %evl) {
1749; ZVFH-LABEL: vfma_vf_nxv4f16_unmasked:
1750; ZVFH:       # %bb.0:
1751; ZVFH-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
1752; ZVFH-NEXT:    vfmadd.vf v8, fa0, v9
1753; ZVFH-NEXT:    ret
1754;
1755; ZVFHMIN-LABEL: vfma_vf_nxv4f16_unmasked:
1756; ZVFHMIN:       # %bb.0:
1757; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
1758; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
1759; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v9
1760; ZVFHMIN-NEXT:    vmv.v.x v9, a1
1761; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v8
1762; ZVFHMIN-NEXT:    vfwcvt.f.f.v v14, v9
1763; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m2, ta, ma
1764; ZVFHMIN-NEXT:    vfmadd.vv v14, v12, v10
1765; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m1, ta, ma
1766; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v14
1767; ZVFHMIN-NEXT:    ret
1768  %elt.head = insertelement <vscale x 4 x half> poison, half %b, i32 0
1769  %vb = shufflevector <vscale x 4 x half> %elt.head, <vscale x 4 x half> poison, <vscale x 4 x i32> zeroinitializer
1770  %v = call <vscale x 4 x half> @llvm.vp.fma.nxv4f16(<vscale x 4 x half> %va, <vscale x 4 x half> %vb, <vscale x 4 x half> %vc, <vscale x 4 x i1> splat (i1 true), i32 %evl)
1771  ret <vscale x 4 x half> %v
1772}
1773
1774define <vscale x 4 x half> @vfma_vf_nxv4f16_unmasked_commute(<vscale x 4 x half> %va, half %b, <vscale x 4 x half> %vc, i32 zeroext %evl) {
1775; ZVFH-LABEL: vfma_vf_nxv4f16_unmasked_commute:
1776; ZVFH:       # %bb.0:
1777; ZVFH-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
1778; ZVFH-NEXT:    vfmadd.vf v8, fa0, v9
1779; ZVFH-NEXT:    ret
1780;
1781; ZVFHMIN-LABEL: vfma_vf_nxv4f16_unmasked_commute:
1782; ZVFHMIN:       # %bb.0:
1783; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
1784; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
1785; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v9
1786; ZVFHMIN-NEXT:    vmv.v.x v9, a1
1787; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v8
1788; ZVFHMIN-NEXT:    vfwcvt.f.f.v v14, v9
1789; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m2, ta, ma
1790; ZVFHMIN-NEXT:    vfmadd.vv v14, v12, v10
1791; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m1, ta, ma
1792; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v14
1793; ZVFHMIN-NEXT:    ret
1794  %elt.head = insertelement <vscale x 4 x half> poison, half %b, i32 0
1795  %vb = shufflevector <vscale x 4 x half> %elt.head, <vscale x 4 x half> poison, <vscale x 4 x i32> zeroinitializer
1796  %v = call <vscale x 4 x half> @llvm.vp.fma.nxv4f16(<vscale x 4 x half> %vb, <vscale x 4 x half> %va, <vscale x 4 x half> %vc, <vscale x 4 x i1> splat (i1 true), i32 %evl)
1797  ret <vscale x 4 x half> %v
1798}
1799
1800declare <vscale x 8 x half> @llvm.vp.fma.nxv8f16(<vscale x 8 x half>, <vscale x 8 x half>, <vscale x 8 x half>, <vscale x 8 x i1>, i32)
1801
1802define <vscale x 8 x half> @vfma_vv_nxv8f16(<vscale x 8 x half> %va, <vscale x 8 x half> %b, <vscale x 8 x half> %c, <vscale x 8 x i1> %m, i32 zeroext %evl) {
1803; ZVFH-LABEL: vfma_vv_nxv8f16:
1804; ZVFH:       # %bb.0:
1805; ZVFH-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
1806; ZVFH-NEXT:    vfmadd.vv v10, v8, v12, v0.t
1807; ZVFH-NEXT:    vmv.v.v v8, v10
1808; ZVFH-NEXT:    ret
1809;
1810; ZVFHMIN-LABEL: vfma_vv_nxv8f16:
1811; ZVFHMIN:       # %bb.0:
1812; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
1813; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v12, v0.t
1814; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v8, v0.t
1815; ZVFHMIN-NEXT:    vfwcvt.f.f.v v20, v10, v0.t
1816; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m4, ta, ma
1817; ZVFHMIN-NEXT:    vfmadd.vv v20, v12, v16, v0.t
1818; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m2, ta, ma
1819; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v20, v0.t
1820; ZVFHMIN-NEXT:    ret
1821  %v = call <vscale x 8 x half> @llvm.vp.fma.nxv8f16(<vscale x 8 x half> %va, <vscale x 8 x half> %b, <vscale x 8 x half> %c, <vscale x 8 x i1> %m, i32 %evl)
1822  ret <vscale x 8 x half> %v
1823}
1824
1825define <vscale x 8 x half> @vfma_vv_nxv8f16_unmasked(<vscale x 8 x half> %va, <vscale x 8 x half> %b, <vscale x 8 x half> %c, i32 zeroext %evl) {
1826; ZVFH-LABEL: vfma_vv_nxv8f16_unmasked:
1827; ZVFH:       # %bb.0:
1828; ZVFH-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
1829; ZVFH-NEXT:    vfmadd.vv v8, v10, v12
1830; ZVFH-NEXT:    ret
1831;
1832; ZVFHMIN-LABEL: vfma_vv_nxv8f16_unmasked:
1833; ZVFHMIN:       # %bb.0:
1834; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
1835; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v12
1836; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v8
1837; ZVFHMIN-NEXT:    vfwcvt.f.f.v v20, v10
1838; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m4, ta, ma
1839; ZVFHMIN-NEXT:    vfmadd.vv v20, v12, v16
1840; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m2, ta, ma
1841; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v20
1842; ZVFHMIN-NEXT:    ret
1843  %v = call <vscale x 8 x half> @llvm.vp.fma.nxv8f16(<vscale x 8 x half> %va, <vscale x 8 x half> %b, <vscale x 8 x half> %c, <vscale x 8 x i1> splat (i1 true), i32 %evl)
1844  ret <vscale x 8 x half> %v
1845}
1846
1847define <vscale x 8 x half> @vfma_vf_nxv8f16(<vscale x 8 x half> %va, half %b, <vscale x 8 x half> %vc, <vscale x 8 x i1> %m, i32 zeroext %evl) {
1848; ZVFH-LABEL: vfma_vf_nxv8f16:
1849; ZVFH:       # %bb.0:
1850; ZVFH-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
1851; ZVFH-NEXT:    vfmadd.vf v8, fa0, v10, v0.t
1852; ZVFH-NEXT:    ret
1853;
1854; ZVFHMIN-LABEL: vfma_vf_nxv8f16:
1855; ZVFHMIN:       # %bb.0:
1856; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
1857; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
1858; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v10, v0.t
1859; ZVFHMIN-NEXT:    vmv.v.x v10, a1
1860; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v8, v0.t
1861; ZVFHMIN-NEXT:    vfwcvt.f.f.v v20, v10, v0.t
1862; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m4, ta, ma
1863; ZVFHMIN-NEXT:    vfmadd.vv v20, v16, v12, v0.t
1864; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m2, ta, ma
1865; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v20, v0.t
1866; ZVFHMIN-NEXT:    ret
1867  %elt.head = insertelement <vscale x 8 x half> poison, half %b, i32 0
1868  %vb = shufflevector <vscale x 8 x half> %elt.head, <vscale x 8 x half> poison, <vscale x 8 x i32> zeroinitializer
1869  %v = call <vscale x 8 x half> @llvm.vp.fma.nxv8f16(<vscale x 8 x half> %va, <vscale x 8 x half> %vb, <vscale x 8 x half> %vc, <vscale x 8 x i1> %m, i32 %evl)
1870  ret <vscale x 8 x half> %v
1871}
1872
1873define <vscale x 8 x half> @vfma_vf_nxv8f16_commute(<vscale x 8 x half> %va, half %b, <vscale x 8 x half> %vc, <vscale x 8 x i1> %m, i32 zeroext %evl) {
1874; ZVFH-LABEL: vfma_vf_nxv8f16_commute:
1875; ZVFH:       # %bb.0:
1876; ZVFH-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
1877; ZVFH-NEXT:    vfmadd.vf v8, fa0, v10, v0.t
1878; ZVFH-NEXT:    ret
1879;
1880; ZVFHMIN-LABEL: vfma_vf_nxv8f16_commute:
1881; ZVFHMIN:       # %bb.0:
1882; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
1883; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
1884; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v10, v0.t
1885; ZVFHMIN-NEXT:    vmv.v.x v10, a1
1886; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v8, v0.t
1887; ZVFHMIN-NEXT:    vfwcvt.f.f.v v20, v10, v0.t
1888; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m4, ta, ma
1889; ZVFHMIN-NEXT:    vfmadd.vv v16, v20, v12, v0.t
1890; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m2, ta, ma
1891; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v16, v0.t
1892; ZVFHMIN-NEXT:    ret
1893  %elt.head = insertelement <vscale x 8 x half> poison, half %b, i32 0
1894  %vb = shufflevector <vscale x 8 x half> %elt.head, <vscale x 8 x half> poison, <vscale x 8 x i32> zeroinitializer
1895  %v = call <vscale x 8 x half> @llvm.vp.fma.nxv8f16(<vscale x 8 x half> %vb, <vscale x 8 x half> %va, <vscale x 8 x half> %vc, <vscale x 8 x i1> %m, i32 %evl)
1896  ret <vscale x 8 x half> %v
1897}
1898
1899define <vscale x 8 x half> @vfma_vf_nxv8f16_unmasked(<vscale x 8 x half> %va, half %b, <vscale x 8 x half> %vc, i32 zeroext %evl) {
1900; ZVFH-LABEL: vfma_vf_nxv8f16_unmasked:
1901; ZVFH:       # %bb.0:
1902; ZVFH-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
1903; ZVFH-NEXT:    vfmadd.vf v8, fa0, v10
1904; ZVFH-NEXT:    ret
1905;
1906; ZVFHMIN-LABEL: vfma_vf_nxv8f16_unmasked:
1907; ZVFHMIN:       # %bb.0:
1908; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
1909; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
1910; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v10
1911; ZVFHMIN-NEXT:    vmv.v.x v10, a1
1912; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v8
1913; ZVFHMIN-NEXT:    vfwcvt.f.f.v v20, v10
1914; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m4, ta, ma
1915; ZVFHMIN-NEXT:    vfmadd.vv v20, v16, v12
1916; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m2, ta, ma
1917; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v20
1918; ZVFHMIN-NEXT:    ret
1919  %elt.head = insertelement <vscale x 8 x half> poison, half %b, i32 0
1920  %vb = shufflevector <vscale x 8 x half> %elt.head, <vscale x 8 x half> poison, <vscale x 8 x i32> zeroinitializer
1921  %v = call <vscale x 8 x half> @llvm.vp.fma.nxv8f16(<vscale x 8 x half> %va, <vscale x 8 x half> %vb, <vscale x 8 x half> %vc, <vscale x 8 x i1> splat (i1 true), i32 %evl)
1922  ret <vscale x 8 x half> %v
1923}
1924
1925define <vscale x 8 x half> @vfma_vf_nxv8f16_unmasked_commute(<vscale x 8 x half> %va, half %b, <vscale x 8 x half> %vc, i32 zeroext %evl) {
1926; ZVFH-LABEL: vfma_vf_nxv8f16_unmasked_commute:
1927; ZVFH:       # %bb.0:
1928; ZVFH-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
1929; ZVFH-NEXT:    vfmadd.vf v8, fa0, v10
1930; ZVFH-NEXT:    ret
1931;
1932; ZVFHMIN-LABEL: vfma_vf_nxv8f16_unmasked_commute:
1933; ZVFHMIN:       # %bb.0:
1934; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
1935; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
1936; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v10
1937; ZVFHMIN-NEXT:    vmv.v.x v10, a1
1938; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v8
1939; ZVFHMIN-NEXT:    vfwcvt.f.f.v v20, v10
1940; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m4, ta, ma
1941; ZVFHMIN-NEXT:    vfmadd.vv v20, v16, v12
1942; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m2, ta, ma
1943; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v20
1944; ZVFHMIN-NEXT:    ret
1945  %elt.head = insertelement <vscale x 8 x half> poison, half %b, i32 0
1946  %vb = shufflevector <vscale x 8 x half> %elt.head, <vscale x 8 x half> poison, <vscale x 8 x i32> zeroinitializer
1947  %v = call <vscale x 8 x half> @llvm.vp.fma.nxv8f16(<vscale x 8 x half> %vb, <vscale x 8 x half> %va, <vscale x 8 x half> %vc, <vscale x 8 x i1> splat (i1 true), i32 %evl)
1948  ret <vscale x 8 x half> %v
1949}
1950
1951declare <vscale x 16 x half> @llvm.vp.fma.nxv16f16(<vscale x 16 x half>, <vscale x 16 x half>, <vscale x 16 x half>, <vscale x 16 x i1>, i32)
1952
1953define <vscale x 16 x half> @vfma_vv_nxv16f16(<vscale x 16 x half> %va, <vscale x 16 x half> %b, <vscale x 16 x half> %c, <vscale x 16 x i1> %m, i32 zeroext %evl) {
1954; ZVFH-LABEL: vfma_vv_nxv16f16:
1955; ZVFH:       # %bb.0:
1956; ZVFH-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
1957; ZVFH-NEXT:    vfmadd.vv v12, v8, v16, v0.t
1958; ZVFH-NEXT:    vmv.v.v v8, v12
1959; ZVFH-NEXT:    ret
1960;
1961; ZVFHMIN-LABEL: vfma_vv_nxv16f16:
1962; ZVFHMIN:       # %bb.0:
1963; ZVFHMIN-NEXT:    addi sp, sp, -16
1964; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 16
1965; ZVFHMIN-NEXT:    csrr a1, vlenb
1966; ZVFHMIN-NEXT:    slli a1, a1, 3
1967; ZVFHMIN-NEXT:    sub sp, sp, a1
1968; ZVFHMIN-NEXT:    .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x08, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 8 * vlenb
1969; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
1970; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v16, v0.t
1971; ZVFHMIN-NEXT:    addi a0, sp, 16
1972; ZVFHMIN-NEXT:    vs8r.v v24, (a0) # Unknown-size Folded Spill
1973; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v8, v0.t
1974; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v12, v0.t
1975; ZVFHMIN-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
1976; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
1977; ZVFHMIN-NEXT:    vfmadd.vv v16, v24, v8, v0.t
1978; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
1979; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v16, v0.t
1980; ZVFHMIN-NEXT:    csrr a0, vlenb
1981; ZVFHMIN-NEXT:    slli a0, a0, 3
1982; ZVFHMIN-NEXT:    add sp, sp, a0
1983; ZVFHMIN-NEXT:    .cfi_def_cfa sp, 16
1984; ZVFHMIN-NEXT:    addi sp, sp, 16
1985; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 0
1986; ZVFHMIN-NEXT:    ret
1987  %v = call <vscale x 16 x half> @llvm.vp.fma.nxv16f16(<vscale x 16 x half> %va, <vscale x 16 x half> %b, <vscale x 16 x half> %c, <vscale x 16 x i1> %m, i32 %evl)
1988  ret <vscale x 16 x half> %v
1989}
1990
1991define <vscale x 16 x half> @vfma_vv_nxv16f16_unmasked(<vscale x 16 x half> %va, <vscale x 16 x half> %b, <vscale x 16 x half> %c, i32 zeroext %evl) {
1992; ZVFH-LABEL: vfma_vv_nxv16f16_unmasked:
1993; ZVFH:       # %bb.0:
1994; ZVFH-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
1995; ZVFH-NEXT:    vfmadd.vv v8, v12, v16
1996; ZVFH-NEXT:    ret
1997;
1998; ZVFHMIN-LABEL: vfma_vv_nxv16f16_unmasked:
1999; ZVFHMIN:       # %bb.0:
2000; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
2001; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v16
2002; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v8
2003; ZVFHMIN-NEXT:    vfwcvt.f.f.v v0, v12
2004; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
2005; ZVFHMIN-NEXT:    vfmadd.vv v0, v16, v24
2006; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
2007; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v0
2008; ZVFHMIN-NEXT:    ret
2009  %v = call <vscale x 16 x half> @llvm.vp.fma.nxv16f16(<vscale x 16 x half> %va, <vscale x 16 x half> %b, <vscale x 16 x half> %c, <vscale x 16 x i1> splat (i1 true), i32 %evl)
2010  ret <vscale x 16 x half> %v
2011}
2012
2013define <vscale x 16 x half> @vfma_vf_nxv16f16(<vscale x 16 x half> %va, half %b, <vscale x 16 x half> %vc, <vscale x 16 x i1> %m, i32 zeroext %evl) {
2014; ZVFH-LABEL: vfma_vf_nxv16f16:
2015; ZVFH:       # %bb.0:
2016; ZVFH-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
2017; ZVFH-NEXT:    vfmadd.vf v8, fa0, v12, v0.t
2018; ZVFH-NEXT:    ret
2019;
2020; ZVFHMIN-LABEL: vfma_vf_nxv16f16:
2021; ZVFHMIN:       # %bb.0:
2022; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
2023; ZVFHMIN-NEXT:    vmv4r.v v16, v8
2024; ZVFHMIN-NEXT:    fmv.x.h a0, fa0
2025; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v12, v0.t
2026; ZVFHMIN-NEXT:    vmv8r.v v8, v24
2027; ZVFHMIN-NEXT:    vmv.v.x v4, a0
2028; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v16, v0.t
2029; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v4, v0.t
2030; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
2031; ZVFHMIN-NEXT:    vfmadd.vv v16, v24, v8, v0.t
2032; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
2033; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v16, v0.t
2034; ZVFHMIN-NEXT:    ret
2035  %elt.head = insertelement <vscale x 16 x half> poison, half %b, i32 0
2036  %vb = shufflevector <vscale x 16 x half> %elt.head, <vscale x 16 x half> poison, <vscale x 16 x i32> zeroinitializer
2037  %v = call <vscale x 16 x half> @llvm.vp.fma.nxv16f16(<vscale x 16 x half> %va, <vscale x 16 x half> %vb, <vscale x 16 x half> %vc, <vscale x 16 x i1> %m, i32 %evl)
2038  ret <vscale x 16 x half> %v
2039}
2040
2041define <vscale x 16 x half> @vfma_vf_nxv16f16_commute(<vscale x 16 x half> %va, half %b, <vscale x 16 x half> %vc, <vscale x 16 x i1> %m, i32 zeroext %evl) {
2042; ZVFH-LABEL: vfma_vf_nxv16f16_commute:
2043; ZVFH:       # %bb.0:
2044; ZVFH-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
2045; ZVFH-NEXT:    vfmadd.vf v8, fa0, v12, v0.t
2046; ZVFH-NEXT:    ret
2047;
2048; ZVFHMIN-LABEL: vfma_vf_nxv16f16_commute:
2049; ZVFHMIN:       # %bb.0:
2050; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
2051; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
2052; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v12, v0.t
2053; ZVFHMIN-NEXT:    vmv.v.x v4, a1
2054; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v8, v0.t
2055; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v4, v0.t
2056; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
2057; ZVFHMIN-NEXT:    vfmadd.vv v24, v8, v16, v0.t
2058; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
2059; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v24, v0.t
2060; ZVFHMIN-NEXT:    ret
2061  %elt.head = insertelement <vscale x 16 x half> poison, half %b, i32 0
2062  %vb = shufflevector <vscale x 16 x half> %elt.head, <vscale x 16 x half> poison, <vscale x 16 x i32> zeroinitializer
2063  %v = call <vscale x 16 x half> @llvm.vp.fma.nxv16f16(<vscale x 16 x half> %vb, <vscale x 16 x half> %va, <vscale x 16 x half> %vc, <vscale x 16 x i1> %m, i32 %evl)
2064  ret <vscale x 16 x half> %v
2065}
2066
2067define <vscale x 16 x half> @vfma_vf_nxv16f16_unmasked(<vscale x 16 x half> %va, half %b, <vscale x 16 x half> %vc, i32 zeroext %evl) {
2068; ZVFH-LABEL: vfma_vf_nxv16f16_unmasked:
2069; ZVFH:       # %bb.0:
2070; ZVFH-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
2071; ZVFH-NEXT:    vfmadd.vf v8, fa0, v12
2072; ZVFH-NEXT:    ret
2073;
2074; ZVFHMIN-LABEL: vfma_vf_nxv16f16_unmasked:
2075; ZVFHMIN:       # %bb.0:
2076; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
2077; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
2078; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v12
2079; ZVFHMIN-NEXT:    vmv.v.x v12, a1
2080; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v8
2081; ZVFHMIN-NEXT:    vfwcvt.f.f.v v0, v12
2082; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
2083; ZVFHMIN-NEXT:    vfmadd.vv v0, v24, v16
2084; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
2085; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v0
2086; ZVFHMIN-NEXT:    ret
2087  %elt.head = insertelement <vscale x 16 x half> poison, half %b, i32 0
2088  %vb = shufflevector <vscale x 16 x half> %elt.head, <vscale x 16 x half> poison, <vscale x 16 x i32> zeroinitializer
2089  %v = call <vscale x 16 x half> @llvm.vp.fma.nxv16f16(<vscale x 16 x half> %va, <vscale x 16 x half> %vb, <vscale x 16 x half> %vc, <vscale x 16 x i1> splat (i1 true), i32 %evl)
2090  ret <vscale x 16 x half> %v
2091}
2092
2093define <vscale x 16 x half> @vfma_vf_nxv16f16_unmasked_commute(<vscale x 16 x half> %va, half %b, <vscale x 16 x half> %vc, i32 zeroext %evl) {
2094; ZVFH-LABEL: vfma_vf_nxv16f16_unmasked_commute:
2095; ZVFH:       # %bb.0:
2096; ZVFH-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
2097; ZVFH-NEXT:    vfmadd.vf v8, fa0, v12
2098; ZVFH-NEXT:    ret
2099;
2100; ZVFHMIN-LABEL: vfma_vf_nxv16f16_unmasked_commute:
2101; ZVFHMIN:       # %bb.0:
2102; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
2103; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
2104; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v12
2105; ZVFHMIN-NEXT:    vmv.v.x v12, a1
2106; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v8
2107; ZVFHMIN-NEXT:    vfwcvt.f.f.v v0, v12
2108; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
2109; ZVFHMIN-NEXT:    vfmadd.vv v0, v24, v16
2110; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
2111; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v0
2112; ZVFHMIN-NEXT:    ret
2113  %elt.head = insertelement <vscale x 16 x half> poison, half %b, i32 0
2114  %vb = shufflevector <vscale x 16 x half> %elt.head, <vscale x 16 x half> poison, <vscale x 16 x i32> zeroinitializer
2115  %v = call <vscale x 16 x half> @llvm.vp.fma.nxv16f16(<vscale x 16 x half> %vb, <vscale x 16 x half> %va, <vscale x 16 x half> %vc, <vscale x 16 x i1> splat (i1 true), i32 %evl)
2116  ret <vscale x 16 x half> %v
2117}
2118
2119declare <vscale x 32 x half> @llvm.vp.fma.nxv32f16(<vscale x 32 x half>, <vscale x 32 x half>, <vscale x 32 x half>, <vscale x 32 x i1>, i32)
2120
2121define <vscale x 32 x half> @vfma_vv_nxv32f16(<vscale x 32 x half> %va, <vscale x 32 x half> %b, <vscale x 32 x half> %c, <vscale x 32 x i1> %m, i32 zeroext %evl) {
2122; ZVFH-LABEL: vfma_vv_nxv32f16:
2123; ZVFH:       # %bb.0:
2124; ZVFH-NEXT:    vl8re16.v v24, (a0)
2125; ZVFH-NEXT:    vsetvli zero, a1, e16, m8, ta, ma
2126; ZVFH-NEXT:    vfmadd.vv v16, v8, v24, v0.t
2127; ZVFH-NEXT:    vmv.v.v v8, v16
2128; ZVFH-NEXT:    ret
2129;
2130; ZVFHMIN-LABEL: vfma_vv_nxv32f16:
2131; ZVFHMIN:       # %bb.0:
2132; ZVFHMIN-NEXT:    addi sp, sp, -16
2133; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 16
2134; ZVFHMIN-NEXT:    csrr a2, vlenb
2135; ZVFHMIN-NEXT:    slli a2, a2, 3
2136; ZVFHMIN-NEXT:    mv a3, a2
2137; ZVFHMIN-NEXT:    slli a2, a2, 2
2138; ZVFHMIN-NEXT:    add a2, a2, a3
2139; ZVFHMIN-NEXT:    sub sp, sp, a2
2140; ZVFHMIN-NEXT:    .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x28, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 40 * vlenb
2141; ZVFHMIN-NEXT:    vsetvli a2, zero, e8, mf2, ta, ma
2142; ZVFHMIN-NEXT:    vmv1r.v v7, v0
2143; ZVFHMIN-NEXT:    csrr a2, vlenb
2144; ZVFHMIN-NEXT:    slli a2, a2, 5
2145; ZVFHMIN-NEXT:    add a2, sp, a2
2146; ZVFHMIN-NEXT:    addi a2, a2, 16
2147; ZVFHMIN-NEXT:    vs8r.v v16, (a2) # Unknown-size Folded Spill
2148; ZVFHMIN-NEXT:    vmv8r.v v24, v8
2149; ZVFHMIN-NEXT:    vl8re16.v v8, (a0)
2150; ZVFHMIN-NEXT:    csrr a2, vlenb
2151; ZVFHMIN-NEXT:    slli a0, a2, 1
2152; ZVFHMIN-NEXT:    srli a2, a2, 2
2153; ZVFHMIN-NEXT:    sub a3, a1, a0
2154; ZVFHMIN-NEXT:    vslidedown.vx v0, v0, a2
2155; ZVFHMIN-NEXT:    sltu a2, a1, a3
2156; ZVFHMIN-NEXT:    addi a2, a2, -1
2157; ZVFHMIN-NEXT:    and a2, a2, a3
2158; ZVFHMIN-NEXT:    csrr a3, vlenb
2159; ZVFHMIN-NEXT:    slli a3, a3, 4
2160; ZVFHMIN-NEXT:    add a3, sp, a3
2161; ZVFHMIN-NEXT:    addi a3, a3, 16
2162; ZVFHMIN-NEXT:    vs8r.v v8, (a3) # Unknown-size Folded Spill
2163; ZVFHMIN-NEXT:    vsetvli zero, a2, e16, m4, ta, ma
2164; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v12, v0.t
2165; ZVFHMIN-NEXT:    csrr a2, vlenb
2166; ZVFHMIN-NEXT:    slli a2, a2, 3
2167; ZVFHMIN-NEXT:    add a2, sp, a2
2168; ZVFHMIN-NEXT:    addi a2, a2, 16
2169; ZVFHMIN-NEXT:    vs8r.v v16, (a2) # Unknown-size Folded Spill
2170; ZVFHMIN-NEXT:    csrr a2, vlenb
2171; ZVFHMIN-NEXT:    slli a2, a2, 3
2172; ZVFHMIN-NEXT:    mv a3, a2
2173; ZVFHMIN-NEXT:    slli a2, a2, 1
2174; ZVFHMIN-NEXT:    add a2, a2, a3
2175; ZVFHMIN-NEXT:    add a2, sp, a2
2176; ZVFHMIN-NEXT:    addi a2, a2, 16
2177; ZVFHMIN-NEXT:    vs8r.v v24, (a2) # Unknown-size Folded Spill
2178; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v28, v0.t
2179; ZVFHMIN-NEXT:    csrr a2, vlenb
2180; ZVFHMIN-NEXT:    slli a2, a2, 5
2181; ZVFHMIN-NEXT:    add a2, sp, a2
2182; ZVFHMIN-NEXT:    addi a2, a2, 16
2183; ZVFHMIN-NEXT:    vl8r.v v8, (a2) # Unknown-size Folded Reload
2184; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v12, v0.t
2185; ZVFHMIN-NEXT:    csrr a2, vlenb
2186; ZVFHMIN-NEXT:    slli a2, a2, 3
2187; ZVFHMIN-NEXT:    add a2, sp, a2
2188; ZVFHMIN-NEXT:    addi a2, a2, 16
2189; ZVFHMIN-NEXT:    vl8r.v v8, (a2) # Unknown-size Folded Reload
2190; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
2191; ZVFHMIN-NEXT:    vfmadd.vv v24, v16, v8, v0.t
2192; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
2193; ZVFHMIN-NEXT:    vfncvt.f.f.w v12, v24, v0.t
2194; ZVFHMIN-NEXT:    addi a2, sp, 16
2195; ZVFHMIN-NEXT:    vs8r.v v8, (a2) # Unknown-size Folded Spill
2196; ZVFHMIN-NEXT:    bltu a1, a0, .LBB66_2
2197; ZVFHMIN-NEXT:  # %bb.1:
2198; ZVFHMIN-NEXT:    mv a1, a0
2199; ZVFHMIN-NEXT:  .LBB66_2:
2200; ZVFHMIN-NEXT:    vmv1r.v v0, v7
2201; ZVFHMIN-NEXT:    csrr a0, vlenb
2202; ZVFHMIN-NEXT:    slli a0, a0, 4
2203; ZVFHMIN-NEXT:    add a0, sp, a0
2204; ZVFHMIN-NEXT:    addi a0, a0, 16
2205; ZVFHMIN-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
2206; ZVFHMIN-NEXT:    vsetvli zero, a1, e16, m4, ta, ma
2207; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v8, v0.t
2208; ZVFHMIN-NEXT:    csrr a0, vlenb
2209; ZVFHMIN-NEXT:    slli a0, a0, 3
2210; ZVFHMIN-NEXT:    add a0, sp, a0
2211; ZVFHMIN-NEXT:    addi a0, a0, 16
2212; ZVFHMIN-NEXT:    vs8r.v v24, (a0) # Unknown-size Folded Spill
2213; ZVFHMIN-NEXT:    csrr a0, vlenb
2214; ZVFHMIN-NEXT:    slli a0, a0, 3
2215; ZVFHMIN-NEXT:    mv a1, a0
2216; ZVFHMIN-NEXT:    slli a0, a0, 1
2217; ZVFHMIN-NEXT:    add a0, a0, a1
2218; ZVFHMIN-NEXT:    add a0, sp, a0
2219; ZVFHMIN-NEXT:    addi a0, a0, 16
2220; ZVFHMIN-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
2221; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v8, v0.t
2222; ZVFHMIN-NEXT:    csrr a0, vlenb
2223; ZVFHMIN-NEXT:    slli a0, a0, 4
2224; ZVFHMIN-NEXT:    add a0, sp, a0
2225; ZVFHMIN-NEXT:    addi a0, a0, 16
2226; ZVFHMIN-NEXT:    vs8r.v v16, (a0) # Unknown-size Folded Spill
2227; ZVFHMIN-NEXT:    csrr a0, vlenb
2228; ZVFHMIN-NEXT:    slli a0, a0, 5
2229; ZVFHMIN-NEXT:    add a0, sp, a0
2230; ZVFHMIN-NEXT:    addi a0, a0, 16
2231; ZVFHMIN-NEXT:    vl8r.v v24, (a0) # Unknown-size Folded Reload
2232; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v24, v0.t
2233; ZVFHMIN-NEXT:    csrr a0, vlenb
2234; ZVFHMIN-NEXT:    slli a0, a0, 3
2235; ZVFHMIN-NEXT:    add a0, sp, a0
2236; ZVFHMIN-NEXT:    addi a0, a0, 16
2237; ZVFHMIN-NEXT:    vl8r.v v24, (a0) # Unknown-size Folded Reload
2238; ZVFHMIN-NEXT:    csrr a0, vlenb
2239; ZVFHMIN-NEXT:    slli a0, a0, 4
2240; ZVFHMIN-NEXT:    add a0, sp, a0
2241; ZVFHMIN-NEXT:    addi a0, a0, 16
2242; ZVFHMIN-NEXT:    vl8r.v v16, (a0) # Unknown-size Folded Reload
2243; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
2244; ZVFHMIN-NEXT:    vfmadd.vv v8, v16, v24, v0.t
2245; ZVFHMIN-NEXT:    vmv.v.v v16, v8
2246; ZVFHMIN-NEXT:    addi a0, sp, 16
2247; ZVFHMIN-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
2248; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
2249; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v16, v0.t
2250; ZVFHMIN-NEXT:    csrr a0, vlenb
2251; ZVFHMIN-NEXT:    slli a0, a0, 3
2252; ZVFHMIN-NEXT:    mv a1, a0
2253; ZVFHMIN-NEXT:    slli a0, a0, 2
2254; ZVFHMIN-NEXT:    add a0, a0, a1
2255; ZVFHMIN-NEXT:    add sp, sp, a0
2256; ZVFHMIN-NEXT:    .cfi_def_cfa sp, 16
2257; ZVFHMIN-NEXT:    addi sp, sp, 16
2258; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 0
2259; ZVFHMIN-NEXT:    ret
2260  %v = call <vscale x 32 x half> @llvm.vp.fma.nxv32f16(<vscale x 32 x half> %va, <vscale x 32 x half> %b, <vscale x 32 x half> %c, <vscale x 32 x i1> %m, i32 %evl)
2261  ret <vscale x 32 x half> %v
2262}
2263
2264define <vscale x 32 x half> @vfma_vv_nxv32f16_unmasked(<vscale x 32 x half> %va, <vscale x 32 x half> %b, <vscale x 32 x half> %c, i32 zeroext %evl) {
2265; ZVFH-LABEL: vfma_vv_nxv32f16_unmasked:
2266; ZVFH:       # %bb.0:
2267; ZVFH-NEXT:    vl8re16.v v24, (a0)
2268; ZVFH-NEXT:    vsetvli zero, a1, e16, m8, ta, ma
2269; ZVFH-NEXT:    vfmadd.vv v8, v16, v24
2270; ZVFH-NEXT:    ret
2271;
2272; ZVFHMIN-LABEL: vfma_vv_nxv32f16_unmasked:
2273; ZVFHMIN:       # %bb.0:
2274; ZVFHMIN-NEXT:    addi sp, sp, -16
2275; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 16
2276; ZVFHMIN-NEXT:    csrr a2, vlenb
2277; ZVFHMIN-NEXT:    slli a2, a2, 5
2278; ZVFHMIN-NEXT:    sub sp, sp, a2
2279; ZVFHMIN-NEXT:    .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 32 * vlenb
2280; ZVFHMIN-NEXT:    csrr a2, vlenb
2281; ZVFHMIN-NEXT:    slli a2, a2, 3
2282; ZVFHMIN-NEXT:    mv a3, a2
2283; ZVFHMIN-NEXT:    slli a2, a2, 1
2284; ZVFHMIN-NEXT:    add a2, a2, a3
2285; ZVFHMIN-NEXT:    add a2, sp, a2
2286; ZVFHMIN-NEXT:    addi a2, a2, 16
2287; ZVFHMIN-NEXT:    vs8r.v v16, (a2) # Unknown-size Folded Spill
2288; ZVFHMIN-NEXT:    vl8re16.v v16, (a0)
2289; ZVFHMIN-NEXT:    csrr a2, vlenb
2290; ZVFHMIN-NEXT:    vsetvli a0, zero, e8, m4, ta, ma
2291; ZVFHMIN-NEXT:    vmset.m v24
2292; ZVFHMIN-NEXT:    slli a0, a2, 1
2293; ZVFHMIN-NEXT:    srli a2, a2, 2
2294; ZVFHMIN-NEXT:    sub a3, a1, a0
2295; ZVFHMIN-NEXT:    vsetvli a4, zero, e8, mf2, ta, ma
2296; ZVFHMIN-NEXT:    vslidedown.vx v0, v24, a2
2297; ZVFHMIN-NEXT:    sltu a2, a1, a3
2298; ZVFHMIN-NEXT:    addi a2, a2, -1
2299; ZVFHMIN-NEXT:    and a2, a2, a3
2300; ZVFHMIN-NEXT:    csrr a3, vlenb
2301; ZVFHMIN-NEXT:    slli a3, a3, 3
2302; ZVFHMIN-NEXT:    add a3, sp, a3
2303; ZVFHMIN-NEXT:    addi a3, a3, 16
2304; ZVFHMIN-NEXT:    vs8r.v v16, (a3) # Unknown-size Folded Spill
2305; ZVFHMIN-NEXT:    vsetvli zero, a2, e16, m4, ta, ma
2306; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v20, v0.t
2307; ZVFHMIN-NEXT:    addi a2, sp, 16
2308; ZVFHMIN-NEXT:    vs8r.v v24, (a2) # Unknown-size Folded Spill
2309; ZVFHMIN-NEXT:    csrr a2, vlenb
2310; ZVFHMIN-NEXT:    slli a2, a2, 4
2311; ZVFHMIN-NEXT:    add a2, sp, a2
2312; ZVFHMIN-NEXT:    addi a2, a2, 16
2313; ZVFHMIN-NEXT:    vs8r.v v8, (a2) # Unknown-size Folded Spill
2314; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v12, v0.t
2315; ZVFHMIN-NEXT:    csrr a2, vlenb
2316; ZVFHMIN-NEXT:    slli a2, a2, 3
2317; ZVFHMIN-NEXT:    mv a3, a2
2318; ZVFHMIN-NEXT:    slli a2, a2, 1
2319; ZVFHMIN-NEXT:    add a2, a2, a3
2320; ZVFHMIN-NEXT:    add a2, sp, a2
2321; ZVFHMIN-NEXT:    addi a2, a2, 16
2322; ZVFHMIN-NEXT:    vl8r.v v16, (a2) # Unknown-size Folded Reload
2323; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v20, v0.t
2324; ZVFHMIN-NEXT:    addi a2, sp, 16
2325; ZVFHMIN-NEXT:    vl8r.v v16, (a2) # Unknown-size Folded Reload
2326; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
2327; ZVFHMIN-NEXT:    vfmadd.vv v8, v24, v16, v0.t
2328; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
2329; ZVFHMIN-NEXT:    vfncvt.f.f.w v20, v8, v0.t
2330; ZVFHMIN-NEXT:    bltu a1, a0, .LBB67_2
2331; ZVFHMIN-NEXT:  # %bb.1:
2332; ZVFHMIN-NEXT:    mv a1, a0
2333; ZVFHMIN-NEXT:  .LBB67_2:
2334; ZVFHMIN-NEXT:    csrr a0, vlenb
2335; ZVFHMIN-NEXT:    slli a0, a0, 3
2336; ZVFHMIN-NEXT:    add a0, sp, a0
2337; ZVFHMIN-NEXT:    addi a0, a0, 16
2338; ZVFHMIN-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
2339; ZVFHMIN-NEXT:    vsetvli zero, a1, e16, m4, ta, ma
2340; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v8
2341; ZVFHMIN-NEXT:    addi a0, sp, 16
2342; ZVFHMIN-NEXT:    vs8r.v v24, (a0) # Unknown-size Folded Spill
2343; ZVFHMIN-NEXT:    csrr a0, vlenb
2344; ZVFHMIN-NEXT:    slli a0, a0, 4
2345; ZVFHMIN-NEXT:    add a0, sp, a0
2346; ZVFHMIN-NEXT:    addi a0, a0, 16
2347; ZVFHMIN-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
2348; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v8
2349; ZVFHMIN-NEXT:    csrr a0, vlenb
2350; ZVFHMIN-NEXT:    slli a0, a0, 3
2351; ZVFHMIN-NEXT:    mv a1, a0
2352; ZVFHMIN-NEXT:    slli a0, a0, 1
2353; ZVFHMIN-NEXT:    add a0, a0, a1
2354; ZVFHMIN-NEXT:    add a0, sp, a0
2355; ZVFHMIN-NEXT:    addi a0, a0, 16
2356; ZVFHMIN-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
2357; ZVFHMIN-NEXT:    vfwcvt.f.f.v v0, v8
2358; ZVFHMIN-NEXT:    addi a0, sp, 16
2359; ZVFHMIN-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
2360; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
2361; ZVFHMIN-NEXT:    vfmadd.vv v0, v24, v8
2362; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
2363; ZVFHMIN-NEXT:    vfncvt.f.f.w v16, v0
2364; ZVFHMIN-NEXT:    vmv8r.v v8, v16
2365; ZVFHMIN-NEXT:    csrr a0, vlenb
2366; ZVFHMIN-NEXT:    slli a0, a0, 5
2367; ZVFHMIN-NEXT:    add sp, sp, a0
2368; ZVFHMIN-NEXT:    .cfi_def_cfa sp, 16
2369; ZVFHMIN-NEXT:    addi sp, sp, 16
2370; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 0
2371; ZVFHMIN-NEXT:    ret
2372  %v = call <vscale x 32 x half> @llvm.vp.fma.nxv32f16(<vscale x 32 x half> %va, <vscale x 32 x half> %b, <vscale x 32 x half> %c, <vscale x 32 x i1> splat (i1 true), i32 %evl)
2373  ret <vscale x 32 x half> %v
2374}
2375
2376define <vscale x 32 x half> @vfma_vf_nxv32f16(<vscale x 32 x half> %va, half %b, <vscale x 32 x half> %vc, <vscale x 32 x i1> %m, i32 zeroext %evl) {
2377; ZVFH-LABEL: vfma_vf_nxv32f16:
2378; ZVFH:       # %bb.0:
2379; ZVFH-NEXT:    vsetvli zero, a0, e16, m8, ta, ma
2380; ZVFH-NEXT:    vfmadd.vf v8, fa0, v16, v0.t
2381; ZVFH-NEXT:    ret
2382;
2383; ZVFHMIN-LABEL: vfma_vf_nxv32f16:
2384; ZVFHMIN:       # %bb.0:
2385; ZVFHMIN-NEXT:    addi sp, sp, -16
2386; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 16
2387; ZVFHMIN-NEXT:    csrr a1, vlenb
2388; ZVFHMIN-NEXT:    slli a1, a1, 3
2389; ZVFHMIN-NEXT:    mv a2, a1
2390; ZVFHMIN-NEXT:    slli a1, a1, 2
2391; ZVFHMIN-NEXT:    add a1, a1, a2
2392; ZVFHMIN-NEXT:    sub sp, sp, a1
2393; ZVFHMIN-NEXT:    .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x28, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 40 * vlenb
2394; ZVFHMIN-NEXT:    vsetvli a1, zero, e8, mf2, ta, ma
2395; ZVFHMIN-NEXT:    vmv1r.v v7, v0
2396; ZVFHMIN-NEXT:    vmv8r.v v24, v8
2397; ZVFHMIN-NEXT:    fmv.x.h a2, fa0
2398; ZVFHMIN-NEXT:    csrr a3, vlenb
2399; ZVFHMIN-NEXT:    slli a1, a3, 1
2400; ZVFHMIN-NEXT:    srli a3, a3, 2
2401; ZVFHMIN-NEXT:    sub a4, a0, a1
2402; ZVFHMIN-NEXT:    vslidedown.vx v0, v0, a3
2403; ZVFHMIN-NEXT:    sltu a3, a0, a4
2404; ZVFHMIN-NEXT:    addi a3, a3, -1
2405; ZVFHMIN-NEXT:    and a3, a3, a4
2406; ZVFHMIN-NEXT:    csrr a4, vlenb
2407; ZVFHMIN-NEXT:    slli a4, a4, 4
2408; ZVFHMIN-NEXT:    add a4, sp, a4
2409; ZVFHMIN-NEXT:    addi a4, a4, 16
2410; ZVFHMIN-NEXT:    vs8r.v v16, (a4) # Unknown-size Folded Spill
2411; ZVFHMIN-NEXT:    vsetvli zero, a3, e16, m4, ta, ma
2412; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v20, v0.t
2413; ZVFHMIN-NEXT:    csrr a4, vlenb
2414; ZVFHMIN-NEXT:    slli a4, a4, 3
2415; ZVFHMIN-NEXT:    add a4, sp, a4
2416; ZVFHMIN-NEXT:    addi a4, a4, 16
2417; ZVFHMIN-NEXT:    vs8r.v v8, (a4) # Unknown-size Folded Spill
2418; ZVFHMIN-NEXT:    csrr a4, vlenb
2419; ZVFHMIN-NEXT:    slli a4, a4, 3
2420; ZVFHMIN-NEXT:    mv a5, a4
2421; ZVFHMIN-NEXT:    slli a4, a4, 1
2422; ZVFHMIN-NEXT:    add a4, a4, a5
2423; ZVFHMIN-NEXT:    add a4, sp, a4
2424; ZVFHMIN-NEXT:    addi a4, a4, 16
2425; ZVFHMIN-NEXT:    vs8r.v v24, (a4) # Unknown-size Folded Spill
2426; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v28, v0.t
2427; ZVFHMIN-NEXT:    vsetvli a4, zero, e16, m8, ta, ma
2428; ZVFHMIN-NEXT:    vmv.v.x v24, a2
2429; ZVFHMIN-NEXT:    csrr a2, vlenb
2430; ZVFHMIN-NEXT:    slli a2, a2, 5
2431; ZVFHMIN-NEXT:    add a2, sp, a2
2432; ZVFHMIN-NEXT:    addi a2, a2, 16
2433; ZVFHMIN-NEXT:    vs8r.v v24, (a2) # Unknown-size Folded Spill
2434; ZVFHMIN-NEXT:    csrr a2, vlenb
2435; ZVFHMIN-NEXT:    slli a2, a2, 5
2436; ZVFHMIN-NEXT:    add a2, sp, a2
2437; ZVFHMIN-NEXT:    addi a2, a2, 16
2438; ZVFHMIN-NEXT:    vl8r.v v8, (a2) # Unknown-size Folded Reload
2439; ZVFHMIN-NEXT:    vsetvli zero, a3, e16, m4, ta, ma
2440; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v12, v0.t
2441; ZVFHMIN-NEXT:    csrr a2, vlenb
2442; ZVFHMIN-NEXT:    slli a2, a2, 3
2443; ZVFHMIN-NEXT:    add a2, sp, a2
2444; ZVFHMIN-NEXT:    addi a2, a2, 16
2445; ZVFHMIN-NEXT:    vl8r.v v8, (a2) # Unknown-size Folded Reload
2446; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
2447; ZVFHMIN-NEXT:    vfmadd.vv v24, v16, v8, v0.t
2448; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
2449; ZVFHMIN-NEXT:    vfncvt.f.f.w v12, v24, v0.t
2450; ZVFHMIN-NEXT:    addi a2, sp, 16
2451; ZVFHMIN-NEXT:    vs8r.v v8, (a2) # Unknown-size Folded Spill
2452; ZVFHMIN-NEXT:    bltu a0, a1, .LBB68_2
2453; ZVFHMIN-NEXT:  # %bb.1:
2454; ZVFHMIN-NEXT:    mv a0, a1
2455; ZVFHMIN-NEXT:  .LBB68_2:
2456; ZVFHMIN-NEXT:    vmv1r.v v0, v7
2457; ZVFHMIN-NEXT:    csrr a1, vlenb
2458; ZVFHMIN-NEXT:    slli a1, a1, 4
2459; ZVFHMIN-NEXT:    add a1, sp, a1
2460; ZVFHMIN-NEXT:    addi a1, a1, 16
2461; ZVFHMIN-NEXT:    vl8r.v v8, (a1) # Unknown-size Folded Reload
2462; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
2463; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v8, v0.t
2464; ZVFHMIN-NEXT:    csrr a0, vlenb
2465; ZVFHMIN-NEXT:    slli a0, a0, 3
2466; ZVFHMIN-NEXT:    add a0, sp, a0
2467; ZVFHMIN-NEXT:    addi a0, a0, 16
2468; ZVFHMIN-NEXT:    vs8r.v v24, (a0) # Unknown-size Folded Spill
2469; ZVFHMIN-NEXT:    csrr a0, vlenb
2470; ZVFHMIN-NEXT:    slli a0, a0, 3
2471; ZVFHMIN-NEXT:    mv a1, a0
2472; ZVFHMIN-NEXT:    slli a0, a0, 1
2473; ZVFHMIN-NEXT:    add a0, a0, a1
2474; ZVFHMIN-NEXT:    add a0, sp, a0
2475; ZVFHMIN-NEXT:    addi a0, a0, 16
2476; ZVFHMIN-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
2477; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v8, v0.t
2478; ZVFHMIN-NEXT:    csrr a0, vlenb
2479; ZVFHMIN-NEXT:    slli a0, a0, 4
2480; ZVFHMIN-NEXT:    add a0, sp, a0
2481; ZVFHMIN-NEXT:    addi a0, a0, 16
2482; ZVFHMIN-NEXT:    vs8r.v v16, (a0) # Unknown-size Folded Spill
2483; ZVFHMIN-NEXT:    csrr a0, vlenb
2484; ZVFHMIN-NEXT:    slli a0, a0, 5
2485; ZVFHMIN-NEXT:    add a0, sp, a0
2486; ZVFHMIN-NEXT:    addi a0, a0, 16
2487; ZVFHMIN-NEXT:    vl8r.v v24, (a0) # Unknown-size Folded Reload
2488; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v24, v0.t
2489; ZVFHMIN-NEXT:    csrr a0, vlenb
2490; ZVFHMIN-NEXT:    slli a0, a0, 3
2491; ZVFHMIN-NEXT:    add a0, sp, a0
2492; ZVFHMIN-NEXT:    addi a0, a0, 16
2493; ZVFHMIN-NEXT:    vl8r.v v24, (a0) # Unknown-size Folded Reload
2494; ZVFHMIN-NEXT:    csrr a0, vlenb
2495; ZVFHMIN-NEXT:    slli a0, a0, 4
2496; ZVFHMIN-NEXT:    add a0, sp, a0
2497; ZVFHMIN-NEXT:    addi a0, a0, 16
2498; ZVFHMIN-NEXT:    vl8r.v v16, (a0) # Unknown-size Folded Reload
2499; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
2500; ZVFHMIN-NEXT:    vfmadd.vv v8, v16, v24, v0.t
2501; ZVFHMIN-NEXT:    vmv.v.v v16, v8
2502; ZVFHMIN-NEXT:    addi a0, sp, 16
2503; ZVFHMIN-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
2504; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
2505; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v16, v0.t
2506; ZVFHMIN-NEXT:    csrr a0, vlenb
2507; ZVFHMIN-NEXT:    slli a0, a0, 3
2508; ZVFHMIN-NEXT:    mv a1, a0
2509; ZVFHMIN-NEXT:    slli a0, a0, 2
2510; ZVFHMIN-NEXT:    add a0, a0, a1
2511; ZVFHMIN-NEXT:    add sp, sp, a0
2512; ZVFHMIN-NEXT:    .cfi_def_cfa sp, 16
2513; ZVFHMIN-NEXT:    addi sp, sp, 16
2514; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 0
2515; ZVFHMIN-NEXT:    ret
2516  %elt.head = insertelement <vscale x 32 x half> poison, half %b, i32 0
2517  %vb = shufflevector <vscale x 32 x half> %elt.head, <vscale x 32 x half> poison, <vscale x 32 x i32> zeroinitializer
2518  %v = call <vscale x 32 x half> @llvm.vp.fma.nxv32f16(<vscale x 32 x half> %va, <vscale x 32 x half> %vb, <vscale x 32 x half> %vc, <vscale x 32 x i1> %m, i32 %evl)
2519  ret <vscale x 32 x half> %v
2520}
2521
2522define <vscale x 32 x half> @vfma_vf_nxv32f16_commute(<vscale x 32 x half> %va, half %b, <vscale x 32 x half> %vc, <vscale x 32 x i1> %m, i32 zeroext %evl) {
2523; ZVFH-LABEL: vfma_vf_nxv32f16_commute:
2524; ZVFH:       # %bb.0:
2525; ZVFH-NEXT:    vsetvli zero, a0, e16, m8, ta, ma
2526; ZVFH-NEXT:    vfmadd.vf v8, fa0, v16, v0.t
2527; ZVFH-NEXT:    ret
2528;
2529; ZVFHMIN-LABEL: vfma_vf_nxv32f16_commute:
2530; ZVFHMIN:       # %bb.0:
2531; ZVFHMIN-NEXT:    addi sp, sp, -16
2532; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 16
2533; ZVFHMIN-NEXT:    csrr a1, vlenb
2534; ZVFHMIN-NEXT:    slli a1, a1, 3
2535; ZVFHMIN-NEXT:    mv a2, a1
2536; ZVFHMIN-NEXT:    slli a1, a1, 2
2537; ZVFHMIN-NEXT:    add a1, a1, a2
2538; ZVFHMIN-NEXT:    sub sp, sp, a1
2539; ZVFHMIN-NEXT:    .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x28, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 40 * vlenb
2540; ZVFHMIN-NEXT:    vsetvli a1, zero, e16, m8, ta, ma
2541; ZVFHMIN-NEXT:    vmv1r.v v7, v0
2542; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
2543; ZVFHMIN-NEXT:    csrr a2, vlenb
2544; ZVFHMIN-NEXT:    vmv.v.x v24, a1
2545; ZVFHMIN-NEXT:    csrr a1, vlenb
2546; ZVFHMIN-NEXT:    slli a1, a1, 5
2547; ZVFHMIN-NEXT:    add a1, sp, a1
2548; ZVFHMIN-NEXT:    addi a1, a1, 16
2549; ZVFHMIN-NEXT:    vs8r.v v24, (a1) # Unknown-size Folded Spill
2550; ZVFHMIN-NEXT:    slli a1, a2, 1
2551; ZVFHMIN-NEXT:    srli a2, a2, 2
2552; ZVFHMIN-NEXT:    sub a3, a0, a1
2553; ZVFHMIN-NEXT:    vsetvli a4, zero, e8, mf2, ta, ma
2554; ZVFHMIN-NEXT:    vslidedown.vx v0, v0, a2
2555; ZVFHMIN-NEXT:    sltu a2, a0, a3
2556; ZVFHMIN-NEXT:    addi a2, a2, -1
2557; ZVFHMIN-NEXT:    and a2, a2, a3
2558; ZVFHMIN-NEXT:    csrr a3, vlenb
2559; ZVFHMIN-NEXT:    slli a3, a3, 4
2560; ZVFHMIN-NEXT:    add a3, sp, a3
2561; ZVFHMIN-NEXT:    addi a3, a3, 16
2562; ZVFHMIN-NEXT:    vs8r.v v16, (a3) # Unknown-size Folded Spill
2563; ZVFHMIN-NEXT:    vsetvli zero, a2, e16, m4, ta, ma
2564; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v20, v0.t
2565; ZVFHMIN-NEXT:    csrr a2, vlenb
2566; ZVFHMIN-NEXT:    slli a2, a2, 3
2567; ZVFHMIN-NEXT:    add a2, sp, a2
2568; ZVFHMIN-NEXT:    addi a2, a2, 16
2569; ZVFHMIN-NEXT:    vs8r.v v24, (a2) # Unknown-size Folded Spill
2570; ZVFHMIN-NEXT:    csrr a2, vlenb
2571; ZVFHMIN-NEXT:    slli a2, a2, 5
2572; ZVFHMIN-NEXT:    add a2, sp, a2
2573; ZVFHMIN-NEXT:    addi a2, a2, 16
2574; ZVFHMIN-NEXT:    vl8r.v v24, (a2) # Unknown-size Folded Reload
2575; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v28, v0.t
2576; ZVFHMIN-NEXT:    vmv4r.v v24, v8
2577; ZVFHMIN-NEXT:    csrr a2, vlenb
2578; ZVFHMIN-NEXT:    slli a2, a2, 3
2579; ZVFHMIN-NEXT:    mv a3, a2
2580; ZVFHMIN-NEXT:    slli a2, a2, 1
2581; ZVFHMIN-NEXT:    add a2, a2, a3
2582; ZVFHMIN-NEXT:    add a2, sp, a2
2583; ZVFHMIN-NEXT:    addi a2, a2, 16
2584; ZVFHMIN-NEXT:    vs8r.v v24, (a2) # Unknown-size Folded Spill
2585; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v12, v0.t
2586; ZVFHMIN-NEXT:    csrr a2, vlenb
2587; ZVFHMIN-NEXT:    slli a2, a2, 3
2588; ZVFHMIN-NEXT:    add a2, sp, a2
2589; ZVFHMIN-NEXT:    addi a2, a2, 16
2590; ZVFHMIN-NEXT:    vl8r.v v8, (a2) # Unknown-size Folded Reload
2591; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
2592; ZVFHMIN-NEXT:    vfmadd.vv v24, v16, v8, v0.t
2593; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
2594; ZVFHMIN-NEXT:    vfncvt.f.f.w v12, v24, v0.t
2595; ZVFHMIN-NEXT:    addi a2, sp, 16
2596; ZVFHMIN-NEXT:    vs8r.v v8, (a2) # Unknown-size Folded Spill
2597; ZVFHMIN-NEXT:    bltu a0, a1, .LBB69_2
2598; ZVFHMIN-NEXT:  # %bb.1:
2599; ZVFHMIN-NEXT:    mv a0, a1
2600; ZVFHMIN-NEXT:  .LBB69_2:
2601; ZVFHMIN-NEXT:    vmv1r.v v0, v7
2602; ZVFHMIN-NEXT:    csrr a1, vlenb
2603; ZVFHMIN-NEXT:    slli a1, a1, 4
2604; ZVFHMIN-NEXT:    add a1, sp, a1
2605; ZVFHMIN-NEXT:    addi a1, a1, 16
2606; ZVFHMIN-NEXT:    vl8r.v v16, (a1) # Unknown-size Folded Reload
2607; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
2608; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v16, v0.t
2609; ZVFHMIN-NEXT:    csrr a0, vlenb
2610; ZVFHMIN-NEXT:    slli a0, a0, 3
2611; ZVFHMIN-NEXT:    add a0, sp, a0
2612; ZVFHMIN-NEXT:    addi a0, a0, 16
2613; ZVFHMIN-NEXT:    vs8r.v v24, (a0) # Unknown-size Folded Spill
2614; ZVFHMIN-NEXT:    csrr a0, vlenb
2615; ZVFHMIN-NEXT:    slli a0, a0, 3
2616; ZVFHMIN-NEXT:    mv a1, a0
2617; ZVFHMIN-NEXT:    slli a0, a0, 1
2618; ZVFHMIN-NEXT:    add a0, a0, a1
2619; ZVFHMIN-NEXT:    add a0, sp, a0
2620; ZVFHMIN-NEXT:    addi a0, a0, 16
2621; ZVFHMIN-NEXT:    vl8r.v v16, (a0) # Unknown-size Folded Reload
2622; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v16, v0.t
2623; ZVFHMIN-NEXT:    csrr a0, vlenb
2624; ZVFHMIN-NEXT:    slli a0, a0, 5
2625; ZVFHMIN-NEXT:    add a0, sp, a0
2626; ZVFHMIN-NEXT:    addi a0, a0, 16
2627; ZVFHMIN-NEXT:    vl8r.v v16, (a0) # Unknown-size Folded Reload
2628; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v16, v0.t
2629; ZVFHMIN-NEXT:    csrr a0, vlenb
2630; ZVFHMIN-NEXT:    slli a0, a0, 3
2631; ZVFHMIN-NEXT:    mv a1, a0
2632; ZVFHMIN-NEXT:    slli a0, a0, 1
2633; ZVFHMIN-NEXT:    add a0, a0, a1
2634; ZVFHMIN-NEXT:    add a0, sp, a0
2635; ZVFHMIN-NEXT:    addi a0, a0, 16
2636; ZVFHMIN-NEXT:    vs8r.v v24, (a0) # Unknown-size Folded Spill
2637; ZVFHMIN-NEXT:    csrr a0, vlenb
2638; ZVFHMIN-NEXT:    slli a0, a0, 3
2639; ZVFHMIN-NEXT:    add a0, sp, a0
2640; ZVFHMIN-NEXT:    addi a0, a0, 16
2641; ZVFHMIN-NEXT:    vl8r.v v16, (a0) # Unknown-size Folded Reload
2642; ZVFHMIN-NEXT:    csrr a0, vlenb
2643; ZVFHMIN-NEXT:    slli a0, a0, 3
2644; ZVFHMIN-NEXT:    mv a1, a0
2645; ZVFHMIN-NEXT:    slli a0, a0, 1
2646; ZVFHMIN-NEXT:    add a0, a0, a1
2647; ZVFHMIN-NEXT:    add a0, sp, a0
2648; ZVFHMIN-NEXT:    addi a0, a0, 16
2649; ZVFHMIN-NEXT:    vl8r.v v24, (a0) # Unknown-size Folded Reload
2650; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
2651; ZVFHMIN-NEXT:    vfmadd.vv v8, v24, v16, v0.t
2652; ZVFHMIN-NEXT:    vmv.v.v v16, v8
2653; ZVFHMIN-NEXT:    addi a0, sp, 16
2654; ZVFHMIN-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
2655; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
2656; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v16, v0.t
2657; ZVFHMIN-NEXT:    csrr a0, vlenb
2658; ZVFHMIN-NEXT:    slli a0, a0, 3
2659; ZVFHMIN-NEXT:    mv a1, a0
2660; ZVFHMIN-NEXT:    slli a0, a0, 2
2661; ZVFHMIN-NEXT:    add a0, a0, a1
2662; ZVFHMIN-NEXT:    add sp, sp, a0
2663; ZVFHMIN-NEXT:    .cfi_def_cfa sp, 16
2664; ZVFHMIN-NEXT:    addi sp, sp, 16
2665; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 0
2666; ZVFHMIN-NEXT:    ret
2667  %elt.head = insertelement <vscale x 32 x half> poison, half %b, i32 0
2668  %vb = shufflevector <vscale x 32 x half> %elt.head, <vscale x 32 x half> poison, <vscale x 32 x i32> zeroinitializer
2669  %v = call <vscale x 32 x half> @llvm.vp.fma.nxv32f16(<vscale x 32 x half> %vb, <vscale x 32 x half> %va, <vscale x 32 x half> %vc, <vscale x 32 x i1> %m, i32 %evl)
2670  ret <vscale x 32 x half> %v
2671}
2672
2673define <vscale x 32 x half> @vfma_vf_nxv32f16_unmasked(<vscale x 32 x half> %va, half %b, <vscale x 32 x half> %vc, i32 zeroext %evl) {
2674; ZVFH-LABEL: vfma_vf_nxv32f16_unmasked:
2675; ZVFH:       # %bb.0:
2676; ZVFH-NEXT:    vsetvli zero, a0, e16, m8, ta, ma
2677; ZVFH-NEXT:    vfmadd.vf v8, fa0, v16
2678; ZVFH-NEXT:    ret
2679;
2680; ZVFHMIN-LABEL: vfma_vf_nxv32f16_unmasked:
2681; ZVFHMIN:       # %bb.0:
2682; ZVFHMIN-NEXT:    addi sp, sp, -16
2683; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 16
2684; ZVFHMIN-NEXT:    csrr a1, vlenb
2685; ZVFHMIN-NEXT:    slli a1, a1, 5
2686; ZVFHMIN-NEXT:    sub sp, sp, a1
2687; ZVFHMIN-NEXT:    .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 32 * vlenb
2688; ZVFHMIN-NEXT:    fmv.x.h a2, fa0
2689; ZVFHMIN-NEXT:    csrr a3, vlenb
2690; ZVFHMIN-NEXT:    vsetvli a1, zero, e8, m4, ta, ma
2691; ZVFHMIN-NEXT:    vmset.m v24
2692; ZVFHMIN-NEXT:    slli a1, a3, 1
2693; ZVFHMIN-NEXT:    srli a3, a3, 2
2694; ZVFHMIN-NEXT:    sub a4, a0, a1
2695; ZVFHMIN-NEXT:    vsetvli a5, zero, e8, mf2, ta, ma
2696; ZVFHMIN-NEXT:    vslidedown.vx v0, v24, a3
2697; ZVFHMIN-NEXT:    sltu a3, a0, a4
2698; ZVFHMIN-NEXT:    addi a3, a3, -1
2699; ZVFHMIN-NEXT:    and a3, a3, a4
2700; ZVFHMIN-NEXT:    csrr a4, vlenb
2701; ZVFHMIN-NEXT:    slli a4, a4, 4
2702; ZVFHMIN-NEXT:    add a4, sp, a4
2703; ZVFHMIN-NEXT:    addi a4, a4, 16
2704; ZVFHMIN-NEXT:    vs8r.v v16, (a4) # Unknown-size Folded Spill
2705; ZVFHMIN-NEXT:    vsetvli zero, a3, e16, m4, ta, ma
2706; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v20, v0.t
2707; ZVFHMIN-NEXT:    addi a4, sp, 16
2708; ZVFHMIN-NEXT:    vs8r.v v24, (a4) # Unknown-size Folded Spill
2709; ZVFHMIN-NEXT:    csrr a4, vlenb
2710; ZVFHMIN-NEXT:    slli a4, a4, 3
2711; ZVFHMIN-NEXT:    add a4, sp, a4
2712; ZVFHMIN-NEXT:    addi a4, a4, 16
2713; ZVFHMIN-NEXT:    vs8r.v v8, (a4) # Unknown-size Folded Spill
2714; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v12, v0.t
2715; ZVFHMIN-NEXT:    vsetvli a4, zero, e16, m8, ta, ma
2716; ZVFHMIN-NEXT:    vmv.v.x v8, a2
2717; ZVFHMIN-NEXT:    csrr a2, vlenb
2718; ZVFHMIN-NEXT:    slli a2, a2, 3
2719; ZVFHMIN-NEXT:    mv a4, a2
2720; ZVFHMIN-NEXT:    slli a2, a2, 1
2721; ZVFHMIN-NEXT:    add a2, a2, a4
2722; ZVFHMIN-NEXT:    add a2, sp, a2
2723; ZVFHMIN-NEXT:    addi a2, a2, 16
2724; ZVFHMIN-NEXT:    vs8r.v v8, (a2) # Unknown-size Folded Spill
2725; ZVFHMIN-NEXT:    csrr a2, vlenb
2726; ZVFHMIN-NEXT:    slli a2, a2, 3
2727; ZVFHMIN-NEXT:    mv a4, a2
2728; ZVFHMIN-NEXT:    slli a2, a2, 1
2729; ZVFHMIN-NEXT:    add a2, a2, a4
2730; ZVFHMIN-NEXT:    add a2, sp, a2
2731; ZVFHMIN-NEXT:    addi a2, a2, 16
2732; ZVFHMIN-NEXT:    vl8r.v v24, (a2) # Unknown-size Folded Reload
2733; ZVFHMIN-NEXT:    vsetvli zero, a3, e16, m4, ta, ma
2734; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v28, v0.t
2735; ZVFHMIN-NEXT:    addi a2, sp, 16
2736; ZVFHMIN-NEXT:    vl8r.v v24, (a2) # Unknown-size Folded Reload
2737; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
2738; ZVFHMIN-NEXT:    vfmadd.vv v8, v16, v24, v0.t
2739; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
2740; ZVFHMIN-NEXT:    vfncvt.f.f.w v20, v8, v0.t
2741; ZVFHMIN-NEXT:    bltu a0, a1, .LBB70_2
2742; ZVFHMIN-NEXT:  # %bb.1:
2743; ZVFHMIN-NEXT:    mv a0, a1
2744; ZVFHMIN-NEXT:  .LBB70_2:
2745; ZVFHMIN-NEXT:    csrr a1, vlenb
2746; ZVFHMIN-NEXT:    slli a1, a1, 4
2747; ZVFHMIN-NEXT:    add a1, sp, a1
2748; ZVFHMIN-NEXT:    addi a1, a1, 16
2749; ZVFHMIN-NEXT:    vl8r.v v24, (a1) # Unknown-size Folded Reload
2750; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
2751; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v24
2752; ZVFHMIN-NEXT:    addi a0, sp, 16
2753; ZVFHMIN-NEXT:    vs8r.v v8, (a0) # Unknown-size Folded Spill
2754; ZVFHMIN-NEXT:    csrr a0, vlenb
2755; ZVFHMIN-NEXT:    slli a0, a0, 3
2756; ZVFHMIN-NEXT:    add a0, sp, a0
2757; ZVFHMIN-NEXT:    addi a0, a0, 16
2758; ZVFHMIN-NEXT:    vl8r.v v0, (a0) # Unknown-size Folded Reload
2759; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v0
2760; ZVFHMIN-NEXT:    csrr a0, vlenb
2761; ZVFHMIN-NEXT:    slli a0, a0, 3
2762; ZVFHMIN-NEXT:    mv a1, a0
2763; ZVFHMIN-NEXT:    slli a0, a0, 1
2764; ZVFHMIN-NEXT:    add a0, a0, a1
2765; ZVFHMIN-NEXT:    add a0, sp, a0
2766; ZVFHMIN-NEXT:    addi a0, a0, 16
2767; ZVFHMIN-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
2768; ZVFHMIN-NEXT:    vfwcvt.f.f.v v0, v8
2769; ZVFHMIN-NEXT:    addi a0, sp, 16
2770; ZVFHMIN-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
2771; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
2772; ZVFHMIN-NEXT:    vfmadd.vv v0, v24, v8
2773; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
2774; ZVFHMIN-NEXT:    vfncvt.f.f.w v16, v0
2775; ZVFHMIN-NEXT:    vmv8r.v v8, v16
2776; ZVFHMIN-NEXT:    csrr a0, vlenb
2777; ZVFHMIN-NEXT:    slli a0, a0, 5
2778; ZVFHMIN-NEXT:    add sp, sp, a0
2779; ZVFHMIN-NEXT:    .cfi_def_cfa sp, 16
2780; ZVFHMIN-NEXT:    addi sp, sp, 16
2781; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 0
2782; ZVFHMIN-NEXT:    ret
2783  %elt.head = insertelement <vscale x 32 x half> poison, half %b, i32 0
2784  %vb = shufflevector <vscale x 32 x half> %elt.head, <vscale x 32 x half> poison, <vscale x 32 x i32> zeroinitializer
2785  %v = call <vscale x 32 x half> @llvm.vp.fma.nxv32f16(<vscale x 32 x half> %va, <vscale x 32 x half> %vb, <vscale x 32 x half> %vc, <vscale x 32 x i1> splat (i1 true), i32 %evl)
2786  ret <vscale x 32 x half> %v
2787}
2788
2789define <vscale x 32 x half> @vfma_vf_nxv32f16_unmasked_commute(<vscale x 32 x half> %va, half %b, <vscale x 32 x half> %vc, i32 zeroext %evl) {
2790; ZVFH-LABEL: vfma_vf_nxv32f16_unmasked_commute:
2791; ZVFH:       # %bb.0:
2792; ZVFH-NEXT:    vsetvli zero, a0, e16, m8, ta, ma
2793; ZVFH-NEXT:    vfmadd.vf v8, fa0, v16
2794; ZVFH-NEXT:    ret
2795;
2796; ZVFHMIN-LABEL: vfma_vf_nxv32f16_unmasked_commute:
2797; ZVFHMIN:       # %bb.0:
2798; ZVFHMIN-NEXT:    addi sp, sp, -16
2799; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 16
2800; ZVFHMIN-NEXT:    csrr a1, vlenb
2801; ZVFHMIN-NEXT:    slli a1, a1, 5
2802; ZVFHMIN-NEXT:    sub sp, sp, a1
2803; ZVFHMIN-NEXT:    .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 32 * vlenb
2804; ZVFHMIN-NEXT:    csrr a1, vlenb
2805; ZVFHMIN-NEXT:    slli a1, a1, 3
2806; ZVFHMIN-NEXT:    mv a2, a1
2807; ZVFHMIN-NEXT:    slli a1, a1, 1
2808; ZVFHMIN-NEXT:    add a1, a1, a2
2809; ZVFHMIN-NEXT:    add a1, sp, a1
2810; ZVFHMIN-NEXT:    addi a1, a1, 16
2811; ZVFHMIN-NEXT:    vs8r.v v8, (a1) # Unknown-size Folded Spill
2812; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
2813; ZVFHMIN-NEXT:    csrr a2, vlenb
2814; ZVFHMIN-NEXT:    vsetvli a3, zero, e16, m8, ta, ma
2815; ZVFHMIN-NEXT:    vmset.m v24
2816; ZVFHMIN-NEXT:    vmv.v.x v8, a1
2817; ZVFHMIN-NEXT:    slli a1, a2, 1
2818; ZVFHMIN-NEXT:    srli a2, a2, 2
2819; ZVFHMIN-NEXT:    sub a3, a0, a1
2820; ZVFHMIN-NEXT:    vsetvli a4, zero, e8, mf2, ta, ma
2821; ZVFHMIN-NEXT:    vslidedown.vx v0, v24, a2
2822; ZVFHMIN-NEXT:    sltu a2, a0, a3
2823; ZVFHMIN-NEXT:    addi a2, a2, -1
2824; ZVFHMIN-NEXT:    and a2, a2, a3
2825; ZVFHMIN-NEXT:    csrr a3, vlenb
2826; ZVFHMIN-NEXT:    slli a3, a3, 4
2827; ZVFHMIN-NEXT:    add a3, sp, a3
2828; ZVFHMIN-NEXT:    addi a3, a3, 16
2829; ZVFHMIN-NEXT:    vs8r.v v16, (a3) # Unknown-size Folded Spill
2830; ZVFHMIN-NEXT:    vsetvli zero, a2, e16, m4, ta, ma
2831; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v20, v0.t
2832; ZVFHMIN-NEXT:    addi a2, sp, 16
2833; ZVFHMIN-NEXT:    vs8r.v v24, (a2) # Unknown-size Folded Spill
2834; ZVFHMIN-NEXT:    csrr a2, vlenb
2835; ZVFHMIN-NEXT:    slli a2, a2, 3
2836; ZVFHMIN-NEXT:    add a2, sp, a2
2837; ZVFHMIN-NEXT:    addi a2, a2, 16
2838; ZVFHMIN-NEXT:    vs8r.v v8, (a2) # Unknown-size Folded Spill
2839; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v12, v0.t
2840; ZVFHMIN-NEXT:    csrr a2, vlenb
2841; ZVFHMIN-NEXT:    slli a2, a2, 3
2842; ZVFHMIN-NEXT:    mv a3, a2
2843; ZVFHMIN-NEXT:    slli a2, a2, 1
2844; ZVFHMIN-NEXT:    add a2, a2, a3
2845; ZVFHMIN-NEXT:    add a2, sp, a2
2846; ZVFHMIN-NEXT:    addi a2, a2, 16
2847; ZVFHMIN-NEXT:    vl8r.v v16, (a2) # Unknown-size Folded Reload
2848; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v20, v0.t
2849; ZVFHMIN-NEXT:    addi a2, sp, 16
2850; ZVFHMIN-NEXT:    vl8r.v v16, (a2) # Unknown-size Folded Reload
2851; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
2852; ZVFHMIN-NEXT:    vfmadd.vv v8, v24, v16, v0.t
2853; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
2854; ZVFHMIN-NEXT:    vfncvt.f.f.w v20, v8, v0.t
2855; ZVFHMIN-NEXT:    bltu a0, a1, .LBB71_2
2856; ZVFHMIN-NEXT:  # %bb.1:
2857; ZVFHMIN-NEXT:    mv a0, a1
2858; ZVFHMIN-NEXT:  .LBB71_2:
2859; ZVFHMIN-NEXT:    csrr a1, vlenb
2860; ZVFHMIN-NEXT:    slli a1, a1, 4
2861; ZVFHMIN-NEXT:    add a1, sp, a1
2862; ZVFHMIN-NEXT:    addi a1, a1, 16
2863; ZVFHMIN-NEXT:    vl8r.v v24, (a1) # Unknown-size Folded Reload
2864; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
2865; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v24
2866; ZVFHMIN-NEXT:    addi a0, sp, 16
2867; ZVFHMIN-NEXT:    vs8r.v v8, (a0) # Unknown-size Folded Spill
2868; ZVFHMIN-NEXT:    csrr a0, vlenb
2869; ZVFHMIN-NEXT:    slli a0, a0, 3
2870; ZVFHMIN-NEXT:    mv a1, a0
2871; ZVFHMIN-NEXT:    slli a0, a0, 1
2872; ZVFHMIN-NEXT:    add a0, a0, a1
2873; ZVFHMIN-NEXT:    add a0, sp, a0
2874; ZVFHMIN-NEXT:    addi a0, a0, 16
2875; ZVFHMIN-NEXT:    vl8r.v v0, (a0) # Unknown-size Folded Reload
2876; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v0
2877; ZVFHMIN-NEXT:    csrr a0, vlenb
2878; ZVFHMIN-NEXT:    slli a0, a0, 3
2879; ZVFHMIN-NEXT:    add a0, sp, a0
2880; ZVFHMIN-NEXT:    addi a0, a0, 16
2881; ZVFHMIN-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
2882; ZVFHMIN-NEXT:    vfwcvt.f.f.v v0, v8
2883; ZVFHMIN-NEXT:    addi a0, sp, 16
2884; ZVFHMIN-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
2885; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
2886; ZVFHMIN-NEXT:    vfmadd.vv v0, v24, v8
2887; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
2888; ZVFHMIN-NEXT:    vfncvt.f.f.w v16, v0
2889; ZVFHMIN-NEXT:    vmv8r.v v8, v16
2890; ZVFHMIN-NEXT:    csrr a0, vlenb
2891; ZVFHMIN-NEXT:    slli a0, a0, 5
2892; ZVFHMIN-NEXT:    add sp, sp, a0
2893; ZVFHMIN-NEXT:    .cfi_def_cfa sp, 16
2894; ZVFHMIN-NEXT:    addi sp, sp, 16
2895; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 0
2896; ZVFHMIN-NEXT:    ret
2897  %elt.head = insertelement <vscale x 32 x half> poison, half %b, i32 0
2898  %vb = shufflevector <vscale x 32 x half> %elt.head, <vscale x 32 x half> poison, <vscale x 32 x i32> zeroinitializer
2899  %v = call <vscale x 32 x half> @llvm.vp.fma.nxv32f16(<vscale x 32 x half> %vb, <vscale x 32 x half> %va, <vscale x 32 x half> %vc, <vscale x 32 x i1> splat (i1 true), i32 %evl)
2900  ret <vscale x 32 x half> %v
2901}
2902
2903declare <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float>, <vscale x 1 x float>, <vscale x 1 x float>, <vscale x 1 x i1>, i32)
2904
2905define <vscale x 1 x float> @vfma_vv_nxv1f32(<vscale x 1 x float> %va, <vscale x 1 x float> %b, <vscale x 1 x float> %c, <vscale x 1 x i1> %m, i32 zeroext %evl) {
2906; CHECK-LABEL: vfma_vv_nxv1f32:
2907; CHECK:       # %bb.0:
2908; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma
2909; CHECK-NEXT:    vfmadd.vv v9, v8, v10, v0.t
2910; CHECK-NEXT:    vmv1r.v v8, v9
2911; CHECK-NEXT:    ret
2912  %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %va, <vscale x 1 x float> %b, <vscale x 1 x float> %c, <vscale x 1 x i1> %m, i32 %evl)
2913  ret <vscale x 1 x float> %v
2914}
2915
2916define <vscale x 1 x float> @vfma_vv_nxv1f32_unmasked(<vscale x 1 x float> %va, <vscale x 1 x float> %b, <vscale x 1 x float> %c, i32 zeroext %evl) {
2917; CHECK-LABEL: vfma_vv_nxv1f32_unmasked:
2918; CHECK:       # %bb.0:
2919; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma
2920; CHECK-NEXT:    vfmadd.vv v8, v9, v10
2921; CHECK-NEXT:    ret
2922  %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %va, <vscale x 1 x float> %b, <vscale x 1 x float> %c, <vscale x 1 x i1> splat (i1 true), i32 %evl)
2923  ret <vscale x 1 x float> %v
2924}
2925
2926define <vscale x 1 x float> @vfma_vf_nxv1f32(<vscale x 1 x float> %va, float %b, <vscale x 1 x float> %vc, <vscale x 1 x i1> %m, i32 zeroext %evl) {
2927; CHECK-LABEL: vfma_vf_nxv1f32:
2928; CHECK:       # %bb.0:
2929; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma
2930; CHECK-NEXT:    vfmadd.vf v8, fa0, v9, v0.t
2931; CHECK-NEXT:    ret
2932  %elt.head = insertelement <vscale x 1 x float> poison, float %b, i32 0
2933  %vb = shufflevector <vscale x 1 x float> %elt.head, <vscale x 1 x float> poison, <vscale x 1 x i32> zeroinitializer
2934  %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %va, <vscale x 1 x float> %vb, <vscale x 1 x float> %vc, <vscale x 1 x i1> %m, i32 %evl)
2935  ret <vscale x 1 x float> %v
2936}
2937
2938define <vscale x 1 x float> @vfma_vf_nxv1f32_commute(<vscale x 1 x float> %va, float %b, <vscale x 1 x float> %vc, <vscale x 1 x i1> %m, i32 zeroext %evl) {
2939; CHECK-LABEL: vfma_vf_nxv1f32_commute:
2940; CHECK:       # %bb.0:
2941; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma
2942; CHECK-NEXT:    vfmadd.vf v8, fa0, v9, v0.t
2943; CHECK-NEXT:    ret
2944  %elt.head = insertelement <vscale x 1 x float> poison, float %b, i32 0
2945  %vb = shufflevector <vscale x 1 x float> %elt.head, <vscale x 1 x float> poison, <vscale x 1 x i32> zeroinitializer
2946  %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %vb, <vscale x 1 x float> %va, <vscale x 1 x float> %vc, <vscale x 1 x i1> %m, i32 %evl)
2947  ret <vscale x 1 x float> %v
2948}
2949
2950define <vscale x 1 x float> @vfma_vf_nxv1f32_unmasked(<vscale x 1 x float> %va, float %b, <vscale x 1 x float> %vc, i32 zeroext %evl) {
2951; CHECK-LABEL: vfma_vf_nxv1f32_unmasked:
2952; CHECK:       # %bb.0:
2953; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma
2954; CHECK-NEXT:    vfmadd.vf v8, fa0, v9
2955; CHECK-NEXT:    ret
2956  %elt.head = insertelement <vscale x 1 x float> poison, float %b, i32 0
2957  %vb = shufflevector <vscale x 1 x float> %elt.head, <vscale x 1 x float> poison, <vscale x 1 x i32> zeroinitializer
2958  %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %va, <vscale x 1 x float> %vb, <vscale x 1 x float> %vc, <vscale x 1 x i1> splat (i1 true), i32 %evl)
2959  ret <vscale x 1 x float> %v
2960}
2961
2962define <vscale x 1 x float> @vfma_vf_nxv1f32_unmasked_commute(<vscale x 1 x float> %va, float %b, <vscale x 1 x float> %vc, i32 zeroext %evl) {
2963; CHECK-LABEL: vfma_vf_nxv1f32_unmasked_commute:
2964; CHECK:       # %bb.0:
2965; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma
2966; CHECK-NEXT:    vfmadd.vf v8, fa0, v9
2967; CHECK-NEXT:    ret
2968  %elt.head = insertelement <vscale x 1 x float> poison, float %b, i32 0
2969  %vb = shufflevector <vscale x 1 x float> %elt.head, <vscale x 1 x float> poison, <vscale x 1 x i32> zeroinitializer
2970  %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %vb, <vscale x 1 x float> %va, <vscale x 1 x float> %vc, <vscale x 1 x i1> splat (i1 true), i32 %evl)
2971  ret <vscale x 1 x float> %v
2972}
2973
2974declare <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float>, <vscale x 2 x float>, <vscale x 2 x float>, <vscale x 2 x i1>, i32)
2975
2976define <vscale x 2 x float> @vfma_vv_nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x float> %b, <vscale x 2 x float> %c, <vscale x 2 x i1> %m, i32 zeroext %evl) {
2977; CHECK-LABEL: vfma_vv_nxv2f32:
2978; CHECK:       # %bb.0:
2979; CHECK-NEXT:    vsetvli zero, a0, e32, m1, ta, ma
2980; CHECK-NEXT:    vfmadd.vv v9, v8, v10, v0.t
2981; CHECK-NEXT:    vmv.v.v v8, v9
2982; CHECK-NEXT:    ret
2983  %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x float> %b, <vscale x 2 x float> %c, <vscale x 2 x i1> %m, i32 %evl)
2984  ret <vscale x 2 x float> %v
2985}
2986
2987define <vscale x 2 x float> @vfma_vv_nxv2f32_unmasked(<vscale x 2 x float> %va, <vscale x 2 x float> %b, <vscale x 2 x float> %c, i32 zeroext %evl) {
2988; CHECK-LABEL: vfma_vv_nxv2f32_unmasked:
2989; CHECK:       # %bb.0:
2990; CHECK-NEXT:    vsetvli zero, a0, e32, m1, ta, ma
2991; CHECK-NEXT:    vfmadd.vv v8, v9, v10
2992; CHECK-NEXT:    ret
2993  %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x float> %b, <vscale x 2 x float> %c, <vscale x 2 x i1> splat (i1 true), i32 %evl)
2994  ret <vscale x 2 x float> %v
2995}
2996
2997define <vscale x 2 x float> @vfma_vf_nxv2f32(<vscale x 2 x float> %va, float %b, <vscale x 2 x float> %vc, <vscale x 2 x i1> %m, i32 zeroext %evl) {
2998; CHECK-LABEL: vfma_vf_nxv2f32:
2999; CHECK:       # %bb.0:
3000; CHECK-NEXT:    vsetvli zero, a0, e32, m1, ta, ma
3001; CHECK-NEXT:    vfmadd.vf v8, fa0, v9, v0.t
3002; CHECK-NEXT:    ret
3003  %elt.head = insertelement <vscale x 2 x float> poison, float %b, i32 0
3004  %vb = shufflevector <vscale x 2 x float> %elt.head, <vscale x 2 x float> poison, <vscale x 2 x i32> zeroinitializer
3005  %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x float> %vb, <vscale x 2 x float> %vc, <vscale x 2 x i1> %m, i32 %evl)
3006  ret <vscale x 2 x float> %v
3007}
3008
3009define <vscale x 2 x float> @vfma_vf_nxv2f32_commute(<vscale x 2 x float> %va, float %b, <vscale x 2 x float> %vc, <vscale x 2 x i1> %m, i32 zeroext %evl) {
3010; CHECK-LABEL: vfma_vf_nxv2f32_commute:
3011; CHECK:       # %bb.0:
3012; CHECK-NEXT:    vsetvli zero, a0, e32, m1, ta, ma
3013; CHECK-NEXT:    vfmadd.vf v8, fa0, v9, v0.t
3014; CHECK-NEXT:    ret
3015  %elt.head = insertelement <vscale x 2 x float> poison, float %b, i32 0
3016  %vb = shufflevector <vscale x 2 x float> %elt.head, <vscale x 2 x float> poison, <vscale x 2 x i32> zeroinitializer
3017  %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %vb, <vscale x 2 x float> %va, <vscale x 2 x float> %vc, <vscale x 2 x i1> %m, i32 %evl)
3018  ret <vscale x 2 x float> %v
3019}
3020
3021define <vscale x 2 x float> @vfma_vf_nxv2f32_unmasked(<vscale x 2 x float> %va, float %b, <vscale x 2 x float> %vc, i32 zeroext %evl) {
3022; CHECK-LABEL: vfma_vf_nxv2f32_unmasked:
3023; CHECK:       # %bb.0:
3024; CHECK-NEXT:    vsetvli zero, a0, e32, m1, ta, ma
3025; CHECK-NEXT:    vfmadd.vf v8, fa0, v9
3026; CHECK-NEXT:    ret
3027  %elt.head = insertelement <vscale x 2 x float> poison, float %b, i32 0
3028  %vb = shufflevector <vscale x 2 x float> %elt.head, <vscale x 2 x float> poison, <vscale x 2 x i32> zeroinitializer
3029  %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x float> %vb, <vscale x 2 x float> %vc, <vscale x 2 x i1> splat (i1 true), i32 %evl)
3030  ret <vscale x 2 x float> %v
3031}
3032
3033define <vscale x 2 x float> @vfma_vf_nxv2f32_unmasked_commute(<vscale x 2 x float> %va, float %b, <vscale x 2 x float> %vc, i32 zeroext %evl) {
3034; CHECK-LABEL: vfma_vf_nxv2f32_unmasked_commute:
3035; CHECK:       # %bb.0:
3036; CHECK-NEXT:    vsetvli zero, a0, e32, m1, ta, ma
3037; CHECK-NEXT:    vfmadd.vf v8, fa0, v9
3038; CHECK-NEXT:    ret
3039  %elt.head = insertelement <vscale x 2 x float> poison, float %b, i32 0
3040  %vb = shufflevector <vscale x 2 x float> %elt.head, <vscale x 2 x float> poison, <vscale x 2 x i32> zeroinitializer
3041  %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %vb, <vscale x 2 x float> %va, <vscale x 2 x float> %vc, <vscale x 2 x i1> splat (i1 true), i32 %evl)
3042  ret <vscale x 2 x float> %v
3043}
3044
3045declare <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x i1>, i32)
3046
3047define <vscale x 4 x float> @vfma_vv_nxv4f32(<vscale x 4 x float> %va, <vscale x 4 x float> %b, <vscale x 4 x float> %c, <vscale x 4 x i1> %m, i32 zeroext %evl) {
3048; CHECK-LABEL: vfma_vv_nxv4f32:
3049; CHECK:       # %bb.0:
3050; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma
3051; CHECK-NEXT:    vfmadd.vv v10, v8, v12, v0.t
3052; CHECK-NEXT:    vmv.v.v v8, v10
3053; CHECK-NEXT:    ret
3054  %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %va, <vscale x 4 x float> %b, <vscale x 4 x float> %c, <vscale x 4 x i1> %m, i32 %evl)
3055  ret <vscale x 4 x float> %v
3056}
3057
3058define <vscale x 4 x float> @vfma_vv_nxv4f32_unmasked(<vscale x 4 x float> %va, <vscale x 4 x float> %b, <vscale x 4 x float> %c, i32 zeroext %evl) {
3059; CHECK-LABEL: vfma_vv_nxv4f32_unmasked:
3060; CHECK:       # %bb.0:
3061; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma
3062; CHECK-NEXT:    vfmadd.vv v8, v10, v12
3063; CHECK-NEXT:    ret
3064  %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %va, <vscale x 4 x float> %b, <vscale x 4 x float> %c, <vscale x 4 x i1> splat (i1 true), i32 %evl)
3065  ret <vscale x 4 x float> %v
3066}
3067
3068define <vscale x 4 x float> @vfma_vf_nxv4f32(<vscale x 4 x float> %va, float %b, <vscale x 4 x float> %vc, <vscale x 4 x i1> %m, i32 zeroext %evl) {
3069; CHECK-LABEL: vfma_vf_nxv4f32:
3070; CHECK:       # %bb.0:
3071; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma
3072; CHECK-NEXT:    vfmadd.vf v8, fa0, v10, v0.t
3073; CHECK-NEXT:    ret
3074  %elt.head = insertelement <vscale x 4 x float> poison, float %b, i32 0
3075  %vb = shufflevector <vscale x 4 x float> %elt.head, <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer
3076  %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %va, <vscale x 4 x float> %vb, <vscale x 4 x float> %vc, <vscale x 4 x i1> %m, i32 %evl)
3077  ret <vscale x 4 x float> %v
3078}
3079
3080define <vscale x 4 x float> @vfma_vf_nxv4f32_commute(<vscale x 4 x float> %va, float %b, <vscale x 4 x float> %vc, <vscale x 4 x i1> %m, i32 zeroext %evl) {
3081; CHECK-LABEL: vfma_vf_nxv4f32_commute:
3082; CHECK:       # %bb.0:
3083; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma
3084; CHECK-NEXT:    vfmadd.vf v8, fa0, v10, v0.t
3085; CHECK-NEXT:    ret
3086  %elt.head = insertelement <vscale x 4 x float> poison, float %b, i32 0
3087  %vb = shufflevector <vscale x 4 x float> %elt.head, <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer
3088  %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %vb, <vscale x 4 x float> %va, <vscale x 4 x float> %vc, <vscale x 4 x i1> %m, i32 %evl)
3089  ret <vscale x 4 x float> %v
3090}
3091
3092define <vscale x 4 x float> @vfma_vf_nxv4f32_unmasked(<vscale x 4 x float> %va, float %b, <vscale x 4 x float> %vc, i32 zeroext %evl) {
3093; CHECK-LABEL: vfma_vf_nxv4f32_unmasked:
3094; CHECK:       # %bb.0:
3095; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma
3096; CHECK-NEXT:    vfmadd.vf v8, fa0, v10
3097; CHECK-NEXT:    ret
3098  %elt.head = insertelement <vscale x 4 x float> poison, float %b, i32 0
3099  %vb = shufflevector <vscale x 4 x float> %elt.head, <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer
3100  %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %va, <vscale x 4 x float> %vb, <vscale x 4 x float> %vc, <vscale x 4 x i1> splat (i1 true), i32 %evl)
3101  ret <vscale x 4 x float> %v
3102}
3103
3104define <vscale x 4 x float> @vfma_vf_nxv4f32_unmasked_commute(<vscale x 4 x float> %va, float %b, <vscale x 4 x float> %vc, i32 zeroext %evl) {
3105; CHECK-LABEL: vfma_vf_nxv4f32_unmasked_commute:
3106; CHECK:       # %bb.0:
3107; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma
3108; CHECK-NEXT:    vfmadd.vf v8, fa0, v10
3109; CHECK-NEXT:    ret
3110  %elt.head = insertelement <vscale x 4 x float> poison, float %b, i32 0
3111  %vb = shufflevector <vscale x 4 x float> %elt.head, <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer
3112  %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %vb, <vscale x 4 x float> %va, <vscale x 4 x float> %vc, <vscale x 4 x i1> splat (i1 true), i32 %evl)
3113  ret <vscale x 4 x float> %v
3114}
3115
3116declare <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float>, <vscale x 8 x float>, <vscale x 8 x float>, <vscale x 8 x i1>, i32)
3117
3118define <vscale x 8 x float> @vfma_vv_nxv8f32(<vscale x 8 x float> %va, <vscale x 8 x float> %b, <vscale x 8 x float> %c, <vscale x 8 x i1> %m, i32 zeroext %evl) {
3119; CHECK-LABEL: vfma_vv_nxv8f32:
3120; CHECK:       # %bb.0:
3121; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma
3122; CHECK-NEXT:    vfmadd.vv v12, v8, v16, v0.t
3123; CHECK-NEXT:    vmv.v.v v8, v12
3124; CHECK-NEXT:    ret
3125  %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %va, <vscale x 8 x float> %b, <vscale x 8 x float> %c, <vscale x 8 x i1> %m, i32 %evl)
3126  ret <vscale x 8 x float> %v
3127}
3128
3129define <vscale x 8 x float> @vfma_vv_nxv8f32_unmasked(<vscale x 8 x float> %va, <vscale x 8 x float> %b, <vscale x 8 x float> %c, i32 zeroext %evl) {
3130; CHECK-LABEL: vfma_vv_nxv8f32_unmasked:
3131; CHECK:       # %bb.0:
3132; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma
3133; CHECK-NEXT:    vfmadd.vv v8, v12, v16
3134; CHECK-NEXT:    ret
3135  %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %va, <vscale x 8 x float> %b, <vscale x 8 x float> %c, <vscale x 8 x i1> splat (i1 true), i32 %evl)
3136  ret <vscale x 8 x float> %v
3137}
3138
3139define <vscale x 8 x float> @vfma_vf_nxv8f32(<vscale x 8 x float> %va, float %b, <vscale x 8 x float> %vc, <vscale x 8 x i1> %m, i32 zeroext %evl) {
3140; CHECK-LABEL: vfma_vf_nxv8f32:
3141; CHECK:       # %bb.0:
3142; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma
3143; CHECK-NEXT:    vfmadd.vf v8, fa0, v12, v0.t
3144; CHECK-NEXT:    ret
3145  %elt.head = insertelement <vscale x 8 x float> poison, float %b, i32 0
3146  %vb = shufflevector <vscale x 8 x float> %elt.head, <vscale x 8 x float> poison, <vscale x 8 x i32> zeroinitializer
3147  %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %va, <vscale x 8 x float> %vb, <vscale x 8 x float> %vc, <vscale x 8 x i1> %m, i32 %evl)
3148  ret <vscale x 8 x float> %v
3149}
3150
3151define <vscale x 8 x float> @vfma_vf_nxv8f32_commute(<vscale x 8 x float> %va, float %b, <vscale x 8 x float> %vc, <vscale x 8 x i1> %m, i32 zeroext %evl) {
3152; CHECK-LABEL: vfma_vf_nxv8f32_commute:
3153; CHECK:       # %bb.0:
3154; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma
3155; CHECK-NEXT:    vfmadd.vf v8, fa0, v12, v0.t
3156; CHECK-NEXT:    ret
3157  %elt.head = insertelement <vscale x 8 x float> poison, float %b, i32 0
3158  %vb = shufflevector <vscale x 8 x float> %elt.head, <vscale x 8 x float> poison, <vscale x 8 x i32> zeroinitializer
3159  %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %vb, <vscale x 8 x float> %va, <vscale x 8 x float> %vc, <vscale x 8 x i1> %m, i32 %evl)
3160  ret <vscale x 8 x float> %v
3161}
3162
3163define <vscale x 8 x float> @vfma_vf_nxv8f32_unmasked(<vscale x 8 x float> %va, float %b, <vscale x 8 x float> %vc, i32 zeroext %evl) {
3164; CHECK-LABEL: vfma_vf_nxv8f32_unmasked:
3165; CHECK:       # %bb.0:
3166; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma
3167; CHECK-NEXT:    vfmadd.vf v8, fa0, v12
3168; CHECK-NEXT:    ret
3169  %elt.head = insertelement <vscale x 8 x float> poison, float %b, i32 0
3170  %vb = shufflevector <vscale x 8 x float> %elt.head, <vscale x 8 x float> poison, <vscale x 8 x i32> zeroinitializer
3171  %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %va, <vscale x 8 x float> %vb, <vscale x 8 x float> %vc, <vscale x 8 x i1> splat (i1 true), i32 %evl)
3172  ret <vscale x 8 x float> %v
3173}
3174
3175define <vscale x 8 x float> @vfma_vf_nxv8f32_unmasked_commute(<vscale x 8 x float> %va, float %b, <vscale x 8 x float> %vc, i32 zeroext %evl) {
3176; CHECK-LABEL: vfma_vf_nxv8f32_unmasked_commute:
3177; CHECK:       # %bb.0:
3178; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma
3179; CHECK-NEXT:    vfmadd.vf v8, fa0, v12
3180; CHECK-NEXT:    ret
3181  %elt.head = insertelement <vscale x 8 x float> poison, float %b, i32 0
3182  %vb = shufflevector <vscale x 8 x float> %elt.head, <vscale x 8 x float> poison, <vscale x 8 x i32> zeroinitializer
3183  %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %vb, <vscale x 8 x float> %va, <vscale x 8 x float> %vc, <vscale x 8 x i1> splat (i1 true), i32 %evl)
3184  ret <vscale x 8 x float> %v
3185}
3186
3187declare <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float>, <vscale x 16 x float>, <vscale x 16 x float>, <vscale x 16 x i1>, i32)
3188
3189define <vscale x 16 x float> @vfma_vv_nxv16f32(<vscale x 16 x float> %va, <vscale x 16 x float> %b, <vscale x 16 x float> %c, <vscale x 16 x i1> %m, i32 zeroext %evl) {
3190; CHECK-LABEL: vfma_vv_nxv16f32:
3191; CHECK:       # %bb.0:
3192; CHECK-NEXT:    vl8re32.v v24, (a0)
3193; CHECK-NEXT:    vsetvli zero, a1, e32, m8, ta, ma
3194; CHECK-NEXT:    vfmadd.vv v16, v8, v24, v0.t
3195; CHECK-NEXT:    vmv.v.v v8, v16
3196; CHECK-NEXT:    ret
3197  %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %va, <vscale x 16 x float> %b, <vscale x 16 x float> %c, <vscale x 16 x i1> %m, i32 %evl)
3198  ret <vscale x 16 x float> %v
3199}
3200
3201define <vscale x 16 x float> @vfma_vv_nxv16f32_unmasked(<vscale x 16 x float> %va, <vscale x 16 x float> %b, <vscale x 16 x float> %c, i32 zeroext %evl) {
3202; CHECK-LABEL: vfma_vv_nxv16f32_unmasked:
3203; CHECK:       # %bb.0:
3204; CHECK-NEXT:    vl8re32.v v24, (a0)
3205; CHECK-NEXT:    vsetvli zero, a1, e32, m8, ta, ma
3206; CHECK-NEXT:    vfmadd.vv v8, v16, v24
3207; CHECK-NEXT:    ret
3208  %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %va, <vscale x 16 x float> %b, <vscale x 16 x float> %c, <vscale x 16 x i1> splat (i1 true), i32 %evl)
3209  ret <vscale x 16 x float> %v
3210}
3211
3212define <vscale x 16 x float> @vfma_vf_nxv16f32(<vscale x 16 x float> %va, float %b, <vscale x 16 x float> %vc, <vscale x 16 x i1> %m, i32 zeroext %evl) {
3213; CHECK-LABEL: vfma_vf_nxv16f32:
3214; CHECK:       # %bb.0:
3215; CHECK-NEXT:    vsetvli zero, a0, e32, m8, ta, ma
3216; CHECK-NEXT:    vfmadd.vf v8, fa0, v16, v0.t
3217; CHECK-NEXT:    ret
3218  %elt.head = insertelement <vscale x 16 x float> poison, float %b, i32 0
3219  %vb = shufflevector <vscale x 16 x float> %elt.head, <vscale x 16 x float> poison, <vscale x 16 x i32> zeroinitializer
3220  %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %va, <vscale x 16 x float> %vb, <vscale x 16 x float> %vc, <vscale x 16 x i1> %m, i32 %evl)
3221  ret <vscale x 16 x float> %v
3222}
3223
3224define <vscale x 16 x float> @vfma_vf_nxv16f32_commute(<vscale x 16 x float> %va, float %b, <vscale x 16 x float> %vc, <vscale x 16 x i1> %m, i32 zeroext %evl) {
3225; CHECK-LABEL: vfma_vf_nxv16f32_commute:
3226; CHECK:       # %bb.0:
3227; CHECK-NEXT:    vsetvli zero, a0, e32, m8, ta, ma
3228; CHECK-NEXT:    vfmadd.vf v8, fa0, v16, v0.t
3229; CHECK-NEXT:    ret
3230  %elt.head = insertelement <vscale x 16 x float> poison, float %b, i32 0
3231  %vb = shufflevector <vscale x 16 x float> %elt.head, <vscale x 16 x float> poison, <vscale x 16 x i32> zeroinitializer
3232  %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %vb, <vscale x 16 x float> %va, <vscale x 16 x float> %vc, <vscale x 16 x i1> %m, i32 %evl)
3233  ret <vscale x 16 x float> %v
3234}
3235
3236define <vscale x 16 x float> @vfma_vf_nxv16f32_unmasked(<vscale x 16 x float> %va, float %b, <vscale x 16 x float> %vc, i32 zeroext %evl) {
3237; CHECK-LABEL: vfma_vf_nxv16f32_unmasked:
3238; CHECK:       # %bb.0:
3239; CHECK-NEXT:    vsetvli zero, a0, e32, m8, ta, ma
3240; CHECK-NEXT:    vfmadd.vf v8, fa0, v16
3241; CHECK-NEXT:    ret
3242  %elt.head = insertelement <vscale x 16 x float> poison, float %b, i32 0
3243  %vb = shufflevector <vscale x 16 x float> %elt.head, <vscale x 16 x float> poison, <vscale x 16 x i32> zeroinitializer
3244  %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %va, <vscale x 16 x float> %vb, <vscale x 16 x float> %vc, <vscale x 16 x i1> splat (i1 true), i32 %evl)
3245  ret <vscale x 16 x float> %v
3246}
3247
3248define <vscale x 16 x float> @vfma_vf_nxv16f32_unmasked_commute(<vscale x 16 x float> %va, float %b, <vscale x 16 x float> %vc, i32 zeroext %evl) {
3249; CHECK-LABEL: vfma_vf_nxv16f32_unmasked_commute:
3250; CHECK:       # %bb.0:
3251; CHECK-NEXT:    vsetvli zero, a0, e32, m8, ta, ma
3252; CHECK-NEXT:    vfmadd.vf v8, fa0, v16
3253; CHECK-NEXT:    ret
3254  %elt.head = insertelement <vscale x 16 x float> poison, float %b, i32 0
3255  %vb = shufflevector <vscale x 16 x float> %elt.head, <vscale x 16 x float> poison, <vscale x 16 x i32> zeroinitializer
3256  %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %vb, <vscale x 16 x float> %va, <vscale x 16 x float> %vc, <vscale x 16 x i1> splat (i1 true), i32 %evl)
3257  ret <vscale x 16 x float> %v
3258}
3259
3260declare <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double>, <vscale x 1 x double>, <vscale x 1 x double>, <vscale x 1 x i1>, i32)
3261
3262define <vscale x 1 x double> @vfma_vv_nxv1f64(<vscale x 1 x double> %va, <vscale x 1 x double> %b, <vscale x 1 x double> %c, <vscale x 1 x i1> %m, i32 zeroext %evl) {
3263; CHECK-LABEL: vfma_vv_nxv1f64:
3264; CHECK:       # %bb.0:
3265; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma
3266; CHECK-NEXT:    vfmadd.vv v9, v8, v10, v0.t
3267; CHECK-NEXT:    vmv.v.v v8, v9
3268; CHECK-NEXT:    ret
3269  %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %va, <vscale x 1 x double> %b, <vscale x 1 x double> %c, <vscale x 1 x i1> %m, i32 %evl)
3270  ret <vscale x 1 x double> %v
3271}
3272
3273define <vscale x 1 x double> @vfma_vv_nxv1f64_unmasked(<vscale x 1 x double> %va, <vscale x 1 x double> %b, <vscale x 1 x double> %c, i32 zeroext %evl) {
3274; CHECK-LABEL: vfma_vv_nxv1f64_unmasked:
3275; CHECK:       # %bb.0:
3276; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma
3277; CHECK-NEXT:    vfmadd.vv v8, v9, v10
3278; CHECK-NEXT:    ret
3279  %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %va, <vscale x 1 x double> %b, <vscale x 1 x double> %c, <vscale x 1 x i1> splat (i1 true), i32 %evl)
3280  ret <vscale x 1 x double> %v
3281}
3282
3283define <vscale x 1 x double> @vfma_vf_nxv1f64(<vscale x 1 x double> %va, double %b, <vscale x 1 x double> %vc, <vscale x 1 x i1> %m, i32 zeroext %evl) {
3284; CHECK-LABEL: vfma_vf_nxv1f64:
3285; CHECK:       # %bb.0:
3286; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma
3287; CHECK-NEXT:    vfmadd.vf v8, fa0, v9, v0.t
3288; CHECK-NEXT:    ret
3289  %elt.head = insertelement <vscale x 1 x double> poison, double %b, i32 0
3290  %vb = shufflevector <vscale x 1 x double> %elt.head, <vscale x 1 x double> poison, <vscale x 1 x i32> zeroinitializer
3291  %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %va, <vscale x 1 x double> %vb, <vscale x 1 x double> %vc, <vscale x 1 x i1> %m, i32 %evl)
3292  ret <vscale x 1 x double> %v
3293}
3294
3295define <vscale x 1 x double> @vfma_vf_nxv1f64_commute(<vscale x 1 x double> %va, double %b, <vscale x 1 x double> %vc, <vscale x 1 x i1> %m, i32 zeroext %evl) {
3296; CHECK-LABEL: vfma_vf_nxv1f64_commute:
3297; CHECK:       # %bb.0:
3298; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma
3299; CHECK-NEXT:    vfmadd.vf v8, fa0, v9, v0.t
3300; CHECK-NEXT:    ret
3301  %elt.head = insertelement <vscale x 1 x double> poison, double %b, i32 0
3302  %vb = shufflevector <vscale x 1 x double> %elt.head, <vscale x 1 x double> poison, <vscale x 1 x i32> zeroinitializer
3303  %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %vb, <vscale x 1 x double> %va, <vscale x 1 x double> %vc, <vscale x 1 x i1> %m, i32 %evl)
3304  ret <vscale x 1 x double> %v
3305}
3306
3307define <vscale x 1 x double> @vfma_vf_nxv1f64_unmasked(<vscale x 1 x double> %va, double %b, <vscale x 1 x double> %vc, i32 zeroext %evl) {
3308; CHECK-LABEL: vfma_vf_nxv1f64_unmasked:
3309; CHECK:       # %bb.0:
3310; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma
3311; CHECK-NEXT:    vfmadd.vf v8, fa0, v9
3312; CHECK-NEXT:    ret
3313  %elt.head = insertelement <vscale x 1 x double> poison, double %b, i32 0
3314  %vb = shufflevector <vscale x 1 x double> %elt.head, <vscale x 1 x double> poison, <vscale x 1 x i32> zeroinitializer
3315  %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %va, <vscale x 1 x double> %vb, <vscale x 1 x double> %vc, <vscale x 1 x i1> splat (i1 true), i32 %evl)
3316  ret <vscale x 1 x double> %v
3317}
3318
3319define <vscale x 1 x double> @vfma_vf_nxv1f64_unmasked_commute(<vscale x 1 x double> %va, double %b, <vscale x 1 x double> %vc, i32 zeroext %evl) {
3320; CHECK-LABEL: vfma_vf_nxv1f64_unmasked_commute:
3321; CHECK:       # %bb.0:
3322; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma
3323; CHECK-NEXT:    vfmadd.vf v8, fa0, v9
3324; CHECK-NEXT:    ret
3325  %elt.head = insertelement <vscale x 1 x double> poison, double %b, i32 0
3326  %vb = shufflevector <vscale x 1 x double> %elt.head, <vscale x 1 x double> poison, <vscale x 1 x i32> zeroinitializer
3327  %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %vb, <vscale x 1 x double> %va, <vscale x 1 x double> %vc, <vscale x 1 x i1> splat (i1 true), i32 %evl)
3328  ret <vscale x 1 x double> %v
3329}
3330
3331declare <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double>, <vscale x 2 x double>, <vscale x 2 x double>, <vscale x 2 x i1>, i32)
3332
3333define <vscale x 2 x double> @vfma_vv_nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x double> %b, <vscale x 2 x double> %c, <vscale x 2 x i1> %m, i32 zeroext %evl) {
3334; CHECK-LABEL: vfma_vv_nxv2f64:
3335; CHECK:       # %bb.0:
3336; CHECK-NEXT:    vsetvli zero, a0, e64, m2, ta, ma
3337; CHECK-NEXT:    vfmadd.vv v10, v8, v12, v0.t
3338; CHECK-NEXT:    vmv.v.v v8, v10
3339; CHECK-NEXT:    ret
3340  %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x double> %b, <vscale x 2 x double> %c, <vscale x 2 x i1> %m, i32 %evl)
3341  ret <vscale x 2 x double> %v
3342}
3343
3344define <vscale x 2 x double> @vfma_vv_nxv2f64_unmasked(<vscale x 2 x double> %va, <vscale x 2 x double> %b, <vscale x 2 x double> %c, i32 zeroext %evl) {
3345; CHECK-LABEL: vfma_vv_nxv2f64_unmasked:
3346; CHECK:       # %bb.0:
3347; CHECK-NEXT:    vsetvli zero, a0, e64, m2, ta, ma
3348; CHECK-NEXT:    vfmadd.vv v8, v10, v12
3349; CHECK-NEXT:    ret
3350  %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x double> %b, <vscale x 2 x double> %c, <vscale x 2 x i1> splat (i1 true), i32 %evl)
3351  ret <vscale x 2 x double> %v
3352}
3353
3354define <vscale x 2 x double> @vfma_vf_nxv2f64(<vscale x 2 x double> %va, double %b, <vscale x 2 x double> %vc, <vscale x 2 x i1> %m, i32 zeroext %evl) {
3355; CHECK-LABEL: vfma_vf_nxv2f64:
3356; CHECK:       # %bb.0:
3357; CHECK-NEXT:    vsetvli zero, a0, e64, m2, ta, ma
3358; CHECK-NEXT:    vfmadd.vf v8, fa0, v10, v0.t
3359; CHECK-NEXT:    ret
3360  %elt.head = insertelement <vscale x 2 x double> poison, double %b, i32 0
3361  %vb = shufflevector <vscale x 2 x double> %elt.head, <vscale x 2 x double> poison, <vscale x 2 x i32> zeroinitializer
3362  %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x double> %vb, <vscale x 2 x double> %vc, <vscale x 2 x i1> %m, i32 %evl)
3363  ret <vscale x 2 x double> %v
3364}
3365
3366define <vscale x 2 x double> @vfma_vf_nxv2f64_commute(<vscale x 2 x double> %va, double %b, <vscale x 2 x double> %vc, <vscale x 2 x i1> %m, i32 zeroext %evl) {
3367; CHECK-LABEL: vfma_vf_nxv2f64_commute:
3368; CHECK:       # %bb.0:
3369; CHECK-NEXT:    vsetvli zero, a0, e64, m2, ta, ma
3370; CHECK-NEXT:    vfmadd.vf v8, fa0, v10, v0.t
3371; CHECK-NEXT:    ret
3372  %elt.head = insertelement <vscale x 2 x double> poison, double %b, i32 0
3373  %vb = shufflevector <vscale x 2 x double> %elt.head, <vscale x 2 x double> poison, <vscale x 2 x i32> zeroinitializer
3374  %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %vb, <vscale x 2 x double> %va, <vscale x 2 x double> %vc, <vscale x 2 x i1> %m, i32 %evl)
3375  ret <vscale x 2 x double> %v
3376}
3377
3378define <vscale x 2 x double> @vfma_vf_nxv2f64_unmasked(<vscale x 2 x double> %va, double %b, <vscale x 2 x double> %vc, i32 zeroext %evl) {
3379; CHECK-LABEL: vfma_vf_nxv2f64_unmasked:
3380; CHECK:       # %bb.0:
3381; CHECK-NEXT:    vsetvli zero, a0, e64, m2, ta, ma
3382; CHECK-NEXT:    vfmadd.vf v8, fa0, v10
3383; CHECK-NEXT:    ret
3384  %elt.head = insertelement <vscale x 2 x double> poison, double %b, i32 0
3385  %vb = shufflevector <vscale x 2 x double> %elt.head, <vscale x 2 x double> poison, <vscale x 2 x i32> zeroinitializer
3386  %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x double> %vb, <vscale x 2 x double> %vc, <vscale x 2 x i1> splat (i1 true), i32 %evl)
3387  ret <vscale x 2 x double> %v
3388}
3389
3390define <vscale x 2 x double> @vfma_vf_nxv2f64_unmasked_commute(<vscale x 2 x double> %va, double %b, <vscale x 2 x double> %vc, i32 zeroext %evl) {
3391; CHECK-LABEL: vfma_vf_nxv2f64_unmasked_commute:
3392; CHECK:       # %bb.0:
3393; CHECK-NEXT:    vsetvli zero, a0, e64, m2, ta, ma
3394; CHECK-NEXT:    vfmadd.vf v8, fa0, v10
3395; CHECK-NEXT:    ret
3396  %elt.head = insertelement <vscale x 2 x double> poison, double %b, i32 0
3397  %vb = shufflevector <vscale x 2 x double> %elt.head, <vscale x 2 x double> poison, <vscale x 2 x i32> zeroinitializer
3398  %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %vb, <vscale x 2 x double> %va, <vscale x 2 x double> %vc, <vscale x 2 x i1> splat (i1 true), i32 %evl)
3399  ret <vscale x 2 x double> %v
3400}
3401
3402declare <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double>, <vscale x 4 x double>, <vscale x 4 x double>, <vscale x 4 x i1>, i32)
3403
3404define <vscale x 4 x double> @vfma_vv_nxv4f64(<vscale x 4 x double> %va, <vscale x 4 x double> %b, <vscale x 4 x double> %c, <vscale x 4 x i1> %m, i32 zeroext %evl) {
3405; CHECK-LABEL: vfma_vv_nxv4f64:
3406; CHECK:       # %bb.0:
3407; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
3408; CHECK-NEXT:    vfmadd.vv v12, v8, v16, v0.t
3409; CHECK-NEXT:    vmv.v.v v8, v12
3410; CHECK-NEXT:    ret
3411  %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %va, <vscale x 4 x double> %b, <vscale x 4 x double> %c, <vscale x 4 x i1> %m, i32 %evl)
3412  ret <vscale x 4 x double> %v
3413}
3414
3415define <vscale x 4 x double> @vfma_vv_nxv4f64_unmasked(<vscale x 4 x double> %va, <vscale x 4 x double> %b, <vscale x 4 x double> %c, i32 zeroext %evl) {
3416; CHECK-LABEL: vfma_vv_nxv4f64_unmasked:
3417; CHECK:       # %bb.0:
3418; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
3419; CHECK-NEXT:    vfmadd.vv v8, v12, v16
3420; CHECK-NEXT:    ret
3421  %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %va, <vscale x 4 x double> %b, <vscale x 4 x double> %c, <vscale x 4 x i1> splat (i1 true), i32 %evl)
3422  ret <vscale x 4 x double> %v
3423}
3424
3425define <vscale x 4 x double> @vfma_vf_nxv4f64(<vscale x 4 x double> %va, double %b, <vscale x 4 x double> %vc, <vscale x 4 x i1> %m, i32 zeroext %evl) {
3426; CHECK-LABEL: vfma_vf_nxv4f64:
3427; CHECK:       # %bb.0:
3428; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
3429; CHECK-NEXT:    vfmadd.vf v8, fa0, v12, v0.t
3430; CHECK-NEXT:    ret
3431  %elt.head = insertelement <vscale x 4 x double> poison, double %b, i32 0
3432  %vb = shufflevector <vscale x 4 x double> %elt.head, <vscale x 4 x double> poison, <vscale x 4 x i32> zeroinitializer
3433  %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %va, <vscale x 4 x double> %vb, <vscale x 4 x double> %vc, <vscale x 4 x i1> %m, i32 %evl)
3434  ret <vscale x 4 x double> %v
3435}
3436
3437define <vscale x 4 x double> @vfma_vf_nxv4f64_commute(<vscale x 4 x double> %va, double %b, <vscale x 4 x double> %vc, <vscale x 4 x i1> %m, i32 zeroext %evl) {
3438; CHECK-LABEL: vfma_vf_nxv4f64_commute:
3439; CHECK:       # %bb.0:
3440; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
3441; CHECK-NEXT:    vfmadd.vf v8, fa0, v12, v0.t
3442; CHECK-NEXT:    ret
3443  %elt.head = insertelement <vscale x 4 x double> poison, double %b, i32 0
3444  %vb = shufflevector <vscale x 4 x double> %elt.head, <vscale x 4 x double> poison, <vscale x 4 x i32> zeroinitializer
3445  %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %vb, <vscale x 4 x double> %va, <vscale x 4 x double> %vc, <vscale x 4 x i1> %m, i32 %evl)
3446  ret <vscale x 4 x double> %v
3447}
3448
3449define <vscale x 4 x double> @vfma_vf_nxv4f64_unmasked(<vscale x 4 x double> %va, double %b, <vscale x 4 x double> %vc, i32 zeroext %evl) {
3450; CHECK-LABEL: vfma_vf_nxv4f64_unmasked:
3451; CHECK:       # %bb.0:
3452; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
3453; CHECK-NEXT:    vfmadd.vf v8, fa0, v12
3454; CHECK-NEXT:    ret
3455  %elt.head = insertelement <vscale x 4 x double> poison, double %b, i32 0
3456  %vb = shufflevector <vscale x 4 x double> %elt.head, <vscale x 4 x double> poison, <vscale x 4 x i32> zeroinitializer
3457  %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %va, <vscale x 4 x double> %vb, <vscale x 4 x double> %vc, <vscale x 4 x i1> splat (i1 true), i32 %evl)
3458  ret <vscale x 4 x double> %v
3459}
3460
3461define <vscale x 4 x double> @vfma_vf_nxv4f64_unmasked_commute(<vscale x 4 x double> %va, double %b, <vscale x 4 x double> %vc, i32 zeroext %evl) {
3462; CHECK-LABEL: vfma_vf_nxv4f64_unmasked_commute:
3463; CHECK:       # %bb.0:
3464; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
3465; CHECK-NEXT:    vfmadd.vf v8, fa0, v12
3466; CHECK-NEXT:    ret
3467  %elt.head = insertelement <vscale x 4 x double> poison, double %b, i32 0
3468  %vb = shufflevector <vscale x 4 x double> %elt.head, <vscale x 4 x double> poison, <vscale x 4 x i32> zeroinitializer
3469  %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %vb, <vscale x 4 x double> %va, <vscale x 4 x double> %vc, <vscale x 4 x i1> splat (i1 true), i32 %evl)
3470  ret <vscale x 4 x double> %v
3471}
3472
3473declare <vscale x 7 x double> @llvm.vp.fma.nxv7f64(<vscale x 7 x double>, <vscale x 7 x double>, <vscale x 7 x double>, <vscale x 7 x i1>, i32)
3474
3475define <vscale x 7 x double> @vfma_vv_nxv7f64(<vscale x 7 x double> %va, <vscale x 7 x double> %b, <vscale x 7 x double> %c, <vscale x 7 x i1> %m, i32 zeroext %evl) {
3476; CHECK-LABEL: vfma_vv_nxv7f64:
3477; CHECK:       # %bb.0:
3478; CHECK-NEXT:    vl8re64.v v24, (a0)
3479; CHECK-NEXT:    vsetvli zero, a1, e64, m8, ta, ma
3480; CHECK-NEXT:    vfmadd.vv v16, v8, v24, v0.t
3481; CHECK-NEXT:    vmv.v.v v8, v16
3482; CHECK-NEXT:    ret
3483  %v = call <vscale x 7 x double> @llvm.vp.fma.nxv7f64(<vscale x 7 x double> %va, <vscale x 7 x double> %b, <vscale x 7 x double> %c, <vscale x 7 x i1> %m, i32 %evl)
3484  ret <vscale x 7 x double> %v
3485}
3486
3487define <vscale x 7 x double> @vfma_vv_nxv7f64_unmasked(<vscale x 7 x double> %va, <vscale x 7 x double> %b, <vscale x 7 x double> %c, i32 zeroext %evl) {
3488; CHECK-LABEL: vfma_vv_nxv7f64_unmasked:
3489; CHECK:       # %bb.0:
3490; CHECK-NEXT:    vl8re64.v v24, (a0)
3491; CHECK-NEXT:    vsetvli zero, a1, e64, m8, ta, ma
3492; CHECK-NEXT:    vfmadd.vv v8, v16, v24
3493; CHECK-NEXT:    ret
3494  %v = call <vscale x 7 x double> @llvm.vp.fma.nxv7f64(<vscale x 7 x double> %va, <vscale x 7 x double> %b, <vscale x 7 x double> %c, <vscale x 7 x i1> splat (i1 true), i32 %evl)
3495  ret <vscale x 7 x double> %v
3496}
3497
3498declare <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double>, <vscale x 8 x double>, <vscale x 8 x double>, <vscale x 8 x i1>, i32)
3499
3500define <vscale x 8 x double> @vfma_vv_nxv8f64(<vscale x 8 x double> %va, <vscale x 8 x double> %b, <vscale x 8 x double> %c, <vscale x 8 x i1> %m, i32 zeroext %evl) {
3501; CHECK-LABEL: vfma_vv_nxv8f64:
3502; CHECK:       # %bb.0:
3503; CHECK-NEXT:    vl8re64.v v24, (a0)
3504; CHECK-NEXT:    vsetvli zero, a1, e64, m8, ta, ma
3505; CHECK-NEXT:    vfmadd.vv v16, v8, v24, v0.t
3506; CHECK-NEXT:    vmv.v.v v8, v16
3507; CHECK-NEXT:    ret
3508  %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %va, <vscale x 8 x double> %b, <vscale x 8 x double> %c, <vscale x 8 x i1> %m, i32 %evl)
3509  ret <vscale x 8 x double> %v
3510}
3511
3512define <vscale x 8 x double> @vfma_vv_nxv8f64_unmasked(<vscale x 8 x double> %va, <vscale x 8 x double> %b, <vscale x 8 x double> %c, i32 zeroext %evl) {
3513; CHECK-LABEL: vfma_vv_nxv8f64_unmasked:
3514; CHECK:       # %bb.0:
3515; CHECK-NEXT:    vl8re64.v v24, (a0)
3516; CHECK-NEXT:    vsetvli zero, a1, e64, m8, ta, ma
3517; CHECK-NEXT:    vfmadd.vv v8, v16, v24
3518; CHECK-NEXT:    ret
3519  %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %va, <vscale x 8 x double> %b, <vscale x 8 x double> %c, <vscale x 8 x i1> splat (i1 true), i32 %evl)
3520  ret <vscale x 8 x double> %v
3521}
3522
3523define <vscale x 8 x double> @vfma_vf_nxv8f64(<vscale x 8 x double> %va, double %b, <vscale x 8 x double> %vc, <vscale x 8 x i1> %m, i32 zeroext %evl) {
3524; CHECK-LABEL: vfma_vf_nxv8f64:
3525; CHECK:       # %bb.0:
3526; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma
3527; CHECK-NEXT:    vfmadd.vf v8, fa0, v16, v0.t
3528; CHECK-NEXT:    ret
3529  %elt.head = insertelement <vscale x 8 x double> poison, double %b, i32 0
3530  %vb = shufflevector <vscale x 8 x double> %elt.head, <vscale x 8 x double> poison, <vscale x 8 x i32> zeroinitializer
3531  %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %va, <vscale x 8 x double> %vb, <vscale x 8 x double> %vc, <vscale x 8 x i1> %m, i32 %evl)
3532  ret <vscale x 8 x double> %v
3533}
3534
3535define <vscale x 8 x double> @vfma_vf_nxv8f64_commute(<vscale x 8 x double> %va, double %b, <vscale x 8 x double> %vc, <vscale x 8 x i1> %m, i32 zeroext %evl) {
3536; CHECK-LABEL: vfma_vf_nxv8f64_commute:
3537; CHECK:       # %bb.0:
3538; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma
3539; CHECK-NEXT:    vfmadd.vf v8, fa0, v16, v0.t
3540; CHECK-NEXT:    ret
3541  %elt.head = insertelement <vscale x 8 x double> poison, double %b, i32 0
3542  %vb = shufflevector <vscale x 8 x double> %elt.head, <vscale x 8 x double> poison, <vscale x 8 x i32> zeroinitializer
3543  %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %vb, <vscale x 8 x double> %va, <vscale x 8 x double> %vc, <vscale x 8 x i1> %m, i32 %evl)
3544  ret <vscale x 8 x double> %v
3545}
3546
3547define <vscale x 8 x double> @vfma_vf_nxv8f64_unmasked(<vscale x 8 x double> %va, double %b, <vscale x 8 x double> %vc, i32 zeroext %evl) {
3548; CHECK-LABEL: vfma_vf_nxv8f64_unmasked:
3549; CHECK:       # %bb.0:
3550; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma
3551; CHECK-NEXT:    vfmadd.vf v8, fa0, v16
3552; CHECK-NEXT:    ret
3553  %elt.head = insertelement <vscale x 8 x double> poison, double %b, i32 0
3554  %vb = shufflevector <vscale x 8 x double> %elt.head, <vscale x 8 x double> poison, <vscale x 8 x i32> zeroinitializer
3555  %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %va, <vscale x 8 x double> %vb, <vscale x 8 x double> %vc, <vscale x 8 x i1> splat (i1 true), i32 %evl)
3556  ret <vscale x 8 x double> %v
3557}
3558
3559define <vscale x 8 x double> @vfma_vf_nxv8f64_unmasked_commute(<vscale x 8 x double> %va, double %b, <vscale x 8 x double> %vc, i32 zeroext %evl) {
3560; CHECK-LABEL: vfma_vf_nxv8f64_unmasked_commute:
3561; CHECK:       # %bb.0:
3562; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma
3563; CHECK-NEXT:    vfmadd.vf v8, fa0, v16
3564; CHECK-NEXT:    ret
3565  %elt.head = insertelement <vscale x 8 x double> poison, double %b, i32 0
3566  %vb = shufflevector <vscale x 8 x double> %elt.head, <vscale x 8 x double> poison, <vscale x 8 x i32> zeroinitializer
3567  %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %vb, <vscale x 8 x double> %va, <vscale x 8 x double> %vc, <vscale x 8 x i1> splat (i1 true), i32 %evl)
3568  ret <vscale x 8 x double> %v
3569}
3570
3571declare <vscale x 16 x double> @llvm.vp.fma.nxv16f64(<vscale x 16 x double>, <vscale x 16 x double>, <vscale x 16 x double>, <vscale x 16 x i1>, i32)
3572
3573define <vscale x 16 x double> @vfma_vv_nxv16f64(<vscale x 16 x double> %va, <vscale x 16 x double> %b, <vscale x 16 x double> %c, <vscale x 16 x i1> %m, i32 zeroext %evl) {
3574; CHECK-LABEL: vfma_vv_nxv16f64:
3575; CHECK:       # %bb.0:
3576; CHECK-NEXT:    addi sp, sp, -16
3577; CHECK-NEXT:    .cfi_def_cfa_offset 16
3578; CHECK-NEXT:    csrr a1, vlenb
3579; CHECK-NEXT:    slli a1, a1, 4
3580; CHECK-NEXT:    mv a3, a1
3581; CHECK-NEXT:    slli a1, a1, 1
3582; CHECK-NEXT:    add a1, a1, a3
3583; CHECK-NEXT:    sub sp, sp, a1
3584; CHECK-NEXT:    .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x30, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 48 * vlenb
3585; CHECK-NEXT:    vsetvli a1, zero, e8, mf4, ta, ma
3586; CHECK-NEXT:    vmv1r.v v7, v0
3587; CHECK-NEXT:    csrr a1, vlenb
3588; CHECK-NEXT:    slli a1, a1, 3
3589; CHECK-NEXT:    mv a3, a1
3590; CHECK-NEXT:    slli a1, a1, 1
3591; CHECK-NEXT:    add a1, a1, a3
3592; CHECK-NEXT:    add a1, sp, a1
3593; CHECK-NEXT:    addi a1, a1, 16
3594; CHECK-NEXT:    vs8r.v v16, (a1) # Unknown-size Folded Spill
3595; CHECK-NEXT:    csrr a1, vlenb
3596; CHECK-NEXT:    slli a1, a1, 5
3597; CHECK-NEXT:    add a1, sp, a1
3598; CHECK-NEXT:    addi a1, a1, 16
3599; CHECK-NEXT:    vs8r.v v8, (a1) # Unknown-size Folded Spill
3600; CHECK-NEXT:    csrr a1, vlenb
3601; CHECK-NEXT:    srli a3, a1, 3
3602; CHECK-NEXT:    slli a5, a1, 3
3603; CHECK-NEXT:    sub a6, a4, a1
3604; CHECK-NEXT:    add a7, a2, a5
3605; CHECK-NEXT:    add a5, a0, a5
3606; CHECK-NEXT:    vl8re64.v v8, (a7)
3607; CHECK-NEXT:    csrr a7, vlenb
3608; CHECK-NEXT:    slli a7, a7, 3
3609; CHECK-NEXT:    add a7, sp, a7
3610; CHECK-NEXT:    addi a7, a7, 16
3611; CHECK-NEXT:    vs8r.v v8, (a7) # Unknown-size Folded Spill
3612; CHECK-NEXT:    sltu a7, a4, a6
3613; CHECK-NEXT:    addi a7, a7, -1
3614; CHECK-NEXT:    vl8re64.v v8, (a5)
3615; CHECK-NEXT:    csrr a5, vlenb
3616; CHECK-NEXT:    slli a5, a5, 3
3617; CHECK-NEXT:    mv t0, a5
3618; CHECK-NEXT:    slli a5, a5, 2
3619; CHECK-NEXT:    add a5, a5, t0
3620; CHECK-NEXT:    add a5, sp, a5
3621; CHECK-NEXT:    addi a5, a5, 16
3622; CHECK-NEXT:    vs8r.v v8, (a5) # Unknown-size Folded Spill
3623; CHECK-NEXT:    vl8re64.v v8, (a2)
3624; CHECK-NEXT:    csrr a2, vlenb
3625; CHECK-NEXT:    slli a2, a2, 4
3626; CHECK-NEXT:    add a2, sp, a2
3627; CHECK-NEXT:    addi a2, a2, 16
3628; CHECK-NEXT:    vs8r.v v8, (a2) # Unknown-size Folded Spill
3629; CHECK-NEXT:    vl8re64.v v8, (a0)
3630; CHECK-NEXT:    addi a0, sp, 16
3631; CHECK-NEXT:    vs8r.v v8, (a0) # Unknown-size Folded Spill
3632; CHECK-NEXT:    vslidedown.vx v0, v0, a3
3633; CHECK-NEXT:    and a0, a7, a6
3634; CHECK-NEXT:    csrr a2, vlenb
3635; CHECK-NEXT:    slli a2, a2, 3
3636; CHECK-NEXT:    mv a3, a2
3637; CHECK-NEXT:    slli a2, a2, 1
3638; CHECK-NEXT:    add a2, a2, a3
3639; CHECK-NEXT:    add a2, sp, a2
3640; CHECK-NEXT:    addi a2, a2, 16
3641; CHECK-NEXT:    vl8r.v v24, (a2) # Unknown-size Folded Reload
3642; CHECK-NEXT:    csrr a2, vlenb
3643; CHECK-NEXT:    slli a2, a2, 3
3644; CHECK-NEXT:    add a2, sp, a2
3645; CHECK-NEXT:    addi a2, a2, 16
3646; CHECK-NEXT:    vl8r.v v16, (a2) # Unknown-size Folded Reload
3647; CHECK-NEXT:    csrr a2, vlenb
3648; CHECK-NEXT:    slli a2, a2, 3
3649; CHECK-NEXT:    mv a3, a2
3650; CHECK-NEXT:    slli a2, a2, 2
3651; CHECK-NEXT:    add a2, a2, a3
3652; CHECK-NEXT:    add a2, sp, a2
3653; CHECK-NEXT:    addi a2, a2, 16
3654; CHECK-NEXT:    vl8r.v v8, (a2) # Unknown-size Folded Reload
3655; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma
3656; CHECK-NEXT:    vfmadd.vv v8, v24, v16, v0.t
3657; CHECK-NEXT:    csrr a0, vlenb
3658; CHECK-NEXT:    slli a0, a0, 3
3659; CHECK-NEXT:    mv a2, a0
3660; CHECK-NEXT:    slli a0, a0, 2
3661; CHECK-NEXT:    add a0, a0, a2
3662; CHECK-NEXT:    add a0, sp, a0
3663; CHECK-NEXT:    addi a0, a0, 16
3664; CHECK-NEXT:    vs8r.v v8, (a0) # Unknown-size Folded Spill
3665; CHECK-NEXT:    bltu a4, a1, .LBB128_2
3666; CHECK-NEXT:  # %bb.1:
3667; CHECK-NEXT:    mv a4, a1
3668; CHECK-NEXT:  .LBB128_2:
3669; CHECK-NEXT:    vmv1r.v v0, v7
3670; CHECK-NEXT:    csrr a0, vlenb
3671; CHECK-NEXT:    slli a0, a0, 5
3672; CHECK-NEXT:    add a0, sp, a0
3673; CHECK-NEXT:    addi a0, a0, 16
3674; CHECK-NEXT:    vl8r.v v24, (a0) # Unknown-size Folded Reload
3675; CHECK-NEXT:    csrr a0, vlenb
3676; CHECK-NEXT:    slli a0, a0, 4
3677; CHECK-NEXT:    add a0, sp, a0
3678; CHECK-NEXT:    addi a0, a0, 16
3679; CHECK-NEXT:    vl8r.v v16, (a0) # Unknown-size Folded Reload
3680; CHECK-NEXT:    addi a0, sp, 16
3681; CHECK-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
3682; CHECK-NEXT:    vsetvli zero, a4, e64, m8, ta, ma
3683; CHECK-NEXT:    vfmadd.vv v8, v24, v16, v0.t
3684; CHECK-NEXT:    csrr a0, vlenb
3685; CHECK-NEXT:    slli a0, a0, 3
3686; CHECK-NEXT:    mv a1, a0
3687; CHECK-NEXT:    slli a0, a0, 2
3688; CHECK-NEXT:    add a0, a0, a1
3689; CHECK-NEXT:    add a0, sp, a0
3690; CHECK-NEXT:    addi a0, a0, 16
3691; CHECK-NEXT:    vl8r.v v16, (a0) # Unknown-size Folded Reload
3692; CHECK-NEXT:    csrr a0, vlenb
3693; CHECK-NEXT:    slli a0, a0, 4
3694; CHECK-NEXT:    mv a1, a0
3695; CHECK-NEXT:    slli a0, a0, 1
3696; CHECK-NEXT:    add a0, a0, a1
3697; CHECK-NEXT:    add sp, sp, a0
3698; CHECK-NEXT:    .cfi_def_cfa sp, 16
3699; CHECK-NEXT:    addi sp, sp, 16
3700; CHECK-NEXT:    .cfi_def_cfa_offset 0
3701; CHECK-NEXT:    ret
3702  %v = call <vscale x 16 x double> @llvm.vp.fma.nxv16f64(<vscale x 16 x double> %va, <vscale x 16 x double> %b, <vscale x 16 x double> %c, <vscale x 16 x i1> %m, i32 %evl)
3703  ret <vscale x 16 x double> %v
3704}
3705
3706define <vscale x 16 x double> @vfma_vv_nxv16f64_unmasked(<vscale x 16 x double> %va, <vscale x 16 x double> %b, <vscale x 16 x double> %c, i32 zeroext %evl) {
3707; CHECK-LABEL: vfma_vv_nxv16f64_unmasked:
3708; CHECK:       # %bb.0:
3709; CHECK-NEXT:    addi sp, sp, -16
3710; CHECK-NEXT:    .cfi_def_cfa_offset 16
3711; CHECK-NEXT:    csrr a1, vlenb
3712; CHECK-NEXT:    slli a1, a1, 5
3713; CHECK-NEXT:    sub sp, sp, a1
3714; CHECK-NEXT:    .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 32 * vlenb
3715; CHECK-NEXT:    csrr a1, vlenb
3716; CHECK-NEXT:    slli a1, a1, 4
3717; CHECK-NEXT:    add a1, sp, a1
3718; CHECK-NEXT:    addi a1, a1, 16
3719; CHECK-NEXT:    vs8r.v v16, (a1) # Unknown-size Folded Spill
3720; CHECK-NEXT:    csrr a1, vlenb
3721; CHECK-NEXT:    slli a1, a1, 3
3722; CHECK-NEXT:    mv a3, a1
3723; CHECK-NEXT:    slli a1, a1, 1
3724; CHECK-NEXT:    add a1, a1, a3
3725; CHECK-NEXT:    add a1, sp, a1
3726; CHECK-NEXT:    addi a1, a1, 16
3727; CHECK-NEXT:    vs8r.v v8, (a1) # Unknown-size Folded Spill
3728; CHECK-NEXT:    csrr a1, vlenb
3729; CHECK-NEXT:    slli a3, a1, 3
3730; CHECK-NEXT:    add a5, a2, a3
3731; CHECK-NEXT:    vl8re64.v v8, (a5)
3732; CHECK-NEXT:    csrr a5, vlenb
3733; CHECK-NEXT:    slli a5, a5, 3
3734; CHECK-NEXT:    add a5, sp, a5
3735; CHECK-NEXT:    addi a5, a5, 16
3736; CHECK-NEXT:    vs8r.v v8, (a5) # Unknown-size Folded Spill
3737; CHECK-NEXT:    sub a5, a4, a1
3738; CHECK-NEXT:    add a3, a0, a3
3739; CHECK-NEXT:    vl8re64.v v24, (a3)
3740; CHECK-NEXT:    sltu a3, a4, a5
3741; CHECK-NEXT:    vl8re64.v v8, (a2)
3742; CHECK-NEXT:    addi a2, sp, 16
3743; CHECK-NEXT:    vs8r.v v8, (a2) # Unknown-size Folded Spill
3744; CHECK-NEXT:    vl8re64.v v0, (a0)
3745; CHECK-NEXT:    addi a3, a3, -1
3746; CHECK-NEXT:    and a3, a3, a5
3747; CHECK-NEXT:    csrr a0, vlenb
3748; CHECK-NEXT:    slli a0, a0, 4
3749; CHECK-NEXT:    add a0, sp, a0
3750; CHECK-NEXT:    addi a0, a0, 16
3751; CHECK-NEXT:    vl8r.v v16, (a0) # Unknown-size Folded Reload
3752; CHECK-NEXT:    csrr a0, vlenb
3753; CHECK-NEXT:    slli a0, a0, 3
3754; CHECK-NEXT:    add a0, sp, a0
3755; CHECK-NEXT:    addi a0, a0, 16
3756; CHECK-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
3757; CHECK-NEXT:    vsetvli zero, a3, e64, m8, ta, ma
3758; CHECK-NEXT:    vfmadd.vv v24, v16, v8
3759; CHECK-NEXT:    bltu a4, a1, .LBB129_2
3760; CHECK-NEXT:  # %bb.1:
3761; CHECK-NEXT:    mv a4, a1
3762; CHECK-NEXT:  .LBB129_2:
3763; CHECK-NEXT:    csrr a0, vlenb
3764; CHECK-NEXT:    slli a0, a0, 3
3765; CHECK-NEXT:    mv a1, a0
3766; CHECK-NEXT:    slli a0, a0, 1
3767; CHECK-NEXT:    add a0, a0, a1
3768; CHECK-NEXT:    add a0, sp, a0
3769; CHECK-NEXT:    addi a0, a0, 16
3770; CHECK-NEXT:    vl8r.v v16, (a0) # Unknown-size Folded Reload
3771; CHECK-NEXT:    addi a0, sp, 16
3772; CHECK-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
3773; CHECK-NEXT:    vsetvli zero, a4, e64, m8, ta, ma
3774; CHECK-NEXT:    vfmadd.vv v0, v16, v8
3775; CHECK-NEXT:    vmv.v.v v8, v0
3776; CHECK-NEXT:    vmv8r.v v16, v24
3777; CHECK-NEXT:    csrr a0, vlenb
3778; CHECK-NEXT:    slli a0, a0, 5
3779; CHECK-NEXT:    add sp, sp, a0
3780; CHECK-NEXT:    .cfi_def_cfa sp, 16
3781; CHECK-NEXT:    addi sp, sp, 16
3782; CHECK-NEXT:    .cfi_def_cfa_offset 0
3783; CHECK-NEXT:    ret
3784  %v = call <vscale x 16 x double> @llvm.vp.fma.nxv16f64(<vscale x 16 x double> %va, <vscale x 16 x double> %b, <vscale x 16 x double> %c, <vscale x 16 x i1> splat (i1 true), i32 %evl)
3785  ret <vscale x 16 x double> %v
3786}
3787
3788declare <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half>, <vscale x 1 x i1>, i32)
3789
3790define <vscale x 1 x half> @vfmsub_vv_nxv1f16(<vscale x 1 x half> %va, <vscale x 1 x half> %b, <vscale x 1 x half> %c, <vscale x 1 x i1> %m, i32 zeroext %evl) {
3791; ZVFH-LABEL: vfmsub_vv_nxv1f16:
3792; ZVFH:       # %bb.0:
3793; ZVFH-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
3794; ZVFH-NEXT:    vfmsub.vv v9, v8, v10, v0.t
3795; ZVFH-NEXT:    vmv1r.v v8, v9
3796; ZVFH-NEXT:    ret
3797;
3798; ZVFHMIN-LABEL: vfmsub_vv_nxv1f16:
3799; ZVFHMIN:       # %bb.0:
3800; ZVFHMIN-NEXT:    lui a1, 8
3801; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
3802; ZVFHMIN-NEXT:    vxor.vx v10, v10, a1, v0.t
3803; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v10, v0.t
3804; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v8, v0.t
3805; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v9, v0.t
3806; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, mf2, ta, ma
3807; ZVFHMIN-NEXT:    vfmadd.vv v12, v10, v11, v0.t
3808; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf4, ta, ma
3809; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v12, v0.t
3810; ZVFHMIN-NEXT:    ret
3811  %negc = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %c, <vscale x 1 x i1> %m, i32 %evl)
3812  %v = call <vscale x 1 x half> @llvm.vp.fma.nxv1f16(<vscale x 1 x half> %va, <vscale x 1 x half> %b, <vscale x 1 x half> %negc, <vscale x 1 x i1> %m, i32 %evl)
3813  ret <vscale x 1 x half> %v
3814}
3815
3816define <vscale x 1 x half> @vfmsub_vv_nxv1f16_unmasked(<vscale x 1 x half> %va, <vscale x 1 x half> %b, <vscale x 1 x half> %c, i32 zeroext %evl) {
3817; ZVFH-LABEL: vfmsub_vv_nxv1f16_unmasked:
3818; ZVFH:       # %bb.0:
3819; ZVFH-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
3820; ZVFH-NEXT:    vfmsub.vv v8, v9, v10
3821; ZVFH-NEXT:    ret
3822;
3823; ZVFHMIN-LABEL: vfmsub_vv_nxv1f16_unmasked:
3824; ZVFHMIN:       # %bb.0:
3825; ZVFHMIN-NEXT:    lui a1, 8
3826; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
3827; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v8
3828; ZVFHMIN-NEXT:    vxor.vx v8, v10, a1
3829; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v8
3830; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v9
3831; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, mf2, ta, ma
3832; ZVFHMIN-NEXT:    vfmadd.vv v12, v11, v10
3833; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf4, ta, ma
3834; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v12
3835; ZVFHMIN-NEXT:    ret
3836  %negc = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %c, <vscale x 1 x i1> splat (i1 true), i32 %evl)
3837  %v = call <vscale x 1 x half> @llvm.vp.fma.nxv1f16(<vscale x 1 x half> %va, <vscale x 1 x half> %b, <vscale x 1 x half> %negc, <vscale x 1 x i1> splat (i1 true), i32 %evl)
3838  ret <vscale x 1 x half> %v
3839}
3840
3841define <vscale x 1 x half> @vfmsub_vf_nxv1f16(<vscale x 1 x half> %va, half %b, <vscale x 1 x half> %vc, <vscale x 1 x i1> %m, i32 zeroext %evl) {
3842; ZVFH-LABEL: vfmsub_vf_nxv1f16:
3843; ZVFH:       # %bb.0:
3844; ZVFH-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
3845; ZVFH-NEXT:    vfmsub.vf v8, fa0, v9, v0.t
3846; ZVFH-NEXT:    ret
3847;
3848; ZVFHMIN-LABEL: vfmsub_vf_nxv1f16:
3849; ZVFHMIN:       # %bb.0:
3850; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
3851; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
3852; ZVFHMIN-NEXT:    vmv.v.x v10, a1
3853; ZVFHMIN-NEXT:    lui a0, 8
3854; ZVFHMIN-NEXT:    vxor.vx v9, v9, a0, v0.t
3855; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v9, v0.t
3856; ZVFHMIN-NEXT:    vfwcvt.f.f.v v9, v8, v0.t
3857; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v10, v0.t
3858; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, mf2, ta, ma
3859; ZVFHMIN-NEXT:    vfmadd.vv v12, v9, v11, v0.t
3860; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf4, ta, ma
3861; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v12, v0.t
3862; ZVFHMIN-NEXT:    ret
3863  %elt.head = insertelement <vscale x 1 x half> poison, half %b, i32 0
3864  %vb = shufflevector <vscale x 1 x half> %elt.head, <vscale x 1 x half> poison, <vscale x 1 x i32> zeroinitializer
3865  %negvc = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %vc, <vscale x 1 x i1> %m, i32 %evl)
3866  %v = call <vscale x 1 x half> @llvm.vp.fma.nxv1f16(<vscale x 1 x half> %va, <vscale x 1 x half> %vb, <vscale x 1 x half> %negvc, <vscale x 1 x i1> %m, i32 %evl)
3867  ret <vscale x 1 x half> %v
3868}
3869
3870define <vscale x 1 x half> @vfmsub_vf_nxv1f16_commute(<vscale x 1 x half> %va, half %b, <vscale x 1 x half> %vc, <vscale x 1 x i1> %m, i32 zeroext %evl) {
3871; ZVFH-LABEL: vfmsub_vf_nxv1f16_commute:
3872; ZVFH:       # %bb.0:
3873; ZVFH-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
3874; ZVFH-NEXT:    vfmsub.vf v8, fa0, v9, v0.t
3875; ZVFH-NEXT:    ret
3876;
3877; ZVFHMIN-LABEL: vfmsub_vf_nxv1f16_commute:
3878; ZVFHMIN:       # %bb.0:
3879; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
3880; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
3881; ZVFHMIN-NEXT:    vmv.v.x v10, a1
3882; ZVFHMIN-NEXT:    lui a0, 8
3883; ZVFHMIN-NEXT:    vxor.vx v9, v9, a0, v0.t
3884; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v9, v0.t
3885; ZVFHMIN-NEXT:    vfwcvt.f.f.v v9, v8, v0.t
3886; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v10, v0.t
3887; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, mf2, ta, ma
3888; ZVFHMIN-NEXT:    vfmadd.vv v9, v8, v11, v0.t
3889; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf4, ta, ma
3890; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v9, v0.t
3891; ZVFHMIN-NEXT:    ret
3892  %elt.head = insertelement <vscale x 1 x half> poison, half %b, i32 0
3893  %vb = shufflevector <vscale x 1 x half> %elt.head, <vscale x 1 x half> poison, <vscale x 1 x i32> zeroinitializer
3894  %negvc = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %vc, <vscale x 1 x i1> %m, i32 %evl)
3895  %v = call <vscale x 1 x half> @llvm.vp.fma.nxv1f16(<vscale x 1 x half> %vb, <vscale x 1 x half> %va, <vscale x 1 x half> %negvc, <vscale x 1 x i1> %m, i32 %evl)
3896  ret <vscale x 1 x half> %v
3897}
3898
3899define <vscale x 1 x half> @vfmsub_vf_nxv1f16_unmasked(<vscale x 1 x half> %va, half %b, <vscale x 1 x half> %vc, i32 zeroext %evl) {
3900; ZVFH-LABEL: vfmsub_vf_nxv1f16_unmasked:
3901; ZVFH:       # %bb.0:
3902; ZVFH-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
3903; ZVFH-NEXT:    vfmsub.vf v8, fa0, v9
3904; ZVFH-NEXT:    ret
3905;
3906; ZVFHMIN-LABEL: vfmsub_vf_nxv1f16_unmasked:
3907; ZVFHMIN:       # %bb.0:
3908; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
3909; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
3910; ZVFHMIN-NEXT:    vmv.v.x v10, a1
3911; ZVFHMIN-NEXT:    lui a0, 8
3912; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v8
3913; ZVFHMIN-NEXT:    vxor.vx v8, v9, a0
3914; ZVFHMIN-NEXT:    vfwcvt.f.f.v v9, v8
3915; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v10
3916; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, mf2, ta, ma
3917; ZVFHMIN-NEXT:    vfmadd.vv v12, v11, v9
3918; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf4, ta, ma
3919; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v12
3920; ZVFHMIN-NEXT:    ret
3921  %elt.head = insertelement <vscale x 1 x half> poison, half %b, i32 0
3922  %vb = shufflevector <vscale x 1 x half> %elt.head, <vscale x 1 x half> poison, <vscale x 1 x i32> zeroinitializer
3923  %negvc = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %vc, <vscale x 1 x i1> splat (i1 true), i32 %evl)
3924  %v = call <vscale x 1 x half> @llvm.vp.fma.nxv1f16(<vscale x 1 x half> %va, <vscale x 1 x half> %vb, <vscale x 1 x half> %negvc, <vscale x 1 x i1> splat (i1 true), i32 %evl)
3925  ret <vscale x 1 x half> %v
3926}
3927
3928define <vscale x 1 x half> @vfmsub_vf_nxv1f16_unmasked_commute(<vscale x 1 x half> %va, half %b, <vscale x 1 x half> %vc, i32 zeroext %evl) {
3929; ZVFH-LABEL: vfmsub_vf_nxv1f16_unmasked_commute:
3930; ZVFH:       # %bb.0:
3931; ZVFH-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
3932; ZVFH-NEXT:    vfmsub.vf v8, fa0, v9
3933; ZVFH-NEXT:    ret
3934;
3935; ZVFHMIN-LABEL: vfmsub_vf_nxv1f16_unmasked_commute:
3936; ZVFHMIN:       # %bb.0:
3937; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
3938; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
3939; ZVFHMIN-NEXT:    vmv.v.x v10, a1
3940; ZVFHMIN-NEXT:    lui a0, 8
3941; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v8
3942; ZVFHMIN-NEXT:    vxor.vx v8, v9, a0
3943; ZVFHMIN-NEXT:    vfwcvt.f.f.v v9, v8
3944; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v10
3945; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, mf2, ta, ma
3946; ZVFHMIN-NEXT:    vfmadd.vv v12, v11, v9
3947; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf4, ta, ma
3948; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v12
3949; ZVFHMIN-NEXT:    ret
3950  %elt.head = insertelement <vscale x 1 x half> poison, half %b, i32 0
3951  %vb = shufflevector <vscale x 1 x half> %elt.head, <vscale x 1 x half> poison, <vscale x 1 x i32> zeroinitializer
3952  %negvc = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %vc, <vscale x 1 x i1> splat (i1 true), i32 %evl)
3953  %v = call <vscale x 1 x half> @llvm.vp.fma.nxv1f16(<vscale x 1 x half> %vb, <vscale x 1 x half> %va, <vscale x 1 x half> %negvc, <vscale x 1 x i1> splat (i1 true), i32 %evl)
3954  ret <vscale x 1 x half> %v
3955}
3956
3957define <vscale x 1 x half> @vfnmadd_vv_nxv1f16(<vscale x 1 x half> %va, <vscale x 1 x half> %b, <vscale x 1 x half> %c, <vscale x 1 x i1> %m, i32 zeroext %evl) {
3958; ZVFH-LABEL: vfnmadd_vv_nxv1f16:
3959; ZVFH:       # %bb.0:
3960; ZVFH-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
3961; ZVFH-NEXT:    vfnmadd.vv v9, v8, v10, v0.t
3962; ZVFH-NEXT:    vmv1r.v v8, v9
3963; ZVFH-NEXT:    ret
3964;
3965; ZVFHMIN-LABEL: vfnmadd_vv_nxv1f16:
3966; ZVFHMIN:       # %bb.0:
3967; ZVFHMIN-NEXT:    lui a1, 8
3968; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
3969; ZVFHMIN-NEXT:    vxor.vx v9, v9, a1, v0.t
3970; ZVFHMIN-NEXT:    vxor.vx v10, v10, a1, v0.t
3971; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v10, v0.t
3972; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v9, v0.t
3973; ZVFHMIN-NEXT:    vfwcvt.f.f.v v9, v8, v0.t
3974; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, mf2, ta, ma
3975; ZVFHMIN-NEXT:    vfmadd.vv v10, v9, v11, v0.t
3976; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf4, ta, ma
3977; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v10, v0.t
3978; ZVFHMIN-NEXT:    ret
3979  %negb = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %b, <vscale x 1 x i1> %m, i32 %evl)
3980  %negc = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %c, <vscale x 1 x i1> %m, i32 %evl)
3981  %v = call <vscale x 1 x half> @llvm.vp.fma.nxv1f16(<vscale x 1 x half> %va, <vscale x 1 x half> %negb, <vscale x 1 x half> %negc, <vscale x 1 x i1> %m, i32 %evl)
3982  ret <vscale x 1 x half> %v
3983}
3984
3985define <vscale x 1 x half> @vfnmadd_vv_nxv1f16_commuted(<vscale x 1 x half> %va, <vscale x 1 x half> %b, <vscale x 1 x half> %c, <vscale x 1 x i1> %m, i32 zeroext %evl) {
3986; ZVFH-LABEL: vfnmadd_vv_nxv1f16_commuted:
3987; ZVFH:       # %bb.0:
3988; ZVFH-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
3989; ZVFH-NEXT:    vfnmadd.vv v8, v9, v10, v0.t
3990; ZVFH-NEXT:    ret
3991;
3992; ZVFHMIN-LABEL: vfnmadd_vv_nxv1f16_commuted:
3993; ZVFHMIN:       # %bb.0:
3994; ZVFHMIN-NEXT:    lui a1, 8
3995; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
3996; ZVFHMIN-NEXT:    vxor.vx v9, v9, a1, v0.t
3997; ZVFHMIN-NEXT:    vxor.vx v10, v10, a1, v0.t
3998; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v10, v0.t
3999; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v9, v0.t
4000; ZVFHMIN-NEXT:    vfwcvt.f.f.v v9, v8, v0.t
4001; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, mf2, ta, ma
4002; ZVFHMIN-NEXT:    vfmadd.vv v9, v10, v11, v0.t
4003; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf4, ta, ma
4004; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v9, v0.t
4005; ZVFHMIN-NEXT:    ret
4006  %negb = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %b, <vscale x 1 x i1> %m, i32 %evl)
4007  %negc = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %c, <vscale x 1 x i1> %m, i32 %evl)
4008  %v = call <vscale x 1 x half> @llvm.vp.fma.nxv1f16(<vscale x 1 x half> %negb, <vscale x 1 x half> %va, <vscale x 1 x half> %negc, <vscale x 1 x i1> %m, i32 %evl)
4009  ret <vscale x 1 x half> %v
4010}
4011
4012define <vscale x 1 x half> @vfnmadd_vv_nxv1f16_unmasked(<vscale x 1 x half> %va, <vscale x 1 x half> %b, <vscale x 1 x half> %c, i32 zeroext %evl) {
4013; ZVFH-LABEL: vfnmadd_vv_nxv1f16_unmasked:
4014; ZVFH:       # %bb.0:
4015; ZVFH-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
4016; ZVFH-NEXT:    vfnmadd.vv v8, v9, v10
4017; ZVFH-NEXT:    ret
4018;
4019; ZVFHMIN-LABEL: vfnmadd_vv_nxv1f16_unmasked:
4020; ZVFHMIN:       # %bb.0:
4021; ZVFHMIN-NEXT:    lui a1, 8
4022; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
4023; ZVFHMIN-NEXT:    vxor.vx v9, v9, a1
4024; ZVFHMIN-NEXT:    vxor.vx v10, v10, a1
4025; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v10
4026; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v9
4027; ZVFHMIN-NEXT:    vfwcvt.f.f.v v9, v8
4028; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, mf2, ta, ma
4029; ZVFHMIN-NEXT:    vfmadd.vv v9, v10, v11
4030; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf4, ta, ma
4031; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v9
4032; ZVFHMIN-NEXT:    ret
4033  %negb = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %b, <vscale x 1 x i1> splat (i1 true), i32 %evl)
4034  %negc = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %c, <vscale x 1 x i1> splat (i1 true), i32 %evl)
4035  %v = call <vscale x 1 x half> @llvm.vp.fma.nxv1f16(<vscale x 1 x half> %va, <vscale x 1 x half> %negb, <vscale x 1 x half> %negc, <vscale x 1 x i1> splat (i1 true), i32 %evl)
4036  ret <vscale x 1 x half> %v
4037}
4038
4039define <vscale x 1 x half> @vfnmadd_vv_nxv1f16_unmasked_commuted(<vscale x 1 x half> %va, <vscale x 1 x half> %b, <vscale x 1 x half> %c, i32 zeroext %evl) {
4040; ZVFH-LABEL: vfnmadd_vv_nxv1f16_unmasked_commuted:
4041; ZVFH:       # %bb.0:
4042; ZVFH-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
4043; ZVFH-NEXT:    vfnmadd.vv v8, v9, v10
4044; ZVFH-NEXT:    ret
4045;
4046; ZVFHMIN-LABEL: vfnmadd_vv_nxv1f16_unmasked_commuted:
4047; ZVFHMIN:       # %bb.0:
4048; ZVFHMIN-NEXT:    lui a1, 8
4049; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
4050; ZVFHMIN-NEXT:    vxor.vx v9, v9, a1
4051; ZVFHMIN-NEXT:    vxor.vx v10, v10, a1
4052; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v10
4053; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v9
4054; ZVFHMIN-NEXT:    vfwcvt.f.f.v v9, v8
4055; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, mf2, ta, ma
4056; ZVFHMIN-NEXT:    vfmadd.vv v9, v10, v11
4057; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf4, ta, ma
4058; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v9
4059; ZVFHMIN-NEXT:    ret
4060  %negb = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %b, <vscale x 1 x i1> splat (i1 true), i32 %evl)
4061  %negc = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %c, <vscale x 1 x i1> splat (i1 true), i32 %evl)
4062  %v = call <vscale x 1 x half> @llvm.vp.fma.nxv1f16(<vscale x 1 x half> %negb, <vscale x 1 x half> %va, <vscale x 1 x half> %negc, <vscale x 1 x i1> splat (i1 true), i32 %evl)
4063  ret <vscale x 1 x half> %v
4064}
4065
4066define <vscale x 1 x half> @vfnmadd_vf_nxv1f16(<vscale x 1 x half> %va, half %b, <vscale x 1 x half> %vc, <vscale x 1 x i1> %m, i32 zeroext %evl) {
4067; ZVFH-LABEL: vfnmadd_vf_nxv1f16:
4068; ZVFH:       # %bb.0:
4069; ZVFH-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
4070; ZVFH-NEXT:    vfnmadd.vf v8, fa0, v9, v0.t
4071; ZVFH-NEXT:    ret
4072;
4073; ZVFHMIN-LABEL: vfnmadd_vf_nxv1f16:
4074; ZVFHMIN:       # %bb.0:
4075; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
4076; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
4077; ZVFHMIN-NEXT:    vmv.v.x v10, a1
4078; ZVFHMIN-NEXT:    lui a0, 8
4079; ZVFHMIN-NEXT:    vxor.vx v8, v8, a0, v0.t
4080; ZVFHMIN-NEXT:    vxor.vx v9, v9, a0, v0.t
4081; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v9, v0.t
4082; ZVFHMIN-NEXT:    vfwcvt.f.f.v v9, v8, v0.t
4083; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v10, v0.t
4084; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, mf2, ta, ma
4085; ZVFHMIN-NEXT:    vfmadd.vv v12, v9, v11, v0.t
4086; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf4, ta, ma
4087; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v12, v0.t
4088; ZVFHMIN-NEXT:    ret
4089  %elt.head = insertelement <vscale x 1 x half> poison, half %b, i32 0
4090  %vb = shufflevector <vscale x 1 x half> %elt.head, <vscale x 1 x half> poison, <vscale x 1 x i32> zeroinitializer
4091  %negva = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %va, <vscale x 1 x i1> %m, i32 %evl)
4092  %negvc = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %vc, <vscale x 1 x i1> %m, i32 %evl)
4093  %v = call <vscale x 1 x half> @llvm.vp.fma.nxv1f16(<vscale x 1 x half> %negva, <vscale x 1 x half> %vb, <vscale x 1 x half> %negvc, <vscale x 1 x i1> %m, i32 %evl)
4094  ret <vscale x 1 x half> %v
4095}
4096
4097define <vscale x 1 x half> @vfnmadd_vf_nxv1f16_commute(<vscale x 1 x half> %va, half %b, <vscale x 1 x half> %vc, <vscale x 1 x i1> %m, i32 zeroext %evl) {
4098; ZVFH-LABEL: vfnmadd_vf_nxv1f16_commute:
4099; ZVFH:       # %bb.0:
4100; ZVFH-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
4101; ZVFH-NEXT:    vfnmadd.vf v8, fa0, v9, v0.t
4102; ZVFH-NEXT:    ret
4103;
4104; ZVFHMIN-LABEL: vfnmadd_vf_nxv1f16_commute:
4105; ZVFHMIN:       # %bb.0:
4106; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
4107; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
4108; ZVFHMIN-NEXT:    vmv.v.x v10, a1
4109; ZVFHMIN-NEXT:    lui a0, 8
4110; ZVFHMIN-NEXT:    vxor.vx v8, v8, a0, v0.t
4111; ZVFHMIN-NEXT:    vxor.vx v9, v9, a0, v0.t
4112; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v9, v0.t
4113; ZVFHMIN-NEXT:    vfwcvt.f.f.v v9, v8, v0.t
4114; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v10, v0.t
4115; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, mf2, ta, ma
4116; ZVFHMIN-NEXT:    vfmadd.vv v9, v8, v11, v0.t
4117; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf4, ta, ma
4118; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v9, v0.t
4119; ZVFHMIN-NEXT:    ret
4120  %elt.head = insertelement <vscale x 1 x half> poison, half %b, i32 0
4121  %vb = shufflevector <vscale x 1 x half> %elt.head, <vscale x 1 x half> poison, <vscale x 1 x i32> zeroinitializer
4122  %negva = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %va, <vscale x 1 x i1> %m, i32 %evl)
4123  %negvc = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %vc, <vscale x 1 x i1> %m, i32 %evl)
4124  %v = call <vscale x 1 x half> @llvm.vp.fma.nxv1f16(<vscale x 1 x half> %vb, <vscale x 1 x half> %negva, <vscale x 1 x half> %negvc, <vscale x 1 x i1> %m, i32 %evl)
4125  ret <vscale x 1 x half> %v
4126}
4127
4128define <vscale x 1 x half> @vfnmadd_vf_nxv1f16_unmasked(<vscale x 1 x half> %va, half %b, <vscale x 1 x half> %vc, i32 zeroext %evl) {
4129; ZVFH-LABEL: vfnmadd_vf_nxv1f16_unmasked:
4130; ZVFH:       # %bb.0:
4131; ZVFH-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
4132; ZVFH-NEXT:    vfnmadd.vf v8, fa0, v9
4133; ZVFH-NEXT:    ret
4134;
4135; ZVFHMIN-LABEL: vfnmadd_vf_nxv1f16_unmasked:
4136; ZVFHMIN:       # %bb.0:
4137; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
4138; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
4139; ZVFHMIN-NEXT:    vmv.v.x v10, a1
4140; ZVFHMIN-NEXT:    lui a0, 8
4141; ZVFHMIN-NEXT:    vxor.vx v8, v8, a0
4142; ZVFHMIN-NEXT:    vxor.vx v9, v9, a0
4143; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v9
4144; ZVFHMIN-NEXT:    vfwcvt.f.f.v v9, v8
4145; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v10
4146; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, mf2, ta, ma
4147; ZVFHMIN-NEXT:    vfmadd.vv v12, v9, v11
4148; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf4, ta, ma
4149; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v12
4150; ZVFHMIN-NEXT:    ret
4151  %elt.head = insertelement <vscale x 1 x half> poison, half %b, i32 0
4152  %vb = shufflevector <vscale x 1 x half> %elt.head, <vscale x 1 x half> poison, <vscale x 1 x i32> zeroinitializer
4153  %negva = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %va, <vscale x 1 x i1> splat (i1 true), i32 %evl)
4154  %negvc = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %vc, <vscale x 1 x i1> splat (i1 true), i32 %evl)
4155  %v = call <vscale x 1 x half> @llvm.vp.fma.nxv1f16(<vscale x 1 x half> %negva, <vscale x 1 x half> %vb, <vscale x 1 x half> %negvc, <vscale x 1 x i1> splat (i1 true), i32 %evl)
4156  ret <vscale x 1 x half> %v
4157}
4158
4159define <vscale x 1 x half> @vfnmadd_vf_nxv1f16_unmasked_commute(<vscale x 1 x half> %va, half %b, <vscale x 1 x half> %vc, i32 zeroext %evl) {
4160; ZVFH-LABEL: vfnmadd_vf_nxv1f16_unmasked_commute:
4161; ZVFH:       # %bb.0:
4162; ZVFH-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
4163; ZVFH-NEXT:    vfnmadd.vf v8, fa0, v9
4164; ZVFH-NEXT:    ret
4165;
4166; ZVFHMIN-LABEL: vfnmadd_vf_nxv1f16_unmasked_commute:
4167; ZVFHMIN:       # %bb.0:
4168; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
4169; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
4170; ZVFHMIN-NEXT:    vmv.v.x v10, a1
4171; ZVFHMIN-NEXT:    lui a0, 8
4172; ZVFHMIN-NEXT:    vxor.vx v8, v8, a0
4173; ZVFHMIN-NEXT:    vxor.vx v9, v9, a0
4174; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v9
4175; ZVFHMIN-NEXT:    vfwcvt.f.f.v v9, v8
4176; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v10
4177; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, mf2, ta, ma
4178; ZVFHMIN-NEXT:    vfmadd.vv v12, v9, v11
4179; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf4, ta, ma
4180; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v12
4181; ZVFHMIN-NEXT:    ret
4182  %elt.head = insertelement <vscale x 1 x half> poison, half %b, i32 0
4183  %vb = shufflevector <vscale x 1 x half> %elt.head, <vscale x 1 x half> poison, <vscale x 1 x i32> zeroinitializer
4184  %negva = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %va, <vscale x 1 x i1> splat (i1 true), i32 %evl)
4185  %negvc = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %vc, <vscale x 1 x i1> splat (i1 true), i32 %evl)
4186  %v = call <vscale x 1 x half> @llvm.vp.fma.nxv1f16(<vscale x 1 x half> %vb, <vscale x 1 x half> %negva, <vscale x 1 x half> %negvc, <vscale x 1 x i1> splat (i1 true), i32 %evl)
4187  ret <vscale x 1 x half> %v
4188}
4189
4190define <vscale x 1 x half> @vfnmadd_vf_nxv1f16_neg_splat(<vscale x 1 x half> %va, half %b, <vscale x 1 x half> %vc, <vscale x 1 x i1> %m, i32 zeroext %evl) {
4191; ZVFH-LABEL: vfnmadd_vf_nxv1f16_neg_splat:
4192; ZVFH:       # %bb.0:
4193; ZVFH-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
4194; ZVFH-NEXT:    vfnmadd.vf v8, fa0, v9, v0.t
4195; ZVFH-NEXT:    ret
4196;
4197; ZVFHMIN-LABEL: vfnmadd_vf_nxv1f16_neg_splat:
4198; ZVFHMIN:       # %bb.0:
4199; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
4200; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
4201; ZVFHMIN-NEXT:    vmv.v.x v10, a1
4202; ZVFHMIN-NEXT:    lui a0, 8
4203; ZVFHMIN-NEXT:    vxor.vx v10, v10, a0, v0.t
4204; ZVFHMIN-NEXT:    vxor.vx v9, v9, a0, v0.t
4205; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v9, v0.t
4206; ZVFHMIN-NEXT:    vfwcvt.f.f.v v9, v10, v0.t
4207; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v8, v0.t
4208; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, mf2, ta, ma
4209; ZVFHMIN-NEXT:    vfmadd.vv v9, v10, v11, v0.t
4210; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf4, ta, ma
4211; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v9, v0.t
4212; ZVFHMIN-NEXT:    ret
4213  %elt.head = insertelement <vscale x 1 x half> poison, half %b, i32 0
4214  %vb = shufflevector <vscale x 1 x half> %elt.head, <vscale x 1 x half> poison, <vscale x 1 x i32> zeroinitializer
4215  %negvb = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %vb, <vscale x 1 x i1> %m, i32 %evl)
4216  %negvc = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %vc, <vscale x 1 x i1> %m, i32 %evl)
4217  %v = call <vscale x 1 x half> @llvm.vp.fma.nxv1f16(<vscale x 1 x half> %va, <vscale x 1 x half> %negvb, <vscale x 1 x half> %negvc, <vscale x 1 x i1> %m, i32 %evl)
4218  ret <vscale x 1 x half> %v
4219}
4220
4221define <vscale x 1 x half> @vfnmadd_vf_nxv1f16_neg_splat_commute(<vscale x 1 x half> %va, half %b, <vscale x 1 x half> %vc, <vscale x 1 x i1> %m, i32 zeroext %evl) {
4222; ZVFH-LABEL: vfnmadd_vf_nxv1f16_neg_splat_commute:
4223; ZVFH:       # %bb.0:
4224; ZVFH-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
4225; ZVFH-NEXT:    vfnmadd.vf v8, fa0, v9, v0.t
4226; ZVFH-NEXT:    ret
4227;
4228; ZVFHMIN-LABEL: vfnmadd_vf_nxv1f16_neg_splat_commute:
4229; ZVFHMIN:       # %bb.0:
4230; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
4231; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
4232; ZVFHMIN-NEXT:    vmv.v.x v10, a1
4233; ZVFHMIN-NEXT:    lui a0, 8
4234; ZVFHMIN-NEXT:    vxor.vx v10, v10, a0, v0.t
4235; ZVFHMIN-NEXT:    vxor.vx v9, v9, a0, v0.t
4236; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v9, v0.t
4237; ZVFHMIN-NEXT:    vfwcvt.f.f.v v9, v10, v0.t
4238; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v8, v0.t
4239; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, mf2, ta, ma
4240; ZVFHMIN-NEXT:    vfmadd.vv v10, v9, v11, v0.t
4241; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf4, ta, ma
4242; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v10, v0.t
4243; ZVFHMIN-NEXT:    ret
4244  %elt.head = insertelement <vscale x 1 x half> poison, half %b, i32 0
4245  %vb = shufflevector <vscale x 1 x half> %elt.head, <vscale x 1 x half> poison, <vscale x 1 x i32> zeroinitializer
4246  %negvb = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %vb, <vscale x 1 x i1> %m, i32 %evl)
4247  %negvc = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %vc, <vscale x 1 x i1> %m, i32 %evl)
4248  %v = call <vscale x 1 x half> @llvm.vp.fma.nxv1f16(<vscale x 1 x half> %negvb, <vscale x 1 x half> %va, <vscale x 1 x half> %negvc, <vscale x 1 x i1> %m, i32 %evl)
4249  ret <vscale x 1 x half> %v
4250}
4251
4252define <vscale x 1 x half> @vfnmadd_vf_nxv1f16_neg_splat_unmasked(<vscale x 1 x half> %va, half %b, <vscale x 1 x half> %vc, i32 zeroext %evl) {
4253; ZVFH-LABEL: vfnmadd_vf_nxv1f16_neg_splat_unmasked:
4254; ZVFH:       # %bb.0:
4255; ZVFH-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
4256; ZVFH-NEXT:    vfnmadd.vf v8, fa0, v9
4257; ZVFH-NEXT:    ret
4258;
4259; ZVFHMIN-LABEL: vfnmadd_vf_nxv1f16_neg_splat_unmasked:
4260; ZVFHMIN:       # %bb.0:
4261; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
4262; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
4263; ZVFHMIN-NEXT:    vmv.v.x v10, a1
4264; ZVFHMIN-NEXT:    lui a0, 8
4265; ZVFHMIN-NEXT:    vxor.vx v9, v9, a0
4266; ZVFHMIN-NEXT:    vxor.vx v10, v10, a0
4267; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v9
4268; ZVFHMIN-NEXT:    vfwcvt.f.f.v v9, v10
4269; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v8
4270; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, mf2, ta, ma
4271; ZVFHMIN-NEXT:    vfmadd.vv v10, v9, v11
4272; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf4, ta, ma
4273; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v10
4274; ZVFHMIN-NEXT:    ret
4275  %elt.head = insertelement <vscale x 1 x half> poison, half %b, i32 0
4276  %vb = shufflevector <vscale x 1 x half> %elt.head, <vscale x 1 x half> poison, <vscale x 1 x i32> zeroinitializer
4277  %negvb = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %vb, <vscale x 1 x i1> splat (i1 true), i32 %evl)
4278  %negvc = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %vc, <vscale x 1 x i1> splat (i1 true), i32 %evl)
4279  %v = call <vscale x 1 x half> @llvm.vp.fma.nxv1f16(<vscale x 1 x half> %va, <vscale x 1 x half> %negvb, <vscale x 1 x half> %negvc, <vscale x 1 x i1> splat (i1 true), i32 %evl)
4280  ret <vscale x 1 x half> %v
4281}
4282
4283define <vscale x 1 x half> @vfnmadd_vf_nxv1f16_neg_splat_unmasked_commute(<vscale x 1 x half> %va, half %b, <vscale x 1 x half> %vc, i32 zeroext %evl) {
4284; ZVFH-LABEL: vfnmadd_vf_nxv1f16_neg_splat_unmasked_commute:
4285; ZVFH:       # %bb.0:
4286; ZVFH-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
4287; ZVFH-NEXT:    vfnmadd.vf v8, fa0, v9
4288; ZVFH-NEXT:    ret
4289;
4290; ZVFHMIN-LABEL: vfnmadd_vf_nxv1f16_neg_splat_unmasked_commute:
4291; ZVFHMIN:       # %bb.0:
4292; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
4293; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
4294; ZVFHMIN-NEXT:    vmv.v.x v10, a1
4295; ZVFHMIN-NEXT:    lui a0, 8
4296; ZVFHMIN-NEXT:    vxor.vx v9, v9, a0
4297; ZVFHMIN-NEXT:    vxor.vx v10, v10, a0
4298; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v9
4299; ZVFHMIN-NEXT:    vfwcvt.f.f.v v9, v10
4300; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v8
4301; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, mf2, ta, ma
4302; ZVFHMIN-NEXT:    vfmadd.vv v10, v9, v11
4303; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf4, ta, ma
4304; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v10
4305; ZVFHMIN-NEXT:    ret
4306  %elt.head = insertelement <vscale x 1 x half> poison, half %b, i32 0
4307  %vb = shufflevector <vscale x 1 x half> %elt.head, <vscale x 1 x half> poison, <vscale x 1 x i32> zeroinitializer
4308  %negvb = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %vb, <vscale x 1 x i1> splat (i1 true), i32 %evl)
4309  %negvc = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %vc, <vscale x 1 x i1> splat (i1 true), i32 %evl)
4310  %v = call <vscale x 1 x half> @llvm.vp.fma.nxv1f16(<vscale x 1 x half> %negvb, <vscale x 1 x half> %va, <vscale x 1 x half> %negvc, <vscale x 1 x i1> splat (i1 true), i32 %evl)
4311  ret <vscale x 1 x half> %v
4312}
4313
4314define <vscale x 1 x half> @vfnmsub_vv_nxv1f16(<vscale x 1 x half> %va, <vscale x 1 x half> %b, <vscale x 1 x half> %c, <vscale x 1 x i1> %m, i32 zeroext %evl) {
4315; ZVFH-LABEL: vfnmsub_vv_nxv1f16:
4316; ZVFH:       # %bb.0:
4317; ZVFH-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
4318; ZVFH-NEXT:    vfnmadd.vv v9, v8, v10, v0.t
4319; ZVFH-NEXT:    vmv1r.v v8, v9
4320; ZVFH-NEXT:    ret
4321;
4322; ZVFHMIN-LABEL: vfnmsub_vv_nxv1f16:
4323; ZVFHMIN:       # %bb.0:
4324; ZVFHMIN-NEXT:    lui a1, 8
4325; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
4326; ZVFHMIN-NEXT:    vxor.vx v9, v9, a1, v0.t
4327; ZVFHMIN-NEXT:    vxor.vx v10, v10, a1, v0.t
4328; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v10, v0.t
4329; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v9, v0.t
4330; ZVFHMIN-NEXT:    vfwcvt.f.f.v v9, v8, v0.t
4331; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, mf2, ta, ma
4332; ZVFHMIN-NEXT:    vfmadd.vv v10, v9, v11, v0.t
4333; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf4, ta, ma
4334; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v10, v0.t
4335; ZVFHMIN-NEXT:    ret
4336  %negb = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %b, <vscale x 1 x i1> %m, i32 %evl)
4337  %negc = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %c, <vscale x 1 x i1> %m, i32 %evl)
4338  %v = call <vscale x 1 x half> @llvm.vp.fma.nxv1f16(<vscale x 1 x half> %va, <vscale x 1 x half> %negb, <vscale x 1 x half> %negc, <vscale x 1 x i1> %m, i32 %evl)
4339  ret <vscale x 1 x half> %v
4340}
4341
4342define <vscale x 1 x half> @vfnmsub_vv_nxv1f16_commuted(<vscale x 1 x half> %va, <vscale x 1 x half> %b, <vscale x 1 x half> %c, <vscale x 1 x i1> %m, i32 zeroext %evl) {
4343; ZVFH-LABEL: vfnmsub_vv_nxv1f16_commuted:
4344; ZVFH:       # %bb.0:
4345; ZVFH-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
4346; ZVFH-NEXT:    vfnmadd.vv v8, v9, v10, v0.t
4347; ZVFH-NEXT:    ret
4348;
4349; ZVFHMIN-LABEL: vfnmsub_vv_nxv1f16_commuted:
4350; ZVFHMIN:       # %bb.0:
4351; ZVFHMIN-NEXT:    lui a1, 8
4352; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
4353; ZVFHMIN-NEXT:    vxor.vx v9, v9, a1, v0.t
4354; ZVFHMIN-NEXT:    vxor.vx v10, v10, a1, v0.t
4355; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v10, v0.t
4356; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v9, v0.t
4357; ZVFHMIN-NEXT:    vfwcvt.f.f.v v9, v8, v0.t
4358; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, mf2, ta, ma
4359; ZVFHMIN-NEXT:    vfmadd.vv v9, v10, v11, v0.t
4360; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf4, ta, ma
4361; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v9, v0.t
4362; ZVFHMIN-NEXT:    ret
4363  %negb = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %b, <vscale x 1 x i1> %m, i32 %evl)
4364  %negc = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %c, <vscale x 1 x i1> %m, i32 %evl)
4365  %v = call <vscale x 1 x half> @llvm.vp.fma.nxv1f16(<vscale x 1 x half> %negb, <vscale x 1 x half> %va, <vscale x 1 x half> %negc, <vscale x 1 x i1> %m, i32 %evl)
4366  ret <vscale x 1 x half> %v
4367}
4368
4369define <vscale x 1 x half> @vfnmsub_vv_nxv1f16_unmasked(<vscale x 1 x half> %va, <vscale x 1 x half> %b, <vscale x 1 x half> %c, i32 zeroext %evl) {
4370; ZVFH-LABEL: vfnmsub_vv_nxv1f16_unmasked:
4371; ZVFH:       # %bb.0:
4372; ZVFH-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
4373; ZVFH-NEXT:    vfnmadd.vv v8, v9, v10
4374; ZVFH-NEXT:    ret
4375;
4376; ZVFHMIN-LABEL: vfnmsub_vv_nxv1f16_unmasked:
4377; ZVFHMIN:       # %bb.0:
4378; ZVFHMIN-NEXT:    lui a1, 8
4379; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
4380; ZVFHMIN-NEXT:    vxor.vx v9, v9, a1
4381; ZVFHMIN-NEXT:    vxor.vx v10, v10, a1
4382; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v10
4383; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v9
4384; ZVFHMIN-NEXT:    vfwcvt.f.f.v v9, v8
4385; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, mf2, ta, ma
4386; ZVFHMIN-NEXT:    vfmadd.vv v9, v10, v11
4387; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf4, ta, ma
4388; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v9
4389; ZVFHMIN-NEXT:    ret
4390  %negb = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %b, <vscale x 1 x i1> splat (i1 true), i32 %evl)
4391  %negc = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %c, <vscale x 1 x i1> splat (i1 true), i32 %evl)
4392  %v = call <vscale x 1 x half> @llvm.vp.fma.nxv1f16(<vscale x 1 x half> %va, <vscale x 1 x half> %negb, <vscale x 1 x half> %negc, <vscale x 1 x i1> splat (i1 true), i32 %evl)
4393  ret <vscale x 1 x half> %v
4394}
4395
4396define <vscale x 1 x half> @vfnmsub_vv_nxv1f16_unmasked_commuted(<vscale x 1 x half> %va, <vscale x 1 x half> %b, <vscale x 1 x half> %c, i32 zeroext %evl) {
4397; ZVFH-LABEL: vfnmsub_vv_nxv1f16_unmasked_commuted:
4398; ZVFH:       # %bb.0:
4399; ZVFH-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
4400; ZVFH-NEXT:    vfnmadd.vv v8, v9, v10
4401; ZVFH-NEXT:    ret
4402;
4403; ZVFHMIN-LABEL: vfnmsub_vv_nxv1f16_unmasked_commuted:
4404; ZVFHMIN:       # %bb.0:
4405; ZVFHMIN-NEXT:    lui a1, 8
4406; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
4407; ZVFHMIN-NEXT:    vxor.vx v9, v9, a1
4408; ZVFHMIN-NEXT:    vxor.vx v10, v10, a1
4409; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v10
4410; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v9
4411; ZVFHMIN-NEXT:    vfwcvt.f.f.v v9, v8
4412; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, mf2, ta, ma
4413; ZVFHMIN-NEXT:    vfmadd.vv v9, v10, v11
4414; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf4, ta, ma
4415; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v9
4416; ZVFHMIN-NEXT:    ret
4417  %negb = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %b, <vscale x 1 x i1> splat (i1 true), i32 %evl)
4418  %negc = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %c, <vscale x 1 x i1> splat (i1 true), i32 %evl)
4419  %v = call <vscale x 1 x half> @llvm.vp.fma.nxv1f16(<vscale x 1 x half> %negb, <vscale x 1 x half> %va, <vscale x 1 x half> %negc, <vscale x 1 x i1> splat (i1 true), i32 %evl)
4420  ret <vscale x 1 x half> %v
4421}
4422
4423define <vscale x 1 x half> @vfnmsub_vf_nxv1f16(<vscale x 1 x half> %va, half %b, <vscale x 1 x half> %vc, <vscale x 1 x i1> %m, i32 zeroext %evl) {
4424; ZVFH-LABEL: vfnmsub_vf_nxv1f16:
4425; ZVFH:       # %bb.0:
4426; ZVFH-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
4427; ZVFH-NEXT:    vfnmsub.vf v8, fa0, v9, v0.t
4428; ZVFH-NEXT:    ret
4429;
4430; ZVFHMIN-LABEL: vfnmsub_vf_nxv1f16:
4431; ZVFHMIN:       # %bb.0:
4432; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
4433; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
4434; ZVFHMIN-NEXT:    vmv.v.x v10, a1
4435; ZVFHMIN-NEXT:    lui a0, 8
4436; ZVFHMIN-NEXT:    vxor.vx v8, v8, a0, v0.t
4437; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v8, v0.t
4438; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v9, v0.t
4439; ZVFHMIN-NEXT:    vfwcvt.f.f.v v9, v10, v0.t
4440; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, mf2, ta, ma
4441; ZVFHMIN-NEXT:    vfmadd.vv v9, v11, v8, v0.t
4442; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf4, ta, ma
4443; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v9, v0.t
4444; ZVFHMIN-NEXT:    ret
4445  %elt.head = insertelement <vscale x 1 x half> poison, half %b, i32 0
4446  %vb = shufflevector <vscale x 1 x half> %elt.head, <vscale x 1 x half> poison, <vscale x 1 x i32> zeroinitializer
4447  %negva = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %va, <vscale x 1 x i1> %m, i32 %evl)
4448  %v = call <vscale x 1 x half> @llvm.vp.fma.nxv1f16(<vscale x 1 x half> %negva, <vscale x 1 x half> %vb, <vscale x 1 x half> %vc, <vscale x 1 x i1> %m, i32 %evl)
4449  ret <vscale x 1 x half> %v
4450}
4451
4452define <vscale x 1 x half> @vfnmsub_vf_nxv1f16_commute(<vscale x 1 x half> %va, half %b, <vscale x 1 x half> %vc, <vscale x 1 x i1> %m, i32 zeroext %evl) {
4453; ZVFH-LABEL: vfnmsub_vf_nxv1f16_commute:
4454; ZVFH:       # %bb.0:
4455; ZVFH-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
4456; ZVFH-NEXT:    vfnmsub.vf v8, fa0, v9, v0.t
4457; ZVFH-NEXT:    ret
4458;
4459; ZVFHMIN-LABEL: vfnmsub_vf_nxv1f16_commute:
4460; ZVFHMIN:       # %bb.0:
4461; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
4462; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
4463; ZVFHMIN-NEXT:    vmv.v.x v10, a1
4464; ZVFHMIN-NEXT:    lui a0, 8
4465; ZVFHMIN-NEXT:    vxor.vx v8, v8, a0, v0.t
4466; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v8, v0.t
4467; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v9, v0.t
4468; ZVFHMIN-NEXT:    vfwcvt.f.f.v v9, v10, v0.t
4469; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, mf2, ta, ma
4470; ZVFHMIN-NEXT:    vfmadd.vv v11, v9, v8, v0.t
4471; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf4, ta, ma
4472; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v11, v0.t
4473; ZVFHMIN-NEXT:    ret
4474  %elt.head = insertelement <vscale x 1 x half> poison, half %b, i32 0
4475  %vb = shufflevector <vscale x 1 x half> %elt.head, <vscale x 1 x half> poison, <vscale x 1 x i32> zeroinitializer
4476  %negva = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %va, <vscale x 1 x i1> %m, i32 %evl)
4477  %v = call <vscale x 1 x half> @llvm.vp.fma.nxv1f16(<vscale x 1 x half> %vb, <vscale x 1 x half> %negva, <vscale x 1 x half> %vc, <vscale x 1 x i1> %m, i32 %evl)
4478  ret <vscale x 1 x half> %v
4479}
4480
4481define <vscale x 1 x half> @vfnmsub_vf_nxv1f16_unmasked(<vscale x 1 x half> %va, half %b, <vscale x 1 x half> %vc, i32 zeroext %evl) {
4482; ZVFH-LABEL: vfnmsub_vf_nxv1f16_unmasked:
4483; ZVFH:       # %bb.0:
4484; ZVFH-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
4485; ZVFH-NEXT:    vfnmsub.vf v8, fa0, v9
4486; ZVFH-NEXT:    ret
4487;
4488; ZVFHMIN-LABEL: vfnmsub_vf_nxv1f16_unmasked:
4489; ZVFHMIN:       # %bb.0:
4490; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
4491; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
4492; ZVFHMIN-NEXT:    vmv.v.x v10, a1
4493; ZVFHMIN-NEXT:    lui a0, 8
4494; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v9
4495; ZVFHMIN-NEXT:    vxor.vx v8, v8, a0
4496; ZVFHMIN-NEXT:    vfwcvt.f.f.v v9, v8
4497; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v10
4498; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, mf2, ta, ma
4499; ZVFHMIN-NEXT:    vfmadd.vv v12, v9, v11
4500; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf4, ta, ma
4501; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v12
4502; ZVFHMIN-NEXT:    ret
4503  %elt.head = insertelement <vscale x 1 x half> poison, half %b, i32 0
4504  %vb = shufflevector <vscale x 1 x half> %elt.head, <vscale x 1 x half> poison, <vscale x 1 x i32> zeroinitializer
4505  %negva = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %va, <vscale x 1 x i1> splat (i1 true), i32 %evl)
4506  %v = call <vscale x 1 x half> @llvm.vp.fma.nxv1f16(<vscale x 1 x half> %negva, <vscale x 1 x half> %vb, <vscale x 1 x half> %vc, <vscale x 1 x i1> splat (i1 true), i32 %evl)
4507  ret <vscale x 1 x half> %v
4508}
4509
4510define <vscale x 1 x half> @vfnmsub_vf_nxv1f16_unmasked_commute(<vscale x 1 x half> %va, half %b, <vscale x 1 x half> %vc, i32 zeroext %evl) {
4511; ZVFH-LABEL: vfnmsub_vf_nxv1f16_unmasked_commute:
4512; ZVFH:       # %bb.0:
4513; ZVFH-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
4514; ZVFH-NEXT:    vfnmsub.vf v8, fa0, v9
4515; ZVFH-NEXT:    ret
4516;
4517; ZVFHMIN-LABEL: vfnmsub_vf_nxv1f16_unmasked_commute:
4518; ZVFHMIN:       # %bb.0:
4519; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
4520; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
4521; ZVFHMIN-NEXT:    vmv.v.x v10, a1
4522; ZVFHMIN-NEXT:    lui a0, 8
4523; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v9
4524; ZVFHMIN-NEXT:    vxor.vx v8, v8, a0
4525; ZVFHMIN-NEXT:    vfwcvt.f.f.v v9, v8
4526; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v10
4527; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, mf2, ta, ma
4528; ZVFHMIN-NEXT:    vfmadd.vv v12, v9, v11
4529; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf4, ta, ma
4530; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v12
4531; ZVFHMIN-NEXT:    ret
4532  %elt.head = insertelement <vscale x 1 x half> poison, half %b, i32 0
4533  %vb = shufflevector <vscale x 1 x half> %elt.head, <vscale x 1 x half> poison, <vscale x 1 x i32> zeroinitializer
4534  %negva = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %va, <vscale x 1 x i1> splat (i1 true), i32 %evl)
4535  %v = call <vscale x 1 x half> @llvm.vp.fma.nxv1f16(<vscale x 1 x half> %vb, <vscale x 1 x half> %negva, <vscale x 1 x half> %vc, <vscale x 1 x i1> splat (i1 true), i32 %evl)
4536  ret <vscale x 1 x half> %v
4537}
4538
4539define <vscale x 1 x half> @vfnmsub_vf_nxv1f16_neg_splat(<vscale x 1 x half> %va, half %b, <vscale x 1 x half> %vc, <vscale x 1 x i1> %m, i32 zeroext %evl) {
4540; ZVFH-LABEL: vfnmsub_vf_nxv1f16_neg_splat:
4541; ZVFH:       # %bb.0:
4542; ZVFH-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
4543; ZVFH-NEXT:    vfnmsub.vf v8, fa0, v9, v0.t
4544; ZVFH-NEXT:    ret
4545;
4546; ZVFHMIN-LABEL: vfnmsub_vf_nxv1f16_neg_splat:
4547; ZVFHMIN:       # %bb.0:
4548; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
4549; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
4550; ZVFHMIN-NEXT:    vmv.v.x v10, a1
4551; ZVFHMIN-NEXT:    lui a0, 8
4552; ZVFHMIN-NEXT:    vxor.vx v10, v10, a0, v0.t
4553; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v10, v0.t
4554; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v9, v0.t
4555; ZVFHMIN-NEXT:    vfwcvt.f.f.v v9, v8, v0.t
4556; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, mf2, ta, ma
4557; ZVFHMIN-NEXT:    vfmadd.vv v11, v9, v10, v0.t
4558; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf4, ta, ma
4559; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v11, v0.t
4560; ZVFHMIN-NEXT:    ret
4561  %elt.head = insertelement <vscale x 1 x half> poison, half %b, i32 0
4562  %vb = shufflevector <vscale x 1 x half> %elt.head, <vscale x 1 x half> poison, <vscale x 1 x i32> zeroinitializer
4563  %negvb = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %vb, <vscale x 1 x i1> %m, i32 %evl)
4564  %v = call <vscale x 1 x half> @llvm.vp.fma.nxv1f16(<vscale x 1 x half> %va, <vscale x 1 x half> %negvb, <vscale x 1 x half> %vc, <vscale x 1 x i1> %m, i32 %evl)
4565  ret <vscale x 1 x half> %v
4566}
4567
4568define <vscale x 1 x half> @vfnmsub_vf_nxv1f16_neg_splat_commute(<vscale x 1 x half> %va, half %b, <vscale x 1 x half> %vc, <vscale x 1 x i1> %m, i32 zeroext %evl) {
4569; ZVFH-LABEL: vfnmsub_vf_nxv1f16_neg_splat_commute:
4570; ZVFH:       # %bb.0:
4571; ZVFH-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
4572; ZVFH-NEXT:    vfnmsub.vf v8, fa0, v9, v0.t
4573; ZVFH-NEXT:    ret
4574;
4575; ZVFHMIN-LABEL: vfnmsub_vf_nxv1f16_neg_splat_commute:
4576; ZVFHMIN:       # %bb.0:
4577; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
4578; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
4579; ZVFHMIN-NEXT:    vmv.v.x v10, a1
4580; ZVFHMIN-NEXT:    lui a0, 8
4581; ZVFHMIN-NEXT:    vxor.vx v10, v10, a0, v0.t
4582; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v10, v0.t
4583; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v9, v0.t
4584; ZVFHMIN-NEXT:    vfwcvt.f.f.v v9, v8, v0.t
4585; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, mf2, ta, ma
4586; ZVFHMIN-NEXT:    vfmadd.vv v9, v11, v10, v0.t
4587; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf4, ta, ma
4588; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v9, v0.t
4589; ZVFHMIN-NEXT:    ret
4590  %elt.head = insertelement <vscale x 1 x half> poison, half %b, i32 0
4591  %vb = shufflevector <vscale x 1 x half> %elt.head, <vscale x 1 x half> poison, <vscale x 1 x i32> zeroinitializer
4592  %negvb = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %vb, <vscale x 1 x i1> %m, i32 %evl)
4593  %v = call <vscale x 1 x half> @llvm.vp.fma.nxv1f16(<vscale x 1 x half> %negvb, <vscale x 1 x half> %va, <vscale x 1 x half> %vc, <vscale x 1 x i1> %m, i32 %evl)
4594  ret <vscale x 1 x half> %v
4595}
4596
4597define <vscale x 1 x half> @vfnmsub_vf_nxv1f16_neg_splat_unmasked(<vscale x 1 x half> %va, half %b, <vscale x 1 x half> %vc, i32 zeroext %evl) {
4598; ZVFH-LABEL: vfnmsub_vf_nxv1f16_neg_splat_unmasked:
4599; ZVFH:       # %bb.0:
4600; ZVFH-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
4601; ZVFH-NEXT:    vfnmsub.vf v8, fa0, v9
4602; ZVFH-NEXT:    ret
4603;
4604; ZVFHMIN-LABEL: vfnmsub_vf_nxv1f16_neg_splat_unmasked:
4605; ZVFHMIN:       # %bb.0:
4606; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
4607; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
4608; ZVFHMIN-NEXT:    vmv.v.x v10, a1
4609; ZVFHMIN-NEXT:    lui a0, 8
4610; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v9
4611; ZVFHMIN-NEXT:    vxor.vx v9, v10, a0
4612; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v9
4613; ZVFHMIN-NEXT:    vfwcvt.f.f.v v9, v8
4614; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, mf2, ta, ma
4615; ZVFHMIN-NEXT:    vfmadd.vv v9, v10, v11
4616; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf4, ta, ma
4617; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v9
4618; ZVFHMIN-NEXT:    ret
4619  %elt.head = insertelement <vscale x 1 x half> poison, half %b, i32 0
4620  %vb = shufflevector <vscale x 1 x half> %elt.head, <vscale x 1 x half> poison, <vscale x 1 x i32> zeroinitializer
4621  %negvb = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %vb, <vscale x 1 x i1> splat (i1 true), i32 %evl)
4622  %v = call <vscale x 1 x half> @llvm.vp.fma.nxv1f16(<vscale x 1 x half> %va, <vscale x 1 x half> %negvb, <vscale x 1 x half> %vc, <vscale x 1 x i1> splat (i1 true), i32 %evl)
4623  ret <vscale x 1 x half> %v
4624}
4625
4626define <vscale x 1 x half> @vfnmsub_vf_nxv1f16_neg_splat_unmasked_commute(<vscale x 1 x half> %va, half %b, <vscale x 1 x half> %vc, i32 zeroext %evl) {
4627; ZVFH-LABEL: vfnmsub_vf_nxv1f16_neg_splat_unmasked_commute:
4628; ZVFH:       # %bb.0:
4629; ZVFH-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
4630; ZVFH-NEXT:    vfnmsub.vf v8, fa0, v9
4631; ZVFH-NEXT:    ret
4632;
4633; ZVFHMIN-LABEL: vfnmsub_vf_nxv1f16_neg_splat_unmasked_commute:
4634; ZVFHMIN:       # %bb.0:
4635; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
4636; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
4637; ZVFHMIN-NEXT:    vmv.v.x v10, a1
4638; ZVFHMIN-NEXT:    lui a0, 8
4639; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v9
4640; ZVFHMIN-NEXT:    vxor.vx v9, v10, a0
4641; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v9
4642; ZVFHMIN-NEXT:    vfwcvt.f.f.v v9, v8
4643; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, mf2, ta, ma
4644; ZVFHMIN-NEXT:    vfmadd.vv v9, v10, v11
4645; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf4, ta, ma
4646; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v9
4647; ZVFHMIN-NEXT:    ret
4648  %elt.head = insertelement <vscale x 1 x half> poison, half %b, i32 0
4649  %vb = shufflevector <vscale x 1 x half> %elt.head, <vscale x 1 x half> poison, <vscale x 1 x i32> zeroinitializer
4650  %negvb = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %vb, <vscale x 1 x i1> splat (i1 true), i32 %evl)
4651  %v = call <vscale x 1 x half> @llvm.vp.fma.nxv1f16(<vscale x 1 x half> %negvb, <vscale x 1 x half> %va, <vscale x 1 x half> %vc, <vscale x 1 x i1> splat (i1 true), i32 %evl)
4652  ret <vscale x 1 x half> %v
4653}
4654
4655declare <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half>, <vscale x 2 x i1>, i32)
4656
4657define <vscale x 2 x half> @vfmsub_vv_nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x half> %b, <vscale x 2 x half> %c, <vscale x 2 x i1> %m, i32 zeroext %evl) {
4658; ZVFH-LABEL: vfmsub_vv_nxv2f16:
4659; ZVFH:       # %bb.0:
4660; ZVFH-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
4661; ZVFH-NEXT:    vfmsub.vv v9, v8, v10, v0.t
4662; ZVFH-NEXT:    vmv1r.v v8, v9
4663; ZVFH-NEXT:    ret
4664;
4665; ZVFHMIN-LABEL: vfmsub_vv_nxv2f16:
4666; ZVFHMIN:       # %bb.0:
4667; ZVFHMIN-NEXT:    lui a1, 8
4668; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
4669; ZVFHMIN-NEXT:    vxor.vx v10, v10, a1, v0.t
4670; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v10, v0.t
4671; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v8, v0.t
4672; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v9, v0.t
4673; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m1, ta, ma
4674; ZVFHMIN-NEXT:    vfmadd.vv v12, v10, v11, v0.t
4675; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf2, ta, ma
4676; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v12, v0.t
4677; ZVFHMIN-NEXT:    ret
4678  %negc = call <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half> %c, <vscale x 2 x i1> %m, i32 %evl)
4679  %v = call <vscale x 2 x half> @llvm.vp.fma.nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x half> %b, <vscale x 2 x half> %negc, <vscale x 2 x i1> %m, i32 %evl)
4680  ret <vscale x 2 x half> %v
4681}
4682
4683define <vscale x 2 x half> @vfmsub_vv_nxv2f16_unmasked(<vscale x 2 x half> %va, <vscale x 2 x half> %b, <vscale x 2 x half> %c, i32 zeroext %evl) {
4684; ZVFH-LABEL: vfmsub_vv_nxv2f16_unmasked:
4685; ZVFH:       # %bb.0:
4686; ZVFH-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
4687; ZVFH-NEXT:    vfmsub.vv v8, v9, v10
4688; ZVFH-NEXT:    ret
4689;
4690; ZVFHMIN-LABEL: vfmsub_vv_nxv2f16_unmasked:
4691; ZVFHMIN:       # %bb.0:
4692; ZVFHMIN-NEXT:    lui a1, 8
4693; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
4694; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v8
4695; ZVFHMIN-NEXT:    vxor.vx v8, v10, a1
4696; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v8
4697; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v9
4698; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m1, ta, ma
4699; ZVFHMIN-NEXT:    vfmadd.vv v12, v11, v10
4700; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf2, ta, ma
4701; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v12
4702; ZVFHMIN-NEXT:    ret
4703  %negc = call <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half> %c, <vscale x 2 x i1> splat (i1 true), i32 %evl)
4704  %v = call <vscale x 2 x half> @llvm.vp.fma.nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x half> %b, <vscale x 2 x half> %negc, <vscale x 2 x i1> splat (i1 true), i32 %evl)
4705  ret <vscale x 2 x half> %v
4706}
4707
4708define <vscale x 2 x half> @vfmsub_vf_nxv2f16(<vscale x 2 x half> %va, half %b, <vscale x 2 x half> %vc, <vscale x 2 x i1> %m, i32 zeroext %evl) {
4709; ZVFH-LABEL: vfmsub_vf_nxv2f16:
4710; ZVFH:       # %bb.0:
4711; ZVFH-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
4712; ZVFH-NEXT:    vfmsub.vf v8, fa0, v9, v0.t
4713; ZVFH-NEXT:    ret
4714;
4715; ZVFHMIN-LABEL: vfmsub_vf_nxv2f16:
4716; ZVFHMIN:       # %bb.0:
4717; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
4718; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
4719; ZVFHMIN-NEXT:    vmv.v.x v10, a1
4720; ZVFHMIN-NEXT:    lui a0, 8
4721; ZVFHMIN-NEXT:    vxor.vx v9, v9, a0, v0.t
4722; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v9, v0.t
4723; ZVFHMIN-NEXT:    vfwcvt.f.f.v v9, v8, v0.t
4724; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v10, v0.t
4725; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m1, ta, ma
4726; ZVFHMIN-NEXT:    vfmadd.vv v12, v9, v11, v0.t
4727; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf2, ta, ma
4728; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v12, v0.t
4729; ZVFHMIN-NEXT:    ret
4730  %elt.head = insertelement <vscale x 2 x half> poison, half %b, i32 0
4731  %vb = shufflevector <vscale x 2 x half> %elt.head, <vscale x 2 x half> poison, <vscale x 2 x i32> zeroinitializer
4732  %negvc = call <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half> %vc, <vscale x 2 x i1> %m, i32 %evl)
4733  %v = call <vscale x 2 x half> @llvm.vp.fma.nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x half> %vb, <vscale x 2 x half> %negvc, <vscale x 2 x i1> %m, i32 %evl)
4734  ret <vscale x 2 x half> %v
4735}
4736
4737define <vscale x 2 x half> @vfmsub_vf_nxv2f16_commute(<vscale x 2 x half> %va, half %b, <vscale x 2 x half> %vc, <vscale x 2 x i1> %m, i32 zeroext %evl) {
4738; ZVFH-LABEL: vfmsub_vf_nxv2f16_commute:
4739; ZVFH:       # %bb.0:
4740; ZVFH-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
4741; ZVFH-NEXT:    vfmsub.vf v8, fa0, v9, v0.t
4742; ZVFH-NEXT:    ret
4743;
4744; ZVFHMIN-LABEL: vfmsub_vf_nxv2f16_commute:
4745; ZVFHMIN:       # %bb.0:
4746; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
4747; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
4748; ZVFHMIN-NEXT:    vmv.v.x v10, a1
4749; ZVFHMIN-NEXT:    lui a0, 8
4750; ZVFHMIN-NEXT:    vxor.vx v9, v9, a0, v0.t
4751; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v9, v0.t
4752; ZVFHMIN-NEXT:    vfwcvt.f.f.v v9, v8, v0.t
4753; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v10, v0.t
4754; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m1, ta, ma
4755; ZVFHMIN-NEXT:    vfmadd.vv v9, v8, v11, v0.t
4756; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf2, ta, ma
4757; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v9, v0.t
4758; ZVFHMIN-NEXT:    ret
4759  %elt.head = insertelement <vscale x 2 x half> poison, half %b, i32 0
4760  %vb = shufflevector <vscale x 2 x half> %elt.head, <vscale x 2 x half> poison, <vscale x 2 x i32> zeroinitializer
4761  %negvc = call <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half> %vc, <vscale x 2 x i1> %m, i32 %evl)
4762  %v = call <vscale x 2 x half> @llvm.vp.fma.nxv2f16(<vscale x 2 x half> %vb, <vscale x 2 x half> %va, <vscale x 2 x half> %negvc, <vscale x 2 x i1> %m, i32 %evl)
4763  ret <vscale x 2 x half> %v
4764}
4765
4766define <vscale x 2 x half> @vfmsub_vf_nxv2f16_unmasked(<vscale x 2 x half> %va, half %b, <vscale x 2 x half> %vc, i32 zeroext %evl) {
4767; ZVFH-LABEL: vfmsub_vf_nxv2f16_unmasked:
4768; ZVFH:       # %bb.0:
4769; ZVFH-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
4770; ZVFH-NEXT:    vfmsub.vf v8, fa0, v9
4771; ZVFH-NEXT:    ret
4772;
4773; ZVFHMIN-LABEL: vfmsub_vf_nxv2f16_unmasked:
4774; ZVFHMIN:       # %bb.0:
4775; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
4776; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
4777; ZVFHMIN-NEXT:    vmv.v.x v10, a1
4778; ZVFHMIN-NEXT:    lui a0, 8
4779; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v8
4780; ZVFHMIN-NEXT:    vxor.vx v8, v9, a0
4781; ZVFHMIN-NEXT:    vfwcvt.f.f.v v9, v8
4782; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v10
4783; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m1, ta, ma
4784; ZVFHMIN-NEXT:    vfmadd.vv v12, v11, v9
4785; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf2, ta, ma
4786; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v12
4787; ZVFHMIN-NEXT:    ret
4788  %elt.head = insertelement <vscale x 2 x half> poison, half %b, i32 0
4789  %vb = shufflevector <vscale x 2 x half> %elt.head, <vscale x 2 x half> poison, <vscale x 2 x i32> zeroinitializer
4790  %negvc = call <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half> %vc, <vscale x 2 x i1> splat (i1 true), i32 %evl)
4791  %v = call <vscale x 2 x half> @llvm.vp.fma.nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x half> %vb, <vscale x 2 x half> %negvc, <vscale x 2 x i1> splat (i1 true), i32 %evl)
4792  ret <vscale x 2 x half> %v
4793}
4794
4795define <vscale x 2 x half> @vfmsub_vf_nxv2f16_unmasked_commute(<vscale x 2 x half> %va, half %b, <vscale x 2 x half> %vc, i32 zeroext %evl) {
4796; ZVFH-LABEL: vfmsub_vf_nxv2f16_unmasked_commute:
4797; ZVFH:       # %bb.0:
4798; ZVFH-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
4799; ZVFH-NEXT:    vfmsub.vf v8, fa0, v9
4800; ZVFH-NEXT:    ret
4801;
4802; ZVFHMIN-LABEL: vfmsub_vf_nxv2f16_unmasked_commute:
4803; ZVFHMIN:       # %bb.0:
4804; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
4805; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
4806; ZVFHMIN-NEXT:    vmv.v.x v10, a1
4807; ZVFHMIN-NEXT:    lui a0, 8
4808; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v8
4809; ZVFHMIN-NEXT:    vxor.vx v8, v9, a0
4810; ZVFHMIN-NEXT:    vfwcvt.f.f.v v9, v8
4811; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v10
4812; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m1, ta, ma
4813; ZVFHMIN-NEXT:    vfmadd.vv v12, v11, v9
4814; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf2, ta, ma
4815; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v12
4816; ZVFHMIN-NEXT:    ret
4817  %elt.head = insertelement <vscale x 2 x half> poison, half %b, i32 0
4818  %vb = shufflevector <vscale x 2 x half> %elt.head, <vscale x 2 x half> poison, <vscale x 2 x i32> zeroinitializer
4819  %negvc = call <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half> %vc, <vscale x 2 x i1> splat (i1 true), i32 %evl)
4820  %v = call <vscale x 2 x half> @llvm.vp.fma.nxv2f16(<vscale x 2 x half> %vb, <vscale x 2 x half> %va, <vscale x 2 x half> %negvc, <vscale x 2 x i1> splat (i1 true), i32 %evl)
4821  ret <vscale x 2 x half> %v
4822}
4823
4824define <vscale x 2 x half> @vfnmadd_vv_nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x half> %b, <vscale x 2 x half> %c, <vscale x 2 x i1> %m, i32 zeroext %evl) {
4825; ZVFH-LABEL: vfnmadd_vv_nxv2f16:
4826; ZVFH:       # %bb.0:
4827; ZVFH-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
4828; ZVFH-NEXT:    vfnmadd.vv v9, v8, v10, v0.t
4829; ZVFH-NEXT:    vmv1r.v v8, v9
4830; ZVFH-NEXT:    ret
4831;
4832; ZVFHMIN-LABEL: vfnmadd_vv_nxv2f16:
4833; ZVFHMIN:       # %bb.0:
4834; ZVFHMIN-NEXT:    lui a1, 8
4835; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
4836; ZVFHMIN-NEXT:    vxor.vx v9, v9, a1, v0.t
4837; ZVFHMIN-NEXT:    vxor.vx v10, v10, a1, v0.t
4838; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v10, v0.t
4839; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v9, v0.t
4840; ZVFHMIN-NEXT:    vfwcvt.f.f.v v9, v8, v0.t
4841; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m1, ta, ma
4842; ZVFHMIN-NEXT:    vfmadd.vv v10, v9, v11, v0.t
4843; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf2, ta, ma
4844; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v10, v0.t
4845; ZVFHMIN-NEXT:    ret
4846  %negb = call <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half> %b, <vscale x 2 x i1> %m, i32 %evl)
4847  %negc = call <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half> %c, <vscale x 2 x i1> %m, i32 %evl)
4848  %v = call <vscale x 2 x half> @llvm.vp.fma.nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x half> %negb, <vscale x 2 x half> %negc, <vscale x 2 x i1> %m, i32 %evl)
4849  ret <vscale x 2 x half> %v
4850}
4851
4852define <vscale x 2 x half> @vfnmadd_vv_nxv2f16_commuted(<vscale x 2 x half> %va, <vscale x 2 x half> %b, <vscale x 2 x half> %c, <vscale x 2 x i1> %m, i32 zeroext %evl) {
4853; ZVFH-LABEL: vfnmadd_vv_nxv2f16_commuted:
4854; ZVFH:       # %bb.0:
4855; ZVFH-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
4856; ZVFH-NEXT:    vfnmadd.vv v8, v9, v10, v0.t
4857; ZVFH-NEXT:    ret
4858;
4859; ZVFHMIN-LABEL: vfnmadd_vv_nxv2f16_commuted:
4860; ZVFHMIN:       # %bb.0:
4861; ZVFHMIN-NEXT:    lui a1, 8
4862; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
4863; ZVFHMIN-NEXT:    vxor.vx v9, v9, a1, v0.t
4864; ZVFHMIN-NEXT:    vxor.vx v10, v10, a1, v0.t
4865; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v10, v0.t
4866; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v9, v0.t
4867; ZVFHMIN-NEXT:    vfwcvt.f.f.v v9, v8, v0.t
4868; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m1, ta, ma
4869; ZVFHMIN-NEXT:    vfmadd.vv v9, v10, v11, v0.t
4870; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf2, ta, ma
4871; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v9, v0.t
4872; ZVFHMIN-NEXT:    ret
4873  %negb = call <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half> %b, <vscale x 2 x i1> %m, i32 %evl)
4874  %negc = call <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half> %c, <vscale x 2 x i1> %m, i32 %evl)
4875  %v = call <vscale x 2 x half> @llvm.vp.fma.nxv2f16(<vscale x 2 x half> %negb, <vscale x 2 x half> %va, <vscale x 2 x half> %negc, <vscale x 2 x i1> %m, i32 %evl)
4876  ret <vscale x 2 x half> %v
4877}
4878
4879define <vscale x 2 x half> @vfnmadd_vv_nxv2f16_unmasked(<vscale x 2 x half> %va, <vscale x 2 x half> %b, <vscale x 2 x half> %c, i32 zeroext %evl) {
4880; ZVFH-LABEL: vfnmadd_vv_nxv2f16_unmasked:
4881; ZVFH:       # %bb.0:
4882; ZVFH-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
4883; ZVFH-NEXT:    vfnmadd.vv v8, v9, v10
4884; ZVFH-NEXT:    ret
4885;
4886; ZVFHMIN-LABEL: vfnmadd_vv_nxv2f16_unmasked:
4887; ZVFHMIN:       # %bb.0:
4888; ZVFHMIN-NEXT:    lui a1, 8
4889; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
4890; ZVFHMIN-NEXT:    vxor.vx v9, v9, a1
4891; ZVFHMIN-NEXT:    vxor.vx v10, v10, a1
4892; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v10
4893; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v9
4894; ZVFHMIN-NEXT:    vfwcvt.f.f.v v9, v8
4895; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m1, ta, ma
4896; ZVFHMIN-NEXT:    vfmadd.vv v9, v10, v11
4897; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf2, ta, ma
4898; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v9
4899; ZVFHMIN-NEXT:    ret
4900  %negb = call <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half> %b, <vscale x 2 x i1> splat (i1 true), i32 %evl)
4901  %negc = call <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half> %c, <vscale x 2 x i1> splat (i1 true), i32 %evl)
4902  %v = call <vscale x 2 x half> @llvm.vp.fma.nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x half> %negb, <vscale x 2 x half> %negc, <vscale x 2 x i1> splat (i1 true), i32 %evl)
4903  ret <vscale x 2 x half> %v
4904}
4905
4906define <vscale x 2 x half> @vfnmadd_vv_nxv2f16_unmasked_commuted(<vscale x 2 x half> %va, <vscale x 2 x half> %b, <vscale x 2 x half> %c, i32 zeroext %evl) {
4907; ZVFH-LABEL: vfnmadd_vv_nxv2f16_unmasked_commuted:
4908; ZVFH:       # %bb.0:
4909; ZVFH-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
4910; ZVFH-NEXT:    vfnmadd.vv v8, v9, v10
4911; ZVFH-NEXT:    ret
4912;
4913; ZVFHMIN-LABEL: vfnmadd_vv_nxv2f16_unmasked_commuted:
4914; ZVFHMIN:       # %bb.0:
4915; ZVFHMIN-NEXT:    lui a1, 8
4916; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
4917; ZVFHMIN-NEXT:    vxor.vx v9, v9, a1
4918; ZVFHMIN-NEXT:    vxor.vx v10, v10, a1
4919; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v10
4920; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v9
4921; ZVFHMIN-NEXT:    vfwcvt.f.f.v v9, v8
4922; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m1, ta, ma
4923; ZVFHMIN-NEXT:    vfmadd.vv v9, v10, v11
4924; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf2, ta, ma
4925; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v9
4926; ZVFHMIN-NEXT:    ret
4927  %negb = call <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half> %b, <vscale x 2 x i1> splat (i1 true), i32 %evl)
4928  %negc = call <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half> %c, <vscale x 2 x i1> splat (i1 true), i32 %evl)
4929  %v = call <vscale x 2 x half> @llvm.vp.fma.nxv2f16(<vscale x 2 x half> %negb, <vscale x 2 x half> %va, <vscale x 2 x half> %negc, <vscale x 2 x i1> splat (i1 true), i32 %evl)
4930  ret <vscale x 2 x half> %v
4931}
4932
4933define <vscale x 2 x half> @vfnmadd_vf_nxv2f16(<vscale x 2 x half> %va, half %b, <vscale x 2 x half> %vc, <vscale x 2 x i1> %m, i32 zeroext %evl) {
4934; ZVFH-LABEL: vfnmadd_vf_nxv2f16:
4935; ZVFH:       # %bb.0:
4936; ZVFH-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
4937; ZVFH-NEXT:    vfnmadd.vf v8, fa0, v9, v0.t
4938; ZVFH-NEXT:    ret
4939;
4940; ZVFHMIN-LABEL: vfnmadd_vf_nxv2f16:
4941; ZVFHMIN:       # %bb.0:
4942; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
4943; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
4944; ZVFHMIN-NEXT:    vmv.v.x v10, a1
4945; ZVFHMIN-NEXT:    lui a0, 8
4946; ZVFHMIN-NEXT:    vxor.vx v8, v8, a0, v0.t
4947; ZVFHMIN-NEXT:    vxor.vx v9, v9, a0, v0.t
4948; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v9, v0.t
4949; ZVFHMIN-NEXT:    vfwcvt.f.f.v v9, v8, v0.t
4950; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v10, v0.t
4951; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m1, ta, ma
4952; ZVFHMIN-NEXT:    vfmadd.vv v12, v9, v11, v0.t
4953; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf2, ta, ma
4954; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v12, v0.t
4955; ZVFHMIN-NEXT:    ret
4956  %elt.head = insertelement <vscale x 2 x half> poison, half %b, i32 0
4957  %vb = shufflevector <vscale x 2 x half> %elt.head, <vscale x 2 x half> poison, <vscale x 2 x i32> zeroinitializer
4958  %negva = call <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x i1> %m, i32 %evl)
4959  %negvc = call <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half> %vc, <vscale x 2 x i1> %m, i32 %evl)
4960  %v = call <vscale x 2 x half> @llvm.vp.fma.nxv2f16(<vscale x 2 x half> %negva, <vscale x 2 x half> %vb, <vscale x 2 x half> %negvc, <vscale x 2 x i1> %m, i32 %evl)
4961  ret <vscale x 2 x half> %v
4962}
4963
4964define <vscale x 2 x half> @vfnmadd_vf_nxv2f16_commute(<vscale x 2 x half> %va, half %b, <vscale x 2 x half> %vc, <vscale x 2 x i1> %m, i32 zeroext %evl) {
4965; ZVFH-LABEL: vfnmadd_vf_nxv2f16_commute:
4966; ZVFH:       # %bb.0:
4967; ZVFH-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
4968; ZVFH-NEXT:    vfnmadd.vf v8, fa0, v9, v0.t
4969; ZVFH-NEXT:    ret
4970;
4971; ZVFHMIN-LABEL: vfnmadd_vf_nxv2f16_commute:
4972; ZVFHMIN:       # %bb.0:
4973; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
4974; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
4975; ZVFHMIN-NEXT:    vmv.v.x v10, a1
4976; ZVFHMIN-NEXT:    lui a0, 8
4977; ZVFHMIN-NEXT:    vxor.vx v8, v8, a0, v0.t
4978; ZVFHMIN-NEXT:    vxor.vx v9, v9, a0, v0.t
4979; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v9, v0.t
4980; ZVFHMIN-NEXT:    vfwcvt.f.f.v v9, v8, v0.t
4981; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v10, v0.t
4982; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m1, ta, ma
4983; ZVFHMIN-NEXT:    vfmadd.vv v9, v8, v11, v0.t
4984; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf2, ta, ma
4985; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v9, v0.t
4986; ZVFHMIN-NEXT:    ret
4987  %elt.head = insertelement <vscale x 2 x half> poison, half %b, i32 0
4988  %vb = shufflevector <vscale x 2 x half> %elt.head, <vscale x 2 x half> poison, <vscale x 2 x i32> zeroinitializer
4989  %negva = call <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x i1> %m, i32 %evl)
4990  %negvc = call <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half> %vc, <vscale x 2 x i1> %m, i32 %evl)
4991  %v = call <vscale x 2 x half> @llvm.vp.fma.nxv2f16(<vscale x 2 x half> %vb, <vscale x 2 x half> %negva, <vscale x 2 x half> %negvc, <vscale x 2 x i1> %m, i32 %evl)
4992  ret <vscale x 2 x half> %v
4993}
4994
4995define <vscale x 2 x half> @vfnmadd_vf_nxv2f16_unmasked(<vscale x 2 x half> %va, half %b, <vscale x 2 x half> %vc, i32 zeroext %evl) {
4996; ZVFH-LABEL: vfnmadd_vf_nxv2f16_unmasked:
4997; ZVFH:       # %bb.0:
4998; ZVFH-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
4999; ZVFH-NEXT:    vfnmadd.vf v8, fa0, v9
5000; ZVFH-NEXT:    ret
5001;
5002; ZVFHMIN-LABEL: vfnmadd_vf_nxv2f16_unmasked:
5003; ZVFHMIN:       # %bb.0:
5004; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
5005; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
5006; ZVFHMIN-NEXT:    vmv.v.x v10, a1
5007; ZVFHMIN-NEXT:    lui a0, 8
5008; ZVFHMIN-NEXT:    vxor.vx v8, v8, a0
5009; ZVFHMIN-NEXT:    vxor.vx v9, v9, a0
5010; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v9
5011; ZVFHMIN-NEXT:    vfwcvt.f.f.v v9, v8
5012; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v10
5013; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m1, ta, ma
5014; ZVFHMIN-NEXT:    vfmadd.vv v12, v9, v11
5015; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf2, ta, ma
5016; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v12
5017; ZVFHMIN-NEXT:    ret
5018  %elt.head = insertelement <vscale x 2 x half> poison, half %b, i32 0
5019  %vb = shufflevector <vscale x 2 x half> %elt.head, <vscale x 2 x half> poison, <vscale x 2 x i32> zeroinitializer
5020  %negva = call <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x i1> splat (i1 true), i32 %evl)
5021  %negvc = call <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half> %vc, <vscale x 2 x i1> splat (i1 true), i32 %evl)
5022  %v = call <vscale x 2 x half> @llvm.vp.fma.nxv2f16(<vscale x 2 x half> %negva, <vscale x 2 x half> %vb, <vscale x 2 x half> %negvc, <vscale x 2 x i1> splat (i1 true), i32 %evl)
5023  ret <vscale x 2 x half> %v
5024}
5025
5026define <vscale x 2 x half> @vfnmadd_vf_nxv2f16_unmasked_commute(<vscale x 2 x half> %va, half %b, <vscale x 2 x half> %vc, i32 zeroext %evl) {
5027; ZVFH-LABEL: vfnmadd_vf_nxv2f16_unmasked_commute:
5028; ZVFH:       # %bb.0:
5029; ZVFH-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
5030; ZVFH-NEXT:    vfnmadd.vf v8, fa0, v9
5031; ZVFH-NEXT:    ret
5032;
5033; ZVFHMIN-LABEL: vfnmadd_vf_nxv2f16_unmasked_commute:
5034; ZVFHMIN:       # %bb.0:
5035; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
5036; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
5037; ZVFHMIN-NEXT:    vmv.v.x v10, a1
5038; ZVFHMIN-NEXT:    lui a0, 8
5039; ZVFHMIN-NEXT:    vxor.vx v8, v8, a0
5040; ZVFHMIN-NEXT:    vxor.vx v9, v9, a0
5041; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v9
5042; ZVFHMIN-NEXT:    vfwcvt.f.f.v v9, v8
5043; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v10
5044; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m1, ta, ma
5045; ZVFHMIN-NEXT:    vfmadd.vv v12, v9, v11
5046; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf2, ta, ma
5047; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v12
5048; ZVFHMIN-NEXT:    ret
5049  %elt.head = insertelement <vscale x 2 x half> poison, half %b, i32 0
5050  %vb = shufflevector <vscale x 2 x half> %elt.head, <vscale x 2 x half> poison, <vscale x 2 x i32> zeroinitializer
5051  %negva = call <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x i1> splat (i1 true), i32 %evl)
5052  %negvc = call <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half> %vc, <vscale x 2 x i1> splat (i1 true), i32 %evl)
5053  %v = call <vscale x 2 x half> @llvm.vp.fma.nxv2f16(<vscale x 2 x half> %vb, <vscale x 2 x half> %negva, <vscale x 2 x half> %negvc, <vscale x 2 x i1> splat (i1 true), i32 %evl)
5054  ret <vscale x 2 x half> %v
5055}
5056
5057define <vscale x 2 x half> @vfnmadd_vf_nxv2f16_neg_splat(<vscale x 2 x half> %va, half %b, <vscale x 2 x half> %vc, <vscale x 2 x i1> %m, i32 zeroext %evl) {
5058; ZVFH-LABEL: vfnmadd_vf_nxv2f16_neg_splat:
5059; ZVFH:       # %bb.0:
5060; ZVFH-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
5061; ZVFH-NEXT:    vfnmadd.vf v8, fa0, v9, v0.t
5062; ZVFH-NEXT:    ret
5063;
5064; ZVFHMIN-LABEL: vfnmadd_vf_nxv2f16_neg_splat:
5065; ZVFHMIN:       # %bb.0:
5066; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
5067; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
5068; ZVFHMIN-NEXT:    vmv.v.x v10, a1
5069; ZVFHMIN-NEXT:    lui a0, 8
5070; ZVFHMIN-NEXT:    vxor.vx v10, v10, a0, v0.t
5071; ZVFHMIN-NEXT:    vxor.vx v9, v9, a0, v0.t
5072; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v9, v0.t
5073; ZVFHMIN-NEXT:    vfwcvt.f.f.v v9, v10, v0.t
5074; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v8, v0.t
5075; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m1, ta, ma
5076; ZVFHMIN-NEXT:    vfmadd.vv v9, v10, v11, v0.t
5077; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf2, ta, ma
5078; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v9, v0.t
5079; ZVFHMIN-NEXT:    ret
5080  %elt.head = insertelement <vscale x 2 x half> poison, half %b, i32 0
5081  %vb = shufflevector <vscale x 2 x half> %elt.head, <vscale x 2 x half> poison, <vscale x 2 x i32> zeroinitializer
5082  %negvb = call <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half> %vb, <vscale x 2 x i1> %m, i32 %evl)
5083  %negvc = call <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half> %vc, <vscale x 2 x i1> %m, i32 %evl)
5084  %v = call <vscale x 2 x half> @llvm.vp.fma.nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x half> %negvb, <vscale x 2 x half> %negvc, <vscale x 2 x i1> %m, i32 %evl)
5085  ret <vscale x 2 x half> %v
5086}
5087
5088define <vscale x 2 x half> @vfnmadd_vf_nxv2f16_neg_splat_commute(<vscale x 2 x half> %va, half %b, <vscale x 2 x half> %vc, <vscale x 2 x i1> %m, i32 zeroext %evl) {
5089; ZVFH-LABEL: vfnmadd_vf_nxv2f16_neg_splat_commute:
5090; ZVFH:       # %bb.0:
5091; ZVFH-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
5092; ZVFH-NEXT:    vfnmadd.vf v8, fa0, v9, v0.t
5093; ZVFH-NEXT:    ret
5094;
5095; ZVFHMIN-LABEL: vfnmadd_vf_nxv2f16_neg_splat_commute:
5096; ZVFHMIN:       # %bb.0:
5097; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
5098; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
5099; ZVFHMIN-NEXT:    vmv.v.x v10, a1
5100; ZVFHMIN-NEXT:    lui a0, 8
5101; ZVFHMIN-NEXT:    vxor.vx v10, v10, a0, v0.t
5102; ZVFHMIN-NEXT:    vxor.vx v9, v9, a0, v0.t
5103; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v9, v0.t
5104; ZVFHMIN-NEXT:    vfwcvt.f.f.v v9, v10, v0.t
5105; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v8, v0.t
5106; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m1, ta, ma
5107; ZVFHMIN-NEXT:    vfmadd.vv v10, v9, v11, v0.t
5108; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf2, ta, ma
5109; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v10, v0.t
5110; ZVFHMIN-NEXT:    ret
5111  %elt.head = insertelement <vscale x 2 x half> poison, half %b, i32 0
5112  %vb = shufflevector <vscale x 2 x half> %elt.head, <vscale x 2 x half> poison, <vscale x 2 x i32> zeroinitializer
5113  %negvb = call <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half> %vb, <vscale x 2 x i1> %m, i32 %evl)
5114  %negvc = call <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half> %vc, <vscale x 2 x i1> %m, i32 %evl)
5115  %v = call <vscale x 2 x half> @llvm.vp.fma.nxv2f16(<vscale x 2 x half> %negvb, <vscale x 2 x half> %va, <vscale x 2 x half> %negvc, <vscale x 2 x i1> %m, i32 %evl)
5116  ret <vscale x 2 x half> %v
5117}
5118
5119define <vscale x 2 x half> @vfnmadd_vf_nxv2f16_neg_splat_unmasked(<vscale x 2 x half> %va, half %b, <vscale x 2 x half> %vc, i32 zeroext %evl) {
5120; ZVFH-LABEL: vfnmadd_vf_nxv2f16_neg_splat_unmasked:
5121; ZVFH:       # %bb.0:
5122; ZVFH-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
5123; ZVFH-NEXT:    vfnmadd.vf v8, fa0, v9
5124; ZVFH-NEXT:    ret
5125;
5126; ZVFHMIN-LABEL: vfnmadd_vf_nxv2f16_neg_splat_unmasked:
5127; ZVFHMIN:       # %bb.0:
5128; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
5129; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
5130; ZVFHMIN-NEXT:    vmv.v.x v10, a1
5131; ZVFHMIN-NEXT:    lui a0, 8
5132; ZVFHMIN-NEXT:    vxor.vx v9, v9, a0
5133; ZVFHMIN-NEXT:    vxor.vx v10, v10, a0
5134; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v9
5135; ZVFHMIN-NEXT:    vfwcvt.f.f.v v9, v10
5136; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v8
5137; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m1, ta, ma
5138; ZVFHMIN-NEXT:    vfmadd.vv v10, v9, v11
5139; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf2, ta, ma
5140; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v10
5141; ZVFHMIN-NEXT:    ret
5142  %elt.head = insertelement <vscale x 2 x half> poison, half %b, i32 0
5143  %vb = shufflevector <vscale x 2 x half> %elt.head, <vscale x 2 x half> poison, <vscale x 2 x i32> zeroinitializer
5144  %negvb = call <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half> %vb, <vscale x 2 x i1> splat (i1 true), i32 %evl)
5145  %negvc = call <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half> %vc, <vscale x 2 x i1> splat (i1 true), i32 %evl)
5146  %v = call <vscale x 2 x half> @llvm.vp.fma.nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x half> %negvb, <vscale x 2 x half> %negvc, <vscale x 2 x i1> splat (i1 true), i32 %evl)
5147  ret <vscale x 2 x half> %v
5148}
5149
5150define <vscale x 2 x half> @vfnmadd_vf_nxv2f16_neg_splat_unmasked_commute(<vscale x 2 x half> %va, half %b, <vscale x 2 x half> %vc, i32 zeroext %evl) {
5151; ZVFH-LABEL: vfnmadd_vf_nxv2f16_neg_splat_unmasked_commute:
5152; ZVFH:       # %bb.0:
5153; ZVFH-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
5154; ZVFH-NEXT:    vfnmadd.vf v8, fa0, v9
5155; ZVFH-NEXT:    ret
5156;
5157; ZVFHMIN-LABEL: vfnmadd_vf_nxv2f16_neg_splat_unmasked_commute:
5158; ZVFHMIN:       # %bb.0:
5159; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
5160; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
5161; ZVFHMIN-NEXT:    vmv.v.x v10, a1
5162; ZVFHMIN-NEXT:    lui a0, 8
5163; ZVFHMIN-NEXT:    vxor.vx v9, v9, a0
5164; ZVFHMIN-NEXT:    vxor.vx v10, v10, a0
5165; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v9
5166; ZVFHMIN-NEXT:    vfwcvt.f.f.v v9, v10
5167; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v8
5168; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m1, ta, ma
5169; ZVFHMIN-NEXT:    vfmadd.vv v10, v9, v11
5170; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf2, ta, ma
5171; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v10
5172; ZVFHMIN-NEXT:    ret
5173  %elt.head = insertelement <vscale x 2 x half> poison, half %b, i32 0
5174  %vb = shufflevector <vscale x 2 x half> %elt.head, <vscale x 2 x half> poison, <vscale x 2 x i32> zeroinitializer
5175  %negvb = call <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half> %vb, <vscale x 2 x i1> splat (i1 true), i32 %evl)
5176  %negvc = call <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half> %vc, <vscale x 2 x i1> splat (i1 true), i32 %evl)
5177  %v = call <vscale x 2 x half> @llvm.vp.fma.nxv2f16(<vscale x 2 x half> %negvb, <vscale x 2 x half> %va, <vscale x 2 x half> %negvc, <vscale x 2 x i1> splat (i1 true), i32 %evl)
5178  ret <vscale x 2 x half> %v
5179}
5180
5181define <vscale x 2 x half> @vfnmsub_vv_nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x half> %b, <vscale x 2 x half> %c, <vscale x 2 x i1> %m, i32 zeroext %evl) {
5182; ZVFH-LABEL: vfnmsub_vv_nxv2f16:
5183; ZVFH:       # %bb.0:
5184; ZVFH-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
5185; ZVFH-NEXT:    vfnmadd.vv v9, v8, v10, v0.t
5186; ZVFH-NEXT:    vmv1r.v v8, v9
5187; ZVFH-NEXT:    ret
5188;
5189; ZVFHMIN-LABEL: vfnmsub_vv_nxv2f16:
5190; ZVFHMIN:       # %bb.0:
5191; ZVFHMIN-NEXT:    lui a1, 8
5192; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
5193; ZVFHMIN-NEXT:    vxor.vx v9, v9, a1, v0.t
5194; ZVFHMIN-NEXT:    vxor.vx v10, v10, a1, v0.t
5195; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v10, v0.t
5196; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v9, v0.t
5197; ZVFHMIN-NEXT:    vfwcvt.f.f.v v9, v8, v0.t
5198; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m1, ta, ma
5199; ZVFHMIN-NEXT:    vfmadd.vv v10, v9, v11, v0.t
5200; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf2, ta, ma
5201; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v10, v0.t
5202; ZVFHMIN-NEXT:    ret
5203  %negb = call <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half> %b, <vscale x 2 x i1> %m, i32 %evl)
5204  %negc = call <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half> %c, <vscale x 2 x i1> %m, i32 %evl)
5205  %v = call <vscale x 2 x half> @llvm.vp.fma.nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x half> %negb, <vscale x 2 x half> %negc, <vscale x 2 x i1> %m, i32 %evl)
5206  ret <vscale x 2 x half> %v
5207}
5208
5209define <vscale x 2 x half> @vfnmsub_vv_nxv2f16_commuted(<vscale x 2 x half> %va, <vscale x 2 x half> %b, <vscale x 2 x half> %c, <vscale x 2 x i1> %m, i32 zeroext %evl) {
5210; ZVFH-LABEL: vfnmsub_vv_nxv2f16_commuted:
5211; ZVFH:       # %bb.0:
5212; ZVFH-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
5213; ZVFH-NEXT:    vfnmadd.vv v8, v9, v10, v0.t
5214; ZVFH-NEXT:    ret
5215;
5216; ZVFHMIN-LABEL: vfnmsub_vv_nxv2f16_commuted:
5217; ZVFHMIN:       # %bb.0:
5218; ZVFHMIN-NEXT:    lui a1, 8
5219; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
5220; ZVFHMIN-NEXT:    vxor.vx v9, v9, a1, v0.t
5221; ZVFHMIN-NEXT:    vxor.vx v10, v10, a1, v0.t
5222; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v10, v0.t
5223; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v9, v0.t
5224; ZVFHMIN-NEXT:    vfwcvt.f.f.v v9, v8, v0.t
5225; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m1, ta, ma
5226; ZVFHMIN-NEXT:    vfmadd.vv v9, v10, v11, v0.t
5227; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf2, ta, ma
5228; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v9, v0.t
5229; ZVFHMIN-NEXT:    ret
5230  %negb = call <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half> %b, <vscale x 2 x i1> %m, i32 %evl)
5231  %negc = call <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half> %c, <vscale x 2 x i1> %m, i32 %evl)
5232  %v = call <vscale x 2 x half> @llvm.vp.fma.nxv2f16(<vscale x 2 x half> %negb, <vscale x 2 x half> %va, <vscale x 2 x half> %negc, <vscale x 2 x i1> %m, i32 %evl)
5233  ret <vscale x 2 x half> %v
5234}
5235
5236define <vscale x 2 x half> @vfnmsub_vv_nxv2f16_unmasked(<vscale x 2 x half> %va, <vscale x 2 x half> %b, <vscale x 2 x half> %c, i32 zeroext %evl) {
5237; ZVFH-LABEL: vfnmsub_vv_nxv2f16_unmasked:
5238; ZVFH:       # %bb.0:
5239; ZVFH-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
5240; ZVFH-NEXT:    vfnmadd.vv v8, v9, v10
5241; ZVFH-NEXT:    ret
5242;
5243; ZVFHMIN-LABEL: vfnmsub_vv_nxv2f16_unmasked:
5244; ZVFHMIN:       # %bb.0:
5245; ZVFHMIN-NEXT:    lui a1, 8
5246; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
5247; ZVFHMIN-NEXT:    vxor.vx v9, v9, a1
5248; ZVFHMIN-NEXT:    vxor.vx v10, v10, a1
5249; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v10
5250; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v9
5251; ZVFHMIN-NEXT:    vfwcvt.f.f.v v9, v8
5252; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m1, ta, ma
5253; ZVFHMIN-NEXT:    vfmadd.vv v9, v10, v11
5254; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf2, ta, ma
5255; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v9
5256; ZVFHMIN-NEXT:    ret
5257  %negb = call <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half> %b, <vscale x 2 x i1> splat (i1 true), i32 %evl)
5258  %negc = call <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half> %c, <vscale x 2 x i1> splat (i1 true), i32 %evl)
5259  %v = call <vscale x 2 x half> @llvm.vp.fma.nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x half> %negb, <vscale x 2 x half> %negc, <vscale x 2 x i1> splat (i1 true), i32 %evl)
5260  ret <vscale x 2 x half> %v
5261}
5262
5263define <vscale x 2 x half> @vfnmsub_vv_nxv2f16_unmasked_commuted(<vscale x 2 x half> %va, <vscale x 2 x half> %b, <vscale x 2 x half> %c, i32 zeroext %evl) {
5264; ZVFH-LABEL: vfnmsub_vv_nxv2f16_unmasked_commuted:
5265; ZVFH:       # %bb.0:
5266; ZVFH-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
5267; ZVFH-NEXT:    vfnmadd.vv v8, v9, v10
5268; ZVFH-NEXT:    ret
5269;
5270; ZVFHMIN-LABEL: vfnmsub_vv_nxv2f16_unmasked_commuted:
5271; ZVFHMIN:       # %bb.0:
5272; ZVFHMIN-NEXT:    lui a1, 8
5273; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
5274; ZVFHMIN-NEXT:    vxor.vx v9, v9, a1
5275; ZVFHMIN-NEXT:    vxor.vx v10, v10, a1
5276; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v10
5277; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v9
5278; ZVFHMIN-NEXT:    vfwcvt.f.f.v v9, v8
5279; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m1, ta, ma
5280; ZVFHMIN-NEXT:    vfmadd.vv v9, v10, v11
5281; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf2, ta, ma
5282; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v9
5283; ZVFHMIN-NEXT:    ret
5284  %negb = call <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half> %b, <vscale x 2 x i1> splat (i1 true), i32 %evl)
5285  %negc = call <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half> %c, <vscale x 2 x i1> splat (i1 true), i32 %evl)
5286  %v = call <vscale x 2 x half> @llvm.vp.fma.nxv2f16(<vscale x 2 x half> %negb, <vscale x 2 x half> %va, <vscale x 2 x half> %negc, <vscale x 2 x i1> splat (i1 true), i32 %evl)
5287  ret <vscale x 2 x half> %v
5288}
5289
5290define <vscale x 2 x half> @vfnmsub_vf_nxv2f16(<vscale x 2 x half> %va, half %b, <vscale x 2 x half> %vc, <vscale x 2 x i1> %m, i32 zeroext %evl) {
5291; ZVFH-LABEL: vfnmsub_vf_nxv2f16:
5292; ZVFH:       # %bb.0:
5293; ZVFH-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
5294; ZVFH-NEXT:    vfnmsub.vf v8, fa0, v9, v0.t
5295; ZVFH-NEXT:    ret
5296;
5297; ZVFHMIN-LABEL: vfnmsub_vf_nxv2f16:
5298; ZVFHMIN:       # %bb.0:
5299; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
5300; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
5301; ZVFHMIN-NEXT:    vmv.v.x v10, a1
5302; ZVFHMIN-NEXT:    lui a0, 8
5303; ZVFHMIN-NEXT:    vxor.vx v8, v8, a0, v0.t
5304; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v8, v0.t
5305; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v9, v0.t
5306; ZVFHMIN-NEXT:    vfwcvt.f.f.v v9, v10, v0.t
5307; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m1, ta, ma
5308; ZVFHMIN-NEXT:    vfmadd.vv v9, v11, v8, v0.t
5309; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf2, ta, ma
5310; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v9, v0.t
5311; ZVFHMIN-NEXT:    ret
5312  %elt.head = insertelement <vscale x 2 x half> poison, half %b, i32 0
5313  %vb = shufflevector <vscale x 2 x half> %elt.head, <vscale x 2 x half> poison, <vscale x 2 x i32> zeroinitializer
5314  %negva = call <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x i1> %m, i32 %evl)
5315  %v = call <vscale x 2 x half> @llvm.vp.fma.nxv2f16(<vscale x 2 x half> %negva, <vscale x 2 x half> %vb, <vscale x 2 x half> %vc, <vscale x 2 x i1> %m, i32 %evl)
5316  ret <vscale x 2 x half> %v
5317}
5318
5319define <vscale x 2 x half> @vfnmsub_vf_nxv2f16_commute(<vscale x 2 x half> %va, half %b, <vscale x 2 x half> %vc, <vscale x 2 x i1> %m, i32 zeroext %evl) {
5320; ZVFH-LABEL: vfnmsub_vf_nxv2f16_commute:
5321; ZVFH:       # %bb.0:
5322; ZVFH-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
5323; ZVFH-NEXT:    vfnmsub.vf v8, fa0, v9, v0.t
5324; ZVFH-NEXT:    ret
5325;
5326; ZVFHMIN-LABEL: vfnmsub_vf_nxv2f16_commute:
5327; ZVFHMIN:       # %bb.0:
5328; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
5329; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
5330; ZVFHMIN-NEXT:    vmv.v.x v10, a1
5331; ZVFHMIN-NEXT:    lui a0, 8
5332; ZVFHMIN-NEXT:    vxor.vx v8, v8, a0, v0.t
5333; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v8, v0.t
5334; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v9, v0.t
5335; ZVFHMIN-NEXT:    vfwcvt.f.f.v v9, v10, v0.t
5336; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m1, ta, ma
5337; ZVFHMIN-NEXT:    vfmadd.vv v11, v9, v8, v0.t
5338; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf2, ta, ma
5339; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v11, v0.t
5340; ZVFHMIN-NEXT:    ret
5341  %elt.head = insertelement <vscale x 2 x half> poison, half %b, i32 0
5342  %vb = shufflevector <vscale x 2 x half> %elt.head, <vscale x 2 x half> poison, <vscale x 2 x i32> zeroinitializer
5343  %negva = call <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x i1> %m, i32 %evl)
5344  %v = call <vscale x 2 x half> @llvm.vp.fma.nxv2f16(<vscale x 2 x half> %vb, <vscale x 2 x half> %negva, <vscale x 2 x half> %vc, <vscale x 2 x i1> %m, i32 %evl)
5345  ret <vscale x 2 x half> %v
5346}
5347
5348define <vscale x 2 x half> @vfnmsub_vf_nxv2f16_unmasked(<vscale x 2 x half> %va, half %b, <vscale x 2 x half> %vc, i32 zeroext %evl) {
5349; ZVFH-LABEL: vfnmsub_vf_nxv2f16_unmasked:
5350; ZVFH:       # %bb.0:
5351; ZVFH-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
5352; ZVFH-NEXT:    vfnmsub.vf v8, fa0, v9
5353; ZVFH-NEXT:    ret
5354;
5355; ZVFHMIN-LABEL: vfnmsub_vf_nxv2f16_unmasked:
5356; ZVFHMIN:       # %bb.0:
5357; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
5358; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
5359; ZVFHMIN-NEXT:    vmv.v.x v10, a1
5360; ZVFHMIN-NEXT:    lui a0, 8
5361; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v9
5362; ZVFHMIN-NEXT:    vxor.vx v8, v8, a0
5363; ZVFHMIN-NEXT:    vfwcvt.f.f.v v9, v8
5364; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v10
5365; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m1, ta, ma
5366; ZVFHMIN-NEXT:    vfmadd.vv v12, v9, v11
5367; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf2, ta, ma
5368; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v12
5369; ZVFHMIN-NEXT:    ret
5370  %elt.head = insertelement <vscale x 2 x half> poison, half %b, i32 0
5371  %vb = shufflevector <vscale x 2 x half> %elt.head, <vscale x 2 x half> poison, <vscale x 2 x i32> zeroinitializer
5372  %negva = call <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x i1> splat (i1 true), i32 %evl)
5373  %v = call <vscale x 2 x half> @llvm.vp.fma.nxv2f16(<vscale x 2 x half> %negva, <vscale x 2 x half> %vb, <vscale x 2 x half> %vc, <vscale x 2 x i1> splat (i1 true), i32 %evl)
5374  ret <vscale x 2 x half> %v
5375}
5376
5377define <vscale x 2 x half> @vfnmsub_vf_nxv2f16_unmasked_commute(<vscale x 2 x half> %va, half %b, <vscale x 2 x half> %vc, i32 zeroext %evl) {
5378; ZVFH-LABEL: vfnmsub_vf_nxv2f16_unmasked_commute:
5379; ZVFH:       # %bb.0:
5380; ZVFH-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
5381; ZVFH-NEXT:    vfnmsub.vf v8, fa0, v9
5382; ZVFH-NEXT:    ret
5383;
5384; ZVFHMIN-LABEL: vfnmsub_vf_nxv2f16_unmasked_commute:
5385; ZVFHMIN:       # %bb.0:
5386; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
5387; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
5388; ZVFHMIN-NEXT:    vmv.v.x v10, a1
5389; ZVFHMIN-NEXT:    lui a0, 8
5390; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v9
5391; ZVFHMIN-NEXT:    vxor.vx v8, v8, a0
5392; ZVFHMIN-NEXT:    vfwcvt.f.f.v v9, v8
5393; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v10
5394; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m1, ta, ma
5395; ZVFHMIN-NEXT:    vfmadd.vv v12, v9, v11
5396; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf2, ta, ma
5397; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v12
5398; ZVFHMIN-NEXT:    ret
5399  %elt.head = insertelement <vscale x 2 x half> poison, half %b, i32 0
5400  %vb = shufflevector <vscale x 2 x half> %elt.head, <vscale x 2 x half> poison, <vscale x 2 x i32> zeroinitializer
5401  %negva = call <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x i1> splat (i1 true), i32 %evl)
5402  %v = call <vscale x 2 x half> @llvm.vp.fma.nxv2f16(<vscale x 2 x half> %vb, <vscale x 2 x half> %negva, <vscale x 2 x half> %vc, <vscale x 2 x i1> splat (i1 true), i32 %evl)
5403  ret <vscale x 2 x half> %v
5404}
5405
5406define <vscale x 2 x half> @vfnmsub_vf_nxv2f16_neg_splat(<vscale x 2 x half> %va, half %b, <vscale x 2 x half> %vc, <vscale x 2 x i1> %m, i32 zeroext %evl) {
5407; ZVFH-LABEL: vfnmsub_vf_nxv2f16_neg_splat:
5408; ZVFH:       # %bb.0:
5409; ZVFH-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
5410; ZVFH-NEXT:    vfnmsub.vf v8, fa0, v9, v0.t
5411; ZVFH-NEXT:    ret
5412;
5413; ZVFHMIN-LABEL: vfnmsub_vf_nxv2f16_neg_splat:
5414; ZVFHMIN:       # %bb.0:
5415; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
5416; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
5417; ZVFHMIN-NEXT:    vmv.v.x v10, a1
5418; ZVFHMIN-NEXT:    lui a0, 8
5419; ZVFHMIN-NEXT:    vxor.vx v10, v10, a0, v0.t
5420; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v10, v0.t
5421; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v9, v0.t
5422; ZVFHMIN-NEXT:    vfwcvt.f.f.v v9, v8, v0.t
5423; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m1, ta, ma
5424; ZVFHMIN-NEXT:    vfmadd.vv v11, v9, v10, v0.t
5425; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf2, ta, ma
5426; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v11, v0.t
5427; ZVFHMIN-NEXT:    ret
5428  %elt.head = insertelement <vscale x 2 x half> poison, half %b, i32 0
5429  %vb = shufflevector <vscale x 2 x half> %elt.head, <vscale x 2 x half> poison, <vscale x 2 x i32> zeroinitializer
5430  %negvb = call <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half> %vb, <vscale x 2 x i1> %m, i32 %evl)
5431  %v = call <vscale x 2 x half> @llvm.vp.fma.nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x half> %negvb, <vscale x 2 x half> %vc, <vscale x 2 x i1> %m, i32 %evl)
5432  ret <vscale x 2 x half> %v
5433}
5434
5435define <vscale x 2 x half> @vfnmsub_vf_nxv2f16_neg_splat_commute(<vscale x 2 x half> %va, half %b, <vscale x 2 x half> %vc, <vscale x 2 x i1> %m, i32 zeroext %evl) {
5436; ZVFH-LABEL: vfnmsub_vf_nxv2f16_neg_splat_commute:
5437; ZVFH:       # %bb.0:
5438; ZVFH-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
5439; ZVFH-NEXT:    vfnmsub.vf v8, fa0, v9, v0.t
5440; ZVFH-NEXT:    ret
5441;
5442; ZVFHMIN-LABEL: vfnmsub_vf_nxv2f16_neg_splat_commute:
5443; ZVFHMIN:       # %bb.0:
5444; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
5445; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
5446; ZVFHMIN-NEXT:    vmv.v.x v10, a1
5447; ZVFHMIN-NEXT:    lui a0, 8
5448; ZVFHMIN-NEXT:    vxor.vx v10, v10, a0, v0.t
5449; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v10, v0.t
5450; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v9, v0.t
5451; ZVFHMIN-NEXT:    vfwcvt.f.f.v v9, v8, v0.t
5452; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m1, ta, ma
5453; ZVFHMIN-NEXT:    vfmadd.vv v9, v11, v10, v0.t
5454; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf2, ta, ma
5455; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v9, v0.t
5456; ZVFHMIN-NEXT:    ret
5457  %elt.head = insertelement <vscale x 2 x half> poison, half %b, i32 0
5458  %vb = shufflevector <vscale x 2 x half> %elt.head, <vscale x 2 x half> poison, <vscale x 2 x i32> zeroinitializer
5459  %negvb = call <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half> %vb, <vscale x 2 x i1> %m, i32 %evl)
5460  %v = call <vscale x 2 x half> @llvm.vp.fma.nxv2f16(<vscale x 2 x half> %negvb, <vscale x 2 x half> %va, <vscale x 2 x half> %vc, <vscale x 2 x i1> %m, i32 %evl)
5461  ret <vscale x 2 x half> %v
5462}
5463
5464define <vscale x 2 x half> @vfnmsub_vf_nxv2f16_neg_splat_unmasked(<vscale x 2 x half> %va, half %b, <vscale x 2 x half> %vc, i32 zeroext %evl) {
5465; ZVFH-LABEL: vfnmsub_vf_nxv2f16_neg_splat_unmasked:
5466; ZVFH:       # %bb.0:
5467; ZVFH-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
5468; ZVFH-NEXT:    vfnmsub.vf v8, fa0, v9
5469; ZVFH-NEXT:    ret
5470;
5471; ZVFHMIN-LABEL: vfnmsub_vf_nxv2f16_neg_splat_unmasked:
5472; ZVFHMIN:       # %bb.0:
5473; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
5474; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
5475; ZVFHMIN-NEXT:    vmv.v.x v10, a1
5476; ZVFHMIN-NEXT:    lui a0, 8
5477; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v9
5478; ZVFHMIN-NEXT:    vxor.vx v9, v10, a0
5479; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v9
5480; ZVFHMIN-NEXT:    vfwcvt.f.f.v v9, v8
5481; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m1, ta, ma
5482; ZVFHMIN-NEXT:    vfmadd.vv v9, v10, v11
5483; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf2, ta, ma
5484; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v9
5485; ZVFHMIN-NEXT:    ret
5486  %elt.head = insertelement <vscale x 2 x half> poison, half %b, i32 0
5487  %vb = shufflevector <vscale x 2 x half> %elt.head, <vscale x 2 x half> poison, <vscale x 2 x i32> zeroinitializer
5488  %negvb = call <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half> %vb, <vscale x 2 x i1> splat (i1 true), i32 %evl)
5489  %v = call <vscale x 2 x half> @llvm.vp.fma.nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x half> %negvb, <vscale x 2 x half> %vc, <vscale x 2 x i1> splat (i1 true), i32 %evl)
5490  ret <vscale x 2 x half> %v
5491}
5492
5493define <vscale x 2 x half> @vfnmsub_vf_nxv2f16_neg_splat_unmasked_commute(<vscale x 2 x half> %va, half %b, <vscale x 2 x half> %vc, i32 zeroext %evl) {
5494; ZVFH-LABEL: vfnmsub_vf_nxv2f16_neg_splat_unmasked_commute:
5495; ZVFH:       # %bb.0:
5496; ZVFH-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
5497; ZVFH-NEXT:    vfnmsub.vf v8, fa0, v9
5498; ZVFH-NEXT:    ret
5499;
5500; ZVFHMIN-LABEL: vfnmsub_vf_nxv2f16_neg_splat_unmasked_commute:
5501; ZVFHMIN:       # %bb.0:
5502; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
5503; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
5504; ZVFHMIN-NEXT:    vmv.v.x v10, a1
5505; ZVFHMIN-NEXT:    lui a0, 8
5506; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v9
5507; ZVFHMIN-NEXT:    vxor.vx v9, v10, a0
5508; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v9
5509; ZVFHMIN-NEXT:    vfwcvt.f.f.v v9, v8
5510; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m1, ta, ma
5511; ZVFHMIN-NEXT:    vfmadd.vv v9, v10, v11
5512; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf2, ta, ma
5513; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v9
5514; ZVFHMIN-NEXT:    ret
5515  %elt.head = insertelement <vscale x 2 x half> poison, half %b, i32 0
5516  %vb = shufflevector <vscale x 2 x half> %elt.head, <vscale x 2 x half> poison, <vscale x 2 x i32> zeroinitializer
5517  %negvb = call <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half> %vb, <vscale x 2 x i1> splat (i1 true), i32 %evl)
5518  %v = call <vscale x 2 x half> @llvm.vp.fma.nxv2f16(<vscale x 2 x half> %negvb, <vscale x 2 x half> %va, <vscale x 2 x half> %vc, <vscale x 2 x i1> splat (i1 true), i32 %evl)
5519  ret <vscale x 2 x half> %v
5520}
5521
5522declare <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half>, <vscale x 4 x i1>, i32)
5523
5524define <vscale x 4 x half> @vfmsub_vv_nxv4f16(<vscale x 4 x half> %va, <vscale x 4 x half> %b, <vscale x 4 x half> %c, <vscale x 4 x i1> %m, i32 zeroext %evl) {
5525; ZVFH-LABEL: vfmsub_vv_nxv4f16:
5526; ZVFH:       # %bb.0:
5527; ZVFH-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
5528; ZVFH-NEXT:    vfmsub.vv v9, v8, v10, v0.t
5529; ZVFH-NEXT:    vmv.v.v v8, v9
5530; ZVFH-NEXT:    ret
5531;
5532; ZVFHMIN-LABEL: vfmsub_vv_nxv4f16:
5533; ZVFHMIN:       # %bb.0:
5534; ZVFHMIN-NEXT:    lui a1, 8
5535; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
5536; ZVFHMIN-NEXT:    vxor.vx v10, v10, a1, v0.t
5537; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v10, v0.t
5538; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v8, v0.t
5539; ZVFHMIN-NEXT:    vfwcvt.f.f.v v14, v9, v0.t
5540; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m2, ta, ma
5541; ZVFHMIN-NEXT:    vfmadd.vv v14, v10, v12, v0.t
5542; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m1, ta, ma
5543; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v14, v0.t
5544; ZVFHMIN-NEXT:    ret
5545  %negc = call <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half> %c, <vscale x 4 x i1> %m, i32 %evl)
5546  %v = call <vscale x 4 x half> @llvm.vp.fma.nxv4f16(<vscale x 4 x half> %va, <vscale x 4 x half> %b, <vscale x 4 x half> %negc, <vscale x 4 x i1> %m, i32 %evl)
5547  ret <vscale x 4 x half> %v
5548}
5549
5550define <vscale x 4 x half> @vfmsub_vv_nxv4f16_unmasked(<vscale x 4 x half> %va, <vscale x 4 x half> %b, <vscale x 4 x half> %c, i32 zeroext %evl) {
5551; ZVFH-LABEL: vfmsub_vv_nxv4f16_unmasked:
5552; ZVFH:       # %bb.0:
5553; ZVFH-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
5554; ZVFH-NEXT:    vfmsub.vv v8, v9, v10
5555; ZVFH-NEXT:    ret
5556;
5557; ZVFHMIN-LABEL: vfmsub_vv_nxv4f16_unmasked:
5558; ZVFHMIN:       # %bb.0:
5559; ZVFHMIN-NEXT:    lui a1, 8
5560; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
5561; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v8
5562; ZVFHMIN-NEXT:    vxor.vx v8, v10, a1
5563; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v8
5564; ZVFHMIN-NEXT:    vfwcvt.f.f.v v14, v9
5565; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m2, ta, ma
5566; ZVFHMIN-NEXT:    vfmadd.vv v14, v12, v10
5567; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m1, ta, ma
5568; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v14
5569; ZVFHMIN-NEXT:    ret
5570  %negc = call <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half> %c, <vscale x 4 x i1> splat (i1 true), i32 %evl)
5571  %v = call <vscale x 4 x half> @llvm.vp.fma.nxv4f16(<vscale x 4 x half> %va, <vscale x 4 x half> %b, <vscale x 4 x half> %negc, <vscale x 4 x i1> splat (i1 true), i32 %evl)
5572  ret <vscale x 4 x half> %v
5573}
5574
5575define <vscale x 4 x half> @vfmsub_vf_nxv4f16(<vscale x 4 x half> %va, half %b, <vscale x 4 x half> %vc, <vscale x 4 x i1> %m, i32 zeroext %evl) {
5576; ZVFH-LABEL: vfmsub_vf_nxv4f16:
5577; ZVFH:       # %bb.0:
5578; ZVFH-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
5579; ZVFH-NEXT:    vfmsub.vf v8, fa0, v9, v0.t
5580; ZVFH-NEXT:    ret
5581;
5582; ZVFHMIN-LABEL: vfmsub_vf_nxv4f16:
5583; ZVFHMIN:       # %bb.0:
5584; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
5585; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
5586; ZVFHMIN-NEXT:    vmv.v.x v10, a1
5587; ZVFHMIN-NEXT:    lui a0, 8
5588; ZVFHMIN-NEXT:    vxor.vx v9, v9, a0, v0.t
5589; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v9, v0.t
5590; ZVFHMIN-NEXT:    vfwcvt.f.f.v v14, v8, v0.t
5591; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v10, v0.t
5592; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m2, ta, ma
5593; ZVFHMIN-NEXT:    vfmadd.vv v16, v14, v12, v0.t
5594; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m1, ta, ma
5595; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v16, v0.t
5596; ZVFHMIN-NEXT:    ret
5597  %elt.head = insertelement <vscale x 4 x half> poison, half %b, i32 0
5598  %vb = shufflevector <vscale x 4 x half> %elt.head, <vscale x 4 x half> poison, <vscale x 4 x i32> zeroinitializer
5599  %negvc = call <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half> %vc, <vscale x 4 x i1> %m, i32 %evl)
5600  %v = call <vscale x 4 x half> @llvm.vp.fma.nxv4f16(<vscale x 4 x half> %va, <vscale x 4 x half> %vb, <vscale x 4 x half> %negvc, <vscale x 4 x i1> %m, i32 %evl)
5601  ret <vscale x 4 x half> %v
5602}
5603
5604define <vscale x 4 x half> @vfmsub_vf_nxv4f16_commute(<vscale x 4 x half> %va, half %b, <vscale x 4 x half> %vc, <vscale x 4 x i1> %m, i32 zeroext %evl) {
5605; ZVFH-LABEL: vfmsub_vf_nxv4f16_commute:
5606; ZVFH:       # %bb.0:
5607; ZVFH-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
5608; ZVFH-NEXT:    vfmsub.vf v8, fa0, v9, v0.t
5609; ZVFH-NEXT:    ret
5610;
5611; ZVFHMIN-LABEL: vfmsub_vf_nxv4f16_commute:
5612; ZVFHMIN:       # %bb.0:
5613; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
5614; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
5615; ZVFHMIN-NEXT:    vmv.v.x v10, a1
5616; ZVFHMIN-NEXT:    lui a0, 8
5617; ZVFHMIN-NEXT:    vxor.vx v9, v9, a0, v0.t
5618; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v9, v0.t
5619; ZVFHMIN-NEXT:    vfwcvt.f.f.v v14, v8, v0.t
5620; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v10, v0.t
5621; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m2, ta, ma
5622; ZVFHMIN-NEXT:    vfmadd.vv v14, v8, v12, v0.t
5623; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m1, ta, ma
5624; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v14, v0.t
5625; ZVFHMIN-NEXT:    ret
5626  %elt.head = insertelement <vscale x 4 x half> poison, half %b, i32 0
5627  %vb = shufflevector <vscale x 4 x half> %elt.head, <vscale x 4 x half> poison, <vscale x 4 x i32> zeroinitializer
5628  %negvc = call <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half> %vc, <vscale x 4 x i1> %m, i32 %evl)
5629  %v = call <vscale x 4 x half> @llvm.vp.fma.nxv4f16(<vscale x 4 x half> %vb, <vscale x 4 x half> %va, <vscale x 4 x half> %negvc, <vscale x 4 x i1> %m, i32 %evl)
5630  ret <vscale x 4 x half> %v
5631}
5632
5633define <vscale x 4 x half> @vfmsub_vf_nxv4f16_unmasked(<vscale x 4 x half> %va, half %b, <vscale x 4 x half> %vc, i32 zeroext %evl) {
5634; ZVFH-LABEL: vfmsub_vf_nxv4f16_unmasked:
5635; ZVFH:       # %bb.0:
5636; ZVFH-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
5637; ZVFH-NEXT:    vfmsub.vf v8, fa0, v9
5638; ZVFH-NEXT:    ret
5639;
5640; ZVFHMIN-LABEL: vfmsub_vf_nxv4f16_unmasked:
5641; ZVFHMIN:       # %bb.0:
5642; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
5643; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
5644; ZVFHMIN-NEXT:    vmv.v.x v10, a1
5645; ZVFHMIN-NEXT:    lui a0, 8
5646; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v8
5647; ZVFHMIN-NEXT:    vxor.vx v8, v9, a0
5648; ZVFHMIN-NEXT:    vfwcvt.f.f.v v14, v8
5649; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v10
5650; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m2, ta, ma
5651; ZVFHMIN-NEXT:    vfmadd.vv v16, v12, v14
5652; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m1, ta, ma
5653; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v16
5654; ZVFHMIN-NEXT:    ret
5655  %elt.head = insertelement <vscale x 4 x half> poison, half %b, i32 0
5656  %vb = shufflevector <vscale x 4 x half> %elt.head, <vscale x 4 x half> poison, <vscale x 4 x i32> zeroinitializer
5657  %negvc = call <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half> %vc, <vscale x 4 x i1> splat (i1 true), i32 %evl)
5658  %v = call <vscale x 4 x half> @llvm.vp.fma.nxv4f16(<vscale x 4 x half> %va, <vscale x 4 x half> %vb, <vscale x 4 x half> %negvc, <vscale x 4 x i1> splat (i1 true), i32 %evl)
5659  ret <vscale x 4 x half> %v
5660}
5661
5662define <vscale x 4 x half> @vfmsub_vf_nxv4f16_unmasked_commute(<vscale x 4 x half> %va, half %b, <vscale x 4 x half> %vc, i32 zeroext %evl) {
5663; ZVFH-LABEL: vfmsub_vf_nxv4f16_unmasked_commute:
5664; ZVFH:       # %bb.0:
5665; ZVFH-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
5666; ZVFH-NEXT:    vfmsub.vf v8, fa0, v9
5667; ZVFH-NEXT:    ret
5668;
5669; ZVFHMIN-LABEL: vfmsub_vf_nxv4f16_unmasked_commute:
5670; ZVFHMIN:       # %bb.0:
5671; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
5672; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
5673; ZVFHMIN-NEXT:    vmv.v.x v10, a1
5674; ZVFHMIN-NEXT:    lui a0, 8
5675; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v8
5676; ZVFHMIN-NEXT:    vxor.vx v8, v9, a0
5677; ZVFHMIN-NEXT:    vfwcvt.f.f.v v14, v8
5678; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v10
5679; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m2, ta, ma
5680; ZVFHMIN-NEXT:    vfmadd.vv v16, v12, v14
5681; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m1, ta, ma
5682; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v16
5683; ZVFHMIN-NEXT:    ret
5684  %elt.head = insertelement <vscale x 4 x half> poison, half %b, i32 0
5685  %vb = shufflevector <vscale x 4 x half> %elt.head, <vscale x 4 x half> poison, <vscale x 4 x i32> zeroinitializer
5686  %negvc = call <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half> %vc, <vscale x 4 x i1> splat (i1 true), i32 %evl)
5687  %v = call <vscale x 4 x half> @llvm.vp.fma.nxv4f16(<vscale x 4 x half> %vb, <vscale x 4 x half> %va, <vscale x 4 x half> %negvc, <vscale x 4 x i1> splat (i1 true), i32 %evl)
5688  ret <vscale x 4 x half> %v
5689}
5690
5691define <vscale x 4 x half> @vfnmadd_vv_nxv4f16(<vscale x 4 x half> %va, <vscale x 4 x half> %b, <vscale x 4 x half> %c, <vscale x 4 x i1> %m, i32 zeroext %evl) {
5692; ZVFH-LABEL: vfnmadd_vv_nxv4f16:
5693; ZVFH:       # %bb.0:
5694; ZVFH-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
5695; ZVFH-NEXT:    vfnmadd.vv v9, v8, v10, v0.t
5696; ZVFH-NEXT:    vmv.v.v v8, v9
5697; ZVFH-NEXT:    ret
5698;
5699; ZVFHMIN-LABEL: vfnmadd_vv_nxv4f16:
5700; ZVFHMIN:       # %bb.0:
5701; ZVFHMIN-NEXT:    lui a1, 8
5702; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
5703; ZVFHMIN-NEXT:    vxor.vx v9, v9, a1, v0.t
5704; ZVFHMIN-NEXT:    vxor.vx v10, v10, a1, v0.t
5705; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v10, v0.t
5706; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v9, v0.t
5707; ZVFHMIN-NEXT:    vfwcvt.f.f.v v14, v8, v0.t
5708; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m2, ta, ma
5709; ZVFHMIN-NEXT:    vfmadd.vv v10, v14, v12, v0.t
5710; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m1, ta, ma
5711; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v10, v0.t
5712; ZVFHMIN-NEXT:    ret
5713  %negb = call <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half> %b, <vscale x 4 x i1> %m, i32 %evl)
5714  %negc = call <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half> %c, <vscale x 4 x i1> %m, i32 %evl)
5715  %v = call <vscale x 4 x half> @llvm.vp.fma.nxv4f16(<vscale x 4 x half> %va, <vscale x 4 x half> %negb, <vscale x 4 x half> %negc, <vscale x 4 x i1> %m, i32 %evl)
5716  ret <vscale x 4 x half> %v
5717}
5718
5719define <vscale x 4 x half> @vfnmadd_vv_nxv4f16_commuted(<vscale x 4 x half> %va, <vscale x 4 x half> %b, <vscale x 4 x half> %c, <vscale x 4 x i1> %m, i32 zeroext %evl) {
5720; ZVFH-LABEL: vfnmadd_vv_nxv4f16_commuted:
5721; ZVFH:       # %bb.0:
5722; ZVFH-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
5723; ZVFH-NEXT:    vfnmadd.vv v8, v9, v10, v0.t
5724; ZVFH-NEXT:    ret
5725;
5726; ZVFHMIN-LABEL: vfnmadd_vv_nxv4f16_commuted:
5727; ZVFHMIN:       # %bb.0:
5728; ZVFHMIN-NEXT:    lui a1, 8
5729; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
5730; ZVFHMIN-NEXT:    vxor.vx v9, v9, a1, v0.t
5731; ZVFHMIN-NEXT:    vxor.vx v10, v10, a1, v0.t
5732; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v10, v0.t
5733; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v9, v0.t
5734; ZVFHMIN-NEXT:    vfwcvt.f.f.v v14, v8, v0.t
5735; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m2, ta, ma
5736; ZVFHMIN-NEXT:    vfmadd.vv v14, v10, v12, v0.t
5737; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m1, ta, ma
5738; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v14, v0.t
5739; ZVFHMIN-NEXT:    ret
5740  %negb = call <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half> %b, <vscale x 4 x i1> %m, i32 %evl)
5741  %negc = call <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half> %c, <vscale x 4 x i1> %m, i32 %evl)
5742  %v = call <vscale x 4 x half> @llvm.vp.fma.nxv4f16(<vscale x 4 x half> %negb, <vscale x 4 x half> %va, <vscale x 4 x half> %negc, <vscale x 4 x i1> %m, i32 %evl)
5743  ret <vscale x 4 x half> %v
5744}
5745
5746define <vscale x 4 x half> @vfnmadd_vv_nxv4f16_unmasked(<vscale x 4 x half> %va, <vscale x 4 x half> %b, <vscale x 4 x half> %c, i32 zeroext %evl) {
5747; ZVFH-LABEL: vfnmadd_vv_nxv4f16_unmasked:
5748; ZVFH:       # %bb.0:
5749; ZVFH-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
5750; ZVFH-NEXT:    vfnmadd.vv v8, v9, v10
5751; ZVFH-NEXT:    ret
5752;
5753; ZVFHMIN-LABEL: vfnmadd_vv_nxv4f16_unmasked:
5754; ZVFHMIN:       # %bb.0:
5755; ZVFHMIN-NEXT:    lui a1, 8
5756; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
5757; ZVFHMIN-NEXT:    vxor.vx v9, v9, a1
5758; ZVFHMIN-NEXT:    vxor.vx v10, v10, a1
5759; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v10
5760; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v9
5761; ZVFHMIN-NEXT:    vfwcvt.f.f.v v14, v8
5762; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m2, ta, ma
5763; ZVFHMIN-NEXT:    vfmadd.vv v14, v10, v12
5764; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m1, ta, ma
5765; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v14
5766; ZVFHMIN-NEXT:    ret
5767  %negb = call <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half> %b, <vscale x 4 x i1> splat (i1 true), i32 %evl)
5768  %negc = call <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half> %c, <vscale x 4 x i1> splat (i1 true), i32 %evl)
5769  %v = call <vscale x 4 x half> @llvm.vp.fma.nxv4f16(<vscale x 4 x half> %va, <vscale x 4 x half> %negb, <vscale x 4 x half> %negc, <vscale x 4 x i1> splat (i1 true), i32 %evl)
5770  ret <vscale x 4 x half> %v
5771}
5772
5773define <vscale x 4 x half> @vfnmadd_vv_nxv4f16_unmasked_commuted(<vscale x 4 x half> %va, <vscale x 4 x half> %b, <vscale x 4 x half> %c, i32 zeroext %evl) {
5774; ZVFH-LABEL: vfnmadd_vv_nxv4f16_unmasked_commuted:
5775; ZVFH:       # %bb.0:
5776; ZVFH-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
5777; ZVFH-NEXT:    vfnmadd.vv v8, v9, v10
5778; ZVFH-NEXT:    ret
5779;
5780; ZVFHMIN-LABEL: vfnmadd_vv_nxv4f16_unmasked_commuted:
5781; ZVFHMIN:       # %bb.0:
5782; ZVFHMIN-NEXT:    lui a1, 8
5783; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
5784; ZVFHMIN-NEXT:    vxor.vx v9, v9, a1
5785; ZVFHMIN-NEXT:    vxor.vx v10, v10, a1
5786; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v10
5787; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v9
5788; ZVFHMIN-NEXT:    vfwcvt.f.f.v v14, v8
5789; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m2, ta, ma
5790; ZVFHMIN-NEXT:    vfmadd.vv v14, v10, v12
5791; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m1, ta, ma
5792; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v14
5793; ZVFHMIN-NEXT:    ret
5794  %negb = call <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half> %b, <vscale x 4 x i1> splat (i1 true), i32 %evl)
5795  %negc = call <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half> %c, <vscale x 4 x i1> splat (i1 true), i32 %evl)
5796  %v = call <vscale x 4 x half> @llvm.vp.fma.nxv4f16(<vscale x 4 x half> %negb, <vscale x 4 x half> %va, <vscale x 4 x half> %negc, <vscale x 4 x i1> splat (i1 true), i32 %evl)
5797  ret <vscale x 4 x half> %v
5798}
5799
5800define <vscale x 4 x half> @vfnmadd_vf_nxv4f16(<vscale x 4 x half> %va, half %b, <vscale x 4 x half> %vc, <vscale x 4 x i1> %m, i32 zeroext %evl) {
5801; ZVFH-LABEL: vfnmadd_vf_nxv4f16:
5802; ZVFH:       # %bb.0:
5803; ZVFH-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
5804; ZVFH-NEXT:    vfnmadd.vf v8, fa0, v9, v0.t
5805; ZVFH-NEXT:    ret
5806;
5807; ZVFHMIN-LABEL: vfnmadd_vf_nxv4f16:
5808; ZVFHMIN:       # %bb.0:
5809; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
5810; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
5811; ZVFHMIN-NEXT:    vmv.v.x v10, a1
5812; ZVFHMIN-NEXT:    lui a0, 8
5813; ZVFHMIN-NEXT:    vxor.vx v8, v8, a0, v0.t
5814; ZVFHMIN-NEXT:    vxor.vx v9, v9, a0, v0.t
5815; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v9, v0.t
5816; ZVFHMIN-NEXT:    vfwcvt.f.f.v v14, v8, v0.t
5817; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v10, v0.t
5818; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m2, ta, ma
5819; ZVFHMIN-NEXT:    vfmadd.vv v16, v14, v12, v0.t
5820; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m1, ta, ma
5821; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v16, v0.t
5822; ZVFHMIN-NEXT:    ret
5823  %elt.head = insertelement <vscale x 4 x half> poison, half %b, i32 0
5824  %vb = shufflevector <vscale x 4 x half> %elt.head, <vscale x 4 x half> poison, <vscale x 4 x i32> zeroinitializer
5825  %negva = call <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half> %va, <vscale x 4 x i1> %m, i32 %evl)
5826  %negvc = call <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half> %vc, <vscale x 4 x i1> %m, i32 %evl)
5827  %v = call <vscale x 4 x half> @llvm.vp.fma.nxv4f16(<vscale x 4 x half> %negva, <vscale x 4 x half> %vb, <vscale x 4 x half> %negvc, <vscale x 4 x i1> %m, i32 %evl)
5828  ret <vscale x 4 x half> %v
5829}
5830
5831define <vscale x 4 x half> @vfnmadd_vf_nxv4f16_commute(<vscale x 4 x half> %va, half %b, <vscale x 4 x half> %vc, <vscale x 4 x i1> %m, i32 zeroext %evl) {
5832; ZVFH-LABEL: vfnmadd_vf_nxv4f16_commute:
5833; ZVFH:       # %bb.0:
5834; ZVFH-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
5835; ZVFH-NEXT:    vfnmadd.vf v8, fa0, v9, v0.t
5836; ZVFH-NEXT:    ret
5837;
5838; ZVFHMIN-LABEL: vfnmadd_vf_nxv4f16_commute:
5839; ZVFHMIN:       # %bb.0:
5840; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
5841; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
5842; ZVFHMIN-NEXT:    vmv.v.x v10, a1
5843; ZVFHMIN-NEXT:    lui a0, 8
5844; ZVFHMIN-NEXT:    vxor.vx v8, v8, a0, v0.t
5845; ZVFHMIN-NEXT:    vxor.vx v9, v9, a0, v0.t
5846; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v9, v0.t
5847; ZVFHMIN-NEXT:    vfwcvt.f.f.v v14, v8, v0.t
5848; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v10, v0.t
5849; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m2, ta, ma
5850; ZVFHMIN-NEXT:    vfmadd.vv v14, v8, v12, v0.t
5851; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m1, ta, ma
5852; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v14, v0.t
5853; ZVFHMIN-NEXT:    ret
5854  %elt.head = insertelement <vscale x 4 x half> poison, half %b, i32 0
5855  %vb = shufflevector <vscale x 4 x half> %elt.head, <vscale x 4 x half> poison, <vscale x 4 x i32> zeroinitializer
5856  %negva = call <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half> %va, <vscale x 4 x i1> %m, i32 %evl)
5857  %negvc = call <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half> %vc, <vscale x 4 x i1> %m, i32 %evl)
5858  %v = call <vscale x 4 x half> @llvm.vp.fma.nxv4f16(<vscale x 4 x half> %vb, <vscale x 4 x half> %negva, <vscale x 4 x half> %negvc, <vscale x 4 x i1> %m, i32 %evl)
5859  ret <vscale x 4 x half> %v
5860}
5861
5862define <vscale x 4 x half> @vfnmadd_vf_nxv4f16_unmasked(<vscale x 4 x half> %va, half %b, <vscale x 4 x half> %vc, i32 zeroext %evl) {
5863; ZVFH-LABEL: vfnmadd_vf_nxv4f16_unmasked:
5864; ZVFH:       # %bb.0:
5865; ZVFH-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
5866; ZVFH-NEXT:    vfnmadd.vf v8, fa0, v9
5867; ZVFH-NEXT:    ret
5868;
5869; ZVFHMIN-LABEL: vfnmadd_vf_nxv4f16_unmasked:
5870; ZVFHMIN:       # %bb.0:
5871; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
5872; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
5873; ZVFHMIN-NEXT:    vmv.v.x v10, a1
5874; ZVFHMIN-NEXT:    lui a0, 8
5875; ZVFHMIN-NEXT:    vxor.vx v8, v8, a0
5876; ZVFHMIN-NEXT:    vxor.vx v9, v9, a0
5877; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v9
5878; ZVFHMIN-NEXT:    vfwcvt.f.f.v v14, v8
5879; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v10
5880; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m2, ta, ma
5881; ZVFHMIN-NEXT:    vfmadd.vv v16, v14, v12
5882; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m1, ta, ma
5883; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v16
5884; ZVFHMIN-NEXT:    ret
5885  %elt.head = insertelement <vscale x 4 x half> poison, half %b, i32 0
5886  %vb = shufflevector <vscale x 4 x half> %elt.head, <vscale x 4 x half> poison, <vscale x 4 x i32> zeroinitializer
5887  %negva = call <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half> %va, <vscale x 4 x i1> splat (i1 true), i32 %evl)
5888  %negvc = call <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half> %vc, <vscale x 4 x i1> splat (i1 true), i32 %evl)
5889  %v = call <vscale x 4 x half> @llvm.vp.fma.nxv4f16(<vscale x 4 x half> %negva, <vscale x 4 x half> %vb, <vscale x 4 x half> %negvc, <vscale x 4 x i1> splat (i1 true), i32 %evl)
5890  ret <vscale x 4 x half> %v
5891}
5892
5893define <vscale x 4 x half> @vfnmadd_vf_nxv4f16_unmasked_commute(<vscale x 4 x half> %va, half %b, <vscale x 4 x half> %vc, i32 zeroext %evl) {
5894; ZVFH-LABEL: vfnmadd_vf_nxv4f16_unmasked_commute:
5895; ZVFH:       # %bb.0:
5896; ZVFH-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
5897; ZVFH-NEXT:    vfnmadd.vf v8, fa0, v9
5898; ZVFH-NEXT:    ret
5899;
5900; ZVFHMIN-LABEL: vfnmadd_vf_nxv4f16_unmasked_commute:
5901; ZVFHMIN:       # %bb.0:
5902; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
5903; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
5904; ZVFHMIN-NEXT:    vmv.v.x v10, a1
5905; ZVFHMIN-NEXT:    lui a0, 8
5906; ZVFHMIN-NEXT:    vxor.vx v8, v8, a0
5907; ZVFHMIN-NEXT:    vxor.vx v9, v9, a0
5908; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v9
5909; ZVFHMIN-NEXT:    vfwcvt.f.f.v v14, v8
5910; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v10
5911; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m2, ta, ma
5912; ZVFHMIN-NEXT:    vfmadd.vv v16, v14, v12
5913; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m1, ta, ma
5914; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v16
5915; ZVFHMIN-NEXT:    ret
5916  %elt.head = insertelement <vscale x 4 x half> poison, half %b, i32 0
5917  %vb = shufflevector <vscale x 4 x half> %elt.head, <vscale x 4 x half> poison, <vscale x 4 x i32> zeroinitializer
5918  %negva = call <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half> %va, <vscale x 4 x i1> splat (i1 true), i32 %evl)
5919  %negvc = call <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half> %vc, <vscale x 4 x i1> splat (i1 true), i32 %evl)
5920  %v = call <vscale x 4 x half> @llvm.vp.fma.nxv4f16(<vscale x 4 x half> %vb, <vscale x 4 x half> %negva, <vscale x 4 x half> %negvc, <vscale x 4 x i1> splat (i1 true), i32 %evl)
5921  ret <vscale x 4 x half> %v
5922}
5923
5924define <vscale x 4 x half> @vfnmadd_vf_nxv4f16_neg_splat(<vscale x 4 x half> %va, half %b, <vscale x 4 x half> %vc, <vscale x 4 x i1> %m, i32 zeroext %evl) {
5925; ZVFH-LABEL: vfnmadd_vf_nxv4f16_neg_splat:
5926; ZVFH:       # %bb.0:
5927; ZVFH-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
5928; ZVFH-NEXT:    vfnmadd.vf v8, fa0, v9, v0.t
5929; ZVFH-NEXT:    ret
5930;
5931; ZVFHMIN-LABEL: vfnmadd_vf_nxv4f16_neg_splat:
5932; ZVFHMIN:       # %bb.0:
5933; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
5934; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
5935; ZVFHMIN-NEXT:    vmv.v.x v10, a1
5936; ZVFHMIN-NEXT:    lui a0, 8
5937; ZVFHMIN-NEXT:    vxor.vx v10, v10, a0, v0.t
5938; ZVFHMIN-NEXT:    vxor.vx v9, v9, a0, v0.t
5939; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v9, v0.t
5940; ZVFHMIN-NEXT:    vfwcvt.f.f.v v14, v10, v0.t
5941; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v8, v0.t
5942; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m2, ta, ma
5943; ZVFHMIN-NEXT:    vfmadd.vv v14, v10, v12, v0.t
5944; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m1, ta, ma
5945; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v14, v0.t
5946; ZVFHMIN-NEXT:    ret
5947  %elt.head = insertelement <vscale x 4 x half> poison, half %b, i32 0
5948  %vb = shufflevector <vscale x 4 x half> %elt.head, <vscale x 4 x half> poison, <vscale x 4 x i32> zeroinitializer
5949  %negvb = call <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half> %vb, <vscale x 4 x i1> %m, i32 %evl)
5950  %negvc = call <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half> %vc, <vscale x 4 x i1> %m, i32 %evl)
5951  %v = call <vscale x 4 x half> @llvm.vp.fma.nxv4f16(<vscale x 4 x half> %va, <vscale x 4 x half> %negvb, <vscale x 4 x half> %negvc, <vscale x 4 x i1> %m, i32 %evl)
5952  ret <vscale x 4 x half> %v
5953}
5954
5955define <vscale x 4 x half> @vfnmadd_vf_nxv4f16_neg_splat_commute(<vscale x 4 x half> %va, half %b, <vscale x 4 x half> %vc, <vscale x 4 x i1> %m, i32 zeroext %evl) {
5956; ZVFH-LABEL: vfnmadd_vf_nxv4f16_neg_splat_commute:
5957; ZVFH:       # %bb.0:
5958; ZVFH-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
5959; ZVFH-NEXT:    vfnmadd.vf v8, fa0, v9, v0.t
5960; ZVFH-NEXT:    ret
5961;
5962; ZVFHMIN-LABEL: vfnmadd_vf_nxv4f16_neg_splat_commute:
5963; ZVFHMIN:       # %bb.0:
5964; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
5965; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
5966; ZVFHMIN-NEXT:    vmv.v.x v10, a1
5967; ZVFHMIN-NEXT:    lui a0, 8
5968; ZVFHMIN-NEXT:    vxor.vx v10, v10, a0, v0.t
5969; ZVFHMIN-NEXT:    vxor.vx v9, v9, a0, v0.t
5970; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v9, v0.t
5971; ZVFHMIN-NEXT:    vfwcvt.f.f.v v14, v10, v0.t
5972; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v8, v0.t
5973; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m2, ta, ma
5974; ZVFHMIN-NEXT:    vfmadd.vv v10, v14, v12, v0.t
5975; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m1, ta, ma
5976; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v10, v0.t
5977; ZVFHMIN-NEXT:    ret
5978  %elt.head = insertelement <vscale x 4 x half> poison, half %b, i32 0
5979  %vb = shufflevector <vscale x 4 x half> %elt.head, <vscale x 4 x half> poison, <vscale x 4 x i32> zeroinitializer
5980  %negvb = call <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half> %vb, <vscale x 4 x i1> %m, i32 %evl)
5981  %negvc = call <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half> %vc, <vscale x 4 x i1> %m, i32 %evl)
5982  %v = call <vscale x 4 x half> @llvm.vp.fma.nxv4f16(<vscale x 4 x half> %negvb, <vscale x 4 x half> %va, <vscale x 4 x half> %negvc, <vscale x 4 x i1> %m, i32 %evl)
5983  ret <vscale x 4 x half> %v
5984}
5985
5986define <vscale x 4 x half> @vfnmadd_vf_nxv4f16_neg_splat_unmasked(<vscale x 4 x half> %va, half %b, <vscale x 4 x half> %vc, i32 zeroext %evl) {
5987; ZVFH-LABEL: vfnmadd_vf_nxv4f16_neg_splat_unmasked:
5988; ZVFH:       # %bb.0:
5989; ZVFH-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
5990; ZVFH-NEXT:    vfnmadd.vf v8, fa0, v9
5991; ZVFH-NEXT:    ret
5992;
5993; ZVFHMIN-LABEL: vfnmadd_vf_nxv4f16_neg_splat_unmasked:
5994; ZVFHMIN:       # %bb.0:
5995; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
5996; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
5997; ZVFHMIN-NEXT:    vmv.v.x v10, a1
5998; ZVFHMIN-NEXT:    lui a0, 8
5999; ZVFHMIN-NEXT:    vxor.vx v9, v9, a0
6000; ZVFHMIN-NEXT:    vxor.vx v10, v10, a0
6001; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v9
6002; ZVFHMIN-NEXT:    vfwcvt.f.f.v v14, v10
6003; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v8
6004; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m2, ta, ma
6005; ZVFHMIN-NEXT:    vfmadd.vv v10, v14, v12
6006; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m1, ta, ma
6007; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v10
6008; ZVFHMIN-NEXT:    ret
6009  %elt.head = insertelement <vscale x 4 x half> poison, half %b, i32 0
6010  %vb = shufflevector <vscale x 4 x half> %elt.head, <vscale x 4 x half> poison, <vscale x 4 x i32> zeroinitializer
6011  %negvb = call <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half> %vb, <vscale x 4 x i1> splat (i1 true), i32 %evl)
6012  %negvc = call <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half> %vc, <vscale x 4 x i1> splat (i1 true), i32 %evl)
6013  %v = call <vscale x 4 x half> @llvm.vp.fma.nxv4f16(<vscale x 4 x half> %va, <vscale x 4 x half> %negvb, <vscale x 4 x half> %negvc, <vscale x 4 x i1> splat (i1 true), i32 %evl)
6014  ret <vscale x 4 x half> %v
6015}
6016
6017define <vscale x 4 x half> @vfnmadd_vf_nxv4f16_neg_splat_unmasked_commute(<vscale x 4 x half> %va, half %b, <vscale x 4 x half> %vc, i32 zeroext %evl) {
6018; ZVFH-LABEL: vfnmadd_vf_nxv4f16_neg_splat_unmasked_commute:
6019; ZVFH:       # %bb.0:
6020; ZVFH-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
6021; ZVFH-NEXT:    vfnmadd.vf v8, fa0, v9
6022; ZVFH-NEXT:    ret
6023;
6024; ZVFHMIN-LABEL: vfnmadd_vf_nxv4f16_neg_splat_unmasked_commute:
6025; ZVFHMIN:       # %bb.0:
6026; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
6027; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
6028; ZVFHMIN-NEXT:    vmv.v.x v10, a1
6029; ZVFHMIN-NEXT:    lui a0, 8
6030; ZVFHMIN-NEXT:    vxor.vx v9, v9, a0
6031; ZVFHMIN-NEXT:    vxor.vx v10, v10, a0
6032; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v9
6033; ZVFHMIN-NEXT:    vfwcvt.f.f.v v14, v10
6034; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v8
6035; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m2, ta, ma
6036; ZVFHMIN-NEXT:    vfmadd.vv v10, v14, v12
6037; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m1, ta, ma
6038; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v10
6039; ZVFHMIN-NEXT:    ret
6040  %elt.head = insertelement <vscale x 4 x half> poison, half %b, i32 0
6041  %vb = shufflevector <vscale x 4 x half> %elt.head, <vscale x 4 x half> poison, <vscale x 4 x i32> zeroinitializer
6042  %negvb = call <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half> %vb, <vscale x 4 x i1> splat (i1 true), i32 %evl)
6043  %negvc = call <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half> %vc, <vscale x 4 x i1> splat (i1 true), i32 %evl)
6044  %v = call <vscale x 4 x half> @llvm.vp.fma.nxv4f16(<vscale x 4 x half> %negvb, <vscale x 4 x half> %va, <vscale x 4 x half> %negvc, <vscale x 4 x i1> splat (i1 true), i32 %evl)
6045  ret <vscale x 4 x half> %v
6046}
6047
6048define <vscale x 4 x half> @vfnmsub_vv_nxv4f16(<vscale x 4 x half> %va, <vscale x 4 x half> %b, <vscale x 4 x half> %c, <vscale x 4 x i1> %m, i32 zeroext %evl) {
6049; ZVFH-LABEL: vfnmsub_vv_nxv4f16:
6050; ZVFH:       # %bb.0:
6051; ZVFH-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
6052; ZVFH-NEXT:    vfnmadd.vv v9, v8, v10, v0.t
6053; ZVFH-NEXT:    vmv.v.v v8, v9
6054; ZVFH-NEXT:    ret
6055;
6056; ZVFHMIN-LABEL: vfnmsub_vv_nxv4f16:
6057; ZVFHMIN:       # %bb.0:
6058; ZVFHMIN-NEXT:    lui a1, 8
6059; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
6060; ZVFHMIN-NEXT:    vxor.vx v9, v9, a1, v0.t
6061; ZVFHMIN-NEXT:    vxor.vx v10, v10, a1, v0.t
6062; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v10, v0.t
6063; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v9, v0.t
6064; ZVFHMIN-NEXT:    vfwcvt.f.f.v v14, v8, v0.t
6065; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m2, ta, ma
6066; ZVFHMIN-NEXT:    vfmadd.vv v10, v14, v12, v0.t
6067; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m1, ta, ma
6068; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v10, v0.t
6069; ZVFHMIN-NEXT:    ret
6070  %negb = call <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half> %b, <vscale x 4 x i1> %m, i32 %evl)
6071  %negc = call <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half> %c, <vscale x 4 x i1> %m, i32 %evl)
6072  %v = call <vscale x 4 x half> @llvm.vp.fma.nxv4f16(<vscale x 4 x half> %va, <vscale x 4 x half> %negb, <vscale x 4 x half> %negc, <vscale x 4 x i1> %m, i32 %evl)
6073  ret <vscale x 4 x half> %v
6074}
6075
6076define <vscale x 4 x half> @vfnmsub_vv_nxv4f16_commuted(<vscale x 4 x half> %va, <vscale x 4 x half> %b, <vscale x 4 x half> %c, <vscale x 4 x i1> %m, i32 zeroext %evl) {
6077; ZVFH-LABEL: vfnmsub_vv_nxv4f16_commuted:
6078; ZVFH:       # %bb.0:
6079; ZVFH-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
6080; ZVFH-NEXT:    vfnmadd.vv v8, v9, v10, v0.t
6081; ZVFH-NEXT:    ret
6082;
6083; ZVFHMIN-LABEL: vfnmsub_vv_nxv4f16_commuted:
6084; ZVFHMIN:       # %bb.0:
6085; ZVFHMIN-NEXT:    lui a1, 8
6086; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
6087; ZVFHMIN-NEXT:    vxor.vx v9, v9, a1, v0.t
6088; ZVFHMIN-NEXT:    vxor.vx v10, v10, a1, v0.t
6089; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v10, v0.t
6090; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v9, v0.t
6091; ZVFHMIN-NEXT:    vfwcvt.f.f.v v14, v8, v0.t
6092; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m2, ta, ma
6093; ZVFHMIN-NEXT:    vfmadd.vv v14, v10, v12, v0.t
6094; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m1, ta, ma
6095; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v14, v0.t
6096; ZVFHMIN-NEXT:    ret
6097  %negb = call <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half> %b, <vscale x 4 x i1> %m, i32 %evl)
6098  %negc = call <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half> %c, <vscale x 4 x i1> %m, i32 %evl)
6099  %v = call <vscale x 4 x half> @llvm.vp.fma.nxv4f16(<vscale x 4 x half> %negb, <vscale x 4 x half> %va, <vscale x 4 x half> %negc, <vscale x 4 x i1> %m, i32 %evl)
6100  ret <vscale x 4 x half> %v
6101}
6102
6103define <vscale x 4 x half> @vfnmsub_vv_nxv4f16_unmasked(<vscale x 4 x half> %va, <vscale x 4 x half> %b, <vscale x 4 x half> %c, i32 zeroext %evl) {
6104; ZVFH-LABEL: vfnmsub_vv_nxv4f16_unmasked:
6105; ZVFH:       # %bb.0:
6106; ZVFH-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
6107; ZVFH-NEXT:    vfnmadd.vv v8, v9, v10
6108; ZVFH-NEXT:    ret
6109;
6110; ZVFHMIN-LABEL: vfnmsub_vv_nxv4f16_unmasked:
6111; ZVFHMIN:       # %bb.0:
6112; ZVFHMIN-NEXT:    lui a1, 8
6113; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
6114; ZVFHMIN-NEXT:    vxor.vx v9, v9, a1
6115; ZVFHMIN-NEXT:    vxor.vx v10, v10, a1
6116; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v10
6117; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v9
6118; ZVFHMIN-NEXT:    vfwcvt.f.f.v v14, v8
6119; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m2, ta, ma
6120; ZVFHMIN-NEXT:    vfmadd.vv v14, v10, v12
6121; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m1, ta, ma
6122; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v14
6123; ZVFHMIN-NEXT:    ret
6124  %negb = call <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half> %b, <vscale x 4 x i1> splat (i1 true), i32 %evl)
6125  %negc = call <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half> %c, <vscale x 4 x i1> splat (i1 true), i32 %evl)
6126  %v = call <vscale x 4 x half> @llvm.vp.fma.nxv4f16(<vscale x 4 x half> %va, <vscale x 4 x half> %negb, <vscale x 4 x half> %negc, <vscale x 4 x i1> splat (i1 true), i32 %evl)
6127  ret <vscale x 4 x half> %v
6128}
6129
6130define <vscale x 4 x half> @vfnmsub_vv_nxv4f16_unmasked_commuted(<vscale x 4 x half> %va, <vscale x 4 x half> %b, <vscale x 4 x half> %c, i32 zeroext %evl) {
6131; ZVFH-LABEL: vfnmsub_vv_nxv4f16_unmasked_commuted:
6132; ZVFH:       # %bb.0:
6133; ZVFH-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
6134; ZVFH-NEXT:    vfnmadd.vv v8, v9, v10
6135; ZVFH-NEXT:    ret
6136;
6137; ZVFHMIN-LABEL: vfnmsub_vv_nxv4f16_unmasked_commuted:
6138; ZVFHMIN:       # %bb.0:
6139; ZVFHMIN-NEXT:    lui a1, 8
6140; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
6141; ZVFHMIN-NEXT:    vxor.vx v9, v9, a1
6142; ZVFHMIN-NEXT:    vxor.vx v10, v10, a1
6143; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v10
6144; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v9
6145; ZVFHMIN-NEXT:    vfwcvt.f.f.v v14, v8
6146; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m2, ta, ma
6147; ZVFHMIN-NEXT:    vfmadd.vv v14, v10, v12
6148; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m1, ta, ma
6149; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v14
6150; ZVFHMIN-NEXT:    ret
6151  %negb = call <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half> %b, <vscale x 4 x i1> splat (i1 true), i32 %evl)
6152  %negc = call <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half> %c, <vscale x 4 x i1> splat (i1 true), i32 %evl)
6153  %v = call <vscale x 4 x half> @llvm.vp.fma.nxv4f16(<vscale x 4 x half> %negb, <vscale x 4 x half> %va, <vscale x 4 x half> %negc, <vscale x 4 x i1> splat (i1 true), i32 %evl)
6154  ret <vscale x 4 x half> %v
6155}
6156
6157define <vscale x 4 x half> @vfnmsub_vf_nxv4f16(<vscale x 4 x half> %va, half %b, <vscale x 4 x half> %vc, <vscale x 4 x i1> %m, i32 zeroext %evl) {
6158; ZVFH-LABEL: vfnmsub_vf_nxv4f16:
6159; ZVFH:       # %bb.0:
6160; ZVFH-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
6161; ZVFH-NEXT:    vfnmsub.vf v8, fa0, v9, v0.t
6162; ZVFH-NEXT:    ret
6163;
6164; ZVFHMIN-LABEL: vfnmsub_vf_nxv4f16:
6165; ZVFHMIN:       # %bb.0:
6166; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
6167; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
6168; ZVFHMIN-NEXT:    vmv.v.x v10, a1
6169; ZVFHMIN-NEXT:    lui a0, 8
6170; ZVFHMIN-NEXT:    vxor.vx v8, v8, a0, v0.t
6171; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v8, v0.t
6172; ZVFHMIN-NEXT:    vfwcvt.f.f.v v14, v9, v0.t
6173; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v10, v0.t
6174; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m2, ta, ma
6175; ZVFHMIN-NEXT:    vfmadd.vv v16, v12, v14, v0.t
6176; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m1, ta, ma
6177; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v16, v0.t
6178; ZVFHMIN-NEXT:    ret
6179  %elt.head = insertelement <vscale x 4 x half> poison, half %b, i32 0
6180  %vb = shufflevector <vscale x 4 x half> %elt.head, <vscale x 4 x half> poison, <vscale x 4 x i32> zeroinitializer
6181  %negva = call <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half> %va, <vscale x 4 x i1> %m, i32 %evl)
6182  %v = call <vscale x 4 x half> @llvm.vp.fma.nxv4f16(<vscale x 4 x half> %negva, <vscale x 4 x half> %vb, <vscale x 4 x half> %vc, <vscale x 4 x i1> %m, i32 %evl)
6183  ret <vscale x 4 x half> %v
6184}
6185
6186define <vscale x 4 x half> @vfnmsub_vf_nxv4f16_commute(<vscale x 4 x half> %va, half %b, <vscale x 4 x half> %vc, <vscale x 4 x i1> %m, i32 zeroext %evl) {
6187; ZVFH-LABEL: vfnmsub_vf_nxv4f16_commute:
6188; ZVFH:       # %bb.0:
6189; ZVFH-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
6190; ZVFH-NEXT:    vfnmsub.vf v8, fa0, v9, v0.t
6191; ZVFH-NEXT:    ret
6192;
6193; ZVFHMIN-LABEL: vfnmsub_vf_nxv4f16_commute:
6194; ZVFHMIN:       # %bb.0:
6195; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
6196; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
6197; ZVFHMIN-NEXT:    vmv.v.x v10, a1
6198; ZVFHMIN-NEXT:    lui a0, 8
6199; ZVFHMIN-NEXT:    vxor.vx v8, v8, a0, v0.t
6200; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v8, v0.t
6201; ZVFHMIN-NEXT:    vfwcvt.f.f.v v14, v9, v0.t
6202; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v10, v0.t
6203; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m2, ta, ma
6204; ZVFHMIN-NEXT:    vfmadd.vv v12, v8, v14, v0.t
6205; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m1, ta, ma
6206; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v12, v0.t
6207; ZVFHMIN-NEXT:    ret
6208  %elt.head = insertelement <vscale x 4 x half> poison, half %b, i32 0
6209  %vb = shufflevector <vscale x 4 x half> %elt.head, <vscale x 4 x half> poison, <vscale x 4 x i32> zeroinitializer
6210  %negva = call <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half> %va, <vscale x 4 x i1> %m, i32 %evl)
6211  %v = call <vscale x 4 x half> @llvm.vp.fma.nxv4f16(<vscale x 4 x half> %vb, <vscale x 4 x half> %negva, <vscale x 4 x half> %vc, <vscale x 4 x i1> %m, i32 %evl)
6212  ret <vscale x 4 x half> %v
6213}
6214
6215define <vscale x 4 x half> @vfnmsub_vf_nxv4f16_unmasked(<vscale x 4 x half> %va, half %b, <vscale x 4 x half> %vc, i32 zeroext %evl) {
6216; ZVFH-LABEL: vfnmsub_vf_nxv4f16_unmasked:
6217; ZVFH:       # %bb.0:
6218; ZVFH-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
6219; ZVFH-NEXT:    vfnmsub.vf v8, fa0, v9
6220; ZVFH-NEXT:    ret
6221;
6222; ZVFHMIN-LABEL: vfnmsub_vf_nxv4f16_unmasked:
6223; ZVFHMIN:       # %bb.0:
6224; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
6225; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
6226; ZVFHMIN-NEXT:    vmv.v.x v10, a1
6227; ZVFHMIN-NEXT:    lui a0, 8
6228; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v9
6229; ZVFHMIN-NEXT:    vxor.vx v8, v8, a0
6230; ZVFHMIN-NEXT:    vfwcvt.f.f.v v14, v8
6231; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v10
6232; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m2, ta, ma
6233; ZVFHMIN-NEXT:    vfmadd.vv v16, v14, v12
6234; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m1, ta, ma
6235; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v16
6236; ZVFHMIN-NEXT:    ret
6237  %elt.head = insertelement <vscale x 4 x half> poison, half %b, i32 0
6238  %vb = shufflevector <vscale x 4 x half> %elt.head, <vscale x 4 x half> poison, <vscale x 4 x i32> zeroinitializer
6239  %negva = call <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half> %va, <vscale x 4 x i1> splat (i1 true), i32 %evl)
6240  %v = call <vscale x 4 x half> @llvm.vp.fma.nxv4f16(<vscale x 4 x half> %negva, <vscale x 4 x half> %vb, <vscale x 4 x half> %vc, <vscale x 4 x i1> splat (i1 true), i32 %evl)
6241  ret <vscale x 4 x half> %v
6242}
6243
6244define <vscale x 4 x half> @vfnmsub_vf_nxv4f16_unmasked_commute(<vscale x 4 x half> %va, half %b, <vscale x 4 x half> %vc, i32 zeroext %evl) {
6245; ZVFH-LABEL: vfnmsub_vf_nxv4f16_unmasked_commute:
6246; ZVFH:       # %bb.0:
6247; ZVFH-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
6248; ZVFH-NEXT:    vfnmsub.vf v8, fa0, v9
6249; ZVFH-NEXT:    ret
6250;
6251; ZVFHMIN-LABEL: vfnmsub_vf_nxv4f16_unmasked_commute:
6252; ZVFHMIN:       # %bb.0:
6253; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
6254; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
6255; ZVFHMIN-NEXT:    vmv.v.x v10, a1
6256; ZVFHMIN-NEXT:    lui a0, 8
6257; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v9
6258; ZVFHMIN-NEXT:    vxor.vx v8, v8, a0
6259; ZVFHMIN-NEXT:    vfwcvt.f.f.v v14, v8
6260; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v10
6261; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m2, ta, ma
6262; ZVFHMIN-NEXT:    vfmadd.vv v16, v14, v12
6263; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m1, ta, ma
6264; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v16
6265; ZVFHMIN-NEXT:    ret
6266  %elt.head = insertelement <vscale x 4 x half> poison, half %b, i32 0
6267  %vb = shufflevector <vscale x 4 x half> %elt.head, <vscale x 4 x half> poison, <vscale x 4 x i32> zeroinitializer
6268  %negva = call <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half> %va, <vscale x 4 x i1> splat (i1 true), i32 %evl)
6269  %v = call <vscale x 4 x half> @llvm.vp.fma.nxv4f16(<vscale x 4 x half> %vb, <vscale x 4 x half> %negva, <vscale x 4 x half> %vc, <vscale x 4 x i1> splat (i1 true), i32 %evl)
6270  ret <vscale x 4 x half> %v
6271}
6272
6273define <vscale x 4 x half> @vfnmsub_vf_nxv4f16_neg_splat(<vscale x 4 x half> %va, half %b, <vscale x 4 x half> %vc, <vscale x 4 x i1> %m, i32 zeroext %evl) {
6274; ZVFH-LABEL: vfnmsub_vf_nxv4f16_neg_splat:
6275; ZVFH:       # %bb.0:
6276; ZVFH-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
6277; ZVFH-NEXT:    vfnmsub.vf v8, fa0, v9, v0.t
6278; ZVFH-NEXT:    ret
6279;
6280; ZVFHMIN-LABEL: vfnmsub_vf_nxv4f16_neg_splat:
6281; ZVFHMIN:       # %bb.0:
6282; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
6283; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
6284; ZVFHMIN-NEXT:    vmv.v.x v10, a1
6285; ZVFHMIN-NEXT:    lui a0, 8
6286; ZVFHMIN-NEXT:    vxor.vx v10, v10, a0, v0.t
6287; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v10, v0.t
6288; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v9, v0.t
6289; ZVFHMIN-NEXT:    vfwcvt.f.f.v v14, v8, v0.t
6290; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m2, ta, ma
6291; ZVFHMIN-NEXT:    vfmadd.vv v12, v14, v10, v0.t
6292; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m1, ta, ma
6293; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v12, v0.t
6294; ZVFHMIN-NEXT:    ret
6295  %elt.head = insertelement <vscale x 4 x half> poison, half %b, i32 0
6296  %vb = shufflevector <vscale x 4 x half> %elt.head, <vscale x 4 x half> poison, <vscale x 4 x i32> zeroinitializer
6297  %negvb = call <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half> %vb, <vscale x 4 x i1> %m, i32 %evl)
6298  %v = call <vscale x 4 x half> @llvm.vp.fma.nxv4f16(<vscale x 4 x half> %va, <vscale x 4 x half> %negvb, <vscale x 4 x half> %vc, <vscale x 4 x i1> %m, i32 %evl)
6299  ret <vscale x 4 x half> %v
6300}
6301
6302define <vscale x 4 x half> @vfnmsub_vf_nxv4f16_neg_splat_commute(<vscale x 4 x half> %va, half %b, <vscale x 4 x half> %vc, <vscale x 4 x i1> %m, i32 zeroext %evl) {
6303; ZVFH-LABEL: vfnmsub_vf_nxv4f16_neg_splat_commute:
6304; ZVFH:       # %bb.0:
6305; ZVFH-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
6306; ZVFH-NEXT:    vfnmsub.vf v8, fa0, v9, v0.t
6307; ZVFH-NEXT:    ret
6308;
6309; ZVFHMIN-LABEL: vfnmsub_vf_nxv4f16_neg_splat_commute:
6310; ZVFHMIN:       # %bb.0:
6311; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
6312; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
6313; ZVFHMIN-NEXT:    vmv.v.x v10, a1
6314; ZVFHMIN-NEXT:    lui a0, 8
6315; ZVFHMIN-NEXT:    vxor.vx v10, v10, a0, v0.t
6316; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v10, v0.t
6317; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v9, v0.t
6318; ZVFHMIN-NEXT:    vfwcvt.f.f.v v14, v8, v0.t
6319; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m2, ta, ma
6320; ZVFHMIN-NEXT:    vfmadd.vv v14, v12, v10, v0.t
6321; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m1, ta, ma
6322; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v14, v0.t
6323; ZVFHMIN-NEXT:    ret
6324  %elt.head = insertelement <vscale x 4 x half> poison, half %b, i32 0
6325  %vb = shufflevector <vscale x 4 x half> %elt.head, <vscale x 4 x half> poison, <vscale x 4 x i32> zeroinitializer
6326  %negvb = call <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half> %vb, <vscale x 4 x i1> %m, i32 %evl)
6327  %v = call <vscale x 4 x half> @llvm.vp.fma.nxv4f16(<vscale x 4 x half> %negvb, <vscale x 4 x half> %va, <vscale x 4 x half> %vc, <vscale x 4 x i1> %m, i32 %evl)
6328  ret <vscale x 4 x half> %v
6329}
6330
6331define <vscale x 4 x half> @vfnmsub_vf_nxv4f16_neg_splat_unmasked(<vscale x 4 x half> %va, half %b, <vscale x 4 x half> %vc, i32 zeroext %evl) {
6332; ZVFH-LABEL: vfnmsub_vf_nxv4f16_neg_splat_unmasked:
6333; ZVFH:       # %bb.0:
6334; ZVFH-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
6335; ZVFH-NEXT:    vfnmsub.vf v8, fa0, v9
6336; ZVFH-NEXT:    ret
6337;
6338; ZVFHMIN-LABEL: vfnmsub_vf_nxv4f16_neg_splat_unmasked:
6339; ZVFHMIN:       # %bb.0:
6340; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
6341; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
6342; ZVFHMIN-NEXT:    vmv.v.x v10, a1
6343; ZVFHMIN-NEXT:    lui a0, 8
6344; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v9
6345; ZVFHMIN-NEXT:    vxor.vx v9, v10, a0
6346; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v9
6347; ZVFHMIN-NEXT:    vfwcvt.f.f.v v14, v8
6348; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m2, ta, ma
6349; ZVFHMIN-NEXT:    vfmadd.vv v14, v10, v12
6350; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m1, ta, ma
6351; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v14
6352; ZVFHMIN-NEXT:    ret
6353  %elt.head = insertelement <vscale x 4 x half> poison, half %b, i32 0
6354  %vb = shufflevector <vscale x 4 x half> %elt.head, <vscale x 4 x half> poison, <vscale x 4 x i32> zeroinitializer
6355  %negvb = call <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half> %vb, <vscale x 4 x i1> splat (i1 true), i32 %evl)
6356  %v = call <vscale x 4 x half> @llvm.vp.fma.nxv4f16(<vscale x 4 x half> %va, <vscale x 4 x half> %negvb, <vscale x 4 x half> %vc, <vscale x 4 x i1> splat (i1 true), i32 %evl)
6357  ret <vscale x 4 x half> %v
6358}
6359
6360define <vscale x 4 x half> @vfnmsub_vf_nxv4f16_neg_splat_unmasked_commute(<vscale x 4 x half> %va, half %b, <vscale x 4 x half> %vc, i32 zeroext %evl) {
6361; ZVFH-LABEL: vfnmsub_vf_nxv4f16_neg_splat_unmasked_commute:
6362; ZVFH:       # %bb.0:
6363; ZVFH-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
6364; ZVFH-NEXT:    vfnmsub.vf v8, fa0, v9
6365; ZVFH-NEXT:    ret
6366;
6367; ZVFHMIN-LABEL: vfnmsub_vf_nxv4f16_neg_splat_unmasked_commute:
6368; ZVFHMIN:       # %bb.0:
6369; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
6370; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
6371; ZVFHMIN-NEXT:    vmv.v.x v10, a1
6372; ZVFHMIN-NEXT:    lui a0, 8
6373; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v9
6374; ZVFHMIN-NEXT:    vxor.vx v9, v10, a0
6375; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v9
6376; ZVFHMIN-NEXT:    vfwcvt.f.f.v v14, v8
6377; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m2, ta, ma
6378; ZVFHMIN-NEXT:    vfmadd.vv v14, v10, v12
6379; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m1, ta, ma
6380; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v14
6381; ZVFHMIN-NEXT:    ret
6382  %elt.head = insertelement <vscale x 4 x half> poison, half %b, i32 0
6383  %vb = shufflevector <vscale x 4 x half> %elt.head, <vscale x 4 x half> poison, <vscale x 4 x i32> zeroinitializer
6384  %negvb = call <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half> %vb, <vscale x 4 x i1> splat (i1 true), i32 %evl)
6385  %v = call <vscale x 4 x half> @llvm.vp.fma.nxv4f16(<vscale x 4 x half> %negvb, <vscale x 4 x half> %va, <vscale x 4 x half> %vc, <vscale x 4 x i1> splat (i1 true), i32 %evl)
6386  ret <vscale x 4 x half> %v
6387}
6388
6389declare <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half>, <vscale x 8 x i1>, i32)
6390
6391define <vscale x 8 x half> @vfmsub_vv_nxv8f16(<vscale x 8 x half> %va, <vscale x 8 x half> %b, <vscale x 8 x half> %c, <vscale x 8 x i1> %m, i32 zeroext %evl) {
6392; ZVFH-LABEL: vfmsub_vv_nxv8f16:
6393; ZVFH:       # %bb.0:
6394; ZVFH-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
6395; ZVFH-NEXT:    vfmsub.vv v10, v8, v12, v0.t
6396; ZVFH-NEXT:    vmv.v.v v8, v10
6397; ZVFH-NEXT:    ret
6398;
6399; ZVFHMIN-LABEL: vfmsub_vv_nxv8f16:
6400; ZVFHMIN:       # %bb.0:
6401; ZVFHMIN-NEXT:    lui a1, 8
6402; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
6403; ZVFHMIN-NEXT:    vxor.vx v12, v12, a1, v0.t
6404; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v12, v0.t
6405; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v8, v0.t
6406; ZVFHMIN-NEXT:    vfwcvt.f.f.v v20, v10, v0.t
6407; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m4, ta, ma
6408; ZVFHMIN-NEXT:    vfmadd.vv v20, v12, v16, v0.t
6409; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m2, ta, ma
6410; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v20, v0.t
6411; ZVFHMIN-NEXT:    ret
6412  %negc = call <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half> %c, <vscale x 8 x i1> %m, i32 %evl)
6413  %v = call <vscale x 8 x half> @llvm.vp.fma.nxv8f16(<vscale x 8 x half> %va, <vscale x 8 x half> %b, <vscale x 8 x half> %negc, <vscale x 8 x i1> %m, i32 %evl)
6414  ret <vscale x 8 x half> %v
6415}
6416
6417define <vscale x 8 x half> @vfmsub_vv_nxv8f16_unmasked(<vscale x 8 x half> %va, <vscale x 8 x half> %b, <vscale x 8 x half> %c, i32 zeroext %evl) {
6418; ZVFH-LABEL: vfmsub_vv_nxv8f16_unmasked:
6419; ZVFH:       # %bb.0:
6420; ZVFH-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
6421; ZVFH-NEXT:    vfmsub.vv v8, v10, v12
6422; ZVFH-NEXT:    ret
6423;
6424; ZVFHMIN-LABEL: vfmsub_vv_nxv8f16_unmasked:
6425; ZVFHMIN:       # %bb.0:
6426; ZVFHMIN-NEXT:    lui a1, 8
6427; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
6428; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v8
6429; ZVFHMIN-NEXT:    vxor.vx v8, v12, a1
6430; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v8
6431; ZVFHMIN-NEXT:    vfwcvt.f.f.v v20, v10
6432; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m4, ta, ma
6433; ZVFHMIN-NEXT:    vfmadd.vv v20, v16, v12
6434; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m2, ta, ma
6435; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v20
6436; ZVFHMIN-NEXT:    ret
6437  %negc = call <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half> %c, <vscale x 8 x i1> splat (i1 true), i32 %evl)
6438  %v = call <vscale x 8 x half> @llvm.vp.fma.nxv8f16(<vscale x 8 x half> %va, <vscale x 8 x half> %b, <vscale x 8 x half> %negc, <vscale x 8 x i1> splat (i1 true), i32 %evl)
6439  ret <vscale x 8 x half> %v
6440}
6441
6442define <vscale x 8 x half> @vfmsub_vf_nxv8f16(<vscale x 8 x half> %va, half %b, <vscale x 8 x half> %vc, <vscale x 8 x i1> %m, i32 zeroext %evl) {
6443; ZVFH-LABEL: vfmsub_vf_nxv8f16:
6444; ZVFH:       # %bb.0:
6445; ZVFH-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
6446; ZVFH-NEXT:    vfmsub.vf v8, fa0, v10, v0.t
6447; ZVFH-NEXT:    ret
6448;
6449; ZVFHMIN-LABEL: vfmsub_vf_nxv8f16:
6450; ZVFHMIN:       # %bb.0:
6451; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
6452; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
6453; ZVFHMIN-NEXT:    vmv.v.x v12, a1
6454; ZVFHMIN-NEXT:    lui a0, 8
6455; ZVFHMIN-NEXT:    vxor.vx v10, v10, a0, v0.t
6456; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v10, v0.t
6457; ZVFHMIN-NEXT:    vfwcvt.f.f.v v20, v8, v0.t
6458; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v12, v0.t
6459; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m4, ta, ma
6460; ZVFHMIN-NEXT:    vfmadd.vv v24, v20, v16, v0.t
6461; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m2, ta, ma
6462; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v24, v0.t
6463; ZVFHMIN-NEXT:    ret
6464  %elt.head = insertelement <vscale x 8 x half> poison, half %b, i32 0
6465  %vb = shufflevector <vscale x 8 x half> %elt.head, <vscale x 8 x half> poison, <vscale x 8 x i32> zeroinitializer
6466  %negvc = call <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half> %vc, <vscale x 8 x i1> %m, i32 %evl)
6467  %v = call <vscale x 8 x half> @llvm.vp.fma.nxv8f16(<vscale x 8 x half> %va, <vscale x 8 x half> %vb, <vscale x 8 x half> %negvc, <vscale x 8 x i1> %m, i32 %evl)
6468  ret <vscale x 8 x half> %v
6469}
6470
6471define <vscale x 8 x half> @vfmsub_vf_nxv8f16_commute(<vscale x 8 x half> %va, half %b, <vscale x 8 x half> %vc, <vscale x 8 x i1> %m, i32 zeroext %evl) {
6472; ZVFH-LABEL: vfmsub_vf_nxv8f16_commute:
6473; ZVFH:       # %bb.0:
6474; ZVFH-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
6475; ZVFH-NEXT:    vfmsub.vf v8, fa0, v10, v0.t
6476; ZVFH-NEXT:    ret
6477;
6478; ZVFHMIN-LABEL: vfmsub_vf_nxv8f16_commute:
6479; ZVFHMIN:       # %bb.0:
6480; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
6481; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
6482; ZVFHMIN-NEXT:    vmv.v.x v12, a1
6483; ZVFHMIN-NEXT:    lui a0, 8
6484; ZVFHMIN-NEXT:    vxor.vx v10, v10, a0, v0.t
6485; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v10, v0.t
6486; ZVFHMIN-NEXT:    vfwcvt.f.f.v v20, v8, v0.t
6487; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v12, v0.t
6488; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m4, ta, ma
6489; ZVFHMIN-NEXT:    vfmadd.vv v20, v8, v16, v0.t
6490; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m2, ta, ma
6491; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v20, v0.t
6492; ZVFHMIN-NEXT:    ret
6493  %elt.head = insertelement <vscale x 8 x half> poison, half %b, i32 0
6494  %vb = shufflevector <vscale x 8 x half> %elt.head, <vscale x 8 x half> poison, <vscale x 8 x i32> zeroinitializer
6495  %negvc = call <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half> %vc, <vscale x 8 x i1> %m, i32 %evl)
6496  %v = call <vscale x 8 x half> @llvm.vp.fma.nxv8f16(<vscale x 8 x half> %vb, <vscale x 8 x half> %va, <vscale x 8 x half> %negvc, <vscale x 8 x i1> %m, i32 %evl)
6497  ret <vscale x 8 x half> %v
6498}
6499
6500define <vscale x 8 x half> @vfmsub_vf_nxv8f16_unmasked(<vscale x 8 x half> %va, half %b, <vscale x 8 x half> %vc, i32 zeroext %evl) {
6501; ZVFH-LABEL: vfmsub_vf_nxv8f16_unmasked:
6502; ZVFH:       # %bb.0:
6503; ZVFH-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
6504; ZVFH-NEXT:    vfmsub.vf v8, fa0, v10
6505; ZVFH-NEXT:    ret
6506;
6507; ZVFHMIN-LABEL: vfmsub_vf_nxv8f16_unmasked:
6508; ZVFHMIN:       # %bb.0:
6509; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
6510; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
6511; ZVFHMIN-NEXT:    vmv.v.x v12, a1
6512; ZVFHMIN-NEXT:    lui a0, 8
6513; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v8
6514; ZVFHMIN-NEXT:    vxor.vx v8, v10, a0
6515; ZVFHMIN-NEXT:    vfwcvt.f.f.v v20, v8
6516; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v12
6517; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m4, ta, ma
6518; ZVFHMIN-NEXT:    vfmadd.vv v24, v16, v20
6519; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m2, ta, ma
6520; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v24
6521; ZVFHMIN-NEXT:    ret
6522  %elt.head = insertelement <vscale x 8 x half> poison, half %b, i32 0
6523  %vb = shufflevector <vscale x 8 x half> %elt.head, <vscale x 8 x half> poison, <vscale x 8 x i32> zeroinitializer
6524  %negvc = call <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half> %vc, <vscale x 8 x i1> splat (i1 true), i32 %evl)
6525  %v = call <vscale x 8 x half> @llvm.vp.fma.nxv8f16(<vscale x 8 x half> %va, <vscale x 8 x half> %vb, <vscale x 8 x half> %negvc, <vscale x 8 x i1> splat (i1 true), i32 %evl)
6526  ret <vscale x 8 x half> %v
6527}
6528
6529define <vscale x 8 x half> @vfmsub_vf_nxv8f16_unmasked_commute(<vscale x 8 x half> %va, half %b, <vscale x 8 x half> %vc, i32 zeroext %evl) {
6530; ZVFH-LABEL: vfmsub_vf_nxv8f16_unmasked_commute:
6531; ZVFH:       # %bb.0:
6532; ZVFH-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
6533; ZVFH-NEXT:    vfmsub.vf v8, fa0, v10
6534; ZVFH-NEXT:    ret
6535;
6536; ZVFHMIN-LABEL: vfmsub_vf_nxv8f16_unmasked_commute:
6537; ZVFHMIN:       # %bb.0:
6538; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
6539; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
6540; ZVFHMIN-NEXT:    vmv.v.x v12, a1
6541; ZVFHMIN-NEXT:    lui a0, 8
6542; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v8
6543; ZVFHMIN-NEXT:    vxor.vx v8, v10, a0
6544; ZVFHMIN-NEXT:    vfwcvt.f.f.v v20, v8
6545; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v12
6546; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m4, ta, ma
6547; ZVFHMIN-NEXT:    vfmadd.vv v24, v16, v20
6548; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m2, ta, ma
6549; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v24
6550; ZVFHMIN-NEXT:    ret
6551  %elt.head = insertelement <vscale x 8 x half> poison, half %b, i32 0
6552  %vb = shufflevector <vscale x 8 x half> %elt.head, <vscale x 8 x half> poison, <vscale x 8 x i32> zeroinitializer
6553  %negvc = call <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half> %vc, <vscale x 8 x i1> splat (i1 true), i32 %evl)
6554  %v = call <vscale x 8 x half> @llvm.vp.fma.nxv8f16(<vscale x 8 x half> %vb, <vscale x 8 x half> %va, <vscale x 8 x half> %negvc, <vscale x 8 x i1> splat (i1 true), i32 %evl)
6555  ret <vscale x 8 x half> %v
6556}
6557
6558define <vscale x 8 x half> @vfnmadd_vv_nxv8f16(<vscale x 8 x half> %va, <vscale x 8 x half> %b, <vscale x 8 x half> %c, <vscale x 8 x i1> %m, i32 zeroext %evl) {
6559; ZVFH-LABEL: vfnmadd_vv_nxv8f16:
6560; ZVFH:       # %bb.0:
6561; ZVFH-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
6562; ZVFH-NEXT:    vfnmadd.vv v10, v8, v12, v0.t
6563; ZVFH-NEXT:    vmv.v.v v8, v10
6564; ZVFH-NEXT:    ret
6565;
6566; ZVFHMIN-LABEL: vfnmadd_vv_nxv8f16:
6567; ZVFHMIN:       # %bb.0:
6568; ZVFHMIN-NEXT:    lui a1, 8
6569; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
6570; ZVFHMIN-NEXT:    vxor.vx v10, v10, a1, v0.t
6571; ZVFHMIN-NEXT:    vxor.vx v12, v12, a1, v0.t
6572; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v12, v0.t
6573; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v10, v0.t
6574; ZVFHMIN-NEXT:    vfwcvt.f.f.v v20, v8, v0.t
6575; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m4, ta, ma
6576; ZVFHMIN-NEXT:    vfmadd.vv v12, v20, v16, v0.t
6577; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m2, ta, ma
6578; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v12, v0.t
6579; ZVFHMIN-NEXT:    ret
6580  %negb = call <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half> %b, <vscale x 8 x i1> %m, i32 %evl)
6581  %negc = call <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half> %c, <vscale x 8 x i1> %m, i32 %evl)
6582  %v = call <vscale x 8 x half> @llvm.vp.fma.nxv8f16(<vscale x 8 x half> %va, <vscale x 8 x half> %negb, <vscale x 8 x half> %negc, <vscale x 8 x i1> %m, i32 %evl)
6583  ret <vscale x 8 x half> %v
6584}
6585
6586define <vscale x 8 x half> @vfnmadd_vv_nxv8f16_commuted(<vscale x 8 x half> %va, <vscale x 8 x half> %b, <vscale x 8 x half> %c, <vscale x 8 x i1> %m, i32 zeroext %evl) {
6587; ZVFH-LABEL: vfnmadd_vv_nxv8f16_commuted:
6588; ZVFH:       # %bb.0:
6589; ZVFH-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
6590; ZVFH-NEXT:    vfnmadd.vv v8, v10, v12, v0.t
6591; ZVFH-NEXT:    ret
6592;
6593; ZVFHMIN-LABEL: vfnmadd_vv_nxv8f16_commuted:
6594; ZVFHMIN:       # %bb.0:
6595; ZVFHMIN-NEXT:    lui a1, 8
6596; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
6597; ZVFHMIN-NEXT:    vxor.vx v10, v10, a1, v0.t
6598; ZVFHMIN-NEXT:    vxor.vx v12, v12, a1, v0.t
6599; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v12, v0.t
6600; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v10, v0.t
6601; ZVFHMIN-NEXT:    vfwcvt.f.f.v v20, v8, v0.t
6602; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m4, ta, ma
6603; ZVFHMIN-NEXT:    vfmadd.vv v20, v12, v16, v0.t
6604; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m2, ta, ma
6605; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v20, v0.t
6606; ZVFHMIN-NEXT:    ret
6607  %negb = call <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half> %b, <vscale x 8 x i1> %m, i32 %evl)
6608  %negc = call <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half> %c, <vscale x 8 x i1> %m, i32 %evl)
6609  %v = call <vscale x 8 x half> @llvm.vp.fma.nxv8f16(<vscale x 8 x half> %negb, <vscale x 8 x half> %va, <vscale x 8 x half> %negc, <vscale x 8 x i1> %m, i32 %evl)
6610  ret <vscale x 8 x half> %v
6611}
6612
6613define <vscale x 8 x half> @vfnmadd_vv_nxv8f16_unmasked(<vscale x 8 x half> %va, <vscale x 8 x half> %b, <vscale x 8 x half> %c, i32 zeroext %evl) {
6614; ZVFH-LABEL: vfnmadd_vv_nxv8f16_unmasked:
6615; ZVFH:       # %bb.0:
6616; ZVFH-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
6617; ZVFH-NEXT:    vfnmadd.vv v8, v10, v12
6618; ZVFH-NEXT:    ret
6619;
6620; ZVFHMIN-LABEL: vfnmadd_vv_nxv8f16_unmasked:
6621; ZVFHMIN:       # %bb.0:
6622; ZVFHMIN-NEXT:    lui a1, 8
6623; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
6624; ZVFHMIN-NEXT:    vxor.vx v10, v10, a1
6625; ZVFHMIN-NEXT:    vxor.vx v12, v12, a1
6626; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v12
6627; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v10
6628; ZVFHMIN-NEXT:    vfwcvt.f.f.v v20, v8
6629; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m4, ta, ma
6630; ZVFHMIN-NEXT:    vfmadd.vv v20, v12, v16
6631; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m2, ta, ma
6632; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v20
6633; ZVFHMIN-NEXT:    ret
6634  %negb = call <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half> %b, <vscale x 8 x i1> splat (i1 true), i32 %evl)
6635  %negc = call <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half> %c, <vscale x 8 x i1> splat (i1 true), i32 %evl)
6636  %v = call <vscale x 8 x half> @llvm.vp.fma.nxv8f16(<vscale x 8 x half> %va, <vscale x 8 x half> %negb, <vscale x 8 x half> %negc, <vscale x 8 x i1> splat (i1 true), i32 %evl)
6637  ret <vscale x 8 x half> %v
6638}
6639
6640define <vscale x 8 x half> @vfnmadd_vv_nxv8f16_unmasked_commuted(<vscale x 8 x half> %va, <vscale x 8 x half> %b, <vscale x 8 x half> %c, i32 zeroext %evl) {
6641; ZVFH-LABEL: vfnmadd_vv_nxv8f16_unmasked_commuted:
6642; ZVFH:       # %bb.0:
6643; ZVFH-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
6644; ZVFH-NEXT:    vfnmadd.vv v8, v10, v12
6645; ZVFH-NEXT:    ret
6646;
6647; ZVFHMIN-LABEL: vfnmadd_vv_nxv8f16_unmasked_commuted:
6648; ZVFHMIN:       # %bb.0:
6649; ZVFHMIN-NEXT:    lui a1, 8
6650; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
6651; ZVFHMIN-NEXT:    vxor.vx v10, v10, a1
6652; ZVFHMIN-NEXT:    vxor.vx v12, v12, a1
6653; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v12
6654; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v10
6655; ZVFHMIN-NEXT:    vfwcvt.f.f.v v20, v8
6656; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m4, ta, ma
6657; ZVFHMIN-NEXT:    vfmadd.vv v20, v12, v16
6658; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m2, ta, ma
6659; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v20
6660; ZVFHMIN-NEXT:    ret
6661  %negb = call <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half> %b, <vscale x 8 x i1> splat (i1 true), i32 %evl)
6662  %negc = call <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half> %c, <vscale x 8 x i1> splat (i1 true), i32 %evl)
6663  %v = call <vscale x 8 x half> @llvm.vp.fma.nxv8f16(<vscale x 8 x half> %negb, <vscale x 8 x half> %va, <vscale x 8 x half> %negc, <vscale x 8 x i1> splat (i1 true), i32 %evl)
6664  ret <vscale x 8 x half> %v
6665}
6666
6667define <vscale x 8 x half> @vfnmadd_vf_nxv8f16(<vscale x 8 x half> %va, half %b, <vscale x 8 x half> %vc, <vscale x 8 x i1> %m, i32 zeroext %evl) {
6668; ZVFH-LABEL: vfnmadd_vf_nxv8f16:
6669; ZVFH:       # %bb.0:
6670; ZVFH-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
6671; ZVFH-NEXT:    vfnmadd.vf v8, fa0, v10, v0.t
6672; ZVFH-NEXT:    ret
6673;
6674; ZVFHMIN-LABEL: vfnmadd_vf_nxv8f16:
6675; ZVFHMIN:       # %bb.0:
6676; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
6677; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
6678; ZVFHMIN-NEXT:    vmv.v.x v12, a1
6679; ZVFHMIN-NEXT:    lui a0, 8
6680; ZVFHMIN-NEXT:    vxor.vx v8, v8, a0, v0.t
6681; ZVFHMIN-NEXT:    vxor.vx v10, v10, a0, v0.t
6682; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v10, v0.t
6683; ZVFHMIN-NEXT:    vfwcvt.f.f.v v20, v8, v0.t
6684; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v12, v0.t
6685; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m4, ta, ma
6686; ZVFHMIN-NEXT:    vfmadd.vv v24, v20, v16, v0.t
6687; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m2, ta, ma
6688; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v24, v0.t
6689; ZVFHMIN-NEXT:    ret
6690  %elt.head = insertelement <vscale x 8 x half> poison, half %b, i32 0
6691  %vb = shufflevector <vscale x 8 x half> %elt.head, <vscale x 8 x half> poison, <vscale x 8 x i32> zeroinitializer
6692  %negva = call <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half> %va, <vscale x 8 x i1> %m, i32 %evl)
6693  %negvc = call <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half> %vc, <vscale x 8 x i1> %m, i32 %evl)
6694  %v = call <vscale x 8 x half> @llvm.vp.fma.nxv8f16(<vscale x 8 x half> %negva, <vscale x 8 x half> %vb, <vscale x 8 x half> %negvc, <vscale x 8 x i1> %m, i32 %evl)
6695  ret <vscale x 8 x half> %v
6696}
6697
6698define <vscale x 8 x half> @vfnmadd_vf_nxv8f16_commute(<vscale x 8 x half> %va, half %b, <vscale x 8 x half> %vc, <vscale x 8 x i1> %m, i32 zeroext %evl) {
6699; ZVFH-LABEL: vfnmadd_vf_nxv8f16_commute:
6700; ZVFH:       # %bb.0:
6701; ZVFH-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
6702; ZVFH-NEXT:    vfnmadd.vf v8, fa0, v10, v0.t
6703; ZVFH-NEXT:    ret
6704;
6705; ZVFHMIN-LABEL: vfnmadd_vf_nxv8f16_commute:
6706; ZVFHMIN:       # %bb.0:
6707; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
6708; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
6709; ZVFHMIN-NEXT:    vmv.v.x v12, a1
6710; ZVFHMIN-NEXT:    lui a0, 8
6711; ZVFHMIN-NEXT:    vxor.vx v8, v8, a0, v0.t
6712; ZVFHMIN-NEXT:    vxor.vx v10, v10, a0, v0.t
6713; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v10, v0.t
6714; ZVFHMIN-NEXT:    vfwcvt.f.f.v v20, v8, v0.t
6715; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v12, v0.t
6716; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m4, ta, ma
6717; ZVFHMIN-NEXT:    vfmadd.vv v20, v8, v16, v0.t
6718; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m2, ta, ma
6719; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v20, v0.t
6720; ZVFHMIN-NEXT:    ret
6721  %elt.head = insertelement <vscale x 8 x half> poison, half %b, i32 0
6722  %vb = shufflevector <vscale x 8 x half> %elt.head, <vscale x 8 x half> poison, <vscale x 8 x i32> zeroinitializer
6723  %negva = call <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half> %va, <vscale x 8 x i1> %m, i32 %evl)
6724  %negvc = call <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half> %vc, <vscale x 8 x i1> %m, i32 %evl)
6725  %v = call <vscale x 8 x half> @llvm.vp.fma.nxv8f16(<vscale x 8 x half> %vb, <vscale x 8 x half> %negva, <vscale x 8 x half> %negvc, <vscale x 8 x i1> %m, i32 %evl)
6726  ret <vscale x 8 x half> %v
6727}
6728
6729define <vscale x 8 x half> @vfnmadd_vf_nxv8f16_unmasked(<vscale x 8 x half> %va, half %b, <vscale x 8 x half> %vc, i32 zeroext %evl) {
6730; ZVFH-LABEL: vfnmadd_vf_nxv8f16_unmasked:
6731; ZVFH:       # %bb.0:
6732; ZVFH-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
6733; ZVFH-NEXT:    vfnmadd.vf v8, fa0, v10
6734; ZVFH-NEXT:    ret
6735;
6736; ZVFHMIN-LABEL: vfnmadd_vf_nxv8f16_unmasked:
6737; ZVFHMIN:       # %bb.0:
6738; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
6739; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
6740; ZVFHMIN-NEXT:    vmv.v.x v12, a1
6741; ZVFHMIN-NEXT:    lui a0, 8
6742; ZVFHMIN-NEXT:    vxor.vx v8, v8, a0
6743; ZVFHMIN-NEXT:    vxor.vx v10, v10, a0
6744; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v10
6745; ZVFHMIN-NEXT:    vfwcvt.f.f.v v20, v8
6746; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v12
6747; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m4, ta, ma
6748; ZVFHMIN-NEXT:    vfmadd.vv v24, v20, v16
6749; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m2, ta, ma
6750; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v24
6751; ZVFHMIN-NEXT:    ret
6752  %elt.head = insertelement <vscale x 8 x half> poison, half %b, i32 0
6753  %vb = shufflevector <vscale x 8 x half> %elt.head, <vscale x 8 x half> poison, <vscale x 8 x i32> zeroinitializer
6754  %negva = call <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half> %va, <vscale x 8 x i1> splat (i1 true), i32 %evl)
6755  %negvc = call <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half> %vc, <vscale x 8 x i1> splat (i1 true), i32 %evl)
6756  %v = call <vscale x 8 x half> @llvm.vp.fma.nxv8f16(<vscale x 8 x half> %negva, <vscale x 8 x half> %vb, <vscale x 8 x half> %negvc, <vscale x 8 x i1> splat (i1 true), i32 %evl)
6757  ret <vscale x 8 x half> %v
6758}
6759
6760define <vscale x 8 x half> @vfnmadd_vf_nxv8f16_unmasked_commute(<vscale x 8 x half> %va, half %b, <vscale x 8 x half> %vc, i32 zeroext %evl) {
6761; ZVFH-LABEL: vfnmadd_vf_nxv8f16_unmasked_commute:
6762; ZVFH:       # %bb.0:
6763; ZVFH-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
6764; ZVFH-NEXT:    vfnmadd.vf v8, fa0, v10
6765; ZVFH-NEXT:    ret
6766;
6767; ZVFHMIN-LABEL: vfnmadd_vf_nxv8f16_unmasked_commute:
6768; ZVFHMIN:       # %bb.0:
6769; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
6770; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
6771; ZVFHMIN-NEXT:    vmv.v.x v12, a1
6772; ZVFHMIN-NEXT:    lui a0, 8
6773; ZVFHMIN-NEXT:    vxor.vx v8, v8, a0
6774; ZVFHMIN-NEXT:    vxor.vx v10, v10, a0
6775; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v10
6776; ZVFHMIN-NEXT:    vfwcvt.f.f.v v20, v8
6777; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v12
6778; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m4, ta, ma
6779; ZVFHMIN-NEXT:    vfmadd.vv v24, v20, v16
6780; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m2, ta, ma
6781; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v24
6782; ZVFHMIN-NEXT:    ret
6783  %elt.head = insertelement <vscale x 8 x half> poison, half %b, i32 0
6784  %vb = shufflevector <vscale x 8 x half> %elt.head, <vscale x 8 x half> poison, <vscale x 8 x i32> zeroinitializer
6785  %negva = call <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half> %va, <vscale x 8 x i1> splat (i1 true), i32 %evl)
6786  %negvc = call <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half> %vc, <vscale x 8 x i1> splat (i1 true), i32 %evl)
6787  %v = call <vscale x 8 x half> @llvm.vp.fma.nxv8f16(<vscale x 8 x half> %vb, <vscale x 8 x half> %negva, <vscale x 8 x half> %negvc, <vscale x 8 x i1> splat (i1 true), i32 %evl)
6788  ret <vscale x 8 x half> %v
6789}
6790
6791define <vscale x 8 x half> @vfnmadd_vf_nxv8f16_neg_splat(<vscale x 8 x half> %va, half %b, <vscale x 8 x half> %vc, <vscale x 8 x i1> %m, i32 zeroext %evl) {
6792; ZVFH-LABEL: vfnmadd_vf_nxv8f16_neg_splat:
6793; ZVFH:       # %bb.0:
6794; ZVFH-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
6795; ZVFH-NEXT:    vfnmadd.vf v8, fa0, v10, v0.t
6796; ZVFH-NEXT:    ret
6797;
6798; ZVFHMIN-LABEL: vfnmadd_vf_nxv8f16_neg_splat:
6799; ZVFHMIN:       # %bb.0:
6800; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
6801; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
6802; ZVFHMIN-NEXT:    vmv.v.x v12, a1
6803; ZVFHMIN-NEXT:    lui a0, 8
6804; ZVFHMIN-NEXT:    vxor.vx v12, v12, a0, v0.t
6805; ZVFHMIN-NEXT:    vxor.vx v10, v10, a0, v0.t
6806; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v10, v0.t
6807; ZVFHMIN-NEXT:    vfwcvt.f.f.v v20, v12, v0.t
6808; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v8, v0.t
6809; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m4, ta, ma
6810; ZVFHMIN-NEXT:    vfmadd.vv v20, v12, v16, v0.t
6811; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m2, ta, ma
6812; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v20, v0.t
6813; ZVFHMIN-NEXT:    ret
6814  %elt.head = insertelement <vscale x 8 x half> poison, half %b, i32 0
6815  %vb = shufflevector <vscale x 8 x half> %elt.head, <vscale x 8 x half> poison, <vscale x 8 x i32> zeroinitializer
6816  %negvb = call <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half> %vb, <vscale x 8 x i1> %m, i32 %evl)
6817  %negvc = call <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half> %vc, <vscale x 8 x i1> %m, i32 %evl)
6818  %v = call <vscale x 8 x half> @llvm.vp.fma.nxv8f16(<vscale x 8 x half> %va, <vscale x 8 x half> %negvb, <vscale x 8 x half> %negvc, <vscale x 8 x i1> %m, i32 %evl)
6819  ret <vscale x 8 x half> %v
6820}
6821
6822define <vscale x 8 x half> @vfnmadd_vf_nxv8f16_neg_splat_commute(<vscale x 8 x half> %va, half %b, <vscale x 8 x half> %vc, <vscale x 8 x i1> %m, i32 zeroext %evl) {
6823; ZVFH-LABEL: vfnmadd_vf_nxv8f16_neg_splat_commute:
6824; ZVFH:       # %bb.0:
6825; ZVFH-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
6826; ZVFH-NEXT:    vfnmadd.vf v8, fa0, v10, v0.t
6827; ZVFH-NEXT:    ret
6828;
6829; ZVFHMIN-LABEL: vfnmadd_vf_nxv8f16_neg_splat_commute:
6830; ZVFHMIN:       # %bb.0:
6831; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
6832; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
6833; ZVFHMIN-NEXT:    vmv.v.x v12, a1
6834; ZVFHMIN-NEXT:    lui a0, 8
6835; ZVFHMIN-NEXT:    vxor.vx v12, v12, a0, v0.t
6836; ZVFHMIN-NEXT:    vxor.vx v10, v10, a0, v0.t
6837; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v10, v0.t
6838; ZVFHMIN-NEXT:    vfwcvt.f.f.v v20, v12, v0.t
6839; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v8, v0.t
6840; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m4, ta, ma
6841; ZVFHMIN-NEXT:    vfmadd.vv v12, v20, v16, v0.t
6842; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m2, ta, ma
6843; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v12, v0.t
6844; ZVFHMIN-NEXT:    ret
6845  %elt.head = insertelement <vscale x 8 x half> poison, half %b, i32 0
6846  %vb = shufflevector <vscale x 8 x half> %elt.head, <vscale x 8 x half> poison, <vscale x 8 x i32> zeroinitializer
6847  %negvb = call <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half> %vb, <vscale x 8 x i1> %m, i32 %evl)
6848  %negvc = call <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half> %vc, <vscale x 8 x i1> %m, i32 %evl)
6849  %v = call <vscale x 8 x half> @llvm.vp.fma.nxv8f16(<vscale x 8 x half> %negvb, <vscale x 8 x half> %va, <vscale x 8 x half> %negvc, <vscale x 8 x i1> %m, i32 %evl)
6850  ret <vscale x 8 x half> %v
6851}
6852
6853define <vscale x 8 x half> @vfnmadd_vf_nxv8f16_neg_splat_unmasked(<vscale x 8 x half> %va, half %b, <vscale x 8 x half> %vc, i32 zeroext %evl) {
6854; ZVFH-LABEL: vfnmadd_vf_nxv8f16_neg_splat_unmasked:
6855; ZVFH:       # %bb.0:
6856; ZVFH-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
6857; ZVFH-NEXT:    vfnmadd.vf v8, fa0, v10
6858; ZVFH-NEXT:    ret
6859;
6860; ZVFHMIN-LABEL: vfnmadd_vf_nxv8f16_neg_splat_unmasked:
6861; ZVFHMIN:       # %bb.0:
6862; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
6863; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
6864; ZVFHMIN-NEXT:    vmv.v.x v12, a1
6865; ZVFHMIN-NEXT:    lui a0, 8
6866; ZVFHMIN-NEXT:    vxor.vx v10, v10, a0
6867; ZVFHMIN-NEXT:    vxor.vx v12, v12, a0
6868; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v10
6869; ZVFHMIN-NEXT:    vfwcvt.f.f.v v20, v12
6870; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v8
6871; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m4, ta, ma
6872; ZVFHMIN-NEXT:    vfmadd.vv v12, v20, v16
6873; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m2, ta, ma
6874; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v12
6875; ZVFHMIN-NEXT:    ret
6876  %elt.head = insertelement <vscale x 8 x half> poison, half %b, i32 0
6877  %vb = shufflevector <vscale x 8 x half> %elt.head, <vscale x 8 x half> poison, <vscale x 8 x i32> zeroinitializer
6878  %negvb = call <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half> %vb, <vscale x 8 x i1> splat (i1 true), i32 %evl)
6879  %negvc = call <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half> %vc, <vscale x 8 x i1> splat (i1 true), i32 %evl)
6880  %v = call <vscale x 8 x half> @llvm.vp.fma.nxv8f16(<vscale x 8 x half> %va, <vscale x 8 x half> %negvb, <vscale x 8 x half> %negvc, <vscale x 8 x i1> splat (i1 true), i32 %evl)
6881  ret <vscale x 8 x half> %v
6882}
6883
6884define <vscale x 8 x half> @vfnmadd_vf_nxv8f16_neg_splat_unmasked_commute(<vscale x 8 x half> %va, half %b, <vscale x 8 x half> %vc, i32 zeroext %evl) {
6885; ZVFH-LABEL: vfnmadd_vf_nxv8f16_neg_splat_unmasked_commute:
6886; ZVFH:       # %bb.0:
6887; ZVFH-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
6888; ZVFH-NEXT:    vfnmadd.vf v8, fa0, v10
6889; ZVFH-NEXT:    ret
6890;
6891; ZVFHMIN-LABEL: vfnmadd_vf_nxv8f16_neg_splat_unmasked_commute:
6892; ZVFHMIN:       # %bb.0:
6893; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
6894; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
6895; ZVFHMIN-NEXT:    vmv.v.x v12, a1
6896; ZVFHMIN-NEXT:    lui a0, 8
6897; ZVFHMIN-NEXT:    vxor.vx v10, v10, a0
6898; ZVFHMIN-NEXT:    vxor.vx v12, v12, a0
6899; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v10
6900; ZVFHMIN-NEXT:    vfwcvt.f.f.v v20, v12
6901; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v8
6902; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m4, ta, ma
6903; ZVFHMIN-NEXT:    vfmadd.vv v12, v20, v16
6904; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m2, ta, ma
6905; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v12
6906; ZVFHMIN-NEXT:    ret
6907  %elt.head = insertelement <vscale x 8 x half> poison, half %b, i32 0
6908  %vb = shufflevector <vscale x 8 x half> %elt.head, <vscale x 8 x half> poison, <vscale x 8 x i32> zeroinitializer
6909  %negvb = call <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half> %vb, <vscale x 8 x i1> splat (i1 true), i32 %evl)
6910  %negvc = call <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half> %vc, <vscale x 8 x i1> splat (i1 true), i32 %evl)
6911  %v = call <vscale x 8 x half> @llvm.vp.fma.nxv8f16(<vscale x 8 x half> %negvb, <vscale x 8 x half> %va, <vscale x 8 x half> %negvc, <vscale x 8 x i1> splat (i1 true), i32 %evl)
6912  ret <vscale x 8 x half> %v
6913}
6914
6915define <vscale x 8 x half> @vfnmsub_vv_nxv8f16(<vscale x 8 x half> %va, <vscale x 8 x half> %b, <vscale x 8 x half> %c, <vscale x 8 x i1> %m, i32 zeroext %evl) {
6916; ZVFH-LABEL: vfnmsub_vv_nxv8f16:
6917; ZVFH:       # %bb.0:
6918; ZVFH-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
6919; ZVFH-NEXT:    vfnmadd.vv v10, v8, v12, v0.t
6920; ZVFH-NEXT:    vmv.v.v v8, v10
6921; ZVFH-NEXT:    ret
6922;
6923; ZVFHMIN-LABEL: vfnmsub_vv_nxv8f16:
6924; ZVFHMIN:       # %bb.0:
6925; ZVFHMIN-NEXT:    lui a1, 8
6926; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
6927; ZVFHMIN-NEXT:    vxor.vx v10, v10, a1, v0.t
6928; ZVFHMIN-NEXT:    vxor.vx v12, v12, a1, v0.t
6929; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v12, v0.t
6930; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v10, v0.t
6931; ZVFHMIN-NEXT:    vfwcvt.f.f.v v20, v8, v0.t
6932; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m4, ta, ma
6933; ZVFHMIN-NEXT:    vfmadd.vv v12, v20, v16, v0.t
6934; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m2, ta, ma
6935; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v12, v0.t
6936; ZVFHMIN-NEXT:    ret
6937  %negb = call <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half> %b, <vscale x 8 x i1> %m, i32 %evl)
6938  %negc = call <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half> %c, <vscale x 8 x i1> %m, i32 %evl)
6939  %v = call <vscale x 8 x half> @llvm.vp.fma.nxv8f16(<vscale x 8 x half> %va, <vscale x 8 x half> %negb, <vscale x 8 x half> %negc, <vscale x 8 x i1> %m, i32 %evl)
6940  ret <vscale x 8 x half> %v
6941}
6942
6943define <vscale x 8 x half> @vfnmsub_vv_nxv8f16_commuted(<vscale x 8 x half> %va, <vscale x 8 x half> %b, <vscale x 8 x half> %c, <vscale x 8 x i1> %m, i32 zeroext %evl) {
6944; ZVFH-LABEL: vfnmsub_vv_nxv8f16_commuted:
6945; ZVFH:       # %bb.0:
6946; ZVFH-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
6947; ZVFH-NEXT:    vfnmadd.vv v8, v10, v12, v0.t
6948; ZVFH-NEXT:    ret
6949;
6950; ZVFHMIN-LABEL: vfnmsub_vv_nxv8f16_commuted:
6951; ZVFHMIN:       # %bb.0:
6952; ZVFHMIN-NEXT:    lui a1, 8
6953; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
6954; ZVFHMIN-NEXT:    vxor.vx v10, v10, a1, v0.t
6955; ZVFHMIN-NEXT:    vxor.vx v12, v12, a1, v0.t
6956; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v12, v0.t
6957; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v10, v0.t
6958; ZVFHMIN-NEXT:    vfwcvt.f.f.v v20, v8, v0.t
6959; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m4, ta, ma
6960; ZVFHMIN-NEXT:    vfmadd.vv v20, v12, v16, v0.t
6961; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m2, ta, ma
6962; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v20, v0.t
6963; ZVFHMIN-NEXT:    ret
6964  %negb = call <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half> %b, <vscale x 8 x i1> %m, i32 %evl)
6965  %negc = call <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half> %c, <vscale x 8 x i1> %m, i32 %evl)
6966  %v = call <vscale x 8 x half> @llvm.vp.fma.nxv8f16(<vscale x 8 x half> %negb, <vscale x 8 x half> %va, <vscale x 8 x half> %negc, <vscale x 8 x i1> %m, i32 %evl)
6967  ret <vscale x 8 x half> %v
6968}
6969
6970define <vscale x 8 x half> @vfnmsub_vv_nxv8f16_unmasked(<vscale x 8 x half> %va, <vscale x 8 x half> %b, <vscale x 8 x half> %c, i32 zeroext %evl) {
6971; ZVFH-LABEL: vfnmsub_vv_nxv8f16_unmasked:
6972; ZVFH:       # %bb.0:
6973; ZVFH-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
6974; ZVFH-NEXT:    vfnmadd.vv v8, v10, v12
6975; ZVFH-NEXT:    ret
6976;
6977; ZVFHMIN-LABEL: vfnmsub_vv_nxv8f16_unmasked:
6978; ZVFHMIN:       # %bb.0:
6979; ZVFHMIN-NEXT:    lui a1, 8
6980; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
6981; ZVFHMIN-NEXT:    vxor.vx v10, v10, a1
6982; ZVFHMIN-NEXT:    vxor.vx v12, v12, a1
6983; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v12
6984; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v10
6985; ZVFHMIN-NEXT:    vfwcvt.f.f.v v20, v8
6986; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m4, ta, ma
6987; ZVFHMIN-NEXT:    vfmadd.vv v20, v12, v16
6988; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m2, ta, ma
6989; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v20
6990; ZVFHMIN-NEXT:    ret
6991  %negb = call <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half> %b, <vscale x 8 x i1> splat (i1 true), i32 %evl)
6992  %negc = call <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half> %c, <vscale x 8 x i1> splat (i1 true), i32 %evl)
6993  %v = call <vscale x 8 x half> @llvm.vp.fma.nxv8f16(<vscale x 8 x half> %va, <vscale x 8 x half> %negb, <vscale x 8 x half> %negc, <vscale x 8 x i1> splat (i1 true), i32 %evl)
6994  ret <vscale x 8 x half> %v
6995}
6996
6997define <vscale x 8 x half> @vfnmsub_vv_nxv8f16_unmasked_commuted(<vscale x 8 x half> %va, <vscale x 8 x half> %b, <vscale x 8 x half> %c, i32 zeroext %evl) {
6998; ZVFH-LABEL: vfnmsub_vv_nxv8f16_unmasked_commuted:
6999; ZVFH:       # %bb.0:
7000; ZVFH-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
7001; ZVFH-NEXT:    vfnmadd.vv v8, v10, v12
7002; ZVFH-NEXT:    ret
7003;
7004; ZVFHMIN-LABEL: vfnmsub_vv_nxv8f16_unmasked_commuted:
7005; ZVFHMIN:       # %bb.0:
7006; ZVFHMIN-NEXT:    lui a1, 8
7007; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
7008; ZVFHMIN-NEXT:    vxor.vx v10, v10, a1
7009; ZVFHMIN-NEXT:    vxor.vx v12, v12, a1
7010; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v12
7011; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v10
7012; ZVFHMIN-NEXT:    vfwcvt.f.f.v v20, v8
7013; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m4, ta, ma
7014; ZVFHMIN-NEXT:    vfmadd.vv v20, v12, v16
7015; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m2, ta, ma
7016; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v20
7017; ZVFHMIN-NEXT:    ret
7018  %negb = call <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half> %b, <vscale x 8 x i1> splat (i1 true), i32 %evl)
7019  %negc = call <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half> %c, <vscale x 8 x i1> splat (i1 true), i32 %evl)
7020  %v = call <vscale x 8 x half> @llvm.vp.fma.nxv8f16(<vscale x 8 x half> %negb, <vscale x 8 x half> %va, <vscale x 8 x half> %negc, <vscale x 8 x i1> splat (i1 true), i32 %evl)
7021  ret <vscale x 8 x half> %v
7022}
7023
7024define <vscale x 8 x half> @vfnmsub_vf_nxv8f16(<vscale x 8 x half> %va, half %b, <vscale x 8 x half> %vc, <vscale x 8 x i1> %m, i32 zeroext %evl) {
7025; ZVFH-LABEL: vfnmsub_vf_nxv8f16:
7026; ZVFH:       # %bb.0:
7027; ZVFH-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
7028; ZVFH-NEXT:    vfnmsub.vf v8, fa0, v10, v0.t
7029; ZVFH-NEXT:    ret
7030;
7031; ZVFHMIN-LABEL: vfnmsub_vf_nxv8f16:
7032; ZVFHMIN:       # %bb.0:
7033; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
7034; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
7035; ZVFHMIN-NEXT:    vmv.v.x v12, a1
7036; ZVFHMIN-NEXT:    lui a0, 8
7037; ZVFHMIN-NEXT:    vxor.vx v8, v8, a0, v0.t
7038; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v8, v0.t
7039; ZVFHMIN-NEXT:    vfwcvt.f.f.v v20, v10, v0.t
7040; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v12, v0.t
7041; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m4, ta, ma
7042; ZVFHMIN-NEXT:    vfmadd.vv v24, v16, v20, v0.t
7043; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m2, ta, ma
7044; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v24, v0.t
7045; ZVFHMIN-NEXT:    ret
7046  %elt.head = insertelement <vscale x 8 x half> poison, half %b, i32 0
7047  %vb = shufflevector <vscale x 8 x half> %elt.head, <vscale x 8 x half> poison, <vscale x 8 x i32> zeroinitializer
7048  %negva = call <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half> %va, <vscale x 8 x i1> %m, i32 %evl)
7049  %v = call <vscale x 8 x half> @llvm.vp.fma.nxv8f16(<vscale x 8 x half> %negva, <vscale x 8 x half> %vb, <vscale x 8 x half> %vc, <vscale x 8 x i1> %m, i32 %evl)
7050  ret <vscale x 8 x half> %v
7051}
7052
7053define <vscale x 8 x half> @vfnmsub_vf_nxv8f16_commute(<vscale x 8 x half> %va, half %b, <vscale x 8 x half> %vc, <vscale x 8 x i1> %m, i32 zeroext %evl) {
7054; ZVFH-LABEL: vfnmsub_vf_nxv8f16_commute:
7055; ZVFH:       # %bb.0:
7056; ZVFH-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
7057; ZVFH-NEXT:    vfnmsub.vf v8, fa0, v10, v0.t
7058; ZVFH-NEXT:    ret
7059;
7060; ZVFHMIN-LABEL: vfnmsub_vf_nxv8f16_commute:
7061; ZVFHMIN:       # %bb.0:
7062; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
7063; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
7064; ZVFHMIN-NEXT:    vmv.v.x v12, a1
7065; ZVFHMIN-NEXT:    lui a0, 8
7066; ZVFHMIN-NEXT:    vxor.vx v8, v8, a0, v0.t
7067; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v8, v0.t
7068; ZVFHMIN-NEXT:    vfwcvt.f.f.v v20, v10, v0.t
7069; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v12, v0.t
7070; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m4, ta, ma
7071; ZVFHMIN-NEXT:    vfmadd.vv v16, v8, v20, v0.t
7072; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m2, ta, ma
7073; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v16, v0.t
7074; ZVFHMIN-NEXT:    ret
7075  %elt.head = insertelement <vscale x 8 x half> poison, half %b, i32 0
7076  %vb = shufflevector <vscale x 8 x half> %elt.head, <vscale x 8 x half> poison, <vscale x 8 x i32> zeroinitializer
7077  %negva = call <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half> %va, <vscale x 8 x i1> %m, i32 %evl)
7078  %v = call <vscale x 8 x half> @llvm.vp.fma.nxv8f16(<vscale x 8 x half> %vb, <vscale x 8 x half> %negva, <vscale x 8 x half> %vc, <vscale x 8 x i1> %m, i32 %evl)
7079  ret <vscale x 8 x half> %v
7080}
7081
7082define <vscale x 8 x half> @vfnmsub_vf_nxv8f16_unmasked(<vscale x 8 x half> %va, half %b, <vscale x 8 x half> %vc, i32 zeroext %evl) {
7083; ZVFH-LABEL: vfnmsub_vf_nxv8f16_unmasked:
7084; ZVFH:       # %bb.0:
7085; ZVFH-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
7086; ZVFH-NEXT:    vfnmsub.vf v8, fa0, v10
7087; ZVFH-NEXT:    ret
7088;
7089; ZVFHMIN-LABEL: vfnmsub_vf_nxv8f16_unmasked:
7090; ZVFHMIN:       # %bb.0:
7091; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
7092; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
7093; ZVFHMIN-NEXT:    vmv.v.x v12, a1
7094; ZVFHMIN-NEXT:    lui a0, 8
7095; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v10
7096; ZVFHMIN-NEXT:    vxor.vx v8, v8, a0
7097; ZVFHMIN-NEXT:    vfwcvt.f.f.v v20, v8
7098; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v12
7099; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m4, ta, ma
7100; ZVFHMIN-NEXT:    vfmadd.vv v24, v20, v16
7101; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m2, ta, ma
7102; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v24
7103; ZVFHMIN-NEXT:    ret
7104  %elt.head = insertelement <vscale x 8 x half> poison, half %b, i32 0
7105  %vb = shufflevector <vscale x 8 x half> %elt.head, <vscale x 8 x half> poison, <vscale x 8 x i32> zeroinitializer
7106  %negva = call <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half> %va, <vscale x 8 x i1> splat (i1 true), i32 %evl)
7107  %v = call <vscale x 8 x half> @llvm.vp.fma.nxv8f16(<vscale x 8 x half> %negva, <vscale x 8 x half> %vb, <vscale x 8 x half> %vc, <vscale x 8 x i1> splat (i1 true), i32 %evl)
7108  ret <vscale x 8 x half> %v
7109}
7110
7111define <vscale x 8 x half> @vfnmsub_vf_nxv8f16_unmasked_commute(<vscale x 8 x half> %va, half %b, <vscale x 8 x half> %vc, i32 zeroext %evl) {
7112; ZVFH-LABEL: vfnmsub_vf_nxv8f16_unmasked_commute:
7113; ZVFH:       # %bb.0:
7114; ZVFH-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
7115; ZVFH-NEXT:    vfnmsub.vf v8, fa0, v10
7116; ZVFH-NEXT:    ret
7117;
7118; ZVFHMIN-LABEL: vfnmsub_vf_nxv8f16_unmasked_commute:
7119; ZVFHMIN:       # %bb.0:
7120; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
7121; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
7122; ZVFHMIN-NEXT:    vmv.v.x v12, a1
7123; ZVFHMIN-NEXT:    lui a0, 8
7124; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v10
7125; ZVFHMIN-NEXT:    vxor.vx v8, v8, a0
7126; ZVFHMIN-NEXT:    vfwcvt.f.f.v v20, v8
7127; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v12
7128; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m4, ta, ma
7129; ZVFHMIN-NEXT:    vfmadd.vv v24, v20, v16
7130; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m2, ta, ma
7131; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v24
7132; ZVFHMIN-NEXT:    ret
7133  %elt.head = insertelement <vscale x 8 x half> poison, half %b, i32 0
7134  %vb = shufflevector <vscale x 8 x half> %elt.head, <vscale x 8 x half> poison, <vscale x 8 x i32> zeroinitializer
7135  %negva = call <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half> %va, <vscale x 8 x i1> splat (i1 true), i32 %evl)
7136  %v = call <vscale x 8 x half> @llvm.vp.fma.nxv8f16(<vscale x 8 x half> %vb, <vscale x 8 x half> %negva, <vscale x 8 x half> %vc, <vscale x 8 x i1> splat (i1 true), i32 %evl)
7137  ret <vscale x 8 x half> %v
7138}
7139
7140define <vscale x 8 x half> @vfnmsub_vf_nxv8f16_neg_splat(<vscale x 8 x half> %va, half %b, <vscale x 8 x half> %vc, <vscale x 8 x i1> %m, i32 zeroext %evl) {
7141; ZVFH-LABEL: vfnmsub_vf_nxv8f16_neg_splat:
7142; ZVFH:       # %bb.0:
7143; ZVFH-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
7144; ZVFH-NEXT:    vfnmsub.vf v8, fa0, v10, v0.t
7145; ZVFH-NEXT:    ret
7146;
7147; ZVFHMIN-LABEL: vfnmsub_vf_nxv8f16_neg_splat:
7148; ZVFHMIN:       # %bb.0:
7149; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
7150; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
7151; ZVFHMIN-NEXT:    vmv.v.x v12, a1
7152; ZVFHMIN-NEXT:    lui a0, 8
7153; ZVFHMIN-NEXT:    vxor.vx v12, v12, a0, v0.t
7154; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v12, v0.t
7155; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v10, v0.t
7156; ZVFHMIN-NEXT:    vfwcvt.f.f.v v20, v8, v0.t
7157; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m4, ta, ma
7158; ZVFHMIN-NEXT:    vfmadd.vv v16, v20, v12, v0.t
7159; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m2, ta, ma
7160; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v16, v0.t
7161; ZVFHMIN-NEXT:    ret
7162  %elt.head = insertelement <vscale x 8 x half> poison, half %b, i32 0
7163  %vb = shufflevector <vscale x 8 x half> %elt.head, <vscale x 8 x half> poison, <vscale x 8 x i32> zeroinitializer
7164  %negvb = call <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half> %vb, <vscale x 8 x i1> %m, i32 %evl)
7165  %v = call <vscale x 8 x half> @llvm.vp.fma.nxv8f16(<vscale x 8 x half> %va, <vscale x 8 x half> %negvb, <vscale x 8 x half> %vc, <vscale x 8 x i1> %m, i32 %evl)
7166  ret <vscale x 8 x half> %v
7167}
7168
7169define <vscale x 8 x half> @vfnmsub_vf_nxv8f16_neg_splat_commute(<vscale x 8 x half> %va, half %b, <vscale x 8 x half> %vc, <vscale x 8 x i1> %m, i32 zeroext %evl) {
7170; ZVFH-LABEL: vfnmsub_vf_nxv8f16_neg_splat_commute:
7171; ZVFH:       # %bb.0:
7172; ZVFH-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
7173; ZVFH-NEXT:    vfnmsub.vf v8, fa0, v10, v0.t
7174; ZVFH-NEXT:    ret
7175;
7176; ZVFHMIN-LABEL: vfnmsub_vf_nxv8f16_neg_splat_commute:
7177; ZVFHMIN:       # %bb.0:
7178; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
7179; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
7180; ZVFHMIN-NEXT:    vmv.v.x v12, a1
7181; ZVFHMIN-NEXT:    lui a0, 8
7182; ZVFHMIN-NEXT:    vxor.vx v12, v12, a0, v0.t
7183; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v12, v0.t
7184; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v10, v0.t
7185; ZVFHMIN-NEXT:    vfwcvt.f.f.v v20, v8, v0.t
7186; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m4, ta, ma
7187; ZVFHMIN-NEXT:    vfmadd.vv v20, v16, v12, v0.t
7188; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m2, ta, ma
7189; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v20, v0.t
7190; ZVFHMIN-NEXT:    ret
7191  %elt.head = insertelement <vscale x 8 x half> poison, half %b, i32 0
7192  %vb = shufflevector <vscale x 8 x half> %elt.head, <vscale x 8 x half> poison, <vscale x 8 x i32> zeroinitializer
7193  %negvb = call <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half> %vb, <vscale x 8 x i1> %m, i32 %evl)
7194  %v = call <vscale x 8 x half> @llvm.vp.fma.nxv8f16(<vscale x 8 x half> %negvb, <vscale x 8 x half> %va, <vscale x 8 x half> %vc, <vscale x 8 x i1> %m, i32 %evl)
7195  ret <vscale x 8 x half> %v
7196}
7197
7198define <vscale x 8 x half> @vfnmsub_vf_nxv8f16_neg_splat_unmasked(<vscale x 8 x half> %va, half %b, <vscale x 8 x half> %vc, i32 zeroext %evl) {
7199; ZVFH-LABEL: vfnmsub_vf_nxv8f16_neg_splat_unmasked:
7200; ZVFH:       # %bb.0:
7201; ZVFH-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
7202; ZVFH-NEXT:    vfnmsub.vf v8, fa0, v10
7203; ZVFH-NEXT:    ret
7204;
7205; ZVFHMIN-LABEL: vfnmsub_vf_nxv8f16_neg_splat_unmasked:
7206; ZVFHMIN:       # %bb.0:
7207; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
7208; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
7209; ZVFHMIN-NEXT:    vmv.v.x v12, a1
7210; ZVFHMIN-NEXT:    lui a0, 8
7211; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v10
7212; ZVFHMIN-NEXT:    vxor.vx v10, v12, a0
7213; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v10
7214; ZVFHMIN-NEXT:    vfwcvt.f.f.v v20, v8
7215; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m4, ta, ma
7216; ZVFHMIN-NEXT:    vfmadd.vv v20, v12, v16
7217; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m2, ta, ma
7218; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v20
7219; ZVFHMIN-NEXT:    ret
7220  %elt.head = insertelement <vscale x 8 x half> poison, half %b, i32 0
7221  %vb = shufflevector <vscale x 8 x half> %elt.head, <vscale x 8 x half> poison, <vscale x 8 x i32> zeroinitializer
7222  %negvb = call <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half> %vb, <vscale x 8 x i1> splat (i1 true), i32 %evl)
7223  %v = call <vscale x 8 x half> @llvm.vp.fma.nxv8f16(<vscale x 8 x half> %va, <vscale x 8 x half> %negvb, <vscale x 8 x half> %vc, <vscale x 8 x i1> splat (i1 true), i32 %evl)
7224  ret <vscale x 8 x half> %v
7225}
7226
7227define <vscale x 8 x half> @vfnmsub_vf_nxv8f16_neg_splat_unmasked_commute(<vscale x 8 x half> %va, half %b, <vscale x 8 x half> %vc, i32 zeroext %evl) {
7228; ZVFH-LABEL: vfnmsub_vf_nxv8f16_neg_splat_unmasked_commute:
7229; ZVFH:       # %bb.0:
7230; ZVFH-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
7231; ZVFH-NEXT:    vfnmsub.vf v8, fa0, v10
7232; ZVFH-NEXT:    ret
7233;
7234; ZVFHMIN-LABEL: vfnmsub_vf_nxv8f16_neg_splat_unmasked_commute:
7235; ZVFHMIN:       # %bb.0:
7236; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
7237; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
7238; ZVFHMIN-NEXT:    vmv.v.x v12, a1
7239; ZVFHMIN-NEXT:    lui a0, 8
7240; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v10
7241; ZVFHMIN-NEXT:    vxor.vx v10, v12, a0
7242; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v10
7243; ZVFHMIN-NEXT:    vfwcvt.f.f.v v20, v8
7244; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m4, ta, ma
7245; ZVFHMIN-NEXT:    vfmadd.vv v20, v12, v16
7246; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m2, ta, ma
7247; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v20
7248; ZVFHMIN-NEXT:    ret
7249  %elt.head = insertelement <vscale x 8 x half> poison, half %b, i32 0
7250  %vb = shufflevector <vscale x 8 x half> %elt.head, <vscale x 8 x half> poison, <vscale x 8 x i32> zeroinitializer
7251  %negvb = call <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half> %vb, <vscale x 8 x i1> splat (i1 true), i32 %evl)
7252  %v = call <vscale x 8 x half> @llvm.vp.fma.nxv8f16(<vscale x 8 x half> %negvb, <vscale x 8 x half> %va, <vscale x 8 x half> %vc, <vscale x 8 x i1> splat (i1 true), i32 %evl)
7253  ret <vscale x 8 x half> %v
7254}
7255
7256declare <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half>, <vscale x 16 x i1>, i32)
7257
7258define <vscale x 16 x half> @vfmsub_vv_nxv16f16(<vscale x 16 x half> %va, <vscale x 16 x half> %b, <vscale x 16 x half> %c, <vscale x 16 x i1> %m, i32 zeroext %evl) {
7259; ZVFH-LABEL: vfmsub_vv_nxv16f16:
7260; ZVFH:       # %bb.0:
7261; ZVFH-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
7262; ZVFH-NEXT:    vfmsub.vv v12, v8, v16, v0.t
7263; ZVFH-NEXT:    vmv.v.v v8, v12
7264; ZVFH-NEXT:    ret
7265;
7266; ZVFHMIN-LABEL: vfmsub_vv_nxv16f16:
7267; ZVFHMIN:       # %bb.0:
7268; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
7269; ZVFHMIN-NEXT:    vmv4r.v v4, v12
7270; ZVFHMIN-NEXT:    vmv4r.v v20, v8
7271; ZVFHMIN-NEXT:    lui a0, 8
7272; ZVFHMIN-NEXT:    vxor.vx v24, v16, a0, v0.t
7273; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v24, v0.t
7274; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v20, v0.t
7275; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v4, v0.t
7276; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
7277; ZVFHMIN-NEXT:    vfmadd.vv v16, v24, v8, v0.t
7278; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
7279; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v16, v0.t
7280; ZVFHMIN-NEXT:    ret
7281  %negc = call <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half> %c, <vscale x 16 x i1> %m, i32 %evl)
7282  %v = call <vscale x 16 x half> @llvm.vp.fma.nxv16f16(<vscale x 16 x half> %va, <vscale x 16 x half> %b, <vscale x 16 x half> %negc, <vscale x 16 x i1> %m, i32 %evl)
7283  ret <vscale x 16 x half> %v
7284}
7285
7286define <vscale x 16 x half> @vfmsub_vv_nxv16f16_unmasked(<vscale x 16 x half> %va, <vscale x 16 x half> %b, <vscale x 16 x half> %c, i32 zeroext %evl) {
7287; ZVFH-LABEL: vfmsub_vv_nxv16f16_unmasked:
7288; ZVFH:       # %bb.0:
7289; ZVFH-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
7290; ZVFH-NEXT:    vfmsub.vv v8, v12, v16
7291; ZVFH-NEXT:    ret
7292;
7293; ZVFHMIN-LABEL: vfmsub_vv_nxv16f16_unmasked:
7294; ZVFHMIN:       # %bb.0:
7295; ZVFHMIN-NEXT:    lui a1, 8
7296; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
7297; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v8
7298; ZVFHMIN-NEXT:    vxor.vx v8, v16, a1
7299; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v8
7300; ZVFHMIN-NEXT:    vfwcvt.f.f.v v0, v12
7301; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
7302; ZVFHMIN-NEXT:    vfmadd.vv v0, v24, v16
7303; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
7304; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v0
7305; ZVFHMIN-NEXT:    ret
7306  %negc = call <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half> %c, <vscale x 16 x i1> splat (i1 true), i32 %evl)
7307  %v = call <vscale x 16 x half> @llvm.vp.fma.nxv16f16(<vscale x 16 x half> %va, <vscale x 16 x half> %b, <vscale x 16 x half> %negc, <vscale x 16 x i1> splat (i1 true), i32 %evl)
7308  ret <vscale x 16 x half> %v
7309}
7310
7311define <vscale x 16 x half> @vfmsub_vf_nxv16f16(<vscale x 16 x half> %va, half %b, <vscale x 16 x half> %vc, <vscale x 16 x i1> %m, i32 zeroext %evl) {
7312; ZVFH-LABEL: vfmsub_vf_nxv16f16:
7313; ZVFH:       # %bb.0:
7314; ZVFH-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
7315; ZVFH-NEXT:    vfmsub.vf v8, fa0, v12, v0.t
7316; ZVFH-NEXT:    ret
7317;
7318; ZVFHMIN-LABEL: vfmsub_vf_nxv16f16:
7319; ZVFHMIN:       # %bb.0:
7320; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
7321; ZVFHMIN-NEXT:    vmv4r.v v16, v8
7322; ZVFHMIN-NEXT:    fmv.x.h a0, fa0
7323; ZVFHMIN-NEXT:    vmv.v.x v4, a0
7324; ZVFHMIN-NEXT:    lui a0, 8
7325; ZVFHMIN-NEXT:    vxor.vx v12, v12, a0, v0.t
7326; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v12, v0.t
7327; ZVFHMIN-NEXT:    vmv8r.v v8, v24
7328; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v16, v0.t
7329; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v4, v0.t
7330; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
7331; ZVFHMIN-NEXT:    vfmadd.vv v16, v24, v8, v0.t
7332; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
7333; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v16, v0.t
7334; ZVFHMIN-NEXT:    ret
7335  %elt.head = insertelement <vscale x 16 x half> poison, half %b, i32 0
7336  %vb = shufflevector <vscale x 16 x half> %elt.head, <vscale x 16 x half> poison, <vscale x 16 x i32> zeroinitializer
7337  %negvc = call <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half> %vc, <vscale x 16 x i1> %m, i32 %evl)
7338  %v = call <vscale x 16 x half> @llvm.vp.fma.nxv16f16(<vscale x 16 x half> %va, <vscale x 16 x half> %vb, <vscale x 16 x half> %negvc, <vscale x 16 x i1> %m, i32 %evl)
7339  ret <vscale x 16 x half> %v
7340}
7341
7342define <vscale x 16 x half> @vfmsub_vf_nxv16f16_commute(<vscale x 16 x half> %va, half %b, <vscale x 16 x half> %vc, <vscale x 16 x i1> %m, i32 zeroext %evl) {
7343; ZVFH-LABEL: vfmsub_vf_nxv16f16_commute:
7344; ZVFH:       # %bb.0:
7345; ZVFH-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
7346; ZVFH-NEXT:    vfmsub.vf v8, fa0, v12, v0.t
7347; ZVFH-NEXT:    ret
7348;
7349; ZVFHMIN-LABEL: vfmsub_vf_nxv16f16_commute:
7350; ZVFHMIN:       # %bb.0:
7351; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
7352; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
7353; ZVFHMIN-NEXT:    vmv.v.x v4, a1
7354; ZVFHMIN-NEXT:    lui a0, 8
7355; ZVFHMIN-NEXT:    vxor.vx v12, v12, a0, v0.t
7356; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v12, v0.t
7357; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v8, v0.t
7358; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v4, v0.t
7359; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
7360; ZVFHMIN-NEXT:    vfmadd.vv v24, v8, v16, v0.t
7361; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
7362; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v24, v0.t
7363; ZVFHMIN-NEXT:    ret
7364  %elt.head = insertelement <vscale x 16 x half> poison, half %b, i32 0
7365  %vb = shufflevector <vscale x 16 x half> %elt.head, <vscale x 16 x half> poison, <vscale x 16 x i32> zeroinitializer
7366  %negvc = call <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half> %vc, <vscale x 16 x i1> %m, i32 %evl)
7367  %v = call <vscale x 16 x half> @llvm.vp.fma.nxv16f16(<vscale x 16 x half> %vb, <vscale x 16 x half> %va, <vscale x 16 x half> %negvc, <vscale x 16 x i1> %m, i32 %evl)
7368  ret <vscale x 16 x half> %v
7369}
7370
7371define <vscale x 16 x half> @vfmsub_vf_nxv16f16_unmasked(<vscale x 16 x half> %va, half %b, <vscale x 16 x half> %vc, i32 zeroext %evl) {
7372; ZVFH-LABEL: vfmsub_vf_nxv16f16_unmasked:
7373; ZVFH:       # %bb.0:
7374; ZVFH-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
7375; ZVFH-NEXT:    vfmsub.vf v8, fa0, v12
7376; ZVFH-NEXT:    ret
7377;
7378; ZVFHMIN-LABEL: vfmsub_vf_nxv16f16_unmasked:
7379; ZVFHMIN:       # %bb.0:
7380; ZVFHMIN-NEXT:    addi sp, sp, -16
7381; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 16
7382; ZVFHMIN-NEXT:    csrr a1, vlenb
7383; ZVFHMIN-NEXT:    slli a1, a1, 2
7384; ZVFHMIN-NEXT:    sub sp, sp, a1
7385; ZVFHMIN-NEXT:    .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x04, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 4 * vlenb
7386; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
7387; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
7388; ZVFHMIN-NEXT:    vmv.v.x v16, a1
7389; ZVFHMIN-NEXT:    addi a0, sp, 16
7390; ZVFHMIN-NEXT:    vs4r.v v16, (a0) # Unknown-size Folded Spill
7391; ZVFHMIN-NEXT:    lui a0, 8
7392; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v8
7393; ZVFHMIN-NEXT:    vxor.vx v8, v12, a0
7394; ZVFHMIN-NEXT:    vfwcvt.f.f.v v0, v8
7395; ZVFHMIN-NEXT:    addi a0, sp, 16
7396; ZVFHMIN-NEXT:    vl4r.v v8, (a0) # Unknown-size Folded Reload
7397; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v8
7398; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
7399; ZVFHMIN-NEXT:    vfmadd.vv v16, v24, v0
7400; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
7401; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v16
7402; ZVFHMIN-NEXT:    csrr a0, vlenb
7403; ZVFHMIN-NEXT:    slli a0, a0, 2
7404; ZVFHMIN-NEXT:    add sp, sp, a0
7405; ZVFHMIN-NEXT:    .cfi_def_cfa sp, 16
7406; ZVFHMIN-NEXT:    addi sp, sp, 16
7407; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 0
7408; ZVFHMIN-NEXT:    ret
7409  %elt.head = insertelement <vscale x 16 x half> poison, half %b, i32 0
7410  %vb = shufflevector <vscale x 16 x half> %elt.head, <vscale x 16 x half> poison, <vscale x 16 x i32> zeroinitializer
7411  %negvc = call <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half> %vc, <vscale x 16 x i1> splat (i1 true), i32 %evl)
7412  %v = call <vscale x 16 x half> @llvm.vp.fma.nxv16f16(<vscale x 16 x half> %va, <vscale x 16 x half> %vb, <vscale x 16 x half> %negvc, <vscale x 16 x i1> splat (i1 true), i32 %evl)
7413  ret <vscale x 16 x half> %v
7414}
7415
7416define <vscale x 16 x half> @vfmsub_vf_nxv16f16_unmasked_commute(<vscale x 16 x half> %va, half %b, <vscale x 16 x half> %vc, i32 zeroext %evl) {
7417; ZVFH-LABEL: vfmsub_vf_nxv16f16_unmasked_commute:
7418; ZVFH:       # %bb.0:
7419; ZVFH-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
7420; ZVFH-NEXT:    vfmsub.vf v8, fa0, v12
7421; ZVFH-NEXT:    ret
7422;
7423; ZVFHMIN-LABEL: vfmsub_vf_nxv16f16_unmasked_commute:
7424; ZVFHMIN:       # %bb.0:
7425; ZVFHMIN-NEXT:    addi sp, sp, -16
7426; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 16
7427; ZVFHMIN-NEXT:    csrr a1, vlenb
7428; ZVFHMIN-NEXT:    slli a1, a1, 2
7429; ZVFHMIN-NEXT:    sub sp, sp, a1
7430; ZVFHMIN-NEXT:    .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x04, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 4 * vlenb
7431; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
7432; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
7433; ZVFHMIN-NEXT:    vmv.v.x v16, a1
7434; ZVFHMIN-NEXT:    addi a0, sp, 16
7435; ZVFHMIN-NEXT:    vs4r.v v16, (a0) # Unknown-size Folded Spill
7436; ZVFHMIN-NEXT:    lui a0, 8
7437; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v8
7438; ZVFHMIN-NEXT:    vxor.vx v8, v12, a0
7439; ZVFHMIN-NEXT:    vfwcvt.f.f.v v0, v8
7440; ZVFHMIN-NEXT:    addi a0, sp, 16
7441; ZVFHMIN-NEXT:    vl4r.v v8, (a0) # Unknown-size Folded Reload
7442; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v8
7443; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
7444; ZVFHMIN-NEXT:    vfmadd.vv v16, v24, v0
7445; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
7446; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v16
7447; ZVFHMIN-NEXT:    csrr a0, vlenb
7448; ZVFHMIN-NEXT:    slli a0, a0, 2
7449; ZVFHMIN-NEXT:    add sp, sp, a0
7450; ZVFHMIN-NEXT:    .cfi_def_cfa sp, 16
7451; ZVFHMIN-NEXT:    addi sp, sp, 16
7452; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 0
7453; ZVFHMIN-NEXT:    ret
7454  %elt.head = insertelement <vscale x 16 x half> poison, half %b, i32 0
7455  %vb = shufflevector <vscale x 16 x half> %elt.head, <vscale x 16 x half> poison, <vscale x 16 x i32> zeroinitializer
7456  %negvc = call <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half> %vc, <vscale x 16 x i1> splat (i1 true), i32 %evl)
7457  %v = call <vscale x 16 x half> @llvm.vp.fma.nxv16f16(<vscale x 16 x half> %vb, <vscale x 16 x half> %va, <vscale x 16 x half> %negvc, <vscale x 16 x i1> splat (i1 true), i32 %evl)
7458  ret <vscale x 16 x half> %v
7459}
7460
7461define <vscale x 16 x half> @vfnmadd_vv_nxv16f16(<vscale x 16 x half> %va, <vscale x 16 x half> %b, <vscale x 16 x half> %c, <vscale x 16 x i1> %m, i32 zeroext %evl) {
7462; ZVFH-LABEL: vfnmadd_vv_nxv16f16:
7463; ZVFH:       # %bb.0:
7464; ZVFH-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
7465; ZVFH-NEXT:    vfnmadd.vv v12, v8, v16, v0.t
7466; ZVFH-NEXT:    vmv.v.v v8, v12
7467; ZVFH-NEXT:    ret
7468;
7469; ZVFHMIN-LABEL: vfnmadd_vv_nxv16f16:
7470; ZVFHMIN:       # %bb.0:
7471; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
7472; ZVFHMIN-NEXT:    vmv4r.v v4, v8
7473; ZVFHMIN-NEXT:    lui a0, 8
7474; ZVFHMIN-NEXT:    vxor.vx v12, v12, a0, v0.t
7475; ZVFHMIN-NEXT:    vxor.vx v24, v16, a0, v0.t
7476; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v24, v0.t
7477; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v12, v0.t
7478; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v4, v0.t
7479; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
7480; ZVFHMIN-NEXT:    vfmadd.vv v24, v8, v16, v0.t
7481; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
7482; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v24, v0.t
7483; ZVFHMIN-NEXT:    ret
7484  %negb = call <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half> %b, <vscale x 16 x i1> %m, i32 %evl)
7485  %negc = call <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half> %c, <vscale x 16 x i1> %m, i32 %evl)
7486  %v = call <vscale x 16 x half> @llvm.vp.fma.nxv16f16(<vscale x 16 x half> %va, <vscale x 16 x half> %negb, <vscale x 16 x half> %negc, <vscale x 16 x i1> %m, i32 %evl)
7487  ret <vscale x 16 x half> %v
7488}
7489
7490define <vscale x 16 x half> @vfnmadd_vv_nxv16f16_commuted(<vscale x 16 x half> %va, <vscale x 16 x half> %b, <vscale x 16 x half> %c, <vscale x 16 x i1> %m, i32 zeroext %evl) {
7491; ZVFH-LABEL: vfnmadd_vv_nxv16f16_commuted:
7492; ZVFH:       # %bb.0:
7493; ZVFH-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
7494; ZVFH-NEXT:    vfnmadd.vv v8, v12, v16, v0.t
7495; ZVFH-NEXT:    ret
7496;
7497; ZVFHMIN-LABEL: vfnmadd_vv_nxv16f16_commuted:
7498; ZVFHMIN:       # %bb.0:
7499; ZVFHMIN-NEXT:    addi sp, sp, -16
7500; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 16
7501; ZVFHMIN-NEXT:    csrr a1, vlenb
7502; ZVFHMIN-NEXT:    slli a1, a1, 3
7503; ZVFHMIN-NEXT:    sub sp, sp, a1
7504; ZVFHMIN-NEXT:    .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x08, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 8 * vlenb
7505; ZVFHMIN-NEXT:    lui a1, 8
7506; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
7507; ZVFHMIN-NEXT:    vxor.vx v12, v12, a1, v0.t
7508; ZVFHMIN-NEXT:    vxor.vx v24, v16, a1, v0.t
7509; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v24, v0.t
7510; ZVFHMIN-NEXT:    addi a0, sp, 16
7511; ZVFHMIN-NEXT:    vs8r.v v16, (a0) # Unknown-size Folded Spill
7512; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v12, v0.t
7513; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v8, v0.t
7514; ZVFHMIN-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
7515; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
7516; ZVFHMIN-NEXT:    vfmadd.vv v16, v24, v8, v0.t
7517; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
7518; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v16, v0.t
7519; ZVFHMIN-NEXT:    csrr a0, vlenb
7520; ZVFHMIN-NEXT:    slli a0, a0, 3
7521; ZVFHMIN-NEXT:    add sp, sp, a0
7522; ZVFHMIN-NEXT:    .cfi_def_cfa sp, 16
7523; ZVFHMIN-NEXT:    addi sp, sp, 16
7524; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 0
7525; ZVFHMIN-NEXT:    ret
7526  %negb = call <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half> %b, <vscale x 16 x i1> %m, i32 %evl)
7527  %negc = call <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half> %c, <vscale x 16 x i1> %m, i32 %evl)
7528  %v = call <vscale x 16 x half> @llvm.vp.fma.nxv16f16(<vscale x 16 x half> %negb, <vscale x 16 x half> %va, <vscale x 16 x half> %negc, <vscale x 16 x i1> %m, i32 %evl)
7529  ret <vscale x 16 x half> %v
7530}
7531
7532define <vscale x 16 x half> @vfnmadd_vv_nxv16f16_unmasked(<vscale x 16 x half> %va, <vscale x 16 x half> %b, <vscale x 16 x half> %c, i32 zeroext %evl) {
7533; ZVFH-LABEL: vfnmadd_vv_nxv16f16_unmasked:
7534; ZVFH:       # %bb.0:
7535; ZVFH-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
7536; ZVFH-NEXT:    vfnmadd.vv v8, v12, v16
7537; ZVFH-NEXT:    ret
7538;
7539; ZVFHMIN-LABEL: vfnmadd_vv_nxv16f16_unmasked:
7540; ZVFHMIN:       # %bb.0:
7541; ZVFHMIN-NEXT:    lui a1, 8
7542; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
7543; ZVFHMIN-NEXT:    vxor.vx v12, v12, a1
7544; ZVFHMIN-NEXT:    vxor.vx v16, v16, a1
7545; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v16
7546; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v12
7547; ZVFHMIN-NEXT:    vfwcvt.f.f.v v0, v8
7548; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
7549; ZVFHMIN-NEXT:    vfmadd.vv v0, v16, v24
7550; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
7551; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v0
7552; ZVFHMIN-NEXT:    ret
7553  %negb = call <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half> %b, <vscale x 16 x i1> splat (i1 true), i32 %evl)
7554  %negc = call <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half> %c, <vscale x 16 x i1> splat (i1 true), i32 %evl)
7555  %v = call <vscale x 16 x half> @llvm.vp.fma.nxv16f16(<vscale x 16 x half> %va, <vscale x 16 x half> %negb, <vscale x 16 x half> %negc, <vscale x 16 x i1> splat (i1 true), i32 %evl)
7556  ret <vscale x 16 x half> %v
7557}
7558
7559define <vscale x 16 x half> @vfnmadd_vv_nxv16f16_unmasked_commuted(<vscale x 16 x half> %va, <vscale x 16 x half> %b, <vscale x 16 x half> %c, i32 zeroext %evl) {
7560; ZVFH-LABEL: vfnmadd_vv_nxv16f16_unmasked_commuted:
7561; ZVFH:       # %bb.0:
7562; ZVFH-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
7563; ZVFH-NEXT:    vfnmadd.vv v8, v12, v16
7564; ZVFH-NEXT:    ret
7565;
7566; ZVFHMIN-LABEL: vfnmadd_vv_nxv16f16_unmasked_commuted:
7567; ZVFHMIN:       # %bb.0:
7568; ZVFHMIN-NEXT:    lui a1, 8
7569; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
7570; ZVFHMIN-NEXT:    vxor.vx v12, v12, a1
7571; ZVFHMIN-NEXT:    vxor.vx v16, v16, a1
7572; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v16
7573; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v12
7574; ZVFHMIN-NEXT:    vfwcvt.f.f.v v0, v8
7575; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
7576; ZVFHMIN-NEXT:    vfmadd.vv v0, v16, v24
7577; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
7578; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v0
7579; ZVFHMIN-NEXT:    ret
7580  %negb = call <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half> %b, <vscale x 16 x i1> splat (i1 true), i32 %evl)
7581  %negc = call <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half> %c, <vscale x 16 x i1> splat (i1 true), i32 %evl)
7582  %v = call <vscale x 16 x half> @llvm.vp.fma.nxv16f16(<vscale x 16 x half> %negb, <vscale x 16 x half> %va, <vscale x 16 x half> %negc, <vscale x 16 x i1> splat (i1 true), i32 %evl)
7583  ret <vscale x 16 x half> %v
7584}
7585
7586define <vscale x 16 x half> @vfnmadd_vf_nxv16f16(<vscale x 16 x half> %va, half %b, <vscale x 16 x half> %vc, <vscale x 16 x i1> %m, i32 zeroext %evl) {
7587; ZVFH-LABEL: vfnmadd_vf_nxv16f16:
7588; ZVFH:       # %bb.0:
7589; ZVFH-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
7590; ZVFH-NEXT:    vfnmadd.vf v8, fa0, v12, v0.t
7591; ZVFH-NEXT:    ret
7592;
7593; ZVFHMIN-LABEL: vfnmadd_vf_nxv16f16:
7594; ZVFHMIN:       # %bb.0:
7595; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
7596; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
7597; ZVFHMIN-NEXT:    vmv.v.x v4, a1
7598; ZVFHMIN-NEXT:    lui a0, 8
7599; ZVFHMIN-NEXT:    vxor.vx v20, v8, a0, v0.t
7600; ZVFHMIN-NEXT:    vxor.vx v24, v12, a0, v0.t
7601; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v24, v0.t
7602; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v20, v0.t
7603; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v4, v0.t
7604; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
7605; ZVFHMIN-NEXT:    vfmadd.vv v16, v24, v8, v0.t
7606; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
7607; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v16, v0.t
7608; ZVFHMIN-NEXT:    ret
7609  %elt.head = insertelement <vscale x 16 x half> poison, half %b, i32 0
7610  %vb = shufflevector <vscale x 16 x half> %elt.head, <vscale x 16 x half> poison, <vscale x 16 x i32> zeroinitializer
7611  %negva = call <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half> %va, <vscale x 16 x i1> %m, i32 %evl)
7612  %negvc = call <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half> %vc, <vscale x 16 x i1> %m, i32 %evl)
7613  %v = call <vscale x 16 x half> @llvm.vp.fma.nxv16f16(<vscale x 16 x half> %negva, <vscale x 16 x half> %vb, <vscale x 16 x half> %negvc, <vscale x 16 x i1> %m, i32 %evl)
7614  ret <vscale x 16 x half> %v
7615}
7616
7617define <vscale x 16 x half> @vfnmadd_vf_nxv16f16_commute(<vscale x 16 x half> %va, half %b, <vscale x 16 x half> %vc, <vscale x 16 x i1> %m, i32 zeroext %evl) {
7618; ZVFH-LABEL: vfnmadd_vf_nxv16f16_commute:
7619; ZVFH:       # %bb.0:
7620; ZVFH-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
7621; ZVFH-NEXT:    vfnmadd.vf v8, fa0, v12, v0.t
7622; ZVFH-NEXT:    ret
7623;
7624; ZVFHMIN-LABEL: vfnmadd_vf_nxv16f16_commute:
7625; ZVFHMIN:       # %bb.0:
7626; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
7627; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
7628; ZVFHMIN-NEXT:    vmv.v.x v4, a1
7629; ZVFHMIN-NEXT:    lui a0, 8
7630; ZVFHMIN-NEXT:    vxor.vx v28, v8, a0, v0.t
7631; ZVFHMIN-NEXT:    vxor.vx v16, v12, a0, v0.t
7632; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v16, v0.t
7633; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v28, v0.t
7634; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v4, v0.t
7635; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
7636; ZVFHMIN-NEXT:    vfmadd.vv v16, v24, v8, v0.t
7637; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
7638; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v16, v0.t
7639; ZVFHMIN-NEXT:    ret
7640  %elt.head = insertelement <vscale x 16 x half> poison, half %b, i32 0
7641  %vb = shufflevector <vscale x 16 x half> %elt.head, <vscale x 16 x half> poison, <vscale x 16 x i32> zeroinitializer
7642  %negva = call <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half> %va, <vscale x 16 x i1> %m, i32 %evl)
7643  %negvc = call <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half> %vc, <vscale x 16 x i1> %m, i32 %evl)
7644  %v = call <vscale x 16 x half> @llvm.vp.fma.nxv16f16(<vscale x 16 x half> %vb, <vscale x 16 x half> %negva, <vscale x 16 x half> %negvc, <vscale x 16 x i1> %m, i32 %evl)
7645  ret <vscale x 16 x half> %v
7646}
7647
7648define <vscale x 16 x half> @vfnmadd_vf_nxv16f16_unmasked(<vscale x 16 x half> %va, half %b, <vscale x 16 x half> %vc, i32 zeroext %evl) {
7649; ZVFH-LABEL: vfnmadd_vf_nxv16f16_unmasked:
7650; ZVFH:       # %bb.0:
7651; ZVFH-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
7652; ZVFH-NEXT:    vfnmadd.vf v8, fa0, v12
7653; ZVFH-NEXT:    ret
7654;
7655; ZVFHMIN-LABEL: vfnmadd_vf_nxv16f16_unmasked:
7656; ZVFHMIN:       # %bb.0:
7657; ZVFHMIN-NEXT:    addi sp, sp, -16
7658; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 16
7659; ZVFHMIN-NEXT:    csrr a1, vlenb
7660; ZVFHMIN-NEXT:    slli a1, a1, 2
7661; ZVFHMIN-NEXT:    sub sp, sp, a1
7662; ZVFHMIN-NEXT:    .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x04, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 4 * vlenb
7663; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
7664; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
7665; ZVFHMIN-NEXT:    vmv.v.x v16, a1
7666; ZVFHMIN-NEXT:    addi a0, sp, 16
7667; ZVFHMIN-NEXT:    vs4r.v v16, (a0) # Unknown-size Folded Spill
7668; ZVFHMIN-NEXT:    lui a0, 8
7669; ZVFHMIN-NEXT:    vxor.vx v8, v8, a0
7670; ZVFHMIN-NEXT:    vxor.vx v12, v12, a0
7671; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v12
7672; ZVFHMIN-NEXT:    vfwcvt.f.f.v v0, v8
7673; ZVFHMIN-NEXT:    addi a0, sp, 16
7674; ZVFHMIN-NEXT:    vl4r.v v8, (a0) # Unknown-size Folded Reload
7675; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v8
7676; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
7677; ZVFHMIN-NEXT:    vfmadd.vv v16, v0, v24
7678; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
7679; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v16
7680; ZVFHMIN-NEXT:    csrr a0, vlenb
7681; ZVFHMIN-NEXT:    slli a0, a0, 2
7682; ZVFHMIN-NEXT:    add sp, sp, a0
7683; ZVFHMIN-NEXT:    .cfi_def_cfa sp, 16
7684; ZVFHMIN-NEXT:    addi sp, sp, 16
7685; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 0
7686; ZVFHMIN-NEXT:    ret
7687  %elt.head = insertelement <vscale x 16 x half> poison, half %b, i32 0
7688  %vb = shufflevector <vscale x 16 x half> %elt.head, <vscale x 16 x half> poison, <vscale x 16 x i32> zeroinitializer
7689  %negva = call <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half> %va, <vscale x 16 x i1> splat (i1 true), i32 %evl)
7690  %negvc = call <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half> %vc, <vscale x 16 x i1> splat (i1 true), i32 %evl)
7691  %v = call <vscale x 16 x half> @llvm.vp.fma.nxv16f16(<vscale x 16 x half> %negva, <vscale x 16 x half> %vb, <vscale x 16 x half> %negvc, <vscale x 16 x i1> splat (i1 true), i32 %evl)
7692  ret <vscale x 16 x half> %v
7693}
7694
7695define <vscale x 16 x half> @vfnmadd_vf_nxv16f16_unmasked_commute(<vscale x 16 x half> %va, half %b, <vscale x 16 x half> %vc, i32 zeroext %evl) {
7696; ZVFH-LABEL: vfnmadd_vf_nxv16f16_unmasked_commute:
7697; ZVFH:       # %bb.0:
7698; ZVFH-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
7699; ZVFH-NEXT:    vfnmadd.vf v8, fa0, v12
7700; ZVFH-NEXT:    ret
7701;
7702; ZVFHMIN-LABEL: vfnmadd_vf_nxv16f16_unmasked_commute:
7703; ZVFHMIN:       # %bb.0:
7704; ZVFHMIN-NEXT:    addi sp, sp, -16
7705; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 16
7706; ZVFHMIN-NEXT:    csrr a1, vlenb
7707; ZVFHMIN-NEXT:    slli a1, a1, 2
7708; ZVFHMIN-NEXT:    sub sp, sp, a1
7709; ZVFHMIN-NEXT:    .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x04, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 4 * vlenb
7710; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
7711; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
7712; ZVFHMIN-NEXT:    vmv.v.x v16, a1
7713; ZVFHMIN-NEXT:    addi a0, sp, 16
7714; ZVFHMIN-NEXT:    vs4r.v v16, (a0) # Unknown-size Folded Spill
7715; ZVFHMIN-NEXT:    lui a0, 8
7716; ZVFHMIN-NEXT:    vxor.vx v8, v8, a0
7717; ZVFHMIN-NEXT:    vxor.vx v12, v12, a0
7718; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v12
7719; ZVFHMIN-NEXT:    vfwcvt.f.f.v v0, v8
7720; ZVFHMIN-NEXT:    addi a0, sp, 16
7721; ZVFHMIN-NEXT:    vl4r.v v8, (a0) # Unknown-size Folded Reload
7722; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v8
7723; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
7724; ZVFHMIN-NEXT:    vfmadd.vv v16, v0, v24
7725; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
7726; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v16
7727; ZVFHMIN-NEXT:    csrr a0, vlenb
7728; ZVFHMIN-NEXT:    slli a0, a0, 2
7729; ZVFHMIN-NEXT:    add sp, sp, a0
7730; ZVFHMIN-NEXT:    .cfi_def_cfa sp, 16
7731; ZVFHMIN-NEXT:    addi sp, sp, 16
7732; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 0
7733; ZVFHMIN-NEXT:    ret
7734  %elt.head = insertelement <vscale x 16 x half> poison, half %b, i32 0
7735  %vb = shufflevector <vscale x 16 x half> %elt.head, <vscale x 16 x half> poison, <vscale x 16 x i32> zeroinitializer
7736  %negva = call <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half> %va, <vscale x 16 x i1> splat (i1 true), i32 %evl)
7737  %negvc = call <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half> %vc, <vscale x 16 x i1> splat (i1 true), i32 %evl)
7738  %v = call <vscale x 16 x half> @llvm.vp.fma.nxv16f16(<vscale x 16 x half> %vb, <vscale x 16 x half> %negva, <vscale x 16 x half> %negvc, <vscale x 16 x i1> splat (i1 true), i32 %evl)
7739  ret <vscale x 16 x half> %v
7740}
7741
7742define <vscale x 16 x half> @vfnmadd_vf_nxv16f16_neg_splat(<vscale x 16 x half> %va, half %b, <vscale x 16 x half> %vc, <vscale x 16 x i1> %m, i32 zeroext %evl) {
7743; ZVFH-LABEL: vfnmadd_vf_nxv16f16_neg_splat:
7744; ZVFH:       # %bb.0:
7745; ZVFH-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
7746; ZVFH-NEXT:    vfnmadd.vf v8, fa0, v12, v0.t
7747; ZVFH-NEXT:    ret
7748;
7749; ZVFHMIN-LABEL: vfnmadd_vf_nxv16f16_neg_splat:
7750; ZVFHMIN:       # %bb.0:
7751; ZVFHMIN-NEXT:    addi sp, sp, -16
7752; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 16
7753; ZVFHMIN-NEXT:    csrr a1, vlenb
7754; ZVFHMIN-NEXT:    slli a1, a1, 2
7755; ZVFHMIN-NEXT:    sub sp, sp, a1
7756; ZVFHMIN-NEXT:    .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x04, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 4 * vlenb
7757; ZVFHMIN-NEXT:    addi a1, sp, 16
7758; ZVFHMIN-NEXT:    vs4r.v v8, (a1) # Unknown-size Folded Spill
7759; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
7760; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
7761; ZVFHMIN-NEXT:    vmv.v.x v16, a1
7762; ZVFHMIN-NEXT:    lui a0, 8
7763; ZVFHMIN-NEXT:    vxor.vx v4, v16, a0, v0.t
7764; ZVFHMIN-NEXT:    vxor.vx v12, v12, a0, v0.t
7765; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v12, v0.t
7766; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v4, v0.t
7767; ZVFHMIN-NEXT:    addi a0, sp, 16
7768; ZVFHMIN-NEXT:    vl4r.v v4, (a0) # Unknown-size Folded Reload
7769; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v4, v0.t
7770; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
7771; ZVFHMIN-NEXT:    vfmadd.vv v24, v8, v16, v0.t
7772; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
7773; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v24, v0.t
7774; ZVFHMIN-NEXT:    csrr a0, vlenb
7775; ZVFHMIN-NEXT:    slli a0, a0, 2
7776; ZVFHMIN-NEXT:    add sp, sp, a0
7777; ZVFHMIN-NEXT:    .cfi_def_cfa sp, 16
7778; ZVFHMIN-NEXT:    addi sp, sp, 16
7779; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 0
7780; ZVFHMIN-NEXT:    ret
7781  %elt.head = insertelement <vscale x 16 x half> poison, half %b, i32 0
7782  %vb = shufflevector <vscale x 16 x half> %elt.head, <vscale x 16 x half> poison, <vscale x 16 x i32> zeroinitializer
7783  %negvb = call <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half> %vb, <vscale x 16 x i1> %m, i32 %evl)
7784  %negvc = call <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half> %vc, <vscale x 16 x i1> %m, i32 %evl)
7785  %v = call <vscale x 16 x half> @llvm.vp.fma.nxv16f16(<vscale x 16 x half> %va, <vscale x 16 x half> %negvb, <vscale x 16 x half> %negvc, <vscale x 16 x i1> %m, i32 %evl)
7786  ret <vscale x 16 x half> %v
7787}
7788
7789define <vscale x 16 x half> @vfnmadd_vf_nxv16f16_neg_splat_commute(<vscale x 16 x half> %va, half %b, <vscale x 16 x half> %vc, <vscale x 16 x i1> %m, i32 zeroext %evl) {
7790; ZVFH-LABEL: vfnmadd_vf_nxv16f16_neg_splat_commute:
7791; ZVFH:       # %bb.0:
7792; ZVFH-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
7793; ZVFH-NEXT:    vfnmadd.vf v8, fa0, v12, v0.t
7794; ZVFH-NEXT:    ret
7795;
7796; ZVFHMIN-LABEL: vfnmadd_vf_nxv16f16_neg_splat_commute:
7797; ZVFHMIN:       # %bb.0:
7798; ZVFHMIN-NEXT:    addi sp, sp, -16
7799; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 16
7800; ZVFHMIN-NEXT:    csrr a1, vlenb
7801; ZVFHMIN-NEXT:    slli a1, a1, 2
7802; ZVFHMIN-NEXT:    sub sp, sp, a1
7803; ZVFHMIN-NEXT:    .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x04, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 4 * vlenb
7804; ZVFHMIN-NEXT:    addi a1, sp, 16
7805; ZVFHMIN-NEXT:    vs4r.v v8, (a1) # Unknown-size Folded Spill
7806; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
7807; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
7808; ZVFHMIN-NEXT:    vmv.v.x v16, a1
7809; ZVFHMIN-NEXT:    lui a0, 8
7810; ZVFHMIN-NEXT:    vxor.vx v4, v16, a0, v0.t
7811; ZVFHMIN-NEXT:    vxor.vx v12, v12, a0, v0.t
7812; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v12, v0.t
7813; ZVFHMIN-NEXT:    vmv8r.v v8, v16
7814; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v4, v0.t
7815; ZVFHMIN-NEXT:    addi a0, sp, 16
7816; ZVFHMIN-NEXT:    vl4r.v v4, (a0) # Unknown-size Folded Reload
7817; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v4, v0.t
7818; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
7819; ZVFHMIN-NEXT:    vfmadd.vv v16, v24, v8, v0.t
7820; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
7821; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v16, v0.t
7822; ZVFHMIN-NEXT:    csrr a0, vlenb
7823; ZVFHMIN-NEXT:    slli a0, a0, 2
7824; ZVFHMIN-NEXT:    add sp, sp, a0
7825; ZVFHMIN-NEXT:    .cfi_def_cfa sp, 16
7826; ZVFHMIN-NEXT:    addi sp, sp, 16
7827; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 0
7828; ZVFHMIN-NEXT:    ret
7829  %elt.head = insertelement <vscale x 16 x half> poison, half %b, i32 0
7830  %vb = shufflevector <vscale x 16 x half> %elt.head, <vscale x 16 x half> poison, <vscale x 16 x i32> zeroinitializer
7831  %negvb = call <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half> %vb, <vscale x 16 x i1> %m, i32 %evl)
7832  %negvc = call <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half> %vc, <vscale x 16 x i1> %m, i32 %evl)
7833  %v = call <vscale x 16 x half> @llvm.vp.fma.nxv16f16(<vscale x 16 x half> %negvb, <vscale x 16 x half> %va, <vscale x 16 x half> %negvc, <vscale x 16 x i1> %m, i32 %evl)
7834  ret <vscale x 16 x half> %v
7835}
7836
7837define <vscale x 16 x half> @vfnmadd_vf_nxv16f16_neg_splat_unmasked(<vscale x 16 x half> %va, half %b, <vscale x 16 x half> %vc, i32 zeroext %evl) {
7838; ZVFH-LABEL: vfnmadd_vf_nxv16f16_neg_splat_unmasked:
7839; ZVFH:       # %bb.0:
7840; ZVFH-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
7841; ZVFH-NEXT:    vfnmadd.vf v8, fa0, v12
7842; ZVFH-NEXT:    ret
7843;
7844; ZVFHMIN-LABEL: vfnmadd_vf_nxv16f16_neg_splat_unmasked:
7845; ZVFHMIN:       # %bb.0:
7846; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
7847; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
7848; ZVFHMIN-NEXT:    vmv.v.x v16, a1
7849; ZVFHMIN-NEXT:    lui a0, 8
7850; ZVFHMIN-NEXT:    vxor.vx v12, v12, a0
7851; ZVFHMIN-NEXT:    vxor.vx v16, v16, a0
7852; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v12
7853; ZVFHMIN-NEXT:    vfwcvt.f.f.v v0, v16
7854; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v8
7855; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
7856; ZVFHMIN-NEXT:    vfmadd.vv v16, v0, v24
7857; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
7858; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v16
7859; ZVFHMIN-NEXT:    ret
7860  %elt.head = insertelement <vscale x 16 x half> poison, half %b, i32 0
7861  %vb = shufflevector <vscale x 16 x half> %elt.head, <vscale x 16 x half> poison, <vscale x 16 x i32> zeroinitializer
7862  %negvb = call <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half> %vb, <vscale x 16 x i1> splat (i1 true), i32 %evl)
7863  %negvc = call <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half> %vc, <vscale x 16 x i1> splat (i1 true), i32 %evl)
7864  %v = call <vscale x 16 x half> @llvm.vp.fma.nxv16f16(<vscale x 16 x half> %va, <vscale x 16 x half> %negvb, <vscale x 16 x half> %negvc, <vscale x 16 x i1> splat (i1 true), i32 %evl)
7865  ret <vscale x 16 x half> %v
7866}
7867
7868define <vscale x 16 x half> @vfnmadd_vf_nxv16f16_neg_splat_unmasked_commute(<vscale x 16 x half> %va, half %b, <vscale x 16 x half> %vc, i32 zeroext %evl) {
7869; ZVFH-LABEL: vfnmadd_vf_nxv16f16_neg_splat_unmasked_commute:
7870; ZVFH:       # %bb.0:
7871; ZVFH-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
7872; ZVFH-NEXT:    vfnmadd.vf v8, fa0, v12
7873; ZVFH-NEXT:    ret
7874;
7875; ZVFHMIN-LABEL: vfnmadd_vf_nxv16f16_neg_splat_unmasked_commute:
7876; ZVFHMIN:       # %bb.0:
7877; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
7878; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
7879; ZVFHMIN-NEXT:    vmv.v.x v16, a1
7880; ZVFHMIN-NEXT:    lui a0, 8
7881; ZVFHMIN-NEXT:    vxor.vx v12, v12, a0
7882; ZVFHMIN-NEXT:    vxor.vx v16, v16, a0
7883; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v12
7884; ZVFHMIN-NEXT:    vfwcvt.f.f.v v0, v16
7885; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v8
7886; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
7887; ZVFHMIN-NEXT:    vfmadd.vv v16, v0, v24
7888; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
7889; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v16
7890; ZVFHMIN-NEXT:    ret
7891  %elt.head = insertelement <vscale x 16 x half> poison, half %b, i32 0
7892  %vb = shufflevector <vscale x 16 x half> %elt.head, <vscale x 16 x half> poison, <vscale x 16 x i32> zeroinitializer
7893  %negvb = call <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half> %vb, <vscale x 16 x i1> splat (i1 true), i32 %evl)
7894  %negvc = call <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half> %vc, <vscale x 16 x i1> splat (i1 true), i32 %evl)
7895  %v = call <vscale x 16 x half> @llvm.vp.fma.nxv16f16(<vscale x 16 x half> %negvb, <vscale x 16 x half> %va, <vscale x 16 x half> %negvc, <vscale x 16 x i1> splat (i1 true), i32 %evl)
7896  ret <vscale x 16 x half> %v
7897}
7898
7899define <vscale x 16 x half> @vfnmsub_vv_nxv16f16(<vscale x 16 x half> %va, <vscale x 16 x half> %b, <vscale x 16 x half> %c, <vscale x 16 x i1> %m, i32 zeroext %evl) {
7900; ZVFH-LABEL: vfnmsub_vv_nxv16f16:
7901; ZVFH:       # %bb.0:
7902; ZVFH-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
7903; ZVFH-NEXT:    vfnmadd.vv v12, v8, v16, v0.t
7904; ZVFH-NEXT:    vmv.v.v v8, v12
7905; ZVFH-NEXT:    ret
7906;
7907; ZVFHMIN-LABEL: vfnmsub_vv_nxv16f16:
7908; ZVFHMIN:       # %bb.0:
7909; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
7910; ZVFHMIN-NEXT:    vmv4r.v v4, v8
7911; ZVFHMIN-NEXT:    lui a0, 8
7912; ZVFHMIN-NEXT:    vxor.vx v12, v12, a0, v0.t
7913; ZVFHMIN-NEXT:    vxor.vx v24, v16, a0, v0.t
7914; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v24, v0.t
7915; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v12, v0.t
7916; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v4, v0.t
7917; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
7918; ZVFHMIN-NEXT:    vfmadd.vv v24, v8, v16, v0.t
7919; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
7920; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v24, v0.t
7921; ZVFHMIN-NEXT:    ret
7922  %negb = call <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half> %b, <vscale x 16 x i1> %m, i32 %evl)
7923  %negc = call <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half> %c, <vscale x 16 x i1> %m, i32 %evl)
7924  %v = call <vscale x 16 x half> @llvm.vp.fma.nxv16f16(<vscale x 16 x half> %va, <vscale x 16 x half> %negb, <vscale x 16 x half> %negc, <vscale x 16 x i1> %m, i32 %evl)
7925  ret <vscale x 16 x half> %v
7926}
7927
7928define <vscale x 16 x half> @vfnmsub_vv_nxv16f16_commuted(<vscale x 16 x half> %va, <vscale x 16 x half> %b, <vscale x 16 x half> %c, <vscale x 16 x i1> %m, i32 zeroext %evl) {
7929; ZVFH-LABEL: vfnmsub_vv_nxv16f16_commuted:
7930; ZVFH:       # %bb.0:
7931; ZVFH-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
7932; ZVFH-NEXT:    vfnmadd.vv v8, v12, v16, v0.t
7933; ZVFH-NEXT:    ret
7934;
7935; ZVFHMIN-LABEL: vfnmsub_vv_nxv16f16_commuted:
7936; ZVFHMIN:       # %bb.0:
7937; ZVFHMIN-NEXT:    addi sp, sp, -16
7938; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 16
7939; ZVFHMIN-NEXT:    csrr a1, vlenb
7940; ZVFHMIN-NEXT:    slli a1, a1, 3
7941; ZVFHMIN-NEXT:    sub sp, sp, a1
7942; ZVFHMIN-NEXT:    .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x08, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 8 * vlenb
7943; ZVFHMIN-NEXT:    lui a1, 8
7944; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
7945; ZVFHMIN-NEXT:    vxor.vx v12, v12, a1, v0.t
7946; ZVFHMIN-NEXT:    vxor.vx v24, v16, a1, v0.t
7947; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v24, v0.t
7948; ZVFHMIN-NEXT:    addi a0, sp, 16
7949; ZVFHMIN-NEXT:    vs8r.v v16, (a0) # Unknown-size Folded Spill
7950; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v12, v0.t
7951; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v8, v0.t
7952; ZVFHMIN-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
7953; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
7954; ZVFHMIN-NEXT:    vfmadd.vv v16, v24, v8, v0.t
7955; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
7956; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v16, v0.t
7957; ZVFHMIN-NEXT:    csrr a0, vlenb
7958; ZVFHMIN-NEXT:    slli a0, a0, 3
7959; ZVFHMIN-NEXT:    add sp, sp, a0
7960; ZVFHMIN-NEXT:    .cfi_def_cfa sp, 16
7961; ZVFHMIN-NEXT:    addi sp, sp, 16
7962; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 0
7963; ZVFHMIN-NEXT:    ret
7964  %negb = call <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half> %b, <vscale x 16 x i1> %m, i32 %evl)
7965  %negc = call <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half> %c, <vscale x 16 x i1> %m, i32 %evl)
7966  %v = call <vscale x 16 x half> @llvm.vp.fma.nxv16f16(<vscale x 16 x half> %negb, <vscale x 16 x half> %va, <vscale x 16 x half> %negc, <vscale x 16 x i1> %m, i32 %evl)
7967  ret <vscale x 16 x half> %v
7968}
7969
7970define <vscale x 16 x half> @vfnmsub_vv_nxv16f16_unmasked(<vscale x 16 x half> %va, <vscale x 16 x half> %b, <vscale x 16 x half> %c, i32 zeroext %evl) {
7971; ZVFH-LABEL: vfnmsub_vv_nxv16f16_unmasked:
7972; ZVFH:       # %bb.0:
7973; ZVFH-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
7974; ZVFH-NEXT:    vfnmadd.vv v8, v12, v16
7975; ZVFH-NEXT:    ret
7976;
7977; ZVFHMIN-LABEL: vfnmsub_vv_nxv16f16_unmasked:
7978; ZVFHMIN:       # %bb.0:
7979; ZVFHMIN-NEXT:    lui a1, 8
7980; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
7981; ZVFHMIN-NEXT:    vxor.vx v12, v12, a1
7982; ZVFHMIN-NEXT:    vxor.vx v16, v16, a1
7983; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v16
7984; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v12
7985; ZVFHMIN-NEXT:    vfwcvt.f.f.v v0, v8
7986; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
7987; ZVFHMIN-NEXT:    vfmadd.vv v0, v16, v24
7988; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
7989; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v0
7990; ZVFHMIN-NEXT:    ret
7991  %negb = call <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half> %b, <vscale x 16 x i1> splat (i1 true), i32 %evl)
7992  %negc = call <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half> %c, <vscale x 16 x i1> splat (i1 true), i32 %evl)
7993  %v = call <vscale x 16 x half> @llvm.vp.fma.nxv16f16(<vscale x 16 x half> %va, <vscale x 16 x half> %negb, <vscale x 16 x half> %negc, <vscale x 16 x i1> splat (i1 true), i32 %evl)
7994  ret <vscale x 16 x half> %v
7995}
7996
7997define <vscale x 16 x half> @vfnmsub_vv_nxv16f16_unmasked_commuted(<vscale x 16 x half> %va, <vscale x 16 x half> %b, <vscale x 16 x half> %c, i32 zeroext %evl) {
7998; ZVFH-LABEL: vfnmsub_vv_nxv16f16_unmasked_commuted:
7999; ZVFH:       # %bb.0:
8000; ZVFH-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
8001; ZVFH-NEXT:    vfnmadd.vv v8, v12, v16
8002; ZVFH-NEXT:    ret
8003;
8004; ZVFHMIN-LABEL: vfnmsub_vv_nxv16f16_unmasked_commuted:
8005; ZVFHMIN:       # %bb.0:
8006; ZVFHMIN-NEXT:    lui a1, 8
8007; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
8008; ZVFHMIN-NEXT:    vxor.vx v12, v12, a1
8009; ZVFHMIN-NEXT:    vxor.vx v16, v16, a1
8010; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v16
8011; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v12
8012; ZVFHMIN-NEXT:    vfwcvt.f.f.v v0, v8
8013; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
8014; ZVFHMIN-NEXT:    vfmadd.vv v0, v16, v24
8015; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
8016; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v0
8017; ZVFHMIN-NEXT:    ret
8018  %negb = call <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half> %b, <vscale x 16 x i1> splat (i1 true), i32 %evl)
8019  %negc = call <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half> %c, <vscale x 16 x i1> splat (i1 true), i32 %evl)
8020  %v = call <vscale x 16 x half> @llvm.vp.fma.nxv16f16(<vscale x 16 x half> %negb, <vscale x 16 x half> %va, <vscale x 16 x half> %negc, <vscale x 16 x i1> splat (i1 true), i32 %evl)
8021  ret <vscale x 16 x half> %v
8022}
8023
8024define <vscale x 16 x half> @vfnmsub_vf_nxv16f16(<vscale x 16 x half> %va, half %b, <vscale x 16 x half> %vc, <vscale x 16 x i1> %m, i32 zeroext %evl) {
8025; ZVFH-LABEL: vfnmsub_vf_nxv16f16:
8026; ZVFH:       # %bb.0:
8027; ZVFH-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
8028; ZVFH-NEXT:    vfnmsub.vf v8, fa0, v12, v0.t
8029; ZVFH-NEXT:    ret
8030;
8031; ZVFHMIN-LABEL: vfnmsub_vf_nxv16f16:
8032; ZVFHMIN:       # %bb.0:
8033; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
8034; ZVFHMIN-NEXT:    vmv4r.v v16, v12
8035; ZVFHMIN-NEXT:    fmv.x.h a0, fa0
8036; ZVFHMIN-NEXT:    vmv.v.x v4, a0
8037; ZVFHMIN-NEXT:    lui a0, 8
8038; ZVFHMIN-NEXT:    vxor.vx v8, v8, a0, v0.t
8039; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v8, v0.t
8040; ZVFHMIN-NEXT:    vmv8r.v v8, v24
8041; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v16, v0.t
8042; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v4, v0.t
8043; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
8044; ZVFHMIN-NEXT:    vfmadd.vv v16, v8, v24, v0.t
8045; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
8046; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v16, v0.t
8047; ZVFHMIN-NEXT:    ret
8048  %elt.head = insertelement <vscale x 16 x half> poison, half %b, i32 0
8049  %vb = shufflevector <vscale x 16 x half> %elt.head, <vscale x 16 x half> poison, <vscale x 16 x i32> zeroinitializer
8050  %negva = call <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half> %va, <vscale x 16 x i1> %m, i32 %evl)
8051  %v = call <vscale x 16 x half> @llvm.vp.fma.nxv16f16(<vscale x 16 x half> %negva, <vscale x 16 x half> %vb, <vscale x 16 x half> %vc, <vscale x 16 x i1> %m, i32 %evl)
8052  ret <vscale x 16 x half> %v
8053}
8054
8055define <vscale x 16 x half> @vfnmsub_vf_nxv16f16_commute(<vscale x 16 x half> %va, half %b, <vscale x 16 x half> %vc, <vscale x 16 x i1> %m, i32 zeroext %evl) {
8056; ZVFH-LABEL: vfnmsub_vf_nxv16f16_commute:
8057; ZVFH:       # %bb.0:
8058; ZVFH-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
8059; ZVFH-NEXT:    vfnmsub.vf v8, fa0, v12, v0.t
8060; ZVFH-NEXT:    ret
8061;
8062; ZVFHMIN-LABEL: vfnmsub_vf_nxv16f16_commute:
8063; ZVFHMIN:       # %bb.0:
8064; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
8065; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
8066; ZVFHMIN-NEXT:    vmv.v.x v4, a1
8067; ZVFHMIN-NEXT:    lui a0, 8
8068; ZVFHMIN-NEXT:    vxor.vx v8, v8, a0, v0.t
8069; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v8, v0.t
8070; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v12, v0.t
8071; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v4, v0.t
8072; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
8073; ZVFHMIN-NEXT:    vfmadd.vv v16, v8, v24, v0.t
8074; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
8075; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v16, v0.t
8076; ZVFHMIN-NEXT:    ret
8077  %elt.head = insertelement <vscale x 16 x half> poison, half %b, i32 0
8078  %vb = shufflevector <vscale x 16 x half> %elt.head, <vscale x 16 x half> poison, <vscale x 16 x i32> zeroinitializer
8079  %negva = call <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half> %va, <vscale x 16 x i1> %m, i32 %evl)
8080  %v = call <vscale x 16 x half> @llvm.vp.fma.nxv16f16(<vscale x 16 x half> %vb, <vscale x 16 x half> %negva, <vscale x 16 x half> %vc, <vscale x 16 x i1> %m, i32 %evl)
8081  ret <vscale x 16 x half> %v
8082}
8083
8084define <vscale x 16 x half> @vfnmsub_vf_nxv16f16_unmasked(<vscale x 16 x half> %va, half %b, <vscale x 16 x half> %vc, i32 zeroext %evl) {
8085; ZVFH-LABEL: vfnmsub_vf_nxv16f16_unmasked:
8086; ZVFH:       # %bb.0:
8087; ZVFH-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
8088; ZVFH-NEXT:    vfnmsub.vf v8, fa0, v12
8089; ZVFH-NEXT:    ret
8090;
8091; ZVFHMIN-LABEL: vfnmsub_vf_nxv16f16_unmasked:
8092; ZVFHMIN:       # %bb.0:
8093; ZVFHMIN-NEXT:    addi sp, sp, -16
8094; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 16
8095; ZVFHMIN-NEXT:    csrr a1, vlenb
8096; ZVFHMIN-NEXT:    slli a1, a1, 2
8097; ZVFHMIN-NEXT:    sub sp, sp, a1
8098; ZVFHMIN-NEXT:    .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x04, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 4 * vlenb
8099; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
8100; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
8101; ZVFHMIN-NEXT:    vmv.v.x v16, a1
8102; ZVFHMIN-NEXT:    addi a0, sp, 16
8103; ZVFHMIN-NEXT:    vs4r.v v16, (a0) # Unknown-size Folded Spill
8104; ZVFHMIN-NEXT:    lui a0, 8
8105; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v12
8106; ZVFHMIN-NEXT:    vxor.vx v8, v8, a0
8107; ZVFHMIN-NEXT:    vfwcvt.f.f.v v0, v8
8108; ZVFHMIN-NEXT:    addi a0, sp, 16
8109; ZVFHMIN-NEXT:    vl4r.v v8, (a0) # Unknown-size Folded Reload
8110; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v8
8111; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
8112; ZVFHMIN-NEXT:    vfmadd.vv v16, v0, v24
8113; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
8114; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v16
8115; ZVFHMIN-NEXT:    csrr a0, vlenb
8116; ZVFHMIN-NEXT:    slli a0, a0, 2
8117; ZVFHMIN-NEXT:    add sp, sp, a0
8118; ZVFHMIN-NEXT:    .cfi_def_cfa sp, 16
8119; ZVFHMIN-NEXT:    addi sp, sp, 16
8120; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 0
8121; ZVFHMIN-NEXT:    ret
8122  %elt.head = insertelement <vscale x 16 x half> poison, half %b, i32 0
8123  %vb = shufflevector <vscale x 16 x half> %elt.head, <vscale x 16 x half> poison, <vscale x 16 x i32> zeroinitializer
8124  %negva = call <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half> %va, <vscale x 16 x i1> splat (i1 true), i32 %evl)
8125  %v = call <vscale x 16 x half> @llvm.vp.fma.nxv16f16(<vscale x 16 x half> %negva, <vscale x 16 x half> %vb, <vscale x 16 x half> %vc, <vscale x 16 x i1> splat (i1 true), i32 %evl)
8126  ret <vscale x 16 x half> %v
8127}
8128
8129define <vscale x 16 x half> @vfnmsub_vf_nxv16f16_unmasked_commute(<vscale x 16 x half> %va, half %b, <vscale x 16 x half> %vc, i32 zeroext %evl) {
8130; ZVFH-LABEL: vfnmsub_vf_nxv16f16_unmasked_commute:
8131; ZVFH:       # %bb.0:
8132; ZVFH-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
8133; ZVFH-NEXT:    vfnmsub.vf v8, fa0, v12
8134; ZVFH-NEXT:    ret
8135;
8136; ZVFHMIN-LABEL: vfnmsub_vf_nxv16f16_unmasked_commute:
8137; ZVFHMIN:       # %bb.0:
8138; ZVFHMIN-NEXT:    addi sp, sp, -16
8139; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 16
8140; ZVFHMIN-NEXT:    csrr a1, vlenb
8141; ZVFHMIN-NEXT:    slli a1, a1, 2
8142; ZVFHMIN-NEXT:    sub sp, sp, a1
8143; ZVFHMIN-NEXT:    .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x04, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 4 * vlenb
8144; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
8145; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
8146; ZVFHMIN-NEXT:    vmv.v.x v16, a1
8147; ZVFHMIN-NEXT:    addi a0, sp, 16
8148; ZVFHMIN-NEXT:    vs4r.v v16, (a0) # Unknown-size Folded Spill
8149; ZVFHMIN-NEXT:    lui a0, 8
8150; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v12
8151; ZVFHMIN-NEXT:    vxor.vx v8, v8, a0
8152; ZVFHMIN-NEXT:    vfwcvt.f.f.v v0, v8
8153; ZVFHMIN-NEXT:    addi a0, sp, 16
8154; ZVFHMIN-NEXT:    vl4r.v v8, (a0) # Unknown-size Folded Reload
8155; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v8
8156; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
8157; ZVFHMIN-NEXT:    vfmadd.vv v16, v0, v24
8158; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
8159; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v16
8160; ZVFHMIN-NEXT:    csrr a0, vlenb
8161; ZVFHMIN-NEXT:    slli a0, a0, 2
8162; ZVFHMIN-NEXT:    add sp, sp, a0
8163; ZVFHMIN-NEXT:    .cfi_def_cfa sp, 16
8164; ZVFHMIN-NEXT:    addi sp, sp, 16
8165; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 0
8166; ZVFHMIN-NEXT:    ret
8167  %elt.head = insertelement <vscale x 16 x half> poison, half %b, i32 0
8168  %vb = shufflevector <vscale x 16 x half> %elt.head, <vscale x 16 x half> poison, <vscale x 16 x i32> zeroinitializer
8169  %negva = call <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half> %va, <vscale x 16 x i1> splat (i1 true), i32 %evl)
8170  %v = call <vscale x 16 x half> @llvm.vp.fma.nxv16f16(<vscale x 16 x half> %vb, <vscale x 16 x half> %negva, <vscale x 16 x half> %vc, <vscale x 16 x i1> splat (i1 true), i32 %evl)
8171  ret <vscale x 16 x half> %v
8172}
8173
8174define <vscale x 16 x half> @vfnmsub_vf_nxv16f16_neg_splat(<vscale x 16 x half> %va, half %b, <vscale x 16 x half> %vc, <vscale x 16 x i1> %m, i32 zeroext %evl) {
8175; ZVFH-LABEL: vfnmsub_vf_nxv16f16_neg_splat:
8176; ZVFH:       # %bb.0:
8177; ZVFH-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
8178; ZVFH-NEXT:    vfnmsub.vf v8, fa0, v12, v0.t
8179; ZVFH-NEXT:    ret
8180;
8181; ZVFHMIN-LABEL: vfnmsub_vf_nxv16f16_neg_splat:
8182; ZVFHMIN:       # %bb.0:
8183; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
8184; ZVFHMIN-NEXT:    vmv4r.v v4, v8
8185; ZVFHMIN-NEXT:    fmv.x.h a0, fa0
8186; ZVFHMIN-NEXT:    vmv.v.x v16, a0
8187; ZVFHMIN-NEXT:    lui a0, 8
8188; ZVFHMIN-NEXT:    vxor.vx v24, v16, a0, v0.t
8189; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v24, v0.t
8190; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v12, v0.t
8191; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v4, v0.t
8192; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
8193; ZVFHMIN-NEXT:    vfmadd.vv v16, v8, v24, v0.t
8194; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
8195; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v16, v0.t
8196; ZVFHMIN-NEXT:    ret
8197  %elt.head = insertelement <vscale x 16 x half> poison, half %b, i32 0
8198  %vb = shufflevector <vscale x 16 x half> %elt.head, <vscale x 16 x half> poison, <vscale x 16 x i32> zeroinitializer
8199  %negvb = call <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half> %vb, <vscale x 16 x i1> %m, i32 %evl)
8200  %v = call <vscale x 16 x half> @llvm.vp.fma.nxv16f16(<vscale x 16 x half> %va, <vscale x 16 x half> %negvb, <vscale x 16 x half> %vc, <vscale x 16 x i1> %m, i32 %evl)
8201  ret <vscale x 16 x half> %v
8202}
8203
8204define <vscale x 16 x half> @vfnmsub_vf_nxv16f16_neg_splat_commute(<vscale x 16 x half> %va, half %b, <vscale x 16 x half> %vc, <vscale x 16 x i1> %m, i32 zeroext %evl) {
8205; ZVFH-LABEL: vfnmsub_vf_nxv16f16_neg_splat_commute:
8206; ZVFH:       # %bb.0:
8207; ZVFH-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
8208; ZVFH-NEXT:    vfnmsub.vf v8, fa0, v12, v0.t
8209; ZVFH-NEXT:    ret
8210;
8211; ZVFHMIN-LABEL: vfnmsub_vf_nxv16f16_neg_splat_commute:
8212; ZVFHMIN:       # %bb.0:
8213; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
8214; ZVFHMIN-NEXT:    vmv4r.v v20, v12
8215; ZVFHMIN-NEXT:    vmv4r.v v4, v8
8216; ZVFHMIN-NEXT:    fmv.x.h a0, fa0
8217; ZVFHMIN-NEXT:    vmv.v.x v16, a0
8218; ZVFHMIN-NEXT:    lui a0, 8
8219; ZVFHMIN-NEXT:    vxor.vx v24, v16, a0, v0.t
8220; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v24, v0.t
8221; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v20, v0.t
8222; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v4, v0.t
8223; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
8224; ZVFHMIN-NEXT:    vfmadd.vv v16, v8, v24, v0.t
8225; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
8226; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v16, v0.t
8227; ZVFHMIN-NEXT:    ret
8228  %elt.head = insertelement <vscale x 16 x half> poison, half %b, i32 0
8229  %vb = shufflevector <vscale x 16 x half> %elt.head, <vscale x 16 x half> poison, <vscale x 16 x i32> zeroinitializer
8230  %negvb = call <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half> %vb, <vscale x 16 x i1> %m, i32 %evl)
8231  %v = call <vscale x 16 x half> @llvm.vp.fma.nxv16f16(<vscale x 16 x half> %negvb, <vscale x 16 x half> %va, <vscale x 16 x half> %vc, <vscale x 16 x i1> %m, i32 %evl)
8232  ret <vscale x 16 x half> %v
8233}
8234
8235define <vscale x 16 x half> @vfnmsub_vf_nxv16f16_neg_splat_unmasked(<vscale x 16 x half> %va, half %b, <vscale x 16 x half> %vc, i32 zeroext %evl) {
8236; ZVFH-LABEL: vfnmsub_vf_nxv16f16_neg_splat_unmasked:
8237; ZVFH:       # %bb.0:
8238; ZVFH-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
8239; ZVFH-NEXT:    vfnmsub.vf v8, fa0, v12
8240; ZVFH-NEXT:    ret
8241;
8242; ZVFHMIN-LABEL: vfnmsub_vf_nxv16f16_neg_splat_unmasked:
8243; ZVFHMIN:       # %bb.0:
8244; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
8245; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
8246; ZVFHMIN-NEXT:    vmv.v.x v16, a1
8247; ZVFHMIN-NEXT:    lui a0, 8
8248; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v12
8249; ZVFHMIN-NEXT:    vxor.vx v12, v16, a0
8250; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v12
8251; ZVFHMIN-NEXT:    vfwcvt.f.f.v v0, v8
8252; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
8253; ZVFHMIN-NEXT:    vfmadd.vv v0, v16, v24
8254; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
8255; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v0
8256; ZVFHMIN-NEXT:    ret
8257  %elt.head = insertelement <vscale x 16 x half> poison, half %b, i32 0
8258  %vb = shufflevector <vscale x 16 x half> %elt.head, <vscale x 16 x half> poison, <vscale x 16 x i32> zeroinitializer
8259  %negvb = call <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half> %vb, <vscale x 16 x i1> splat (i1 true), i32 %evl)
8260  %v = call <vscale x 16 x half> @llvm.vp.fma.nxv16f16(<vscale x 16 x half> %va, <vscale x 16 x half> %negvb, <vscale x 16 x half> %vc, <vscale x 16 x i1> splat (i1 true), i32 %evl)
8261  ret <vscale x 16 x half> %v
8262}
8263
8264define <vscale x 16 x half> @vfnmsub_vf_nxv16f16_neg_splat_unmasked_commute(<vscale x 16 x half> %va, half %b, <vscale x 16 x half> %vc, i32 zeroext %evl) {
8265; ZVFH-LABEL: vfnmsub_vf_nxv16f16_neg_splat_unmasked_commute:
8266; ZVFH:       # %bb.0:
8267; ZVFH-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
8268; ZVFH-NEXT:    vfnmsub.vf v8, fa0, v12
8269; ZVFH-NEXT:    ret
8270;
8271; ZVFHMIN-LABEL: vfnmsub_vf_nxv16f16_neg_splat_unmasked_commute:
8272; ZVFHMIN:       # %bb.0:
8273; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
8274; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
8275; ZVFHMIN-NEXT:    vmv.v.x v16, a1
8276; ZVFHMIN-NEXT:    lui a0, 8
8277; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v12
8278; ZVFHMIN-NEXT:    vxor.vx v12, v16, a0
8279; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v12
8280; ZVFHMIN-NEXT:    vfwcvt.f.f.v v0, v8
8281; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
8282; ZVFHMIN-NEXT:    vfmadd.vv v0, v16, v24
8283; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
8284; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v0
8285; ZVFHMIN-NEXT:    ret
8286  %elt.head = insertelement <vscale x 16 x half> poison, half %b, i32 0
8287  %vb = shufflevector <vscale x 16 x half> %elt.head, <vscale x 16 x half> poison, <vscale x 16 x i32> zeroinitializer
8288  %negvb = call <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half> %vb, <vscale x 16 x i1> splat (i1 true), i32 %evl)
8289  %v = call <vscale x 16 x half> @llvm.vp.fma.nxv16f16(<vscale x 16 x half> %negvb, <vscale x 16 x half> %va, <vscale x 16 x half> %vc, <vscale x 16 x i1> splat (i1 true), i32 %evl)
8290  ret <vscale x 16 x half> %v
8291}
8292
8293declare <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half>, <vscale x 32 x i1>, i32)
8294
8295define <vscale x 32 x half> @vfmsub_vv_nxv32f16(<vscale x 32 x half> %va, <vscale x 32 x half> %b, <vscale x 32 x half> %c, <vscale x 32 x i1> %m, i32 zeroext %evl) {
8296; ZVFH-LABEL: vfmsub_vv_nxv32f16:
8297; ZVFH:       # %bb.0:
8298; ZVFH-NEXT:    vl8re16.v v24, (a0)
8299; ZVFH-NEXT:    vsetvli zero, a1, e16, m8, ta, ma
8300; ZVFH-NEXT:    vfmsub.vv v16, v8, v24, v0.t
8301; ZVFH-NEXT:    vmv.v.v v8, v16
8302; ZVFH-NEXT:    ret
8303;
8304; ZVFHMIN-LABEL: vfmsub_vv_nxv32f16:
8305; ZVFHMIN:       # %bb.0:
8306; ZVFHMIN-NEXT:    addi sp, sp, -16
8307; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 16
8308; ZVFHMIN-NEXT:    csrr a2, vlenb
8309; ZVFHMIN-NEXT:    slli a2, a2, 4
8310; ZVFHMIN-NEXT:    mv a3, a2
8311; ZVFHMIN-NEXT:    slli a2, a2, 1
8312; ZVFHMIN-NEXT:    add a2, a2, a3
8313; ZVFHMIN-NEXT:    sub sp, sp, a2
8314; ZVFHMIN-NEXT:    .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x30, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 48 * vlenb
8315; ZVFHMIN-NEXT:    vsetvli a2, zero, e8, mf2, ta, ma
8316; ZVFHMIN-NEXT:    vmv1r.v v7, v0
8317; ZVFHMIN-NEXT:    csrr a2, vlenb
8318; ZVFHMIN-NEXT:    slli a2, a2, 3
8319; ZVFHMIN-NEXT:    mv a3, a2
8320; ZVFHMIN-NEXT:    slli a2, a2, 2
8321; ZVFHMIN-NEXT:    add a2, a2, a3
8322; ZVFHMIN-NEXT:    add a2, sp, a2
8323; ZVFHMIN-NEXT:    addi a2, a2, 16
8324; ZVFHMIN-NEXT:    vs8r.v v16, (a2) # Unknown-size Folded Spill
8325; ZVFHMIN-NEXT:    csrr a2, vlenb
8326; ZVFHMIN-NEXT:    slli a2, a2, 5
8327; ZVFHMIN-NEXT:    add a2, sp, a2
8328; ZVFHMIN-NEXT:    addi a2, a2, 16
8329; ZVFHMIN-NEXT:    vs8r.v v8, (a2) # Unknown-size Folded Spill
8330; ZVFHMIN-NEXT:    vl8re16.v v8, (a0)
8331; ZVFHMIN-NEXT:    lui a2, 8
8332; ZVFHMIN-NEXT:    csrr a3, vlenb
8333; ZVFHMIN-NEXT:    slli a0, a3, 1
8334; ZVFHMIN-NEXT:    srli a3, a3, 2
8335; ZVFHMIN-NEXT:    sub a4, a1, a0
8336; ZVFHMIN-NEXT:    vslidedown.vx v6, v0, a3
8337; ZVFHMIN-NEXT:    sltu a3, a1, a4
8338; ZVFHMIN-NEXT:    vsetvli zero, a1, e16, m8, ta, ma
8339; ZVFHMIN-NEXT:    vxor.vx v8, v8, a2, v0.t
8340; ZVFHMIN-NEXT:    addi a3, a3, -1
8341; ZVFHMIN-NEXT:    and a3, a3, a4
8342; ZVFHMIN-NEXT:    vmv1r.v v0, v6
8343; ZVFHMIN-NEXT:    csrr a2, vlenb
8344; ZVFHMIN-NEXT:    slli a2, a2, 3
8345; ZVFHMIN-NEXT:    mv a4, a2
8346; ZVFHMIN-NEXT:    slli a2, a2, 1
8347; ZVFHMIN-NEXT:    add a2, a2, a4
8348; ZVFHMIN-NEXT:    add a2, sp, a2
8349; ZVFHMIN-NEXT:    addi a2, a2, 16
8350; ZVFHMIN-NEXT:    vs8r.v v8, (a2) # Unknown-size Folded Spill
8351; ZVFHMIN-NEXT:    vsetvli zero, a3, e16, m4, ta, ma
8352; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v12, v0.t
8353; ZVFHMIN-NEXT:    csrr a2, vlenb
8354; ZVFHMIN-NEXT:    slli a2, a2, 4
8355; ZVFHMIN-NEXT:    add a2, sp, a2
8356; ZVFHMIN-NEXT:    addi a2, a2, 16
8357; ZVFHMIN-NEXT:    vs8r.v v16, (a2) # Unknown-size Folded Spill
8358; ZVFHMIN-NEXT:    csrr a2, vlenb
8359; ZVFHMIN-NEXT:    slli a2, a2, 5
8360; ZVFHMIN-NEXT:    add a2, sp, a2
8361; ZVFHMIN-NEXT:    addi a2, a2, 16
8362; ZVFHMIN-NEXT:    vl8r.v v16, (a2) # Unknown-size Folded Reload
8363; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v20, v0.t
8364; ZVFHMIN-NEXT:    csrr a2, vlenb
8365; ZVFHMIN-NEXT:    slli a2, a2, 3
8366; ZVFHMIN-NEXT:    add a2, sp, a2
8367; ZVFHMIN-NEXT:    addi a2, a2, 16
8368; ZVFHMIN-NEXT:    vs8r.v v8, (a2) # Unknown-size Folded Spill
8369; ZVFHMIN-NEXT:    csrr a2, vlenb
8370; ZVFHMIN-NEXT:    slli a2, a2, 3
8371; ZVFHMIN-NEXT:    mv a3, a2
8372; ZVFHMIN-NEXT:    slli a2, a2, 2
8373; ZVFHMIN-NEXT:    add a2, a2, a3
8374; ZVFHMIN-NEXT:    add a2, sp, a2
8375; ZVFHMIN-NEXT:    addi a2, a2, 16
8376; ZVFHMIN-NEXT:    vl8r.v v8, (a2) # Unknown-size Folded Reload
8377; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v12, v0.t
8378; ZVFHMIN-NEXT:    addi a2, sp, 16
8379; ZVFHMIN-NEXT:    vs8r.v v16, (a2) # Unknown-size Folded Spill
8380; ZVFHMIN-NEXT:    csrr a2, vlenb
8381; ZVFHMIN-NEXT:    slli a2, a2, 4
8382; ZVFHMIN-NEXT:    add a2, sp, a2
8383; ZVFHMIN-NEXT:    addi a2, a2, 16
8384; ZVFHMIN-NEXT:    vl8r.v v8, (a2) # Unknown-size Folded Reload
8385; ZVFHMIN-NEXT:    csrr a2, vlenb
8386; ZVFHMIN-NEXT:    slli a2, a2, 3
8387; ZVFHMIN-NEXT:    add a2, sp, a2
8388; ZVFHMIN-NEXT:    addi a2, a2, 16
8389; ZVFHMIN-NEXT:    vl8r.v v16, (a2) # Unknown-size Folded Reload
8390; ZVFHMIN-NEXT:    addi a2, sp, 16
8391; ZVFHMIN-NEXT:    vl8r.v v24, (a2) # Unknown-size Folded Reload
8392; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
8393; ZVFHMIN-NEXT:    vfmadd.vv v24, v16, v8, v0.t
8394; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
8395; ZVFHMIN-NEXT:    vfncvt.f.f.w v12, v24, v0.t
8396; ZVFHMIN-NEXT:    csrr a2, vlenb
8397; ZVFHMIN-NEXT:    slli a2, a2, 3
8398; ZVFHMIN-NEXT:    add a2, sp, a2
8399; ZVFHMIN-NEXT:    addi a2, a2, 16
8400; ZVFHMIN-NEXT:    vs8r.v v8, (a2) # Unknown-size Folded Spill
8401; ZVFHMIN-NEXT:    bltu a1, a0, .LBB280_2
8402; ZVFHMIN-NEXT:  # %bb.1:
8403; ZVFHMIN-NEXT:    mv a1, a0
8404; ZVFHMIN-NEXT:  .LBB280_2:
8405; ZVFHMIN-NEXT:    vmv1r.v v0, v7
8406; ZVFHMIN-NEXT:    csrr a0, vlenb
8407; ZVFHMIN-NEXT:    slli a0, a0, 3
8408; ZVFHMIN-NEXT:    mv a2, a0
8409; ZVFHMIN-NEXT:    slli a0, a0, 1
8410; ZVFHMIN-NEXT:    add a0, a0, a2
8411; ZVFHMIN-NEXT:    add a0, sp, a0
8412; ZVFHMIN-NEXT:    addi a0, a0, 16
8413; ZVFHMIN-NEXT:    vl8r.v v16, (a0) # Unknown-size Folded Reload
8414; ZVFHMIN-NEXT:    vsetvli zero, a1, e16, m4, ta, ma
8415; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v16, v0.t
8416; ZVFHMIN-NEXT:    csrr a0, vlenb
8417; ZVFHMIN-NEXT:    slli a0, a0, 4
8418; ZVFHMIN-NEXT:    add a0, sp, a0
8419; ZVFHMIN-NEXT:    addi a0, a0, 16
8420; ZVFHMIN-NEXT:    vs8r.v v24, (a0) # Unknown-size Folded Spill
8421; ZVFHMIN-NEXT:    csrr a0, vlenb
8422; ZVFHMIN-NEXT:    slli a0, a0, 5
8423; ZVFHMIN-NEXT:    add a0, sp, a0
8424; ZVFHMIN-NEXT:    addi a0, a0, 16
8425; ZVFHMIN-NEXT:    vl8r.v v16, (a0) # Unknown-size Folded Reload
8426; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v16, v0.t
8427; ZVFHMIN-NEXT:    csrr a0, vlenb
8428; ZVFHMIN-NEXT:    slli a0, a0, 3
8429; ZVFHMIN-NEXT:    mv a1, a0
8430; ZVFHMIN-NEXT:    slli a0, a0, 1
8431; ZVFHMIN-NEXT:    add a0, a0, a1
8432; ZVFHMIN-NEXT:    add a0, sp, a0
8433; ZVFHMIN-NEXT:    addi a0, a0, 16
8434; ZVFHMIN-NEXT:    vs8r.v v24, (a0) # Unknown-size Folded Spill
8435; ZVFHMIN-NEXT:    csrr a0, vlenb
8436; ZVFHMIN-NEXT:    slli a0, a0, 3
8437; ZVFHMIN-NEXT:    mv a1, a0
8438; ZVFHMIN-NEXT:    slli a0, a0, 2
8439; ZVFHMIN-NEXT:    add a0, a0, a1
8440; ZVFHMIN-NEXT:    add a0, sp, a0
8441; ZVFHMIN-NEXT:    addi a0, a0, 16
8442; ZVFHMIN-NEXT:    vl8r.v v16, (a0) # Unknown-size Folded Reload
8443; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v16, v0.t
8444; ZVFHMIN-NEXT:    csrr a0, vlenb
8445; ZVFHMIN-NEXT:    slli a0, a0, 4
8446; ZVFHMIN-NEXT:    add a0, sp, a0
8447; ZVFHMIN-NEXT:    addi a0, a0, 16
8448; ZVFHMIN-NEXT:    vl8r.v v16, (a0) # Unknown-size Folded Reload
8449; ZVFHMIN-NEXT:    csrr a0, vlenb
8450; ZVFHMIN-NEXT:    slli a0, a0, 3
8451; ZVFHMIN-NEXT:    mv a1, a0
8452; ZVFHMIN-NEXT:    slli a0, a0, 1
8453; ZVFHMIN-NEXT:    add a0, a0, a1
8454; ZVFHMIN-NEXT:    add a0, sp, a0
8455; ZVFHMIN-NEXT:    addi a0, a0, 16
8456; ZVFHMIN-NEXT:    vl8r.v v24, (a0) # Unknown-size Folded Reload
8457; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
8458; ZVFHMIN-NEXT:    vfmadd.vv v8, v24, v16, v0.t
8459; ZVFHMIN-NEXT:    vmv.v.v v16, v8
8460; ZVFHMIN-NEXT:    csrr a0, vlenb
8461; ZVFHMIN-NEXT:    slli a0, a0, 3
8462; ZVFHMIN-NEXT:    add a0, sp, a0
8463; ZVFHMIN-NEXT:    addi a0, a0, 16
8464; ZVFHMIN-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
8465; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
8466; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v16, v0.t
8467; ZVFHMIN-NEXT:    csrr a0, vlenb
8468; ZVFHMIN-NEXT:    slli a0, a0, 4
8469; ZVFHMIN-NEXT:    mv a1, a0
8470; ZVFHMIN-NEXT:    slli a0, a0, 1
8471; ZVFHMIN-NEXT:    add a0, a0, a1
8472; ZVFHMIN-NEXT:    add sp, sp, a0
8473; ZVFHMIN-NEXT:    .cfi_def_cfa sp, 16
8474; ZVFHMIN-NEXT:    addi sp, sp, 16
8475; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 0
8476; ZVFHMIN-NEXT:    ret
8477  %negc = call <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half> %c, <vscale x 32 x i1> %m, i32 %evl)
8478  %v = call <vscale x 32 x half> @llvm.vp.fma.nxv32f16(<vscale x 32 x half> %va, <vscale x 32 x half> %b, <vscale x 32 x half> %negc, <vscale x 32 x i1> %m, i32 %evl)
8479  ret <vscale x 32 x half> %v
8480}
8481
8482define <vscale x 32 x half> @vfmsub_vv_nxv32f16_unmasked(<vscale x 32 x half> %va, <vscale x 32 x half> %b, <vscale x 32 x half> %c, i32 zeroext %evl) {
8483; ZVFH-LABEL: vfmsub_vv_nxv32f16_unmasked:
8484; ZVFH:       # %bb.0:
8485; ZVFH-NEXT:    vl8re16.v v24, (a0)
8486; ZVFH-NEXT:    vsetvli zero, a1, e16, m8, ta, ma
8487; ZVFH-NEXT:    vfmsub.vv v8, v16, v24
8488; ZVFH-NEXT:    ret
8489;
8490; ZVFHMIN-LABEL: vfmsub_vv_nxv32f16_unmasked:
8491; ZVFHMIN:       # %bb.0:
8492; ZVFHMIN-NEXT:    addi sp, sp, -16
8493; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 16
8494; ZVFHMIN-NEXT:    csrr a2, vlenb
8495; ZVFHMIN-NEXT:    slli a2, a2, 5
8496; ZVFHMIN-NEXT:    sub sp, sp, a2
8497; ZVFHMIN-NEXT:    .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 32 * vlenb
8498; ZVFHMIN-NEXT:    csrr a2, vlenb
8499; ZVFHMIN-NEXT:    slli a2, a2, 3
8500; ZVFHMIN-NEXT:    mv a3, a2
8501; ZVFHMIN-NEXT:    slli a2, a2, 1
8502; ZVFHMIN-NEXT:    add a2, a2, a3
8503; ZVFHMIN-NEXT:    add a2, sp, a2
8504; ZVFHMIN-NEXT:    addi a2, a2, 16
8505; ZVFHMIN-NEXT:    vs8r.v v16, (a2) # Unknown-size Folded Spill
8506; ZVFHMIN-NEXT:    vsetvli a2, zero, e8, m4, ta, ma
8507; ZVFHMIN-NEXT:    vmv8r.v v24, v8
8508; ZVFHMIN-NEXT:    vl8re16.v v8, (a0)
8509; ZVFHMIN-NEXT:    lui a2, 8
8510; ZVFHMIN-NEXT:    vmset.m v16
8511; ZVFHMIN-NEXT:    csrr a3, vlenb
8512; ZVFHMIN-NEXT:    slli a0, a3, 1
8513; ZVFHMIN-NEXT:    srli a3, a3, 2
8514; ZVFHMIN-NEXT:    sub a4, a1, a0
8515; ZVFHMIN-NEXT:    vsetvli a5, zero, e8, mf2, ta, ma
8516; ZVFHMIN-NEXT:    vslidedown.vx v0, v16, a3
8517; ZVFHMIN-NEXT:    sltu a3, a1, a4
8518; ZVFHMIN-NEXT:    vsetvli zero, a1, e16, m8, ta, ma
8519; ZVFHMIN-NEXT:    vxor.vx v16, v8, a2
8520; ZVFHMIN-NEXT:    addi a3, a3, -1
8521; ZVFHMIN-NEXT:    and a3, a3, a4
8522; ZVFHMIN-NEXT:    vmv4r.v v8, v16
8523; ZVFHMIN-NEXT:    addi a2, sp, 16
8524; ZVFHMIN-NEXT:    vs8r.v v8, (a2) # Unknown-size Folded Spill
8525; ZVFHMIN-NEXT:    vsetvli zero, a3, e16, m4, ta, ma
8526; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v20, v0.t
8527; ZVFHMIN-NEXT:    csrr a2, vlenb
8528; ZVFHMIN-NEXT:    slli a2, a2, 3
8529; ZVFHMIN-NEXT:    add a2, sp, a2
8530; ZVFHMIN-NEXT:    addi a2, a2, 16
8531; ZVFHMIN-NEXT:    vs8r.v v8, (a2) # Unknown-size Folded Spill
8532; ZVFHMIN-NEXT:    csrr a2, vlenb
8533; ZVFHMIN-NEXT:    slli a2, a2, 4
8534; ZVFHMIN-NEXT:    add a2, sp, a2
8535; ZVFHMIN-NEXT:    addi a2, a2, 16
8536; ZVFHMIN-NEXT:    vs8r.v v24, (a2) # Unknown-size Folded Spill
8537; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v28, v0.t
8538; ZVFHMIN-NEXT:    csrr a2, vlenb
8539; ZVFHMIN-NEXT:    slli a2, a2, 3
8540; ZVFHMIN-NEXT:    mv a3, a2
8541; ZVFHMIN-NEXT:    slli a2, a2, 1
8542; ZVFHMIN-NEXT:    add a2, a2, a3
8543; ZVFHMIN-NEXT:    add a2, sp, a2
8544; ZVFHMIN-NEXT:    addi a2, a2, 16
8545; ZVFHMIN-NEXT:    vl8r.v v8, (a2) # Unknown-size Folded Reload
8546; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v12, v0.t
8547; ZVFHMIN-NEXT:    csrr a2, vlenb
8548; ZVFHMIN-NEXT:    slli a2, a2, 3
8549; ZVFHMIN-NEXT:    add a2, sp, a2
8550; ZVFHMIN-NEXT:    addi a2, a2, 16
8551; ZVFHMIN-NEXT:    vl8r.v v8, (a2) # Unknown-size Folded Reload
8552; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
8553; ZVFHMIN-NEXT:    vfmadd.vv v24, v16, v8, v0.t
8554; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
8555; ZVFHMIN-NEXT:    vfncvt.f.f.w v12, v24, v0.t
8556; ZVFHMIN-NEXT:    bltu a1, a0, .LBB281_2
8557; ZVFHMIN-NEXT:  # %bb.1:
8558; ZVFHMIN-NEXT:    mv a1, a0
8559; ZVFHMIN-NEXT:  .LBB281_2:
8560; ZVFHMIN-NEXT:    addi a0, sp, 16
8561; ZVFHMIN-NEXT:    vl8r.v v16, (a0) # Unknown-size Folded Reload
8562; ZVFHMIN-NEXT:    vsetvli zero, a1, e16, m4, ta, ma
8563; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v16
8564; ZVFHMIN-NEXT:    csrr a0, vlenb
8565; ZVFHMIN-NEXT:    slli a0, a0, 3
8566; ZVFHMIN-NEXT:    add a0, sp, a0
8567; ZVFHMIN-NEXT:    addi a0, a0, 16
8568; ZVFHMIN-NEXT:    vs8r.v v24, (a0) # Unknown-size Folded Spill
8569; ZVFHMIN-NEXT:    csrr a0, vlenb
8570; ZVFHMIN-NEXT:    slli a0, a0, 4
8571; ZVFHMIN-NEXT:    add a0, sp, a0
8572; ZVFHMIN-NEXT:    addi a0, a0, 16
8573; ZVFHMIN-NEXT:    vl8r.v v24, (a0) # Unknown-size Folded Reload
8574; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v24
8575; ZVFHMIN-NEXT:    csrr a0, vlenb
8576; ZVFHMIN-NEXT:    slli a0, a0, 3
8577; ZVFHMIN-NEXT:    mv a1, a0
8578; ZVFHMIN-NEXT:    slli a0, a0, 1
8579; ZVFHMIN-NEXT:    add a0, a0, a1
8580; ZVFHMIN-NEXT:    add a0, sp, a0
8581; ZVFHMIN-NEXT:    addi a0, a0, 16
8582; ZVFHMIN-NEXT:    vl8r.v v24, (a0) # Unknown-size Folded Reload
8583; ZVFHMIN-NEXT:    vfwcvt.f.f.v v0, v24
8584; ZVFHMIN-NEXT:    csrr a0, vlenb
8585; ZVFHMIN-NEXT:    slli a0, a0, 3
8586; ZVFHMIN-NEXT:    add a0, sp, a0
8587; ZVFHMIN-NEXT:    addi a0, a0, 16
8588; ZVFHMIN-NEXT:    vl8r.v v24, (a0) # Unknown-size Folded Reload
8589; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
8590; ZVFHMIN-NEXT:    vfmadd.vv v0, v16, v24
8591; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
8592; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v0
8593; ZVFHMIN-NEXT:    csrr a0, vlenb
8594; ZVFHMIN-NEXT:    slli a0, a0, 5
8595; ZVFHMIN-NEXT:    add sp, sp, a0
8596; ZVFHMIN-NEXT:    .cfi_def_cfa sp, 16
8597; ZVFHMIN-NEXT:    addi sp, sp, 16
8598; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 0
8599; ZVFHMIN-NEXT:    ret
8600  %negc = call <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half> %c, <vscale x 32 x i1> splat (i1 true), i32 %evl)
8601  %v = call <vscale x 32 x half> @llvm.vp.fma.nxv32f16(<vscale x 32 x half> %va, <vscale x 32 x half> %b, <vscale x 32 x half> %negc, <vscale x 32 x i1> splat (i1 true), i32 %evl)
8602  ret <vscale x 32 x half> %v
8603}
8604
8605define <vscale x 32 x half> @vfmsub_vf_nxv32f16(<vscale x 32 x half> %va, half %b, <vscale x 32 x half> %vc, <vscale x 32 x i1> %m, i32 zeroext %evl) {
8606; ZVFH-LABEL: vfmsub_vf_nxv32f16:
8607; ZVFH:       # %bb.0:
8608; ZVFH-NEXT:    vsetvli zero, a0, e16, m8, ta, ma
8609; ZVFH-NEXT:    vfmsub.vf v8, fa0, v16, v0.t
8610; ZVFH-NEXT:    ret
8611;
8612; ZVFHMIN-LABEL: vfmsub_vf_nxv32f16:
8613; ZVFHMIN:       # %bb.0:
8614; ZVFHMIN-NEXT:    addi sp, sp, -16
8615; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 16
8616; ZVFHMIN-NEXT:    csrr a1, vlenb
8617; ZVFHMIN-NEXT:    slli a1, a1, 3
8618; ZVFHMIN-NEXT:    mv a2, a1
8619; ZVFHMIN-NEXT:    slli a1, a1, 2
8620; ZVFHMIN-NEXT:    add a1, a1, a2
8621; ZVFHMIN-NEXT:    sub sp, sp, a1
8622; ZVFHMIN-NEXT:    .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x28, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 40 * vlenb
8623; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m8, ta, ma
8624; ZVFHMIN-NEXT:    vmv1r.v v7, v0
8625; ZVFHMIN-NEXT:    vmv8r.v v24, v8
8626; ZVFHMIN-NEXT:    fmv.x.h a2, fa0
8627; ZVFHMIN-NEXT:    lui a1, 8
8628; ZVFHMIN-NEXT:    csrr a3, vlenb
8629; ZVFHMIN-NEXT:    vxor.vx v8, v16, a1, v0.t
8630; ZVFHMIN-NEXT:    slli a1, a3, 1
8631; ZVFHMIN-NEXT:    srli a3, a3, 2
8632; ZVFHMIN-NEXT:    sub a4, a0, a1
8633; ZVFHMIN-NEXT:    vsetvli a5, zero, e8, mf2, ta, ma
8634; ZVFHMIN-NEXT:    vslidedown.vx v0, v0, a3
8635; ZVFHMIN-NEXT:    sltu a3, a0, a4
8636; ZVFHMIN-NEXT:    addi a3, a3, -1
8637; ZVFHMIN-NEXT:    and a3, a3, a4
8638; ZVFHMIN-NEXT:    csrr a4, vlenb
8639; ZVFHMIN-NEXT:    slli a4, a4, 4
8640; ZVFHMIN-NEXT:    add a4, sp, a4
8641; ZVFHMIN-NEXT:    addi a4, a4, 16
8642; ZVFHMIN-NEXT:    vs8r.v v8, (a4) # Unknown-size Folded Spill
8643; ZVFHMIN-NEXT:    vsetvli zero, a3, e16, m4, ta, ma
8644; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v12, v0.t
8645; ZVFHMIN-NEXT:    csrr a4, vlenb
8646; ZVFHMIN-NEXT:    slli a4, a4, 3
8647; ZVFHMIN-NEXT:    add a4, sp, a4
8648; ZVFHMIN-NEXT:    addi a4, a4, 16
8649; ZVFHMIN-NEXT:    vs8r.v v16, (a4) # Unknown-size Folded Spill
8650; ZVFHMIN-NEXT:    csrr a4, vlenb
8651; ZVFHMIN-NEXT:    slli a4, a4, 3
8652; ZVFHMIN-NEXT:    mv a5, a4
8653; ZVFHMIN-NEXT:    slli a4, a4, 1
8654; ZVFHMIN-NEXT:    add a4, a4, a5
8655; ZVFHMIN-NEXT:    add a4, sp, a4
8656; ZVFHMIN-NEXT:    addi a4, a4, 16
8657; ZVFHMIN-NEXT:    vs8r.v v24, (a4) # Unknown-size Folded Spill
8658; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v28, v0.t
8659; ZVFHMIN-NEXT:    vsetvli a4, zero, e16, m8, ta, ma
8660; ZVFHMIN-NEXT:    vmv.v.x v24, a2
8661; ZVFHMIN-NEXT:    csrr a2, vlenb
8662; ZVFHMIN-NEXT:    slli a2, a2, 5
8663; ZVFHMIN-NEXT:    add a2, sp, a2
8664; ZVFHMIN-NEXT:    addi a2, a2, 16
8665; ZVFHMIN-NEXT:    vs8r.v v24, (a2) # Unknown-size Folded Spill
8666; ZVFHMIN-NEXT:    csrr a2, vlenb
8667; ZVFHMIN-NEXT:    slli a2, a2, 5
8668; ZVFHMIN-NEXT:    add a2, sp, a2
8669; ZVFHMIN-NEXT:    addi a2, a2, 16
8670; ZVFHMIN-NEXT:    vl8r.v v16, (a2) # Unknown-size Folded Reload
8671; ZVFHMIN-NEXT:    vsetvli zero, a3, e16, m4, ta, ma
8672; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v20, v0.t
8673; ZVFHMIN-NEXT:    csrr a2, vlenb
8674; ZVFHMIN-NEXT:    slli a2, a2, 3
8675; ZVFHMIN-NEXT:    add a2, sp, a2
8676; ZVFHMIN-NEXT:    addi a2, a2, 16
8677; ZVFHMIN-NEXT:    vl8r.v v16, (a2) # Unknown-size Folded Reload
8678; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
8679; ZVFHMIN-NEXT:    vfmadd.vv v24, v8, v16, v0.t
8680; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
8681; ZVFHMIN-NEXT:    vfncvt.f.f.w v12, v24, v0.t
8682; ZVFHMIN-NEXT:    addi a2, sp, 16
8683; ZVFHMIN-NEXT:    vs8r.v v8, (a2) # Unknown-size Folded Spill
8684; ZVFHMIN-NEXT:    bltu a0, a1, .LBB282_2
8685; ZVFHMIN-NEXT:  # %bb.1:
8686; ZVFHMIN-NEXT:    mv a0, a1
8687; ZVFHMIN-NEXT:  .LBB282_2:
8688; ZVFHMIN-NEXT:    vmv1r.v v0, v7
8689; ZVFHMIN-NEXT:    csrr a1, vlenb
8690; ZVFHMIN-NEXT:    slli a1, a1, 4
8691; ZVFHMIN-NEXT:    add a1, sp, a1
8692; ZVFHMIN-NEXT:    addi a1, a1, 16
8693; ZVFHMIN-NEXT:    vl8r.v v8, (a1) # Unknown-size Folded Reload
8694; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
8695; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v8, v0.t
8696; ZVFHMIN-NEXT:    csrr a0, vlenb
8697; ZVFHMIN-NEXT:    slli a0, a0, 3
8698; ZVFHMIN-NEXT:    add a0, sp, a0
8699; ZVFHMIN-NEXT:    addi a0, a0, 16
8700; ZVFHMIN-NEXT:    vs8r.v v24, (a0) # Unknown-size Folded Spill
8701; ZVFHMIN-NEXT:    csrr a0, vlenb
8702; ZVFHMIN-NEXT:    slli a0, a0, 3
8703; ZVFHMIN-NEXT:    mv a1, a0
8704; ZVFHMIN-NEXT:    slli a0, a0, 1
8705; ZVFHMIN-NEXT:    add a0, a0, a1
8706; ZVFHMIN-NEXT:    add a0, sp, a0
8707; ZVFHMIN-NEXT:    addi a0, a0, 16
8708; ZVFHMIN-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
8709; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v8, v0.t
8710; ZVFHMIN-NEXT:    csrr a0, vlenb
8711; ZVFHMIN-NEXT:    slli a0, a0, 4
8712; ZVFHMIN-NEXT:    add a0, sp, a0
8713; ZVFHMIN-NEXT:    addi a0, a0, 16
8714; ZVFHMIN-NEXT:    vs8r.v v16, (a0) # Unknown-size Folded Spill
8715; ZVFHMIN-NEXT:    csrr a0, vlenb
8716; ZVFHMIN-NEXT:    slli a0, a0, 5
8717; ZVFHMIN-NEXT:    add a0, sp, a0
8718; ZVFHMIN-NEXT:    addi a0, a0, 16
8719; ZVFHMIN-NEXT:    vl8r.v v24, (a0) # Unknown-size Folded Reload
8720; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v24, v0.t
8721; ZVFHMIN-NEXT:    csrr a0, vlenb
8722; ZVFHMIN-NEXT:    slli a0, a0, 3
8723; ZVFHMIN-NEXT:    add a0, sp, a0
8724; ZVFHMIN-NEXT:    addi a0, a0, 16
8725; ZVFHMIN-NEXT:    vl8r.v v24, (a0) # Unknown-size Folded Reload
8726; ZVFHMIN-NEXT:    csrr a0, vlenb
8727; ZVFHMIN-NEXT:    slli a0, a0, 4
8728; ZVFHMIN-NEXT:    add a0, sp, a0
8729; ZVFHMIN-NEXT:    addi a0, a0, 16
8730; ZVFHMIN-NEXT:    vl8r.v v16, (a0) # Unknown-size Folded Reload
8731; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
8732; ZVFHMIN-NEXT:    vfmadd.vv v8, v16, v24, v0.t
8733; ZVFHMIN-NEXT:    vmv.v.v v16, v8
8734; ZVFHMIN-NEXT:    addi a0, sp, 16
8735; ZVFHMIN-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
8736; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
8737; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v16, v0.t
8738; ZVFHMIN-NEXT:    csrr a0, vlenb
8739; ZVFHMIN-NEXT:    slli a0, a0, 3
8740; ZVFHMIN-NEXT:    mv a1, a0
8741; ZVFHMIN-NEXT:    slli a0, a0, 2
8742; ZVFHMIN-NEXT:    add a0, a0, a1
8743; ZVFHMIN-NEXT:    add sp, sp, a0
8744; ZVFHMIN-NEXT:    .cfi_def_cfa sp, 16
8745; ZVFHMIN-NEXT:    addi sp, sp, 16
8746; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 0
8747; ZVFHMIN-NEXT:    ret
8748  %elt.head = insertelement <vscale x 32 x half> poison, half %b, i32 0
8749  %vb = shufflevector <vscale x 32 x half> %elt.head, <vscale x 32 x half> poison, <vscale x 32 x i32> zeroinitializer
8750  %negvc = call <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half> %vc, <vscale x 32 x i1> %m, i32 %evl)
8751  %v = call <vscale x 32 x half> @llvm.vp.fma.nxv32f16(<vscale x 32 x half> %va, <vscale x 32 x half> %vb, <vscale x 32 x half> %negvc, <vscale x 32 x i1> %m, i32 %evl)
8752  ret <vscale x 32 x half> %v
8753}
8754
8755define <vscale x 32 x half> @vfmsub_vf_nxv32f16_commute(<vscale x 32 x half> %va, half %b, <vscale x 32 x half> %vc, <vscale x 32 x i1> %m, i32 zeroext %evl) {
8756; ZVFH-LABEL: vfmsub_vf_nxv32f16_commute:
8757; ZVFH:       # %bb.0:
8758; ZVFH-NEXT:    vsetvli zero, a0, e16, m8, ta, ma
8759; ZVFH-NEXT:    vfmsub.vf v8, fa0, v16, v0.t
8760; ZVFH-NEXT:    ret
8761;
8762; ZVFHMIN-LABEL: vfmsub_vf_nxv32f16_commute:
8763; ZVFHMIN:       # %bb.0:
8764; ZVFHMIN-NEXT:    addi sp, sp, -16
8765; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 16
8766; ZVFHMIN-NEXT:    csrr a1, vlenb
8767; ZVFHMIN-NEXT:    slli a1, a1, 3
8768; ZVFHMIN-NEXT:    mv a2, a1
8769; ZVFHMIN-NEXT:    slli a1, a1, 2
8770; ZVFHMIN-NEXT:    add a1, a1, a2
8771; ZVFHMIN-NEXT:    sub sp, sp, a1
8772; ZVFHMIN-NEXT:    .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x28, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 40 * vlenb
8773; ZVFHMIN-NEXT:    vsetvli a1, zero, e16, m8, ta, ma
8774; ZVFHMIN-NEXT:    vmv1r.v v7, v0
8775; ZVFHMIN-NEXT:    csrr a1, vlenb
8776; ZVFHMIN-NEXT:    slli a1, a1, 5
8777; ZVFHMIN-NEXT:    add a1, sp, a1
8778; ZVFHMIN-NEXT:    addi a1, a1, 16
8779; ZVFHMIN-NEXT:    vs8r.v v8, (a1) # Unknown-size Folded Spill
8780; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
8781; ZVFHMIN-NEXT:    lui a2, 8
8782; ZVFHMIN-NEXT:    csrr a3, vlenb
8783; ZVFHMIN-NEXT:    vmv.v.x v8, a1
8784; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m8, ta, ma
8785; ZVFHMIN-NEXT:    vxor.vx v16, v16, a2, v0.t
8786; ZVFHMIN-NEXT:    slli a1, a3, 1
8787; ZVFHMIN-NEXT:    srli a3, a3, 2
8788; ZVFHMIN-NEXT:    sub a2, a0, a1
8789; ZVFHMIN-NEXT:    vsetvli a4, zero, e8, mf2, ta, ma
8790; ZVFHMIN-NEXT:    vslidedown.vx v0, v0, a3
8791; ZVFHMIN-NEXT:    sltu a3, a0, a2
8792; ZVFHMIN-NEXT:    addi a3, a3, -1
8793; ZVFHMIN-NEXT:    and a2, a3, a2
8794; ZVFHMIN-NEXT:    csrr a3, vlenb
8795; ZVFHMIN-NEXT:    slli a3, a3, 4
8796; ZVFHMIN-NEXT:    add a3, sp, a3
8797; ZVFHMIN-NEXT:    addi a3, a3, 16
8798; ZVFHMIN-NEXT:    vs8r.v v16, (a3) # Unknown-size Folded Spill
8799; ZVFHMIN-NEXT:    vsetvli zero, a2, e16, m4, ta, ma
8800; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v20, v0.t
8801; ZVFHMIN-NEXT:    csrr a2, vlenb
8802; ZVFHMIN-NEXT:    slli a2, a2, 3
8803; ZVFHMIN-NEXT:    add a2, sp, a2
8804; ZVFHMIN-NEXT:    addi a2, a2, 16
8805; ZVFHMIN-NEXT:    vs8r.v v24, (a2) # Unknown-size Folded Spill
8806; ZVFHMIN-NEXT:    csrr a2, vlenb
8807; ZVFHMIN-NEXT:    slli a2, a2, 3
8808; ZVFHMIN-NEXT:    mv a3, a2
8809; ZVFHMIN-NEXT:    slli a2, a2, 1
8810; ZVFHMIN-NEXT:    add a2, a2, a3
8811; ZVFHMIN-NEXT:    add a2, sp, a2
8812; ZVFHMIN-NEXT:    addi a2, a2, 16
8813; ZVFHMIN-NEXT:    vs8r.v v8, (a2) # Unknown-size Folded Spill
8814; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v12, v0.t
8815; ZVFHMIN-NEXT:    csrr a2, vlenb
8816; ZVFHMIN-NEXT:    slli a2, a2, 5
8817; ZVFHMIN-NEXT:    add a2, sp, a2
8818; ZVFHMIN-NEXT:    addi a2, a2, 16
8819; ZVFHMIN-NEXT:    vl8r.v v16, (a2) # Unknown-size Folded Reload
8820; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v20, v0.t
8821; ZVFHMIN-NEXT:    csrr a2, vlenb
8822; ZVFHMIN-NEXT:    slli a2, a2, 3
8823; ZVFHMIN-NEXT:    add a2, sp, a2
8824; ZVFHMIN-NEXT:    addi a2, a2, 16
8825; ZVFHMIN-NEXT:    vl8r.v v16, (a2) # Unknown-size Folded Reload
8826; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
8827; ZVFHMIN-NEXT:    vfmadd.vv v8, v24, v16, v0.t
8828; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
8829; ZVFHMIN-NEXT:    vfncvt.f.f.w v20, v8, v0.t
8830; ZVFHMIN-NEXT:    addi a2, sp, 16
8831; ZVFHMIN-NEXT:    vs8r.v v16, (a2) # Unknown-size Folded Spill
8832; ZVFHMIN-NEXT:    bltu a0, a1, .LBB283_2
8833; ZVFHMIN-NEXT:  # %bb.1:
8834; ZVFHMIN-NEXT:    mv a0, a1
8835; ZVFHMIN-NEXT:  .LBB283_2:
8836; ZVFHMIN-NEXT:    vmv1r.v v0, v7
8837; ZVFHMIN-NEXT:    csrr a1, vlenb
8838; ZVFHMIN-NEXT:    slli a1, a1, 4
8839; ZVFHMIN-NEXT:    add a1, sp, a1
8840; ZVFHMIN-NEXT:    addi a1, a1, 16
8841; ZVFHMIN-NEXT:    vl8r.v v8, (a1) # Unknown-size Folded Reload
8842; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
8843; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v8, v0.t
8844; ZVFHMIN-NEXT:    csrr a0, vlenb
8845; ZVFHMIN-NEXT:    slli a0, a0, 3
8846; ZVFHMIN-NEXT:    add a0, sp, a0
8847; ZVFHMIN-NEXT:    addi a0, a0, 16
8848; ZVFHMIN-NEXT:    vs8r.v v24, (a0) # Unknown-size Folded Spill
8849; ZVFHMIN-NEXT:    csrr a0, vlenb
8850; ZVFHMIN-NEXT:    slli a0, a0, 5
8851; ZVFHMIN-NEXT:    add a0, sp, a0
8852; ZVFHMIN-NEXT:    addi a0, a0, 16
8853; ZVFHMIN-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
8854; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v8, v0.t
8855; ZVFHMIN-NEXT:    csrr a0, vlenb
8856; ZVFHMIN-NEXT:    slli a0, a0, 3
8857; ZVFHMIN-NEXT:    mv a1, a0
8858; ZVFHMIN-NEXT:    slli a0, a0, 1
8859; ZVFHMIN-NEXT:    add a0, a0, a1
8860; ZVFHMIN-NEXT:    add a0, sp, a0
8861; ZVFHMIN-NEXT:    addi a0, a0, 16
8862; ZVFHMIN-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
8863; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v8, v0.t
8864; ZVFHMIN-NEXT:    csrr a0, vlenb
8865; ZVFHMIN-NEXT:    slli a0, a0, 5
8866; ZVFHMIN-NEXT:    add a0, sp, a0
8867; ZVFHMIN-NEXT:    addi a0, a0, 16
8868; ZVFHMIN-NEXT:    vs8r.v v16, (a0) # Unknown-size Folded Spill
8869; ZVFHMIN-NEXT:    csrr a0, vlenb
8870; ZVFHMIN-NEXT:    slli a0, a0, 3
8871; ZVFHMIN-NEXT:    add a0, sp, a0
8872; ZVFHMIN-NEXT:    addi a0, a0, 16
8873; ZVFHMIN-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
8874; ZVFHMIN-NEXT:    csrr a0, vlenb
8875; ZVFHMIN-NEXT:    slli a0, a0, 5
8876; ZVFHMIN-NEXT:    add a0, sp, a0
8877; ZVFHMIN-NEXT:    addi a0, a0, 16
8878; ZVFHMIN-NEXT:    vl8r.v v16, (a0) # Unknown-size Folded Reload
8879; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
8880; ZVFHMIN-NEXT:    vfmadd.vv v24, v16, v8, v0.t
8881; ZVFHMIN-NEXT:    addi a0, sp, 16
8882; ZVFHMIN-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
8883; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
8884; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v24, v0.t
8885; ZVFHMIN-NEXT:    csrr a0, vlenb
8886; ZVFHMIN-NEXT:    slli a0, a0, 3
8887; ZVFHMIN-NEXT:    mv a1, a0
8888; ZVFHMIN-NEXT:    slli a0, a0, 2
8889; ZVFHMIN-NEXT:    add a0, a0, a1
8890; ZVFHMIN-NEXT:    add sp, sp, a0
8891; ZVFHMIN-NEXT:    .cfi_def_cfa sp, 16
8892; ZVFHMIN-NEXT:    addi sp, sp, 16
8893; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 0
8894; ZVFHMIN-NEXT:    ret
8895  %elt.head = insertelement <vscale x 32 x half> poison, half %b, i32 0
8896  %vb = shufflevector <vscale x 32 x half> %elt.head, <vscale x 32 x half> poison, <vscale x 32 x i32> zeroinitializer
8897  %negvc = call <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half> %vc, <vscale x 32 x i1> %m, i32 %evl)
8898  %v = call <vscale x 32 x half> @llvm.vp.fma.nxv32f16(<vscale x 32 x half> %vb, <vscale x 32 x half> %va, <vscale x 32 x half> %negvc, <vscale x 32 x i1> %m, i32 %evl)
8899  ret <vscale x 32 x half> %v
8900}
8901
8902define <vscale x 32 x half> @vfmsub_vf_nxv32f16_unmasked(<vscale x 32 x half> %va, half %b, <vscale x 32 x half> %vc, i32 zeroext %evl) {
8903; ZVFH-LABEL: vfmsub_vf_nxv32f16_unmasked:
8904; ZVFH:       # %bb.0:
8905; ZVFH-NEXT:    vsetvli zero, a0, e16, m8, ta, ma
8906; ZVFH-NEXT:    vfmsub.vf v8, fa0, v16
8907; ZVFH-NEXT:    ret
8908;
8909; ZVFHMIN-LABEL: vfmsub_vf_nxv32f16_unmasked:
8910; ZVFHMIN:       # %bb.0:
8911; ZVFHMIN-NEXT:    addi sp, sp, -16
8912; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 16
8913; ZVFHMIN-NEXT:    csrr a1, vlenb
8914; ZVFHMIN-NEXT:    slli a1, a1, 5
8915; ZVFHMIN-NEXT:    sub sp, sp, a1
8916; ZVFHMIN-NEXT:    .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 32 * vlenb
8917; ZVFHMIN-NEXT:    fmv.x.h a2, fa0
8918; ZVFHMIN-NEXT:    lui a1, 8
8919; ZVFHMIN-NEXT:    vsetvli a3, zero, e8, m4, ta, ma
8920; ZVFHMIN-NEXT:    vmset.m v24
8921; ZVFHMIN-NEXT:    csrr a3, vlenb
8922; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m8, ta, ma
8923; ZVFHMIN-NEXT:    vxor.vx v16, v16, a1
8924; ZVFHMIN-NEXT:    slli a1, a3, 1
8925; ZVFHMIN-NEXT:    srli a3, a3, 2
8926; ZVFHMIN-NEXT:    sub a4, a0, a1
8927; ZVFHMIN-NEXT:    vsetvli a5, zero, e8, mf2, ta, ma
8928; ZVFHMIN-NEXT:    vslidedown.vx v0, v24, a3
8929; ZVFHMIN-NEXT:    sltu a3, a0, a4
8930; ZVFHMIN-NEXT:    addi a3, a3, -1
8931; ZVFHMIN-NEXT:    and a3, a3, a4
8932; ZVFHMIN-NEXT:    csrr a4, vlenb
8933; ZVFHMIN-NEXT:    slli a4, a4, 3
8934; ZVFHMIN-NEXT:    add a4, sp, a4
8935; ZVFHMIN-NEXT:    addi a4, a4, 16
8936; ZVFHMIN-NEXT:    vs8r.v v16, (a4) # Unknown-size Folded Spill
8937; ZVFHMIN-NEXT:    vsetvli zero, a3, e16, m4, ta, ma
8938; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v20, v0.t
8939; ZVFHMIN-NEXT:    addi a4, sp, 16
8940; ZVFHMIN-NEXT:    vs8r.v v24, (a4) # Unknown-size Folded Spill
8941; ZVFHMIN-NEXT:    csrr a4, vlenb
8942; ZVFHMIN-NEXT:    slli a4, a4, 4
8943; ZVFHMIN-NEXT:    add a4, sp, a4
8944; ZVFHMIN-NEXT:    addi a4, a4, 16
8945; ZVFHMIN-NEXT:    vs8r.v v8, (a4) # Unknown-size Folded Spill
8946; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v12, v0.t
8947; ZVFHMIN-NEXT:    vsetvli a4, zero, e16, m8, ta, ma
8948; ZVFHMIN-NEXT:    vmv.v.x v8, a2
8949; ZVFHMIN-NEXT:    csrr a2, vlenb
8950; ZVFHMIN-NEXT:    slli a2, a2, 3
8951; ZVFHMIN-NEXT:    mv a4, a2
8952; ZVFHMIN-NEXT:    slli a2, a2, 1
8953; ZVFHMIN-NEXT:    add a2, a2, a4
8954; ZVFHMIN-NEXT:    add a2, sp, a2
8955; ZVFHMIN-NEXT:    addi a2, a2, 16
8956; ZVFHMIN-NEXT:    vs8r.v v8, (a2) # Unknown-size Folded Spill
8957; ZVFHMIN-NEXT:    csrr a2, vlenb
8958; ZVFHMIN-NEXT:    slli a2, a2, 3
8959; ZVFHMIN-NEXT:    mv a4, a2
8960; ZVFHMIN-NEXT:    slli a2, a2, 1
8961; ZVFHMIN-NEXT:    add a2, a2, a4
8962; ZVFHMIN-NEXT:    add a2, sp, a2
8963; ZVFHMIN-NEXT:    addi a2, a2, 16
8964; ZVFHMIN-NEXT:    vl8r.v v24, (a2) # Unknown-size Folded Reload
8965; ZVFHMIN-NEXT:    vsetvli zero, a3, e16, m4, ta, ma
8966; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v28, v0.t
8967; ZVFHMIN-NEXT:    addi a2, sp, 16
8968; ZVFHMIN-NEXT:    vl8r.v v24, (a2) # Unknown-size Folded Reload
8969; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
8970; ZVFHMIN-NEXT:    vfmadd.vv v8, v16, v24, v0.t
8971; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
8972; ZVFHMIN-NEXT:    vfncvt.f.f.w v20, v8, v0.t
8973; ZVFHMIN-NEXT:    bltu a0, a1, .LBB284_2
8974; ZVFHMIN-NEXT:  # %bb.1:
8975; ZVFHMIN-NEXT:    mv a0, a1
8976; ZVFHMIN-NEXT:  .LBB284_2:
8977; ZVFHMIN-NEXT:    csrr a1, vlenb
8978; ZVFHMIN-NEXT:    slli a1, a1, 3
8979; ZVFHMIN-NEXT:    add a1, sp, a1
8980; ZVFHMIN-NEXT:    addi a1, a1, 16
8981; ZVFHMIN-NEXT:    vl8r.v v24, (a1) # Unknown-size Folded Reload
8982; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
8983; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v24
8984; ZVFHMIN-NEXT:    addi a0, sp, 16
8985; ZVFHMIN-NEXT:    vs8r.v v8, (a0) # Unknown-size Folded Spill
8986; ZVFHMIN-NEXT:    csrr a0, vlenb
8987; ZVFHMIN-NEXT:    slli a0, a0, 4
8988; ZVFHMIN-NEXT:    add a0, sp, a0
8989; ZVFHMIN-NEXT:    addi a0, a0, 16
8990; ZVFHMIN-NEXT:    vl8r.v v0, (a0) # Unknown-size Folded Reload
8991; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v0
8992; ZVFHMIN-NEXT:    csrr a0, vlenb
8993; ZVFHMIN-NEXT:    slli a0, a0, 3
8994; ZVFHMIN-NEXT:    mv a1, a0
8995; ZVFHMIN-NEXT:    slli a0, a0, 1
8996; ZVFHMIN-NEXT:    add a0, a0, a1
8997; ZVFHMIN-NEXT:    add a0, sp, a0
8998; ZVFHMIN-NEXT:    addi a0, a0, 16
8999; ZVFHMIN-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
9000; ZVFHMIN-NEXT:    vfwcvt.f.f.v v0, v8
9001; ZVFHMIN-NEXT:    addi a0, sp, 16
9002; ZVFHMIN-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
9003; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
9004; ZVFHMIN-NEXT:    vfmadd.vv v0, v24, v8
9005; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
9006; ZVFHMIN-NEXT:    vfncvt.f.f.w v16, v0
9007; ZVFHMIN-NEXT:    vmv8r.v v8, v16
9008; ZVFHMIN-NEXT:    csrr a0, vlenb
9009; ZVFHMIN-NEXT:    slli a0, a0, 5
9010; ZVFHMIN-NEXT:    add sp, sp, a0
9011; ZVFHMIN-NEXT:    .cfi_def_cfa sp, 16
9012; ZVFHMIN-NEXT:    addi sp, sp, 16
9013; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 0
9014; ZVFHMIN-NEXT:    ret
9015  %elt.head = insertelement <vscale x 32 x half> poison, half %b, i32 0
9016  %vb = shufflevector <vscale x 32 x half> %elt.head, <vscale x 32 x half> poison, <vscale x 32 x i32> zeroinitializer
9017  %negvc = call <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half> %vc, <vscale x 32 x i1> splat (i1 true), i32 %evl)
9018  %v = call <vscale x 32 x half> @llvm.vp.fma.nxv32f16(<vscale x 32 x half> %va, <vscale x 32 x half> %vb, <vscale x 32 x half> %negvc, <vscale x 32 x i1> splat (i1 true), i32 %evl)
9019  ret <vscale x 32 x half> %v
9020}
9021
9022define <vscale x 32 x half> @vfmsub_vf_nxv32f16_unmasked_commute(<vscale x 32 x half> %va, half %b, <vscale x 32 x half> %vc, i32 zeroext %evl) {
9023; ZVFH-LABEL: vfmsub_vf_nxv32f16_unmasked_commute:
9024; ZVFH:       # %bb.0:
9025; ZVFH-NEXT:    vsetvli zero, a0, e16, m8, ta, ma
9026; ZVFH-NEXT:    vfmsub.vf v8, fa0, v16
9027; ZVFH-NEXT:    ret
9028;
9029; ZVFHMIN-LABEL: vfmsub_vf_nxv32f16_unmasked_commute:
9030; ZVFHMIN:       # %bb.0:
9031; ZVFHMIN-NEXT:    addi sp, sp, -16
9032; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 16
9033; ZVFHMIN-NEXT:    csrr a1, vlenb
9034; ZVFHMIN-NEXT:    slli a1, a1, 5
9035; ZVFHMIN-NEXT:    sub sp, sp, a1
9036; ZVFHMIN-NEXT:    .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 32 * vlenb
9037; ZVFHMIN-NEXT:    csrr a1, vlenb
9038; ZVFHMIN-NEXT:    slli a1, a1, 3
9039; ZVFHMIN-NEXT:    mv a2, a1
9040; ZVFHMIN-NEXT:    slli a1, a1, 1
9041; ZVFHMIN-NEXT:    add a1, a1, a2
9042; ZVFHMIN-NEXT:    add a1, sp, a1
9043; ZVFHMIN-NEXT:    addi a1, a1, 16
9044; ZVFHMIN-NEXT:    vs8r.v v8, (a1) # Unknown-size Folded Spill
9045; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
9046; ZVFHMIN-NEXT:    lui a2, 8
9047; ZVFHMIN-NEXT:    vsetvli a3, zero, e16, m8, ta, ma
9048; ZVFHMIN-NEXT:    vmset.m v24
9049; ZVFHMIN-NEXT:    csrr a3, vlenb
9050; ZVFHMIN-NEXT:    vmv.v.x v8, a1
9051; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m8, ta, ma
9052; ZVFHMIN-NEXT:    vxor.vx v16, v16, a2
9053; ZVFHMIN-NEXT:    slli a1, a3, 1
9054; ZVFHMIN-NEXT:    srli a3, a3, 2
9055; ZVFHMIN-NEXT:    sub a2, a0, a1
9056; ZVFHMIN-NEXT:    vsetvli a4, zero, e8, mf2, ta, ma
9057; ZVFHMIN-NEXT:    vslidedown.vx v0, v24, a3
9058; ZVFHMIN-NEXT:    sltu a3, a0, a2
9059; ZVFHMIN-NEXT:    addi a3, a3, -1
9060; ZVFHMIN-NEXT:    and a2, a3, a2
9061; ZVFHMIN-NEXT:    csrr a3, vlenb
9062; ZVFHMIN-NEXT:    slli a3, a3, 3
9063; ZVFHMIN-NEXT:    add a3, sp, a3
9064; ZVFHMIN-NEXT:    addi a3, a3, 16
9065; ZVFHMIN-NEXT:    vs8r.v v16, (a3) # Unknown-size Folded Spill
9066; ZVFHMIN-NEXT:    vsetvli zero, a2, e16, m4, ta, ma
9067; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v20, v0.t
9068; ZVFHMIN-NEXT:    addi a2, sp, 16
9069; ZVFHMIN-NEXT:    vs8r.v v24, (a2) # Unknown-size Folded Spill
9070; ZVFHMIN-NEXT:    csrr a2, vlenb
9071; ZVFHMIN-NEXT:    slli a2, a2, 4
9072; ZVFHMIN-NEXT:    add a2, sp, a2
9073; ZVFHMIN-NEXT:    addi a2, a2, 16
9074; ZVFHMIN-NEXT:    vs8r.v v8, (a2) # Unknown-size Folded Spill
9075; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v12, v0.t
9076; ZVFHMIN-NEXT:    csrr a2, vlenb
9077; ZVFHMIN-NEXT:    slli a2, a2, 3
9078; ZVFHMIN-NEXT:    mv a3, a2
9079; ZVFHMIN-NEXT:    slli a2, a2, 1
9080; ZVFHMIN-NEXT:    add a2, a2, a3
9081; ZVFHMIN-NEXT:    add a2, sp, a2
9082; ZVFHMIN-NEXT:    addi a2, a2, 16
9083; ZVFHMIN-NEXT:    vl8r.v v16, (a2) # Unknown-size Folded Reload
9084; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v20, v0.t
9085; ZVFHMIN-NEXT:    addi a2, sp, 16
9086; ZVFHMIN-NEXT:    vl8r.v v16, (a2) # Unknown-size Folded Reload
9087; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
9088; ZVFHMIN-NEXT:    vfmadd.vv v8, v24, v16, v0.t
9089; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
9090; ZVFHMIN-NEXT:    vfncvt.f.f.w v20, v8, v0.t
9091; ZVFHMIN-NEXT:    bltu a0, a1, .LBB285_2
9092; ZVFHMIN-NEXT:  # %bb.1:
9093; ZVFHMIN-NEXT:    mv a0, a1
9094; ZVFHMIN-NEXT:  .LBB285_2:
9095; ZVFHMIN-NEXT:    csrr a1, vlenb
9096; ZVFHMIN-NEXT:    slli a1, a1, 3
9097; ZVFHMIN-NEXT:    add a1, sp, a1
9098; ZVFHMIN-NEXT:    addi a1, a1, 16
9099; ZVFHMIN-NEXT:    vl8r.v v8, (a1) # Unknown-size Folded Reload
9100; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
9101; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v8
9102; ZVFHMIN-NEXT:    addi a0, sp, 16
9103; ZVFHMIN-NEXT:    vs8r.v v24, (a0) # Unknown-size Folded Spill
9104; ZVFHMIN-NEXT:    csrr a0, vlenb
9105; ZVFHMIN-NEXT:    slli a0, a0, 3
9106; ZVFHMIN-NEXT:    mv a1, a0
9107; ZVFHMIN-NEXT:    slli a0, a0, 1
9108; ZVFHMIN-NEXT:    add a0, a0, a1
9109; ZVFHMIN-NEXT:    add a0, sp, a0
9110; ZVFHMIN-NEXT:    addi a0, a0, 16
9111; ZVFHMIN-NEXT:    vl8r.v v0, (a0) # Unknown-size Folded Reload
9112; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v0
9113; ZVFHMIN-NEXT:    csrr a0, vlenb
9114; ZVFHMIN-NEXT:    slli a0, a0, 4
9115; ZVFHMIN-NEXT:    add a0, sp, a0
9116; ZVFHMIN-NEXT:    addi a0, a0, 16
9117; ZVFHMIN-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
9118; ZVFHMIN-NEXT:    vfwcvt.f.f.v v0, v8
9119; ZVFHMIN-NEXT:    addi a0, sp, 16
9120; ZVFHMIN-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
9121; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
9122; ZVFHMIN-NEXT:    vfmadd.vv v0, v24, v8
9123; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
9124; ZVFHMIN-NEXT:    vfncvt.f.f.w v16, v0
9125; ZVFHMIN-NEXT:    vmv8r.v v8, v16
9126; ZVFHMIN-NEXT:    csrr a0, vlenb
9127; ZVFHMIN-NEXT:    slli a0, a0, 5
9128; ZVFHMIN-NEXT:    add sp, sp, a0
9129; ZVFHMIN-NEXT:    .cfi_def_cfa sp, 16
9130; ZVFHMIN-NEXT:    addi sp, sp, 16
9131; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 0
9132; ZVFHMIN-NEXT:    ret
9133  %elt.head = insertelement <vscale x 32 x half> poison, half %b, i32 0
9134  %vb = shufflevector <vscale x 32 x half> %elt.head, <vscale x 32 x half> poison, <vscale x 32 x i32> zeroinitializer
9135  %negvc = call <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half> %vc, <vscale x 32 x i1> splat (i1 true), i32 %evl)
9136  %v = call <vscale x 32 x half> @llvm.vp.fma.nxv32f16(<vscale x 32 x half> %vb, <vscale x 32 x half> %va, <vscale x 32 x half> %negvc, <vscale x 32 x i1> splat (i1 true), i32 %evl)
9137  ret <vscale x 32 x half> %v
9138}
9139
9140define <vscale x 32 x half> @vfnmadd_vv_nxv32f16(<vscale x 32 x half> %va, <vscale x 32 x half> %b, <vscale x 32 x half> %c, <vscale x 32 x i1> %m, i32 zeroext %evl) {
9141; ZVFH-LABEL: vfnmadd_vv_nxv32f16:
9142; ZVFH:       # %bb.0:
9143; ZVFH-NEXT:    vl8re16.v v24, (a0)
9144; ZVFH-NEXT:    vsetvli zero, a1, e16, m8, ta, ma
9145; ZVFH-NEXT:    vfnmadd.vv v16, v8, v24, v0.t
9146; ZVFH-NEXT:    vmv.v.v v8, v16
9147; ZVFH-NEXT:    ret
9148;
9149; ZVFHMIN-LABEL: vfnmadd_vv_nxv32f16:
9150; ZVFHMIN:       # %bb.0:
9151; ZVFHMIN-NEXT:    addi sp, sp, -16
9152; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 16
9153; ZVFHMIN-NEXT:    csrr a2, vlenb
9154; ZVFHMIN-NEXT:    slli a2, a2, 4
9155; ZVFHMIN-NEXT:    mv a3, a2
9156; ZVFHMIN-NEXT:    slli a2, a2, 1
9157; ZVFHMIN-NEXT:    add a2, a2, a3
9158; ZVFHMIN-NEXT:    sub sp, sp, a2
9159; ZVFHMIN-NEXT:    .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x30, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 48 * vlenb
9160; ZVFHMIN-NEXT:    vsetvli zero, a1, e16, m8, ta, ma
9161; ZVFHMIN-NEXT:    vmv1r.v v7, v0
9162; ZVFHMIN-NEXT:    csrr a2, vlenb
9163; ZVFHMIN-NEXT:    slli a2, a2, 3
9164; ZVFHMIN-NEXT:    mv a3, a2
9165; ZVFHMIN-NEXT:    slli a2, a2, 2
9166; ZVFHMIN-NEXT:    add a2, a2, a3
9167; ZVFHMIN-NEXT:    add a2, sp, a2
9168; ZVFHMIN-NEXT:    addi a2, a2, 16
9169; ZVFHMIN-NEXT:    vs8r.v v8, (a2) # Unknown-size Folded Spill
9170; ZVFHMIN-NEXT:    vl8re16.v v24, (a0)
9171; ZVFHMIN-NEXT:    lui a2, 8
9172; ZVFHMIN-NEXT:    csrr a3, vlenb
9173; ZVFHMIN-NEXT:    vxor.vx v8, v16, a2, v0.t
9174; ZVFHMIN-NEXT:    csrr a0, vlenb
9175; ZVFHMIN-NEXT:    slli a0, a0, 5
9176; ZVFHMIN-NEXT:    add a0, sp, a0
9177; ZVFHMIN-NEXT:    addi a0, a0, 16
9178; ZVFHMIN-NEXT:    vs8r.v v8, (a0) # Unknown-size Folded Spill
9179; ZVFHMIN-NEXT:    slli a0, a3, 1
9180; ZVFHMIN-NEXT:    srli a3, a3, 2
9181; ZVFHMIN-NEXT:    sub a4, a1, a0
9182; ZVFHMIN-NEXT:    vsetvli a5, zero, e8, mf2, ta, ma
9183; ZVFHMIN-NEXT:    vslidedown.vx v6, v0, a3
9184; ZVFHMIN-NEXT:    sltu a3, a1, a4
9185; ZVFHMIN-NEXT:    vsetvli zero, a1, e16, m8, ta, ma
9186; ZVFHMIN-NEXT:    vxor.vx v24, v24, a2, v0.t
9187; ZVFHMIN-NEXT:    addi a3, a3, -1
9188; ZVFHMIN-NEXT:    and a3, a3, a4
9189; ZVFHMIN-NEXT:    vmv1r.v v0, v6
9190; ZVFHMIN-NEXT:    csrr a2, vlenb
9191; ZVFHMIN-NEXT:    slli a2, a2, 3
9192; ZVFHMIN-NEXT:    mv a4, a2
9193; ZVFHMIN-NEXT:    slli a2, a2, 1
9194; ZVFHMIN-NEXT:    add a2, a2, a4
9195; ZVFHMIN-NEXT:    add a2, sp, a2
9196; ZVFHMIN-NEXT:    addi a2, a2, 16
9197; ZVFHMIN-NEXT:    vs8r.v v24, (a2) # Unknown-size Folded Spill
9198; ZVFHMIN-NEXT:    vsetvli zero, a3, e16, m4, ta, ma
9199; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v28, v0.t
9200; ZVFHMIN-NEXT:    csrr a2, vlenb
9201; ZVFHMIN-NEXT:    slli a2, a2, 4
9202; ZVFHMIN-NEXT:    add a2, sp, a2
9203; ZVFHMIN-NEXT:    addi a2, a2, 16
9204; ZVFHMIN-NEXT:    vs8r.v v8, (a2) # Unknown-size Folded Spill
9205; ZVFHMIN-NEXT:    csrr a2, vlenb
9206; ZVFHMIN-NEXT:    slli a2, a2, 5
9207; ZVFHMIN-NEXT:    add a2, sp, a2
9208; ZVFHMIN-NEXT:    addi a2, a2, 16
9209; ZVFHMIN-NEXT:    vl8r.v v8, (a2) # Unknown-size Folded Reload
9210; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v12, v0.t
9211; ZVFHMIN-NEXT:    addi a2, sp, 16
9212; ZVFHMIN-NEXT:    vs8r.v v24, (a2) # Unknown-size Folded Spill
9213; ZVFHMIN-NEXT:    csrr a2, vlenb
9214; ZVFHMIN-NEXT:    slli a2, a2, 3
9215; ZVFHMIN-NEXT:    mv a3, a2
9216; ZVFHMIN-NEXT:    slli a2, a2, 2
9217; ZVFHMIN-NEXT:    add a2, a2, a3
9218; ZVFHMIN-NEXT:    add a2, sp, a2
9219; ZVFHMIN-NEXT:    addi a2, a2, 16
9220; ZVFHMIN-NEXT:    vl8r.v v8, (a2) # Unknown-size Folded Reload
9221; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v12, v0.t
9222; ZVFHMIN-NEXT:    csrr a2, vlenb
9223; ZVFHMIN-NEXT:    slli a2, a2, 3
9224; ZVFHMIN-NEXT:    add a2, sp, a2
9225; ZVFHMIN-NEXT:    addi a2, a2, 16
9226; ZVFHMIN-NEXT:    vs8r.v v24, (a2) # Unknown-size Folded Spill
9227; ZVFHMIN-NEXT:    csrr a2, vlenb
9228; ZVFHMIN-NEXT:    slli a2, a2, 4
9229; ZVFHMIN-NEXT:    add a2, sp, a2
9230; ZVFHMIN-NEXT:    addi a2, a2, 16
9231; ZVFHMIN-NEXT:    vl8r.v v8, (a2) # Unknown-size Folded Reload
9232; ZVFHMIN-NEXT:    csrr a2, vlenb
9233; ZVFHMIN-NEXT:    slli a2, a2, 3
9234; ZVFHMIN-NEXT:    add a2, sp, a2
9235; ZVFHMIN-NEXT:    addi a2, a2, 16
9236; ZVFHMIN-NEXT:    vl8r.v v24, (a2) # Unknown-size Folded Reload
9237; ZVFHMIN-NEXT:    addi a2, sp, 16
9238; ZVFHMIN-NEXT:    vl8r.v v16, (a2) # Unknown-size Folded Reload
9239; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
9240; ZVFHMIN-NEXT:    vfmadd.vv v16, v24, v8, v0.t
9241; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
9242; ZVFHMIN-NEXT:    vfncvt.f.f.w v12, v16, v0.t
9243; ZVFHMIN-NEXT:    csrr a2, vlenb
9244; ZVFHMIN-NEXT:    slli a2, a2, 4
9245; ZVFHMIN-NEXT:    add a2, sp, a2
9246; ZVFHMIN-NEXT:    addi a2, a2, 16
9247; ZVFHMIN-NEXT:    vs8r.v v8, (a2) # Unknown-size Folded Spill
9248; ZVFHMIN-NEXT:    bltu a1, a0, .LBB286_2
9249; ZVFHMIN-NEXT:  # %bb.1:
9250; ZVFHMIN-NEXT:    mv a1, a0
9251; ZVFHMIN-NEXT:  .LBB286_2:
9252; ZVFHMIN-NEXT:    vmv1r.v v0, v7
9253; ZVFHMIN-NEXT:    csrr a0, vlenb
9254; ZVFHMIN-NEXT:    slli a0, a0, 5
9255; ZVFHMIN-NEXT:    add a0, sp, a0
9256; ZVFHMIN-NEXT:    addi a0, a0, 16
9257; ZVFHMIN-NEXT:    vl8r.v v24, (a0) # Unknown-size Folded Reload
9258; ZVFHMIN-NEXT:    vsetvli zero, a1, e16, m4, ta, ma
9259; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v24, v0.t
9260; ZVFHMIN-NEXT:    csrr a0, vlenb
9261; ZVFHMIN-NEXT:    slli a0, a0, 3
9262; ZVFHMIN-NEXT:    add a0, sp, a0
9263; ZVFHMIN-NEXT:    addi a0, a0, 16
9264; ZVFHMIN-NEXT:    vs8r.v v8, (a0) # Unknown-size Folded Spill
9265; ZVFHMIN-NEXT:    csrr a0, vlenb
9266; ZVFHMIN-NEXT:    slli a0, a0, 3
9267; ZVFHMIN-NEXT:    mv a1, a0
9268; ZVFHMIN-NEXT:    slli a0, a0, 1
9269; ZVFHMIN-NEXT:    add a0, a0, a1
9270; ZVFHMIN-NEXT:    add a0, sp, a0
9271; ZVFHMIN-NEXT:    addi a0, a0, 16
9272; ZVFHMIN-NEXT:    vl8r.v v24, (a0) # Unknown-size Folded Reload
9273; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v24, v0.t
9274; ZVFHMIN-NEXT:    csrr a0, vlenb
9275; ZVFHMIN-NEXT:    slli a0, a0, 5
9276; ZVFHMIN-NEXT:    add a0, sp, a0
9277; ZVFHMIN-NEXT:    addi a0, a0, 16
9278; ZVFHMIN-NEXT:    vs8r.v v16, (a0) # Unknown-size Folded Spill
9279; ZVFHMIN-NEXT:    csrr a0, vlenb
9280; ZVFHMIN-NEXT:    slli a0, a0, 3
9281; ZVFHMIN-NEXT:    mv a1, a0
9282; ZVFHMIN-NEXT:    slli a0, a0, 2
9283; ZVFHMIN-NEXT:    add a0, a0, a1
9284; ZVFHMIN-NEXT:    add a0, sp, a0
9285; ZVFHMIN-NEXT:    addi a0, a0, 16
9286; ZVFHMIN-NEXT:    vl8r.v v24, (a0) # Unknown-size Folded Reload
9287; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v24, v0.t
9288; ZVFHMIN-NEXT:    csrr a0, vlenb
9289; ZVFHMIN-NEXT:    slli a0, a0, 5
9290; ZVFHMIN-NEXT:    add a0, sp, a0
9291; ZVFHMIN-NEXT:    addi a0, a0, 16
9292; ZVFHMIN-NEXT:    vl8r.v v24, (a0) # Unknown-size Folded Reload
9293; ZVFHMIN-NEXT:    csrr a0, vlenb
9294; ZVFHMIN-NEXT:    slli a0, a0, 3
9295; ZVFHMIN-NEXT:    add a0, sp, a0
9296; ZVFHMIN-NEXT:    addi a0, a0, 16
9297; ZVFHMIN-NEXT:    vl8r.v v16, (a0) # Unknown-size Folded Reload
9298; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
9299; ZVFHMIN-NEXT:    vfmadd.vv v16, v8, v24, v0.t
9300; ZVFHMIN-NEXT:    csrr a0, vlenb
9301; ZVFHMIN-NEXT:    slli a0, a0, 4
9302; ZVFHMIN-NEXT:    add a0, sp, a0
9303; ZVFHMIN-NEXT:    addi a0, a0, 16
9304; ZVFHMIN-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
9305; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
9306; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v16, v0.t
9307; ZVFHMIN-NEXT:    csrr a0, vlenb
9308; ZVFHMIN-NEXT:    slli a0, a0, 4
9309; ZVFHMIN-NEXT:    mv a1, a0
9310; ZVFHMIN-NEXT:    slli a0, a0, 1
9311; ZVFHMIN-NEXT:    add a0, a0, a1
9312; ZVFHMIN-NEXT:    add sp, sp, a0
9313; ZVFHMIN-NEXT:    .cfi_def_cfa sp, 16
9314; ZVFHMIN-NEXT:    addi sp, sp, 16
9315; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 0
9316; ZVFHMIN-NEXT:    ret
9317  %negb = call <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half> %b, <vscale x 32 x i1> %m, i32 %evl)
9318  %negc = call <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half> %c, <vscale x 32 x i1> %m, i32 %evl)
9319  %v = call <vscale x 32 x half> @llvm.vp.fma.nxv32f16(<vscale x 32 x half> %va, <vscale x 32 x half> %negb, <vscale x 32 x half> %negc, <vscale x 32 x i1> %m, i32 %evl)
9320  ret <vscale x 32 x half> %v
9321}
9322
9323define <vscale x 32 x half> @vfnmadd_vv_nxv32f16_commuted(<vscale x 32 x half> %va, <vscale x 32 x half> %b, <vscale x 32 x half> %c, <vscale x 32 x i1> %m, i32 zeroext %evl) {
9324; ZVFH-LABEL: vfnmadd_vv_nxv32f16_commuted:
9325; ZVFH:       # %bb.0:
9326; ZVFH-NEXT:    vl8re16.v v24, (a0)
9327; ZVFH-NEXT:    vsetvli zero, a1, e16, m8, ta, ma
9328; ZVFH-NEXT:    vfnmadd.vv v8, v16, v24, v0.t
9329; ZVFH-NEXT:    ret
9330;
9331; ZVFHMIN-LABEL: vfnmadd_vv_nxv32f16_commuted:
9332; ZVFHMIN:       # %bb.0:
9333; ZVFHMIN-NEXT:    addi sp, sp, -16
9334; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 16
9335; ZVFHMIN-NEXT:    csrr a2, vlenb
9336; ZVFHMIN-NEXT:    slli a2, a2, 4
9337; ZVFHMIN-NEXT:    mv a3, a2
9338; ZVFHMIN-NEXT:    slli a2, a2, 1
9339; ZVFHMIN-NEXT:    add a2, a2, a3
9340; ZVFHMIN-NEXT:    sub sp, sp, a2
9341; ZVFHMIN-NEXT:    .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x30, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 48 * vlenb
9342; ZVFHMIN-NEXT:    vsetvli zero, a1, e16, m8, ta, ma
9343; ZVFHMIN-NEXT:    vmv1r.v v7, v0
9344; ZVFHMIN-NEXT:    csrr a2, vlenb
9345; ZVFHMIN-NEXT:    slli a2, a2, 3
9346; ZVFHMIN-NEXT:    mv a3, a2
9347; ZVFHMIN-NEXT:    slli a2, a2, 2
9348; ZVFHMIN-NEXT:    add a2, a2, a3
9349; ZVFHMIN-NEXT:    add a2, sp, a2
9350; ZVFHMIN-NEXT:    addi a2, a2, 16
9351; ZVFHMIN-NEXT:    vs8r.v v8, (a2) # Unknown-size Folded Spill
9352; ZVFHMIN-NEXT:    vl8re16.v v24, (a0)
9353; ZVFHMIN-NEXT:    lui a2, 8
9354; ZVFHMIN-NEXT:    csrr a3, vlenb
9355; ZVFHMIN-NEXT:    vxor.vx v8, v16, a2, v0.t
9356; ZVFHMIN-NEXT:    csrr a0, vlenb
9357; ZVFHMIN-NEXT:    slli a0, a0, 5
9358; ZVFHMIN-NEXT:    add a0, sp, a0
9359; ZVFHMIN-NEXT:    addi a0, a0, 16
9360; ZVFHMIN-NEXT:    vs8r.v v8, (a0) # Unknown-size Folded Spill
9361; ZVFHMIN-NEXT:    slli a0, a3, 1
9362; ZVFHMIN-NEXT:    srli a3, a3, 2
9363; ZVFHMIN-NEXT:    sub a4, a1, a0
9364; ZVFHMIN-NEXT:    vsetvli a5, zero, e8, mf2, ta, ma
9365; ZVFHMIN-NEXT:    vslidedown.vx v6, v0, a3
9366; ZVFHMIN-NEXT:    sltu a3, a1, a4
9367; ZVFHMIN-NEXT:    vsetvli zero, a1, e16, m8, ta, ma
9368; ZVFHMIN-NEXT:    vxor.vx v24, v24, a2, v0.t
9369; ZVFHMIN-NEXT:    addi a3, a3, -1
9370; ZVFHMIN-NEXT:    and a3, a3, a4
9371; ZVFHMIN-NEXT:    vmv1r.v v0, v6
9372; ZVFHMIN-NEXT:    csrr a2, vlenb
9373; ZVFHMIN-NEXT:    slli a2, a2, 3
9374; ZVFHMIN-NEXT:    mv a4, a2
9375; ZVFHMIN-NEXT:    slli a2, a2, 1
9376; ZVFHMIN-NEXT:    add a2, a2, a4
9377; ZVFHMIN-NEXT:    add a2, sp, a2
9378; ZVFHMIN-NEXT:    addi a2, a2, 16
9379; ZVFHMIN-NEXT:    vs8r.v v24, (a2) # Unknown-size Folded Spill
9380; ZVFHMIN-NEXT:    vsetvli zero, a3, e16, m4, ta, ma
9381; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v28, v0.t
9382; ZVFHMIN-NEXT:    csrr a2, vlenb
9383; ZVFHMIN-NEXT:    slli a2, a2, 4
9384; ZVFHMIN-NEXT:    add a2, sp, a2
9385; ZVFHMIN-NEXT:    addi a2, a2, 16
9386; ZVFHMIN-NEXT:    vs8r.v v8, (a2) # Unknown-size Folded Spill
9387; ZVFHMIN-NEXT:    csrr a2, vlenb
9388; ZVFHMIN-NEXT:    slli a2, a2, 5
9389; ZVFHMIN-NEXT:    add a2, sp, a2
9390; ZVFHMIN-NEXT:    addi a2, a2, 16
9391; ZVFHMIN-NEXT:    vl8r.v v8, (a2) # Unknown-size Folded Reload
9392; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v12, v0.t
9393; ZVFHMIN-NEXT:    csrr a2, vlenb
9394; ZVFHMIN-NEXT:    slli a2, a2, 3
9395; ZVFHMIN-NEXT:    add a2, sp, a2
9396; ZVFHMIN-NEXT:    addi a2, a2, 16
9397; ZVFHMIN-NEXT:    vs8r.v v24, (a2) # Unknown-size Folded Spill
9398; ZVFHMIN-NEXT:    csrr a2, vlenb
9399; ZVFHMIN-NEXT:    slli a2, a2, 3
9400; ZVFHMIN-NEXT:    mv a3, a2
9401; ZVFHMIN-NEXT:    slli a2, a2, 2
9402; ZVFHMIN-NEXT:    add a2, a2, a3
9403; ZVFHMIN-NEXT:    add a2, sp, a2
9404; ZVFHMIN-NEXT:    addi a2, a2, 16
9405; ZVFHMIN-NEXT:    vl8r.v v8, (a2) # Unknown-size Folded Reload
9406; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v12, v0.t
9407; ZVFHMIN-NEXT:    addi a2, sp, 16
9408; ZVFHMIN-NEXT:    vs8r.v v16, (a2) # Unknown-size Folded Spill
9409; ZVFHMIN-NEXT:    csrr a2, vlenb
9410; ZVFHMIN-NEXT:    slli a2, a2, 4
9411; ZVFHMIN-NEXT:    add a2, sp, a2
9412; ZVFHMIN-NEXT:    addi a2, a2, 16
9413; ZVFHMIN-NEXT:    vl8r.v v8, (a2) # Unknown-size Folded Reload
9414; ZVFHMIN-NEXT:    csrr a2, vlenb
9415; ZVFHMIN-NEXT:    slli a2, a2, 3
9416; ZVFHMIN-NEXT:    add a2, sp, a2
9417; ZVFHMIN-NEXT:    addi a2, a2, 16
9418; ZVFHMIN-NEXT:    vl8r.v v24, (a2) # Unknown-size Folded Reload
9419; ZVFHMIN-NEXT:    addi a2, sp, 16
9420; ZVFHMIN-NEXT:    vl8r.v v16, (a2) # Unknown-size Folded Reload
9421; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
9422; ZVFHMIN-NEXT:    vfmadd.vv v16, v24, v8, v0.t
9423; ZVFHMIN-NEXT:    vmv.v.v v8, v16
9424; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
9425; ZVFHMIN-NEXT:    vfncvt.f.f.w v20, v8, v0.t
9426; ZVFHMIN-NEXT:    csrr a2, vlenb
9427; ZVFHMIN-NEXT:    slli a2, a2, 3
9428; ZVFHMIN-NEXT:    add a2, sp, a2
9429; ZVFHMIN-NEXT:    addi a2, a2, 16
9430; ZVFHMIN-NEXT:    vs8r.v v16, (a2) # Unknown-size Folded Spill
9431; ZVFHMIN-NEXT:    bltu a1, a0, .LBB287_2
9432; ZVFHMIN-NEXT:  # %bb.1:
9433; ZVFHMIN-NEXT:    mv a1, a0
9434; ZVFHMIN-NEXT:  .LBB287_2:
9435; ZVFHMIN-NEXT:    vmv1r.v v0, v7
9436; ZVFHMIN-NEXT:    csrr a0, vlenb
9437; ZVFHMIN-NEXT:    slli a0, a0, 5
9438; ZVFHMIN-NEXT:    add a0, sp, a0
9439; ZVFHMIN-NEXT:    addi a0, a0, 16
9440; ZVFHMIN-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
9441; ZVFHMIN-NEXT:    vsetvli zero, a1, e16, m4, ta, ma
9442; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v8, v0.t
9443; ZVFHMIN-NEXT:    csrr a0, vlenb
9444; ZVFHMIN-NEXT:    slli a0, a0, 4
9445; ZVFHMIN-NEXT:    add a0, sp, a0
9446; ZVFHMIN-NEXT:    addi a0, a0, 16
9447; ZVFHMIN-NEXT:    vs8r.v v24, (a0) # Unknown-size Folded Spill
9448; ZVFHMIN-NEXT:    csrr a0, vlenb
9449; ZVFHMIN-NEXT:    slli a0, a0, 3
9450; ZVFHMIN-NEXT:    mv a1, a0
9451; ZVFHMIN-NEXT:    slli a0, a0, 1
9452; ZVFHMIN-NEXT:    add a0, a0, a1
9453; ZVFHMIN-NEXT:    add a0, sp, a0
9454; ZVFHMIN-NEXT:    addi a0, a0, 16
9455; ZVFHMIN-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
9456; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v8, v0.t
9457; ZVFHMIN-NEXT:    csrr a0, vlenb
9458; ZVFHMIN-NEXT:    slli a0, a0, 5
9459; ZVFHMIN-NEXT:    add a0, sp, a0
9460; ZVFHMIN-NEXT:    addi a0, a0, 16
9461; ZVFHMIN-NEXT:    vs8r.v v16, (a0) # Unknown-size Folded Spill
9462; ZVFHMIN-NEXT:    csrr a0, vlenb
9463; ZVFHMIN-NEXT:    slli a0, a0, 3
9464; ZVFHMIN-NEXT:    mv a1, a0
9465; ZVFHMIN-NEXT:    slli a0, a0, 2
9466; ZVFHMIN-NEXT:    add a0, a0, a1
9467; ZVFHMIN-NEXT:    add a0, sp, a0
9468; ZVFHMIN-NEXT:    addi a0, a0, 16
9469; ZVFHMIN-NEXT:    vl8r.v v24, (a0) # Unknown-size Folded Reload
9470; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v24, v0.t
9471; ZVFHMIN-NEXT:    csrr a0, vlenb
9472; ZVFHMIN-NEXT:    slli a0, a0, 4
9473; ZVFHMIN-NEXT:    add a0, sp, a0
9474; ZVFHMIN-NEXT:    addi a0, a0, 16
9475; ZVFHMIN-NEXT:    vl8r.v v24, (a0) # Unknown-size Folded Reload
9476; ZVFHMIN-NEXT:    csrr a0, vlenb
9477; ZVFHMIN-NEXT:    slli a0, a0, 5
9478; ZVFHMIN-NEXT:    add a0, sp, a0
9479; ZVFHMIN-NEXT:    addi a0, a0, 16
9480; ZVFHMIN-NEXT:    vl8r.v v16, (a0) # Unknown-size Folded Reload
9481; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
9482; ZVFHMIN-NEXT:    vfmadd.vv v8, v24, v16, v0.t
9483; ZVFHMIN-NEXT:    vmv.v.v v16, v8
9484; ZVFHMIN-NEXT:    csrr a0, vlenb
9485; ZVFHMIN-NEXT:    slli a0, a0, 3
9486; ZVFHMIN-NEXT:    add a0, sp, a0
9487; ZVFHMIN-NEXT:    addi a0, a0, 16
9488; ZVFHMIN-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
9489; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
9490; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v16, v0.t
9491; ZVFHMIN-NEXT:    csrr a0, vlenb
9492; ZVFHMIN-NEXT:    slli a0, a0, 4
9493; ZVFHMIN-NEXT:    mv a1, a0
9494; ZVFHMIN-NEXT:    slli a0, a0, 1
9495; ZVFHMIN-NEXT:    add a0, a0, a1
9496; ZVFHMIN-NEXT:    add sp, sp, a0
9497; ZVFHMIN-NEXT:    .cfi_def_cfa sp, 16
9498; ZVFHMIN-NEXT:    addi sp, sp, 16
9499; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 0
9500; ZVFHMIN-NEXT:    ret
9501  %negb = call <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half> %b, <vscale x 32 x i1> %m, i32 %evl)
9502  %negc = call <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half> %c, <vscale x 32 x i1> %m, i32 %evl)
9503  %v = call <vscale x 32 x half> @llvm.vp.fma.nxv32f16(<vscale x 32 x half> %negb, <vscale x 32 x half> %va, <vscale x 32 x half> %negc, <vscale x 32 x i1> %m, i32 %evl)
9504  ret <vscale x 32 x half> %v
9505}
9506
9507define <vscale x 32 x half> @vfnmadd_vv_nxv32f16_unmasked(<vscale x 32 x half> %va, <vscale x 32 x half> %b, <vscale x 32 x half> %c, i32 zeroext %evl) {
9508; ZVFH-LABEL: vfnmadd_vv_nxv32f16_unmasked:
9509; ZVFH:       # %bb.0:
9510; ZVFH-NEXT:    vl8re16.v v24, (a0)
9511; ZVFH-NEXT:    vsetvli zero, a1, e16, m8, ta, ma
9512; ZVFH-NEXT:    vfnmadd.vv v8, v16, v24
9513; ZVFH-NEXT:    ret
9514;
9515; ZVFHMIN-LABEL: vfnmadd_vv_nxv32f16_unmasked:
9516; ZVFHMIN:       # %bb.0:
9517; ZVFHMIN-NEXT:    addi sp, sp, -16
9518; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 16
9519; ZVFHMIN-NEXT:    csrr a2, vlenb
9520; ZVFHMIN-NEXT:    slli a2, a2, 5
9521; ZVFHMIN-NEXT:    sub sp, sp, a2
9522; ZVFHMIN-NEXT:    .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 32 * vlenb
9523; ZVFHMIN-NEXT:    csrr a2, vlenb
9524; ZVFHMIN-NEXT:    slli a2, a2, 3
9525; ZVFHMIN-NEXT:    mv a3, a2
9526; ZVFHMIN-NEXT:    slli a2, a2, 1
9527; ZVFHMIN-NEXT:    add a2, a2, a3
9528; ZVFHMIN-NEXT:    add a2, sp, a2
9529; ZVFHMIN-NEXT:    addi a2, a2, 16
9530; ZVFHMIN-NEXT:    vs8r.v v8, (a2) # Unknown-size Folded Spill
9531; ZVFHMIN-NEXT:    vl8re16.v v24, (a0)
9532; ZVFHMIN-NEXT:    lui a2, 8
9533; ZVFHMIN-NEXT:    vsetvli a0, zero, e8, m4, ta, ma
9534; ZVFHMIN-NEXT:    vmset.m v8
9535; ZVFHMIN-NEXT:    csrr a3, vlenb
9536; ZVFHMIN-NEXT:    vsetvli zero, a1, e16, m8, ta, ma
9537; ZVFHMIN-NEXT:    vxor.vx v16, v16, a2
9538; ZVFHMIN-NEXT:    slli a0, a3, 1
9539; ZVFHMIN-NEXT:    srli a3, a3, 2
9540; ZVFHMIN-NEXT:    sub a4, a1, a0
9541; ZVFHMIN-NEXT:    vsetvli a5, zero, e8, mf2, ta, ma
9542; ZVFHMIN-NEXT:    vslidedown.vx v0, v8, a3
9543; ZVFHMIN-NEXT:    sltu a3, a1, a4
9544; ZVFHMIN-NEXT:    vsetvli zero, a1, e16, m8, ta, ma
9545; ZVFHMIN-NEXT:    vxor.vx v8, v24, a2
9546; ZVFHMIN-NEXT:    addi a3, a3, -1
9547; ZVFHMIN-NEXT:    and a3, a3, a4
9548; ZVFHMIN-NEXT:    csrr a2, vlenb
9549; ZVFHMIN-NEXT:    slli a2, a2, 3
9550; ZVFHMIN-NEXT:    add a2, sp, a2
9551; ZVFHMIN-NEXT:    addi a2, a2, 16
9552; ZVFHMIN-NEXT:    vs8r.v v8, (a2) # Unknown-size Folded Spill
9553; ZVFHMIN-NEXT:    vsetvli zero, a3, e16, m4, ta, ma
9554; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v12, v0.t
9555; ZVFHMIN-NEXT:    addi a2, sp, 16
9556; ZVFHMIN-NEXT:    vs8r.v v24, (a2) # Unknown-size Folded Spill
9557; ZVFHMIN-NEXT:    csrr a2, vlenb
9558; ZVFHMIN-NEXT:    slli a2, a2, 4
9559; ZVFHMIN-NEXT:    add a2, sp, a2
9560; ZVFHMIN-NEXT:    addi a2, a2, 16
9561; ZVFHMIN-NEXT:    vs8r.v v16, (a2) # Unknown-size Folded Spill
9562; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v20, v0.t
9563; ZVFHMIN-NEXT:    csrr a2, vlenb
9564; ZVFHMIN-NEXT:    slli a2, a2, 3
9565; ZVFHMIN-NEXT:    mv a3, a2
9566; ZVFHMIN-NEXT:    slli a2, a2, 1
9567; ZVFHMIN-NEXT:    add a2, a2, a3
9568; ZVFHMIN-NEXT:    add a2, sp, a2
9569; ZVFHMIN-NEXT:    addi a2, a2, 16
9570; ZVFHMIN-NEXT:    vl8r.v v16, (a2) # Unknown-size Folded Reload
9571; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v20, v0.t
9572; ZVFHMIN-NEXT:    addi a2, sp, 16
9573; ZVFHMIN-NEXT:    vl8r.v v16, (a2) # Unknown-size Folded Reload
9574; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
9575; ZVFHMIN-NEXT:    vfmadd.vv v24, v8, v16, v0.t
9576; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
9577; ZVFHMIN-NEXT:    vfncvt.f.f.w v12, v24, v0.t
9578; ZVFHMIN-NEXT:    bltu a1, a0, .LBB288_2
9579; ZVFHMIN-NEXT:  # %bb.1:
9580; ZVFHMIN-NEXT:    mv a1, a0
9581; ZVFHMIN-NEXT:  .LBB288_2:
9582; ZVFHMIN-NEXT:    csrr a0, vlenb
9583; ZVFHMIN-NEXT:    slli a0, a0, 4
9584; ZVFHMIN-NEXT:    add a0, sp, a0
9585; ZVFHMIN-NEXT:    addi a0, a0, 16
9586; ZVFHMIN-NEXT:    vl8r.v v16, (a0) # Unknown-size Folded Reload
9587; ZVFHMIN-NEXT:    vsetvli zero, a1, e16, m4, ta, ma
9588; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v16
9589; ZVFHMIN-NEXT:    addi a0, sp, 16
9590; ZVFHMIN-NEXT:    vs8r.v v24, (a0) # Unknown-size Folded Spill
9591; ZVFHMIN-NEXT:    csrr a0, vlenb
9592; ZVFHMIN-NEXT:    slli a0, a0, 3
9593; ZVFHMIN-NEXT:    add a0, sp, a0
9594; ZVFHMIN-NEXT:    addi a0, a0, 16
9595; ZVFHMIN-NEXT:    vl8r.v v16, (a0) # Unknown-size Folded Reload
9596; ZVFHMIN-NEXT:    vfwcvt.f.f.v v0, v16
9597; ZVFHMIN-NEXT:    csrr a0, vlenb
9598; ZVFHMIN-NEXT:    slli a0, a0, 3
9599; ZVFHMIN-NEXT:    mv a1, a0
9600; ZVFHMIN-NEXT:    slli a0, a0, 1
9601; ZVFHMIN-NEXT:    add a0, a0, a1
9602; ZVFHMIN-NEXT:    add a0, sp, a0
9603; ZVFHMIN-NEXT:    addi a0, a0, 16
9604; ZVFHMIN-NEXT:    vl8r.v v24, (a0) # Unknown-size Folded Reload
9605; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v24
9606; ZVFHMIN-NEXT:    addi a0, sp, 16
9607; ZVFHMIN-NEXT:    vl8r.v v24, (a0) # Unknown-size Folded Reload
9608; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
9609; ZVFHMIN-NEXT:    vfmadd.vv v16, v24, v0
9610; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
9611; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v16
9612; ZVFHMIN-NEXT:    csrr a0, vlenb
9613; ZVFHMIN-NEXT:    slli a0, a0, 5
9614; ZVFHMIN-NEXT:    add sp, sp, a0
9615; ZVFHMIN-NEXT:    .cfi_def_cfa sp, 16
9616; ZVFHMIN-NEXT:    addi sp, sp, 16
9617; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 0
9618; ZVFHMIN-NEXT:    ret
9619  %negb = call <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half> %b, <vscale x 32 x i1> splat (i1 true), i32 %evl)
9620  %negc = call <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half> %c, <vscale x 32 x i1> splat (i1 true), i32 %evl)
9621  %v = call <vscale x 32 x half> @llvm.vp.fma.nxv32f16(<vscale x 32 x half> %va, <vscale x 32 x half> %negb, <vscale x 32 x half> %negc, <vscale x 32 x i1> splat (i1 true), i32 %evl)
9622  ret <vscale x 32 x half> %v
9623}
9624
9625define <vscale x 32 x half> @vfnmadd_vv_nxv32f16_unmasked_commuted(<vscale x 32 x half> %va, <vscale x 32 x half> %b, <vscale x 32 x half> %c, i32 zeroext %evl) {
9626; ZVFH-LABEL: vfnmadd_vv_nxv32f16_unmasked_commuted:
9627; ZVFH:       # %bb.0:
9628; ZVFH-NEXT:    vl8re16.v v24, (a0)
9629; ZVFH-NEXT:    vsetvli zero, a1, e16, m8, ta, ma
9630; ZVFH-NEXT:    vfnmadd.vv v8, v16, v24
9631; ZVFH-NEXT:    ret
9632;
9633; ZVFHMIN-LABEL: vfnmadd_vv_nxv32f16_unmasked_commuted:
9634; ZVFHMIN:       # %bb.0:
9635; ZVFHMIN-NEXT:    addi sp, sp, -16
9636; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 16
9637; ZVFHMIN-NEXT:    csrr a2, vlenb
9638; ZVFHMIN-NEXT:    slli a2, a2, 5
9639; ZVFHMIN-NEXT:    sub sp, sp, a2
9640; ZVFHMIN-NEXT:    .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 32 * vlenb
9641; ZVFHMIN-NEXT:    csrr a2, vlenb
9642; ZVFHMIN-NEXT:    slli a2, a2, 3
9643; ZVFHMIN-NEXT:    mv a3, a2
9644; ZVFHMIN-NEXT:    slli a2, a2, 1
9645; ZVFHMIN-NEXT:    add a2, a2, a3
9646; ZVFHMIN-NEXT:    add a2, sp, a2
9647; ZVFHMIN-NEXT:    addi a2, a2, 16
9648; ZVFHMIN-NEXT:    vs8r.v v8, (a2) # Unknown-size Folded Spill
9649; ZVFHMIN-NEXT:    vl8re16.v v24, (a0)
9650; ZVFHMIN-NEXT:    lui a2, 8
9651; ZVFHMIN-NEXT:    vsetvli a0, zero, e8, m4, ta, ma
9652; ZVFHMIN-NEXT:    vmset.m v7
9653; ZVFHMIN-NEXT:    csrr a3, vlenb
9654; ZVFHMIN-NEXT:    vsetvli zero, a1, e16, m8, ta, ma
9655; ZVFHMIN-NEXT:    vxor.vx v8, v16, a2
9656; ZVFHMIN-NEXT:    slli a0, a3, 1
9657; ZVFHMIN-NEXT:    srli a3, a3, 2
9658; ZVFHMIN-NEXT:    sub a4, a1, a0
9659; ZVFHMIN-NEXT:    vsetvli a5, zero, e8, mf2, ta, ma
9660; ZVFHMIN-NEXT:    vslidedown.vx v0, v7, a3
9661; ZVFHMIN-NEXT:    sltu a3, a1, a4
9662; ZVFHMIN-NEXT:    vsetvli zero, a1, e16, m8, ta, ma
9663; ZVFHMIN-NEXT:    vxor.vx v24, v24, a2
9664; ZVFHMIN-NEXT:    addi a3, a3, -1
9665; ZVFHMIN-NEXT:    and a3, a3, a4
9666; ZVFHMIN-NEXT:    csrr a2, vlenb
9667; ZVFHMIN-NEXT:    slli a2, a2, 3
9668; ZVFHMIN-NEXT:    add a2, sp, a2
9669; ZVFHMIN-NEXT:    addi a2, a2, 16
9670; ZVFHMIN-NEXT:    vs8r.v v24, (a2) # Unknown-size Folded Spill
9671; ZVFHMIN-NEXT:    vsetvli zero, a3, e16, m4, ta, ma
9672; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v28, v0.t
9673; ZVFHMIN-NEXT:    addi a2, sp, 16
9674; ZVFHMIN-NEXT:    vs8r.v v16, (a2) # Unknown-size Folded Spill
9675; ZVFHMIN-NEXT:    vmv4r.v v16, v8
9676; ZVFHMIN-NEXT:    csrr a2, vlenb
9677; ZVFHMIN-NEXT:    slli a2, a2, 4
9678; ZVFHMIN-NEXT:    add a2, sp, a2
9679; ZVFHMIN-NEXT:    addi a2, a2, 16
9680; ZVFHMIN-NEXT:    vs8r.v v16, (a2) # Unknown-size Folded Spill
9681; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v12, v0.t
9682; ZVFHMIN-NEXT:    csrr a2, vlenb
9683; ZVFHMIN-NEXT:    slli a2, a2, 3
9684; ZVFHMIN-NEXT:    mv a3, a2
9685; ZVFHMIN-NEXT:    slli a2, a2, 1
9686; ZVFHMIN-NEXT:    add a2, a2, a3
9687; ZVFHMIN-NEXT:    add a2, sp, a2
9688; ZVFHMIN-NEXT:    addi a2, a2, 16
9689; ZVFHMIN-NEXT:    vl8r.v v8, (a2) # Unknown-size Folded Reload
9690; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v12, v0.t
9691; ZVFHMIN-NEXT:    addi a2, sp, 16
9692; ZVFHMIN-NEXT:    vl8r.v v8, (a2) # Unknown-size Folded Reload
9693; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
9694; ZVFHMIN-NEXT:    vfmadd.vv v16, v24, v8, v0.t
9695; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
9696; ZVFHMIN-NEXT:    vfncvt.f.f.w v12, v16, v0.t
9697; ZVFHMIN-NEXT:    bltu a1, a0, .LBB289_2
9698; ZVFHMIN-NEXT:  # %bb.1:
9699; ZVFHMIN-NEXT:    mv a1, a0
9700; ZVFHMIN-NEXT:  .LBB289_2:
9701; ZVFHMIN-NEXT:    csrr a0, vlenb
9702; ZVFHMIN-NEXT:    slli a0, a0, 4
9703; ZVFHMIN-NEXT:    add a0, sp, a0
9704; ZVFHMIN-NEXT:    addi a0, a0, 16
9705; ZVFHMIN-NEXT:    vl8r.v v16, (a0) # Unknown-size Folded Reload
9706; ZVFHMIN-NEXT:    vsetvli zero, a1, e16, m4, ta, ma
9707; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v16
9708; ZVFHMIN-NEXT:    addi a0, sp, 16
9709; ZVFHMIN-NEXT:    vs8r.v v24, (a0) # Unknown-size Folded Spill
9710; ZVFHMIN-NEXT:    csrr a0, vlenb
9711; ZVFHMIN-NEXT:    slli a0, a0, 3
9712; ZVFHMIN-NEXT:    add a0, sp, a0
9713; ZVFHMIN-NEXT:    addi a0, a0, 16
9714; ZVFHMIN-NEXT:    vl8r.v v16, (a0) # Unknown-size Folded Reload
9715; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v16
9716; ZVFHMIN-NEXT:    csrr a0, vlenb
9717; ZVFHMIN-NEXT:    slli a0, a0, 3
9718; ZVFHMIN-NEXT:    mv a1, a0
9719; ZVFHMIN-NEXT:    slli a0, a0, 1
9720; ZVFHMIN-NEXT:    add a0, a0, a1
9721; ZVFHMIN-NEXT:    add a0, sp, a0
9722; ZVFHMIN-NEXT:    addi a0, a0, 16
9723; ZVFHMIN-NEXT:    vl8r.v v16, (a0) # Unknown-size Folded Reload
9724; ZVFHMIN-NEXT:    vfwcvt.f.f.v v0, v16
9725; ZVFHMIN-NEXT:    addi a0, sp, 16
9726; ZVFHMIN-NEXT:    vl8r.v v16, (a0) # Unknown-size Folded Reload
9727; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
9728; ZVFHMIN-NEXT:    vfmadd.vv v0, v16, v24
9729; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
9730; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v0
9731; ZVFHMIN-NEXT:    csrr a0, vlenb
9732; ZVFHMIN-NEXT:    slli a0, a0, 5
9733; ZVFHMIN-NEXT:    add sp, sp, a0
9734; ZVFHMIN-NEXT:    .cfi_def_cfa sp, 16
9735; ZVFHMIN-NEXT:    addi sp, sp, 16
9736; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 0
9737; ZVFHMIN-NEXT:    ret
9738  %negb = call <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half> %b, <vscale x 32 x i1> splat (i1 true), i32 %evl)
9739  %negc = call <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half> %c, <vscale x 32 x i1> splat (i1 true), i32 %evl)
9740  %v = call <vscale x 32 x half> @llvm.vp.fma.nxv32f16(<vscale x 32 x half> %negb, <vscale x 32 x half> %va, <vscale x 32 x half> %negc, <vscale x 32 x i1> splat (i1 true), i32 %evl)
9741  ret <vscale x 32 x half> %v
9742}
9743
9744define <vscale x 32 x half> @vfnmadd_vf_nxv32f16(<vscale x 32 x half> %va, half %b, <vscale x 32 x half> %vc, <vscale x 32 x i1> %m, i32 zeroext %evl) {
9745; ZVFH-LABEL: vfnmadd_vf_nxv32f16:
9746; ZVFH:       # %bb.0:
9747; ZVFH-NEXT:    vsetvli zero, a0, e16, m8, ta, ma
9748; ZVFH-NEXT:    vfnmadd.vf v8, fa0, v16, v0.t
9749; ZVFH-NEXT:    ret
9750;
9751; ZVFHMIN-LABEL: vfnmadd_vf_nxv32f16:
9752; ZVFHMIN:       # %bb.0:
9753; ZVFHMIN-NEXT:    addi sp, sp, -16
9754; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 16
9755; ZVFHMIN-NEXT:    csrr a1, vlenb
9756; ZVFHMIN-NEXT:    slli a1, a1, 3
9757; ZVFHMIN-NEXT:    mv a2, a1
9758; ZVFHMIN-NEXT:    slli a1, a1, 2
9759; ZVFHMIN-NEXT:    add a1, a1, a2
9760; ZVFHMIN-NEXT:    sub sp, sp, a1
9761; ZVFHMIN-NEXT:    .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x28, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 40 * vlenb
9762; ZVFHMIN-NEXT:    vsetvli a1, zero, e16, m8, ta, ma
9763; ZVFHMIN-NEXT:    vmv1r.v v7, v0
9764; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
9765; ZVFHMIN-NEXT:    lui a2, 8
9766; ZVFHMIN-NEXT:    csrr a3, vlenb
9767; ZVFHMIN-NEXT:    vmv.v.x v24, a1
9768; ZVFHMIN-NEXT:    csrr a1, vlenb
9769; ZVFHMIN-NEXT:    slli a1, a1, 5
9770; ZVFHMIN-NEXT:    add a1, sp, a1
9771; ZVFHMIN-NEXT:    addi a1, a1, 16
9772; ZVFHMIN-NEXT:    vs8r.v v24, (a1) # Unknown-size Folded Spill
9773; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m8, ta, ma
9774; ZVFHMIN-NEXT:    vxor.vx v24, v8, a2, v0.t
9775; ZVFHMIN-NEXT:    vxor.vx v16, v16, a2, v0.t
9776; ZVFHMIN-NEXT:    slli a1, a3, 1
9777; ZVFHMIN-NEXT:    srli a3, a3, 2
9778; ZVFHMIN-NEXT:    sub a2, a0, a1
9779; ZVFHMIN-NEXT:    vsetvli a4, zero, e8, mf2, ta, ma
9780; ZVFHMIN-NEXT:    vslidedown.vx v0, v0, a3
9781; ZVFHMIN-NEXT:    sltu a3, a0, a2
9782; ZVFHMIN-NEXT:    addi a3, a3, -1
9783; ZVFHMIN-NEXT:    and a2, a3, a2
9784; ZVFHMIN-NEXT:    csrr a3, vlenb
9785; ZVFHMIN-NEXT:    slli a3, a3, 4
9786; ZVFHMIN-NEXT:    add a3, sp, a3
9787; ZVFHMIN-NEXT:    addi a3, a3, 16
9788; ZVFHMIN-NEXT:    vs8r.v v16, (a3) # Unknown-size Folded Spill
9789; ZVFHMIN-NEXT:    vsetvli zero, a2, e16, m4, ta, ma
9790; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v20, v0.t
9791; ZVFHMIN-NEXT:    csrr a2, vlenb
9792; ZVFHMIN-NEXT:    slli a2, a2, 3
9793; ZVFHMIN-NEXT:    add a2, sp, a2
9794; ZVFHMIN-NEXT:    addi a2, a2, 16
9795; ZVFHMIN-NEXT:    vs8r.v v8, (a2) # Unknown-size Folded Spill
9796; ZVFHMIN-NEXT:    csrr a2, vlenb
9797; ZVFHMIN-NEXT:    slli a2, a2, 3
9798; ZVFHMIN-NEXT:    mv a3, a2
9799; ZVFHMIN-NEXT:    slli a2, a2, 1
9800; ZVFHMIN-NEXT:    add a2, a2, a3
9801; ZVFHMIN-NEXT:    add a2, sp, a2
9802; ZVFHMIN-NEXT:    addi a2, a2, 16
9803; ZVFHMIN-NEXT:    vs8r.v v24, (a2) # Unknown-size Folded Spill
9804; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v28, v0.t
9805; ZVFHMIN-NEXT:    csrr a2, vlenb
9806; ZVFHMIN-NEXT:    slli a2, a2, 5
9807; ZVFHMIN-NEXT:    add a2, sp, a2
9808; ZVFHMIN-NEXT:    addi a2, a2, 16
9809; ZVFHMIN-NEXT:    vl8r.v v8, (a2) # Unknown-size Folded Reload
9810; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v12, v0.t
9811; ZVFHMIN-NEXT:    csrr a2, vlenb
9812; ZVFHMIN-NEXT:    slli a2, a2, 3
9813; ZVFHMIN-NEXT:    add a2, sp, a2
9814; ZVFHMIN-NEXT:    addi a2, a2, 16
9815; ZVFHMIN-NEXT:    vl8r.v v8, (a2) # Unknown-size Folded Reload
9816; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
9817; ZVFHMIN-NEXT:    vfmadd.vv v24, v16, v8, v0.t
9818; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
9819; ZVFHMIN-NEXT:    vfncvt.f.f.w v12, v24, v0.t
9820; ZVFHMIN-NEXT:    addi a2, sp, 16
9821; ZVFHMIN-NEXT:    vs8r.v v8, (a2) # Unknown-size Folded Spill
9822; ZVFHMIN-NEXT:    bltu a0, a1, .LBB290_2
9823; ZVFHMIN-NEXT:  # %bb.1:
9824; ZVFHMIN-NEXT:    mv a0, a1
9825; ZVFHMIN-NEXT:  .LBB290_2:
9826; ZVFHMIN-NEXT:    vmv1r.v v0, v7
9827; ZVFHMIN-NEXT:    csrr a1, vlenb
9828; ZVFHMIN-NEXT:    slli a1, a1, 4
9829; ZVFHMIN-NEXT:    add a1, sp, a1
9830; ZVFHMIN-NEXT:    addi a1, a1, 16
9831; ZVFHMIN-NEXT:    vl8r.v v8, (a1) # Unknown-size Folded Reload
9832; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
9833; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v8, v0.t
9834; ZVFHMIN-NEXT:    csrr a0, vlenb
9835; ZVFHMIN-NEXT:    slli a0, a0, 3
9836; ZVFHMIN-NEXT:    add a0, sp, a0
9837; ZVFHMIN-NEXT:    addi a0, a0, 16
9838; ZVFHMIN-NEXT:    vs8r.v v24, (a0) # Unknown-size Folded Spill
9839; ZVFHMIN-NEXT:    csrr a0, vlenb
9840; ZVFHMIN-NEXT:    slli a0, a0, 3
9841; ZVFHMIN-NEXT:    mv a1, a0
9842; ZVFHMIN-NEXT:    slli a0, a0, 1
9843; ZVFHMIN-NEXT:    add a0, a0, a1
9844; ZVFHMIN-NEXT:    add a0, sp, a0
9845; ZVFHMIN-NEXT:    addi a0, a0, 16
9846; ZVFHMIN-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
9847; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v8, v0.t
9848; ZVFHMIN-NEXT:    csrr a0, vlenb
9849; ZVFHMIN-NEXT:    slli a0, a0, 4
9850; ZVFHMIN-NEXT:    add a0, sp, a0
9851; ZVFHMIN-NEXT:    addi a0, a0, 16
9852; ZVFHMIN-NEXT:    vs8r.v v16, (a0) # Unknown-size Folded Spill
9853; ZVFHMIN-NEXT:    csrr a0, vlenb
9854; ZVFHMIN-NEXT:    slli a0, a0, 5
9855; ZVFHMIN-NEXT:    add a0, sp, a0
9856; ZVFHMIN-NEXT:    addi a0, a0, 16
9857; ZVFHMIN-NEXT:    vl8r.v v24, (a0) # Unknown-size Folded Reload
9858; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v24, v0.t
9859; ZVFHMIN-NEXT:    csrr a0, vlenb
9860; ZVFHMIN-NEXT:    slli a0, a0, 3
9861; ZVFHMIN-NEXT:    add a0, sp, a0
9862; ZVFHMIN-NEXT:    addi a0, a0, 16
9863; ZVFHMIN-NEXT:    vl8r.v v24, (a0) # Unknown-size Folded Reload
9864; ZVFHMIN-NEXT:    csrr a0, vlenb
9865; ZVFHMIN-NEXT:    slli a0, a0, 4
9866; ZVFHMIN-NEXT:    add a0, sp, a0
9867; ZVFHMIN-NEXT:    addi a0, a0, 16
9868; ZVFHMIN-NEXT:    vl8r.v v16, (a0) # Unknown-size Folded Reload
9869; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
9870; ZVFHMIN-NEXT:    vfmadd.vv v8, v16, v24, v0.t
9871; ZVFHMIN-NEXT:    vmv.v.v v16, v8
9872; ZVFHMIN-NEXT:    addi a0, sp, 16
9873; ZVFHMIN-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
9874; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
9875; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v16, v0.t
9876; ZVFHMIN-NEXT:    csrr a0, vlenb
9877; ZVFHMIN-NEXT:    slli a0, a0, 3
9878; ZVFHMIN-NEXT:    mv a1, a0
9879; ZVFHMIN-NEXT:    slli a0, a0, 2
9880; ZVFHMIN-NEXT:    add a0, a0, a1
9881; ZVFHMIN-NEXT:    add sp, sp, a0
9882; ZVFHMIN-NEXT:    .cfi_def_cfa sp, 16
9883; ZVFHMIN-NEXT:    addi sp, sp, 16
9884; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 0
9885; ZVFHMIN-NEXT:    ret
9886  %elt.head = insertelement <vscale x 32 x half> poison, half %b, i32 0
9887  %vb = shufflevector <vscale x 32 x half> %elt.head, <vscale x 32 x half> poison, <vscale x 32 x i32> zeroinitializer
9888  %negva = call <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half> %va, <vscale x 32 x i1> %m, i32 %evl)
9889  %negvc = call <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half> %vc, <vscale x 32 x i1> %m, i32 %evl)
9890  %v = call <vscale x 32 x half> @llvm.vp.fma.nxv32f16(<vscale x 32 x half> %negva, <vscale x 32 x half> %vb, <vscale x 32 x half> %negvc, <vscale x 32 x i1> %m, i32 %evl)
9891  ret <vscale x 32 x half> %v
9892}
9893
9894define <vscale x 32 x half> @vfnmadd_vf_nxv32f16_commute(<vscale x 32 x half> %va, half %b, <vscale x 32 x half> %vc, <vscale x 32 x i1> %m, i32 zeroext %evl) {
9895; ZVFH-LABEL: vfnmadd_vf_nxv32f16_commute:
9896; ZVFH:       # %bb.0:
9897; ZVFH-NEXT:    vsetvli zero, a0, e16, m8, ta, ma
9898; ZVFH-NEXT:    vfnmadd.vf v8, fa0, v16, v0.t
9899; ZVFH-NEXT:    ret
9900;
9901; ZVFHMIN-LABEL: vfnmadd_vf_nxv32f16_commute:
9902; ZVFHMIN:       # %bb.0:
9903; ZVFHMIN-NEXT:    addi sp, sp, -16
9904; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 16
9905; ZVFHMIN-NEXT:    csrr a1, vlenb
9906; ZVFHMIN-NEXT:    slli a1, a1, 3
9907; ZVFHMIN-NEXT:    mv a2, a1
9908; ZVFHMIN-NEXT:    slli a1, a1, 2
9909; ZVFHMIN-NEXT:    add a1, a1, a2
9910; ZVFHMIN-NEXT:    sub sp, sp, a1
9911; ZVFHMIN-NEXT:    .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x28, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 40 * vlenb
9912; ZVFHMIN-NEXT:    vsetvli a1, zero, e16, m8, ta, ma
9913; ZVFHMIN-NEXT:    vmv1r.v v7, v0
9914; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
9915; ZVFHMIN-NEXT:    lui a2, 8
9916; ZVFHMIN-NEXT:    csrr a3, vlenb
9917; ZVFHMIN-NEXT:    vmv.v.x v24, a1
9918; ZVFHMIN-NEXT:    csrr a1, vlenb
9919; ZVFHMIN-NEXT:    slli a1, a1, 5
9920; ZVFHMIN-NEXT:    add a1, sp, a1
9921; ZVFHMIN-NEXT:    addi a1, a1, 16
9922; ZVFHMIN-NEXT:    vs8r.v v24, (a1) # Unknown-size Folded Spill
9923; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m8, ta, ma
9924; ZVFHMIN-NEXT:    vxor.vx v24, v8, a2, v0.t
9925; ZVFHMIN-NEXT:    vxor.vx v16, v16, a2, v0.t
9926; ZVFHMIN-NEXT:    slli a1, a3, 1
9927; ZVFHMIN-NEXT:    srli a3, a3, 2
9928; ZVFHMIN-NEXT:    sub a2, a0, a1
9929; ZVFHMIN-NEXT:    vsetvli a4, zero, e8, mf2, ta, ma
9930; ZVFHMIN-NEXT:    vslidedown.vx v0, v0, a3
9931; ZVFHMIN-NEXT:    sltu a3, a0, a2
9932; ZVFHMIN-NEXT:    addi a3, a3, -1
9933; ZVFHMIN-NEXT:    and a2, a3, a2
9934; ZVFHMIN-NEXT:    csrr a3, vlenb
9935; ZVFHMIN-NEXT:    slli a3, a3, 4
9936; ZVFHMIN-NEXT:    add a3, sp, a3
9937; ZVFHMIN-NEXT:    addi a3, a3, 16
9938; ZVFHMIN-NEXT:    vs8r.v v16, (a3) # Unknown-size Folded Spill
9939; ZVFHMIN-NEXT:    vsetvli zero, a2, e16, m4, ta, ma
9940; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v20, v0.t
9941; ZVFHMIN-NEXT:    csrr a2, vlenb
9942; ZVFHMIN-NEXT:    slli a2, a2, 3
9943; ZVFHMIN-NEXT:    add a2, sp, a2
9944; ZVFHMIN-NEXT:    addi a2, a2, 16
9945; ZVFHMIN-NEXT:    vs8r.v v8, (a2) # Unknown-size Folded Spill
9946; ZVFHMIN-NEXT:    csrr a2, vlenb
9947; ZVFHMIN-NEXT:    slli a2, a2, 3
9948; ZVFHMIN-NEXT:    mv a3, a2
9949; ZVFHMIN-NEXT:    slli a2, a2, 1
9950; ZVFHMIN-NEXT:    add a2, a2, a3
9951; ZVFHMIN-NEXT:    add a2, sp, a2
9952; ZVFHMIN-NEXT:    addi a2, a2, 16
9953; ZVFHMIN-NEXT:    vs8r.v v24, (a2) # Unknown-size Folded Spill
9954; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v28, v0.t
9955; ZVFHMIN-NEXT:    csrr a2, vlenb
9956; ZVFHMIN-NEXT:    slli a2, a2, 5
9957; ZVFHMIN-NEXT:    add a2, sp, a2
9958; ZVFHMIN-NEXT:    addi a2, a2, 16
9959; ZVFHMIN-NEXT:    vl8r.v v8, (a2) # Unknown-size Folded Reload
9960; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v12, v0.t
9961; ZVFHMIN-NEXT:    csrr a2, vlenb
9962; ZVFHMIN-NEXT:    slli a2, a2, 3
9963; ZVFHMIN-NEXT:    add a2, sp, a2
9964; ZVFHMIN-NEXT:    addi a2, a2, 16
9965; ZVFHMIN-NEXT:    vl8r.v v8, (a2) # Unknown-size Folded Reload
9966; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
9967; ZVFHMIN-NEXT:    vfmadd.vv v16, v24, v8, v0.t
9968; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
9969; ZVFHMIN-NEXT:    vfncvt.f.f.w v12, v16, v0.t
9970; ZVFHMIN-NEXT:    addi a2, sp, 16
9971; ZVFHMIN-NEXT:    vs8r.v v8, (a2) # Unknown-size Folded Spill
9972; ZVFHMIN-NEXT:    bltu a0, a1, .LBB291_2
9973; ZVFHMIN-NEXT:  # %bb.1:
9974; ZVFHMIN-NEXT:    mv a0, a1
9975; ZVFHMIN-NEXT:  .LBB291_2:
9976; ZVFHMIN-NEXT:    vmv1r.v v0, v7
9977; ZVFHMIN-NEXT:    csrr a1, vlenb
9978; ZVFHMIN-NEXT:    slli a1, a1, 4
9979; ZVFHMIN-NEXT:    add a1, sp, a1
9980; ZVFHMIN-NEXT:    addi a1, a1, 16
9981; ZVFHMIN-NEXT:    vl8r.v v16, (a1) # Unknown-size Folded Reload
9982; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
9983; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v16, v0.t
9984; ZVFHMIN-NEXT:    csrr a0, vlenb
9985; ZVFHMIN-NEXT:    slli a0, a0, 3
9986; ZVFHMIN-NEXT:    add a0, sp, a0
9987; ZVFHMIN-NEXT:    addi a0, a0, 16
9988; ZVFHMIN-NEXT:    vs8r.v v24, (a0) # Unknown-size Folded Spill
9989; ZVFHMIN-NEXT:    csrr a0, vlenb
9990; ZVFHMIN-NEXT:    slli a0, a0, 3
9991; ZVFHMIN-NEXT:    mv a1, a0
9992; ZVFHMIN-NEXT:    slli a0, a0, 1
9993; ZVFHMIN-NEXT:    add a0, a0, a1
9994; ZVFHMIN-NEXT:    add a0, sp, a0
9995; ZVFHMIN-NEXT:    addi a0, a0, 16
9996; ZVFHMIN-NEXT:    vl8r.v v16, (a0) # Unknown-size Folded Reload
9997; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v16, v0.t
9998; ZVFHMIN-NEXT:    csrr a0, vlenb
9999; ZVFHMIN-NEXT:    slli a0, a0, 5
10000; ZVFHMIN-NEXT:    add a0, sp, a0
10001; ZVFHMIN-NEXT:    addi a0, a0, 16
10002; ZVFHMIN-NEXT:    vl8r.v v16, (a0) # Unknown-size Folded Reload
10003; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v16, v0.t
10004; ZVFHMIN-NEXT:    csrr a0, vlenb
10005; ZVFHMIN-NEXT:    slli a0, a0, 3
10006; ZVFHMIN-NEXT:    mv a1, a0
10007; ZVFHMIN-NEXT:    slli a0, a0, 1
10008; ZVFHMIN-NEXT:    add a0, a0, a1
10009; ZVFHMIN-NEXT:    add a0, sp, a0
10010; ZVFHMIN-NEXT:    addi a0, a0, 16
10011; ZVFHMIN-NEXT:    vs8r.v v24, (a0) # Unknown-size Folded Spill
10012; ZVFHMIN-NEXT:    csrr a0, vlenb
10013; ZVFHMIN-NEXT:    slli a0, a0, 3
10014; ZVFHMIN-NEXT:    add a0, sp, a0
10015; ZVFHMIN-NEXT:    addi a0, a0, 16
10016; ZVFHMIN-NEXT:    vl8r.v v16, (a0) # Unknown-size Folded Reload
10017; ZVFHMIN-NEXT:    csrr a0, vlenb
10018; ZVFHMIN-NEXT:    slli a0, a0, 3
10019; ZVFHMIN-NEXT:    mv a1, a0
10020; ZVFHMIN-NEXT:    slli a0, a0, 1
10021; ZVFHMIN-NEXT:    add a0, a0, a1
10022; ZVFHMIN-NEXT:    add a0, sp, a0
10023; ZVFHMIN-NEXT:    addi a0, a0, 16
10024; ZVFHMIN-NEXT:    vl8r.v v24, (a0) # Unknown-size Folded Reload
10025; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
10026; ZVFHMIN-NEXT:    vfmadd.vv v8, v24, v16, v0.t
10027; ZVFHMIN-NEXT:    vmv.v.v v16, v8
10028; ZVFHMIN-NEXT:    addi a0, sp, 16
10029; ZVFHMIN-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
10030; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
10031; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v16, v0.t
10032; ZVFHMIN-NEXT:    csrr a0, vlenb
10033; ZVFHMIN-NEXT:    slli a0, a0, 3
10034; ZVFHMIN-NEXT:    mv a1, a0
10035; ZVFHMIN-NEXT:    slli a0, a0, 2
10036; ZVFHMIN-NEXT:    add a0, a0, a1
10037; ZVFHMIN-NEXT:    add sp, sp, a0
10038; ZVFHMIN-NEXT:    .cfi_def_cfa sp, 16
10039; ZVFHMIN-NEXT:    addi sp, sp, 16
10040; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 0
10041; ZVFHMIN-NEXT:    ret
10042  %elt.head = insertelement <vscale x 32 x half> poison, half %b, i32 0
10043  %vb = shufflevector <vscale x 32 x half> %elt.head, <vscale x 32 x half> poison, <vscale x 32 x i32> zeroinitializer
10044  %negva = call <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half> %va, <vscale x 32 x i1> %m, i32 %evl)
10045  %negvc = call <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half> %vc, <vscale x 32 x i1> %m, i32 %evl)
10046  %v = call <vscale x 32 x half> @llvm.vp.fma.nxv32f16(<vscale x 32 x half> %vb, <vscale x 32 x half> %negva, <vscale x 32 x half> %negvc, <vscale x 32 x i1> %m, i32 %evl)
10047  ret <vscale x 32 x half> %v
10048}
10049
10050define <vscale x 32 x half> @vfnmadd_vf_nxv32f16_unmasked(<vscale x 32 x half> %va, half %b, <vscale x 32 x half> %vc, i32 zeroext %evl) {
10051; ZVFH-LABEL: vfnmadd_vf_nxv32f16_unmasked:
10052; ZVFH:       # %bb.0:
10053; ZVFH-NEXT:    vsetvli zero, a0, e16, m8, ta, ma
10054; ZVFH-NEXT:    vfnmadd.vf v8, fa0, v16
10055; ZVFH-NEXT:    ret
10056;
10057; ZVFHMIN-LABEL: vfnmadd_vf_nxv32f16_unmasked:
10058; ZVFHMIN:       # %bb.0:
10059; ZVFHMIN-NEXT:    addi sp, sp, -16
10060; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 16
10061; ZVFHMIN-NEXT:    csrr a1, vlenb
10062; ZVFHMIN-NEXT:    slli a1, a1, 5
10063; ZVFHMIN-NEXT:    sub sp, sp, a1
10064; ZVFHMIN-NEXT:    .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 32 * vlenb
10065; ZVFHMIN-NEXT:    fmv.x.h a2, fa0
10066; ZVFHMIN-NEXT:    lui a1, 8
10067; ZVFHMIN-NEXT:    vsetvli a3, zero, e8, m4, ta, ma
10068; ZVFHMIN-NEXT:    vmset.m v24
10069; ZVFHMIN-NEXT:    csrr a3, vlenb
10070; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m8, ta, ma
10071; ZVFHMIN-NEXT:    vxor.vx v8, v8, a1
10072; ZVFHMIN-NEXT:    vxor.vx v16, v16, a1
10073; ZVFHMIN-NEXT:    slli a1, a3, 1
10074; ZVFHMIN-NEXT:    srli a3, a3, 2
10075; ZVFHMIN-NEXT:    sub a4, a0, a1
10076; ZVFHMIN-NEXT:    vsetvli a5, zero, e8, mf2, ta, ma
10077; ZVFHMIN-NEXT:    vslidedown.vx v0, v24, a3
10078; ZVFHMIN-NEXT:    sltu a3, a0, a4
10079; ZVFHMIN-NEXT:    addi a3, a3, -1
10080; ZVFHMIN-NEXT:    and a3, a3, a4
10081; ZVFHMIN-NEXT:    csrr a4, vlenb
10082; ZVFHMIN-NEXT:    slli a4, a4, 4
10083; ZVFHMIN-NEXT:    add a4, sp, a4
10084; ZVFHMIN-NEXT:    addi a4, a4, 16
10085; ZVFHMIN-NEXT:    vs8r.v v16, (a4) # Unknown-size Folded Spill
10086; ZVFHMIN-NEXT:    vsetvli zero, a3, e16, m4, ta, ma
10087; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v20, v0.t
10088; ZVFHMIN-NEXT:    csrr a4, vlenb
10089; ZVFHMIN-NEXT:    slli a4, a4, 3
10090; ZVFHMIN-NEXT:    add a4, sp, a4
10091; ZVFHMIN-NEXT:    addi a4, a4, 16
10092; ZVFHMIN-NEXT:    vs8r.v v24, (a4) # Unknown-size Folded Spill
10093; ZVFHMIN-NEXT:    csrr a4, vlenb
10094; ZVFHMIN-NEXT:    slli a4, a4, 3
10095; ZVFHMIN-NEXT:    mv a5, a4
10096; ZVFHMIN-NEXT:    slli a4, a4, 1
10097; ZVFHMIN-NEXT:    add a4, a4, a5
10098; ZVFHMIN-NEXT:    add a4, sp, a4
10099; ZVFHMIN-NEXT:    addi a4, a4, 16
10100; ZVFHMIN-NEXT:    vs8r.v v8, (a4) # Unknown-size Folded Spill
10101; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v12, v0.t
10102; ZVFHMIN-NEXT:    vsetvli a4, zero, e16, m8, ta, ma
10103; ZVFHMIN-NEXT:    vmv.v.x v8, a2
10104; ZVFHMIN-NEXT:    addi a2, sp, 16
10105; ZVFHMIN-NEXT:    vs8r.v v8, (a2) # Unknown-size Folded Spill
10106; ZVFHMIN-NEXT:    vsetvli zero, a3, e16, m4, ta, ma
10107; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v12, v0.t
10108; ZVFHMIN-NEXT:    csrr a2, vlenb
10109; ZVFHMIN-NEXT:    slli a2, a2, 3
10110; ZVFHMIN-NEXT:    add a2, sp, a2
10111; ZVFHMIN-NEXT:    addi a2, a2, 16
10112; ZVFHMIN-NEXT:    vl8r.v v8, (a2) # Unknown-size Folded Reload
10113; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
10114; ZVFHMIN-NEXT:    vfmadd.vv v16, v24, v8, v0.t
10115; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
10116; ZVFHMIN-NEXT:    vfncvt.f.f.w v12, v16, v0.t
10117; ZVFHMIN-NEXT:    bltu a0, a1, .LBB292_2
10118; ZVFHMIN-NEXT:  # %bb.1:
10119; ZVFHMIN-NEXT:    mv a0, a1
10120; ZVFHMIN-NEXT:  .LBB292_2:
10121; ZVFHMIN-NEXT:    csrr a1, vlenb
10122; ZVFHMIN-NEXT:    slli a1, a1, 4
10123; ZVFHMIN-NEXT:    add a1, sp, a1
10124; ZVFHMIN-NEXT:    addi a1, a1, 16
10125; ZVFHMIN-NEXT:    vl8r.v v24, (a1) # Unknown-size Folded Reload
10126; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
10127; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v24
10128; ZVFHMIN-NEXT:    csrr a0, vlenb
10129; ZVFHMIN-NEXT:    slli a0, a0, 3
10130; ZVFHMIN-NEXT:    add a0, sp, a0
10131; ZVFHMIN-NEXT:    addi a0, a0, 16
10132; ZVFHMIN-NEXT:    vs8r.v v16, (a0) # Unknown-size Folded Spill
10133; ZVFHMIN-NEXT:    csrr a0, vlenb
10134; ZVFHMIN-NEXT:    slli a0, a0, 3
10135; ZVFHMIN-NEXT:    mv a1, a0
10136; ZVFHMIN-NEXT:    slli a0, a0, 1
10137; ZVFHMIN-NEXT:    add a0, a0, a1
10138; ZVFHMIN-NEXT:    add a0, sp, a0
10139; ZVFHMIN-NEXT:    addi a0, a0, 16
10140; ZVFHMIN-NEXT:    vl8r.v v0, (a0) # Unknown-size Folded Reload
10141; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v0
10142; ZVFHMIN-NEXT:    addi a0, sp, 16
10143; ZVFHMIN-NEXT:    vl8r.v v16, (a0) # Unknown-size Folded Reload
10144; ZVFHMIN-NEXT:    vfwcvt.f.f.v v0, v16
10145; ZVFHMIN-NEXT:    csrr a0, vlenb
10146; ZVFHMIN-NEXT:    slli a0, a0, 3
10147; ZVFHMIN-NEXT:    add a0, sp, a0
10148; ZVFHMIN-NEXT:    addi a0, a0, 16
10149; ZVFHMIN-NEXT:    vl8r.v v16, (a0) # Unknown-size Folded Reload
10150; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
10151; ZVFHMIN-NEXT:    vfmadd.vv v0, v24, v16
10152; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
10153; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v0
10154; ZVFHMIN-NEXT:    csrr a0, vlenb
10155; ZVFHMIN-NEXT:    slli a0, a0, 5
10156; ZVFHMIN-NEXT:    add sp, sp, a0
10157; ZVFHMIN-NEXT:    .cfi_def_cfa sp, 16
10158; ZVFHMIN-NEXT:    addi sp, sp, 16
10159; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 0
10160; ZVFHMIN-NEXT:    ret
10161  %elt.head = insertelement <vscale x 32 x half> poison, half %b, i32 0
10162  %vb = shufflevector <vscale x 32 x half> %elt.head, <vscale x 32 x half> poison, <vscale x 32 x i32> zeroinitializer
10163  %negva = call <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half> %va, <vscale x 32 x i1> splat (i1 true), i32 %evl)
10164  %negvc = call <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half> %vc, <vscale x 32 x i1> splat (i1 true), i32 %evl)
10165  %v = call <vscale x 32 x half> @llvm.vp.fma.nxv32f16(<vscale x 32 x half> %negva, <vscale x 32 x half> %vb, <vscale x 32 x half> %negvc, <vscale x 32 x i1> splat (i1 true), i32 %evl)
10166  ret <vscale x 32 x half> %v
10167}
10168
10169define <vscale x 32 x half> @vfnmadd_vf_nxv32f16_unmasked_commute(<vscale x 32 x half> %va, half %b, <vscale x 32 x half> %vc, i32 zeroext %evl) {
10170; ZVFH-LABEL: vfnmadd_vf_nxv32f16_unmasked_commute:
10171; ZVFH:       # %bb.0:
10172; ZVFH-NEXT:    vsetvli zero, a0, e16, m8, ta, ma
10173; ZVFH-NEXT:    vfnmadd.vf v8, fa0, v16
10174; ZVFH-NEXT:    ret
10175;
10176; ZVFHMIN-LABEL: vfnmadd_vf_nxv32f16_unmasked_commute:
10177; ZVFHMIN:       # %bb.0:
10178; ZVFHMIN-NEXT:    addi sp, sp, -16
10179; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 16
10180; ZVFHMIN-NEXT:    csrr a1, vlenb
10181; ZVFHMIN-NEXT:    slli a1, a1, 5
10182; ZVFHMIN-NEXT:    sub sp, sp, a1
10183; ZVFHMIN-NEXT:    .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 32 * vlenb
10184; ZVFHMIN-NEXT:    fmv.x.h a2, fa0
10185; ZVFHMIN-NEXT:    lui a1, 8
10186; ZVFHMIN-NEXT:    vsetvli a3, zero, e8, m4, ta, ma
10187; ZVFHMIN-NEXT:    vmset.m v24
10188; ZVFHMIN-NEXT:    csrr a3, vlenb
10189; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m8, ta, ma
10190; ZVFHMIN-NEXT:    vxor.vx v8, v8, a1
10191; ZVFHMIN-NEXT:    vxor.vx v16, v16, a1
10192; ZVFHMIN-NEXT:    slli a1, a3, 1
10193; ZVFHMIN-NEXT:    srli a3, a3, 2
10194; ZVFHMIN-NEXT:    sub a4, a0, a1
10195; ZVFHMIN-NEXT:    vsetvli a5, zero, e8, mf2, ta, ma
10196; ZVFHMIN-NEXT:    vslidedown.vx v0, v24, a3
10197; ZVFHMIN-NEXT:    sltu a3, a0, a4
10198; ZVFHMIN-NEXT:    addi a3, a3, -1
10199; ZVFHMIN-NEXT:    and a3, a3, a4
10200; ZVFHMIN-NEXT:    csrr a4, vlenb
10201; ZVFHMIN-NEXT:    slli a4, a4, 3
10202; ZVFHMIN-NEXT:    add a4, sp, a4
10203; ZVFHMIN-NEXT:    addi a4, a4, 16
10204; ZVFHMIN-NEXT:    vs8r.v v16, (a4) # Unknown-size Folded Spill
10205; ZVFHMIN-NEXT:    vsetvli zero, a3, e16, m4, ta, ma
10206; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v20, v0.t
10207; ZVFHMIN-NEXT:    addi a4, sp, 16
10208; ZVFHMIN-NEXT:    vs8r.v v24, (a4) # Unknown-size Folded Spill
10209; ZVFHMIN-NEXT:    csrr a4, vlenb
10210; ZVFHMIN-NEXT:    slli a4, a4, 4
10211; ZVFHMIN-NEXT:    add a4, sp, a4
10212; ZVFHMIN-NEXT:    addi a4, a4, 16
10213; ZVFHMIN-NEXT:    vs8r.v v8, (a4) # Unknown-size Folded Spill
10214; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v12, v0.t
10215; ZVFHMIN-NEXT:    vsetvli a4, zero, e16, m8, ta, ma
10216; ZVFHMIN-NEXT:    vmv.v.x v8, a2
10217; ZVFHMIN-NEXT:    csrr a2, vlenb
10218; ZVFHMIN-NEXT:    slli a2, a2, 3
10219; ZVFHMIN-NEXT:    mv a4, a2
10220; ZVFHMIN-NEXT:    slli a2, a2, 1
10221; ZVFHMIN-NEXT:    add a2, a2, a4
10222; ZVFHMIN-NEXT:    add a2, sp, a2
10223; ZVFHMIN-NEXT:    addi a2, a2, 16
10224; ZVFHMIN-NEXT:    vs8r.v v8, (a2) # Unknown-size Folded Spill
10225; ZVFHMIN-NEXT:    csrr a2, vlenb
10226; ZVFHMIN-NEXT:    slli a2, a2, 3
10227; ZVFHMIN-NEXT:    mv a4, a2
10228; ZVFHMIN-NEXT:    slli a2, a2, 1
10229; ZVFHMIN-NEXT:    add a2, a2, a4
10230; ZVFHMIN-NEXT:    add a2, sp, a2
10231; ZVFHMIN-NEXT:    addi a2, a2, 16
10232; ZVFHMIN-NEXT:    vl8r.v v24, (a2) # Unknown-size Folded Reload
10233; ZVFHMIN-NEXT:    vsetvli zero, a3, e16, m4, ta, ma
10234; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v28, v0.t
10235; ZVFHMIN-NEXT:    addi a2, sp, 16
10236; ZVFHMIN-NEXT:    vl8r.v v24, (a2) # Unknown-size Folded Reload
10237; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
10238; ZVFHMIN-NEXT:    vfmadd.vv v16, v8, v24, v0.t
10239; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
10240; ZVFHMIN-NEXT:    vfncvt.f.f.w v12, v16, v0.t
10241; ZVFHMIN-NEXT:    bltu a0, a1, .LBB293_2
10242; ZVFHMIN-NEXT:  # %bb.1:
10243; ZVFHMIN-NEXT:    mv a0, a1
10244; ZVFHMIN-NEXT:  .LBB293_2:
10245; ZVFHMIN-NEXT:    csrr a1, vlenb
10246; ZVFHMIN-NEXT:    slli a1, a1, 3
10247; ZVFHMIN-NEXT:    add a1, sp, a1
10248; ZVFHMIN-NEXT:    addi a1, a1, 16
10249; ZVFHMIN-NEXT:    vl8r.v v24, (a1) # Unknown-size Folded Reload
10250; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
10251; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v24
10252; ZVFHMIN-NEXT:    addi a0, sp, 16
10253; ZVFHMIN-NEXT:    vs8r.v v16, (a0) # Unknown-size Folded Spill
10254; ZVFHMIN-NEXT:    csrr a0, vlenb
10255; ZVFHMIN-NEXT:    slli a0, a0, 4
10256; ZVFHMIN-NEXT:    add a0, sp, a0
10257; ZVFHMIN-NEXT:    addi a0, a0, 16
10258; ZVFHMIN-NEXT:    vl8r.v v0, (a0) # Unknown-size Folded Reload
10259; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v0
10260; ZVFHMIN-NEXT:    csrr a0, vlenb
10261; ZVFHMIN-NEXT:    slli a0, a0, 3
10262; ZVFHMIN-NEXT:    mv a1, a0
10263; ZVFHMIN-NEXT:    slli a0, a0, 1
10264; ZVFHMIN-NEXT:    add a0, a0, a1
10265; ZVFHMIN-NEXT:    add a0, sp, a0
10266; ZVFHMIN-NEXT:    addi a0, a0, 16
10267; ZVFHMIN-NEXT:    vl8r.v v16, (a0) # Unknown-size Folded Reload
10268; ZVFHMIN-NEXT:    vfwcvt.f.f.v v0, v16
10269; ZVFHMIN-NEXT:    addi a0, sp, 16
10270; ZVFHMIN-NEXT:    vl8r.v v16, (a0) # Unknown-size Folded Reload
10271; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
10272; ZVFHMIN-NEXT:    vfmadd.vv v0, v24, v16
10273; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
10274; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v0
10275; ZVFHMIN-NEXT:    csrr a0, vlenb
10276; ZVFHMIN-NEXT:    slli a0, a0, 5
10277; ZVFHMIN-NEXT:    add sp, sp, a0
10278; ZVFHMIN-NEXT:    .cfi_def_cfa sp, 16
10279; ZVFHMIN-NEXT:    addi sp, sp, 16
10280; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 0
10281; ZVFHMIN-NEXT:    ret
10282  %elt.head = insertelement <vscale x 32 x half> poison, half %b, i32 0
10283  %vb = shufflevector <vscale x 32 x half> %elt.head, <vscale x 32 x half> poison, <vscale x 32 x i32> zeroinitializer
10284  %negva = call <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half> %va, <vscale x 32 x i1> splat (i1 true), i32 %evl)
10285  %negvc = call <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half> %vc, <vscale x 32 x i1> splat (i1 true), i32 %evl)
10286  %v = call <vscale x 32 x half> @llvm.vp.fma.nxv32f16(<vscale x 32 x half> %vb, <vscale x 32 x half> %negva, <vscale x 32 x half> %negvc, <vscale x 32 x i1> splat (i1 true), i32 %evl)
10287  ret <vscale x 32 x half> %v
10288}
10289
10290define <vscale x 32 x half> @vfnmadd_vf_nxv32f16_neg_splat(<vscale x 32 x half> %va, half %b, <vscale x 32 x half> %vc, <vscale x 32 x i1> %m, i32 zeroext %evl) {
10291; ZVFH-LABEL: vfnmadd_vf_nxv32f16_neg_splat:
10292; ZVFH:       # %bb.0:
10293; ZVFH-NEXT:    vsetvli zero, a0, e16, m8, ta, ma
10294; ZVFH-NEXT:    vfnmadd.vf v8, fa0, v16, v0.t
10295; ZVFH-NEXT:    ret
10296;
10297; ZVFHMIN-LABEL: vfnmadd_vf_nxv32f16_neg_splat:
10298; ZVFHMIN:       # %bb.0:
10299; ZVFHMIN-NEXT:    addi sp, sp, -16
10300; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 16
10301; ZVFHMIN-NEXT:    csrr a1, vlenb
10302; ZVFHMIN-NEXT:    slli a1, a1, 3
10303; ZVFHMIN-NEXT:    mv a2, a1
10304; ZVFHMIN-NEXT:    slli a1, a1, 2
10305; ZVFHMIN-NEXT:    add a1, a1, a2
10306; ZVFHMIN-NEXT:    sub sp, sp, a1
10307; ZVFHMIN-NEXT:    .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x28, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 40 * vlenb
10308; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m8, ta, ma
10309; ZVFHMIN-NEXT:    vmv1r.v v7, v0
10310; ZVFHMIN-NEXT:    csrr a1, vlenb
10311; ZVFHMIN-NEXT:    slli a1, a1, 5
10312; ZVFHMIN-NEXT:    add a1, sp, a1
10313; ZVFHMIN-NEXT:    addi a1, a1, 16
10314; ZVFHMIN-NEXT:    vs8r.v v8, (a1) # Unknown-size Folded Spill
10315; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
10316; ZVFHMIN-NEXT:    lui a2, 8
10317; ZVFHMIN-NEXT:    csrr a3, vlenb
10318; ZVFHMIN-NEXT:    vmv.v.x v24, a1
10319; ZVFHMIN-NEXT:    slli a1, a3, 1
10320; ZVFHMIN-NEXT:    srli a3, a3, 2
10321; ZVFHMIN-NEXT:    vxor.vx v8, v24, a2, v0.t
10322; ZVFHMIN-NEXT:    vxor.vx v16, v16, a2, v0.t
10323; ZVFHMIN-NEXT:    sub a2, a0, a1
10324; ZVFHMIN-NEXT:    vsetvli a4, zero, e8, mf2, ta, ma
10325; ZVFHMIN-NEXT:    vslidedown.vx v0, v0, a3
10326; ZVFHMIN-NEXT:    sltu a3, a0, a2
10327; ZVFHMIN-NEXT:    addi a3, a3, -1
10328; ZVFHMIN-NEXT:    and a2, a3, a2
10329; ZVFHMIN-NEXT:    csrr a3, vlenb
10330; ZVFHMIN-NEXT:    slli a3, a3, 4
10331; ZVFHMIN-NEXT:    add a3, sp, a3
10332; ZVFHMIN-NEXT:    addi a3, a3, 16
10333; ZVFHMIN-NEXT:    vs8r.v v16, (a3) # Unknown-size Folded Spill
10334; ZVFHMIN-NEXT:    vsetvli zero, a2, e16, m4, ta, ma
10335; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v20, v0.t
10336; ZVFHMIN-NEXT:    csrr a2, vlenb
10337; ZVFHMIN-NEXT:    slli a2, a2, 3
10338; ZVFHMIN-NEXT:    add a2, sp, a2
10339; ZVFHMIN-NEXT:    addi a2, a2, 16
10340; ZVFHMIN-NEXT:    vs8r.v v24, (a2) # Unknown-size Folded Spill
10341; ZVFHMIN-NEXT:    csrr a2, vlenb
10342; ZVFHMIN-NEXT:    slli a2, a2, 3
10343; ZVFHMIN-NEXT:    mv a3, a2
10344; ZVFHMIN-NEXT:    slli a2, a2, 1
10345; ZVFHMIN-NEXT:    add a2, a2, a3
10346; ZVFHMIN-NEXT:    add a2, sp, a2
10347; ZVFHMIN-NEXT:    addi a2, a2, 16
10348; ZVFHMIN-NEXT:    vs8r.v v8, (a2) # Unknown-size Folded Spill
10349; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v12, v0.t
10350; ZVFHMIN-NEXT:    csrr a2, vlenb
10351; ZVFHMIN-NEXT:    slli a2, a2, 5
10352; ZVFHMIN-NEXT:    add a2, sp, a2
10353; ZVFHMIN-NEXT:    addi a2, a2, 16
10354; ZVFHMIN-NEXT:    vl8r.v v16, (a2) # Unknown-size Folded Reload
10355; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v20, v0.t
10356; ZVFHMIN-NEXT:    csrr a2, vlenb
10357; ZVFHMIN-NEXT:    slli a2, a2, 3
10358; ZVFHMIN-NEXT:    add a2, sp, a2
10359; ZVFHMIN-NEXT:    addi a2, a2, 16
10360; ZVFHMIN-NEXT:    vl8r.v v16, (a2) # Unknown-size Folded Reload
10361; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
10362; ZVFHMIN-NEXT:    vfmadd.vv v24, v8, v16, v0.t
10363; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
10364; ZVFHMIN-NEXT:    vfncvt.f.f.w v12, v24, v0.t
10365; ZVFHMIN-NEXT:    addi a2, sp, 16
10366; ZVFHMIN-NEXT:    vs8r.v v8, (a2) # Unknown-size Folded Spill
10367; ZVFHMIN-NEXT:    bltu a0, a1, .LBB294_2
10368; ZVFHMIN-NEXT:  # %bb.1:
10369; ZVFHMIN-NEXT:    mv a0, a1
10370; ZVFHMIN-NEXT:  .LBB294_2:
10371; ZVFHMIN-NEXT:    vmv1r.v v0, v7
10372; ZVFHMIN-NEXT:    csrr a1, vlenb
10373; ZVFHMIN-NEXT:    slli a1, a1, 4
10374; ZVFHMIN-NEXT:    add a1, sp, a1
10375; ZVFHMIN-NEXT:    addi a1, a1, 16
10376; ZVFHMIN-NEXT:    vl8r.v v16, (a1) # Unknown-size Folded Reload
10377; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
10378; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v16, v0.t
10379; ZVFHMIN-NEXT:    csrr a0, vlenb
10380; ZVFHMIN-NEXT:    slli a0, a0, 3
10381; ZVFHMIN-NEXT:    add a0, sp, a0
10382; ZVFHMIN-NEXT:    addi a0, a0, 16
10383; ZVFHMIN-NEXT:    vs8r.v v24, (a0) # Unknown-size Folded Spill
10384; ZVFHMIN-NEXT:    csrr a0, vlenb
10385; ZVFHMIN-NEXT:    slli a0, a0, 3
10386; ZVFHMIN-NEXT:    mv a1, a0
10387; ZVFHMIN-NEXT:    slli a0, a0, 1
10388; ZVFHMIN-NEXT:    add a0, a0, a1
10389; ZVFHMIN-NEXT:    add a0, sp, a0
10390; ZVFHMIN-NEXT:    addi a0, a0, 16
10391; ZVFHMIN-NEXT:    vl8r.v v16, (a0) # Unknown-size Folded Reload
10392; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v16, v0.t
10393; ZVFHMIN-NEXT:    csrr a0, vlenb
10394; ZVFHMIN-NEXT:    slli a0, a0, 5
10395; ZVFHMIN-NEXT:    add a0, sp, a0
10396; ZVFHMIN-NEXT:    addi a0, a0, 16
10397; ZVFHMIN-NEXT:    vl8r.v v16, (a0) # Unknown-size Folded Reload
10398; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v16, v0.t
10399; ZVFHMIN-NEXT:    csrr a0, vlenb
10400; ZVFHMIN-NEXT:    slli a0, a0, 3
10401; ZVFHMIN-NEXT:    mv a1, a0
10402; ZVFHMIN-NEXT:    slli a0, a0, 1
10403; ZVFHMIN-NEXT:    add a0, a0, a1
10404; ZVFHMIN-NEXT:    add a0, sp, a0
10405; ZVFHMIN-NEXT:    addi a0, a0, 16
10406; ZVFHMIN-NEXT:    vs8r.v v24, (a0) # Unknown-size Folded Spill
10407; ZVFHMIN-NEXT:    csrr a0, vlenb
10408; ZVFHMIN-NEXT:    slli a0, a0, 3
10409; ZVFHMIN-NEXT:    add a0, sp, a0
10410; ZVFHMIN-NEXT:    addi a0, a0, 16
10411; ZVFHMIN-NEXT:    vl8r.v v16, (a0) # Unknown-size Folded Reload
10412; ZVFHMIN-NEXT:    csrr a0, vlenb
10413; ZVFHMIN-NEXT:    slli a0, a0, 3
10414; ZVFHMIN-NEXT:    mv a1, a0
10415; ZVFHMIN-NEXT:    slli a0, a0, 1
10416; ZVFHMIN-NEXT:    add a0, a0, a1
10417; ZVFHMIN-NEXT:    add a0, sp, a0
10418; ZVFHMIN-NEXT:    addi a0, a0, 16
10419; ZVFHMIN-NEXT:    vl8r.v v24, (a0) # Unknown-size Folded Reload
10420; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
10421; ZVFHMIN-NEXT:    vfmadd.vv v8, v24, v16, v0.t
10422; ZVFHMIN-NEXT:    vmv.v.v v16, v8
10423; ZVFHMIN-NEXT:    addi a0, sp, 16
10424; ZVFHMIN-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
10425; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
10426; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v16, v0.t
10427; ZVFHMIN-NEXT:    csrr a0, vlenb
10428; ZVFHMIN-NEXT:    slli a0, a0, 3
10429; ZVFHMIN-NEXT:    mv a1, a0
10430; ZVFHMIN-NEXT:    slli a0, a0, 2
10431; ZVFHMIN-NEXT:    add a0, a0, a1
10432; ZVFHMIN-NEXT:    add sp, sp, a0
10433; ZVFHMIN-NEXT:    .cfi_def_cfa sp, 16
10434; ZVFHMIN-NEXT:    addi sp, sp, 16
10435; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 0
10436; ZVFHMIN-NEXT:    ret
10437  %elt.head = insertelement <vscale x 32 x half> poison, half %b, i32 0
10438  %vb = shufflevector <vscale x 32 x half> %elt.head, <vscale x 32 x half> poison, <vscale x 32 x i32> zeroinitializer
10439  %negvb = call <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half> %vb, <vscale x 32 x i1> %m, i32 %evl)
10440  %negvc = call <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half> %vc, <vscale x 32 x i1> %m, i32 %evl)
10441  %v = call <vscale x 32 x half> @llvm.vp.fma.nxv32f16(<vscale x 32 x half> %va, <vscale x 32 x half> %negvb, <vscale x 32 x half> %negvc, <vscale x 32 x i1> %m, i32 %evl)
10442  ret <vscale x 32 x half> %v
10443}
10444
10445define <vscale x 32 x half> @vfnmadd_vf_nxv32f16_neg_splat_commute(<vscale x 32 x half> %va, half %b, <vscale x 32 x half> %vc, <vscale x 32 x i1> %m, i32 zeroext %evl) {
10446; ZVFH-LABEL: vfnmadd_vf_nxv32f16_neg_splat_commute:
10447; ZVFH:       # %bb.0:
10448; ZVFH-NEXT:    vsetvli zero, a0, e16, m8, ta, ma
10449; ZVFH-NEXT:    vfnmadd.vf v8, fa0, v16, v0.t
10450; ZVFH-NEXT:    ret
10451;
10452; ZVFHMIN-LABEL: vfnmadd_vf_nxv32f16_neg_splat_commute:
10453; ZVFHMIN:       # %bb.0:
10454; ZVFHMIN-NEXT:    addi sp, sp, -16
10455; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 16
10456; ZVFHMIN-NEXT:    csrr a1, vlenb
10457; ZVFHMIN-NEXT:    slli a1, a1, 3
10458; ZVFHMIN-NEXT:    mv a2, a1
10459; ZVFHMIN-NEXT:    slli a1, a1, 2
10460; ZVFHMIN-NEXT:    add a1, a1, a2
10461; ZVFHMIN-NEXT:    sub sp, sp, a1
10462; ZVFHMIN-NEXT:    .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x28, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 40 * vlenb
10463; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m8, ta, ma
10464; ZVFHMIN-NEXT:    vmv1r.v v7, v0
10465; ZVFHMIN-NEXT:    csrr a1, vlenb
10466; ZVFHMIN-NEXT:    slli a1, a1, 3
10467; ZVFHMIN-NEXT:    mv a2, a1
10468; ZVFHMIN-NEXT:    slli a1, a1, 1
10469; ZVFHMIN-NEXT:    add a1, a1, a2
10470; ZVFHMIN-NEXT:    add a1, sp, a1
10471; ZVFHMIN-NEXT:    addi a1, a1, 16
10472; ZVFHMIN-NEXT:    vs8r.v v16, (a1) # Unknown-size Folded Spill
10473; ZVFHMIN-NEXT:    csrr a1, vlenb
10474; ZVFHMIN-NEXT:    slli a1, a1, 5
10475; ZVFHMIN-NEXT:    add a1, sp, a1
10476; ZVFHMIN-NEXT:    addi a1, a1, 16
10477; ZVFHMIN-NEXT:    vs8r.v v8, (a1) # Unknown-size Folded Spill
10478; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
10479; ZVFHMIN-NEXT:    lui a2, 8
10480; ZVFHMIN-NEXT:    csrr a3, vlenb
10481; ZVFHMIN-NEXT:    vmv.v.x v16, a1
10482; ZVFHMIN-NEXT:    slli a1, a3, 1
10483; ZVFHMIN-NEXT:    srli a3, a3, 2
10484; ZVFHMIN-NEXT:    vxor.vx v16, v16, a2, v0.t
10485; ZVFHMIN-NEXT:    csrr a4, vlenb
10486; ZVFHMIN-NEXT:    slli a4, a4, 3
10487; ZVFHMIN-NEXT:    mv a5, a4
10488; ZVFHMIN-NEXT:    slli a4, a4, 1
10489; ZVFHMIN-NEXT:    add a4, a4, a5
10490; ZVFHMIN-NEXT:    add a4, sp, a4
10491; ZVFHMIN-NEXT:    addi a4, a4, 16
10492; ZVFHMIN-NEXT:    vl8r.v v8, (a4) # Unknown-size Folded Reload
10493; ZVFHMIN-NEXT:    vxor.vx v8, v8, a2, v0.t
10494; ZVFHMIN-NEXT:    sub a2, a0, a1
10495; ZVFHMIN-NEXT:    vsetvli a4, zero, e8, mf2, ta, ma
10496; ZVFHMIN-NEXT:    vslidedown.vx v0, v0, a3
10497; ZVFHMIN-NEXT:    sltu a3, a0, a2
10498; ZVFHMIN-NEXT:    addi a3, a3, -1
10499; ZVFHMIN-NEXT:    and a2, a3, a2
10500; ZVFHMIN-NEXT:    csrr a3, vlenb
10501; ZVFHMIN-NEXT:    slli a3, a3, 4
10502; ZVFHMIN-NEXT:    add a3, sp, a3
10503; ZVFHMIN-NEXT:    addi a3, a3, 16
10504; ZVFHMIN-NEXT:    vs8r.v v8, (a3) # Unknown-size Folded Spill
10505; ZVFHMIN-NEXT:    vsetvli zero, a2, e16, m4, ta, ma
10506; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v12, v0.t
10507; ZVFHMIN-NEXT:    csrr a2, vlenb
10508; ZVFHMIN-NEXT:    slli a2, a2, 3
10509; ZVFHMIN-NEXT:    add a2, sp, a2
10510; ZVFHMIN-NEXT:    addi a2, a2, 16
10511; ZVFHMIN-NEXT:    vs8r.v v24, (a2) # Unknown-size Folded Spill
10512; ZVFHMIN-NEXT:    csrr a2, vlenb
10513; ZVFHMIN-NEXT:    slli a2, a2, 3
10514; ZVFHMIN-NEXT:    mv a3, a2
10515; ZVFHMIN-NEXT:    slli a2, a2, 1
10516; ZVFHMIN-NEXT:    add a2, a2, a3
10517; ZVFHMIN-NEXT:    add a2, sp, a2
10518; ZVFHMIN-NEXT:    addi a2, a2, 16
10519; ZVFHMIN-NEXT:    vs8r.v v16, (a2) # Unknown-size Folded Spill
10520; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v20, v0.t
10521; ZVFHMIN-NEXT:    vmv8r.v v16, v8
10522; ZVFHMIN-NEXT:    csrr a2, vlenb
10523; ZVFHMIN-NEXT:    slli a2, a2, 5
10524; ZVFHMIN-NEXT:    add a2, sp, a2
10525; ZVFHMIN-NEXT:    addi a2, a2, 16
10526; ZVFHMIN-NEXT:    vl8r.v v8, (a2) # Unknown-size Folded Reload
10527; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v12, v0.t
10528; ZVFHMIN-NEXT:    csrr a2, vlenb
10529; ZVFHMIN-NEXT:    slli a2, a2, 3
10530; ZVFHMIN-NEXT:    add a2, sp, a2
10531; ZVFHMIN-NEXT:    addi a2, a2, 16
10532; ZVFHMIN-NEXT:    vl8r.v v8, (a2) # Unknown-size Folded Reload
10533; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
10534; ZVFHMIN-NEXT:    vfmadd.vv v24, v16, v8, v0.t
10535; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
10536; ZVFHMIN-NEXT:    vfncvt.f.f.w v12, v24, v0.t
10537; ZVFHMIN-NEXT:    addi a2, sp, 16
10538; ZVFHMIN-NEXT:    vs8r.v v8, (a2) # Unknown-size Folded Spill
10539; ZVFHMIN-NEXT:    bltu a0, a1, .LBB295_2
10540; ZVFHMIN-NEXT:  # %bb.1:
10541; ZVFHMIN-NEXT:    mv a0, a1
10542; ZVFHMIN-NEXT:  .LBB295_2:
10543; ZVFHMIN-NEXT:    vmv1r.v v0, v7
10544; ZVFHMIN-NEXT:    csrr a1, vlenb
10545; ZVFHMIN-NEXT:    slli a1, a1, 4
10546; ZVFHMIN-NEXT:    add a1, sp, a1
10547; ZVFHMIN-NEXT:    addi a1, a1, 16
10548; ZVFHMIN-NEXT:    vl8r.v v8, (a1) # Unknown-size Folded Reload
10549; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
10550; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v8, v0.t
10551; ZVFHMIN-NEXT:    csrr a0, vlenb
10552; ZVFHMIN-NEXT:    slli a0, a0, 3
10553; ZVFHMIN-NEXT:    add a0, sp, a0
10554; ZVFHMIN-NEXT:    addi a0, a0, 16
10555; ZVFHMIN-NEXT:    vs8r.v v24, (a0) # Unknown-size Folded Spill
10556; ZVFHMIN-NEXT:    csrr a0, vlenb
10557; ZVFHMIN-NEXT:    slli a0, a0, 3
10558; ZVFHMIN-NEXT:    mv a1, a0
10559; ZVFHMIN-NEXT:    slli a0, a0, 1
10560; ZVFHMIN-NEXT:    add a0, a0, a1
10561; ZVFHMIN-NEXT:    add a0, sp, a0
10562; ZVFHMIN-NEXT:    addi a0, a0, 16
10563; ZVFHMIN-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
10564; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v8, v0.t
10565; ZVFHMIN-NEXT:    csrr a0, vlenb
10566; ZVFHMIN-NEXT:    slli a0, a0, 4
10567; ZVFHMIN-NEXT:    add a0, sp, a0
10568; ZVFHMIN-NEXT:    addi a0, a0, 16
10569; ZVFHMIN-NEXT:    vs8r.v v16, (a0) # Unknown-size Folded Spill
10570; ZVFHMIN-NEXT:    csrr a0, vlenb
10571; ZVFHMIN-NEXT:    slli a0, a0, 5
10572; ZVFHMIN-NEXT:    add a0, sp, a0
10573; ZVFHMIN-NEXT:    addi a0, a0, 16
10574; ZVFHMIN-NEXT:    vl8r.v v24, (a0) # Unknown-size Folded Reload
10575; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v24, v0.t
10576; ZVFHMIN-NEXT:    csrr a0, vlenb
10577; ZVFHMIN-NEXT:    slli a0, a0, 3
10578; ZVFHMIN-NEXT:    add a0, sp, a0
10579; ZVFHMIN-NEXT:    addi a0, a0, 16
10580; ZVFHMIN-NEXT:    vl8r.v v24, (a0) # Unknown-size Folded Reload
10581; ZVFHMIN-NEXT:    csrr a0, vlenb
10582; ZVFHMIN-NEXT:    slli a0, a0, 4
10583; ZVFHMIN-NEXT:    add a0, sp, a0
10584; ZVFHMIN-NEXT:    addi a0, a0, 16
10585; ZVFHMIN-NEXT:    vl8r.v v16, (a0) # Unknown-size Folded Reload
10586; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
10587; ZVFHMIN-NEXT:    vfmadd.vv v8, v16, v24, v0.t
10588; ZVFHMIN-NEXT:    vmv.v.v v16, v8
10589; ZVFHMIN-NEXT:    addi a0, sp, 16
10590; ZVFHMIN-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
10591; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
10592; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v16, v0.t
10593; ZVFHMIN-NEXT:    csrr a0, vlenb
10594; ZVFHMIN-NEXT:    slli a0, a0, 3
10595; ZVFHMIN-NEXT:    mv a1, a0
10596; ZVFHMIN-NEXT:    slli a0, a0, 2
10597; ZVFHMIN-NEXT:    add a0, a0, a1
10598; ZVFHMIN-NEXT:    add sp, sp, a0
10599; ZVFHMIN-NEXT:    .cfi_def_cfa sp, 16
10600; ZVFHMIN-NEXT:    addi sp, sp, 16
10601; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 0
10602; ZVFHMIN-NEXT:    ret
10603  %elt.head = insertelement <vscale x 32 x half> poison, half %b, i32 0
10604  %vb = shufflevector <vscale x 32 x half> %elt.head, <vscale x 32 x half> poison, <vscale x 32 x i32> zeroinitializer
10605  %negvb = call <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half> %vb, <vscale x 32 x i1> %m, i32 %evl)
10606  %negvc = call <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half> %vc, <vscale x 32 x i1> %m, i32 %evl)
10607  %v = call <vscale x 32 x half> @llvm.vp.fma.nxv32f16(<vscale x 32 x half> %negvb, <vscale x 32 x half> %va, <vscale x 32 x half> %negvc, <vscale x 32 x i1> %m, i32 %evl)
10608  ret <vscale x 32 x half> %v
10609}
10610
10611define <vscale x 32 x half> @vfnmadd_vf_nxv32f16_neg_splat_unmasked(<vscale x 32 x half> %va, half %b, <vscale x 32 x half> %vc, i32 zeroext %evl) {
10612; ZVFH-LABEL: vfnmadd_vf_nxv32f16_neg_splat_unmasked:
10613; ZVFH:       # %bb.0:
10614; ZVFH-NEXT:    vsetvli zero, a0, e16, m8, ta, ma
10615; ZVFH-NEXT:    vfnmadd.vf v8, fa0, v16
10616; ZVFH-NEXT:    ret
10617;
10618; ZVFHMIN-LABEL: vfnmadd_vf_nxv32f16_neg_splat_unmasked:
10619; ZVFHMIN:       # %bb.0:
10620; ZVFHMIN-NEXT:    addi sp, sp, -16
10621; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 16
10622; ZVFHMIN-NEXT:    csrr a1, vlenb
10623; ZVFHMIN-NEXT:    slli a1, a1, 5
10624; ZVFHMIN-NEXT:    sub sp, sp, a1
10625; ZVFHMIN-NEXT:    .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 32 * vlenb
10626; ZVFHMIN-NEXT:    csrr a1, vlenb
10627; ZVFHMIN-NEXT:    slli a1, a1, 3
10628; ZVFHMIN-NEXT:    mv a2, a1
10629; ZVFHMIN-NEXT:    slli a1, a1, 1
10630; ZVFHMIN-NEXT:    add a1, a1, a2
10631; ZVFHMIN-NEXT:    add a1, sp, a1
10632; ZVFHMIN-NEXT:    addi a1, a1, 16
10633; ZVFHMIN-NEXT:    vs8r.v v8, (a1) # Unknown-size Folded Spill
10634; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
10635; ZVFHMIN-NEXT:    lui a2, 8
10636; ZVFHMIN-NEXT:    vsetvli a3, zero, e8, m4, ta, ma
10637; ZVFHMIN-NEXT:    vmset.m v24
10638; ZVFHMIN-NEXT:    csrr a3, vlenb
10639; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m8, ta, ma
10640; ZVFHMIN-NEXT:    vmv.v.x v0, a1
10641; ZVFHMIN-NEXT:    vxor.vx v16, v16, a2
10642; ZVFHMIN-NEXT:    slli a1, a3, 1
10643; ZVFHMIN-NEXT:    srli a3, a3, 2
10644; ZVFHMIN-NEXT:    vxor.vx v8, v0, a2
10645; ZVFHMIN-NEXT:    sub a2, a0, a1
10646; ZVFHMIN-NEXT:    vsetvli a4, zero, e8, mf2, ta, ma
10647; ZVFHMIN-NEXT:    vslidedown.vx v0, v24, a3
10648; ZVFHMIN-NEXT:    sltu a3, a0, a2
10649; ZVFHMIN-NEXT:    addi a3, a3, -1
10650; ZVFHMIN-NEXT:    and a2, a3, a2
10651; ZVFHMIN-NEXT:    csrr a3, vlenb
10652; ZVFHMIN-NEXT:    slli a3, a3, 4
10653; ZVFHMIN-NEXT:    add a3, sp, a3
10654; ZVFHMIN-NEXT:    addi a3, a3, 16
10655; ZVFHMIN-NEXT:    vs8r.v v16, (a3) # Unknown-size Folded Spill
10656; ZVFHMIN-NEXT:    vsetvli zero, a2, e16, m4, ta, ma
10657; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v20, v0.t
10658; ZVFHMIN-NEXT:    addi a2, sp, 16
10659; ZVFHMIN-NEXT:    vs8r.v v24, (a2) # Unknown-size Folded Spill
10660; ZVFHMIN-NEXT:    csrr a2, vlenb
10661; ZVFHMIN-NEXT:    slli a2, a2, 3
10662; ZVFHMIN-NEXT:    add a2, sp, a2
10663; ZVFHMIN-NEXT:    addi a2, a2, 16
10664; ZVFHMIN-NEXT:    vs8r.v v8, (a2) # Unknown-size Folded Spill
10665; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v12, v0.t
10666; ZVFHMIN-NEXT:    csrr a2, vlenb
10667; ZVFHMIN-NEXT:    slli a2, a2, 3
10668; ZVFHMIN-NEXT:    mv a3, a2
10669; ZVFHMIN-NEXT:    slli a2, a2, 1
10670; ZVFHMIN-NEXT:    add a2, a2, a3
10671; ZVFHMIN-NEXT:    add a2, sp, a2
10672; ZVFHMIN-NEXT:    addi a2, a2, 16
10673; ZVFHMIN-NEXT:    vl8r.v v16, (a2) # Unknown-size Folded Reload
10674; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v20, v0.t
10675; ZVFHMIN-NEXT:    addi a2, sp, 16
10676; ZVFHMIN-NEXT:    vl8r.v v16, (a2) # Unknown-size Folded Reload
10677; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
10678; ZVFHMIN-NEXT:    vfmadd.vv v24, v8, v16, v0.t
10679; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
10680; ZVFHMIN-NEXT:    vfncvt.f.f.w v12, v24, v0.t
10681; ZVFHMIN-NEXT:    bltu a0, a1, .LBB296_2
10682; ZVFHMIN-NEXT:  # %bb.1:
10683; ZVFHMIN-NEXT:    mv a0, a1
10684; ZVFHMIN-NEXT:  .LBB296_2:
10685; ZVFHMIN-NEXT:    csrr a1, vlenb
10686; ZVFHMIN-NEXT:    slli a1, a1, 4
10687; ZVFHMIN-NEXT:    add a1, sp, a1
10688; ZVFHMIN-NEXT:    addi a1, a1, 16
10689; ZVFHMIN-NEXT:    vl8r.v v16, (a1) # Unknown-size Folded Reload
10690; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
10691; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v16
10692; ZVFHMIN-NEXT:    addi a0, sp, 16
10693; ZVFHMIN-NEXT:    vs8r.v v24, (a0) # Unknown-size Folded Spill
10694; ZVFHMIN-NEXT:    csrr a0, vlenb
10695; ZVFHMIN-NEXT:    slli a0, a0, 3
10696; ZVFHMIN-NEXT:    add a0, sp, a0
10697; ZVFHMIN-NEXT:    addi a0, a0, 16
10698; ZVFHMIN-NEXT:    vl8r.v v16, (a0) # Unknown-size Folded Reload
10699; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v16
10700; ZVFHMIN-NEXT:    csrr a0, vlenb
10701; ZVFHMIN-NEXT:    slli a0, a0, 3
10702; ZVFHMIN-NEXT:    mv a1, a0
10703; ZVFHMIN-NEXT:    slli a0, a0, 1
10704; ZVFHMIN-NEXT:    add a0, a0, a1
10705; ZVFHMIN-NEXT:    add a0, sp, a0
10706; ZVFHMIN-NEXT:    addi a0, a0, 16
10707; ZVFHMIN-NEXT:    vl8r.v v16, (a0) # Unknown-size Folded Reload
10708; ZVFHMIN-NEXT:    vfwcvt.f.f.v v0, v16
10709; ZVFHMIN-NEXT:    addi a0, sp, 16
10710; ZVFHMIN-NEXT:    vl8r.v v16, (a0) # Unknown-size Folded Reload
10711; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
10712; ZVFHMIN-NEXT:    vfmadd.vv v0, v24, v16
10713; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
10714; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v0
10715; ZVFHMIN-NEXT:    csrr a0, vlenb
10716; ZVFHMIN-NEXT:    slli a0, a0, 5
10717; ZVFHMIN-NEXT:    add sp, sp, a0
10718; ZVFHMIN-NEXT:    .cfi_def_cfa sp, 16
10719; ZVFHMIN-NEXT:    addi sp, sp, 16
10720; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 0
10721; ZVFHMIN-NEXT:    ret
10722  %elt.head = insertelement <vscale x 32 x half> poison, half %b, i32 0
10723  %vb = shufflevector <vscale x 32 x half> %elt.head, <vscale x 32 x half> poison, <vscale x 32 x i32> zeroinitializer
10724  %negvb = call <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half> %vb, <vscale x 32 x i1> splat (i1 true), i32 %evl)
10725  %negvc = call <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half> %vc, <vscale x 32 x i1> splat (i1 true), i32 %evl)
10726  %v = call <vscale x 32 x half> @llvm.vp.fma.nxv32f16(<vscale x 32 x half> %va, <vscale x 32 x half> %negvb, <vscale x 32 x half> %negvc, <vscale x 32 x i1> splat (i1 true), i32 %evl)
10727  ret <vscale x 32 x half> %v
10728}
10729
10730define <vscale x 32 x half> @vfnmadd_vf_nxv32f16_neg_splat_unmasked_commute(<vscale x 32 x half> %va, half %b, <vscale x 32 x half> %vc, i32 zeroext %evl) {
10731; ZVFH-LABEL: vfnmadd_vf_nxv32f16_neg_splat_unmasked_commute:
10732; ZVFH:       # %bb.0:
10733; ZVFH-NEXT:    vsetvli zero, a0, e16, m8, ta, ma
10734; ZVFH-NEXT:    vfnmadd.vf v8, fa0, v16
10735; ZVFH-NEXT:    ret
10736;
10737; ZVFHMIN-LABEL: vfnmadd_vf_nxv32f16_neg_splat_unmasked_commute:
10738; ZVFHMIN:       # %bb.0:
10739; ZVFHMIN-NEXT:    addi sp, sp, -16
10740; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 16
10741; ZVFHMIN-NEXT:    csrr a1, vlenb
10742; ZVFHMIN-NEXT:    slli a1, a1, 5
10743; ZVFHMIN-NEXT:    sub sp, sp, a1
10744; ZVFHMIN-NEXT:    .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 32 * vlenb
10745; ZVFHMIN-NEXT:    csrr a1, vlenb
10746; ZVFHMIN-NEXT:    slli a1, a1, 3
10747; ZVFHMIN-NEXT:    mv a2, a1
10748; ZVFHMIN-NEXT:    slli a1, a1, 1
10749; ZVFHMIN-NEXT:    add a1, a1, a2
10750; ZVFHMIN-NEXT:    add a1, sp, a1
10751; ZVFHMIN-NEXT:    addi a1, a1, 16
10752; ZVFHMIN-NEXT:    vs8r.v v8, (a1) # Unknown-size Folded Spill
10753; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
10754; ZVFHMIN-NEXT:    lui a2, 8
10755; ZVFHMIN-NEXT:    vsetvli a3, zero, e8, m4, ta, ma
10756; ZVFHMIN-NEXT:    vmset.m v7
10757; ZVFHMIN-NEXT:    csrr a3, vlenb
10758; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m8, ta, ma
10759; ZVFHMIN-NEXT:    vmv.v.x v24, a1
10760; ZVFHMIN-NEXT:    vxor.vx v16, v16, a2
10761; ZVFHMIN-NEXT:    slli a1, a3, 1
10762; ZVFHMIN-NEXT:    srli a3, a3, 2
10763; ZVFHMIN-NEXT:    vxor.vx v8, v24, a2
10764; ZVFHMIN-NEXT:    sub a2, a0, a1
10765; ZVFHMIN-NEXT:    vsetvli a4, zero, e8, mf2, ta, ma
10766; ZVFHMIN-NEXT:    vslidedown.vx v0, v7, a3
10767; ZVFHMIN-NEXT:    sltu a3, a0, a2
10768; ZVFHMIN-NEXT:    addi a3, a3, -1
10769; ZVFHMIN-NEXT:    and a2, a3, a2
10770; ZVFHMIN-NEXT:    csrr a3, vlenb
10771; ZVFHMIN-NEXT:    slli a3, a3, 4
10772; ZVFHMIN-NEXT:    add a3, sp, a3
10773; ZVFHMIN-NEXT:    addi a3, a3, 16
10774; ZVFHMIN-NEXT:    vs8r.v v16, (a3) # Unknown-size Folded Spill
10775; ZVFHMIN-NEXT:    vsetvli zero, a2, e16, m4, ta, ma
10776; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v20, v0.t
10777; ZVFHMIN-NEXT:    addi a2, sp, 16
10778; ZVFHMIN-NEXT:    vs8r.v v24, (a2) # Unknown-size Folded Spill
10779; ZVFHMIN-NEXT:    csrr a2, vlenb
10780; ZVFHMIN-NEXT:    slli a2, a2, 3
10781; ZVFHMIN-NEXT:    add a2, sp, a2
10782; ZVFHMIN-NEXT:    addi a2, a2, 16
10783; ZVFHMIN-NEXT:    vs8r.v v8, (a2) # Unknown-size Folded Spill
10784; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v12, v0.t
10785; ZVFHMIN-NEXT:    csrr a2, vlenb
10786; ZVFHMIN-NEXT:    slli a2, a2, 3
10787; ZVFHMIN-NEXT:    mv a3, a2
10788; ZVFHMIN-NEXT:    slli a2, a2, 1
10789; ZVFHMIN-NEXT:    add a2, a2, a3
10790; ZVFHMIN-NEXT:    add a2, sp, a2
10791; ZVFHMIN-NEXT:    addi a2, a2, 16
10792; ZVFHMIN-NEXT:    vl8r.v v16, (a2) # Unknown-size Folded Reload
10793; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v20, v0.t
10794; ZVFHMIN-NEXT:    addi a2, sp, 16
10795; ZVFHMIN-NEXT:    vl8r.v v16, (a2) # Unknown-size Folded Reload
10796; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
10797; ZVFHMIN-NEXT:    vfmadd.vv v8, v24, v16, v0.t
10798; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
10799; ZVFHMIN-NEXT:    vfncvt.f.f.w v20, v8, v0.t
10800; ZVFHMIN-NEXT:    bltu a0, a1, .LBB297_2
10801; ZVFHMIN-NEXT:  # %bb.1:
10802; ZVFHMIN-NEXT:    mv a0, a1
10803; ZVFHMIN-NEXT:  .LBB297_2:
10804; ZVFHMIN-NEXT:    csrr a1, vlenb
10805; ZVFHMIN-NEXT:    slli a1, a1, 4
10806; ZVFHMIN-NEXT:    add a1, sp, a1
10807; ZVFHMIN-NEXT:    addi a1, a1, 16
10808; ZVFHMIN-NEXT:    vl8r.v v8, (a1) # Unknown-size Folded Reload
10809; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
10810; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v8
10811; ZVFHMIN-NEXT:    addi a0, sp, 16
10812; ZVFHMIN-NEXT:    vs8r.v v24, (a0) # Unknown-size Folded Spill
10813; ZVFHMIN-NEXT:    csrr a0, vlenb
10814; ZVFHMIN-NEXT:    slli a0, a0, 3
10815; ZVFHMIN-NEXT:    add a0, sp, a0
10816; ZVFHMIN-NEXT:    addi a0, a0, 16
10817; ZVFHMIN-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
10818; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v8
10819; ZVFHMIN-NEXT:    csrr a0, vlenb
10820; ZVFHMIN-NEXT:    slli a0, a0, 3
10821; ZVFHMIN-NEXT:    mv a1, a0
10822; ZVFHMIN-NEXT:    slli a0, a0, 1
10823; ZVFHMIN-NEXT:    add a0, a0, a1
10824; ZVFHMIN-NEXT:    add a0, sp, a0
10825; ZVFHMIN-NEXT:    addi a0, a0, 16
10826; ZVFHMIN-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
10827; ZVFHMIN-NEXT:    vfwcvt.f.f.v v0, v8
10828; ZVFHMIN-NEXT:    addi a0, sp, 16
10829; ZVFHMIN-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
10830; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
10831; ZVFHMIN-NEXT:    vfmadd.vv v0, v24, v8
10832; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
10833; ZVFHMIN-NEXT:    vfncvt.f.f.w v16, v0
10834; ZVFHMIN-NEXT:    vmv8r.v v8, v16
10835; ZVFHMIN-NEXT:    csrr a0, vlenb
10836; ZVFHMIN-NEXT:    slli a0, a0, 5
10837; ZVFHMIN-NEXT:    add sp, sp, a0
10838; ZVFHMIN-NEXT:    .cfi_def_cfa sp, 16
10839; ZVFHMIN-NEXT:    addi sp, sp, 16
10840; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 0
10841; ZVFHMIN-NEXT:    ret
10842  %elt.head = insertelement <vscale x 32 x half> poison, half %b, i32 0
10843  %vb = shufflevector <vscale x 32 x half> %elt.head, <vscale x 32 x half> poison, <vscale x 32 x i32> zeroinitializer
10844  %negvb = call <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half> %vb, <vscale x 32 x i1> splat (i1 true), i32 %evl)
10845  %negvc = call <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half> %vc, <vscale x 32 x i1> splat (i1 true), i32 %evl)
10846  %v = call <vscale x 32 x half> @llvm.vp.fma.nxv32f16(<vscale x 32 x half> %negvb, <vscale x 32 x half> %va, <vscale x 32 x half> %negvc, <vscale x 32 x i1> splat (i1 true), i32 %evl)
10847  ret <vscale x 32 x half> %v
10848}
10849
10850define <vscale x 32 x half> @vfnmsub_vv_nxv32f16(<vscale x 32 x half> %va, <vscale x 32 x half> %b, <vscale x 32 x half> %c, <vscale x 32 x i1> %m, i32 zeroext %evl) {
10851; ZVFH-LABEL: vfnmsub_vv_nxv32f16:
10852; ZVFH:       # %bb.0:
10853; ZVFH-NEXT:    vl8re16.v v24, (a0)
10854; ZVFH-NEXT:    vsetvli zero, a1, e16, m8, ta, ma
10855; ZVFH-NEXT:    vfnmadd.vv v16, v8, v24, v0.t
10856; ZVFH-NEXT:    vmv.v.v v8, v16
10857; ZVFH-NEXT:    ret
10858;
10859; ZVFHMIN-LABEL: vfnmsub_vv_nxv32f16:
10860; ZVFHMIN:       # %bb.0:
10861; ZVFHMIN-NEXT:    addi sp, sp, -16
10862; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 16
10863; ZVFHMIN-NEXT:    csrr a2, vlenb
10864; ZVFHMIN-NEXT:    slli a2, a2, 4
10865; ZVFHMIN-NEXT:    mv a3, a2
10866; ZVFHMIN-NEXT:    slli a2, a2, 1
10867; ZVFHMIN-NEXT:    add a2, a2, a3
10868; ZVFHMIN-NEXT:    sub sp, sp, a2
10869; ZVFHMIN-NEXT:    .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x30, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 48 * vlenb
10870; ZVFHMIN-NEXT:    vsetvli zero, a1, e16, m8, ta, ma
10871; ZVFHMIN-NEXT:    vmv1r.v v7, v0
10872; ZVFHMIN-NEXT:    csrr a2, vlenb
10873; ZVFHMIN-NEXT:    slli a2, a2, 3
10874; ZVFHMIN-NEXT:    mv a3, a2
10875; ZVFHMIN-NEXT:    slli a2, a2, 2
10876; ZVFHMIN-NEXT:    add a2, a2, a3
10877; ZVFHMIN-NEXT:    add a2, sp, a2
10878; ZVFHMIN-NEXT:    addi a2, a2, 16
10879; ZVFHMIN-NEXT:    vs8r.v v8, (a2) # Unknown-size Folded Spill
10880; ZVFHMIN-NEXT:    vl8re16.v v24, (a0)
10881; ZVFHMIN-NEXT:    lui a2, 8
10882; ZVFHMIN-NEXT:    csrr a3, vlenb
10883; ZVFHMIN-NEXT:    vxor.vx v8, v16, a2, v0.t
10884; ZVFHMIN-NEXT:    csrr a0, vlenb
10885; ZVFHMIN-NEXT:    slli a0, a0, 5
10886; ZVFHMIN-NEXT:    add a0, sp, a0
10887; ZVFHMIN-NEXT:    addi a0, a0, 16
10888; ZVFHMIN-NEXT:    vs8r.v v8, (a0) # Unknown-size Folded Spill
10889; ZVFHMIN-NEXT:    slli a0, a3, 1
10890; ZVFHMIN-NEXT:    srli a3, a3, 2
10891; ZVFHMIN-NEXT:    sub a4, a1, a0
10892; ZVFHMIN-NEXT:    vsetvli a5, zero, e8, mf2, ta, ma
10893; ZVFHMIN-NEXT:    vslidedown.vx v6, v0, a3
10894; ZVFHMIN-NEXT:    sltu a3, a1, a4
10895; ZVFHMIN-NEXT:    vsetvli zero, a1, e16, m8, ta, ma
10896; ZVFHMIN-NEXT:    vxor.vx v24, v24, a2, v0.t
10897; ZVFHMIN-NEXT:    addi a3, a3, -1
10898; ZVFHMIN-NEXT:    and a3, a3, a4
10899; ZVFHMIN-NEXT:    vmv1r.v v0, v6
10900; ZVFHMIN-NEXT:    csrr a2, vlenb
10901; ZVFHMIN-NEXT:    slli a2, a2, 3
10902; ZVFHMIN-NEXT:    mv a4, a2
10903; ZVFHMIN-NEXT:    slli a2, a2, 1
10904; ZVFHMIN-NEXT:    add a2, a2, a4
10905; ZVFHMIN-NEXT:    add a2, sp, a2
10906; ZVFHMIN-NEXT:    addi a2, a2, 16
10907; ZVFHMIN-NEXT:    vs8r.v v24, (a2) # Unknown-size Folded Spill
10908; ZVFHMIN-NEXT:    vsetvli zero, a3, e16, m4, ta, ma
10909; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v28, v0.t
10910; ZVFHMIN-NEXT:    csrr a2, vlenb
10911; ZVFHMIN-NEXT:    slli a2, a2, 4
10912; ZVFHMIN-NEXT:    add a2, sp, a2
10913; ZVFHMIN-NEXT:    addi a2, a2, 16
10914; ZVFHMIN-NEXT:    vs8r.v v8, (a2) # Unknown-size Folded Spill
10915; ZVFHMIN-NEXT:    csrr a2, vlenb
10916; ZVFHMIN-NEXT:    slli a2, a2, 5
10917; ZVFHMIN-NEXT:    add a2, sp, a2
10918; ZVFHMIN-NEXT:    addi a2, a2, 16
10919; ZVFHMIN-NEXT:    vl8r.v v8, (a2) # Unknown-size Folded Reload
10920; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v12, v0.t
10921; ZVFHMIN-NEXT:    addi a2, sp, 16
10922; ZVFHMIN-NEXT:    vs8r.v v24, (a2) # Unknown-size Folded Spill
10923; ZVFHMIN-NEXT:    csrr a2, vlenb
10924; ZVFHMIN-NEXT:    slli a2, a2, 3
10925; ZVFHMIN-NEXT:    mv a3, a2
10926; ZVFHMIN-NEXT:    slli a2, a2, 2
10927; ZVFHMIN-NEXT:    add a2, a2, a3
10928; ZVFHMIN-NEXT:    add a2, sp, a2
10929; ZVFHMIN-NEXT:    addi a2, a2, 16
10930; ZVFHMIN-NEXT:    vl8r.v v8, (a2) # Unknown-size Folded Reload
10931; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v12, v0.t
10932; ZVFHMIN-NEXT:    csrr a2, vlenb
10933; ZVFHMIN-NEXT:    slli a2, a2, 3
10934; ZVFHMIN-NEXT:    add a2, sp, a2
10935; ZVFHMIN-NEXT:    addi a2, a2, 16
10936; ZVFHMIN-NEXT:    vs8r.v v24, (a2) # Unknown-size Folded Spill
10937; ZVFHMIN-NEXT:    csrr a2, vlenb
10938; ZVFHMIN-NEXT:    slli a2, a2, 4
10939; ZVFHMIN-NEXT:    add a2, sp, a2
10940; ZVFHMIN-NEXT:    addi a2, a2, 16
10941; ZVFHMIN-NEXT:    vl8r.v v8, (a2) # Unknown-size Folded Reload
10942; ZVFHMIN-NEXT:    csrr a2, vlenb
10943; ZVFHMIN-NEXT:    slli a2, a2, 3
10944; ZVFHMIN-NEXT:    add a2, sp, a2
10945; ZVFHMIN-NEXT:    addi a2, a2, 16
10946; ZVFHMIN-NEXT:    vl8r.v v24, (a2) # Unknown-size Folded Reload
10947; ZVFHMIN-NEXT:    addi a2, sp, 16
10948; ZVFHMIN-NEXT:    vl8r.v v16, (a2) # Unknown-size Folded Reload
10949; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
10950; ZVFHMIN-NEXT:    vfmadd.vv v16, v24, v8, v0.t
10951; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
10952; ZVFHMIN-NEXT:    vfncvt.f.f.w v12, v16, v0.t
10953; ZVFHMIN-NEXT:    csrr a2, vlenb
10954; ZVFHMIN-NEXT:    slli a2, a2, 4
10955; ZVFHMIN-NEXT:    add a2, sp, a2
10956; ZVFHMIN-NEXT:    addi a2, a2, 16
10957; ZVFHMIN-NEXT:    vs8r.v v8, (a2) # Unknown-size Folded Spill
10958; ZVFHMIN-NEXT:    bltu a1, a0, .LBB298_2
10959; ZVFHMIN-NEXT:  # %bb.1:
10960; ZVFHMIN-NEXT:    mv a1, a0
10961; ZVFHMIN-NEXT:  .LBB298_2:
10962; ZVFHMIN-NEXT:    vmv1r.v v0, v7
10963; ZVFHMIN-NEXT:    csrr a0, vlenb
10964; ZVFHMIN-NEXT:    slli a0, a0, 5
10965; ZVFHMIN-NEXT:    add a0, sp, a0
10966; ZVFHMIN-NEXT:    addi a0, a0, 16
10967; ZVFHMIN-NEXT:    vl8r.v v24, (a0) # Unknown-size Folded Reload
10968; ZVFHMIN-NEXT:    vsetvli zero, a1, e16, m4, ta, ma
10969; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v24, v0.t
10970; ZVFHMIN-NEXT:    csrr a0, vlenb
10971; ZVFHMIN-NEXT:    slli a0, a0, 3
10972; ZVFHMIN-NEXT:    add a0, sp, a0
10973; ZVFHMIN-NEXT:    addi a0, a0, 16
10974; ZVFHMIN-NEXT:    vs8r.v v8, (a0) # Unknown-size Folded Spill
10975; ZVFHMIN-NEXT:    csrr a0, vlenb
10976; ZVFHMIN-NEXT:    slli a0, a0, 3
10977; ZVFHMIN-NEXT:    mv a1, a0
10978; ZVFHMIN-NEXT:    slli a0, a0, 1
10979; ZVFHMIN-NEXT:    add a0, a0, a1
10980; ZVFHMIN-NEXT:    add a0, sp, a0
10981; ZVFHMIN-NEXT:    addi a0, a0, 16
10982; ZVFHMIN-NEXT:    vl8r.v v24, (a0) # Unknown-size Folded Reload
10983; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v24, v0.t
10984; ZVFHMIN-NEXT:    csrr a0, vlenb
10985; ZVFHMIN-NEXT:    slli a0, a0, 5
10986; ZVFHMIN-NEXT:    add a0, sp, a0
10987; ZVFHMIN-NEXT:    addi a0, a0, 16
10988; ZVFHMIN-NEXT:    vs8r.v v16, (a0) # Unknown-size Folded Spill
10989; ZVFHMIN-NEXT:    csrr a0, vlenb
10990; ZVFHMIN-NEXT:    slli a0, a0, 3
10991; ZVFHMIN-NEXT:    mv a1, a0
10992; ZVFHMIN-NEXT:    slli a0, a0, 2
10993; ZVFHMIN-NEXT:    add a0, a0, a1
10994; ZVFHMIN-NEXT:    add a0, sp, a0
10995; ZVFHMIN-NEXT:    addi a0, a0, 16
10996; ZVFHMIN-NEXT:    vl8r.v v24, (a0) # Unknown-size Folded Reload
10997; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v24, v0.t
10998; ZVFHMIN-NEXT:    csrr a0, vlenb
10999; ZVFHMIN-NEXT:    slli a0, a0, 5
11000; ZVFHMIN-NEXT:    add a0, sp, a0
11001; ZVFHMIN-NEXT:    addi a0, a0, 16
11002; ZVFHMIN-NEXT:    vl8r.v v24, (a0) # Unknown-size Folded Reload
11003; ZVFHMIN-NEXT:    csrr a0, vlenb
11004; ZVFHMIN-NEXT:    slli a0, a0, 3
11005; ZVFHMIN-NEXT:    add a0, sp, a0
11006; ZVFHMIN-NEXT:    addi a0, a0, 16
11007; ZVFHMIN-NEXT:    vl8r.v v16, (a0) # Unknown-size Folded Reload
11008; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
11009; ZVFHMIN-NEXT:    vfmadd.vv v16, v8, v24, v0.t
11010; ZVFHMIN-NEXT:    csrr a0, vlenb
11011; ZVFHMIN-NEXT:    slli a0, a0, 4
11012; ZVFHMIN-NEXT:    add a0, sp, a0
11013; ZVFHMIN-NEXT:    addi a0, a0, 16
11014; ZVFHMIN-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
11015; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
11016; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v16, v0.t
11017; ZVFHMIN-NEXT:    csrr a0, vlenb
11018; ZVFHMIN-NEXT:    slli a0, a0, 4
11019; ZVFHMIN-NEXT:    mv a1, a0
11020; ZVFHMIN-NEXT:    slli a0, a0, 1
11021; ZVFHMIN-NEXT:    add a0, a0, a1
11022; ZVFHMIN-NEXT:    add sp, sp, a0
11023; ZVFHMIN-NEXT:    .cfi_def_cfa sp, 16
11024; ZVFHMIN-NEXT:    addi sp, sp, 16
11025; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 0
11026; ZVFHMIN-NEXT:    ret
11027  %negb = call <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half> %b, <vscale x 32 x i1> %m, i32 %evl)
11028  %negc = call <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half> %c, <vscale x 32 x i1> %m, i32 %evl)
11029  %v = call <vscale x 32 x half> @llvm.vp.fma.nxv32f16(<vscale x 32 x half> %va, <vscale x 32 x half> %negb, <vscale x 32 x half> %negc, <vscale x 32 x i1> %m, i32 %evl)
11030  ret <vscale x 32 x half> %v
11031}
11032
11033define <vscale x 32 x half> @vfnmsub_vv_nxv32f16_commuted(<vscale x 32 x half> %va, <vscale x 32 x half> %b, <vscale x 32 x half> %c, <vscale x 32 x i1> %m, i32 zeroext %evl) {
11034; ZVFH-LABEL: vfnmsub_vv_nxv32f16_commuted:
11035; ZVFH:       # %bb.0:
11036; ZVFH-NEXT:    vl8re16.v v24, (a0)
11037; ZVFH-NEXT:    vsetvli zero, a1, e16, m8, ta, ma
11038; ZVFH-NEXT:    vfnmadd.vv v8, v16, v24, v0.t
11039; ZVFH-NEXT:    ret
11040;
11041; ZVFHMIN-LABEL: vfnmsub_vv_nxv32f16_commuted:
11042; ZVFHMIN:       # %bb.0:
11043; ZVFHMIN-NEXT:    addi sp, sp, -16
11044; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 16
11045; ZVFHMIN-NEXT:    csrr a2, vlenb
11046; ZVFHMIN-NEXT:    slli a2, a2, 4
11047; ZVFHMIN-NEXT:    mv a3, a2
11048; ZVFHMIN-NEXT:    slli a2, a2, 1
11049; ZVFHMIN-NEXT:    add a2, a2, a3
11050; ZVFHMIN-NEXT:    sub sp, sp, a2
11051; ZVFHMIN-NEXT:    .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x30, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 48 * vlenb
11052; ZVFHMIN-NEXT:    vsetvli zero, a1, e16, m8, ta, ma
11053; ZVFHMIN-NEXT:    vmv1r.v v7, v0
11054; ZVFHMIN-NEXT:    csrr a2, vlenb
11055; ZVFHMIN-NEXT:    slli a2, a2, 3
11056; ZVFHMIN-NEXT:    mv a3, a2
11057; ZVFHMIN-NEXT:    slli a2, a2, 2
11058; ZVFHMIN-NEXT:    add a2, a2, a3
11059; ZVFHMIN-NEXT:    add a2, sp, a2
11060; ZVFHMIN-NEXT:    addi a2, a2, 16
11061; ZVFHMIN-NEXT:    vs8r.v v8, (a2) # Unknown-size Folded Spill
11062; ZVFHMIN-NEXT:    vl8re16.v v24, (a0)
11063; ZVFHMIN-NEXT:    lui a2, 8
11064; ZVFHMIN-NEXT:    csrr a3, vlenb
11065; ZVFHMIN-NEXT:    vxor.vx v8, v16, a2, v0.t
11066; ZVFHMIN-NEXT:    csrr a0, vlenb
11067; ZVFHMIN-NEXT:    slli a0, a0, 5
11068; ZVFHMIN-NEXT:    add a0, sp, a0
11069; ZVFHMIN-NEXT:    addi a0, a0, 16
11070; ZVFHMIN-NEXT:    vs8r.v v8, (a0) # Unknown-size Folded Spill
11071; ZVFHMIN-NEXT:    slli a0, a3, 1
11072; ZVFHMIN-NEXT:    srli a3, a3, 2
11073; ZVFHMIN-NEXT:    sub a4, a1, a0
11074; ZVFHMIN-NEXT:    vsetvli a5, zero, e8, mf2, ta, ma
11075; ZVFHMIN-NEXT:    vslidedown.vx v6, v0, a3
11076; ZVFHMIN-NEXT:    sltu a3, a1, a4
11077; ZVFHMIN-NEXT:    vsetvli zero, a1, e16, m8, ta, ma
11078; ZVFHMIN-NEXT:    vxor.vx v24, v24, a2, v0.t
11079; ZVFHMIN-NEXT:    addi a3, a3, -1
11080; ZVFHMIN-NEXT:    and a3, a3, a4
11081; ZVFHMIN-NEXT:    vmv1r.v v0, v6
11082; ZVFHMIN-NEXT:    csrr a2, vlenb
11083; ZVFHMIN-NEXT:    slli a2, a2, 3
11084; ZVFHMIN-NEXT:    mv a4, a2
11085; ZVFHMIN-NEXT:    slli a2, a2, 1
11086; ZVFHMIN-NEXT:    add a2, a2, a4
11087; ZVFHMIN-NEXT:    add a2, sp, a2
11088; ZVFHMIN-NEXT:    addi a2, a2, 16
11089; ZVFHMIN-NEXT:    vs8r.v v24, (a2) # Unknown-size Folded Spill
11090; ZVFHMIN-NEXT:    vsetvli zero, a3, e16, m4, ta, ma
11091; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v28, v0.t
11092; ZVFHMIN-NEXT:    csrr a2, vlenb
11093; ZVFHMIN-NEXT:    slli a2, a2, 4
11094; ZVFHMIN-NEXT:    add a2, sp, a2
11095; ZVFHMIN-NEXT:    addi a2, a2, 16
11096; ZVFHMIN-NEXT:    vs8r.v v8, (a2) # Unknown-size Folded Spill
11097; ZVFHMIN-NEXT:    csrr a2, vlenb
11098; ZVFHMIN-NEXT:    slli a2, a2, 5
11099; ZVFHMIN-NEXT:    add a2, sp, a2
11100; ZVFHMIN-NEXT:    addi a2, a2, 16
11101; ZVFHMIN-NEXT:    vl8r.v v8, (a2) # Unknown-size Folded Reload
11102; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v12, v0.t
11103; ZVFHMIN-NEXT:    csrr a2, vlenb
11104; ZVFHMIN-NEXT:    slli a2, a2, 3
11105; ZVFHMIN-NEXT:    add a2, sp, a2
11106; ZVFHMIN-NEXT:    addi a2, a2, 16
11107; ZVFHMIN-NEXT:    vs8r.v v24, (a2) # Unknown-size Folded Spill
11108; ZVFHMIN-NEXT:    csrr a2, vlenb
11109; ZVFHMIN-NEXT:    slli a2, a2, 3
11110; ZVFHMIN-NEXT:    mv a3, a2
11111; ZVFHMIN-NEXT:    slli a2, a2, 2
11112; ZVFHMIN-NEXT:    add a2, a2, a3
11113; ZVFHMIN-NEXT:    add a2, sp, a2
11114; ZVFHMIN-NEXT:    addi a2, a2, 16
11115; ZVFHMIN-NEXT:    vl8r.v v8, (a2) # Unknown-size Folded Reload
11116; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v12, v0.t
11117; ZVFHMIN-NEXT:    addi a2, sp, 16
11118; ZVFHMIN-NEXT:    vs8r.v v16, (a2) # Unknown-size Folded Spill
11119; ZVFHMIN-NEXT:    csrr a2, vlenb
11120; ZVFHMIN-NEXT:    slli a2, a2, 4
11121; ZVFHMIN-NEXT:    add a2, sp, a2
11122; ZVFHMIN-NEXT:    addi a2, a2, 16
11123; ZVFHMIN-NEXT:    vl8r.v v8, (a2) # Unknown-size Folded Reload
11124; ZVFHMIN-NEXT:    csrr a2, vlenb
11125; ZVFHMIN-NEXT:    slli a2, a2, 3
11126; ZVFHMIN-NEXT:    add a2, sp, a2
11127; ZVFHMIN-NEXT:    addi a2, a2, 16
11128; ZVFHMIN-NEXT:    vl8r.v v24, (a2) # Unknown-size Folded Reload
11129; ZVFHMIN-NEXT:    addi a2, sp, 16
11130; ZVFHMIN-NEXT:    vl8r.v v16, (a2) # Unknown-size Folded Reload
11131; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
11132; ZVFHMIN-NEXT:    vfmadd.vv v16, v24, v8, v0.t
11133; ZVFHMIN-NEXT:    vmv.v.v v8, v16
11134; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
11135; ZVFHMIN-NEXT:    vfncvt.f.f.w v20, v8, v0.t
11136; ZVFHMIN-NEXT:    csrr a2, vlenb
11137; ZVFHMIN-NEXT:    slli a2, a2, 3
11138; ZVFHMIN-NEXT:    add a2, sp, a2
11139; ZVFHMIN-NEXT:    addi a2, a2, 16
11140; ZVFHMIN-NEXT:    vs8r.v v16, (a2) # Unknown-size Folded Spill
11141; ZVFHMIN-NEXT:    bltu a1, a0, .LBB299_2
11142; ZVFHMIN-NEXT:  # %bb.1:
11143; ZVFHMIN-NEXT:    mv a1, a0
11144; ZVFHMIN-NEXT:  .LBB299_2:
11145; ZVFHMIN-NEXT:    vmv1r.v v0, v7
11146; ZVFHMIN-NEXT:    csrr a0, vlenb
11147; ZVFHMIN-NEXT:    slli a0, a0, 5
11148; ZVFHMIN-NEXT:    add a0, sp, a0
11149; ZVFHMIN-NEXT:    addi a0, a0, 16
11150; ZVFHMIN-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
11151; ZVFHMIN-NEXT:    vsetvli zero, a1, e16, m4, ta, ma
11152; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v8, v0.t
11153; ZVFHMIN-NEXT:    csrr a0, vlenb
11154; ZVFHMIN-NEXT:    slli a0, a0, 4
11155; ZVFHMIN-NEXT:    add a0, sp, a0
11156; ZVFHMIN-NEXT:    addi a0, a0, 16
11157; ZVFHMIN-NEXT:    vs8r.v v24, (a0) # Unknown-size Folded Spill
11158; ZVFHMIN-NEXT:    csrr a0, vlenb
11159; ZVFHMIN-NEXT:    slli a0, a0, 3
11160; ZVFHMIN-NEXT:    mv a1, a0
11161; ZVFHMIN-NEXT:    slli a0, a0, 1
11162; ZVFHMIN-NEXT:    add a0, a0, a1
11163; ZVFHMIN-NEXT:    add a0, sp, a0
11164; ZVFHMIN-NEXT:    addi a0, a0, 16
11165; ZVFHMIN-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
11166; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v8, v0.t
11167; ZVFHMIN-NEXT:    csrr a0, vlenb
11168; ZVFHMIN-NEXT:    slli a0, a0, 5
11169; ZVFHMIN-NEXT:    add a0, sp, a0
11170; ZVFHMIN-NEXT:    addi a0, a0, 16
11171; ZVFHMIN-NEXT:    vs8r.v v16, (a0) # Unknown-size Folded Spill
11172; ZVFHMIN-NEXT:    csrr a0, vlenb
11173; ZVFHMIN-NEXT:    slli a0, a0, 3
11174; ZVFHMIN-NEXT:    mv a1, a0
11175; ZVFHMIN-NEXT:    slli a0, a0, 2
11176; ZVFHMIN-NEXT:    add a0, a0, a1
11177; ZVFHMIN-NEXT:    add a0, sp, a0
11178; ZVFHMIN-NEXT:    addi a0, a0, 16
11179; ZVFHMIN-NEXT:    vl8r.v v24, (a0) # Unknown-size Folded Reload
11180; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v24, v0.t
11181; ZVFHMIN-NEXT:    csrr a0, vlenb
11182; ZVFHMIN-NEXT:    slli a0, a0, 4
11183; ZVFHMIN-NEXT:    add a0, sp, a0
11184; ZVFHMIN-NEXT:    addi a0, a0, 16
11185; ZVFHMIN-NEXT:    vl8r.v v24, (a0) # Unknown-size Folded Reload
11186; ZVFHMIN-NEXT:    csrr a0, vlenb
11187; ZVFHMIN-NEXT:    slli a0, a0, 5
11188; ZVFHMIN-NEXT:    add a0, sp, a0
11189; ZVFHMIN-NEXT:    addi a0, a0, 16
11190; ZVFHMIN-NEXT:    vl8r.v v16, (a0) # Unknown-size Folded Reload
11191; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
11192; ZVFHMIN-NEXT:    vfmadd.vv v8, v24, v16, v0.t
11193; ZVFHMIN-NEXT:    vmv.v.v v16, v8
11194; ZVFHMIN-NEXT:    csrr a0, vlenb
11195; ZVFHMIN-NEXT:    slli a0, a0, 3
11196; ZVFHMIN-NEXT:    add a0, sp, a0
11197; ZVFHMIN-NEXT:    addi a0, a0, 16
11198; ZVFHMIN-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
11199; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
11200; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v16, v0.t
11201; ZVFHMIN-NEXT:    csrr a0, vlenb
11202; ZVFHMIN-NEXT:    slli a0, a0, 4
11203; ZVFHMIN-NEXT:    mv a1, a0
11204; ZVFHMIN-NEXT:    slli a0, a0, 1
11205; ZVFHMIN-NEXT:    add a0, a0, a1
11206; ZVFHMIN-NEXT:    add sp, sp, a0
11207; ZVFHMIN-NEXT:    .cfi_def_cfa sp, 16
11208; ZVFHMIN-NEXT:    addi sp, sp, 16
11209; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 0
11210; ZVFHMIN-NEXT:    ret
11211  %negb = call <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half> %b, <vscale x 32 x i1> %m, i32 %evl)
11212  %negc = call <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half> %c, <vscale x 32 x i1> %m, i32 %evl)
11213  %v = call <vscale x 32 x half> @llvm.vp.fma.nxv32f16(<vscale x 32 x half> %negb, <vscale x 32 x half> %va, <vscale x 32 x half> %negc, <vscale x 32 x i1> %m, i32 %evl)
11214  ret <vscale x 32 x half> %v
11215}
11216
11217define <vscale x 32 x half> @vfnmsub_vv_nxv32f16_unmasked(<vscale x 32 x half> %va, <vscale x 32 x half> %b, <vscale x 32 x half> %c, i32 zeroext %evl) {
11218; ZVFH-LABEL: vfnmsub_vv_nxv32f16_unmasked:
11219; ZVFH:       # %bb.0:
11220; ZVFH-NEXT:    vl8re16.v v24, (a0)
11221; ZVFH-NEXT:    vsetvli zero, a1, e16, m8, ta, ma
11222; ZVFH-NEXT:    vfnmadd.vv v8, v16, v24
11223; ZVFH-NEXT:    ret
11224;
11225; ZVFHMIN-LABEL: vfnmsub_vv_nxv32f16_unmasked:
11226; ZVFHMIN:       # %bb.0:
11227; ZVFHMIN-NEXT:    addi sp, sp, -16
11228; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 16
11229; ZVFHMIN-NEXT:    csrr a2, vlenb
11230; ZVFHMIN-NEXT:    slli a2, a2, 5
11231; ZVFHMIN-NEXT:    sub sp, sp, a2
11232; ZVFHMIN-NEXT:    .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 32 * vlenb
11233; ZVFHMIN-NEXT:    csrr a2, vlenb
11234; ZVFHMIN-NEXT:    slli a2, a2, 3
11235; ZVFHMIN-NEXT:    mv a3, a2
11236; ZVFHMIN-NEXT:    slli a2, a2, 1
11237; ZVFHMIN-NEXT:    add a2, a2, a3
11238; ZVFHMIN-NEXT:    add a2, sp, a2
11239; ZVFHMIN-NEXT:    addi a2, a2, 16
11240; ZVFHMIN-NEXT:    vs8r.v v8, (a2) # Unknown-size Folded Spill
11241; ZVFHMIN-NEXT:    vl8re16.v v24, (a0)
11242; ZVFHMIN-NEXT:    lui a2, 8
11243; ZVFHMIN-NEXT:    vsetvli a0, zero, e8, m4, ta, ma
11244; ZVFHMIN-NEXT:    vmset.m v8
11245; ZVFHMIN-NEXT:    csrr a3, vlenb
11246; ZVFHMIN-NEXT:    vsetvli zero, a1, e16, m8, ta, ma
11247; ZVFHMIN-NEXT:    vxor.vx v16, v16, a2
11248; ZVFHMIN-NEXT:    slli a0, a3, 1
11249; ZVFHMIN-NEXT:    srli a3, a3, 2
11250; ZVFHMIN-NEXT:    sub a4, a1, a0
11251; ZVFHMIN-NEXT:    vsetvli a5, zero, e8, mf2, ta, ma
11252; ZVFHMIN-NEXT:    vslidedown.vx v0, v8, a3
11253; ZVFHMIN-NEXT:    sltu a3, a1, a4
11254; ZVFHMIN-NEXT:    vsetvli zero, a1, e16, m8, ta, ma
11255; ZVFHMIN-NEXT:    vxor.vx v8, v24, a2
11256; ZVFHMIN-NEXT:    addi a3, a3, -1
11257; ZVFHMIN-NEXT:    and a3, a3, a4
11258; ZVFHMIN-NEXT:    csrr a2, vlenb
11259; ZVFHMIN-NEXT:    slli a2, a2, 3
11260; ZVFHMIN-NEXT:    add a2, sp, a2
11261; ZVFHMIN-NEXT:    addi a2, a2, 16
11262; ZVFHMIN-NEXT:    vs8r.v v8, (a2) # Unknown-size Folded Spill
11263; ZVFHMIN-NEXT:    vsetvli zero, a3, e16, m4, ta, ma
11264; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v12, v0.t
11265; ZVFHMIN-NEXT:    addi a2, sp, 16
11266; ZVFHMIN-NEXT:    vs8r.v v24, (a2) # Unknown-size Folded Spill
11267; ZVFHMIN-NEXT:    csrr a2, vlenb
11268; ZVFHMIN-NEXT:    slli a2, a2, 4
11269; ZVFHMIN-NEXT:    add a2, sp, a2
11270; ZVFHMIN-NEXT:    addi a2, a2, 16
11271; ZVFHMIN-NEXT:    vs8r.v v16, (a2) # Unknown-size Folded Spill
11272; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v20, v0.t
11273; ZVFHMIN-NEXT:    csrr a2, vlenb
11274; ZVFHMIN-NEXT:    slli a2, a2, 3
11275; ZVFHMIN-NEXT:    mv a3, a2
11276; ZVFHMIN-NEXT:    slli a2, a2, 1
11277; ZVFHMIN-NEXT:    add a2, a2, a3
11278; ZVFHMIN-NEXT:    add a2, sp, a2
11279; ZVFHMIN-NEXT:    addi a2, a2, 16
11280; ZVFHMIN-NEXT:    vl8r.v v16, (a2) # Unknown-size Folded Reload
11281; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v20, v0.t
11282; ZVFHMIN-NEXT:    addi a2, sp, 16
11283; ZVFHMIN-NEXT:    vl8r.v v16, (a2) # Unknown-size Folded Reload
11284; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
11285; ZVFHMIN-NEXT:    vfmadd.vv v24, v8, v16, v0.t
11286; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
11287; ZVFHMIN-NEXT:    vfncvt.f.f.w v12, v24, v0.t
11288; ZVFHMIN-NEXT:    bltu a1, a0, .LBB300_2
11289; ZVFHMIN-NEXT:  # %bb.1:
11290; ZVFHMIN-NEXT:    mv a1, a0
11291; ZVFHMIN-NEXT:  .LBB300_2:
11292; ZVFHMIN-NEXT:    csrr a0, vlenb
11293; ZVFHMIN-NEXT:    slli a0, a0, 4
11294; ZVFHMIN-NEXT:    add a0, sp, a0
11295; ZVFHMIN-NEXT:    addi a0, a0, 16
11296; ZVFHMIN-NEXT:    vl8r.v v16, (a0) # Unknown-size Folded Reload
11297; ZVFHMIN-NEXT:    vsetvli zero, a1, e16, m4, ta, ma
11298; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v16
11299; ZVFHMIN-NEXT:    addi a0, sp, 16
11300; ZVFHMIN-NEXT:    vs8r.v v24, (a0) # Unknown-size Folded Spill
11301; ZVFHMIN-NEXT:    csrr a0, vlenb
11302; ZVFHMIN-NEXT:    slli a0, a0, 3
11303; ZVFHMIN-NEXT:    add a0, sp, a0
11304; ZVFHMIN-NEXT:    addi a0, a0, 16
11305; ZVFHMIN-NEXT:    vl8r.v v16, (a0) # Unknown-size Folded Reload
11306; ZVFHMIN-NEXT:    vfwcvt.f.f.v v0, v16
11307; ZVFHMIN-NEXT:    csrr a0, vlenb
11308; ZVFHMIN-NEXT:    slli a0, a0, 3
11309; ZVFHMIN-NEXT:    mv a1, a0
11310; ZVFHMIN-NEXT:    slli a0, a0, 1
11311; ZVFHMIN-NEXT:    add a0, a0, a1
11312; ZVFHMIN-NEXT:    add a0, sp, a0
11313; ZVFHMIN-NEXT:    addi a0, a0, 16
11314; ZVFHMIN-NEXT:    vl8r.v v24, (a0) # Unknown-size Folded Reload
11315; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v24
11316; ZVFHMIN-NEXT:    addi a0, sp, 16
11317; ZVFHMIN-NEXT:    vl8r.v v24, (a0) # Unknown-size Folded Reload
11318; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
11319; ZVFHMIN-NEXT:    vfmadd.vv v16, v24, v0
11320; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
11321; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v16
11322; ZVFHMIN-NEXT:    csrr a0, vlenb
11323; ZVFHMIN-NEXT:    slli a0, a0, 5
11324; ZVFHMIN-NEXT:    add sp, sp, a0
11325; ZVFHMIN-NEXT:    .cfi_def_cfa sp, 16
11326; ZVFHMIN-NEXT:    addi sp, sp, 16
11327; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 0
11328; ZVFHMIN-NEXT:    ret
11329  %negb = call <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half> %b, <vscale x 32 x i1> splat (i1 true), i32 %evl)
11330  %negc = call <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half> %c, <vscale x 32 x i1> splat (i1 true), i32 %evl)
11331  %v = call <vscale x 32 x half> @llvm.vp.fma.nxv32f16(<vscale x 32 x half> %va, <vscale x 32 x half> %negb, <vscale x 32 x half> %negc, <vscale x 32 x i1> splat (i1 true), i32 %evl)
11332  ret <vscale x 32 x half> %v
11333}
11334
11335define <vscale x 32 x half> @vfnmsub_vv_nxv32f16_unmasked_commuted(<vscale x 32 x half> %va, <vscale x 32 x half> %b, <vscale x 32 x half> %c, i32 zeroext %evl) {
11336; ZVFH-LABEL: vfnmsub_vv_nxv32f16_unmasked_commuted:
11337; ZVFH:       # %bb.0:
11338; ZVFH-NEXT:    vl8re16.v v24, (a0)
11339; ZVFH-NEXT:    vsetvli zero, a1, e16, m8, ta, ma
11340; ZVFH-NEXT:    vfnmadd.vv v8, v16, v24
11341; ZVFH-NEXT:    ret
11342;
11343; ZVFHMIN-LABEL: vfnmsub_vv_nxv32f16_unmasked_commuted:
11344; ZVFHMIN:       # %bb.0:
11345; ZVFHMIN-NEXT:    addi sp, sp, -16
11346; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 16
11347; ZVFHMIN-NEXT:    csrr a2, vlenb
11348; ZVFHMIN-NEXT:    slli a2, a2, 5
11349; ZVFHMIN-NEXT:    sub sp, sp, a2
11350; ZVFHMIN-NEXT:    .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 32 * vlenb
11351; ZVFHMIN-NEXT:    csrr a2, vlenb
11352; ZVFHMIN-NEXT:    slli a2, a2, 3
11353; ZVFHMIN-NEXT:    mv a3, a2
11354; ZVFHMIN-NEXT:    slli a2, a2, 1
11355; ZVFHMIN-NEXT:    add a2, a2, a3
11356; ZVFHMIN-NEXT:    add a2, sp, a2
11357; ZVFHMIN-NEXT:    addi a2, a2, 16
11358; ZVFHMIN-NEXT:    vs8r.v v8, (a2) # Unknown-size Folded Spill
11359; ZVFHMIN-NEXT:    vl8re16.v v24, (a0)
11360; ZVFHMIN-NEXT:    lui a2, 8
11361; ZVFHMIN-NEXT:    vsetvli a0, zero, e8, m4, ta, ma
11362; ZVFHMIN-NEXT:    vmset.m v7
11363; ZVFHMIN-NEXT:    csrr a3, vlenb
11364; ZVFHMIN-NEXT:    vsetvli zero, a1, e16, m8, ta, ma
11365; ZVFHMIN-NEXT:    vxor.vx v8, v16, a2
11366; ZVFHMIN-NEXT:    slli a0, a3, 1
11367; ZVFHMIN-NEXT:    srli a3, a3, 2
11368; ZVFHMIN-NEXT:    sub a4, a1, a0
11369; ZVFHMIN-NEXT:    vsetvli a5, zero, e8, mf2, ta, ma
11370; ZVFHMIN-NEXT:    vslidedown.vx v0, v7, a3
11371; ZVFHMIN-NEXT:    sltu a3, a1, a4
11372; ZVFHMIN-NEXT:    vsetvli zero, a1, e16, m8, ta, ma
11373; ZVFHMIN-NEXT:    vxor.vx v24, v24, a2
11374; ZVFHMIN-NEXT:    addi a3, a3, -1
11375; ZVFHMIN-NEXT:    and a3, a3, a4
11376; ZVFHMIN-NEXT:    csrr a2, vlenb
11377; ZVFHMIN-NEXT:    slli a2, a2, 3
11378; ZVFHMIN-NEXT:    add a2, sp, a2
11379; ZVFHMIN-NEXT:    addi a2, a2, 16
11380; ZVFHMIN-NEXT:    vs8r.v v24, (a2) # Unknown-size Folded Spill
11381; ZVFHMIN-NEXT:    vsetvli zero, a3, e16, m4, ta, ma
11382; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v28, v0.t
11383; ZVFHMIN-NEXT:    addi a2, sp, 16
11384; ZVFHMIN-NEXT:    vs8r.v v16, (a2) # Unknown-size Folded Spill
11385; ZVFHMIN-NEXT:    vmv4r.v v16, v8
11386; ZVFHMIN-NEXT:    csrr a2, vlenb
11387; ZVFHMIN-NEXT:    slli a2, a2, 4
11388; ZVFHMIN-NEXT:    add a2, sp, a2
11389; ZVFHMIN-NEXT:    addi a2, a2, 16
11390; ZVFHMIN-NEXT:    vs8r.v v16, (a2) # Unknown-size Folded Spill
11391; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v12, v0.t
11392; ZVFHMIN-NEXT:    csrr a2, vlenb
11393; ZVFHMIN-NEXT:    slli a2, a2, 3
11394; ZVFHMIN-NEXT:    mv a3, a2
11395; ZVFHMIN-NEXT:    slli a2, a2, 1
11396; ZVFHMIN-NEXT:    add a2, a2, a3
11397; ZVFHMIN-NEXT:    add a2, sp, a2
11398; ZVFHMIN-NEXT:    addi a2, a2, 16
11399; ZVFHMIN-NEXT:    vl8r.v v8, (a2) # Unknown-size Folded Reload
11400; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v12, v0.t
11401; ZVFHMIN-NEXT:    addi a2, sp, 16
11402; ZVFHMIN-NEXT:    vl8r.v v8, (a2) # Unknown-size Folded Reload
11403; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
11404; ZVFHMIN-NEXT:    vfmadd.vv v16, v24, v8, v0.t
11405; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
11406; ZVFHMIN-NEXT:    vfncvt.f.f.w v12, v16, v0.t
11407; ZVFHMIN-NEXT:    bltu a1, a0, .LBB301_2
11408; ZVFHMIN-NEXT:  # %bb.1:
11409; ZVFHMIN-NEXT:    mv a1, a0
11410; ZVFHMIN-NEXT:  .LBB301_2:
11411; ZVFHMIN-NEXT:    csrr a0, vlenb
11412; ZVFHMIN-NEXT:    slli a0, a0, 4
11413; ZVFHMIN-NEXT:    add a0, sp, a0
11414; ZVFHMIN-NEXT:    addi a0, a0, 16
11415; ZVFHMIN-NEXT:    vl8r.v v16, (a0) # Unknown-size Folded Reload
11416; ZVFHMIN-NEXT:    vsetvli zero, a1, e16, m4, ta, ma
11417; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v16
11418; ZVFHMIN-NEXT:    addi a0, sp, 16
11419; ZVFHMIN-NEXT:    vs8r.v v24, (a0) # Unknown-size Folded Spill
11420; ZVFHMIN-NEXT:    csrr a0, vlenb
11421; ZVFHMIN-NEXT:    slli a0, a0, 3
11422; ZVFHMIN-NEXT:    add a0, sp, a0
11423; ZVFHMIN-NEXT:    addi a0, a0, 16
11424; ZVFHMIN-NEXT:    vl8r.v v16, (a0) # Unknown-size Folded Reload
11425; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v16
11426; ZVFHMIN-NEXT:    csrr a0, vlenb
11427; ZVFHMIN-NEXT:    slli a0, a0, 3
11428; ZVFHMIN-NEXT:    mv a1, a0
11429; ZVFHMIN-NEXT:    slli a0, a0, 1
11430; ZVFHMIN-NEXT:    add a0, a0, a1
11431; ZVFHMIN-NEXT:    add a0, sp, a0
11432; ZVFHMIN-NEXT:    addi a0, a0, 16
11433; ZVFHMIN-NEXT:    vl8r.v v16, (a0) # Unknown-size Folded Reload
11434; ZVFHMIN-NEXT:    vfwcvt.f.f.v v0, v16
11435; ZVFHMIN-NEXT:    addi a0, sp, 16
11436; ZVFHMIN-NEXT:    vl8r.v v16, (a0) # Unknown-size Folded Reload
11437; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
11438; ZVFHMIN-NEXT:    vfmadd.vv v0, v16, v24
11439; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
11440; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v0
11441; ZVFHMIN-NEXT:    csrr a0, vlenb
11442; ZVFHMIN-NEXT:    slli a0, a0, 5
11443; ZVFHMIN-NEXT:    add sp, sp, a0
11444; ZVFHMIN-NEXT:    .cfi_def_cfa sp, 16
11445; ZVFHMIN-NEXT:    addi sp, sp, 16
11446; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 0
11447; ZVFHMIN-NEXT:    ret
11448  %negb = call <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half> %b, <vscale x 32 x i1> splat (i1 true), i32 %evl)
11449  %negc = call <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half> %c, <vscale x 32 x i1> splat (i1 true), i32 %evl)
11450  %v = call <vscale x 32 x half> @llvm.vp.fma.nxv32f16(<vscale x 32 x half> %negb, <vscale x 32 x half> %va, <vscale x 32 x half> %negc, <vscale x 32 x i1> splat (i1 true), i32 %evl)
11451  ret <vscale x 32 x half> %v
11452}
11453
11454define <vscale x 32 x half> @vfnmsub_vf_nxv32f16(<vscale x 32 x half> %va, half %b, <vscale x 32 x half> %vc, <vscale x 32 x i1> %m, i32 zeroext %evl) {
11455; ZVFH-LABEL: vfnmsub_vf_nxv32f16:
11456; ZVFH:       # %bb.0:
11457; ZVFH-NEXT:    vsetvli zero, a0, e16, m8, ta, ma
11458; ZVFH-NEXT:    vfnmsub.vf v8, fa0, v16, v0.t
11459; ZVFH-NEXT:    ret
11460;
11461; ZVFHMIN-LABEL: vfnmsub_vf_nxv32f16:
11462; ZVFHMIN:       # %bb.0:
11463; ZVFHMIN-NEXT:    addi sp, sp, -16
11464; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 16
11465; ZVFHMIN-NEXT:    csrr a1, vlenb
11466; ZVFHMIN-NEXT:    slli a1, a1, 3
11467; ZVFHMIN-NEXT:    mv a2, a1
11468; ZVFHMIN-NEXT:    slli a1, a1, 2
11469; ZVFHMIN-NEXT:    add a1, a1, a2
11470; ZVFHMIN-NEXT:    sub sp, sp, a1
11471; ZVFHMIN-NEXT:    .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x28, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 40 * vlenb
11472; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m8, ta, ma
11473; ZVFHMIN-NEXT:    vmv1r.v v7, v0
11474; ZVFHMIN-NEXT:    vmv8r.v v24, v16
11475; ZVFHMIN-NEXT:    fmv.x.h a2, fa0
11476; ZVFHMIN-NEXT:    lui a1, 8
11477; ZVFHMIN-NEXT:    csrr a3, vlenb
11478; ZVFHMIN-NEXT:    vxor.vx v16, v8, a1, v0.t
11479; ZVFHMIN-NEXT:    slli a1, a3, 1
11480; ZVFHMIN-NEXT:    srli a3, a3, 2
11481; ZVFHMIN-NEXT:    sub a4, a0, a1
11482; ZVFHMIN-NEXT:    vsetvli a5, zero, e8, mf2, ta, ma
11483; ZVFHMIN-NEXT:    vslidedown.vx v0, v0, a3
11484; ZVFHMIN-NEXT:    sltu a3, a0, a4
11485; ZVFHMIN-NEXT:    addi a3, a3, -1
11486; ZVFHMIN-NEXT:    and a3, a3, a4
11487; ZVFHMIN-NEXT:    csrr a4, vlenb
11488; ZVFHMIN-NEXT:    slli a4, a4, 4
11489; ZVFHMIN-NEXT:    add a4, sp, a4
11490; ZVFHMIN-NEXT:    addi a4, a4, 16
11491; ZVFHMIN-NEXT:    vs8r.v v16, (a4) # Unknown-size Folded Spill
11492; ZVFHMIN-NEXT:    vsetvli zero, a3, e16, m4, ta, ma
11493; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v20, v0.t
11494; ZVFHMIN-NEXT:    csrr a4, vlenb
11495; ZVFHMIN-NEXT:    slli a4, a4, 3
11496; ZVFHMIN-NEXT:    add a4, sp, a4
11497; ZVFHMIN-NEXT:    addi a4, a4, 16
11498; ZVFHMIN-NEXT:    vs8r.v v8, (a4) # Unknown-size Folded Spill
11499; ZVFHMIN-NEXT:    csrr a4, vlenb
11500; ZVFHMIN-NEXT:    slli a4, a4, 3
11501; ZVFHMIN-NEXT:    mv a5, a4
11502; ZVFHMIN-NEXT:    slli a4, a4, 1
11503; ZVFHMIN-NEXT:    add a4, a4, a5
11504; ZVFHMIN-NEXT:    add a4, sp, a4
11505; ZVFHMIN-NEXT:    addi a4, a4, 16
11506; ZVFHMIN-NEXT:    vs8r.v v24, (a4) # Unknown-size Folded Spill
11507; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v28, v0.t
11508; ZVFHMIN-NEXT:    vsetvli a4, zero, e16, m8, ta, ma
11509; ZVFHMIN-NEXT:    vmv.v.x v24, a2
11510; ZVFHMIN-NEXT:    csrr a2, vlenb
11511; ZVFHMIN-NEXT:    slli a2, a2, 5
11512; ZVFHMIN-NEXT:    add a2, sp, a2
11513; ZVFHMIN-NEXT:    addi a2, a2, 16
11514; ZVFHMIN-NEXT:    vs8r.v v24, (a2) # Unknown-size Folded Spill
11515; ZVFHMIN-NEXT:    csrr a2, vlenb
11516; ZVFHMIN-NEXT:    slli a2, a2, 5
11517; ZVFHMIN-NEXT:    add a2, sp, a2
11518; ZVFHMIN-NEXT:    addi a2, a2, 16
11519; ZVFHMIN-NEXT:    vl8r.v v8, (a2) # Unknown-size Folded Reload
11520; ZVFHMIN-NEXT:    vsetvli zero, a3, e16, m4, ta, ma
11521; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v12, v0.t
11522; ZVFHMIN-NEXT:    csrr a2, vlenb
11523; ZVFHMIN-NEXT:    slli a2, a2, 3
11524; ZVFHMIN-NEXT:    add a2, sp, a2
11525; ZVFHMIN-NEXT:    addi a2, a2, 16
11526; ZVFHMIN-NEXT:    vl8r.v v8, (a2) # Unknown-size Folded Reload
11527; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
11528; ZVFHMIN-NEXT:    vfmadd.vv v24, v8, v16, v0.t
11529; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
11530; ZVFHMIN-NEXT:    vfncvt.f.f.w v12, v24, v0.t
11531; ZVFHMIN-NEXT:    addi a2, sp, 16
11532; ZVFHMIN-NEXT:    vs8r.v v8, (a2) # Unknown-size Folded Spill
11533; ZVFHMIN-NEXT:    bltu a0, a1, .LBB302_2
11534; ZVFHMIN-NEXT:  # %bb.1:
11535; ZVFHMIN-NEXT:    mv a0, a1
11536; ZVFHMIN-NEXT:  .LBB302_2:
11537; ZVFHMIN-NEXT:    vmv1r.v v0, v7
11538; ZVFHMIN-NEXT:    csrr a1, vlenb
11539; ZVFHMIN-NEXT:    slli a1, a1, 4
11540; ZVFHMIN-NEXT:    add a1, sp, a1
11541; ZVFHMIN-NEXT:    addi a1, a1, 16
11542; ZVFHMIN-NEXT:    vl8r.v v8, (a1) # Unknown-size Folded Reload
11543; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
11544; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v8, v0.t
11545; ZVFHMIN-NEXT:    csrr a0, vlenb
11546; ZVFHMIN-NEXT:    slli a0, a0, 3
11547; ZVFHMIN-NEXT:    add a0, sp, a0
11548; ZVFHMIN-NEXT:    addi a0, a0, 16
11549; ZVFHMIN-NEXT:    vs8r.v v24, (a0) # Unknown-size Folded Spill
11550; ZVFHMIN-NEXT:    csrr a0, vlenb
11551; ZVFHMIN-NEXT:    slli a0, a0, 3
11552; ZVFHMIN-NEXT:    mv a1, a0
11553; ZVFHMIN-NEXT:    slli a0, a0, 1
11554; ZVFHMIN-NEXT:    add a0, a0, a1
11555; ZVFHMIN-NEXT:    add a0, sp, a0
11556; ZVFHMIN-NEXT:    addi a0, a0, 16
11557; ZVFHMIN-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
11558; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v8, v0.t
11559; ZVFHMIN-NEXT:    csrr a0, vlenb
11560; ZVFHMIN-NEXT:    slli a0, a0, 4
11561; ZVFHMIN-NEXT:    add a0, sp, a0
11562; ZVFHMIN-NEXT:    addi a0, a0, 16
11563; ZVFHMIN-NEXT:    vs8r.v v16, (a0) # Unknown-size Folded Spill
11564; ZVFHMIN-NEXT:    csrr a0, vlenb
11565; ZVFHMIN-NEXT:    slli a0, a0, 5
11566; ZVFHMIN-NEXT:    add a0, sp, a0
11567; ZVFHMIN-NEXT:    addi a0, a0, 16
11568; ZVFHMIN-NEXT:    vl8r.v v24, (a0) # Unknown-size Folded Reload
11569; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v24, v0.t
11570; ZVFHMIN-NEXT:    csrr a0, vlenb
11571; ZVFHMIN-NEXT:    slli a0, a0, 3
11572; ZVFHMIN-NEXT:    add a0, sp, a0
11573; ZVFHMIN-NEXT:    addi a0, a0, 16
11574; ZVFHMIN-NEXT:    vl8r.v v24, (a0) # Unknown-size Folded Reload
11575; ZVFHMIN-NEXT:    csrr a0, vlenb
11576; ZVFHMIN-NEXT:    slli a0, a0, 4
11577; ZVFHMIN-NEXT:    add a0, sp, a0
11578; ZVFHMIN-NEXT:    addi a0, a0, 16
11579; ZVFHMIN-NEXT:    vl8r.v v16, (a0) # Unknown-size Folded Reload
11580; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
11581; ZVFHMIN-NEXT:    vfmadd.vv v8, v24, v16, v0.t
11582; ZVFHMIN-NEXT:    vmv.v.v v16, v8
11583; ZVFHMIN-NEXT:    addi a0, sp, 16
11584; ZVFHMIN-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
11585; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
11586; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v16, v0.t
11587; ZVFHMIN-NEXT:    csrr a0, vlenb
11588; ZVFHMIN-NEXT:    slli a0, a0, 3
11589; ZVFHMIN-NEXT:    mv a1, a0
11590; ZVFHMIN-NEXT:    slli a0, a0, 2
11591; ZVFHMIN-NEXT:    add a0, a0, a1
11592; ZVFHMIN-NEXT:    add sp, sp, a0
11593; ZVFHMIN-NEXT:    .cfi_def_cfa sp, 16
11594; ZVFHMIN-NEXT:    addi sp, sp, 16
11595; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 0
11596; ZVFHMIN-NEXT:    ret
11597  %elt.head = insertelement <vscale x 32 x half> poison, half %b, i32 0
11598  %vb = shufflevector <vscale x 32 x half> %elt.head, <vscale x 32 x half> poison, <vscale x 32 x i32> zeroinitializer
11599  %negva = call <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half> %va, <vscale x 32 x i1> %m, i32 %evl)
11600  %v = call <vscale x 32 x half> @llvm.vp.fma.nxv32f16(<vscale x 32 x half> %negva, <vscale x 32 x half> %vb, <vscale x 32 x half> %vc, <vscale x 32 x i1> %m, i32 %evl)
11601  ret <vscale x 32 x half> %v
11602}
11603
11604define <vscale x 32 x half> @vfnmsub_vf_nxv32f16_commute(<vscale x 32 x half> %va, half %b, <vscale x 32 x half> %vc, <vscale x 32 x i1> %m, i32 zeroext %evl) {
11605; ZVFH-LABEL: vfnmsub_vf_nxv32f16_commute:
11606; ZVFH:       # %bb.0:
11607; ZVFH-NEXT:    vsetvli zero, a0, e16, m8, ta, ma
11608; ZVFH-NEXT:    vfnmsub.vf v8, fa0, v16, v0.t
11609; ZVFH-NEXT:    ret
11610;
11611; ZVFHMIN-LABEL: vfnmsub_vf_nxv32f16_commute:
11612; ZVFHMIN:       # %bb.0:
11613; ZVFHMIN-NEXT:    addi sp, sp, -16
11614; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 16
11615; ZVFHMIN-NEXT:    csrr a1, vlenb
11616; ZVFHMIN-NEXT:    slli a1, a1, 3
11617; ZVFHMIN-NEXT:    mv a2, a1
11618; ZVFHMIN-NEXT:    slli a1, a1, 2
11619; ZVFHMIN-NEXT:    add a1, a1, a2
11620; ZVFHMIN-NEXT:    sub sp, sp, a1
11621; ZVFHMIN-NEXT:    .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x28, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 40 * vlenb
11622; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m8, ta, ma
11623; ZVFHMIN-NEXT:    vmv1r.v v7, v0
11624; ZVFHMIN-NEXT:    fmv.x.h a2, fa0
11625; ZVFHMIN-NEXT:    lui a1, 8
11626; ZVFHMIN-NEXT:    csrr a3, vlenb
11627; ZVFHMIN-NEXT:    vxor.vx v8, v8, a1, v0.t
11628; ZVFHMIN-NEXT:    slli a1, a3, 1
11629; ZVFHMIN-NEXT:    srli a3, a3, 2
11630; ZVFHMIN-NEXT:    sub a4, a0, a1
11631; ZVFHMIN-NEXT:    vsetvli a5, zero, e8, mf2, ta, ma
11632; ZVFHMIN-NEXT:    vslidedown.vx v0, v0, a3
11633; ZVFHMIN-NEXT:    sltu a3, a0, a4
11634; ZVFHMIN-NEXT:    addi a3, a3, -1
11635; ZVFHMIN-NEXT:    and a3, a3, a4
11636; ZVFHMIN-NEXT:    csrr a4, vlenb
11637; ZVFHMIN-NEXT:    slli a4, a4, 4
11638; ZVFHMIN-NEXT:    add a4, sp, a4
11639; ZVFHMIN-NEXT:    addi a4, a4, 16
11640; ZVFHMIN-NEXT:    vs8r.v v8, (a4) # Unknown-size Folded Spill
11641; ZVFHMIN-NEXT:    vsetvli zero, a3, e16, m4, ta, ma
11642; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v12, v0.t
11643; ZVFHMIN-NEXT:    csrr a4, vlenb
11644; ZVFHMIN-NEXT:    slli a4, a4, 3
11645; ZVFHMIN-NEXT:    mv a5, a4
11646; ZVFHMIN-NEXT:    slli a4, a4, 1
11647; ZVFHMIN-NEXT:    add a4, a4, a5
11648; ZVFHMIN-NEXT:    add a4, sp, a4
11649; ZVFHMIN-NEXT:    addi a4, a4, 16
11650; ZVFHMIN-NEXT:    vs8r.v v16, (a4) # Unknown-size Folded Spill
11651; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v20, v0.t
11652; ZVFHMIN-NEXT:    csrr a4, vlenb
11653; ZVFHMIN-NEXT:    slli a4, a4, 3
11654; ZVFHMIN-NEXT:    add a4, sp, a4
11655; ZVFHMIN-NEXT:    addi a4, a4, 16
11656; ZVFHMIN-NEXT:    vs8r.v v8, (a4) # Unknown-size Folded Spill
11657; ZVFHMIN-NEXT:    vsetvli a4, zero, e16, m8, ta, ma
11658; ZVFHMIN-NEXT:    vmv.v.x v16, a2
11659; ZVFHMIN-NEXT:    csrr a2, vlenb
11660; ZVFHMIN-NEXT:    slli a2, a2, 5
11661; ZVFHMIN-NEXT:    add a2, sp, a2
11662; ZVFHMIN-NEXT:    addi a2, a2, 16
11663; ZVFHMIN-NEXT:    vs8r.v v16, (a2) # Unknown-size Folded Spill
11664; ZVFHMIN-NEXT:    csrr a2, vlenb
11665; ZVFHMIN-NEXT:    slli a2, a2, 5
11666; ZVFHMIN-NEXT:    add a2, sp, a2
11667; ZVFHMIN-NEXT:    addi a2, a2, 16
11668; ZVFHMIN-NEXT:    vl8r.v v8, (a2) # Unknown-size Folded Reload
11669; ZVFHMIN-NEXT:    vsetvli zero, a3, e16, m4, ta, ma
11670; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v12, v0.t
11671; ZVFHMIN-NEXT:    csrr a2, vlenb
11672; ZVFHMIN-NEXT:    slli a2, a2, 3
11673; ZVFHMIN-NEXT:    add a2, sp, a2
11674; ZVFHMIN-NEXT:    addi a2, a2, 16
11675; ZVFHMIN-NEXT:    vl8r.v v8, (a2) # Unknown-size Folded Reload
11676; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
11677; ZVFHMIN-NEXT:    vfmadd.vv v24, v16, v8, v0.t
11678; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
11679; ZVFHMIN-NEXT:    vfncvt.f.f.w v12, v24, v0.t
11680; ZVFHMIN-NEXT:    csrr a2, vlenb
11681; ZVFHMIN-NEXT:    slli a2, a2, 3
11682; ZVFHMIN-NEXT:    add a2, sp, a2
11683; ZVFHMIN-NEXT:    addi a2, a2, 16
11684; ZVFHMIN-NEXT:    vs8r.v v8, (a2) # Unknown-size Folded Spill
11685; ZVFHMIN-NEXT:    bltu a0, a1, .LBB303_2
11686; ZVFHMIN-NEXT:  # %bb.1:
11687; ZVFHMIN-NEXT:    mv a0, a1
11688; ZVFHMIN-NEXT:  .LBB303_2:
11689; ZVFHMIN-NEXT:    vmv1r.v v0, v7
11690; ZVFHMIN-NEXT:    csrr a1, vlenb
11691; ZVFHMIN-NEXT:    slli a1, a1, 4
11692; ZVFHMIN-NEXT:    add a1, sp, a1
11693; ZVFHMIN-NEXT:    addi a1, a1, 16
11694; ZVFHMIN-NEXT:    vl8r.v v16, (a1) # Unknown-size Folded Reload
11695; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
11696; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v16, v0.t
11697; ZVFHMIN-NEXT:    addi a0, sp, 16
11698; ZVFHMIN-NEXT:    vs8r.v v8, (a0) # Unknown-size Folded Spill
11699; ZVFHMIN-NEXT:    csrr a0, vlenb
11700; ZVFHMIN-NEXT:    slli a0, a0, 3
11701; ZVFHMIN-NEXT:    mv a1, a0
11702; ZVFHMIN-NEXT:    slli a0, a0, 1
11703; ZVFHMIN-NEXT:    add a0, a0, a1
11704; ZVFHMIN-NEXT:    add a0, sp, a0
11705; ZVFHMIN-NEXT:    addi a0, a0, 16
11706; ZVFHMIN-NEXT:    vl8r.v v16, (a0) # Unknown-size Folded Reload
11707; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v16, v0.t
11708; ZVFHMIN-NEXT:    csrr a0, vlenb
11709; ZVFHMIN-NEXT:    slli a0, a0, 4
11710; ZVFHMIN-NEXT:    add a0, sp, a0
11711; ZVFHMIN-NEXT:    addi a0, a0, 16
11712; ZVFHMIN-NEXT:    vs8r.v v24, (a0) # Unknown-size Folded Spill
11713; ZVFHMIN-NEXT:    csrr a0, vlenb
11714; ZVFHMIN-NEXT:    slli a0, a0, 5
11715; ZVFHMIN-NEXT:    add a0, sp, a0
11716; ZVFHMIN-NEXT:    addi a0, a0, 16
11717; ZVFHMIN-NEXT:    vl8r.v v16, (a0) # Unknown-size Folded Reload
11718; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v16, v0.t
11719; ZVFHMIN-NEXT:    csrr a0, vlenb
11720; ZVFHMIN-NEXT:    slli a0, a0, 4
11721; ZVFHMIN-NEXT:    add a0, sp, a0
11722; ZVFHMIN-NEXT:    addi a0, a0, 16
11723; ZVFHMIN-NEXT:    vl8r.v v16, (a0) # Unknown-size Folded Reload
11724; ZVFHMIN-NEXT:    addi a0, sp, 16
11725; ZVFHMIN-NEXT:    vl8r.v v24, (a0) # Unknown-size Folded Reload
11726; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
11727; ZVFHMIN-NEXT:    vfmadd.vv v24, v8, v16, v0.t
11728; ZVFHMIN-NEXT:    csrr a0, vlenb
11729; ZVFHMIN-NEXT:    slli a0, a0, 3
11730; ZVFHMIN-NEXT:    add a0, sp, a0
11731; ZVFHMIN-NEXT:    addi a0, a0, 16
11732; ZVFHMIN-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
11733; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
11734; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v24, v0.t
11735; ZVFHMIN-NEXT:    csrr a0, vlenb
11736; ZVFHMIN-NEXT:    slli a0, a0, 3
11737; ZVFHMIN-NEXT:    mv a1, a0
11738; ZVFHMIN-NEXT:    slli a0, a0, 2
11739; ZVFHMIN-NEXT:    add a0, a0, a1
11740; ZVFHMIN-NEXT:    add sp, sp, a0
11741; ZVFHMIN-NEXT:    .cfi_def_cfa sp, 16
11742; ZVFHMIN-NEXT:    addi sp, sp, 16
11743; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 0
11744; ZVFHMIN-NEXT:    ret
11745  %elt.head = insertelement <vscale x 32 x half> poison, half %b, i32 0
11746  %vb = shufflevector <vscale x 32 x half> %elt.head, <vscale x 32 x half> poison, <vscale x 32 x i32> zeroinitializer
11747  %negva = call <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half> %va, <vscale x 32 x i1> %m, i32 %evl)
11748  %v = call <vscale x 32 x half> @llvm.vp.fma.nxv32f16(<vscale x 32 x half> %vb, <vscale x 32 x half> %negva, <vscale x 32 x half> %vc, <vscale x 32 x i1> %m, i32 %evl)
11749  ret <vscale x 32 x half> %v
11750}
11751
11752define <vscale x 32 x half> @vfnmsub_vf_nxv32f16_unmasked(<vscale x 32 x half> %va, half %b, <vscale x 32 x half> %vc, i32 zeroext %evl) {
11753; ZVFH-LABEL: vfnmsub_vf_nxv32f16_unmasked:
11754; ZVFH:       # %bb.0:
11755; ZVFH-NEXT:    vsetvli zero, a0, e16, m8, ta, ma
11756; ZVFH-NEXT:    vfnmsub.vf v8, fa0, v16
11757; ZVFH-NEXT:    ret
11758;
11759; ZVFHMIN-LABEL: vfnmsub_vf_nxv32f16_unmasked:
11760; ZVFHMIN:       # %bb.0:
11761; ZVFHMIN-NEXT:    addi sp, sp, -16
11762; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 16
11763; ZVFHMIN-NEXT:    csrr a1, vlenb
11764; ZVFHMIN-NEXT:    slli a1, a1, 5
11765; ZVFHMIN-NEXT:    sub sp, sp, a1
11766; ZVFHMIN-NEXT:    .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 32 * vlenb
11767; ZVFHMIN-NEXT:    fmv.x.h a2, fa0
11768; ZVFHMIN-NEXT:    lui a1, 8
11769; ZVFHMIN-NEXT:    vsetvli a3, zero, e8, m4, ta, ma
11770; ZVFHMIN-NEXT:    vmset.m v24
11771; ZVFHMIN-NEXT:    csrr a3, vlenb
11772; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m8, ta, ma
11773; ZVFHMIN-NEXT:    vxor.vx v8, v8, a1
11774; ZVFHMIN-NEXT:    slli a1, a3, 1
11775; ZVFHMIN-NEXT:    srli a3, a3, 2
11776; ZVFHMIN-NEXT:    sub a4, a0, a1
11777; ZVFHMIN-NEXT:    vsetvli a5, zero, e8, mf2, ta, ma
11778; ZVFHMIN-NEXT:    vslidedown.vx v0, v24, a3
11779; ZVFHMIN-NEXT:    sltu a3, a0, a4
11780; ZVFHMIN-NEXT:    addi a3, a3, -1
11781; ZVFHMIN-NEXT:    and a3, a3, a4
11782; ZVFHMIN-NEXT:    csrr a4, vlenb
11783; ZVFHMIN-NEXT:    slli a4, a4, 3
11784; ZVFHMIN-NEXT:    add a4, sp, a4
11785; ZVFHMIN-NEXT:    addi a4, a4, 16
11786; ZVFHMIN-NEXT:    vs8r.v v8, (a4) # Unknown-size Folded Spill
11787; ZVFHMIN-NEXT:    vsetvli zero, a3, e16, m4, ta, ma
11788; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v12, v0.t
11789; ZVFHMIN-NEXT:    addi a4, sp, 16
11790; ZVFHMIN-NEXT:    vs8r.v v24, (a4) # Unknown-size Folded Spill
11791; ZVFHMIN-NEXT:    csrr a4, vlenb
11792; ZVFHMIN-NEXT:    slli a4, a4, 4
11793; ZVFHMIN-NEXT:    add a4, sp, a4
11794; ZVFHMIN-NEXT:    addi a4, a4, 16
11795; ZVFHMIN-NEXT:    vs8r.v v16, (a4) # Unknown-size Folded Spill
11796; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v20, v0.t
11797; ZVFHMIN-NEXT:    vsetvli a4, zero, e16, m8, ta, ma
11798; ZVFHMIN-NEXT:    vmv.v.x v16, a2
11799; ZVFHMIN-NEXT:    csrr a2, vlenb
11800; ZVFHMIN-NEXT:    slli a2, a2, 3
11801; ZVFHMIN-NEXT:    mv a4, a2
11802; ZVFHMIN-NEXT:    slli a2, a2, 1
11803; ZVFHMIN-NEXT:    add a2, a2, a4
11804; ZVFHMIN-NEXT:    add a2, sp, a2
11805; ZVFHMIN-NEXT:    addi a2, a2, 16
11806; ZVFHMIN-NEXT:    vs8r.v v16, (a2) # Unknown-size Folded Spill
11807; ZVFHMIN-NEXT:    csrr a2, vlenb
11808; ZVFHMIN-NEXT:    slli a2, a2, 3
11809; ZVFHMIN-NEXT:    mv a4, a2
11810; ZVFHMIN-NEXT:    slli a2, a2, 1
11811; ZVFHMIN-NEXT:    add a2, a2, a4
11812; ZVFHMIN-NEXT:    add a2, sp, a2
11813; ZVFHMIN-NEXT:    addi a2, a2, 16
11814; ZVFHMIN-NEXT:    vl8r.v v24, (a2) # Unknown-size Folded Reload
11815; ZVFHMIN-NEXT:    vsetvli zero, a3, e16, m4, ta, ma
11816; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v28, v0.t
11817; ZVFHMIN-NEXT:    addi a2, sp, 16
11818; ZVFHMIN-NEXT:    vl8r.v v24, (a2) # Unknown-size Folded Reload
11819; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
11820; ZVFHMIN-NEXT:    vfmadd.vv v16, v24, v8, v0.t
11821; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
11822; ZVFHMIN-NEXT:    vfncvt.f.f.w v12, v16, v0.t
11823; ZVFHMIN-NEXT:    bltu a0, a1, .LBB304_2
11824; ZVFHMIN-NEXT:  # %bb.1:
11825; ZVFHMIN-NEXT:    mv a0, a1
11826; ZVFHMIN-NEXT:  .LBB304_2:
11827; ZVFHMIN-NEXT:    csrr a1, vlenb
11828; ZVFHMIN-NEXT:    slli a1, a1, 3
11829; ZVFHMIN-NEXT:    add a1, sp, a1
11830; ZVFHMIN-NEXT:    addi a1, a1, 16
11831; ZVFHMIN-NEXT:    vl8r.v v24, (a1) # Unknown-size Folded Reload
11832; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
11833; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v24
11834; ZVFHMIN-NEXT:    addi a0, sp, 16
11835; ZVFHMIN-NEXT:    vs8r.v v16, (a0) # Unknown-size Folded Spill
11836; ZVFHMIN-NEXT:    csrr a0, vlenb
11837; ZVFHMIN-NEXT:    slli a0, a0, 4
11838; ZVFHMIN-NEXT:    add a0, sp, a0
11839; ZVFHMIN-NEXT:    addi a0, a0, 16
11840; ZVFHMIN-NEXT:    vl8r.v v0, (a0) # Unknown-size Folded Reload
11841; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v0
11842; ZVFHMIN-NEXT:    csrr a0, vlenb
11843; ZVFHMIN-NEXT:    slli a0, a0, 3
11844; ZVFHMIN-NEXT:    mv a1, a0
11845; ZVFHMIN-NEXT:    slli a0, a0, 1
11846; ZVFHMIN-NEXT:    add a0, a0, a1
11847; ZVFHMIN-NEXT:    add a0, sp, a0
11848; ZVFHMIN-NEXT:    addi a0, a0, 16
11849; ZVFHMIN-NEXT:    vl8r.v v16, (a0) # Unknown-size Folded Reload
11850; ZVFHMIN-NEXT:    vfwcvt.f.f.v v0, v16
11851; ZVFHMIN-NEXT:    addi a0, sp, 16
11852; ZVFHMIN-NEXT:    vl8r.v v16, (a0) # Unknown-size Folded Reload
11853; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
11854; ZVFHMIN-NEXT:    vfmadd.vv v0, v16, v24
11855; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
11856; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v0
11857; ZVFHMIN-NEXT:    csrr a0, vlenb
11858; ZVFHMIN-NEXT:    slli a0, a0, 5
11859; ZVFHMIN-NEXT:    add sp, sp, a0
11860; ZVFHMIN-NEXT:    .cfi_def_cfa sp, 16
11861; ZVFHMIN-NEXT:    addi sp, sp, 16
11862; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 0
11863; ZVFHMIN-NEXT:    ret
11864  %elt.head = insertelement <vscale x 32 x half> poison, half %b, i32 0
11865  %vb = shufflevector <vscale x 32 x half> %elt.head, <vscale x 32 x half> poison, <vscale x 32 x i32> zeroinitializer
11866  %negva = call <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half> %va, <vscale x 32 x i1> splat (i1 true), i32 %evl)
11867  %v = call <vscale x 32 x half> @llvm.vp.fma.nxv32f16(<vscale x 32 x half> %negva, <vscale x 32 x half> %vb, <vscale x 32 x half> %vc, <vscale x 32 x i1> splat (i1 true), i32 %evl)
11868  ret <vscale x 32 x half> %v
11869}
11870
11871define <vscale x 32 x half> @vfnmsub_vf_nxv32f16_unmasked_commute(<vscale x 32 x half> %va, half %b, <vscale x 32 x half> %vc, i32 zeroext %evl) {
11872; ZVFH-LABEL: vfnmsub_vf_nxv32f16_unmasked_commute:
11873; ZVFH:       # %bb.0:
11874; ZVFH-NEXT:    vsetvli zero, a0, e16, m8, ta, ma
11875; ZVFH-NEXT:    vfnmsub.vf v8, fa0, v16
11876; ZVFH-NEXT:    ret
11877;
11878; ZVFHMIN-LABEL: vfnmsub_vf_nxv32f16_unmasked_commute:
11879; ZVFHMIN:       # %bb.0:
11880; ZVFHMIN-NEXT:    addi sp, sp, -16
11881; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 16
11882; ZVFHMIN-NEXT:    csrr a1, vlenb
11883; ZVFHMIN-NEXT:    slli a1, a1, 5
11884; ZVFHMIN-NEXT:    sub sp, sp, a1
11885; ZVFHMIN-NEXT:    .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 32 * vlenb
11886; ZVFHMIN-NEXT:    fmv.x.h a2, fa0
11887; ZVFHMIN-NEXT:    lui a1, 8
11888; ZVFHMIN-NEXT:    vsetvli a3, zero, e8, m4, ta, ma
11889; ZVFHMIN-NEXT:    vmset.m v24
11890; ZVFHMIN-NEXT:    csrr a3, vlenb
11891; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m8, ta, ma
11892; ZVFHMIN-NEXT:    vxor.vx v8, v8, a1
11893; ZVFHMIN-NEXT:    slli a1, a3, 1
11894; ZVFHMIN-NEXT:    srli a3, a3, 2
11895; ZVFHMIN-NEXT:    sub a4, a0, a1
11896; ZVFHMIN-NEXT:    vsetvli a5, zero, e8, mf2, ta, ma
11897; ZVFHMIN-NEXT:    vslidedown.vx v0, v24, a3
11898; ZVFHMIN-NEXT:    sltu a3, a0, a4
11899; ZVFHMIN-NEXT:    addi a3, a3, -1
11900; ZVFHMIN-NEXT:    and a3, a3, a4
11901; ZVFHMIN-NEXT:    csrr a4, vlenb
11902; ZVFHMIN-NEXT:    slli a4, a4, 3
11903; ZVFHMIN-NEXT:    add a4, sp, a4
11904; ZVFHMIN-NEXT:    addi a4, a4, 16
11905; ZVFHMIN-NEXT:    vs8r.v v8, (a4) # Unknown-size Folded Spill
11906; ZVFHMIN-NEXT:    vsetvli zero, a3, e16, m4, ta, ma
11907; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v12, v0.t
11908; ZVFHMIN-NEXT:    csrr a4, vlenb
11909; ZVFHMIN-NEXT:    slli a4, a4, 4
11910; ZVFHMIN-NEXT:    add a4, sp, a4
11911; ZVFHMIN-NEXT:    addi a4, a4, 16
11912; ZVFHMIN-NEXT:    vs8r.v v16, (a4) # Unknown-size Folded Spill
11913; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v20, v0.t
11914; ZVFHMIN-NEXT:    addi a4, sp, 16
11915; ZVFHMIN-NEXT:    vs8r.v v8, (a4) # Unknown-size Folded Spill
11916; ZVFHMIN-NEXT:    vsetvli a4, zero, e16, m8, ta, ma
11917; ZVFHMIN-NEXT:    vmv.v.x v16, a2
11918; ZVFHMIN-NEXT:    csrr a2, vlenb
11919; ZVFHMIN-NEXT:    slli a2, a2, 3
11920; ZVFHMIN-NEXT:    mv a4, a2
11921; ZVFHMIN-NEXT:    slli a2, a2, 1
11922; ZVFHMIN-NEXT:    add a2, a2, a4
11923; ZVFHMIN-NEXT:    add a2, sp, a2
11924; ZVFHMIN-NEXT:    addi a2, a2, 16
11925; ZVFHMIN-NEXT:    vs8r.v v16, (a2) # Unknown-size Folded Spill
11926; ZVFHMIN-NEXT:    csrr a2, vlenb
11927; ZVFHMIN-NEXT:    slli a2, a2, 3
11928; ZVFHMIN-NEXT:    mv a4, a2
11929; ZVFHMIN-NEXT:    slli a2, a2, 1
11930; ZVFHMIN-NEXT:    add a2, a2, a4
11931; ZVFHMIN-NEXT:    add a2, sp, a2
11932; ZVFHMIN-NEXT:    addi a2, a2, 16
11933; ZVFHMIN-NEXT:    vl8r.v v8, (a2) # Unknown-size Folded Reload
11934; ZVFHMIN-NEXT:    vsetvli zero, a3, e16, m4, ta, ma
11935; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v12, v0.t
11936; ZVFHMIN-NEXT:    addi a2, sp, 16
11937; ZVFHMIN-NEXT:    vl8r.v v8, (a2) # Unknown-size Folded Reload
11938; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
11939; ZVFHMIN-NEXT:    vfmadd.vv v24, v16, v8, v0.t
11940; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
11941; ZVFHMIN-NEXT:    vfncvt.f.f.w v12, v24, v0.t
11942; ZVFHMIN-NEXT:    bltu a0, a1, .LBB305_2
11943; ZVFHMIN-NEXT:  # %bb.1:
11944; ZVFHMIN-NEXT:    mv a0, a1
11945; ZVFHMIN-NEXT:  .LBB305_2:
11946; ZVFHMIN-NEXT:    csrr a1, vlenb
11947; ZVFHMIN-NEXT:    slli a1, a1, 3
11948; ZVFHMIN-NEXT:    add a1, sp, a1
11949; ZVFHMIN-NEXT:    addi a1, a1, 16
11950; ZVFHMIN-NEXT:    vl8r.v v24, (a1) # Unknown-size Folded Reload
11951; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
11952; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v24
11953; ZVFHMIN-NEXT:    addi a0, sp, 16
11954; ZVFHMIN-NEXT:    vs8r.v v16, (a0) # Unknown-size Folded Spill
11955; ZVFHMIN-NEXT:    csrr a0, vlenb
11956; ZVFHMIN-NEXT:    slli a0, a0, 4
11957; ZVFHMIN-NEXT:    add a0, sp, a0
11958; ZVFHMIN-NEXT:    addi a0, a0, 16
11959; ZVFHMIN-NEXT:    vl8r.v v0, (a0) # Unknown-size Folded Reload
11960; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v0
11961; ZVFHMIN-NEXT:    csrr a0, vlenb
11962; ZVFHMIN-NEXT:    slli a0, a0, 3
11963; ZVFHMIN-NEXT:    mv a1, a0
11964; ZVFHMIN-NEXT:    slli a0, a0, 1
11965; ZVFHMIN-NEXT:    add a0, a0, a1
11966; ZVFHMIN-NEXT:    add a0, sp, a0
11967; ZVFHMIN-NEXT:    addi a0, a0, 16
11968; ZVFHMIN-NEXT:    vl8r.v v16, (a0) # Unknown-size Folded Reload
11969; ZVFHMIN-NEXT:    vfwcvt.f.f.v v0, v16
11970; ZVFHMIN-NEXT:    addi a0, sp, 16
11971; ZVFHMIN-NEXT:    vl8r.v v16, (a0) # Unknown-size Folded Reload
11972; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
11973; ZVFHMIN-NEXT:    vfmadd.vv v0, v16, v24
11974; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
11975; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v0
11976; ZVFHMIN-NEXT:    csrr a0, vlenb
11977; ZVFHMIN-NEXT:    slli a0, a0, 5
11978; ZVFHMIN-NEXT:    add sp, sp, a0
11979; ZVFHMIN-NEXT:    .cfi_def_cfa sp, 16
11980; ZVFHMIN-NEXT:    addi sp, sp, 16
11981; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 0
11982; ZVFHMIN-NEXT:    ret
11983  %elt.head = insertelement <vscale x 32 x half> poison, half %b, i32 0
11984  %vb = shufflevector <vscale x 32 x half> %elt.head, <vscale x 32 x half> poison, <vscale x 32 x i32> zeroinitializer
11985  %negva = call <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half> %va, <vscale x 32 x i1> splat (i1 true), i32 %evl)
11986  %v = call <vscale x 32 x half> @llvm.vp.fma.nxv32f16(<vscale x 32 x half> %vb, <vscale x 32 x half> %negva, <vscale x 32 x half> %vc, <vscale x 32 x i1> splat (i1 true), i32 %evl)
11987  ret <vscale x 32 x half> %v
11988}
11989
11990define <vscale x 32 x half> @vfnmsub_vf_nxv32f16_neg_splat(<vscale x 32 x half> %va, half %b, <vscale x 32 x half> %vc, <vscale x 32 x i1> %m, i32 zeroext %evl) {
11991; ZVFH-LABEL: vfnmsub_vf_nxv32f16_neg_splat:
11992; ZVFH:       # %bb.0:
11993; ZVFH-NEXT:    vsetvli zero, a0, e16, m8, ta, ma
11994; ZVFH-NEXT:    vfnmsub.vf v8, fa0, v16, v0.t
11995; ZVFH-NEXT:    ret
11996;
11997; ZVFHMIN-LABEL: vfnmsub_vf_nxv32f16_neg_splat:
11998; ZVFHMIN:       # %bb.0:
11999; ZVFHMIN-NEXT:    addi sp, sp, -16
12000; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 16
12001; ZVFHMIN-NEXT:    csrr a1, vlenb
12002; ZVFHMIN-NEXT:    slli a1, a1, 3
12003; ZVFHMIN-NEXT:    mv a2, a1
12004; ZVFHMIN-NEXT:    slli a1, a1, 2
12005; ZVFHMIN-NEXT:    add a1, a1, a2
12006; ZVFHMIN-NEXT:    sub sp, sp, a1
12007; ZVFHMIN-NEXT:    .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x28, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 40 * vlenb
12008; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m8, ta, ma
12009; ZVFHMIN-NEXT:    vmv1r.v v7, v0
12010; ZVFHMIN-NEXT:    csrr a1, vlenb
12011; ZVFHMIN-NEXT:    slli a1, a1, 3
12012; ZVFHMIN-NEXT:    mv a2, a1
12013; ZVFHMIN-NEXT:    slli a1, a1, 1
12014; ZVFHMIN-NEXT:    add a1, a1, a2
12015; ZVFHMIN-NEXT:    add a1, sp, a1
12016; ZVFHMIN-NEXT:    addi a1, a1, 16
12017; ZVFHMIN-NEXT:    vs8r.v v16, (a1) # Unknown-size Folded Spill
12018; ZVFHMIN-NEXT:    csrr a1, vlenb
12019; ZVFHMIN-NEXT:    slli a1, a1, 5
12020; ZVFHMIN-NEXT:    add a1, sp, a1
12021; ZVFHMIN-NEXT:    addi a1, a1, 16
12022; ZVFHMIN-NEXT:    vs8r.v v8, (a1) # Unknown-size Folded Spill
12023; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
12024; ZVFHMIN-NEXT:    lui a2, 8
12025; ZVFHMIN-NEXT:    csrr a3, vlenb
12026; ZVFHMIN-NEXT:    vmv.v.x v16, a1
12027; ZVFHMIN-NEXT:    slli a1, a3, 1
12028; ZVFHMIN-NEXT:    srli a3, a3, 2
12029; ZVFHMIN-NEXT:    vxor.vx v8, v16, a2, v0.t
12030; ZVFHMIN-NEXT:    sub a2, a0, a1
12031; ZVFHMIN-NEXT:    vsetvli a4, zero, e8, mf2, ta, ma
12032; ZVFHMIN-NEXT:    vslidedown.vx v0, v0, a3
12033; ZVFHMIN-NEXT:    sltu a3, a0, a2
12034; ZVFHMIN-NEXT:    addi a3, a3, -1
12035; ZVFHMIN-NEXT:    and a2, a3, a2
12036; ZVFHMIN-NEXT:    csrr a3, vlenb
12037; ZVFHMIN-NEXT:    slli a3, a3, 4
12038; ZVFHMIN-NEXT:    add a3, sp, a3
12039; ZVFHMIN-NEXT:    addi a3, a3, 16
12040; ZVFHMIN-NEXT:    vs8r.v v8, (a3) # Unknown-size Folded Spill
12041; ZVFHMIN-NEXT:    vsetvli zero, a2, e16, m4, ta, ma
12042; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v12, v0.t
12043; ZVFHMIN-NEXT:    csrr a2, vlenb
12044; ZVFHMIN-NEXT:    slli a2, a2, 3
12045; ZVFHMIN-NEXT:    mv a3, a2
12046; ZVFHMIN-NEXT:    slli a2, a2, 1
12047; ZVFHMIN-NEXT:    add a2, a2, a3
12048; ZVFHMIN-NEXT:    add a2, sp, a2
12049; ZVFHMIN-NEXT:    addi a2, a2, 16
12050; ZVFHMIN-NEXT:    vl8r.v v8, (a2) # Unknown-size Folded Reload
12051; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v12, v0.t
12052; ZVFHMIN-NEXT:    csrr a2, vlenb
12053; ZVFHMIN-NEXT:    slli a2, a2, 3
12054; ZVFHMIN-NEXT:    add a2, sp, a2
12055; ZVFHMIN-NEXT:    addi a2, a2, 16
12056; ZVFHMIN-NEXT:    vs8r.v v24, (a2) # Unknown-size Folded Spill
12057; ZVFHMIN-NEXT:    csrr a2, vlenb
12058; ZVFHMIN-NEXT:    slli a2, a2, 5
12059; ZVFHMIN-NEXT:    add a2, sp, a2
12060; ZVFHMIN-NEXT:    addi a2, a2, 16
12061; ZVFHMIN-NEXT:    vl8r.v v24, (a2) # Unknown-size Folded Reload
12062; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v28, v0.t
12063; ZVFHMIN-NEXT:    csrr a2, vlenb
12064; ZVFHMIN-NEXT:    slli a2, a2, 3
12065; ZVFHMIN-NEXT:    add a2, sp, a2
12066; ZVFHMIN-NEXT:    addi a2, a2, 16
12067; ZVFHMIN-NEXT:    vl8r.v v24, (a2) # Unknown-size Folded Reload
12068; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
12069; ZVFHMIN-NEXT:    vfmadd.vv v16, v8, v24, v0.t
12070; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
12071; ZVFHMIN-NEXT:    vfncvt.f.f.w v12, v16, v0.t
12072; ZVFHMIN-NEXT:    csrr a2, vlenb
12073; ZVFHMIN-NEXT:    slli a2, a2, 3
12074; ZVFHMIN-NEXT:    add a2, sp, a2
12075; ZVFHMIN-NEXT:    addi a2, a2, 16
12076; ZVFHMIN-NEXT:    vs8r.v v8, (a2) # Unknown-size Folded Spill
12077; ZVFHMIN-NEXT:    bltu a0, a1, .LBB306_2
12078; ZVFHMIN-NEXT:  # %bb.1:
12079; ZVFHMIN-NEXT:    mv a0, a1
12080; ZVFHMIN-NEXT:  .LBB306_2:
12081; ZVFHMIN-NEXT:    vmv1r.v v0, v7
12082; ZVFHMIN-NEXT:    csrr a1, vlenb
12083; ZVFHMIN-NEXT:    slli a1, a1, 4
12084; ZVFHMIN-NEXT:    add a1, sp, a1
12085; ZVFHMIN-NEXT:    addi a1, a1, 16
12086; ZVFHMIN-NEXT:    vl8r.v v24, (a1) # Unknown-size Folded Reload
12087; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
12088; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v24, v0.t
12089; ZVFHMIN-NEXT:    addi a0, sp, 16
12090; ZVFHMIN-NEXT:    vs8r.v v8, (a0) # Unknown-size Folded Spill
12091; ZVFHMIN-NEXT:    csrr a0, vlenb
12092; ZVFHMIN-NEXT:    slli a0, a0, 3
12093; ZVFHMIN-NEXT:    mv a1, a0
12094; ZVFHMIN-NEXT:    slli a0, a0, 1
12095; ZVFHMIN-NEXT:    add a0, a0, a1
12096; ZVFHMIN-NEXT:    add a0, sp, a0
12097; ZVFHMIN-NEXT:    addi a0, a0, 16
12098; ZVFHMIN-NEXT:    vl8r.v v24, (a0) # Unknown-size Folded Reload
12099; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v24, v0.t
12100; ZVFHMIN-NEXT:    csrr a0, vlenb
12101; ZVFHMIN-NEXT:    slli a0, a0, 4
12102; ZVFHMIN-NEXT:    add a0, sp, a0
12103; ZVFHMIN-NEXT:    addi a0, a0, 16
12104; ZVFHMIN-NEXT:    vs8r.v v16, (a0) # Unknown-size Folded Spill
12105; ZVFHMIN-NEXT:    csrr a0, vlenb
12106; ZVFHMIN-NEXT:    slli a0, a0, 5
12107; ZVFHMIN-NEXT:    add a0, sp, a0
12108; ZVFHMIN-NEXT:    addi a0, a0, 16
12109; ZVFHMIN-NEXT:    vl8r.v v24, (a0) # Unknown-size Folded Reload
12110; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v24, v0.t
12111; ZVFHMIN-NEXT:    csrr a0, vlenb
12112; ZVFHMIN-NEXT:    slli a0, a0, 4
12113; ZVFHMIN-NEXT:    add a0, sp, a0
12114; ZVFHMIN-NEXT:    addi a0, a0, 16
12115; ZVFHMIN-NEXT:    vl8r.v v24, (a0) # Unknown-size Folded Reload
12116; ZVFHMIN-NEXT:    addi a0, sp, 16
12117; ZVFHMIN-NEXT:    vl8r.v v16, (a0) # Unknown-size Folded Reload
12118; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
12119; ZVFHMIN-NEXT:    vfmadd.vv v16, v8, v24, v0.t
12120; ZVFHMIN-NEXT:    csrr a0, vlenb
12121; ZVFHMIN-NEXT:    slli a0, a0, 3
12122; ZVFHMIN-NEXT:    add a0, sp, a0
12123; ZVFHMIN-NEXT:    addi a0, a0, 16
12124; ZVFHMIN-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
12125; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
12126; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v16, v0.t
12127; ZVFHMIN-NEXT:    csrr a0, vlenb
12128; ZVFHMIN-NEXT:    slli a0, a0, 3
12129; ZVFHMIN-NEXT:    mv a1, a0
12130; ZVFHMIN-NEXT:    slli a0, a0, 2
12131; ZVFHMIN-NEXT:    add a0, a0, a1
12132; ZVFHMIN-NEXT:    add sp, sp, a0
12133; ZVFHMIN-NEXT:    .cfi_def_cfa sp, 16
12134; ZVFHMIN-NEXT:    addi sp, sp, 16
12135; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 0
12136; ZVFHMIN-NEXT:    ret
12137  %elt.head = insertelement <vscale x 32 x half> poison, half %b, i32 0
12138  %vb = shufflevector <vscale x 32 x half> %elt.head, <vscale x 32 x half> poison, <vscale x 32 x i32> zeroinitializer
12139  %negvb = call <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half> %vb, <vscale x 32 x i1> %m, i32 %evl)
12140  %v = call <vscale x 32 x half> @llvm.vp.fma.nxv32f16(<vscale x 32 x half> %va, <vscale x 32 x half> %negvb, <vscale x 32 x half> %vc, <vscale x 32 x i1> %m, i32 %evl)
12141  ret <vscale x 32 x half> %v
12142}
12143
12144define <vscale x 32 x half> @vfnmsub_vf_nxv32f16_neg_splat_commute(<vscale x 32 x half> %va, half %b, <vscale x 32 x half> %vc, <vscale x 32 x i1> %m, i32 zeroext %evl) {
12145; ZVFH-LABEL: vfnmsub_vf_nxv32f16_neg_splat_commute:
12146; ZVFH:       # %bb.0:
12147; ZVFH-NEXT:    vsetvli zero, a0, e16, m8, ta, ma
12148; ZVFH-NEXT:    vfnmsub.vf v8, fa0, v16, v0.t
12149; ZVFH-NEXT:    ret
12150;
12151; ZVFHMIN-LABEL: vfnmsub_vf_nxv32f16_neg_splat_commute:
12152; ZVFHMIN:       # %bb.0:
12153; ZVFHMIN-NEXT:    addi sp, sp, -16
12154; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 16
12155; ZVFHMIN-NEXT:    csrr a1, vlenb
12156; ZVFHMIN-NEXT:    slli a1, a1, 3
12157; ZVFHMIN-NEXT:    mv a2, a1
12158; ZVFHMIN-NEXT:    slli a1, a1, 2
12159; ZVFHMIN-NEXT:    add a1, a1, a2
12160; ZVFHMIN-NEXT:    sub sp, sp, a1
12161; ZVFHMIN-NEXT:    .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x28, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 40 * vlenb
12162; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m8, ta, ma
12163; ZVFHMIN-NEXT:    vmv1r.v v7, v0
12164; ZVFHMIN-NEXT:    csrr a1, vlenb
12165; ZVFHMIN-NEXT:    slli a1, a1, 5
12166; ZVFHMIN-NEXT:    add a1, sp, a1
12167; ZVFHMIN-NEXT:    addi a1, a1, 16
12168; ZVFHMIN-NEXT:    vs8r.v v16, (a1) # Unknown-size Folded Spill
12169; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
12170; ZVFHMIN-NEXT:    lui a2, 8
12171; ZVFHMIN-NEXT:    csrr a3, vlenb
12172; ZVFHMIN-NEXT:    vmv.v.x v16, a1
12173; ZVFHMIN-NEXT:    slli a1, a3, 1
12174; ZVFHMIN-NEXT:    srli a3, a3, 2
12175; ZVFHMIN-NEXT:    vxor.vx v16, v16, a2, v0.t
12176; ZVFHMIN-NEXT:    sub a2, a0, a1
12177; ZVFHMIN-NEXT:    vsetvli a4, zero, e8, mf2, ta, ma
12178; ZVFHMIN-NEXT:    vslidedown.vx v0, v0, a3
12179; ZVFHMIN-NEXT:    sltu a3, a0, a2
12180; ZVFHMIN-NEXT:    addi a3, a3, -1
12181; ZVFHMIN-NEXT:    and a2, a3, a2
12182; ZVFHMIN-NEXT:    csrr a3, vlenb
12183; ZVFHMIN-NEXT:    slli a3, a3, 4
12184; ZVFHMIN-NEXT:    add a3, sp, a3
12185; ZVFHMIN-NEXT:    addi a3, a3, 16
12186; ZVFHMIN-NEXT:    vs8r.v v16, (a3) # Unknown-size Folded Spill
12187; ZVFHMIN-NEXT:    vsetvli zero, a2, e16, m4, ta, ma
12188; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v20, v0.t
12189; ZVFHMIN-NEXT:    csrr a2, vlenb
12190; ZVFHMIN-NEXT:    slli a2, a2, 3
12191; ZVFHMIN-NEXT:    add a2, sp, a2
12192; ZVFHMIN-NEXT:    addi a2, a2, 16
12193; ZVFHMIN-NEXT:    vs8r.v v24, (a2) # Unknown-size Folded Spill
12194; ZVFHMIN-NEXT:    csrr a2, vlenb
12195; ZVFHMIN-NEXT:    slli a2, a2, 5
12196; ZVFHMIN-NEXT:    add a2, sp, a2
12197; ZVFHMIN-NEXT:    addi a2, a2, 16
12198; ZVFHMIN-NEXT:    vl8r.v v24, (a2) # Unknown-size Folded Reload
12199; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v28, v0.t
12200; ZVFHMIN-NEXT:    vmv4r.v v24, v8
12201; ZVFHMIN-NEXT:    csrr a2, vlenb
12202; ZVFHMIN-NEXT:    slli a2, a2, 3
12203; ZVFHMIN-NEXT:    mv a3, a2
12204; ZVFHMIN-NEXT:    slli a2, a2, 1
12205; ZVFHMIN-NEXT:    add a2, a2, a3
12206; ZVFHMIN-NEXT:    add a2, sp, a2
12207; ZVFHMIN-NEXT:    addi a2, a2, 16
12208; ZVFHMIN-NEXT:    vs8r.v v24, (a2) # Unknown-size Folded Spill
12209; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v12, v0.t
12210; ZVFHMIN-NEXT:    csrr a2, vlenb
12211; ZVFHMIN-NEXT:    slli a2, a2, 3
12212; ZVFHMIN-NEXT:    add a2, sp, a2
12213; ZVFHMIN-NEXT:    addi a2, a2, 16
12214; ZVFHMIN-NEXT:    vl8r.v v8, (a2) # Unknown-size Folded Reload
12215; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
12216; ZVFHMIN-NEXT:    vfmadd.vv v24, v8, v16, v0.t
12217; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
12218; ZVFHMIN-NEXT:    vfncvt.f.f.w v12, v24, v0.t
12219; ZVFHMIN-NEXT:    addi a2, sp, 16
12220; ZVFHMIN-NEXT:    vs8r.v v8, (a2) # Unknown-size Folded Spill
12221; ZVFHMIN-NEXT:    bltu a0, a1, .LBB307_2
12222; ZVFHMIN-NEXT:  # %bb.1:
12223; ZVFHMIN-NEXT:    mv a0, a1
12224; ZVFHMIN-NEXT:  .LBB307_2:
12225; ZVFHMIN-NEXT:    vmv1r.v v0, v7
12226; ZVFHMIN-NEXT:    csrr a1, vlenb
12227; ZVFHMIN-NEXT:    slli a1, a1, 4
12228; ZVFHMIN-NEXT:    add a1, sp, a1
12229; ZVFHMIN-NEXT:    addi a1, a1, 16
12230; ZVFHMIN-NEXT:    vl8r.v v8, (a1) # Unknown-size Folded Reload
12231; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
12232; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v8, v0.t
12233; ZVFHMIN-NEXT:    csrr a0, vlenb
12234; ZVFHMIN-NEXT:    slli a0, a0, 3
12235; ZVFHMIN-NEXT:    add a0, sp, a0
12236; ZVFHMIN-NEXT:    addi a0, a0, 16
12237; ZVFHMIN-NEXT:    vs8r.v v24, (a0) # Unknown-size Folded Spill
12238; ZVFHMIN-NEXT:    csrr a0, vlenb
12239; ZVFHMIN-NEXT:    slli a0, a0, 5
12240; ZVFHMIN-NEXT:    add a0, sp, a0
12241; ZVFHMIN-NEXT:    addi a0, a0, 16
12242; ZVFHMIN-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
12243; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v8, v0.t
12244; ZVFHMIN-NEXT:    csrr a0, vlenb
12245; ZVFHMIN-NEXT:    slli a0, a0, 4
12246; ZVFHMIN-NEXT:    add a0, sp, a0
12247; ZVFHMIN-NEXT:    addi a0, a0, 16
12248; ZVFHMIN-NEXT:    vs8r.v v16, (a0) # Unknown-size Folded Spill
12249; ZVFHMIN-NEXT:    csrr a0, vlenb
12250; ZVFHMIN-NEXT:    slli a0, a0, 3
12251; ZVFHMIN-NEXT:    mv a1, a0
12252; ZVFHMIN-NEXT:    slli a0, a0, 1
12253; ZVFHMIN-NEXT:    add a0, a0, a1
12254; ZVFHMIN-NEXT:    add a0, sp, a0
12255; ZVFHMIN-NEXT:    addi a0, a0, 16
12256; ZVFHMIN-NEXT:    vl8r.v v24, (a0) # Unknown-size Folded Reload
12257; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v24, v0.t
12258; ZVFHMIN-NEXT:    csrr a0, vlenb
12259; ZVFHMIN-NEXT:    slli a0, a0, 3
12260; ZVFHMIN-NEXT:    add a0, sp, a0
12261; ZVFHMIN-NEXT:    addi a0, a0, 16
12262; ZVFHMIN-NEXT:    vl8r.v v24, (a0) # Unknown-size Folded Reload
12263; ZVFHMIN-NEXT:    csrr a0, vlenb
12264; ZVFHMIN-NEXT:    slli a0, a0, 4
12265; ZVFHMIN-NEXT:    add a0, sp, a0
12266; ZVFHMIN-NEXT:    addi a0, a0, 16
12267; ZVFHMIN-NEXT:    vl8r.v v16, (a0) # Unknown-size Folded Reload
12268; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
12269; ZVFHMIN-NEXT:    vfmadd.vv v8, v24, v16, v0.t
12270; ZVFHMIN-NEXT:    vmv.v.v v16, v8
12271; ZVFHMIN-NEXT:    addi a0, sp, 16
12272; ZVFHMIN-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
12273; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
12274; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v16, v0.t
12275; ZVFHMIN-NEXT:    csrr a0, vlenb
12276; ZVFHMIN-NEXT:    slli a0, a0, 3
12277; ZVFHMIN-NEXT:    mv a1, a0
12278; ZVFHMIN-NEXT:    slli a0, a0, 2
12279; ZVFHMIN-NEXT:    add a0, a0, a1
12280; ZVFHMIN-NEXT:    add sp, sp, a0
12281; ZVFHMIN-NEXT:    .cfi_def_cfa sp, 16
12282; ZVFHMIN-NEXT:    addi sp, sp, 16
12283; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 0
12284; ZVFHMIN-NEXT:    ret
12285  %elt.head = insertelement <vscale x 32 x half> poison, half %b, i32 0
12286  %vb = shufflevector <vscale x 32 x half> %elt.head, <vscale x 32 x half> poison, <vscale x 32 x i32> zeroinitializer
12287  %negvb = call <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half> %vb, <vscale x 32 x i1> %m, i32 %evl)
12288  %v = call <vscale x 32 x half> @llvm.vp.fma.nxv32f16(<vscale x 32 x half> %negvb, <vscale x 32 x half> %va, <vscale x 32 x half> %vc, <vscale x 32 x i1> %m, i32 %evl)
12289  ret <vscale x 32 x half> %v
12290}
12291
12292define <vscale x 32 x half> @vfnmsub_vf_nxv32f16_neg_splat_unmasked(<vscale x 32 x half> %va, half %b, <vscale x 32 x half> %vc, i32 zeroext %evl) {
12293; ZVFH-LABEL: vfnmsub_vf_nxv32f16_neg_splat_unmasked:
12294; ZVFH:       # %bb.0:
12295; ZVFH-NEXT:    vsetvli zero, a0, e16, m8, ta, ma
12296; ZVFH-NEXT:    vfnmsub.vf v8, fa0, v16
12297; ZVFH-NEXT:    ret
12298;
12299; ZVFHMIN-LABEL: vfnmsub_vf_nxv32f16_neg_splat_unmasked:
12300; ZVFHMIN:       # %bb.0:
12301; ZVFHMIN-NEXT:    addi sp, sp, -16
12302; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 16
12303; ZVFHMIN-NEXT:    csrr a1, vlenb
12304; ZVFHMIN-NEXT:    slli a1, a1, 5
12305; ZVFHMIN-NEXT:    sub sp, sp, a1
12306; ZVFHMIN-NEXT:    .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 32 * vlenb
12307; ZVFHMIN-NEXT:    csrr a1, vlenb
12308; ZVFHMIN-NEXT:    slli a1, a1, 3
12309; ZVFHMIN-NEXT:    mv a2, a1
12310; ZVFHMIN-NEXT:    slli a1, a1, 1
12311; ZVFHMIN-NEXT:    add a1, a1, a2
12312; ZVFHMIN-NEXT:    add a1, sp, a1
12313; ZVFHMIN-NEXT:    addi a1, a1, 16
12314; ZVFHMIN-NEXT:    vs8r.v v8, (a1) # Unknown-size Folded Spill
12315; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
12316; ZVFHMIN-NEXT:    lui a2, 8
12317; ZVFHMIN-NEXT:    vsetvli a3, zero, e8, m4, ta, ma
12318; ZVFHMIN-NEXT:    vmset.m v24
12319; ZVFHMIN-NEXT:    csrr a3, vlenb
12320; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m8, ta, ma
12321; ZVFHMIN-NEXT:    vmv.v.x v8, a1
12322; ZVFHMIN-NEXT:    slli a1, a3, 1
12323; ZVFHMIN-NEXT:    srli a3, a3, 2
12324; ZVFHMIN-NEXT:    vxor.vx v8, v8, a2
12325; ZVFHMIN-NEXT:    sub a2, a0, a1
12326; ZVFHMIN-NEXT:    vsetvli a4, zero, e8, mf2, ta, ma
12327; ZVFHMIN-NEXT:    vslidedown.vx v0, v24, a3
12328; ZVFHMIN-NEXT:    sltu a3, a0, a2
12329; ZVFHMIN-NEXT:    addi a3, a3, -1
12330; ZVFHMIN-NEXT:    and a2, a3, a2
12331; ZVFHMIN-NEXT:    csrr a3, vlenb
12332; ZVFHMIN-NEXT:    slli a3, a3, 3
12333; ZVFHMIN-NEXT:    add a3, sp, a3
12334; ZVFHMIN-NEXT:    addi a3, a3, 16
12335; ZVFHMIN-NEXT:    vs8r.v v8, (a3) # Unknown-size Folded Spill
12336; ZVFHMIN-NEXT:    vsetvli zero, a2, e16, m4, ta, ma
12337; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v12, v0.t
12338; ZVFHMIN-NEXT:    vmv4r.v v8, v16
12339; ZVFHMIN-NEXT:    csrr a2, vlenb
12340; ZVFHMIN-NEXT:    slli a2, a2, 4
12341; ZVFHMIN-NEXT:    add a2, sp, a2
12342; ZVFHMIN-NEXT:    addi a2, a2, 16
12343; ZVFHMIN-NEXT:    vs8r.v v8, (a2) # Unknown-size Folded Spill
12344; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v20, v0.t
12345; ZVFHMIN-NEXT:    addi a2, sp, 16
12346; ZVFHMIN-NEXT:    vs8r.v v8, (a2) # Unknown-size Folded Spill
12347; ZVFHMIN-NEXT:    csrr a2, vlenb
12348; ZVFHMIN-NEXT:    slli a2, a2, 3
12349; ZVFHMIN-NEXT:    mv a3, a2
12350; ZVFHMIN-NEXT:    slli a2, a2, 1
12351; ZVFHMIN-NEXT:    add a2, a2, a3
12352; ZVFHMIN-NEXT:    add a2, sp, a2
12353; ZVFHMIN-NEXT:    addi a2, a2, 16
12354; ZVFHMIN-NEXT:    vl8r.v v16, (a2) # Unknown-size Folded Reload
12355; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v20, v0.t
12356; ZVFHMIN-NEXT:    addi a2, sp, 16
12357; ZVFHMIN-NEXT:    vl8r.v v16, (a2) # Unknown-size Folded Reload
12358; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
12359; ZVFHMIN-NEXT:    vfmadd.vv v24, v8, v16, v0.t
12360; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
12361; ZVFHMIN-NEXT:    vfncvt.f.f.w v12, v24, v0.t
12362; ZVFHMIN-NEXT:    bltu a0, a1, .LBB308_2
12363; ZVFHMIN-NEXT:  # %bb.1:
12364; ZVFHMIN-NEXT:    mv a0, a1
12365; ZVFHMIN-NEXT:  .LBB308_2:
12366; ZVFHMIN-NEXT:    csrr a1, vlenb
12367; ZVFHMIN-NEXT:    slli a1, a1, 3
12368; ZVFHMIN-NEXT:    add a1, sp, a1
12369; ZVFHMIN-NEXT:    addi a1, a1, 16
12370; ZVFHMIN-NEXT:    vl8r.v v16, (a1) # Unknown-size Folded Reload
12371; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
12372; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v16
12373; ZVFHMIN-NEXT:    addi a0, sp, 16
12374; ZVFHMIN-NEXT:    vs8r.v v24, (a0) # Unknown-size Folded Spill
12375; ZVFHMIN-NEXT:    csrr a0, vlenb
12376; ZVFHMIN-NEXT:    slli a0, a0, 4
12377; ZVFHMIN-NEXT:    add a0, sp, a0
12378; ZVFHMIN-NEXT:    addi a0, a0, 16
12379; ZVFHMIN-NEXT:    vl8r.v v0, (a0) # Unknown-size Folded Reload
12380; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v0
12381; ZVFHMIN-NEXT:    csrr a0, vlenb
12382; ZVFHMIN-NEXT:    slli a0, a0, 3
12383; ZVFHMIN-NEXT:    mv a1, a0
12384; ZVFHMIN-NEXT:    slli a0, a0, 1
12385; ZVFHMIN-NEXT:    add a0, a0, a1
12386; ZVFHMIN-NEXT:    add a0, sp, a0
12387; ZVFHMIN-NEXT:    addi a0, a0, 16
12388; ZVFHMIN-NEXT:    vl8r.v v16, (a0) # Unknown-size Folded Reload
12389; ZVFHMIN-NEXT:    vfwcvt.f.f.v v0, v16
12390; ZVFHMIN-NEXT:    addi a0, sp, 16
12391; ZVFHMIN-NEXT:    vl8r.v v16, (a0) # Unknown-size Folded Reload
12392; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
12393; ZVFHMIN-NEXT:    vfmadd.vv v0, v16, v24
12394; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
12395; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v0
12396; ZVFHMIN-NEXT:    csrr a0, vlenb
12397; ZVFHMIN-NEXT:    slli a0, a0, 5
12398; ZVFHMIN-NEXT:    add sp, sp, a0
12399; ZVFHMIN-NEXT:    .cfi_def_cfa sp, 16
12400; ZVFHMIN-NEXT:    addi sp, sp, 16
12401; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 0
12402; ZVFHMIN-NEXT:    ret
12403  %elt.head = insertelement <vscale x 32 x half> poison, half %b, i32 0
12404  %vb = shufflevector <vscale x 32 x half> %elt.head, <vscale x 32 x half> poison, <vscale x 32 x i32> zeroinitializer
12405  %negvb = call <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half> %vb, <vscale x 32 x i1> splat (i1 true), i32 %evl)
12406  %v = call <vscale x 32 x half> @llvm.vp.fma.nxv32f16(<vscale x 32 x half> %va, <vscale x 32 x half> %negvb, <vscale x 32 x half> %vc, <vscale x 32 x i1> splat (i1 true), i32 %evl)
12407  ret <vscale x 32 x half> %v
12408}
12409
12410define <vscale x 32 x half> @vfnmsub_vf_nxv32f16_neg_splat_unmasked_commute(<vscale x 32 x half> %va, half %b, <vscale x 32 x half> %vc, i32 zeroext %evl) {
12411; ZVFH-LABEL: vfnmsub_vf_nxv32f16_neg_splat_unmasked_commute:
12412; ZVFH:       # %bb.0:
12413; ZVFH-NEXT:    vsetvli zero, a0, e16, m8, ta, ma
12414; ZVFH-NEXT:    vfnmsub.vf v8, fa0, v16
12415; ZVFH-NEXT:    ret
12416;
12417; ZVFHMIN-LABEL: vfnmsub_vf_nxv32f16_neg_splat_unmasked_commute:
12418; ZVFHMIN:       # %bb.0:
12419; ZVFHMIN-NEXT:    addi sp, sp, -16
12420; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 16
12421; ZVFHMIN-NEXT:    csrr a1, vlenb
12422; ZVFHMIN-NEXT:    slli a1, a1, 5
12423; ZVFHMIN-NEXT:    sub sp, sp, a1
12424; ZVFHMIN-NEXT:    .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 32 * vlenb
12425; ZVFHMIN-NEXT:    csrr a1, vlenb
12426; ZVFHMIN-NEXT:    slli a1, a1, 3
12427; ZVFHMIN-NEXT:    mv a2, a1
12428; ZVFHMIN-NEXT:    slli a1, a1, 1
12429; ZVFHMIN-NEXT:    add a1, a1, a2
12430; ZVFHMIN-NEXT:    add a1, sp, a1
12431; ZVFHMIN-NEXT:    addi a1, a1, 16
12432; ZVFHMIN-NEXT:    vs8r.v v8, (a1) # Unknown-size Folded Spill
12433; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
12434; ZVFHMIN-NEXT:    lui a2, 8
12435; ZVFHMIN-NEXT:    vsetvli a3, zero, e8, m4, ta, ma
12436; ZVFHMIN-NEXT:    vmset.m v8
12437; ZVFHMIN-NEXT:    csrr a3, vlenb
12438; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m8, ta, ma
12439; ZVFHMIN-NEXT:    vmv.v.x v24, a1
12440; ZVFHMIN-NEXT:    slli a1, a3, 1
12441; ZVFHMIN-NEXT:    srli a3, a3, 2
12442; ZVFHMIN-NEXT:    vxor.vx v24, v24, a2
12443; ZVFHMIN-NEXT:    sub a2, a0, a1
12444; ZVFHMIN-NEXT:    vsetvli a4, zero, e8, mf2, ta, ma
12445; ZVFHMIN-NEXT:    vslidedown.vx v0, v8, a3
12446; ZVFHMIN-NEXT:    sltu a3, a0, a2
12447; ZVFHMIN-NEXT:    addi a3, a3, -1
12448; ZVFHMIN-NEXT:    and a2, a3, a2
12449; ZVFHMIN-NEXT:    vmv4r.v v8, v24
12450; ZVFHMIN-NEXT:    csrr a3, vlenb
12451; ZVFHMIN-NEXT:    slli a3, a3, 3
12452; ZVFHMIN-NEXT:    add a3, sp, a3
12453; ZVFHMIN-NEXT:    addi a3, a3, 16
12454; ZVFHMIN-NEXT:    vs8r.v v8, (a3) # Unknown-size Folded Spill
12455; ZVFHMIN-NEXT:    vsetvli zero, a2, e16, m4, ta, ma
12456; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v28, v0.t
12457; ZVFHMIN-NEXT:    addi a2, sp, 16
12458; ZVFHMIN-NEXT:    vs8r.v v8, (a2) # Unknown-size Folded Spill
12459; ZVFHMIN-NEXT:    csrr a2, vlenb
12460; ZVFHMIN-NEXT:    slli a2, a2, 4
12461; ZVFHMIN-NEXT:    add a2, sp, a2
12462; ZVFHMIN-NEXT:    addi a2, a2, 16
12463; ZVFHMIN-NEXT:    vs8r.v v16, (a2) # Unknown-size Folded Spill
12464; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v20, v0.t
12465; ZVFHMIN-NEXT:    csrr a2, vlenb
12466; ZVFHMIN-NEXT:    slli a2, a2, 3
12467; ZVFHMIN-NEXT:    mv a3, a2
12468; ZVFHMIN-NEXT:    slli a2, a2, 1
12469; ZVFHMIN-NEXT:    add a2, a2, a3
12470; ZVFHMIN-NEXT:    add a2, sp, a2
12471; ZVFHMIN-NEXT:    addi a2, a2, 16
12472; ZVFHMIN-NEXT:    vl8r.v v8, (a2) # Unknown-size Folded Reload
12473; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v12, v0.t
12474; ZVFHMIN-NEXT:    addi a2, sp, 16
12475; ZVFHMIN-NEXT:    vl8r.v v8, (a2) # Unknown-size Folded Reload
12476; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
12477; ZVFHMIN-NEXT:    vfmadd.vv v16, v8, v24, v0.t
12478; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
12479; ZVFHMIN-NEXT:    vfncvt.f.f.w v12, v16, v0.t
12480; ZVFHMIN-NEXT:    bltu a0, a1, .LBB309_2
12481; ZVFHMIN-NEXT:  # %bb.1:
12482; ZVFHMIN-NEXT:    mv a0, a1
12483; ZVFHMIN-NEXT:  .LBB309_2:
12484; ZVFHMIN-NEXT:    csrr a1, vlenb
12485; ZVFHMIN-NEXT:    slli a1, a1, 3
12486; ZVFHMIN-NEXT:    add a1, sp, a1
12487; ZVFHMIN-NEXT:    addi a1, a1, 16
12488; ZVFHMIN-NEXT:    vl8r.v v16, (a1) # Unknown-size Folded Reload
12489; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
12490; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v16
12491; ZVFHMIN-NEXT:    addi a0, sp, 16
12492; ZVFHMIN-NEXT:    vs8r.v v24, (a0) # Unknown-size Folded Spill
12493; ZVFHMIN-NEXT:    csrr a0, vlenb
12494; ZVFHMIN-NEXT:    slli a0, a0, 4
12495; ZVFHMIN-NEXT:    add a0, sp, a0
12496; ZVFHMIN-NEXT:    addi a0, a0, 16
12497; ZVFHMIN-NEXT:    vl8r.v v0, (a0) # Unknown-size Folded Reload
12498; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v0
12499; ZVFHMIN-NEXT:    csrr a0, vlenb
12500; ZVFHMIN-NEXT:    slli a0, a0, 3
12501; ZVFHMIN-NEXT:    mv a1, a0
12502; ZVFHMIN-NEXT:    slli a0, a0, 1
12503; ZVFHMIN-NEXT:    add a0, a0, a1
12504; ZVFHMIN-NEXT:    add a0, sp, a0
12505; ZVFHMIN-NEXT:    addi a0, a0, 16
12506; ZVFHMIN-NEXT:    vl8r.v v16, (a0) # Unknown-size Folded Reload
12507; ZVFHMIN-NEXT:    vfwcvt.f.f.v v0, v16
12508; ZVFHMIN-NEXT:    addi a0, sp, 16
12509; ZVFHMIN-NEXT:    vl8r.v v16, (a0) # Unknown-size Folded Reload
12510; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
12511; ZVFHMIN-NEXT:    vfmadd.vv v0, v16, v24
12512; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
12513; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v0
12514; ZVFHMIN-NEXT:    csrr a0, vlenb
12515; ZVFHMIN-NEXT:    slli a0, a0, 5
12516; ZVFHMIN-NEXT:    add sp, sp, a0
12517; ZVFHMIN-NEXT:    .cfi_def_cfa sp, 16
12518; ZVFHMIN-NEXT:    addi sp, sp, 16
12519; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 0
12520; ZVFHMIN-NEXT:    ret
12521  %elt.head = insertelement <vscale x 32 x half> poison, half %b, i32 0
12522  %vb = shufflevector <vscale x 32 x half> %elt.head, <vscale x 32 x half> poison, <vscale x 32 x i32> zeroinitializer
12523  %negvb = call <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half> %vb, <vscale x 32 x i1> splat (i1 true), i32 %evl)
12524  %v = call <vscale x 32 x half> @llvm.vp.fma.nxv32f16(<vscale x 32 x half> %negvb, <vscale x 32 x half> %va, <vscale x 32 x half> %vc, <vscale x 32 x i1> splat (i1 true), i32 %evl)
12525  ret <vscale x 32 x half> %v
12526}
12527
12528declare <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float>, <vscale x 1 x i1>, i32)
12529
12530define <vscale x 1 x float> @vfmsub_vv_nxv1f32(<vscale x 1 x float> %va, <vscale x 1 x float> %b, <vscale x 1 x float> %c, <vscale x 1 x i1> %m, i32 zeroext %evl) {
12531; CHECK-LABEL: vfmsub_vv_nxv1f32:
12532; CHECK:       # %bb.0:
12533; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma
12534; CHECK-NEXT:    vfmsub.vv v9, v8, v10, v0.t
12535; CHECK-NEXT:    vmv1r.v v8, v9
12536; CHECK-NEXT:    ret
12537  %negc = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %c, <vscale x 1 x i1> %m, i32 %evl)
12538  %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %va, <vscale x 1 x float> %b, <vscale x 1 x float> %negc, <vscale x 1 x i1> %m, i32 %evl)
12539  ret <vscale x 1 x float> %v
12540}
12541
12542define <vscale x 1 x float> @vfmsub_vv_nxv1f32_unmasked(<vscale x 1 x float> %va, <vscale x 1 x float> %b, <vscale x 1 x float> %c, i32 zeroext %evl) {
12543; CHECK-LABEL: vfmsub_vv_nxv1f32_unmasked:
12544; CHECK:       # %bb.0:
12545; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma
12546; CHECK-NEXT:    vfmsub.vv v8, v9, v10
12547; CHECK-NEXT:    ret
12548  %negc = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %c, <vscale x 1 x i1> splat (i1 true), i32 %evl)
12549  %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %va, <vscale x 1 x float> %b, <vscale x 1 x float> %negc, <vscale x 1 x i1> splat (i1 true), i32 %evl)
12550  ret <vscale x 1 x float> %v
12551}
12552
12553define <vscale x 1 x float> @vfmsub_vf_nxv1f32(<vscale x 1 x float> %va, float %b, <vscale x 1 x float> %vc, <vscale x 1 x i1> %m, i32 zeroext %evl) {
12554; CHECK-LABEL: vfmsub_vf_nxv1f32:
12555; CHECK:       # %bb.0:
12556; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma
12557; CHECK-NEXT:    vfmsub.vf v8, fa0, v9, v0.t
12558; CHECK-NEXT:    ret
12559  %elt.head = insertelement <vscale x 1 x float> poison, float %b, i32 0
12560  %vb = shufflevector <vscale x 1 x float> %elt.head, <vscale x 1 x float> poison, <vscale x 1 x i32> zeroinitializer
12561  %negvc = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %vc, <vscale x 1 x i1> %m, i32 %evl)
12562  %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %va, <vscale x 1 x float> %vb, <vscale x 1 x float> %negvc, <vscale x 1 x i1> %m, i32 %evl)
12563  ret <vscale x 1 x float> %v
12564}
12565
12566define <vscale x 1 x float> @vfmsub_vf_nxv1f32_commute(<vscale x 1 x float> %va, float %b, <vscale x 1 x float> %vc, <vscale x 1 x i1> %m, i32 zeroext %evl) {
12567; CHECK-LABEL: vfmsub_vf_nxv1f32_commute:
12568; CHECK:       # %bb.0:
12569; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma
12570; CHECK-NEXT:    vfmsub.vf v8, fa0, v9, v0.t
12571; CHECK-NEXT:    ret
12572  %elt.head = insertelement <vscale x 1 x float> poison, float %b, i32 0
12573  %vb = shufflevector <vscale x 1 x float> %elt.head, <vscale x 1 x float> poison, <vscale x 1 x i32> zeroinitializer
12574  %negvc = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %vc, <vscale x 1 x i1> %m, i32 %evl)
12575  %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %vb, <vscale x 1 x float> %va, <vscale x 1 x float> %negvc, <vscale x 1 x i1> %m, i32 %evl)
12576  ret <vscale x 1 x float> %v
12577}
12578
12579define <vscale x 1 x float> @vfmsub_vf_nxv1f32_unmasked(<vscale x 1 x float> %va, float %b, <vscale x 1 x float> %vc, i32 zeroext %evl) {
12580; CHECK-LABEL: vfmsub_vf_nxv1f32_unmasked:
12581; CHECK:       # %bb.0:
12582; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma
12583; CHECK-NEXT:    vfmsub.vf v8, fa0, v9
12584; CHECK-NEXT:    ret
12585  %elt.head = insertelement <vscale x 1 x float> poison, float %b, i32 0
12586  %vb = shufflevector <vscale x 1 x float> %elt.head, <vscale x 1 x float> poison, <vscale x 1 x i32> zeroinitializer
12587  %negvc = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %vc, <vscale x 1 x i1> splat (i1 true), i32 %evl)
12588  %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %va, <vscale x 1 x float> %vb, <vscale x 1 x float> %negvc, <vscale x 1 x i1> splat (i1 true), i32 %evl)
12589  ret <vscale x 1 x float> %v
12590}
12591
12592define <vscale x 1 x float> @vfmsub_vf_nxv1f32_unmasked_commute(<vscale x 1 x float> %va, float %b, <vscale x 1 x float> %vc, i32 zeroext %evl) {
12593; CHECK-LABEL: vfmsub_vf_nxv1f32_unmasked_commute:
12594; CHECK:       # %bb.0:
12595; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma
12596; CHECK-NEXT:    vfmsub.vf v8, fa0, v9
12597; CHECK-NEXT:    ret
12598  %elt.head = insertelement <vscale x 1 x float> poison, float %b, i32 0
12599  %vb = shufflevector <vscale x 1 x float> %elt.head, <vscale x 1 x float> poison, <vscale x 1 x i32> zeroinitializer
12600  %negvc = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %vc, <vscale x 1 x i1> splat (i1 true), i32 %evl)
12601  %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %vb, <vscale x 1 x float> %va, <vscale x 1 x float> %negvc, <vscale x 1 x i1> splat (i1 true), i32 %evl)
12602  ret <vscale x 1 x float> %v
12603}
12604
12605define <vscale x 1 x float> @vfnmadd_vv_nxv1f32(<vscale x 1 x float> %va, <vscale x 1 x float> %b, <vscale x 1 x float> %c, <vscale x 1 x i1> %m, i32 zeroext %evl) {
12606; CHECK-LABEL: vfnmadd_vv_nxv1f32:
12607; CHECK:       # %bb.0:
12608; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma
12609; CHECK-NEXT:    vfnmadd.vv v9, v8, v10, v0.t
12610; CHECK-NEXT:    vmv1r.v v8, v9
12611; CHECK-NEXT:    ret
12612  %negb = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %b, <vscale x 1 x i1> %m, i32 %evl)
12613  %negc = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %c, <vscale x 1 x i1> %m, i32 %evl)
12614  %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %va, <vscale x 1 x float> %negb, <vscale x 1 x float> %negc, <vscale x 1 x i1> %m, i32 %evl)
12615  ret <vscale x 1 x float> %v
12616}
12617
12618define <vscale x 1 x float> @vfnmadd_vv_nxv1f32_commuted(<vscale x 1 x float> %va, <vscale x 1 x float> %b, <vscale x 1 x float> %c, <vscale x 1 x i1> %m, i32 zeroext %evl) {
12619; CHECK-LABEL: vfnmadd_vv_nxv1f32_commuted:
12620; CHECK:       # %bb.0:
12621; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma
12622; CHECK-NEXT:    vfnmadd.vv v8, v9, v10, v0.t
12623; CHECK-NEXT:    ret
12624  %negb = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %b, <vscale x 1 x i1> %m, i32 %evl)
12625  %negc = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %c, <vscale x 1 x i1> %m, i32 %evl)
12626  %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %negb, <vscale x 1 x float> %va, <vscale x 1 x float> %negc, <vscale x 1 x i1> %m, i32 %evl)
12627  ret <vscale x 1 x float> %v
12628}
12629
12630define <vscale x 1 x float> @vfnmadd_vv_nxv1f32_unmasked(<vscale x 1 x float> %va, <vscale x 1 x float> %b, <vscale x 1 x float> %c, i32 zeroext %evl) {
12631; CHECK-LABEL: vfnmadd_vv_nxv1f32_unmasked:
12632; CHECK:       # %bb.0:
12633; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma
12634; CHECK-NEXT:    vfnmadd.vv v8, v9, v10
12635; CHECK-NEXT:    ret
12636  %negb = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %b, <vscale x 1 x i1> splat (i1 true), i32 %evl)
12637  %negc = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %c, <vscale x 1 x i1> splat (i1 true), i32 %evl)
12638  %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %va, <vscale x 1 x float> %negb, <vscale x 1 x float> %negc, <vscale x 1 x i1> splat (i1 true), i32 %evl)
12639  ret <vscale x 1 x float> %v
12640}
12641
12642define <vscale x 1 x float> @vfnmadd_vv_nxv1f32_unmasked_commuted(<vscale x 1 x float> %va, <vscale x 1 x float> %b, <vscale x 1 x float> %c, i32 zeroext %evl) {
12643; CHECK-LABEL: vfnmadd_vv_nxv1f32_unmasked_commuted:
12644; CHECK:       # %bb.0:
12645; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma
12646; CHECK-NEXT:    vfnmadd.vv v8, v9, v10
12647; CHECK-NEXT:    ret
12648  %negb = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %b, <vscale x 1 x i1> splat (i1 true), i32 %evl)
12649  %negc = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %c, <vscale x 1 x i1> splat (i1 true), i32 %evl)
12650  %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %negb, <vscale x 1 x float> %va, <vscale x 1 x float> %negc, <vscale x 1 x i1> splat (i1 true), i32 %evl)
12651  ret <vscale x 1 x float> %v
12652}
12653
12654define <vscale x 1 x float> @vfnmadd_vf_nxv1f32(<vscale x 1 x float> %va, float %b, <vscale x 1 x float> %vc, <vscale x 1 x i1> %m, i32 zeroext %evl) {
12655; CHECK-LABEL: vfnmadd_vf_nxv1f32:
12656; CHECK:       # %bb.0:
12657; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma
12658; CHECK-NEXT:    vfnmadd.vf v8, fa0, v9, v0.t
12659; CHECK-NEXT:    ret
12660  %elt.head = insertelement <vscale x 1 x float> poison, float %b, i32 0
12661  %vb = shufflevector <vscale x 1 x float> %elt.head, <vscale x 1 x float> poison, <vscale x 1 x i32> zeroinitializer
12662  %negva = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %va, <vscale x 1 x i1> %m, i32 %evl)
12663  %negvc = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %vc, <vscale x 1 x i1> %m, i32 %evl)
12664  %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %negva, <vscale x 1 x float> %vb, <vscale x 1 x float> %negvc, <vscale x 1 x i1> %m, i32 %evl)
12665  ret <vscale x 1 x float> %v
12666}
12667
12668define <vscale x 1 x float> @vfnmadd_vf_nxv1f32_commute(<vscale x 1 x float> %va, float %b, <vscale x 1 x float> %vc, <vscale x 1 x i1> %m, i32 zeroext %evl) {
12669; CHECK-LABEL: vfnmadd_vf_nxv1f32_commute:
12670; CHECK:       # %bb.0:
12671; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma
12672; CHECK-NEXT:    vfnmadd.vf v8, fa0, v9, v0.t
12673; CHECK-NEXT:    ret
12674  %elt.head = insertelement <vscale x 1 x float> poison, float %b, i32 0
12675  %vb = shufflevector <vscale x 1 x float> %elt.head, <vscale x 1 x float> poison, <vscale x 1 x i32> zeroinitializer
12676  %negva = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %va, <vscale x 1 x i1> %m, i32 %evl)
12677  %negvc = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %vc, <vscale x 1 x i1> %m, i32 %evl)
12678  %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %vb, <vscale x 1 x float> %negva, <vscale x 1 x float> %negvc, <vscale x 1 x i1> %m, i32 %evl)
12679  ret <vscale x 1 x float> %v
12680}
12681
12682define <vscale x 1 x float> @vfnmadd_vf_nxv1f32_unmasked(<vscale x 1 x float> %va, float %b, <vscale x 1 x float> %vc, i32 zeroext %evl) {
12683; CHECK-LABEL: vfnmadd_vf_nxv1f32_unmasked:
12684; CHECK:       # %bb.0:
12685; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma
12686; CHECK-NEXT:    vfnmadd.vf v8, fa0, v9
12687; CHECK-NEXT:    ret
12688  %elt.head = insertelement <vscale x 1 x float> poison, float %b, i32 0
12689  %vb = shufflevector <vscale x 1 x float> %elt.head, <vscale x 1 x float> poison, <vscale x 1 x i32> zeroinitializer
12690  %negva = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %va, <vscale x 1 x i1> splat (i1 true), i32 %evl)
12691  %negvc = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %vc, <vscale x 1 x i1> splat (i1 true), i32 %evl)
12692  %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %negva, <vscale x 1 x float> %vb, <vscale x 1 x float> %negvc, <vscale x 1 x i1> splat (i1 true), i32 %evl)
12693  ret <vscale x 1 x float> %v
12694}
12695
12696define <vscale x 1 x float> @vfnmadd_vf_nxv1f32_unmasked_commute(<vscale x 1 x float> %va, float %b, <vscale x 1 x float> %vc, i32 zeroext %evl) {
12697; CHECK-LABEL: vfnmadd_vf_nxv1f32_unmasked_commute:
12698; CHECK:       # %bb.0:
12699; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma
12700; CHECK-NEXT:    vfnmadd.vf v8, fa0, v9
12701; CHECK-NEXT:    ret
12702  %elt.head = insertelement <vscale x 1 x float> poison, float %b, i32 0
12703  %vb = shufflevector <vscale x 1 x float> %elt.head, <vscale x 1 x float> poison, <vscale x 1 x i32> zeroinitializer
12704  %negva = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %va, <vscale x 1 x i1> splat (i1 true), i32 %evl)
12705  %negvc = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %vc, <vscale x 1 x i1> splat (i1 true), i32 %evl)
12706  %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %vb, <vscale x 1 x float> %negva, <vscale x 1 x float> %negvc, <vscale x 1 x i1> splat (i1 true), i32 %evl)
12707  ret <vscale x 1 x float> %v
12708}
12709
12710define <vscale x 1 x float> @vfnmadd_vf_nxv1f32_neg_splat(<vscale x 1 x float> %va, float %b, <vscale x 1 x float> %vc, <vscale x 1 x i1> %m, i32 zeroext %evl) {
12711; CHECK-LABEL: vfnmadd_vf_nxv1f32_neg_splat:
12712; CHECK:       # %bb.0:
12713; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma
12714; CHECK-NEXT:    vfnmadd.vf v8, fa0, v9, v0.t
12715; CHECK-NEXT:    ret
12716  %elt.head = insertelement <vscale x 1 x float> poison, float %b, i32 0
12717  %vb = shufflevector <vscale x 1 x float> %elt.head, <vscale x 1 x float> poison, <vscale x 1 x i32> zeroinitializer
12718  %negvb = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %vb, <vscale x 1 x i1> %m, i32 %evl)
12719  %negvc = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %vc, <vscale x 1 x i1> %m, i32 %evl)
12720  %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %va, <vscale x 1 x float> %negvb, <vscale x 1 x float> %negvc, <vscale x 1 x i1> %m, i32 %evl)
12721  ret <vscale x 1 x float> %v
12722}
12723
12724define <vscale x 1 x float> @vfnmadd_vf_nxv1f32_neg_splat_commute(<vscale x 1 x float> %va, float %b, <vscale x 1 x float> %vc, <vscale x 1 x i1> %m, i32 zeroext %evl) {
12725; CHECK-LABEL: vfnmadd_vf_nxv1f32_neg_splat_commute:
12726; CHECK:       # %bb.0:
12727; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma
12728; CHECK-NEXT:    vfnmadd.vf v8, fa0, v9, v0.t
12729; CHECK-NEXT:    ret
12730  %elt.head = insertelement <vscale x 1 x float> poison, float %b, i32 0
12731  %vb = shufflevector <vscale x 1 x float> %elt.head, <vscale x 1 x float> poison, <vscale x 1 x i32> zeroinitializer
12732  %negvb = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %vb, <vscale x 1 x i1> %m, i32 %evl)
12733  %negvc = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %vc, <vscale x 1 x i1> %m, i32 %evl)
12734  %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %negvb, <vscale x 1 x float> %va, <vscale x 1 x float> %negvc, <vscale x 1 x i1> %m, i32 %evl)
12735  ret <vscale x 1 x float> %v
12736}
12737
12738define <vscale x 1 x float> @vfnmadd_vf_nxv1f32_neg_splat_unmasked(<vscale x 1 x float> %va, float %b, <vscale x 1 x float> %vc, i32 zeroext %evl) {
12739; CHECK-LABEL: vfnmadd_vf_nxv1f32_neg_splat_unmasked:
12740; CHECK:       # %bb.0:
12741; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma
12742; CHECK-NEXT:    vfnmadd.vf v8, fa0, v9
12743; CHECK-NEXT:    ret
12744  %elt.head = insertelement <vscale x 1 x float> poison, float %b, i32 0
12745  %vb = shufflevector <vscale x 1 x float> %elt.head, <vscale x 1 x float> poison, <vscale x 1 x i32> zeroinitializer
12746  %negvb = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %vb, <vscale x 1 x i1> splat (i1 true), i32 %evl)
12747  %negvc = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %vc, <vscale x 1 x i1> splat (i1 true), i32 %evl)
12748  %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %va, <vscale x 1 x float> %negvb, <vscale x 1 x float> %negvc, <vscale x 1 x i1> splat (i1 true), i32 %evl)
12749  ret <vscale x 1 x float> %v
12750}
12751
12752define <vscale x 1 x float> @vfnmadd_vf_nxv1f32_neg_splat_unmasked_commute(<vscale x 1 x float> %va, float %b, <vscale x 1 x float> %vc, i32 zeroext %evl) {
12753; CHECK-LABEL: vfnmadd_vf_nxv1f32_neg_splat_unmasked_commute:
12754; CHECK:       # %bb.0:
12755; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma
12756; CHECK-NEXT:    vfnmadd.vf v8, fa0, v9
12757; CHECK-NEXT:    ret
12758  %elt.head = insertelement <vscale x 1 x float> poison, float %b, i32 0
12759  %vb = shufflevector <vscale x 1 x float> %elt.head, <vscale x 1 x float> poison, <vscale x 1 x i32> zeroinitializer
12760  %negvb = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %vb, <vscale x 1 x i1> splat (i1 true), i32 %evl)
12761  %negvc = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %vc, <vscale x 1 x i1> splat (i1 true), i32 %evl)
12762  %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %negvb, <vscale x 1 x float> %va, <vscale x 1 x float> %negvc, <vscale x 1 x i1> splat (i1 true), i32 %evl)
12763  ret <vscale x 1 x float> %v
12764}
12765
12766define <vscale x 1 x float> @vfnmsub_vv_nxv1f32(<vscale x 1 x float> %va, <vscale x 1 x float> %b, <vscale x 1 x float> %c, <vscale x 1 x i1> %m, i32 zeroext %evl) {
12767; CHECK-LABEL: vfnmsub_vv_nxv1f32:
12768; CHECK:       # %bb.0:
12769; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma
12770; CHECK-NEXT:    vfnmadd.vv v9, v8, v10, v0.t
12771; CHECK-NEXT:    vmv1r.v v8, v9
12772; CHECK-NEXT:    ret
12773  %negb = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %b, <vscale x 1 x i1> %m, i32 %evl)
12774  %negc = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %c, <vscale x 1 x i1> %m, i32 %evl)
12775  %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %va, <vscale x 1 x float> %negb, <vscale x 1 x float> %negc, <vscale x 1 x i1> %m, i32 %evl)
12776  ret <vscale x 1 x float> %v
12777}
12778
12779define <vscale x 1 x float> @vfnmsub_vv_nxv1f32_commuted(<vscale x 1 x float> %va, <vscale x 1 x float> %b, <vscale x 1 x float> %c, <vscale x 1 x i1> %m, i32 zeroext %evl) {
12780; CHECK-LABEL: vfnmsub_vv_nxv1f32_commuted:
12781; CHECK:       # %bb.0:
12782; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma
12783; CHECK-NEXT:    vfnmadd.vv v8, v9, v10, v0.t
12784; CHECK-NEXT:    ret
12785  %negb = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %b, <vscale x 1 x i1> %m, i32 %evl)
12786  %negc = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %c, <vscale x 1 x i1> %m, i32 %evl)
12787  %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %negb, <vscale x 1 x float> %va, <vscale x 1 x float> %negc, <vscale x 1 x i1> %m, i32 %evl)
12788  ret <vscale x 1 x float> %v
12789}
12790
12791define <vscale x 1 x float> @vfnmsub_vv_nxv1f32_unmasked(<vscale x 1 x float> %va, <vscale x 1 x float> %b, <vscale x 1 x float> %c, i32 zeroext %evl) {
12792; CHECK-LABEL: vfnmsub_vv_nxv1f32_unmasked:
12793; CHECK:       # %bb.0:
12794; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma
12795; CHECK-NEXT:    vfnmadd.vv v8, v9, v10
12796; CHECK-NEXT:    ret
12797  %negb = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %b, <vscale x 1 x i1> splat (i1 true), i32 %evl)
12798  %negc = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %c, <vscale x 1 x i1> splat (i1 true), i32 %evl)
12799  %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %va, <vscale x 1 x float> %negb, <vscale x 1 x float> %negc, <vscale x 1 x i1> splat (i1 true), i32 %evl)
12800  ret <vscale x 1 x float> %v
12801}
12802
12803define <vscale x 1 x float> @vfnmsub_vv_nxv1f32_unmasked_commuted(<vscale x 1 x float> %va, <vscale x 1 x float> %b, <vscale x 1 x float> %c, i32 zeroext %evl) {
12804; CHECK-LABEL: vfnmsub_vv_nxv1f32_unmasked_commuted:
12805; CHECK:       # %bb.0:
12806; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma
12807; CHECK-NEXT:    vfnmadd.vv v8, v9, v10
12808; CHECK-NEXT:    ret
12809  %negb = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %b, <vscale x 1 x i1> splat (i1 true), i32 %evl)
12810  %negc = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %c, <vscale x 1 x i1> splat (i1 true), i32 %evl)
12811  %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %negb, <vscale x 1 x float> %va, <vscale x 1 x float> %negc, <vscale x 1 x i1> splat (i1 true), i32 %evl)
12812  ret <vscale x 1 x float> %v
12813}
12814
12815define <vscale x 1 x float> @vfnmsub_vf_nxv1f32(<vscale x 1 x float> %va, float %b, <vscale x 1 x float> %vc, <vscale x 1 x i1> %m, i32 zeroext %evl) {
12816; CHECK-LABEL: vfnmsub_vf_nxv1f32:
12817; CHECK:       # %bb.0:
12818; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma
12819; CHECK-NEXT:    vfnmsub.vf v8, fa0, v9, v0.t
12820; CHECK-NEXT:    ret
12821  %elt.head = insertelement <vscale x 1 x float> poison, float %b, i32 0
12822  %vb = shufflevector <vscale x 1 x float> %elt.head, <vscale x 1 x float> poison, <vscale x 1 x i32> zeroinitializer
12823  %negva = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %va, <vscale x 1 x i1> %m, i32 %evl)
12824  %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %negva, <vscale x 1 x float> %vb, <vscale x 1 x float> %vc, <vscale x 1 x i1> %m, i32 %evl)
12825  ret <vscale x 1 x float> %v
12826}
12827
12828define <vscale x 1 x float> @vfnmsub_vf_nxv1f32_commute(<vscale x 1 x float> %va, float %b, <vscale x 1 x float> %vc, <vscale x 1 x i1> %m, i32 zeroext %evl) {
12829; CHECK-LABEL: vfnmsub_vf_nxv1f32_commute:
12830; CHECK:       # %bb.0:
12831; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma
12832; CHECK-NEXT:    vfnmsub.vf v8, fa0, v9, v0.t
12833; CHECK-NEXT:    ret
12834  %elt.head = insertelement <vscale x 1 x float> poison, float %b, i32 0
12835  %vb = shufflevector <vscale x 1 x float> %elt.head, <vscale x 1 x float> poison, <vscale x 1 x i32> zeroinitializer
12836  %negva = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %va, <vscale x 1 x i1> %m, i32 %evl)
12837  %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %vb, <vscale x 1 x float> %negva, <vscale x 1 x float> %vc, <vscale x 1 x i1> %m, i32 %evl)
12838  ret <vscale x 1 x float> %v
12839}
12840
12841define <vscale x 1 x float> @vfnmsub_vf_nxv1f32_unmasked(<vscale x 1 x float> %va, float %b, <vscale x 1 x float> %vc, i32 zeroext %evl) {
12842; CHECK-LABEL: vfnmsub_vf_nxv1f32_unmasked:
12843; CHECK:       # %bb.0:
12844; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma
12845; CHECK-NEXT:    vfnmsub.vf v8, fa0, v9
12846; CHECK-NEXT:    ret
12847  %elt.head = insertelement <vscale x 1 x float> poison, float %b, i32 0
12848  %vb = shufflevector <vscale x 1 x float> %elt.head, <vscale x 1 x float> poison, <vscale x 1 x i32> zeroinitializer
12849  %negva = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %va, <vscale x 1 x i1> splat (i1 true), i32 %evl)
12850  %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %negva, <vscale x 1 x float> %vb, <vscale x 1 x float> %vc, <vscale x 1 x i1> splat (i1 true), i32 %evl)
12851  ret <vscale x 1 x float> %v
12852}
12853
12854define <vscale x 1 x float> @vfnmsub_vf_nxv1f32_unmasked_commute(<vscale x 1 x float> %va, float %b, <vscale x 1 x float> %vc, i32 zeroext %evl) {
12855; CHECK-LABEL: vfnmsub_vf_nxv1f32_unmasked_commute:
12856; CHECK:       # %bb.0:
12857; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma
12858; CHECK-NEXT:    vfnmsub.vf v8, fa0, v9
12859; CHECK-NEXT:    ret
12860  %elt.head = insertelement <vscale x 1 x float> poison, float %b, i32 0
12861  %vb = shufflevector <vscale x 1 x float> %elt.head, <vscale x 1 x float> poison, <vscale x 1 x i32> zeroinitializer
12862  %negva = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %va, <vscale x 1 x i1> splat (i1 true), i32 %evl)
12863  %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %vb, <vscale x 1 x float> %negva, <vscale x 1 x float> %vc, <vscale x 1 x i1> splat (i1 true), i32 %evl)
12864  ret <vscale x 1 x float> %v
12865}
12866
12867define <vscale x 1 x float> @vfnmsub_vf_nxv1f32_neg_splat(<vscale x 1 x float> %va, float %b, <vscale x 1 x float> %vc, <vscale x 1 x i1> %m, i32 zeroext %evl) {
12868; CHECK-LABEL: vfnmsub_vf_nxv1f32_neg_splat:
12869; CHECK:       # %bb.0:
12870; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma
12871; CHECK-NEXT:    vfnmsub.vf v8, fa0, v9, v0.t
12872; CHECK-NEXT:    ret
12873  %elt.head = insertelement <vscale x 1 x float> poison, float %b, i32 0
12874  %vb = shufflevector <vscale x 1 x float> %elt.head, <vscale x 1 x float> poison, <vscale x 1 x i32> zeroinitializer
12875  %negvb = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %vb, <vscale x 1 x i1> %m, i32 %evl)
12876  %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %va, <vscale x 1 x float> %negvb, <vscale x 1 x float> %vc, <vscale x 1 x i1> %m, i32 %evl)
12877  ret <vscale x 1 x float> %v
12878}
12879
12880define <vscale x 1 x float> @vfnmsub_vf_nxv1f32_neg_splat_commute(<vscale x 1 x float> %va, float %b, <vscale x 1 x float> %vc, <vscale x 1 x i1> %m, i32 zeroext %evl) {
12881; CHECK-LABEL: vfnmsub_vf_nxv1f32_neg_splat_commute:
12882; CHECK:       # %bb.0:
12883; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma
12884; CHECK-NEXT:    vfnmsub.vf v8, fa0, v9, v0.t
12885; CHECK-NEXT:    ret
12886  %elt.head = insertelement <vscale x 1 x float> poison, float %b, i32 0
12887  %vb = shufflevector <vscale x 1 x float> %elt.head, <vscale x 1 x float> poison, <vscale x 1 x i32> zeroinitializer
12888  %negvb = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %vb, <vscale x 1 x i1> %m, i32 %evl)
12889  %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %negvb, <vscale x 1 x float> %va, <vscale x 1 x float> %vc, <vscale x 1 x i1> %m, i32 %evl)
12890  ret <vscale x 1 x float> %v
12891}
12892
12893define <vscale x 1 x float> @vfnmsub_vf_nxv1f32_neg_splat_unmasked(<vscale x 1 x float> %va, float %b, <vscale x 1 x float> %vc, i32 zeroext %evl) {
12894; CHECK-LABEL: vfnmsub_vf_nxv1f32_neg_splat_unmasked:
12895; CHECK:       # %bb.0:
12896; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma
12897; CHECK-NEXT:    vfnmsub.vf v8, fa0, v9
12898; CHECK-NEXT:    ret
12899  %elt.head = insertelement <vscale x 1 x float> poison, float %b, i32 0
12900  %vb = shufflevector <vscale x 1 x float> %elt.head, <vscale x 1 x float> poison, <vscale x 1 x i32> zeroinitializer
12901  %negvb = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %vb, <vscale x 1 x i1> splat (i1 true), i32 %evl)
12902  %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %va, <vscale x 1 x float> %negvb, <vscale x 1 x float> %vc, <vscale x 1 x i1> splat (i1 true), i32 %evl)
12903  ret <vscale x 1 x float> %v
12904}
12905
12906define <vscale x 1 x float> @vfnmsub_vf_nxv1f32_neg_splat_unmasked_commute(<vscale x 1 x float> %va, float %b, <vscale x 1 x float> %vc, i32 zeroext %evl) {
12907; CHECK-LABEL: vfnmsub_vf_nxv1f32_neg_splat_unmasked_commute:
12908; CHECK:       # %bb.0:
12909; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma
12910; CHECK-NEXT:    vfnmsub.vf v8, fa0, v9
12911; CHECK-NEXT:    ret
12912  %elt.head = insertelement <vscale x 1 x float> poison, float %b, i32 0
12913  %vb = shufflevector <vscale x 1 x float> %elt.head, <vscale x 1 x float> poison, <vscale x 1 x i32> zeroinitializer
12914  %negvb = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %vb, <vscale x 1 x i1> splat (i1 true), i32 %evl)
12915  %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %negvb, <vscale x 1 x float> %va, <vscale x 1 x float> %vc, <vscale x 1 x i1> splat (i1 true), i32 %evl)
12916  ret <vscale x 1 x float> %v
12917}
12918
12919declare <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float>, <vscale x 2 x i1>, i32)
12920
12921define <vscale x 2 x float> @vfmsub_vv_nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x float> %b, <vscale x 2 x float> %c, <vscale x 2 x i1> %m, i32 zeroext %evl) {
12922; CHECK-LABEL: vfmsub_vv_nxv2f32:
12923; CHECK:       # %bb.0:
12924; CHECK-NEXT:    vsetvli zero, a0, e32, m1, ta, ma
12925; CHECK-NEXT:    vfmsub.vv v9, v8, v10, v0.t
12926; CHECK-NEXT:    vmv.v.v v8, v9
12927; CHECK-NEXT:    ret
12928  %negc = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %c, <vscale x 2 x i1> %m, i32 %evl)
12929  %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x float> %b, <vscale x 2 x float> %negc, <vscale x 2 x i1> %m, i32 %evl)
12930  ret <vscale x 2 x float> %v
12931}
12932
12933define <vscale x 2 x float> @vfmsub_vv_nxv2f32_unmasked(<vscale x 2 x float> %va, <vscale x 2 x float> %b, <vscale x 2 x float> %c, i32 zeroext %evl) {
12934; CHECK-LABEL: vfmsub_vv_nxv2f32_unmasked:
12935; CHECK:       # %bb.0:
12936; CHECK-NEXT:    vsetvli zero, a0, e32, m1, ta, ma
12937; CHECK-NEXT:    vfmsub.vv v8, v9, v10
12938; CHECK-NEXT:    ret
12939  %negc = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %c, <vscale x 2 x i1> splat (i1 true), i32 %evl)
12940  %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x float> %b, <vscale x 2 x float> %negc, <vscale x 2 x i1> splat (i1 true), i32 %evl)
12941  ret <vscale x 2 x float> %v
12942}
12943
12944define <vscale x 2 x float> @vfmsub_vf_nxv2f32(<vscale x 2 x float> %va, float %b, <vscale x 2 x float> %vc, <vscale x 2 x i1> %m, i32 zeroext %evl) {
12945; CHECK-LABEL: vfmsub_vf_nxv2f32:
12946; CHECK:       # %bb.0:
12947; CHECK-NEXT:    vsetvli zero, a0, e32, m1, ta, ma
12948; CHECK-NEXT:    vfmsub.vf v8, fa0, v9, v0.t
12949; CHECK-NEXT:    ret
12950  %elt.head = insertelement <vscale x 2 x float> poison, float %b, i32 0
12951  %vb = shufflevector <vscale x 2 x float> %elt.head, <vscale x 2 x float> poison, <vscale x 2 x i32> zeroinitializer
12952  %negvc = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %vc, <vscale x 2 x i1> %m, i32 %evl)
12953  %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x float> %vb, <vscale x 2 x float> %negvc, <vscale x 2 x i1> %m, i32 %evl)
12954  ret <vscale x 2 x float> %v
12955}
12956
12957define <vscale x 2 x float> @vfmsub_vf_nxv2f32_commute(<vscale x 2 x float> %va, float %b, <vscale x 2 x float> %vc, <vscale x 2 x i1> %m, i32 zeroext %evl) {
12958; CHECK-LABEL: vfmsub_vf_nxv2f32_commute:
12959; CHECK:       # %bb.0:
12960; CHECK-NEXT:    vsetvli zero, a0, e32, m1, ta, ma
12961; CHECK-NEXT:    vfmsub.vf v8, fa0, v9, v0.t
12962; CHECK-NEXT:    ret
12963  %elt.head = insertelement <vscale x 2 x float> poison, float %b, i32 0
12964  %vb = shufflevector <vscale x 2 x float> %elt.head, <vscale x 2 x float> poison, <vscale x 2 x i32> zeroinitializer
12965  %negvc = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %vc, <vscale x 2 x i1> %m, i32 %evl)
12966  %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %vb, <vscale x 2 x float> %va, <vscale x 2 x float> %negvc, <vscale x 2 x i1> %m, i32 %evl)
12967  ret <vscale x 2 x float> %v
12968}
12969
12970define <vscale x 2 x float> @vfmsub_vf_nxv2f32_unmasked(<vscale x 2 x float> %va, float %b, <vscale x 2 x float> %vc, i32 zeroext %evl) {
12971; CHECK-LABEL: vfmsub_vf_nxv2f32_unmasked:
12972; CHECK:       # %bb.0:
12973; CHECK-NEXT:    vsetvli zero, a0, e32, m1, ta, ma
12974; CHECK-NEXT:    vfmsub.vf v8, fa0, v9
12975; CHECK-NEXT:    ret
12976  %elt.head = insertelement <vscale x 2 x float> poison, float %b, i32 0
12977  %vb = shufflevector <vscale x 2 x float> %elt.head, <vscale x 2 x float> poison, <vscale x 2 x i32> zeroinitializer
12978  %negvc = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %vc, <vscale x 2 x i1> splat (i1 true), i32 %evl)
12979  %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x float> %vb, <vscale x 2 x float> %negvc, <vscale x 2 x i1> splat (i1 true), i32 %evl)
12980  ret <vscale x 2 x float> %v
12981}
12982
12983define <vscale x 2 x float> @vfmsub_vf_nxv2f32_unmasked_commute(<vscale x 2 x float> %va, float %b, <vscale x 2 x float> %vc, i32 zeroext %evl) {
12984; CHECK-LABEL: vfmsub_vf_nxv2f32_unmasked_commute:
12985; CHECK:       # %bb.0:
12986; CHECK-NEXT:    vsetvli zero, a0, e32, m1, ta, ma
12987; CHECK-NEXT:    vfmsub.vf v8, fa0, v9
12988; CHECK-NEXT:    ret
12989  %elt.head = insertelement <vscale x 2 x float> poison, float %b, i32 0
12990  %vb = shufflevector <vscale x 2 x float> %elt.head, <vscale x 2 x float> poison, <vscale x 2 x i32> zeroinitializer
12991  %negvc = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %vc, <vscale x 2 x i1> splat (i1 true), i32 %evl)
12992  %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %vb, <vscale x 2 x float> %va, <vscale x 2 x float> %negvc, <vscale x 2 x i1> splat (i1 true), i32 %evl)
12993  ret <vscale x 2 x float> %v
12994}
12995
12996define <vscale x 2 x float> @vfnmadd_vv_nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x float> %b, <vscale x 2 x float> %c, <vscale x 2 x i1> %m, i32 zeroext %evl) {
12997; CHECK-LABEL: vfnmadd_vv_nxv2f32:
12998; CHECK:       # %bb.0:
12999; CHECK-NEXT:    vsetvli zero, a0, e32, m1, ta, ma
13000; CHECK-NEXT:    vfnmadd.vv v9, v8, v10, v0.t
13001; CHECK-NEXT:    vmv.v.v v8, v9
13002; CHECK-NEXT:    ret
13003  %negb = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %b, <vscale x 2 x i1> %m, i32 %evl)
13004  %negc = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %c, <vscale x 2 x i1> %m, i32 %evl)
13005  %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x float> %negb, <vscale x 2 x float> %negc, <vscale x 2 x i1> %m, i32 %evl)
13006  ret <vscale x 2 x float> %v
13007}
13008
13009define <vscale x 2 x float> @vfnmadd_vv_nxv2f32_commuted(<vscale x 2 x float> %va, <vscale x 2 x float> %b, <vscale x 2 x float> %c, <vscale x 2 x i1> %m, i32 zeroext %evl) {
13010; CHECK-LABEL: vfnmadd_vv_nxv2f32_commuted:
13011; CHECK:       # %bb.0:
13012; CHECK-NEXT:    vsetvli zero, a0, e32, m1, ta, ma
13013; CHECK-NEXT:    vfnmadd.vv v8, v9, v10, v0.t
13014; CHECK-NEXT:    ret
13015  %negb = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %b, <vscale x 2 x i1> %m, i32 %evl)
13016  %negc = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %c, <vscale x 2 x i1> %m, i32 %evl)
13017  %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %negb, <vscale x 2 x float> %va, <vscale x 2 x float> %negc, <vscale x 2 x i1> %m, i32 %evl)
13018  ret <vscale x 2 x float> %v
13019}
13020
13021define <vscale x 2 x float> @vfnmadd_vv_nxv2f32_unmasked(<vscale x 2 x float> %va, <vscale x 2 x float> %b, <vscale x 2 x float> %c, i32 zeroext %evl) {
13022; CHECK-LABEL: vfnmadd_vv_nxv2f32_unmasked:
13023; CHECK:       # %bb.0:
13024; CHECK-NEXT:    vsetvli zero, a0, e32, m1, ta, ma
13025; CHECK-NEXT:    vfnmadd.vv v8, v9, v10
13026; CHECK-NEXT:    ret
13027  %negb = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %b, <vscale x 2 x i1> splat (i1 true), i32 %evl)
13028  %negc = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %c, <vscale x 2 x i1> splat (i1 true), i32 %evl)
13029  %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x float> %negb, <vscale x 2 x float> %negc, <vscale x 2 x i1> splat (i1 true), i32 %evl)
13030  ret <vscale x 2 x float> %v
13031}
13032
13033define <vscale x 2 x float> @vfnmadd_vv_nxv2f32_unmasked_commuted(<vscale x 2 x float> %va, <vscale x 2 x float> %b, <vscale x 2 x float> %c, i32 zeroext %evl) {
13034; CHECK-LABEL: vfnmadd_vv_nxv2f32_unmasked_commuted:
13035; CHECK:       # %bb.0:
13036; CHECK-NEXT:    vsetvli zero, a0, e32, m1, ta, ma
13037; CHECK-NEXT:    vfnmadd.vv v8, v9, v10
13038; CHECK-NEXT:    ret
13039  %negb = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %b, <vscale x 2 x i1> splat (i1 true), i32 %evl)
13040  %negc = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %c, <vscale x 2 x i1> splat (i1 true), i32 %evl)
13041  %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %negb, <vscale x 2 x float> %va, <vscale x 2 x float> %negc, <vscale x 2 x i1> splat (i1 true), i32 %evl)
13042  ret <vscale x 2 x float> %v
13043}
13044
13045define <vscale x 2 x float> @vfnmadd_vf_nxv2f32(<vscale x 2 x float> %va, float %b, <vscale x 2 x float> %vc, <vscale x 2 x i1> %m, i32 zeroext %evl) {
13046; CHECK-LABEL: vfnmadd_vf_nxv2f32:
13047; CHECK:       # %bb.0:
13048; CHECK-NEXT:    vsetvli zero, a0, e32, m1, ta, ma
13049; CHECK-NEXT:    vfnmadd.vf v8, fa0, v9, v0.t
13050; CHECK-NEXT:    ret
13051  %elt.head = insertelement <vscale x 2 x float> poison, float %b, i32 0
13052  %vb = shufflevector <vscale x 2 x float> %elt.head, <vscale x 2 x float> poison, <vscale x 2 x i32> zeroinitializer
13053  %negva = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x i1> %m, i32 %evl)
13054  %negvc = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %vc, <vscale x 2 x i1> %m, i32 %evl)
13055  %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %negva, <vscale x 2 x float> %vb, <vscale x 2 x float> %negvc, <vscale x 2 x i1> %m, i32 %evl)
13056  ret <vscale x 2 x float> %v
13057}
13058
13059define <vscale x 2 x float> @vfnmadd_vf_nxv2f32_commute(<vscale x 2 x float> %va, float %b, <vscale x 2 x float> %vc, <vscale x 2 x i1> %m, i32 zeroext %evl) {
13060; CHECK-LABEL: vfnmadd_vf_nxv2f32_commute:
13061; CHECK:       # %bb.0:
13062; CHECK-NEXT:    vsetvli zero, a0, e32, m1, ta, ma
13063; CHECK-NEXT:    vfnmadd.vf v8, fa0, v9, v0.t
13064; CHECK-NEXT:    ret
13065  %elt.head = insertelement <vscale x 2 x float> poison, float %b, i32 0
13066  %vb = shufflevector <vscale x 2 x float> %elt.head, <vscale x 2 x float> poison, <vscale x 2 x i32> zeroinitializer
13067  %negva = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x i1> %m, i32 %evl)
13068  %negvc = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %vc, <vscale x 2 x i1> %m, i32 %evl)
13069  %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %vb, <vscale x 2 x float> %negva, <vscale x 2 x float> %negvc, <vscale x 2 x i1> %m, i32 %evl)
13070  ret <vscale x 2 x float> %v
13071}
13072
13073define <vscale x 2 x float> @vfnmadd_vf_nxv2f32_unmasked(<vscale x 2 x float> %va, float %b, <vscale x 2 x float> %vc, i32 zeroext %evl) {
13074; CHECK-LABEL: vfnmadd_vf_nxv2f32_unmasked:
13075; CHECK:       # %bb.0:
13076; CHECK-NEXT:    vsetvli zero, a0, e32, m1, ta, ma
13077; CHECK-NEXT:    vfnmadd.vf v8, fa0, v9
13078; CHECK-NEXT:    ret
13079  %elt.head = insertelement <vscale x 2 x float> poison, float %b, i32 0
13080  %vb = shufflevector <vscale x 2 x float> %elt.head, <vscale x 2 x float> poison, <vscale x 2 x i32> zeroinitializer
13081  %negva = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x i1> splat (i1 true), i32 %evl)
13082  %negvc = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %vc, <vscale x 2 x i1> splat (i1 true), i32 %evl)
13083  %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %negva, <vscale x 2 x float> %vb, <vscale x 2 x float> %negvc, <vscale x 2 x i1> splat (i1 true), i32 %evl)
13084  ret <vscale x 2 x float> %v
13085}
13086
13087define <vscale x 2 x float> @vfnmadd_vf_nxv2f32_unmasked_commute(<vscale x 2 x float> %va, float %b, <vscale x 2 x float> %vc, i32 zeroext %evl) {
13088; CHECK-LABEL: vfnmadd_vf_nxv2f32_unmasked_commute:
13089; CHECK:       # %bb.0:
13090; CHECK-NEXT:    vsetvli zero, a0, e32, m1, ta, ma
13091; CHECK-NEXT:    vfnmadd.vf v8, fa0, v9
13092; CHECK-NEXT:    ret
13093  %elt.head = insertelement <vscale x 2 x float> poison, float %b, i32 0
13094  %vb = shufflevector <vscale x 2 x float> %elt.head, <vscale x 2 x float> poison, <vscale x 2 x i32> zeroinitializer
13095  %negva = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x i1> splat (i1 true), i32 %evl)
13096  %negvc = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %vc, <vscale x 2 x i1> splat (i1 true), i32 %evl)
13097  %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %vb, <vscale x 2 x float> %negva, <vscale x 2 x float> %negvc, <vscale x 2 x i1> splat (i1 true), i32 %evl)
13098  ret <vscale x 2 x float> %v
13099}
13100
13101define <vscale x 2 x float> @vfnmadd_vf_nxv2f32_neg_splat(<vscale x 2 x float> %va, float %b, <vscale x 2 x float> %vc, <vscale x 2 x i1> %m, i32 zeroext %evl) {
13102; CHECK-LABEL: vfnmadd_vf_nxv2f32_neg_splat:
13103; CHECK:       # %bb.0:
13104; CHECK-NEXT:    vsetvli zero, a0, e32, m1, ta, ma
13105; CHECK-NEXT:    vfnmadd.vf v8, fa0, v9, v0.t
13106; CHECK-NEXT:    ret
13107  %elt.head = insertelement <vscale x 2 x float> poison, float %b, i32 0
13108  %vb = shufflevector <vscale x 2 x float> %elt.head, <vscale x 2 x float> poison, <vscale x 2 x i32> zeroinitializer
13109  %negvb = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %vb, <vscale x 2 x i1> %m, i32 %evl)
13110  %negvc = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %vc, <vscale x 2 x i1> %m, i32 %evl)
13111  %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x float> %negvb, <vscale x 2 x float> %negvc, <vscale x 2 x i1> %m, i32 %evl)
13112  ret <vscale x 2 x float> %v
13113}
13114
13115define <vscale x 2 x float> @vfnmadd_vf_nxv2f32_neg_splat_commute(<vscale x 2 x float> %va, float %b, <vscale x 2 x float> %vc, <vscale x 2 x i1> %m, i32 zeroext %evl) {
13116; CHECK-LABEL: vfnmadd_vf_nxv2f32_neg_splat_commute:
13117; CHECK:       # %bb.0:
13118; CHECK-NEXT:    vsetvli zero, a0, e32, m1, ta, ma
13119; CHECK-NEXT:    vfnmadd.vf v8, fa0, v9, v0.t
13120; CHECK-NEXT:    ret
13121  %elt.head = insertelement <vscale x 2 x float> poison, float %b, i32 0
13122  %vb = shufflevector <vscale x 2 x float> %elt.head, <vscale x 2 x float> poison, <vscale x 2 x i32> zeroinitializer
13123  %negvb = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %vb, <vscale x 2 x i1> %m, i32 %evl)
13124  %negvc = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %vc, <vscale x 2 x i1> %m, i32 %evl)
13125  %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %negvb, <vscale x 2 x float> %va, <vscale x 2 x float> %negvc, <vscale x 2 x i1> %m, i32 %evl)
13126  ret <vscale x 2 x float> %v
13127}
13128
13129define <vscale x 2 x float> @vfnmadd_vf_nxv2f32_neg_splat_unmasked(<vscale x 2 x float> %va, float %b, <vscale x 2 x float> %vc, i32 zeroext %evl) {
13130; CHECK-LABEL: vfnmadd_vf_nxv2f32_neg_splat_unmasked:
13131; CHECK:       # %bb.0:
13132; CHECK-NEXT:    vsetvli zero, a0, e32, m1, ta, ma
13133; CHECK-NEXT:    vfnmadd.vf v8, fa0, v9
13134; CHECK-NEXT:    ret
13135  %elt.head = insertelement <vscale x 2 x float> poison, float %b, i32 0
13136  %vb = shufflevector <vscale x 2 x float> %elt.head, <vscale x 2 x float> poison, <vscale x 2 x i32> zeroinitializer
13137  %negvb = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %vb, <vscale x 2 x i1> splat (i1 true), i32 %evl)
13138  %negvc = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %vc, <vscale x 2 x i1> splat (i1 true), i32 %evl)
13139  %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x float> %negvb, <vscale x 2 x float> %negvc, <vscale x 2 x i1> splat (i1 true), i32 %evl)
13140  ret <vscale x 2 x float> %v
13141}
13142
13143define <vscale x 2 x float> @vfnmadd_vf_nxv2f32_neg_splat_unmasked_commute(<vscale x 2 x float> %va, float %b, <vscale x 2 x float> %vc, i32 zeroext %evl) {
13144; CHECK-LABEL: vfnmadd_vf_nxv2f32_neg_splat_unmasked_commute:
13145; CHECK:       # %bb.0:
13146; CHECK-NEXT:    vsetvli zero, a0, e32, m1, ta, ma
13147; CHECK-NEXT:    vfnmadd.vf v8, fa0, v9
13148; CHECK-NEXT:    ret
13149  %elt.head = insertelement <vscale x 2 x float> poison, float %b, i32 0
13150  %vb = shufflevector <vscale x 2 x float> %elt.head, <vscale x 2 x float> poison, <vscale x 2 x i32> zeroinitializer
13151  %negvb = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %vb, <vscale x 2 x i1> splat (i1 true), i32 %evl)
13152  %negvc = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %vc, <vscale x 2 x i1> splat (i1 true), i32 %evl)
13153  %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %negvb, <vscale x 2 x float> %va, <vscale x 2 x float> %negvc, <vscale x 2 x i1> splat (i1 true), i32 %evl)
13154  ret <vscale x 2 x float> %v
13155}
13156
13157define <vscale x 2 x float> @vfnmsub_vv_nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x float> %b, <vscale x 2 x float> %c, <vscale x 2 x i1> %m, i32 zeroext %evl) {
13158; CHECK-LABEL: vfnmsub_vv_nxv2f32:
13159; CHECK:       # %bb.0:
13160; CHECK-NEXT:    vsetvli zero, a0, e32, m1, ta, ma
13161; CHECK-NEXT:    vfnmadd.vv v9, v8, v10, v0.t
13162; CHECK-NEXT:    vmv.v.v v8, v9
13163; CHECK-NEXT:    ret
13164  %negb = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %b, <vscale x 2 x i1> %m, i32 %evl)
13165  %negc = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %c, <vscale x 2 x i1> %m, i32 %evl)
13166  %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x float> %negb, <vscale x 2 x float> %negc, <vscale x 2 x i1> %m, i32 %evl)
13167  ret <vscale x 2 x float> %v
13168}
13169
13170define <vscale x 2 x float> @vfnmsub_vv_nxv2f32_commuted(<vscale x 2 x float> %va, <vscale x 2 x float> %b, <vscale x 2 x float> %c, <vscale x 2 x i1> %m, i32 zeroext %evl) {
13171; CHECK-LABEL: vfnmsub_vv_nxv2f32_commuted:
13172; CHECK:       # %bb.0:
13173; CHECK-NEXT:    vsetvli zero, a0, e32, m1, ta, ma
13174; CHECK-NEXT:    vfnmadd.vv v8, v9, v10, v0.t
13175; CHECK-NEXT:    ret
13176  %negb = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %b, <vscale x 2 x i1> %m, i32 %evl)
13177  %negc = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %c, <vscale x 2 x i1> %m, i32 %evl)
13178  %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %negb, <vscale x 2 x float> %va, <vscale x 2 x float> %negc, <vscale x 2 x i1> %m, i32 %evl)
13179  ret <vscale x 2 x float> %v
13180}
13181
13182define <vscale x 2 x float> @vfnmsub_vv_nxv2f32_unmasked(<vscale x 2 x float> %va, <vscale x 2 x float> %b, <vscale x 2 x float> %c, i32 zeroext %evl) {
13183; CHECK-LABEL: vfnmsub_vv_nxv2f32_unmasked:
13184; CHECK:       # %bb.0:
13185; CHECK-NEXT:    vsetvli zero, a0, e32, m1, ta, ma
13186; CHECK-NEXT:    vfnmadd.vv v8, v9, v10
13187; CHECK-NEXT:    ret
13188  %negb = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %b, <vscale x 2 x i1> splat (i1 true), i32 %evl)
13189  %negc = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %c, <vscale x 2 x i1> splat (i1 true), i32 %evl)
13190  %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x float> %negb, <vscale x 2 x float> %negc, <vscale x 2 x i1> splat (i1 true), i32 %evl)
13191  ret <vscale x 2 x float> %v
13192}
13193
13194define <vscale x 2 x float> @vfnmsub_vv_nxv2f32_unmasked_commuted(<vscale x 2 x float> %va, <vscale x 2 x float> %b, <vscale x 2 x float> %c, i32 zeroext %evl) {
13195; CHECK-LABEL: vfnmsub_vv_nxv2f32_unmasked_commuted:
13196; CHECK:       # %bb.0:
13197; CHECK-NEXT:    vsetvli zero, a0, e32, m1, ta, ma
13198; CHECK-NEXT:    vfnmadd.vv v8, v9, v10
13199; CHECK-NEXT:    ret
13200  %negb = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %b, <vscale x 2 x i1> splat (i1 true), i32 %evl)
13201  %negc = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %c, <vscale x 2 x i1> splat (i1 true), i32 %evl)
13202  %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %negb, <vscale x 2 x float> %va, <vscale x 2 x float> %negc, <vscale x 2 x i1> splat (i1 true), i32 %evl)
13203  ret <vscale x 2 x float> %v
13204}
13205
13206define <vscale x 2 x float> @vfnmsub_vf_nxv2f32(<vscale x 2 x float> %va, float %b, <vscale x 2 x float> %vc, <vscale x 2 x i1> %m, i32 zeroext %evl) {
13207; CHECK-LABEL: vfnmsub_vf_nxv2f32:
13208; CHECK:       # %bb.0:
13209; CHECK-NEXT:    vsetvli zero, a0, e32, m1, ta, ma
13210; CHECK-NEXT:    vfnmsub.vf v8, fa0, v9, v0.t
13211; CHECK-NEXT:    ret
13212  %elt.head = insertelement <vscale x 2 x float> poison, float %b, i32 0
13213  %vb = shufflevector <vscale x 2 x float> %elt.head, <vscale x 2 x float> poison, <vscale x 2 x i32> zeroinitializer
13214  %negva = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x i1> %m, i32 %evl)
13215  %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %negva, <vscale x 2 x float> %vb, <vscale x 2 x float> %vc, <vscale x 2 x i1> %m, i32 %evl)
13216  ret <vscale x 2 x float> %v
13217}
13218
13219define <vscale x 2 x float> @vfnmsub_vf_nxv2f32_commute(<vscale x 2 x float> %va, float %b, <vscale x 2 x float> %vc, <vscale x 2 x i1> %m, i32 zeroext %evl) {
13220; CHECK-LABEL: vfnmsub_vf_nxv2f32_commute:
13221; CHECK:       # %bb.0:
13222; CHECK-NEXT:    vsetvli zero, a0, e32, m1, ta, ma
13223; CHECK-NEXT:    vfnmsub.vf v8, fa0, v9, v0.t
13224; CHECK-NEXT:    ret
13225  %elt.head = insertelement <vscale x 2 x float> poison, float %b, i32 0
13226  %vb = shufflevector <vscale x 2 x float> %elt.head, <vscale x 2 x float> poison, <vscale x 2 x i32> zeroinitializer
13227  %negva = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x i1> %m, i32 %evl)
13228  %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %vb, <vscale x 2 x float> %negva, <vscale x 2 x float> %vc, <vscale x 2 x i1> %m, i32 %evl)
13229  ret <vscale x 2 x float> %v
13230}
13231
13232define <vscale x 2 x float> @vfnmsub_vf_nxv2f32_unmasked(<vscale x 2 x float> %va, float %b, <vscale x 2 x float> %vc, i32 zeroext %evl) {
13233; CHECK-LABEL: vfnmsub_vf_nxv2f32_unmasked:
13234; CHECK:       # %bb.0:
13235; CHECK-NEXT:    vsetvli zero, a0, e32, m1, ta, ma
13236; CHECK-NEXT:    vfnmsub.vf v8, fa0, v9
13237; CHECK-NEXT:    ret
13238  %elt.head = insertelement <vscale x 2 x float> poison, float %b, i32 0
13239  %vb = shufflevector <vscale x 2 x float> %elt.head, <vscale x 2 x float> poison, <vscale x 2 x i32> zeroinitializer
13240  %negva = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x i1> splat (i1 true), i32 %evl)
13241  %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %negva, <vscale x 2 x float> %vb, <vscale x 2 x float> %vc, <vscale x 2 x i1> splat (i1 true), i32 %evl)
13242  ret <vscale x 2 x float> %v
13243}
13244
13245define <vscale x 2 x float> @vfnmsub_vf_nxv2f32_unmasked_commute(<vscale x 2 x float> %va, float %b, <vscale x 2 x float> %vc, i32 zeroext %evl) {
13246; CHECK-LABEL: vfnmsub_vf_nxv2f32_unmasked_commute:
13247; CHECK:       # %bb.0:
13248; CHECK-NEXT:    vsetvli zero, a0, e32, m1, ta, ma
13249; CHECK-NEXT:    vfnmsub.vf v8, fa0, v9
13250; CHECK-NEXT:    ret
13251  %elt.head = insertelement <vscale x 2 x float> poison, float %b, i32 0
13252  %vb = shufflevector <vscale x 2 x float> %elt.head, <vscale x 2 x float> poison, <vscale x 2 x i32> zeroinitializer
13253  %negva = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x i1> splat (i1 true), i32 %evl)
13254  %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %vb, <vscale x 2 x float> %negva, <vscale x 2 x float> %vc, <vscale x 2 x i1> splat (i1 true), i32 %evl)
13255  ret <vscale x 2 x float> %v
13256}
13257
13258define <vscale x 2 x float> @vfnmsub_vf_nxv2f32_neg_splat(<vscale x 2 x float> %va, float %b, <vscale x 2 x float> %vc, <vscale x 2 x i1> %m, i32 zeroext %evl) {
13259; CHECK-LABEL: vfnmsub_vf_nxv2f32_neg_splat:
13260; CHECK:       # %bb.0:
13261; CHECK-NEXT:    vsetvli zero, a0, e32, m1, ta, ma
13262; CHECK-NEXT:    vfnmsub.vf v8, fa0, v9, v0.t
13263; CHECK-NEXT:    ret
13264  %elt.head = insertelement <vscale x 2 x float> poison, float %b, i32 0
13265  %vb = shufflevector <vscale x 2 x float> %elt.head, <vscale x 2 x float> poison, <vscale x 2 x i32> zeroinitializer
13266  %negvb = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %vb, <vscale x 2 x i1> %m, i32 %evl)
13267  %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x float> %negvb, <vscale x 2 x float> %vc, <vscale x 2 x i1> %m, i32 %evl)
13268  ret <vscale x 2 x float> %v
13269}
13270
13271define <vscale x 2 x float> @vfnmsub_vf_nxv2f32_neg_splat_commute(<vscale x 2 x float> %va, float %b, <vscale x 2 x float> %vc, <vscale x 2 x i1> %m, i32 zeroext %evl) {
13272; CHECK-LABEL: vfnmsub_vf_nxv2f32_neg_splat_commute:
13273; CHECK:       # %bb.0:
13274; CHECK-NEXT:    vsetvli zero, a0, e32, m1, ta, ma
13275; CHECK-NEXT:    vfnmsub.vf v8, fa0, v9, v0.t
13276; CHECK-NEXT:    ret
13277  %elt.head = insertelement <vscale x 2 x float> poison, float %b, i32 0
13278  %vb = shufflevector <vscale x 2 x float> %elt.head, <vscale x 2 x float> poison, <vscale x 2 x i32> zeroinitializer
13279  %negvb = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %vb, <vscale x 2 x i1> %m, i32 %evl)
13280  %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %negvb, <vscale x 2 x float> %va, <vscale x 2 x float> %vc, <vscale x 2 x i1> %m, i32 %evl)
13281  ret <vscale x 2 x float> %v
13282}
13283
13284define <vscale x 2 x float> @vfnmsub_vf_nxv2f32_neg_splat_unmasked(<vscale x 2 x float> %va, float %b, <vscale x 2 x float> %vc, i32 zeroext %evl) {
13285; CHECK-LABEL: vfnmsub_vf_nxv2f32_neg_splat_unmasked:
13286; CHECK:       # %bb.0:
13287; CHECK-NEXT:    vsetvli zero, a0, e32, m1, ta, ma
13288; CHECK-NEXT:    vfnmsub.vf v8, fa0, v9
13289; CHECK-NEXT:    ret
13290  %elt.head = insertelement <vscale x 2 x float> poison, float %b, i32 0
13291  %vb = shufflevector <vscale x 2 x float> %elt.head, <vscale x 2 x float> poison, <vscale x 2 x i32> zeroinitializer
13292  %negvb = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %vb, <vscale x 2 x i1> splat (i1 true), i32 %evl)
13293  %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x float> %negvb, <vscale x 2 x float> %vc, <vscale x 2 x i1> splat (i1 true), i32 %evl)
13294  ret <vscale x 2 x float> %v
13295}
13296
13297define <vscale x 2 x float> @vfnmsub_vf_nxv2f32_neg_splat_unmasked_commute(<vscale x 2 x float> %va, float %b, <vscale x 2 x float> %vc, i32 zeroext %evl) {
13298; CHECK-LABEL: vfnmsub_vf_nxv2f32_neg_splat_unmasked_commute:
13299; CHECK:       # %bb.0:
13300; CHECK-NEXT:    vsetvli zero, a0, e32, m1, ta, ma
13301; CHECK-NEXT:    vfnmsub.vf v8, fa0, v9
13302; CHECK-NEXT:    ret
13303  %elt.head = insertelement <vscale x 2 x float> poison, float %b, i32 0
13304  %vb = shufflevector <vscale x 2 x float> %elt.head, <vscale x 2 x float> poison, <vscale x 2 x i32> zeroinitializer
13305  %negvb = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %vb, <vscale x 2 x i1> splat (i1 true), i32 %evl)
13306  %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %negvb, <vscale x 2 x float> %va, <vscale x 2 x float> %vc, <vscale x 2 x i1> splat (i1 true), i32 %evl)
13307  ret <vscale x 2 x float> %v
13308}
13309
13310declare <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float>, <vscale x 4 x i1>, i32)
13311
13312define <vscale x 4 x float> @vfmsub_vv_nxv4f32(<vscale x 4 x float> %va, <vscale x 4 x float> %b, <vscale x 4 x float> %c, <vscale x 4 x i1> %m, i32 zeroext %evl) {
13313; CHECK-LABEL: vfmsub_vv_nxv4f32:
13314; CHECK:       # %bb.0:
13315; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma
13316; CHECK-NEXT:    vfmsub.vv v10, v8, v12, v0.t
13317; CHECK-NEXT:    vmv.v.v v8, v10
13318; CHECK-NEXT:    ret
13319  %negc = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %c, <vscale x 4 x i1> %m, i32 %evl)
13320  %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %va, <vscale x 4 x float> %b, <vscale x 4 x float> %negc, <vscale x 4 x i1> %m, i32 %evl)
13321  ret <vscale x 4 x float> %v
13322}
13323
13324define <vscale x 4 x float> @vfmsub_vv_nxv4f32_unmasked(<vscale x 4 x float> %va, <vscale x 4 x float> %b, <vscale x 4 x float> %c, i32 zeroext %evl) {
13325; CHECK-LABEL: vfmsub_vv_nxv4f32_unmasked:
13326; CHECK:       # %bb.0:
13327; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma
13328; CHECK-NEXT:    vfmsub.vv v8, v10, v12
13329; CHECK-NEXT:    ret
13330  %negc = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %c, <vscale x 4 x i1> splat (i1 true), i32 %evl)
13331  %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %va, <vscale x 4 x float> %b, <vscale x 4 x float> %negc, <vscale x 4 x i1> splat (i1 true), i32 %evl)
13332  ret <vscale x 4 x float> %v
13333}
13334
13335define <vscale x 4 x float> @vfmsub_vf_nxv4f32(<vscale x 4 x float> %va, float %b, <vscale x 4 x float> %vc, <vscale x 4 x i1> %m, i32 zeroext %evl) {
13336; CHECK-LABEL: vfmsub_vf_nxv4f32:
13337; CHECK:       # %bb.0:
13338; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma
13339; CHECK-NEXT:    vfmsub.vf v8, fa0, v10, v0.t
13340; CHECK-NEXT:    ret
13341  %elt.head = insertelement <vscale x 4 x float> poison, float %b, i32 0
13342  %vb = shufflevector <vscale x 4 x float> %elt.head, <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer
13343  %negvc = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %vc, <vscale x 4 x i1> %m, i32 %evl)
13344  %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %va, <vscale x 4 x float> %vb, <vscale x 4 x float> %negvc, <vscale x 4 x i1> %m, i32 %evl)
13345  ret <vscale x 4 x float> %v
13346}
13347
13348define <vscale x 4 x float> @vfmsub_vf_nxv4f32_commute(<vscale x 4 x float> %va, float %b, <vscale x 4 x float> %vc, <vscale x 4 x i1> %m, i32 zeroext %evl) {
13349; CHECK-LABEL: vfmsub_vf_nxv4f32_commute:
13350; CHECK:       # %bb.0:
13351; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma
13352; CHECK-NEXT:    vfmsub.vf v8, fa0, v10, v0.t
13353; CHECK-NEXT:    ret
13354  %elt.head = insertelement <vscale x 4 x float> poison, float %b, i32 0
13355  %vb = shufflevector <vscale x 4 x float> %elt.head, <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer
13356  %negvc = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %vc, <vscale x 4 x i1> %m, i32 %evl)
13357  %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %vb, <vscale x 4 x float> %va, <vscale x 4 x float> %negvc, <vscale x 4 x i1> %m, i32 %evl)
13358  ret <vscale x 4 x float> %v
13359}
13360
13361define <vscale x 4 x float> @vfmsub_vf_nxv4f32_unmasked(<vscale x 4 x float> %va, float %b, <vscale x 4 x float> %vc, i32 zeroext %evl) {
13362; CHECK-LABEL: vfmsub_vf_nxv4f32_unmasked:
13363; CHECK:       # %bb.0:
13364; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma
13365; CHECK-NEXT:    vfmsub.vf v8, fa0, v10
13366; CHECK-NEXT:    ret
13367  %elt.head = insertelement <vscale x 4 x float> poison, float %b, i32 0
13368  %vb = shufflevector <vscale x 4 x float> %elt.head, <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer
13369  %negvc = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %vc, <vscale x 4 x i1> splat (i1 true), i32 %evl)
13370  %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %va, <vscale x 4 x float> %vb, <vscale x 4 x float> %negvc, <vscale x 4 x i1> splat (i1 true), i32 %evl)
13371  ret <vscale x 4 x float> %v
13372}
13373
13374define <vscale x 4 x float> @vfmsub_vf_nxv4f32_unmasked_commute(<vscale x 4 x float> %va, float %b, <vscale x 4 x float> %vc, i32 zeroext %evl) {
13375; CHECK-LABEL: vfmsub_vf_nxv4f32_unmasked_commute:
13376; CHECK:       # %bb.0:
13377; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma
13378; CHECK-NEXT:    vfmsub.vf v8, fa0, v10
13379; CHECK-NEXT:    ret
13380  %elt.head = insertelement <vscale x 4 x float> poison, float %b, i32 0
13381  %vb = shufflevector <vscale x 4 x float> %elt.head, <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer
13382  %negvc = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %vc, <vscale x 4 x i1> splat (i1 true), i32 %evl)
13383  %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %vb, <vscale x 4 x float> %va, <vscale x 4 x float> %negvc, <vscale x 4 x i1> splat (i1 true), i32 %evl)
13384  ret <vscale x 4 x float> %v
13385}
13386
13387define <vscale x 4 x float> @vfnmadd_vv_nxv4f32(<vscale x 4 x float> %va, <vscale x 4 x float> %b, <vscale x 4 x float> %c, <vscale x 4 x i1> %m, i32 zeroext %evl) {
13388; CHECK-LABEL: vfnmadd_vv_nxv4f32:
13389; CHECK:       # %bb.0:
13390; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma
13391; CHECK-NEXT:    vfnmadd.vv v10, v8, v12, v0.t
13392; CHECK-NEXT:    vmv.v.v v8, v10
13393; CHECK-NEXT:    ret
13394  %negb = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %b, <vscale x 4 x i1> %m, i32 %evl)
13395  %negc = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %c, <vscale x 4 x i1> %m, i32 %evl)
13396  %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %va, <vscale x 4 x float> %negb, <vscale x 4 x float> %negc, <vscale x 4 x i1> %m, i32 %evl)
13397  ret <vscale x 4 x float> %v
13398}
13399
13400define <vscale x 4 x float> @vfnmadd_vv_nxv4f32_commuted(<vscale x 4 x float> %va, <vscale x 4 x float> %b, <vscale x 4 x float> %c, <vscale x 4 x i1> %m, i32 zeroext %evl) {
13401; CHECK-LABEL: vfnmadd_vv_nxv4f32_commuted:
13402; CHECK:       # %bb.0:
13403; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma
13404; CHECK-NEXT:    vfnmadd.vv v8, v10, v12, v0.t
13405; CHECK-NEXT:    ret
13406  %negb = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %b, <vscale x 4 x i1> %m, i32 %evl)
13407  %negc = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %c, <vscale x 4 x i1> %m, i32 %evl)
13408  %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %negb, <vscale x 4 x float> %va, <vscale x 4 x float> %negc, <vscale x 4 x i1> %m, i32 %evl)
13409  ret <vscale x 4 x float> %v
13410}
13411
13412define <vscale x 4 x float> @vfnmadd_vv_nxv4f32_unmasked(<vscale x 4 x float> %va, <vscale x 4 x float> %b, <vscale x 4 x float> %c, i32 zeroext %evl) {
13413; CHECK-LABEL: vfnmadd_vv_nxv4f32_unmasked:
13414; CHECK:       # %bb.0:
13415; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma
13416; CHECK-NEXT:    vfnmadd.vv v8, v10, v12
13417; CHECK-NEXT:    ret
13418  %negb = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %b, <vscale x 4 x i1> splat (i1 true), i32 %evl)
13419  %negc = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %c, <vscale x 4 x i1> splat (i1 true), i32 %evl)
13420  %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %va, <vscale x 4 x float> %negb, <vscale x 4 x float> %negc, <vscale x 4 x i1> splat (i1 true), i32 %evl)
13421  ret <vscale x 4 x float> %v
13422}
13423
13424define <vscale x 4 x float> @vfnmadd_vv_nxv4f32_unmasked_commuted(<vscale x 4 x float> %va, <vscale x 4 x float> %b, <vscale x 4 x float> %c, i32 zeroext %evl) {
13425; CHECK-LABEL: vfnmadd_vv_nxv4f32_unmasked_commuted:
13426; CHECK:       # %bb.0:
13427; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma
13428; CHECK-NEXT:    vfnmadd.vv v8, v10, v12
13429; CHECK-NEXT:    ret
13430  %negb = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %b, <vscale x 4 x i1> splat (i1 true), i32 %evl)
13431  %negc = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %c, <vscale x 4 x i1> splat (i1 true), i32 %evl)
13432  %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %negb, <vscale x 4 x float> %va, <vscale x 4 x float> %negc, <vscale x 4 x i1> splat (i1 true), i32 %evl)
13433  ret <vscale x 4 x float> %v
13434}
13435
13436define <vscale x 4 x float> @vfnmadd_vf_nxv4f32(<vscale x 4 x float> %va, float %b, <vscale x 4 x float> %vc, <vscale x 4 x i1> %m, i32 zeroext %evl) {
13437; CHECK-LABEL: vfnmadd_vf_nxv4f32:
13438; CHECK:       # %bb.0:
13439; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma
13440; CHECK-NEXT:    vfnmadd.vf v8, fa0, v10, v0.t
13441; CHECK-NEXT:    ret
13442  %elt.head = insertelement <vscale x 4 x float> poison, float %b, i32 0
13443  %vb = shufflevector <vscale x 4 x float> %elt.head, <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer
13444  %negva = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %va, <vscale x 4 x i1> %m, i32 %evl)
13445  %negvc = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %vc, <vscale x 4 x i1> %m, i32 %evl)
13446  %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %negva, <vscale x 4 x float> %vb, <vscale x 4 x float> %negvc, <vscale x 4 x i1> %m, i32 %evl)
13447  ret <vscale x 4 x float> %v
13448}
13449
13450define <vscale x 4 x float> @vfnmadd_vf_nxv4f32_commute(<vscale x 4 x float> %va, float %b, <vscale x 4 x float> %vc, <vscale x 4 x i1> %m, i32 zeroext %evl) {
13451; CHECK-LABEL: vfnmadd_vf_nxv4f32_commute:
13452; CHECK:       # %bb.0:
13453; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma
13454; CHECK-NEXT:    vfnmadd.vf v8, fa0, v10, v0.t
13455; CHECK-NEXT:    ret
13456  %elt.head = insertelement <vscale x 4 x float> poison, float %b, i32 0
13457  %vb = shufflevector <vscale x 4 x float> %elt.head, <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer
13458  %negva = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %va, <vscale x 4 x i1> %m, i32 %evl)
13459  %negvc = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %vc, <vscale x 4 x i1> %m, i32 %evl)
13460  %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %vb, <vscale x 4 x float> %negva, <vscale x 4 x float> %negvc, <vscale x 4 x i1> %m, i32 %evl)
13461  ret <vscale x 4 x float> %v
13462}
13463
13464define <vscale x 4 x float> @vfnmadd_vf_nxv4f32_unmasked(<vscale x 4 x float> %va, float %b, <vscale x 4 x float> %vc, i32 zeroext %evl) {
13465; CHECK-LABEL: vfnmadd_vf_nxv4f32_unmasked:
13466; CHECK:       # %bb.0:
13467; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma
13468; CHECK-NEXT:    vfnmadd.vf v8, fa0, v10
13469; CHECK-NEXT:    ret
13470  %elt.head = insertelement <vscale x 4 x float> poison, float %b, i32 0
13471  %vb = shufflevector <vscale x 4 x float> %elt.head, <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer
13472  %negva = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %va, <vscale x 4 x i1> splat (i1 true), i32 %evl)
13473  %negvc = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %vc, <vscale x 4 x i1> splat (i1 true), i32 %evl)
13474  %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %negva, <vscale x 4 x float> %vb, <vscale x 4 x float> %negvc, <vscale x 4 x i1> splat (i1 true), i32 %evl)
13475  ret <vscale x 4 x float> %v
13476}
13477
13478define <vscale x 4 x float> @vfnmadd_vf_nxv4f32_unmasked_commute(<vscale x 4 x float> %va, float %b, <vscale x 4 x float> %vc, i32 zeroext %evl) {
13479; CHECK-LABEL: vfnmadd_vf_nxv4f32_unmasked_commute:
13480; CHECK:       # %bb.0:
13481; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma
13482; CHECK-NEXT:    vfnmadd.vf v8, fa0, v10
13483; CHECK-NEXT:    ret
13484  %elt.head = insertelement <vscale x 4 x float> poison, float %b, i32 0
13485  %vb = shufflevector <vscale x 4 x float> %elt.head, <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer
13486  %negva = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %va, <vscale x 4 x i1> splat (i1 true), i32 %evl)
13487  %negvc = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %vc, <vscale x 4 x i1> splat (i1 true), i32 %evl)
13488  %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %vb, <vscale x 4 x float> %negva, <vscale x 4 x float> %negvc, <vscale x 4 x i1> splat (i1 true), i32 %evl)
13489  ret <vscale x 4 x float> %v
13490}
13491
13492define <vscale x 4 x float> @vfnmadd_vf_nxv4f32_neg_splat(<vscale x 4 x float> %va, float %b, <vscale x 4 x float> %vc, <vscale x 4 x i1> %m, i32 zeroext %evl) {
13493; CHECK-LABEL: vfnmadd_vf_nxv4f32_neg_splat:
13494; CHECK:       # %bb.0:
13495; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma
13496; CHECK-NEXT:    vfnmadd.vf v8, fa0, v10, v0.t
13497; CHECK-NEXT:    ret
13498  %elt.head = insertelement <vscale x 4 x float> poison, float %b, i32 0
13499  %vb = shufflevector <vscale x 4 x float> %elt.head, <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer
13500  %negvb = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %vb, <vscale x 4 x i1> %m, i32 %evl)
13501  %negvc = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %vc, <vscale x 4 x i1> %m, i32 %evl)
13502  %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %va, <vscale x 4 x float> %negvb, <vscale x 4 x float> %negvc, <vscale x 4 x i1> %m, i32 %evl)
13503  ret <vscale x 4 x float> %v
13504}
13505
13506define <vscale x 4 x float> @vfnmadd_vf_nxv4f32_neg_splat_commute(<vscale x 4 x float> %va, float %b, <vscale x 4 x float> %vc, <vscale x 4 x i1> %m, i32 zeroext %evl) {
13507; CHECK-LABEL: vfnmadd_vf_nxv4f32_neg_splat_commute:
13508; CHECK:       # %bb.0:
13509; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma
13510; CHECK-NEXT:    vfnmadd.vf v8, fa0, v10, v0.t
13511; CHECK-NEXT:    ret
13512  %elt.head = insertelement <vscale x 4 x float> poison, float %b, i32 0
13513  %vb = shufflevector <vscale x 4 x float> %elt.head, <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer
13514  %negvb = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %vb, <vscale x 4 x i1> %m, i32 %evl)
13515  %negvc = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %vc, <vscale x 4 x i1> %m, i32 %evl)
13516  %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %negvb, <vscale x 4 x float> %va, <vscale x 4 x float> %negvc, <vscale x 4 x i1> %m, i32 %evl)
13517  ret <vscale x 4 x float> %v
13518}
13519
13520define <vscale x 4 x float> @vfnmadd_vf_nxv4f32_neg_splat_unmasked(<vscale x 4 x float> %va, float %b, <vscale x 4 x float> %vc, i32 zeroext %evl) {
13521; CHECK-LABEL: vfnmadd_vf_nxv4f32_neg_splat_unmasked:
13522; CHECK:       # %bb.0:
13523; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma
13524; CHECK-NEXT:    vfnmadd.vf v8, fa0, v10
13525; CHECK-NEXT:    ret
13526  %elt.head = insertelement <vscale x 4 x float> poison, float %b, i32 0
13527  %vb = shufflevector <vscale x 4 x float> %elt.head, <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer
13528  %negvb = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %vb, <vscale x 4 x i1> splat (i1 true), i32 %evl)
13529  %negvc = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %vc, <vscale x 4 x i1> splat (i1 true), i32 %evl)
13530  %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %va, <vscale x 4 x float> %negvb, <vscale x 4 x float> %negvc, <vscale x 4 x i1> splat (i1 true), i32 %evl)
13531  ret <vscale x 4 x float> %v
13532}
13533
13534define <vscale x 4 x float> @vfnmadd_vf_nxv4f32_neg_splat_unmasked_commute(<vscale x 4 x float> %va, float %b, <vscale x 4 x float> %vc, i32 zeroext %evl) {
13535; CHECK-LABEL: vfnmadd_vf_nxv4f32_neg_splat_unmasked_commute:
13536; CHECK:       # %bb.0:
13537; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma
13538; CHECK-NEXT:    vfnmadd.vf v8, fa0, v10
13539; CHECK-NEXT:    ret
13540  %elt.head = insertelement <vscale x 4 x float> poison, float %b, i32 0
13541  %vb = shufflevector <vscale x 4 x float> %elt.head, <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer
13542  %negvb = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %vb, <vscale x 4 x i1> splat (i1 true), i32 %evl)
13543  %negvc = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %vc, <vscale x 4 x i1> splat (i1 true), i32 %evl)
13544  %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %negvb, <vscale x 4 x float> %va, <vscale x 4 x float> %negvc, <vscale x 4 x i1> splat (i1 true), i32 %evl)
13545  ret <vscale x 4 x float> %v
13546}
13547
13548define <vscale x 4 x float> @vfnmsub_vv_nxv4f32(<vscale x 4 x float> %va, <vscale x 4 x float> %b, <vscale x 4 x float> %c, <vscale x 4 x i1> %m, i32 zeroext %evl) {
13549; CHECK-LABEL: vfnmsub_vv_nxv4f32:
13550; CHECK:       # %bb.0:
13551; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma
13552; CHECK-NEXT:    vfnmadd.vv v10, v8, v12, v0.t
13553; CHECK-NEXT:    vmv.v.v v8, v10
13554; CHECK-NEXT:    ret
13555  %negb = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %b, <vscale x 4 x i1> %m, i32 %evl)
13556  %negc = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %c, <vscale x 4 x i1> %m, i32 %evl)
13557  %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %va, <vscale x 4 x float> %negb, <vscale x 4 x float> %negc, <vscale x 4 x i1> %m, i32 %evl)
13558  ret <vscale x 4 x float> %v
13559}
13560
13561define <vscale x 4 x float> @vfnmsub_vv_nxv4f32_commuted(<vscale x 4 x float> %va, <vscale x 4 x float> %b, <vscale x 4 x float> %c, <vscale x 4 x i1> %m, i32 zeroext %evl) {
13562; CHECK-LABEL: vfnmsub_vv_nxv4f32_commuted:
13563; CHECK:       # %bb.0:
13564; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma
13565; CHECK-NEXT:    vfnmadd.vv v8, v10, v12, v0.t
13566; CHECK-NEXT:    ret
13567  %negb = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %b, <vscale x 4 x i1> %m, i32 %evl)
13568  %negc = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %c, <vscale x 4 x i1> %m, i32 %evl)
13569  %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %negb, <vscale x 4 x float> %va, <vscale x 4 x float> %negc, <vscale x 4 x i1> %m, i32 %evl)
13570  ret <vscale x 4 x float> %v
13571}
13572
13573define <vscale x 4 x float> @vfnmsub_vv_nxv4f32_unmasked(<vscale x 4 x float> %va, <vscale x 4 x float> %b, <vscale x 4 x float> %c, i32 zeroext %evl) {
13574; CHECK-LABEL: vfnmsub_vv_nxv4f32_unmasked:
13575; CHECK:       # %bb.0:
13576; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma
13577; CHECK-NEXT:    vfnmadd.vv v8, v10, v12
13578; CHECK-NEXT:    ret
13579  %negb = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %b, <vscale x 4 x i1> splat (i1 true), i32 %evl)
13580  %negc = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %c, <vscale x 4 x i1> splat (i1 true), i32 %evl)
13581  %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %va, <vscale x 4 x float> %negb, <vscale x 4 x float> %negc, <vscale x 4 x i1> splat (i1 true), i32 %evl)
13582  ret <vscale x 4 x float> %v
13583}
13584
13585define <vscale x 4 x float> @vfnmsub_vv_nxv4f32_unmasked_commuted(<vscale x 4 x float> %va, <vscale x 4 x float> %b, <vscale x 4 x float> %c, i32 zeroext %evl) {
13586; CHECK-LABEL: vfnmsub_vv_nxv4f32_unmasked_commuted:
13587; CHECK:       # %bb.0:
13588; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma
13589; CHECK-NEXT:    vfnmadd.vv v8, v10, v12
13590; CHECK-NEXT:    ret
13591  %negb = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %b, <vscale x 4 x i1> splat (i1 true), i32 %evl)
13592  %negc = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %c, <vscale x 4 x i1> splat (i1 true), i32 %evl)
13593  %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %negb, <vscale x 4 x float> %va, <vscale x 4 x float> %negc, <vscale x 4 x i1> splat (i1 true), i32 %evl)
13594  ret <vscale x 4 x float> %v
13595}
13596
13597define <vscale x 4 x float> @vfnmsub_vf_nxv4f32(<vscale x 4 x float> %va, float %b, <vscale x 4 x float> %vc, <vscale x 4 x i1> %m, i32 zeroext %evl) {
13598; CHECK-LABEL: vfnmsub_vf_nxv4f32:
13599; CHECK:       # %bb.0:
13600; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma
13601; CHECK-NEXT:    vfnmsub.vf v8, fa0, v10, v0.t
13602; CHECK-NEXT:    ret
13603  %elt.head = insertelement <vscale x 4 x float> poison, float %b, i32 0
13604  %vb = shufflevector <vscale x 4 x float> %elt.head, <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer
13605  %negva = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %va, <vscale x 4 x i1> %m, i32 %evl)
13606  %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %negva, <vscale x 4 x float> %vb, <vscale x 4 x float> %vc, <vscale x 4 x i1> %m, i32 %evl)
13607  ret <vscale x 4 x float> %v
13608}
13609
13610define <vscale x 4 x float> @vfnmsub_vf_nxv4f32_commute(<vscale x 4 x float> %va, float %b, <vscale x 4 x float> %vc, <vscale x 4 x i1> %m, i32 zeroext %evl) {
13611; CHECK-LABEL: vfnmsub_vf_nxv4f32_commute:
13612; CHECK:       # %bb.0:
13613; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma
13614; CHECK-NEXT:    vfnmsub.vf v8, fa0, v10, v0.t
13615; CHECK-NEXT:    ret
13616  %elt.head = insertelement <vscale x 4 x float> poison, float %b, i32 0
13617  %vb = shufflevector <vscale x 4 x float> %elt.head, <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer
13618  %negva = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %va, <vscale x 4 x i1> %m, i32 %evl)
13619  %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %vb, <vscale x 4 x float> %negva, <vscale x 4 x float> %vc, <vscale x 4 x i1> %m, i32 %evl)
13620  ret <vscale x 4 x float> %v
13621}
13622
13623define <vscale x 4 x float> @vfnmsub_vf_nxv4f32_unmasked(<vscale x 4 x float> %va, float %b, <vscale x 4 x float> %vc, i32 zeroext %evl) {
13624; CHECK-LABEL: vfnmsub_vf_nxv4f32_unmasked:
13625; CHECK:       # %bb.0:
13626; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma
13627; CHECK-NEXT:    vfnmsub.vf v8, fa0, v10
13628; CHECK-NEXT:    ret
13629  %elt.head = insertelement <vscale x 4 x float> poison, float %b, i32 0
13630  %vb = shufflevector <vscale x 4 x float> %elt.head, <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer
13631  %negva = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %va, <vscale x 4 x i1> splat (i1 true), i32 %evl)
13632  %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %negva, <vscale x 4 x float> %vb, <vscale x 4 x float> %vc, <vscale x 4 x i1> splat (i1 true), i32 %evl)
13633  ret <vscale x 4 x float> %v
13634}
13635
13636define <vscale x 4 x float> @vfnmsub_vf_nxv4f32_unmasked_commute(<vscale x 4 x float> %va, float %b, <vscale x 4 x float> %vc, i32 zeroext %evl) {
13637; CHECK-LABEL: vfnmsub_vf_nxv4f32_unmasked_commute:
13638; CHECK:       # %bb.0:
13639; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma
13640; CHECK-NEXT:    vfnmsub.vf v8, fa0, v10
13641; CHECK-NEXT:    ret
13642  %elt.head = insertelement <vscale x 4 x float> poison, float %b, i32 0
13643  %vb = shufflevector <vscale x 4 x float> %elt.head, <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer
13644  %negva = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %va, <vscale x 4 x i1> splat (i1 true), i32 %evl)
13645  %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %vb, <vscale x 4 x float> %negva, <vscale x 4 x float> %vc, <vscale x 4 x i1> splat (i1 true), i32 %evl)
13646  ret <vscale x 4 x float> %v
13647}
13648
13649define <vscale x 4 x float> @vfnmsub_vf_nxv4f32_neg_splat(<vscale x 4 x float> %va, float %b, <vscale x 4 x float> %vc, <vscale x 4 x i1> %m, i32 zeroext %evl) {
13650; CHECK-LABEL: vfnmsub_vf_nxv4f32_neg_splat:
13651; CHECK:       # %bb.0:
13652; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma
13653; CHECK-NEXT:    vfnmsub.vf v8, fa0, v10, v0.t
13654; CHECK-NEXT:    ret
13655  %elt.head = insertelement <vscale x 4 x float> poison, float %b, i32 0
13656  %vb = shufflevector <vscale x 4 x float> %elt.head, <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer
13657  %negvb = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %vb, <vscale x 4 x i1> %m, i32 %evl)
13658  %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %va, <vscale x 4 x float> %negvb, <vscale x 4 x float> %vc, <vscale x 4 x i1> %m, i32 %evl)
13659  ret <vscale x 4 x float> %v
13660}
13661
13662define <vscale x 4 x float> @vfnmsub_vf_nxv4f32_neg_splat_commute(<vscale x 4 x float> %va, float %b, <vscale x 4 x float> %vc, <vscale x 4 x i1> %m, i32 zeroext %evl) {
13663; CHECK-LABEL: vfnmsub_vf_nxv4f32_neg_splat_commute:
13664; CHECK:       # %bb.0:
13665; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma
13666; CHECK-NEXT:    vfnmsub.vf v8, fa0, v10, v0.t
13667; CHECK-NEXT:    ret
13668  %elt.head = insertelement <vscale x 4 x float> poison, float %b, i32 0
13669  %vb = shufflevector <vscale x 4 x float> %elt.head, <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer
13670  %negvb = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %vb, <vscale x 4 x i1> %m, i32 %evl)
13671  %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %negvb, <vscale x 4 x float> %va, <vscale x 4 x float> %vc, <vscale x 4 x i1> %m, i32 %evl)
13672  ret <vscale x 4 x float> %v
13673}
13674
13675define <vscale x 4 x float> @vfnmsub_vf_nxv4f32_neg_splat_unmasked(<vscale x 4 x float> %va, float %b, <vscale x 4 x float> %vc, i32 zeroext %evl) {
13676; CHECK-LABEL: vfnmsub_vf_nxv4f32_neg_splat_unmasked:
13677; CHECK:       # %bb.0:
13678; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma
13679; CHECK-NEXT:    vfnmsub.vf v8, fa0, v10
13680; CHECK-NEXT:    ret
13681  %elt.head = insertelement <vscale x 4 x float> poison, float %b, i32 0
13682  %vb = shufflevector <vscale x 4 x float> %elt.head, <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer
13683  %negvb = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %vb, <vscale x 4 x i1> splat (i1 true), i32 %evl)
13684  %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %va, <vscale x 4 x float> %negvb, <vscale x 4 x float> %vc, <vscale x 4 x i1> splat (i1 true), i32 %evl)
13685  ret <vscale x 4 x float> %v
13686}
13687
13688define <vscale x 4 x float> @vfnmsub_vf_nxv4f32_neg_splat_unmasked_commute(<vscale x 4 x float> %va, float %b, <vscale x 4 x float> %vc, i32 zeroext %evl) {
13689; CHECK-LABEL: vfnmsub_vf_nxv4f32_neg_splat_unmasked_commute:
13690; CHECK:       # %bb.0:
13691; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma
13692; CHECK-NEXT:    vfnmsub.vf v8, fa0, v10
13693; CHECK-NEXT:    ret
13694  %elt.head = insertelement <vscale x 4 x float> poison, float %b, i32 0
13695  %vb = shufflevector <vscale x 4 x float> %elt.head, <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer
13696  %negvb = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %vb, <vscale x 4 x i1> splat (i1 true), i32 %evl)
13697  %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %negvb, <vscale x 4 x float> %va, <vscale x 4 x float> %vc, <vscale x 4 x i1> splat (i1 true), i32 %evl)
13698  ret <vscale x 4 x float> %v
13699}
13700
13701declare <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float>, <vscale x 8 x i1>, i32)
13702
13703define <vscale x 8 x float> @vfmsub_vv_nxv8f32(<vscale x 8 x float> %va, <vscale x 8 x float> %b, <vscale x 8 x float> %c, <vscale x 8 x i1> %m, i32 zeroext %evl) {
13704; CHECK-LABEL: vfmsub_vv_nxv8f32:
13705; CHECK:       # %bb.0:
13706; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma
13707; CHECK-NEXT:    vfmsub.vv v12, v8, v16, v0.t
13708; CHECK-NEXT:    vmv.v.v v8, v12
13709; CHECK-NEXT:    ret
13710  %negc = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %c, <vscale x 8 x i1> %m, i32 %evl)
13711  %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %va, <vscale x 8 x float> %b, <vscale x 8 x float> %negc, <vscale x 8 x i1> %m, i32 %evl)
13712  ret <vscale x 8 x float> %v
13713}
13714
13715define <vscale x 8 x float> @vfmsub_vv_nxv8f32_unmasked(<vscale x 8 x float> %va, <vscale x 8 x float> %b, <vscale x 8 x float> %c, i32 zeroext %evl) {
13716; CHECK-LABEL: vfmsub_vv_nxv8f32_unmasked:
13717; CHECK:       # %bb.0:
13718; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma
13719; CHECK-NEXT:    vfmsub.vv v8, v12, v16
13720; CHECK-NEXT:    ret
13721  %negc = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %c, <vscale x 8 x i1> splat (i1 true), i32 %evl)
13722  %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %va, <vscale x 8 x float> %b, <vscale x 8 x float> %negc, <vscale x 8 x i1> splat (i1 true), i32 %evl)
13723  ret <vscale x 8 x float> %v
13724}
13725
13726define <vscale x 8 x float> @vfmsub_vf_nxv8f32(<vscale x 8 x float> %va, float %b, <vscale x 8 x float> %vc, <vscale x 8 x i1> %m, i32 zeroext %evl) {
13727; CHECK-LABEL: vfmsub_vf_nxv8f32:
13728; CHECK:       # %bb.0:
13729; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma
13730; CHECK-NEXT:    vfmsub.vf v8, fa0, v12, v0.t
13731; CHECK-NEXT:    ret
13732  %elt.head = insertelement <vscale x 8 x float> poison, float %b, i32 0
13733  %vb = shufflevector <vscale x 8 x float> %elt.head, <vscale x 8 x float> poison, <vscale x 8 x i32> zeroinitializer
13734  %negvc = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %vc, <vscale x 8 x i1> %m, i32 %evl)
13735  %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %va, <vscale x 8 x float> %vb, <vscale x 8 x float> %negvc, <vscale x 8 x i1> %m, i32 %evl)
13736  ret <vscale x 8 x float> %v
13737}
13738
13739define <vscale x 8 x float> @vfmsub_vf_nxv8f32_commute(<vscale x 8 x float> %va, float %b, <vscale x 8 x float> %vc, <vscale x 8 x i1> %m, i32 zeroext %evl) {
13740; CHECK-LABEL: vfmsub_vf_nxv8f32_commute:
13741; CHECK:       # %bb.0:
13742; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma
13743; CHECK-NEXT:    vfmsub.vf v8, fa0, v12, v0.t
13744; CHECK-NEXT:    ret
13745  %elt.head = insertelement <vscale x 8 x float> poison, float %b, i32 0
13746  %vb = shufflevector <vscale x 8 x float> %elt.head, <vscale x 8 x float> poison, <vscale x 8 x i32> zeroinitializer
13747  %negvc = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %vc, <vscale x 8 x i1> %m, i32 %evl)
13748  %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %vb, <vscale x 8 x float> %va, <vscale x 8 x float> %negvc, <vscale x 8 x i1> %m, i32 %evl)
13749  ret <vscale x 8 x float> %v
13750}
13751
13752define <vscale x 8 x float> @vfmsub_vf_nxv8f32_unmasked(<vscale x 8 x float> %va, float %b, <vscale x 8 x float> %vc, i32 zeroext %evl) {
13753; CHECK-LABEL: vfmsub_vf_nxv8f32_unmasked:
13754; CHECK:       # %bb.0:
13755; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma
13756; CHECK-NEXT:    vfmsub.vf v8, fa0, v12
13757; CHECK-NEXT:    ret
13758  %elt.head = insertelement <vscale x 8 x float> poison, float %b, i32 0
13759  %vb = shufflevector <vscale x 8 x float> %elt.head, <vscale x 8 x float> poison, <vscale x 8 x i32> zeroinitializer
13760  %negvc = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %vc, <vscale x 8 x i1> splat (i1 true), i32 %evl)
13761  %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %va, <vscale x 8 x float> %vb, <vscale x 8 x float> %negvc, <vscale x 8 x i1> splat (i1 true), i32 %evl)
13762  ret <vscale x 8 x float> %v
13763}
13764
13765define <vscale x 8 x float> @vfmsub_vf_nxv8f32_unmasked_commute(<vscale x 8 x float> %va, float %b, <vscale x 8 x float> %vc, i32 zeroext %evl) {
13766; CHECK-LABEL: vfmsub_vf_nxv8f32_unmasked_commute:
13767; CHECK:       # %bb.0:
13768; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma
13769; CHECK-NEXT:    vfmsub.vf v8, fa0, v12
13770; CHECK-NEXT:    ret
13771  %elt.head = insertelement <vscale x 8 x float> poison, float %b, i32 0
13772  %vb = shufflevector <vscale x 8 x float> %elt.head, <vscale x 8 x float> poison, <vscale x 8 x i32> zeroinitializer
13773  %negvc = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %vc, <vscale x 8 x i1> splat (i1 true), i32 %evl)
13774  %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %vb, <vscale x 8 x float> %va, <vscale x 8 x float> %negvc, <vscale x 8 x i1> splat (i1 true), i32 %evl)
13775  ret <vscale x 8 x float> %v
13776}
13777
13778define <vscale x 8 x float> @vfnmadd_vv_nxv8f32(<vscale x 8 x float> %va, <vscale x 8 x float> %b, <vscale x 8 x float> %c, <vscale x 8 x i1> %m, i32 zeroext %evl) {
13779; CHECK-LABEL: vfnmadd_vv_nxv8f32:
13780; CHECK:       # %bb.0:
13781; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma
13782; CHECK-NEXT:    vfnmadd.vv v12, v8, v16, v0.t
13783; CHECK-NEXT:    vmv.v.v v8, v12
13784; CHECK-NEXT:    ret
13785  %negb = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %b, <vscale x 8 x i1> %m, i32 %evl)
13786  %negc = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %c, <vscale x 8 x i1> %m, i32 %evl)
13787  %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %va, <vscale x 8 x float> %negb, <vscale x 8 x float> %negc, <vscale x 8 x i1> %m, i32 %evl)
13788  ret <vscale x 8 x float> %v
13789}
13790
13791define <vscale x 8 x float> @vfnmadd_vv_nxv8f32_commuted(<vscale x 8 x float> %va, <vscale x 8 x float> %b, <vscale x 8 x float> %c, <vscale x 8 x i1> %m, i32 zeroext %evl) {
13792; CHECK-LABEL: vfnmadd_vv_nxv8f32_commuted:
13793; CHECK:       # %bb.0:
13794; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma
13795; CHECK-NEXT:    vfnmadd.vv v8, v12, v16, v0.t
13796; CHECK-NEXT:    ret
13797  %negb = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %b, <vscale x 8 x i1> %m, i32 %evl)
13798  %negc = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %c, <vscale x 8 x i1> %m, i32 %evl)
13799  %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %negb, <vscale x 8 x float> %va, <vscale x 8 x float> %negc, <vscale x 8 x i1> %m, i32 %evl)
13800  ret <vscale x 8 x float> %v
13801}
13802
13803define <vscale x 8 x float> @vfnmadd_vv_nxv8f32_unmasked(<vscale x 8 x float> %va, <vscale x 8 x float> %b, <vscale x 8 x float> %c, i32 zeroext %evl) {
13804; CHECK-LABEL: vfnmadd_vv_nxv8f32_unmasked:
13805; CHECK:       # %bb.0:
13806; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma
13807; CHECK-NEXT:    vfnmadd.vv v8, v12, v16
13808; CHECK-NEXT:    ret
13809  %negb = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %b, <vscale x 8 x i1> splat (i1 true), i32 %evl)
13810  %negc = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %c, <vscale x 8 x i1> splat (i1 true), i32 %evl)
13811  %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %va, <vscale x 8 x float> %negb, <vscale x 8 x float> %negc, <vscale x 8 x i1> splat (i1 true), i32 %evl)
13812  ret <vscale x 8 x float> %v
13813}
13814
13815define <vscale x 8 x float> @vfnmadd_vv_nxv8f32_unmasked_commuted(<vscale x 8 x float> %va, <vscale x 8 x float> %b, <vscale x 8 x float> %c, i32 zeroext %evl) {
13816; CHECK-LABEL: vfnmadd_vv_nxv8f32_unmasked_commuted:
13817; CHECK:       # %bb.0:
13818; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma
13819; CHECK-NEXT:    vfnmadd.vv v8, v12, v16
13820; CHECK-NEXT:    ret
13821  %negb = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %b, <vscale x 8 x i1> splat (i1 true), i32 %evl)
13822  %negc = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %c, <vscale x 8 x i1> splat (i1 true), i32 %evl)
13823  %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %negb, <vscale x 8 x float> %va, <vscale x 8 x float> %negc, <vscale x 8 x i1> splat (i1 true), i32 %evl)
13824  ret <vscale x 8 x float> %v
13825}
13826
13827define <vscale x 8 x float> @vfnmadd_vf_nxv8f32(<vscale x 8 x float> %va, float %b, <vscale x 8 x float> %vc, <vscale x 8 x i1> %m, i32 zeroext %evl) {
13828; CHECK-LABEL: vfnmadd_vf_nxv8f32:
13829; CHECK:       # %bb.0:
13830; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma
13831; CHECK-NEXT:    vfnmadd.vf v8, fa0, v12, v0.t
13832; CHECK-NEXT:    ret
13833  %elt.head = insertelement <vscale x 8 x float> poison, float %b, i32 0
13834  %vb = shufflevector <vscale x 8 x float> %elt.head, <vscale x 8 x float> poison, <vscale x 8 x i32> zeroinitializer
13835  %negva = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %va, <vscale x 8 x i1> %m, i32 %evl)
13836  %negvc = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %vc, <vscale x 8 x i1> %m, i32 %evl)
13837  %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %negva, <vscale x 8 x float> %vb, <vscale x 8 x float> %negvc, <vscale x 8 x i1> %m, i32 %evl)
13838  ret <vscale x 8 x float> %v
13839}
13840
13841define <vscale x 8 x float> @vfnmadd_vf_nxv8f32_commute(<vscale x 8 x float> %va, float %b, <vscale x 8 x float> %vc, <vscale x 8 x i1> %m, i32 zeroext %evl) {
13842; CHECK-LABEL: vfnmadd_vf_nxv8f32_commute:
13843; CHECK:       # %bb.0:
13844; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma
13845; CHECK-NEXT:    vfnmadd.vf v8, fa0, v12, v0.t
13846; CHECK-NEXT:    ret
13847  %elt.head = insertelement <vscale x 8 x float> poison, float %b, i32 0
13848  %vb = shufflevector <vscale x 8 x float> %elt.head, <vscale x 8 x float> poison, <vscale x 8 x i32> zeroinitializer
13849  %negva = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %va, <vscale x 8 x i1> %m, i32 %evl)
13850  %negvc = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %vc, <vscale x 8 x i1> %m, i32 %evl)
13851  %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %vb, <vscale x 8 x float> %negva, <vscale x 8 x float> %negvc, <vscale x 8 x i1> %m, i32 %evl)
13852  ret <vscale x 8 x float> %v
13853}
13854
13855define <vscale x 8 x float> @vfnmadd_vf_nxv8f32_unmasked(<vscale x 8 x float> %va, float %b, <vscale x 8 x float> %vc, i32 zeroext %evl) {
13856; CHECK-LABEL: vfnmadd_vf_nxv8f32_unmasked:
13857; CHECK:       # %bb.0:
13858; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma
13859; CHECK-NEXT:    vfnmadd.vf v8, fa0, v12
13860; CHECK-NEXT:    ret
13861  %elt.head = insertelement <vscale x 8 x float> poison, float %b, i32 0
13862  %vb = shufflevector <vscale x 8 x float> %elt.head, <vscale x 8 x float> poison, <vscale x 8 x i32> zeroinitializer
13863  %negva = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %va, <vscale x 8 x i1> splat (i1 true), i32 %evl)
13864  %negvc = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %vc, <vscale x 8 x i1> splat (i1 true), i32 %evl)
13865  %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %negva, <vscale x 8 x float> %vb, <vscale x 8 x float> %negvc, <vscale x 8 x i1> splat (i1 true), i32 %evl)
13866  ret <vscale x 8 x float> %v
13867}
13868
13869define <vscale x 8 x float> @vfnmadd_vf_nxv8f32_unmasked_commute(<vscale x 8 x float> %va, float %b, <vscale x 8 x float> %vc, i32 zeroext %evl) {
13870; CHECK-LABEL: vfnmadd_vf_nxv8f32_unmasked_commute:
13871; CHECK:       # %bb.0:
13872; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma
13873; CHECK-NEXT:    vfnmadd.vf v8, fa0, v12
13874; CHECK-NEXT:    ret
13875  %elt.head = insertelement <vscale x 8 x float> poison, float %b, i32 0
13876  %vb = shufflevector <vscale x 8 x float> %elt.head, <vscale x 8 x float> poison, <vscale x 8 x i32> zeroinitializer
13877  %negva = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %va, <vscale x 8 x i1> splat (i1 true), i32 %evl)
13878  %negvc = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %vc, <vscale x 8 x i1> splat (i1 true), i32 %evl)
13879  %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %vb, <vscale x 8 x float> %negva, <vscale x 8 x float> %negvc, <vscale x 8 x i1> splat (i1 true), i32 %evl)
13880  ret <vscale x 8 x float> %v
13881}
13882
13883define <vscale x 8 x float> @vfnmadd_vf_nxv8f32_neg_splat(<vscale x 8 x float> %va, float %b, <vscale x 8 x float> %vc, <vscale x 8 x i1> %m, i32 zeroext %evl) {
13884; CHECK-LABEL: vfnmadd_vf_nxv8f32_neg_splat:
13885; CHECK:       # %bb.0:
13886; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma
13887; CHECK-NEXT:    vfnmadd.vf v8, fa0, v12, v0.t
13888; CHECK-NEXT:    ret
13889  %elt.head = insertelement <vscale x 8 x float> poison, float %b, i32 0
13890  %vb = shufflevector <vscale x 8 x float> %elt.head, <vscale x 8 x float> poison, <vscale x 8 x i32> zeroinitializer
13891  %negvb = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %vb, <vscale x 8 x i1> %m, i32 %evl)
13892  %negvc = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %vc, <vscale x 8 x i1> %m, i32 %evl)
13893  %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %va, <vscale x 8 x float> %negvb, <vscale x 8 x float> %negvc, <vscale x 8 x i1> %m, i32 %evl)
13894  ret <vscale x 8 x float> %v
13895}
13896
13897define <vscale x 8 x float> @vfnmadd_vf_nxv8f32_neg_splat_commute(<vscale x 8 x float> %va, float %b, <vscale x 8 x float> %vc, <vscale x 8 x i1> %m, i32 zeroext %evl) {
13898; CHECK-LABEL: vfnmadd_vf_nxv8f32_neg_splat_commute:
13899; CHECK:       # %bb.0:
13900; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma
13901; CHECK-NEXT:    vfnmadd.vf v8, fa0, v12, v0.t
13902; CHECK-NEXT:    ret
13903  %elt.head = insertelement <vscale x 8 x float> poison, float %b, i32 0
13904  %vb = shufflevector <vscale x 8 x float> %elt.head, <vscale x 8 x float> poison, <vscale x 8 x i32> zeroinitializer
13905  %negvb = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %vb, <vscale x 8 x i1> %m, i32 %evl)
13906  %negvc = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %vc, <vscale x 8 x i1> %m, i32 %evl)
13907  %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %negvb, <vscale x 8 x float> %va, <vscale x 8 x float> %negvc, <vscale x 8 x i1> %m, i32 %evl)
13908  ret <vscale x 8 x float> %v
13909}
13910
13911define <vscale x 8 x float> @vfnmadd_vf_nxv8f32_neg_splat_unmasked(<vscale x 8 x float> %va, float %b, <vscale x 8 x float> %vc, i32 zeroext %evl) {
13912; CHECK-LABEL: vfnmadd_vf_nxv8f32_neg_splat_unmasked:
13913; CHECK:       # %bb.0:
13914; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma
13915; CHECK-NEXT:    vfnmadd.vf v8, fa0, v12
13916; CHECK-NEXT:    ret
13917  %elt.head = insertelement <vscale x 8 x float> poison, float %b, i32 0
13918  %vb = shufflevector <vscale x 8 x float> %elt.head, <vscale x 8 x float> poison, <vscale x 8 x i32> zeroinitializer
13919  %negvb = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %vb, <vscale x 8 x i1> splat (i1 true), i32 %evl)
13920  %negvc = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %vc, <vscale x 8 x i1> splat (i1 true), i32 %evl)
13921  %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %va, <vscale x 8 x float> %negvb, <vscale x 8 x float> %negvc, <vscale x 8 x i1> splat (i1 true), i32 %evl)
13922  ret <vscale x 8 x float> %v
13923}
13924
13925define <vscale x 8 x float> @vfnmadd_vf_nxv8f32_neg_splat_unmasked_commute(<vscale x 8 x float> %va, float %b, <vscale x 8 x float> %vc, i32 zeroext %evl) {
13926; CHECK-LABEL: vfnmadd_vf_nxv8f32_neg_splat_unmasked_commute:
13927; CHECK:       # %bb.0:
13928; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma
13929; CHECK-NEXT:    vfnmadd.vf v8, fa0, v12
13930; CHECK-NEXT:    ret
13931  %elt.head = insertelement <vscale x 8 x float> poison, float %b, i32 0
13932  %vb = shufflevector <vscale x 8 x float> %elt.head, <vscale x 8 x float> poison, <vscale x 8 x i32> zeroinitializer
13933  %negvb = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %vb, <vscale x 8 x i1> splat (i1 true), i32 %evl)
13934  %negvc = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %vc, <vscale x 8 x i1> splat (i1 true), i32 %evl)
13935  %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %negvb, <vscale x 8 x float> %va, <vscale x 8 x float> %negvc, <vscale x 8 x i1> splat (i1 true), i32 %evl)
13936  ret <vscale x 8 x float> %v
13937}
13938
13939define <vscale x 8 x float> @vfnmsub_vv_nxv8f32(<vscale x 8 x float> %va, <vscale x 8 x float> %b, <vscale x 8 x float> %c, <vscale x 8 x i1> %m, i32 zeroext %evl) {
13940; CHECK-LABEL: vfnmsub_vv_nxv8f32:
13941; CHECK:       # %bb.0:
13942; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma
13943; CHECK-NEXT:    vfnmadd.vv v12, v8, v16, v0.t
13944; CHECK-NEXT:    vmv.v.v v8, v12
13945; CHECK-NEXT:    ret
13946  %negb = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %b, <vscale x 8 x i1> %m, i32 %evl)
13947  %negc = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %c, <vscale x 8 x i1> %m, i32 %evl)
13948  %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %va, <vscale x 8 x float> %negb, <vscale x 8 x float> %negc, <vscale x 8 x i1> %m, i32 %evl)
13949  ret <vscale x 8 x float> %v
13950}
13951
13952define <vscale x 8 x float> @vfnmsub_vv_nxv8f32_commuted(<vscale x 8 x float> %va, <vscale x 8 x float> %b, <vscale x 8 x float> %c, <vscale x 8 x i1> %m, i32 zeroext %evl) {
13953; CHECK-LABEL: vfnmsub_vv_nxv8f32_commuted:
13954; CHECK:       # %bb.0:
13955; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma
13956; CHECK-NEXT:    vfnmadd.vv v8, v12, v16, v0.t
13957; CHECK-NEXT:    ret
13958  %negb = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %b, <vscale x 8 x i1> %m, i32 %evl)
13959  %negc = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %c, <vscale x 8 x i1> %m, i32 %evl)
13960  %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %negb, <vscale x 8 x float> %va, <vscale x 8 x float> %negc, <vscale x 8 x i1> %m, i32 %evl)
13961  ret <vscale x 8 x float> %v
13962}
13963
13964define <vscale x 8 x float> @vfnmsub_vv_nxv8f32_unmasked(<vscale x 8 x float> %va, <vscale x 8 x float> %b, <vscale x 8 x float> %c, i32 zeroext %evl) {
13965; CHECK-LABEL: vfnmsub_vv_nxv8f32_unmasked:
13966; CHECK:       # %bb.0:
13967; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma
13968; CHECK-NEXT:    vfnmadd.vv v8, v12, v16
13969; CHECK-NEXT:    ret
13970  %negb = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %b, <vscale x 8 x i1> splat (i1 true), i32 %evl)
13971  %negc = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %c, <vscale x 8 x i1> splat (i1 true), i32 %evl)
13972  %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %va, <vscale x 8 x float> %negb, <vscale x 8 x float> %negc, <vscale x 8 x i1> splat (i1 true), i32 %evl)
13973  ret <vscale x 8 x float> %v
13974}
13975
13976define <vscale x 8 x float> @vfnmsub_vv_nxv8f32_unmasked_commuted(<vscale x 8 x float> %va, <vscale x 8 x float> %b, <vscale x 8 x float> %c, i32 zeroext %evl) {
13977; CHECK-LABEL: vfnmsub_vv_nxv8f32_unmasked_commuted:
13978; CHECK:       # %bb.0:
13979; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma
13980; CHECK-NEXT:    vfnmadd.vv v8, v12, v16
13981; CHECK-NEXT:    ret
13982  %negb = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %b, <vscale x 8 x i1> splat (i1 true), i32 %evl)
13983  %negc = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %c, <vscale x 8 x i1> splat (i1 true), i32 %evl)
13984  %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %negb, <vscale x 8 x float> %va, <vscale x 8 x float> %negc, <vscale x 8 x i1> splat (i1 true), i32 %evl)
13985  ret <vscale x 8 x float> %v
13986}
13987
13988define <vscale x 8 x float> @vfnmsub_vf_nxv8f32(<vscale x 8 x float> %va, float %b, <vscale x 8 x float> %vc, <vscale x 8 x i1> %m, i32 zeroext %evl) {
13989; CHECK-LABEL: vfnmsub_vf_nxv8f32:
13990; CHECK:       # %bb.0:
13991; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma
13992; CHECK-NEXT:    vfnmsub.vf v8, fa0, v12, v0.t
13993; CHECK-NEXT:    ret
13994  %elt.head = insertelement <vscale x 8 x float> poison, float %b, i32 0
13995  %vb = shufflevector <vscale x 8 x float> %elt.head, <vscale x 8 x float> poison, <vscale x 8 x i32> zeroinitializer
13996  %negva = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %va, <vscale x 8 x i1> %m, i32 %evl)
13997  %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %negva, <vscale x 8 x float> %vb, <vscale x 8 x float> %vc, <vscale x 8 x i1> %m, i32 %evl)
13998  ret <vscale x 8 x float> %v
13999}
14000
14001define <vscale x 8 x float> @vfnmsub_vf_nxv8f32_commute(<vscale x 8 x float> %va, float %b, <vscale x 8 x float> %vc, <vscale x 8 x i1> %m, i32 zeroext %evl) {
14002; CHECK-LABEL: vfnmsub_vf_nxv8f32_commute:
14003; CHECK:       # %bb.0:
14004; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma
14005; CHECK-NEXT:    vfnmsub.vf v8, fa0, v12, v0.t
14006; CHECK-NEXT:    ret
14007  %elt.head = insertelement <vscale x 8 x float> poison, float %b, i32 0
14008  %vb = shufflevector <vscale x 8 x float> %elt.head, <vscale x 8 x float> poison, <vscale x 8 x i32> zeroinitializer
14009  %negva = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %va, <vscale x 8 x i1> %m, i32 %evl)
14010  %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %vb, <vscale x 8 x float> %negva, <vscale x 8 x float> %vc, <vscale x 8 x i1> %m, i32 %evl)
14011  ret <vscale x 8 x float> %v
14012}
14013
14014define <vscale x 8 x float> @vfnmsub_vf_nxv8f32_unmasked(<vscale x 8 x float> %va, float %b, <vscale x 8 x float> %vc, i32 zeroext %evl) {
14015; CHECK-LABEL: vfnmsub_vf_nxv8f32_unmasked:
14016; CHECK:       # %bb.0:
14017; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma
14018; CHECK-NEXT:    vfnmsub.vf v8, fa0, v12
14019; CHECK-NEXT:    ret
14020  %elt.head = insertelement <vscale x 8 x float> poison, float %b, i32 0
14021  %vb = shufflevector <vscale x 8 x float> %elt.head, <vscale x 8 x float> poison, <vscale x 8 x i32> zeroinitializer
14022  %negva = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %va, <vscale x 8 x i1> splat (i1 true), i32 %evl)
14023  %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %negva, <vscale x 8 x float> %vb, <vscale x 8 x float> %vc, <vscale x 8 x i1> splat (i1 true), i32 %evl)
14024  ret <vscale x 8 x float> %v
14025}
14026
14027define <vscale x 8 x float> @vfnmsub_vf_nxv8f32_unmasked_commute(<vscale x 8 x float> %va, float %b, <vscale x 8 x float> %vc, i32 zeroext %evl) {
14028; CHECK-LABEL: vfnmsub_vf_nxv8f32_unmasked_commute:
14029; CHECK:       # %bb.0:
14030; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma
14031; CHECK-NEXT:    vfnmsub.vf v8, fa0, v12
14032; CHECK-NEXT:    ret
14033  %elt.head = insertelement <vscale x 8 x float> poison, float %b, i32 0
14034  %vb = shufflevector <vscale x 8 x float> %elt.head, <vscale x 8 x float> poison, <vscale x 8 x i32> zeroinitializer
14035  %negva = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %va, <vscale x 8 x i1> splat (i1 true), i32 %evl)
14036  %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %vb, <vscale x 8 x float> %negva, <vscale x 8 x float> %vc, <vscale x 8 x i1> splat (i1 true), i32 %evl)
14037  ret <vscale x 8 x float> %v
14038}
14039
14040define <vscale x 8 x float> @vfnmsub_vf_nxv8f32_neg_splat(<vscale x 8 x float> %va, float %b, <vscale x 8 x float> %vc, <vscale x 8 x i1> %m, i32 zeroext %evl) {
14041; CHECK-LABEL: vfnmsub_vf_nxv8f32_neg_splat:
14042; CHECK:       # %bb.0:
14043; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma
14044; CHECK-NEXT:    vfnmsub.vf v8, fa0, v12, v0.t
14045; CHECK-NEXT:    ret
14046  %elt.head = insertelement <vscale x 8 x float> poison, float %b, i32 0
14047  %vb = shufflevector <vscale x 8 x float> %elt.head, <vscale x 8 x float> poison, <vscale x 8 x i32> zeroinitializer
14048  %negvb = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %vb, <vscale x 8 x i1> %m, i32 %evl)
14049  %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %va, <vscale x 8 x float> %negvb, <vscale x 8 x float> %vc, <vscale x 8 x i1> %m, i32 %evl)
14050  ret <vscale x 8 x float> %v
14051}
14052
14053define <vscale x 8 x float> @vfnmsub_vf_nxv8f32_neg_splat_commute(<vscale x 8 x float> %va, float %b, <vscale x 8 x float> %vc, <vscale x 8 x i1> %m, i32 zeroext %evl) {
14054; CHECK-LABEL: vfnmsub_vf_nxv8f32_neg_splat_commute:
14055; CHECK:       # %bb.0:
14056; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma
14057; CHECK-NEXT:    vfnmsub.vf v8, fa0, v12, v0.t
14058; CHECK-NEXT:    ret
14059  %elt.head = insertelement <vscale x 8 x float> poison, float %b, i32 0
14060  %vb = shufflevector <vscale x 8 x float> %elt.head, <vscale x 8 x float> poison, <vscale x 8 x i32> zeroinitializer
14061  %negvb = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %vb, <vscale x 8 x i1> %m, i32 %evl)
14062  %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %negvb, <vscale x 8 x float> %va, <vscale x 8 x float> %vc, <vscale x 8 x i1> %m, i32 %evl)
14063  ret <vscale x 8 x float> %v
14064}
14065
14066define <vscale x 8 x float> @vfnmsub_vf_nxv8f32_neg_splat_unmasked(<vscale x 8 x float> %va, float %b, <vscale x 8 x float> %vc, i32 zeroext %evl) {
14067; CHECK-LABEL: vfnmsub_vf_nxv8f32_neg_splat_unmasked:
14068; CHECK:       # %bb.0:
14069; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma
14070; CHECK-NEXT:    vfnmsub.vf v8, fa0, v12
14071; CHECK-NEXT:    ret
14072  %elt.head = insertelement <vscale x 8 x float> poison, float %b, i32 0
14073  %vb = shufflevector <vscale x 8 x float> %elt.head, <vscale x 8 x float> poison, <vscale x 8 x i32> zeroinitializer
14074  %negvb = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %vb, <vscale x 8 x i1> splat (i1 true), i32 %evl)
14075  %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %va, <vscale x 8 x float> %negvb, <vscale x 8 x float> %vc, <vscale x 8 x i1> splat (i1 true), i32 %evl)
14076  ret <vscale x 8 x float> %v
14077}
14078
14079define <vscale x 8 x float> @vfnmsub_vf_nxv8f32_neg_splat_unmasked_commute(<vscale x 8 x float> %va, float %b, <vscale x 8 x float> %vc, i32 zeroext %evl) {
14080; CHECK-LABEL: vfnmsub_vf_nxv8f32_neg_splat_unmasked_commute:
14081; CHECK:       # %bb.0:
14082; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma
14083; CHECK-NEXT:    vfnmsub.vf v8, fa0, v12
14084; CHECK-NEXT:    ret
14085  %elt.head = insertelement <vscale x 8 x float> poison, float %b, i32 0
14086  %vb = shufflevector <vscale x 8 x float> %elt.head, <vscale x 8 x float> poison, <vscale x 8 x i32> zeroinitializer
14087  %negvb = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %vb, <vscale x 8 x i1> splat (i1 true), i32 %evl)
14088  %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %negvb, <vscale x 8 x float> %va, <vscale x 8 x float> %vc, <vscale x 8 x i1> splat (i1 true), i32 %evl)
14089  ret <vscale x 8 x float> %v
14090}
14091
14092declare <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float>, <vscale x 16 x i1>, i32)
14093
14094define <vscale x 16 x float> @vfmsub_vv_nxv16f32(<vscale x 16 x float> %va, <vscale x 16 x float> %b, <vscale x 16 x float> %c, <vscale x 16 x i1> %m, i32 zeroext %evl) {
14095; CHECK-LABEL: vfmsub_vv_nxv16f32:
14096; CHECK:       # %bb.0:
14097; CHECK-NEXT:    vl8re32.v v24, (a0)
14098; CHECK-NEXT:    vsetvli zero, a1, e32, m8, ta, ma
14099; CHECK-NEXT:    vfmsub.vv v16, v8, v24, v0.t
14100; CHECK-NEXT:    vmv.v.v v8, v16
14101; CHECK-NEXT:    ret
14102  %negc = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %c, <vscale x 16 x i1> %m, i32 %evl)
14103  %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %va, <vscale x 16 x float> %b, <vscale x 16 x float> %negc, <vscale x 16 x i1> %m, i32 %evl)
14104  ret <vscale x 16 x float> %v
14105}
14106
14107define <vscale x 16 x float> @vfmsub_vv_nxv16f32_unmasked(<vscale x 16 x float> %va, <vscale x 16 x float> %b, <vscale x 16 x float> %c, i32 zeroext %evl) {
14108; CHECK-LABEL: vfmsub_vv_nxv16f32_unmasked:
14109; CHECK:       # %bb.0:
14110; CHECK-NEXT:    vl8re32.v v24, (a0)
14111; CHECK-NEXT:    vsetvli zero, a1, e32, m8, ta, ma
14112; CHECK-NEXT:    vfmsub.vv v8, v16, v24
14113; CHECK-NEXT:    ret
14114  %negc = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %c, <vscale x 16 x i1> splat (i1 true), i32 %evl)
14115  %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %va, <vscale x 16 x float> %b, <vscale x 16 x float> %negc, <vscale x 16 x i1> splat (i1 true), i32 %evl)
14116  ret <vscale x 16 x float> %v
14117}
14118
14119define <vscale x 16 x float> @vfmsub_vf_nxv16f32(<vscale x 16 x float> %va, float %b, <vscale x 16 x float> %vc, <vscale x 16 x i1> %m, i32 zeroext %evl) {
14120; CHECK-LABEL: vfmsub_vf_nxv16f32:
14121; CHECK:       # %bb.0:
14122; CHECK-NEXT:    vsetvli zero, a0, e32, m8, ta, ma
14123; CHECK-NEXT:    vfmsub.vf v8, fa0, v16, v0.t
14124; CHECK-NEXT:    ret
14125  %elt.head = insertelement <vscale x 16 x float> poison, float %b, i32 0
14126  %vb = shufflevector <vscale x 16 x float> %elt.head, <vscale x 16 x float> poison, <vscale x 16 x i32> zeroinitializer
14127  %negvc = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %vc, <vscale x 16 x i1> %m, i32 %evl)
14128  %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %va, <vscale x 16 x float> %vb, <vscale x 16 x float> %negvc, <vscale x 16 x i1> %m, i32 %evl)
14129  ret <vscale x 16 x float> %v
14130}
14131
14132define <vscale x 16 x float> @vfmsub_vf_nxv16f32_commute(<vscale x 16 x float> %va, float %b, <vscale x 16 x float> %vc, <vscale x 16 x i1> %m, i32 zeroext %evl) {
14133; CHECK-LABEL: vfmsub_vf_nxv16f32_commute:
14134; CHECK:       # %bb.0:
14135; CHECK-NEXT:    vsetvli zero, a0, e32, m8, ta, ma
14136; CHECK-NEXT:    vfmsub.vf v8, fa0, v16, v0.t
14137; CHECK-NEXT:    ret
14138  %elt.head = insertelement <vscale x 16 x float> poison, float %b, i32 0
14139  %vb = shufflevector <vscale x 16 x float> %elt.head, <vscale x 16 x float> poison, <vscale x 16 x i32> zeroinitializer
14140  %negvc = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %vc, <vscale x 16 x i1> %m, i32 %evl)
14141  %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %vb, <vscale x 16 x float> %va, <vscale x 16 x float> %negvc, <vscale x 16 x i1> %m, i32 %evl)
14142  ret <vscale x 16 x float> %v
14143}
14144
14145define <vscale x 16 x float> @vfmsub_vf_nxv16f32_unmasked(<vscale x 16 x float> %va, float %b, <vscale x 16 x float> %vc, i32 zeroext %evl) {
14146; CHECK-LABEL: vfmsub_vf_nxv16f32_unmasked:
14147; CHECK:       # %bb.0:
14148; CHECK-NEXT:    vsetvli zero, a0, e32, m8, ta, ma
14149; CHECK-NEXT:    vfmsub.vf v8, fa0, v16
14150; CHECK-NEXT:    ret
14151  %elt.head = insertelement <vscale x 16 x float> poison, float %b, i32 0
14152  %vb = shufflevector <vscale x 16 x float> %elt.head, <vscale x 16 x float> poison, <vscale x 16 x i32> zeroinitializer
14153  %negvc = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %vc, <vscale x 16 x i1> splat (i1 true), i32 %evl)
14154  %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %va, <vscale x 16 x float> %vb, <vscale x 16 x float> %negvc, <vscale x 16 x i1> splat (i1 true), i32 %evl)
14155  ret <vscale x 16 x float> %v
14156}
14157
14158define <vscale x 16 x float> @vfmsub_vf_nxv16f32_unmasked_commute(<vscale x 16 x float> %va, float %b, <vscale x 16 x float> %vc, i32 zeroext %evl) {
14159; CHECK-LABEL: vfmsub_vf_nxv16f32_unmasked_commute:
14160; CHECK:       # %bb.0:
14161; CHECK-NEXT:    vsetvli zero, a0, e32, m8, ta, ma
14162; CHECK-NEXT:    vfmsub.vf v8, fa0, v16
14163; CHECK-NEXT:    ret
14164  %elt.head = insertelement <vscale x 16 x float> poison, float %b, i32 0
14165  %vb = shufflevector <vscale x 16 x float> %elt.head, <vscale x 16 x float> poison, <vscale x 16 x i32> zeroinitializer
14166  %negvc = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %vc, <vscale x 16 x i1> splat (i1 true), i32 %evl)
14167  %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %vb, <vscale x 16 x float> %va, <vscale x 16 x float> %negvc, <vscale x 16 x i1> splat (i1 true), i32 %evl)
14168  ret <vscale x 16 x float> %v
14169}
14170
14171define <vscale x 16 x float> @vfnmadd_vv_nxv16f32(<vscale x 16 x float> %va, <vscale x 16 x float> %b, <vscale x 16 x float> %c, <vscale x 16 x i1> %m, i32 zeroext %evl) {
14172; CHECK-LABEL: vfnmadd_vv_nxv16f32:
14173; CHECK:       # %bb.0:
14174; CHECK-NEXT:    vl8re32.v v24, (a0)
14175; CHECK-NEXT:    vsetvli zero, a1, e32, m8, ta, ma
14176; CHECK-NEXT:    vfnmadd.vv v16, v8, v24, v0.t
14177; CHECK-NEXT:    vmv.v.v v8, v16
14178; CHECK-NEXT:    ret
14179  %negb = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %b, <vscale x 16 x i1> %m, i32 %evl)
14180  %negc = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %c, <vscale x 16 x i1> %m, i32 %evl)
14181  %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %va, <vscale x 16 x float> %negb, <vscale x 16 x float> %negc, <vscale x 16 x i1> %m, i32 %evl)
14182  ret <vscale x 16 x float> %v
14183}
14184
14185define <vscale x 16 x float> @vfnmadd_vv_nxv16f32_commuted(<vscale x 16 x float> %va, <vscale x 16 x float> %b, <vscale x 16 x float> %c, <vscale x 16 x i1> %m, i32 zeroext %evl) {
14186; CHECK-LABEL: vfnmadd_vv_nxv16f32_commuted:
14187; CHECK:       # %bb.0:
14188; CHECK-NEXT:    vl8re32.v v24, (a0)
14189; CHECK-NEXT:    vsetvli zero, a1, e32, m8, ta, ma
14190; CHECK-NEXT:    vfnmadd.vv v8, v16, v24, v0.t
14191; CHECK-NEXT:    ret
14192  %negb = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %b, <vscale x 16 x i1> %m, i32 %evl)
14193  %negc = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %c, <vscale x 16 x i1> %m, i32 %evl)
14194  %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %negb, <vscale x 16 x float> %va, <vscale x 16 x float> %negc, <vscale x 16 x i1> %m, i32 %evl)
14195  ret <vscale x 16 x float> %v
14196}
14197
14198define <vscale x 16 x float> @vfnmadd_vv_nxv16f32_unmasked(<vscale x 16 x float> %va, <vscale x 16 x float> %b, <vscale x 16 x float> %c, i32 zeroext %evl) {
14199; CHECK-LABEL: vfnmadd_vv_nxv16f32_unmasked:
14200; CHECK:       # %bb.0:
14201; CHECK-NEXT:    vl8re32.v v24, (a0)
14202; CHECK-NEXT:    vsetvli zero, a1, e32, m8, ta, ma
14203; CHECK-NEXT:    vfnmadd.vv v8, v16, v24
14204; CHECK-NEXT:    ret
14205  %negb = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %b, <vscale x 16 x i1> splat (i1 true), i32 %evl)
14206  %negc = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %c, <vscale x 16 x i1> splat (i1 true), i32 %evl)
14207  %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %va, <vscale x 16 x float> %negb, <vscale x 16 x float> %negc, <vscale x 16 x i1> splat (i1 true), i32 %evl)
14208  ret <vscale x 16 x float> %v
14209}
14210
14211define <vscale x 16 x float> @vfnmadd_vv_nxv16f32_unmasked_commuted(<vscale x 16 x float> %va, <vscale x 16 x float> %b, <vscale x 16 x float> %c, i32 zeroext %evl) {
14212; CHECK-LABEL: vfnmadd_vv_nxv16f32_unmasked_commuted:
14213; CHECK:       # %bb.0:
14214; CHECK-NEXT:    vl8re32.v v24, (a0)
14215; CHECK-NEXT:    vsetvli zero, a1, e32, m8, ta, ma
14216; CHECK-NEXT:    vfnmadd.vv v8, v16, v24
14217; CHECK-NEXT:    ret
14218  %negb = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %b, <vscale x 16 x i1> splat (i1 true), i32 %evl)
14219  %negc = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %c, <vscale x 16 x i1> splat (i1 true), i32 %evl)
14220  %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %negb, <vscale x 16 x float> %va, <vscale x 16 x float> %negc, <vscale x 16 x i1> splat (i1 true), i32 %evl)
14221  ret <vscale x 16 x float> %v
14222}
14223
14224define <vscale x 16 x float> @vfnmadd_vf_nxv16f32(<vscale x 16 x float> %va, float %b, <vscale x 16 x float> %vc, <vscale x 16 x i1> %m, i32 zeroext %evl) {
14225; CHECK-LABEL: vfnmadd_vf_nxv16f32:
14226; CHECK:       # %bb.0:
14227; CHECK-NEXT:    vsetvli zero, a0, e32, m8, ta, ma
14228; CHECK-NEXT:    vfnmadd.vf v8, fa0, v16, v0.t
14229; CHECK-NEXT:    ret
14230  %elt.head = insertelement <vscale x 16 x float> poison, float %b, i32 0
14231  %vb = shufflevector <vscale x 16 x float> %elt.head, <vscale x 16 x float> poison, <vscale x 16 x i32> zeroinitializer
14232  %negva = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %va, <vscale x 16 x i1> %m, i32 %evl)
14233  %negvc = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %vc, <vscale x 16 x i1> %m, i32 %evl)
14234  %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %negva, <vscale x 16 x float> %vb, <vscale x 16 x float> %negvc, <vscale x 16 x i1> %m, i32 %evl)
14235  ret <vscale x 16 x float> %v
14236}
14237
14238define <vscale x 16 x float> @vfnmadd_vf_nxv16f32_commute(<vscale x 16 x float> %va, float %b, <vscale x 16 x float> %vc, <vscale x 16 x i1> %m, i32 zeroext %evl) {
14239; CHECK-LABEL: vfnmadd_vf_nxv16f32_commute:
14240; CHECK:       # %bb.0:
14241; CHECK-NEXT:    vsetvli zero, a0, e32, m8, ta, ma
14242; CHECK-NEXT:    vfnmadd.vf v8, fa0, v16, v0.t
14243; CHECK-NEXT:    ret
14244  %elt.head = insertelement <vscale x 16 x float> poison, float %b, i32 0
14245  %vb = shufflevector <vscale x 16 x float> %elt.head, <vscale x 16 x float> poison, <vscale x 16 x i32> zeroinitializer
14246  %negva = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %va, <vscale x 16 x i1> %m, i32 %evl)
14247  %negvc = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %vc, <vscale x 16 x i1> %m, i32 %evl)
14248  %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %vb, <vscale x 16 x float> %negva, <vscale x 16 x float> %negvc, <vscale x 16 x i1> %m, i32 %evl)
14249  ret <vscale x 16 x float> %v
14250}
14251
14252define <vscale x 16 x float> @vfnmadd_vf_nxv16f32_unmasked(<vscale x 16 x float> %va, float %b, <vscale x 16 x float> %vc, i32 zeroext %evl) {
14253; CHECK-LABEL: vfnmadd_vf_nxv16f32_unmasked:
14254; CHECK:       # %bb.0:
14255; CHECK-NEXT:    vsetvli zero, a0, e32, m8, ta, ma
14256; CHECK-NEXT:    vfnmadd.vf v8, fa0, v16
14257; CHECK-NEXT:    ret
14258  %elt.head = insertelement <vscale x 16 x float> poison, float %b, i32 0
14259  %vb = shufflevector <vscale x 16 x float> %elt.head, <vscale x 16 x float> poison, <vscale x 16 x i32> zeroinitializer
14260  %negva = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %va, <vscale x 16 x i1> splat (i1 true), i32 %evl)
14261  %negvc = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %vc, <vscale x 16 x i1> splat (i1 true), i32 %evl)
14262  %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %negva, <vscale x 16 x float> %vb, <vscale x 16 x float> %negvc, <vscale x 16 x i1> splat (i1 true), i32 %evl)
14263  ret <vscale x 16 x float> %v
14264}
14265
14266define <vscale x 16 x float> @vfnmadd_vf_nxv16f32_unmasked_commute(<vscale x 16 x float> %va, float %b, <vscale x 16 x float> %vc, i32 zeroext %evl) {
14267; CHECK-LABEL: vfnmadd_vf_nxv16f32_unmasked_commute:
14268; CHECK:       # %bb.0:
14269; CHECK-NEXT:    vsetvli zero, a0, e32, m8, ta, ma
14270; CHECK-NEXT:    vfnmadd.vf v8, fa0, v16
14271; CHECK-NEXT:    ret
14272  %elt.head = insertelement <vscale x 16 x float> poison, float %b, i32 0
14273  %vb = shufflevector <vscale x 16 x float> %elt.head, <vscale x 16 x float> poison, <vscale x 16 x i32> zeroinitializer
14274  %negva = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %va, <vscale x 16 x i1> splat (i1 true), i32 %evl)
14275  %negvc = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %vc, <vscale x 16 x i1> splat (i1 true), i32 %evl)
14276  %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %vb, <vscale x 16 x float> %negva, <vscale x 16 x float> %negvc, <vscale x 16 x i1> splat (i1 true), i32 %evl)
14277  ret <vscale x 16 x float> %v
14278}
14279
14280define <vscale x 16 x float> @vfnmadd_vf_nxv16f32_neg_splat(<vscale x 16 x float> %va, float %b, <vscale x 16 x float> %vc, <vscale x 16 x i1> %m, i32 zeroext %evl) {
14281; CHECK-LABEL: vfnmadd_vf_nxv16f32_neg_splat:
14282; CHECK:       # %bb.0:
14283; CHECK-NEXT:    vsetvli zero, a0, e32, m8, ta, ma
14284; CHECK-NEXT:    vfnmadd.vf v8, fa0, v16, v0.t
14285; CHECK-NEXT:    ret
14286  %elt.head = insertelement <vscale x 16 x float> poison, float %b, i32 0
14287  %vb = shufflevector <vscale x 16 x float> %elt.head, <vscale x 16 x float> poison, <vscale x 16 x i32> zeroinitializer
14288  %negvb = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %vb, <vscale x 16 x i1> %m, i32 %evl)
14289  %negvc = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %vc, <vscale x 16 x i1> %m, i32 %evl)
14290  %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %va, <vscale x 16 x float> %negvb, <vscale x 16 x float> %negvc, <vscale x 16 x i1> %m, i32 %evl)
14291  ret <vscale x 16 x float> %v
14292}
14293
14294define <vscale x 16 x float> @vfnmadd_vf_nxv16f32_neg_splat_commute(<vscale x 16 x float> %va, float %b, <vscale x 16 x float> %vc, <vscale x 16 x i1> %m, i32 zeroext %evl) {
14295; CHECK-LABEL: vfnmadd_vf_nxv16f32_neg_splat_commute:
14296; CHECK:       # %bb.0:
14297; CHECK-NEXT:    vsetvli zero, a0, e32, m8, ta, ma
14298; CHECK-NEXT:    vfnmadd.vf v8, fa0, v16, v0.t
14299; CHECK-NEXT:    ret
14300  %elt.head = insertelement <vscale x 16 x float> poison, float %b, i32 0
14301  %vb = shufflevector <vscale x 16 x float> %elt.head, <vscale x 16 x float> poison, <vscale x 16 x i32> zeroinitializer
14302  %negvb = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %vb, <vscale x 16 x i1> %m, i32 %evl)
14303  %negvc = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %vc, <vscale x 16 x i1> %m, i32 %evl)
14304  %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %negvb, <vscale x 16 x float> %va, <vscale x 16 x float> %negvc, <vscale x 16 x i1> %m, i32 %evl)
14305  ret <vscale x 16 x float> %v
14306}
14307
14308define <vscale x 16 x float> @vfnmadd_vf_nxv16f32_neg_splat_unmasked(<vscale x 16 x float> %va, float %b, <vscale x 16 x float> %vc, i32 zeroext %evl) {
14309; CHECK-LABEL: vfnmadd_vf_nxv16f32_neg_splat_unmasked:
14310; CHECK:       # %bb.0:
14311; CHECK-NEXT:    vsetvli zero, a0, e32, m8, ta, ma
14312; CHECK-NEXT:    vfnmadd.vf v8, fa0, v16
14313; CHECK-NEXT:    ret
14314  %elt.head = insertelement <vscale x 16 x float> poison, float %b, i32 0
14315  %vb = shufflevector <vscale x 16 x float> %elt.head, <vscale x 16 x float> poison, <vscale x 16 x i32> zeroinitializer
14316  %negvb = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %vb, <vscale x 16 x i1> splat (i1 true), i32 %evl)
14317  %negvc = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %vc, <vscale x 16 x i1> splat (i1 true), i32 %evl)
14318  %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %va, <vscale x 16 x float> %negvb, <vscale x 16 x float> %negvc, <vscale x 16 x i1> splat (i1 true), i32 %evl)
14319  ret <vscale x 16 x float> %v
14320}
14321
14322define <vscale x 16 x float> @vfnmadd_vf_nxv16f32_neg_splat_unmasked_commute(<vscale x 16 x float> %va, float %b, <vscale x 16 x float> %vc, i32 zeroext %evl) {
14323; CHECK-LABEL: vfnmadd_vf_nxv16f32_neg_splat_unmasked_commute:
14324; CHECK:       # %bb.0:
14325; CHECK-NEXT:    vsetvli zero, a0, e32, m8, ta, ma
14326; CHECK-NEXT:    vfnmadd.vf v8, fa0, v16
14327; CHECK-NEXT:    ret
14328  %elt.head = insertelement <vscale x 16 x float> poison, float %b, i32 0
14329  %vb = shufflevector <vscale x 16 x float> %elt.head, <vscale x 16 x float> poison, <vscale x 16 x i32> zeroinitializer
14330  %negvb = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %vb, <vscale x 16 x i1> splat (i1 true), i32 %evl)
14331  %negvc = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %vc, <vscale x 16 x i1> splat (i1 true), i32 %evl)
14332  %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %negvb, <vscale x 16 x float> %va, <vscale x 16 x float> %negvc, <vscale x 16 x i1> splat (i1 true), i32 %evl)
14333  ret <vscale x 16 x float> %v
14334}
14335
14336define <vscale x 16 x float> @vfnmsub_vv_nxv16f32(<vscale x 16 x float> %va, <vscale x 16 x float> %b, <vscale x 16 x float> %c, <vscale x 16 x i1> %m, i32 zeroext %evl) {
14337; CHECK-LABEL: vfnmsub_vv_nxv16f32:
14338; CHECK:       # %bb.0:
14339; CHECK-NEXT:    vl8re32.v v24, (a0)
14340; CHECK-NEXT:    vsetvli zero, a1, e32, m8, ta, ma
14341; CHECK-NEXT:    vfnmadd.vv v16, v8, v24, v0.t
14342; CHECK-NEXT:    vmv.v.v v8, v16
14343; CHECK-NEXT:    ret
14344  %negb = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %b, <vscale x 16 x i1> %m, i32 %evl)
14345  %negc = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %c, <vscale x 16 x i1> %m, i32 %evl)
14346  %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %va, <vscale x 16 x float> %negb, <vscale x 16 x float> %negc, <vscale x 16 x i1> %m, i32 %evl)
14347  ret <vscale x 16 x float> %v
14348}
14349
14350define <vscale x 16 x float> @vfnmsub_vv_nxv16f32_commuted(<vscale x 16 x float> %va, <vscale x 16 x float> %b, <vscale x 16 x float> %c, <vscale x 16 x i1> %m, i32 zeroext %evl) {
14351; CHECK-LABEL: vfnmsub_vv_nxv16f32_commuted:
14352; CHECK:       # %bb.0:
14353; CHECK-NEXT:    vl8re32.v v24, (a0)
14354; CHECK-NEXT:    vsetvli zero, a1, e32, m8, ta, ma
14355; CHECK-NEXT:    vfnmadd.vv v8, v16, v24, v0.t
14356; CHECK-NEXT:    ret
14357  %negb = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %b, <vscale x 16 x i1> %m, i32 %evl)
14358  %negc = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %c, <vscale x 16 x i1> %m, i32 %evl)
14359  %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %negb, <vscale x 16 x float> %va, <vscale x 16 x float> %negc, <vscale x 16 x i1> %m, i32 %evl)
14360  ret <vscale x 16 x float> %v
14361}
14362
14363define <vscale x 16 x float> @vfnmsub_vv_nxv16f32_unmasked(<vscale x 16 x float> %va, <vscale x 16 x float> %b, <vscale x 16 x float> %c, i32 zeroext %evl) {
14364; CHECK-LABEL: vfnmsub_vv_nxv16f32_unmasked:
14365; CHECK:       # %bb.0:
14366; CHECK-NEXT:    vl8re32.v v24, (a0)
14367; CHECK-NEXT:    vsetvli zero, a1, e32, m8, ta, ma
14368; CHECK-NEXT:    vfnmadd.vv v8, v16, v24
14369; CHECK-NEXT:    ret
14370  %negb = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %b, <vscale x 16 x i1> splat (i1 true), i32 %evl)
14371  %negc = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %c, <vscale x 16 x i1> splat (i1 true), i32 %evl)
14372  %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %va, <vscale x 16 x float> %negb, <vscale x 16 x float> %negc, <vscale x 16 x i1> splat (i1 true), i32 %evl)
14373  ret <vscale x 16 x float> %v
14374}
14375
14376define <vscale x 16 x float> @vfnmsub_vv_nxv16f32_unmasked_commuted(<vscale x 16 x float> %va, <vscale x 16 x float> %b, <vscale x 16 x float> %c, i32 zeroext %evl) {
14377; CHECK-LABEL: vfnmsub_vv_nxv16f32_unmasked_commuted:
14378; CHECK:       # %bb.0:
14379; CHECK-NEXT:    vl8re32.v v24, (a0)
14380; CHECK-NEXT:    vsetvli zero, a1, e32, m8, ta, ma
14381; CHECK-NEXT:    vfnmadd.vv v8, v16, v24
14382; CHECK-NEXT:    ret
14383  %negb = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %b, <vscale x 16 x i1> splat (i1 true), i32 %evl)
14384  %negc = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %c, <vscale x 16 x i1> splat (i1 true), i32 %evl)
14385  %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %negb, <vscale x 16 x float> %va, <vscale x 16 x float> %negc, <vscale x 16 x i1> splat (i1 true), i32 %evl)
14386  ret <vscale x 16 x float> %v
14387}
14388
14389define <vscale x 16 x float> @vfnmsub_vf_nxv16f32(<vscale x 16 x float> %va, float %b, <vscale x 16 x float> %vc, <vscale x 16 x i1> %m, i32 zeroext %evl) {
14390; CHECK-LABEL: vfnmsub_vf_nxv16f32:
14391; CHECK:       # %bb.0:
14392; CHECK-NEXT:    vsetvli zero, a0, e32, m8, ta, ma
14393; CHECK-NEXT:    vfnmsub.vf v8, fa0, v16, v0.t
14394; CHECK-NEXT:    ret
14395  %elt.head = insertelement <vscale x 16 x float> poison, float %b, i32 0
14396  %vb = shufflevector <vscale x 16 x float> %elt.head, <vscale x 16 x float> poison, <vscale x 16 x i32> zeroinitializer
14397  %negva = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %va, <vscale x 16 x i1> %m, i32 %evl)
14398  %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %negva, <vscale x 16 x float> %vb, <vscale x 16 x float> %vc, <vscale x 16 x i1> %m, i32 %evl)
14399  ret <vscale x 16 x float> %v
14400}
14401
14402define <vscale x 16 x float> @vfnmsub_vf_nxv16f32_commute(<vscale x 16 x float> %va, float %b, <vscale x 16 x float> %vc, <vscale x 16 x i1> %m, i32 zeroext %evl) {
14403; CHECK-LABEL: vfnmsub_vf_nxv16f32_commute:
14404; CHECK:       # %bb.0:
14405; CHECK-NEXT:    vsetvli zero, a0, e32, m8, ta, ma
14406; CHECK-NEXT:    vfnmsub.vf v8, fa0, v16, v0.t
14407; CHECK-NEXT:    ret
14408  %elt.head = insertelement <vscale x 16 x float> poison, float %b, i32 0
14409  %vb = shufflevector <vscale x 16 x float> %elt.head, <vscale x 16 x float> poison, <vscale x 16 x i32> zeroinitializer
14410  %negva = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %va, <vscale x 16 x i1> %m, i32 %evl)
14411  %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %vb, <vscale x 16 x float> %negva, <vscale x 16 x float> %vc, <vscale x 16 x i1> %m, i32 %evl)
14412  ret <vscale x 16 x float> %v
14413}
14414
14415define <vscale x 16 x float> @vfnmsub_vf_nxv16f32_unmasked(<vscale x 16 x float> %va, float %b, <vscale x 16 x float> %vc, i32 zeroext %evl) {
14416; CHECK-LABEL: vfnmsub_vf_nxv16f32_unmasked:
14417; CHECK:       # %bb.0:
14418; CHECK-NEXT:    vsetvli zero, a0, e32, m8, ta, ma
14419; CHECK-NEXT:    vfnmsub.vf v8, fa0, v16
14420; CHECK-NEXT:    ret
14421  %elt.head = insertelement <vscale x 16 x float> poison, float %b, i32 0
14422  %vb = shufflevector <vscale x 16 x float> %elt.head, <vscale x 16 x float> poison, <vscale x 16 x i32> zeroinitializer
14423  %negva = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %va, <vscale x 16 x i1> splat (i1 true), i32 %evl)
14424  %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %negva, <vscale x 16 x float> %vb, <vscale x 16 x float> %vc, <vscale x 16 x i1> splat (i1 true), i32 %evl)
14425  ret <vscale x 16 x float> %v
14426}
14427
14428define <vscale x 16 x float> @vfnmsub_vf_nxv16f32_unmasked_commute(<vscale x 16 x float> %va, float %b, <vscale x 16 x float> %vc, i32 zeroext %evl) {
14429; CHECK-LABEL: vfnmsub_vf_nxv16f32_unmasked_commute:
14430; CHECK:       # %bb.0:
14431; CHECK-NEXT:    vsetvli zero, a0, e32, m8, ta, ma
14432; CHECK-NEXT:    vfnmsub.vf v8, fa0, v16
14433; CHECK-NEXT:    ret
14434  %elt.head = insertelement <vscale x 16 x float> poison, float %b, i32 0
14435  %vb = shufflevector <vscale x 16 x float> %elt.head, <vscale x 16 x float> poison, <vscale x 16 x i32> zeroinitializer
14436  %negva = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %va, <vscale x 16 x i1> splat (i1 true), i32 %evl)
14437  %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %vb, <vscale x 16 x float> %negva, <vscale x 16 x float> %vc, <vscale x 16 x i1> splat (i1 true), i32 %evl)
14438  ret <vscale x 16 x float> %v
14439}
14440
14441define <vscale x 16 x float> @vfnmsub_vf_nxv16f32_neg_splat(<vscale x 16 x float> %va, float %b, <vscale x 16 x float> %vc, <vscale x 16 x i1> %m, i32 zeroext %evl) {
14442; CHECK-LABEL: vfnmsub_vf_nxv16f32_neg_splat:
14443; CHECK:       # %bb.0:
14444; CHECK-NEXT:    vsetvli zero, a0, e32, m8, ta, ma
14445; CHECK-NEXT:    vfnmsub.vf v8, fa0, v16, v0.t
14446; CHECK-NEXT:    ret
14447  %elt.head = insertelement <vscale x 16 x float> poison, float %b, i32 0
14448  %vb = shufflevector <vscale x 16 x float> %elt.head, <vscale x 16 x float> poison, <vscale x 16 x i32> zeroinitializer
14449  %negvb = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %vb, <vscale x 16 x i1> %m, i32 %evl)
14450  %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %va, <vscale x 16 x float> %negvb, <vscale x 16 x float> %vc, <vscale x 16 x i1> %m, i32 %evl)
14451  ret <vscale x 16 x float> %v
14452}
14453
14454define <vscale x 16 x float> @vfnmsub_vf_nxv16f32_neg_splat_commute(<vscale x 16 x float> %va, float %b, <vscale x 16 x float> %vc, <vscale x 16 x i1> %m, i32 zeroext %evl) {
14455; CHECK-LABEL: vfnmsub_vf_nxv16f32_neg_splat_commute:
14456; CHECK:       # %bb.0:
14457; CHECK-NEXT:    vsetvli zero, a0, e32, m8, ta, ma
14458; CHECK-NEXT:    vfnmsub.vf v8, fa0, v16, v0.t
14459; CHECK-NEXT:    ret
14460  %elt.head = insertelement <vscale x 16 x float> poison, float %b, i32 0
14461  %vb = shufflevector <vscale x 16 x float> %elt.head, <vscale x 16 x float> poison, <vscale x 16 x i32> zeroinitializer
14462  %negvb = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %vb, <vscale x 16 x i1> %m, i32 %evl)
14463  %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %negvb, <vscale x 16 x float> %va, <vscale x 16 x float> %vc, <vscale x 16 x i1> %m, i32 %evl)
14464  ret <vscale x 16 x float> %v
14465}
14466
14467define <vscale x 16 x float> @vfnmsub_vf_nxv16f32_neg_splat_unmasked(<vscale x 16 x float> %va, float %b, <vscale x 16 x float> %vc, i32 zeroext %evl) {
14468; CHECK-LABEL: vfnmsub_vf_nxv16f32_neg_splat_unmasked:
14469; CHECK:       # %bb.0:
14470; CHECK-NEXT:    vsetvli zero, a0, e32, m8, ta, ma
14471; CHECK-NEXT:    vfnmsub.vf v8, fa0, v16
14472; CHECK-NEXT:    ret
14473  %elt.head = insertelement <vscale x 16 x float> poison, float %b, i32 0
14474  %vb = shufflevector <vscale x 16 x float> %elt.head, <vscale x 16 x float> poison, <vscale x 16 x i32> zeroinitializer
14475  %negvb = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %vb, <vscale x 16 x i1> splat (i1 true), i32 %evl)
14476  %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %va, <vscale x 16 x float> %negvb, <vscale x 16 x float> %vc, <vscale x 16 x i1> splat (i1 true), i32 %evl)
14477  ret <vscale x 16 x float> %v
14478}
14479
14480define <vscale x 16 x float> @vfnmsub_vf_nxv16f32_neg_splat_unmasked_commute(<vscale x 16 x float> %va, float %b, <vscale x 16 x float> %vc, i32 zeroext %evl) {
14481; CHECK-LABEL: vfnmsub_vf_nxv16f32_neg_splat_unmasked_commute:
14482; CHECK:       # %bb.0:
14483; CHECK-NEXT:    vsetvli zero, a0, e32, m8, ta, ma
14484; CHECK-NEXT:    vfnmsub.vf v8, fa0, v16
14485; CHECK-NEXT:    ret
14486  %elt.head = insertelement <vscale x 16 x float> poison, float %b, i32 0
14487  %vb = shufflevector <vscale x 16 x float> %elt.head, <vscale x 16 x float> poison, <vscale x 16 x i32> zeroinitializer
14488  %negvb = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %vb, <vscale x 16 x i1> splat (i1 true), i32 %evl)
14489  %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %negvb, <vscale x 16 x float> %va, <vscale x 16 x float> %vc, <vscale x 16 x i1> splat (i1 true), i32 %evl)
14490  ret <vscale x 16 x float> %v
14491}
14492
14493declare <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double>, <vscale x 1 x i1>, i32)
14494
14495define <vscale x 1 x double> @vfmsub_vv_nxv1f64(<vscale x 1 x double> %va, <vscale x 1 x double> %b, <vscale x 1 x double> %c, <vscale x 1 x i1> %m, i32 zeroext %evl) {
14496; CHECK-LABEL: vfmsub_vv_nxv1f64:
14497; CHECK:       # %bb.0:
14498; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma
14499; CHECK-NEXT:    vfmsub.vv v9, v8, v10, v0.t
14500; CHECK-NEXT:    vmv.v.v v8, v9
14501; CHECK-NEXT:    ret
14502  %negc = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %c, <vscale x 1 x i1> %m, i32 %evl)
14503  %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %va, <vscale x 1 x double> %b, <vscale x 1 x double> %negc, <vscale x 1 x i1> %m, i32 %evl)
14504  ret <vscale x 1 x double> %v
14505}
14506
14507define <vscale x 1 x double> @vfmsub_vv_nxv1f64_unmasked(<vscale x 1 x double> %va, <vscale x 1 x double> %b, <vscale x 1 x double> %c, i32 zeroext %evl) {
14508; CHECK-LABEL: vfmsub_vv_nxv1f64_unmasked:
14509; CHECK:       # %bb.0:
14510; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma
14511; CHECK-NEXT:    vfmsub.vv v8, v9, v10
14512; CHECK-NEXT:    ret
14513  %negc = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %c, <vscale x 1 x i1> splat (i1 true), i32 %evl)
14514  %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %va, <vscale x 1 x double> %b, <vscale x 1 x double> %negc, <vscale x 1 x i1> splat (i1 true), i32 %evl)
14515  ret <vscale x 1 x double> %v
14516}
14517
14518define <vscale x 1 x double> @vfmsub_vf_nxv1f64(<vscale x 1 x double> %va, double %b, <vscale x 1 x double> %vc, <vscale x 1 x i1> %m, i32 zeroext %evl) {
14519; CHECK-LABEL: vfmsub_vf_nxv1f64:
14520; CHECK:       # %bb.0:
14521; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma
14522; CHECK-NEXT:    vfmsub.vf v8, fa0, v9, v0.t
14523; CHECK-NEXT:    ret
14524  %elt.head = insertelement <vscale x 1 x double> poison, double %b, i32 0
14525  %vb = shufflevector <vscale x 1 x double> %elt.head, <vscale x 1 x double> poison, <vscale x 1 x i32> zeroinitializer
14526  %negvc = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %vc, <vscale x 1 x i1> %m, i32 %evl)
14527  %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %va, <vscale x 1 x double> %vb, <vscale x 1 x double> %negvc, <vscale x 1 x i1> %m, i32 %evl)
14528  ret <vscale x 1 x double> %v
14529}
14530
14531define <vscale x 1 x double> @vfmsub_vf_nxv1f64_commute(<vscale x 1 x double> %va, double %b, <vscale x 1 x double> %vc, <vscale x 1 x i1> %m, i32 zeroext %evl) {
14532; CHECK-LABEL: vfmsub_vf_nxv1f64_commute:
14533; CHECK:       # %bb.0:
14534; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma
14535; CHECK-NEXT:    vfmsub.vf v8, fa0, v9, v0.t
14536; CHECK-NEXT:    ret
14537  %elt.head = insertelement <vscale x 1 x double> poison, double %b, i32 0
14538  %vb = shufflevector <vscale x 1 x double> %elt.head, <vscale x 1 x double> poison, <vscale x 1 x i32> zeroinitializer
14539  %negvc = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %vc, <vscale x 1 x i1> %m, i32 %evl)
14540  %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %vb, <vscale x 1 x double> %va, <vscale x 1 x double> %negvc, <vscale x 1 x i1> %m, i32 %evl)
14541  ret <vscale x 1 x double> %v
14542}
14543
14544define <vscale x 1 x double> @vfmsub_vf_nxv1f64_unmasked(<vscale x 1 x double> %va, double %b, <vscale x 1 x double> %vc, i32 zeroext %evl) {
14545; CHECK-LABEL: vfmsub_vf_nxv1f64_unmasked:
14546; CHECK:       # %bb.0:
14547; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma
14548; CHECK-NEXT:    vfmsub.vf v8, fa0, v9
14549; CHECK-NEXT:    ret
14550  %elt.head = insertelement <vscale x 1 x double> poison, double %b, i32 0
14551  %vb = shufflevector <vscale x 1 x double> %elt.head, <vscale x 1 x double> poison, <vscale x 1 x i32> zeroinitializer
14552  %negvc = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %vc, <vscale x 1 x i1> splat (i1 true), i32 %evl)
14553  %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %va, <vscale x 1 x double> %vb, <vscale x 1 x double> %negvc, <vscale x 1 x i1> splat (i1 true), i32 %evl)
14554  ret <vscale x 1 x double> %v
14555}
14556
14557define <vscale x 1 x double> @vfmsub_vf_nxv1f64_unmasked_commute(<vscale x 1 x double> %va, double %b, <vscale x 1 x double> %vc, i32 zeroext %evl) {
14558; CHECK-LABEL: vfmsub_vf_nxv1f64_unmasked_commute:
14559; CHECK:       # %bb.0:
14560; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma
14561; CHECK-NEXT:    vfmsub.vf v8, fa0, v9
14562; CHECK-NEXT:    ret
14563  %elt.head = insertelement <vscale x 1 x double> poison, double %b, i32 0
14564  %vb = shufflevector <vscale x 1 x double> %elt.head, <vscale x 1 x double> poison, <vscale x 1 x i32> zeroinitializer
14565  %negvc = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %vc, <vscale x 1 x i1> splat (i1 true), i32 %evl)
14566  %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %vb, <vscale x 1 x double> %va, <vscale x 1 x double> %negvc, <vscale x 1 x i1> splat (i1 true), i32 %evl)
14567  ret <vscale x 1 x double> %v
14568}
14569
14570define <vscale x 1 x double> @vfnmadd_vv_nxv1f64(<vscale x 1 x double> %va, <vscale x 1 x double> %b, <vscale x 1 x double> %c, <vscale x 1 x i1> %m, i32 zeroext %evl) {
14571; CHECK-LABEL: vfnmadd_vv_nxv1f64:
14572; CHECK:       # %bb.0:
14573; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma
14574; CHECK-NEXT:    vfnmadd.vv v9, v8, v10, v0.t
14575; CHECK-NEXT:    vmv.v.v v8, v9
14576; CHECK-NEXT:    ret
14577  %negb = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %b, <vscale x 1 x i1> %m, i32 %evl)
14578  %negc = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %c, <vscale x 1 x i1> %m, i32 %evl)
14579  %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %va, <vscale x 1 x double> %negb, <vscale x 1 x double> %negc, <vscale x 1 x i1> %m, i32 %evl)
14580  ret <vscale x 1 x double> %v
14581}
14582
14583define <vscale x 1 x double> @vfnmadd_vv_nxv1f64_commuted(<vscale x 1 x double> %va, <vscale x 1 x double> %b, <vscale x 1 x double> %c, <vscale x 1 x i1> %m, i32 zeroext %evl) {
14584; CHECK-LABEL: vfnmadd_vv_nxv1f64_commuted:
14585; CHECK:       # %bb.0:
14586; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma
14587; CHECK-NEXT:    vfnmadd.vv v8, v9, v10, v0.t
14588; CHECK-NEXT:    ret
14589  %negb = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %b, <vscale x 1 x i1> %m, i32 %evl)
14590  %negc = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %c, <vscale x 1 x i1> %m, i32 %evl)
14591  %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %negb, <vscale x 1 x double> %va, <vscale x 1 x double> %negc, <vscale x 1 x i1> %m, i32 %evl)
14592  ret <vscale x 1 x double> %v
14593}
14594
14595define <vscale x 1 x double> @vfnmadd_vv_nxv1f64_unmasked(<vscale x 1 x double> %va, <vscale x 1 x double> %b, <vscale x 1 x double> %c, i32 zeroext %evl) {
14596; CHECK-LABEL: vfnmadd_vv_nxv1f64_unmasked:
14597; CHECK:       # %bb.0:
14598; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma
14599; CHECK-NEXT:    vfnmadd.vv v8, v9, v10
14600; CHECK-NEXT:    ret
14601  %negb = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %b, <vscale x 1 x i1> splat (i1 true), i32 %evl)
14602  %negc = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %c, <vscale x 1 x i1> splat (i1 true), i32 %evl)
14603  %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %va, <vscale x 1 x double> %negb, <vscale x 1 x double> %negc, <vscale x 1 x i1> splat (i1 true), i32 %evl)
14604  ret <vscale x 1 x double> %v
14605}
14606
14607define <vscale x 1 x double> @vfnmadd_vv_nxv1f64_unmasked_commuted(<vscale x 1 x double> %va, <vscale x 1 x double> %b, <vscale x 1 x double> %c, i32 zeroext %evl) {
14608; CHECK-LABEL: vfnmadd_vv_nxv1f64_unmasked_commuted:
14609; CHECK:       # %bb.0:
14610; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma
14611; CHECK-NEXT:    vfnmadd.vv v8, v9, v10
14612; CHECK-NEXT:    ret
14613  %negb = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %b, <vscale x 1 x i1> splat (i1 true), i32 %evl)
14614  %negc = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %c, <vscale x 1 x i1> splat (i1 true), i32 %evl)
14615  %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %negb, <vscale x 1 x double> %va, <vscale x 1 x double> %negc, <vscale x 1 x i1> splat (i1 true), i32 %evl)
14616  ret <vscale x 1 x double> %v
14617}
14618
14619define <vscale x 1 x double> @vfnmadd_vf_nxv1f64(<vscale x 1 x double> %va, double %b, <vscale x 1 x double> %vc, <vscale x 1 x i1> %m, i32 zeroext %evl) {
14620; CHECK-LABEL: vfnmadd_vf_nxv1f64:
14621; CHECK:       # %bb.0:
14622; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma
14623; CHECK-NEXT:    vfnmadd.vf v8, fa0, v9, v0.t
14624; CHECK-NEXT:    ret
14625  %elt.head = insertelement <vscale x 1 x double> poison, double %b, i32 0
14626  %vb = shufflevector <vscale x 1 x double> %elt.head, <vscale x 1 x double> poison, <vscale x 1 x i32> zeroinitializer
14627  %negva = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %va, <vscale x 1 x i1> %m, i32 %evl)
14628  %negvc = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %vc, <vscale x 1 x i1> %m, i32 %evl)
14629  %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %negva, <vscale x 1 x double> %vb, <vscale x 1 x double> %negvc, <vscale x 1 x i1> %m, i32 %evl)
14630  ret <vscale x 1 x double> %v
14631}
14632
14633define <vscale x 1 x double> @vfnmadd_vf_nxv1f64_commute(<vscale x 1 x double> %va, double %b, <vscale x 1 x double> %vc, <vscale x 1 x i1> %m, i32 zeroext %evl) {
14634; CHECK-LABEL: vfnmadd_vf_nxv1f64_commute:
14635; CHECK:       # %bb.0:
14636; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma
14637; CHECK-NEXT:    vfnmadd.vf v8, fa0, v9, v0.t
14638; CHECK-NEXT:    ret
14639  %elt.head = insertelement <vscale x 1 x double> poison, double %b, i32 0
14640  %vb = shufflevector <vscale x 1 x double> %elt.head, <vscale x 1 x double> poison, <vscale x 1 x i32> zeroinitializer
14641  %negva = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %va, <vscale x 1 x i1> %m, i32 %evl)
14642  %negvc = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %vc, <vscale x 1 x i1> %m, i32 %evl)
14643  %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %vb, <vscale x 1 x double> %negva, <vscale x 1 x double> %negvc, <vscale x 1 x i1> %m, i32 %evl)
14644  ret <vscale x 1 x double> %v
14645}
14646
14647define <vscale x 1 x double> @vfnmadd_vf_nxv1f64_unmasked(<vscale x 1 x double> %va, double %b, <vscale x 1 x double> %vc, i32 zeroext %evl) {
14648; CHECK-LABEL: vfnmadd_vf_nxv1f64_unmasked:
14649; CHECK:       # %bb.0:
14650; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma
14651; CHECK-NEXT:    vfnmadd.vf v8, fa0, v9
14652; CHECK-NEXT:    ret
14653  %elt.head = insertelement <vscale x 1 x double> poison, double %b, i32 0
14654  %vb = shufflevector <vscale x 1 x double> %elt.head, <vscale x 1 x double> poison, <vscale x 1 x i32> zeroinitializer
14655  %negva = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %va, <vscale x 1 x i1> splat (i1 true), i32 %evl)
14656  %negvc = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %vc, <vscale x 1 x i1> splat (i1 true), i32 %evl)
14657  %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %negva, <vscale x 1 x double> %vb, <vscale x 1 x double> %negvc, <vscale x 1 x i1> splat (i1 true), i32 %evl)
14658  ret <vscale x 1 x double> %v
14659}
14660
14661define <vscale x 1 x double> @vfnmadd_vf_nxv1f64_unmasked_commute(<vscale x 1 x double> %va, double %b, <vscale x 1 x double> %vc, i32 zeroext %evl) {
14662; CHECK-LABEL: vfnmadd_vf_nxv1f64_unmasked_commute:
14663; CHECK:       # %bb.0:
14664; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma
14665; CHECK-NEXT:    vfnmadd.vf v8, fa0, v9
14666; CHECK-NEXT:    ret
14667  %elt.head = insertelement <vscale x 1 x double> poison, double %b, i32 0
14668  %vb = shufflevector <vscale x 1 x double> %elt.head, <vscale x 1 x double> poison, <vscale x 1 x i32> zeroinitializer
14669  %negva = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %va, <vscale x 1 x i1> splat (i1 true), i32 %evl)
14670  %negvc = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %vc, <vscale x 1 x i1> splat (i1 true), i32 %evl)
14671  %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %vb, <vscale x 1 x double> %negva, <vscale x 1 x double> %negvc, <vscale x 1 x i1> splat (i1 true), i32 %evl)
14672  ret <vscale x 1 x double> %v
14673}
14674
14675define <vscale x 1 x double> @vfnmadd_vf_nxv1f64_neg_splat(<vscale x 1 x double> %va, double %b, <vscale x 1 x double> %vc, <vscale x 1 x i1> %m, i32 zeroext %evl) {
14676; CHECK-LABEL: vfnmadd_vf_nxv1f64_neg_splat:
14677; CHECK:       # %bb.0:
14678; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma
14679; CHECK-NEXT:    vfnmadd.vf v8, fa0, v9, v0.t
14680; CHECK-NEXT:    ret
14681  %elt.head = insertelement <vscale x 1 x double> poison, double %b, i32 0
14682  %vb = shufflevector <vscale x 1 x double> %elt.head, <vscale x 1 x double> poison, <vscale x 1 x i32> zeroinitializer
14683  %negvb = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %vb, <vscale x 1 x i1> %m, i32 %evl)
14684  %negvc = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %vc, <vscale x 1 x i1> %m, i32 %evl)
14685  %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %va, <vscale x 1 x double> %negvb, <vscale x 1 x double> %negvc, <vscale x 1 x i1> %m, i32 %evl)
14686  ret <vscale x 1 x double> %v
14687}
14688
14689define <vscale x 1 x double> @vfnmadd_vf_nxv1f64_neg_splat_commute(<vscale x 1 x double> %va, double %b, <vscale x 1 x double> %vc, <vscale x 1 x i1> %m, i32 zeroext %evl) {
14690; CHECK-LABEL: vfnmadd_vf_nxv1f64_neg_splat_commute:
14691; CHECK:       # %bb.0:
14692; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma
14693; CHECK-NEXT:    vfnmadd.vf v8, fa0, v9, v0.t
14694; CHECK-NEXT:    ret
14695  %elt.head = insertelement <vscale x 1 x double> poison, double %b, i32 0
14696  %vb = shufflevector <vscale x 1 x double> %elt.head, <vscale x 1 x double> poison, <vscale x 1 x i32> zeroinitializer
14697  %negvb = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %vb, <vscale x 1 x i1> %m, i32 %evl)
14698  %negvc = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %vc, <vscale x 1 x i1> %m, i32 %evl)
14699  %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %negvb, <vscale x 1 x double> %va, <vscale x 1 x double> %negvc, <vscale x 1 x i1> %m, i32 %evl)
14700  ret <vscale x 1 x double> %v
14701}
14702
14703define <vscale x 1 x double> @vfnmadd_vf_nxv1f64_neg_splat_unmasked(<vscale x 1 x double> %va, double %b, <vscale x 1 x double> %vc, i32 zeroext %evl) {
14704; CHECK-LABEL: vfnmadd_vf_nxv1f64_neg_splat_unmasked:
14705; CHECK:       # %bb.0:
14706; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma
14707; CHECK-NEXT:    vfnmadd.vf v8, fa0, v9
14708; CHECK-NEXT:    ret
14709  %elt.head = insertelement <vscale x 1 x double> poison, double %b, i32 0
14710  %vb = shufflevector <vscale x 1 x double> %elt.head, <vscale x 1 x double> poison, <vscale x 1 x i32> zeroinitializer
14711  %negvb = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %vb, <vscale x 1 x i1> splat (i1 true), i32 %evl)
14712  %negvc = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %vc, <vscale x 1 x i1> splat (i1 true), i32 %evl)
14713  %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %va, <vscale x 1 x double> %negvb, <vscale x 1 x double> %negvc, <vscale x 1 x i1> splat (i1 true), i32 %evl)
14714  ret <vscale x 1 x double> %v
14715}
14716
14717define <vscale x 1 x double> @vfnmadd_vf_nxv1f64_neg_splat_unmasked_commute(<vscale x 1 x double> %va, double %b, <vscale x 1 x double> %vc, i32 zeroext %evl) {
14718; CHECK-LABEL: vfnmadd_vf_nxv1f64_neg_splat_unmasked_commute:
14719; CHECK:       # %bb.0:
14720; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma
14721; CHECK-NEXT:    vfnmadd.vf v8, fa0, v9
14722; CHECK-NEXT:    ret
14723  %elt.head = insertelement <vscale x 1 x double> poison, double %b, i32 0
14724  %vb = shufflevector <vscale x 1 x double> %elt.head, <vscale x 1 x double> poison, <vscale x 1 x i32> zeroinitializer
14725  %negvb = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %vb, <vscale x 1 x i1> splat (i1 true), i32 %evl)
14726  %negvc = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %vc, <vscale x 1 x i1> splat (i1 true), i32 %evl)
14727  %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %negvb, <vscale x 1 x double> %va, <vscale x 1 x double> %negvc, <vscale x 1 x i1> splat (i1 true), i32 %evl)
14728  ret <vscale x 1 x double> %v
14729}
14730
14731define <vscale x 1 x double> @vfnmsub_vv_nxv1f64(<vscale x 1 x double> %va, <vscale x 1 x double> %b, <vscale x 1 x double> %c, <vscale x 1 x i1> %m, i32 zeroext %evl) {
14732; CHECK-LABEL: vfnmsub_vv_nxv1f64:
14733; CHECK:       # %bb.0:
14734; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma
14735; CHECK-NEXT:    vfnmadd.vv v9, v8, v10, v0.t
14736; CHECK-NEXT:    vmv.v.v v8, v9
14737; CHECK-NEXT:    ret
14738  %negb = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %b, <vscale x 1 x i1> %m, i32 %evl)
14739  %negc = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %c, <vscale x 1 x i1> %m, i32 %evl)
14740  %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %va, <vscale x 1 x double> %negb, <vscale x 1 x double> %negc, <vscale x 1 x i1> %m, i32 %evl)
14741  ret <vscale x 1 x double> %v
14742}
14743
14744define <vscale x 1 x double> @vfnmsub_vv_nxv1f64_commuted(<vscale x 1 x double> %va, <vscale x 1 x double> %b, <vscale x 1 x double> %c, <vscale x 1 x i1> %m, i32 zeroext %evl) {
14745; CHECK-LABEL: vfnmsub_vv_nxv1f64_commuted:
14746; CHECK:       # %bb.0:
14747; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma
14748; CHECK-NEXT:    vfnmadd.vv v8, v9, v10, v0.t
14749; CHECK-NEXT:    ret
14750  %negb = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %b, <vscale x 1 x i1> %m, i32 %evl)
14751  %negc = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %c, <vscale x 1 x i1> %m, i32 %evl)
14752  %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %negb, <vscale x 1 x double> %va, <vscale x 1 x double> %negc, <vscale x 1 x i1> %m, i32 %evl)
14753  ret <vscale x 1 x double> %v
14754}
14755
14756define <vscale x 1 x double> @vfnmsub_vv_nxv1f64_unmasked(<vscale x 1 x double> %va, <vscale x 1 x double> %b, <vscale x 1 x double> %c, i32 zeroext %evl) {
14757; CHECK-LABEL: vfnmsub_vv_nxv1f64_unmasked:
14758; CHECK:       # %bb.0:
14759; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma
14760; CHECK-NEXT:    vfnmadd.vv v8, v9, v10
14761; CHECK-NEXT:    ret
14762  %negb = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %b, <vscale x 1 x i1> splat (i1 true), i32 %evl)
14763  %negc = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %c, <vscale x 1 x i1> splat (i1 true), i32 %evl)
14764  %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %va, <vscale x 1 x double> %negb, <vscale x 1 x double> %negc, <vscale x 1 x i1> splat (i1 true), i32 %evl)
14765  ret <vscale x 1 x double> %v
14766}
14767
14768define <vscale x 1 x double> @vfnmsub_vv_nxv1f64_unmasked_commuted(<vscale x 1 x double> %va, <vscale x 1 x double> %b, <vscale x 1 x double> %c, i32 zeroext %evl) {
14769; CHECK-LABEL: vfnmsub_vv_nxv1f64_unmasked_commuted:
14770; CHECK:       # %bb.0:
14771; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma
14772; CHECK-NEXT:    vfnmadd.vv v8, v9, v10
14773; CHECK-NEXT:    ret
14774  %negb = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %b, <vscale x 1 x i1> splat (i1 true), i32 %evl)
14775  %negc = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %c, <vscale x 1 x i1> splat (i1 true), i32 %evl)
14776  %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %negb, <vscale x 1 x double> %va, <vscale x 1 x double> %negc, <vscale x 1 x i1> splat (i1 true), i32 %evl)
14777  ret <vscale x 1 x double> %v
14778}
14779
14780define <vscale x 1 x double> @vfnmsub_vf_nxv1f64(<vscale x 1 x double> %va, double %b, <vscale x 1 x double> %vc, <vscale x 1 x i1> %m, i32 zeroext %evl) {
14781; CHECK-LABEL: vfnmsub_vf_nxv1f64:
14782; CHECK:       # %bb.0:
14783; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma
14784; CHECK-NEXT:    vfnmsub.vf v8, fa0, v9, v0.t
14785; CHECK-NEXT:    ret
14786  %elt.head = insertelement <vscale x 1 x double> poison, double %b, i32 0
14787  %vb = shufflevector <vscale x 1 x double> %elt.head, <vscale x 1 x double> poison, <vscale x 1 x i32> zeroinitializer
14788  %negva = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %va, <vscale x 1 x i1> %m, i32 %evl)
14789  %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %negva, <vscale x 1 x double> %vb, <vscale x 1 x double> %vc, <vscale x 1 x i1> %m, i32 %evl)
14790  ret <vscale x 1 x double> %v
14791}
14792
14793define <vscale x 1 x double> @vfnmsub_vf_nxv1f64_commute(<vscale x 1 x double> %va, double %b, <vscale x 1 x double> %vc, <vscale x 1 x i1> %m, i32 zeroext %evl) {
14794; CHECK-LABEL: vfnmsub_vf_nxv1f64_commute:
14795; CHECK:       # %bb.0:
14796; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma
14797; CHECK-NEXT:    vfnmsub.vf v8, fa0, v9, v0.t
14798; CHECK-NEXT:    ret
14799  %elt.head = insertelement <vscale x 1 x double> poison, double %b, i32 0
14800  %vb = shufflevector <vscale x 1 x double> %elt.head, <vscale x 1 x double> poison, <vscale x 1 x i32> zeroinitializer
14801  %negva = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %va, <vscale x 1 x i1> %m, i32 %evl)
14802  %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %vb, <vscale x 1 x double> %negva, <vscale x 1 x double> %vc, <vscale x 1 x i1> %m, i32 %evl)
14803  ret <vscale x 1 x double> %v
14804}
14805
14806define <vscale x 1 x double> @vfnmsub_vf_nxv1f64_unmasked(<vscale x 1 x double> %va, double %b, <vscale x 1 x double> %vc, i32 zeroext %evl) {
14807; CHECK-LABEL: vfnmsub_vf_nxv1f64_unmasked:
14808; CHECK:       # %bb.0:
14809; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma
14810; CHECK-NEXT:    vfnmsub.vf v8, fa0, v9
14811; CHECK-NEXT:    ret
14812  %elt.head = insertelement <vscale x 1 x double> poison, double %b, i32 0
14813  %vb = shufflevector <vscale x 1 x double> %elt.head, <vscale x 1 x double> poison, <vscale x 1 x i32> zeroinitializer
14814  %negva = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %va, <vscale x 1 x i1> splat (i1 true), i32 %evl)
14815  %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %negva, <vscale x 1 x double> %vb, <vscale x 1 x double> %vc, <vscale x 1 x i1> splat (i1 true), i32 %evl)
14816  ret <vscale x 1 x double> %v
14817}
14818
14819define <vscale x 1 x double> @vfnmsub_vf_nxv1f64_unmasked_commute(<vscale x 1 x double> %va, double %b, <vscale x 1 x double> %vc, i32 zeroext %evl) {
14820; CHECK-LABEL: vfnmsub_vf_nxv1f64_unmasked_commute:
14821; CHECK:       # %bb.0:
14822; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma
14823; CHECK-NEXT:    vfnmsub.vf v8, fa0, v9
14824; CHECK-NEXT:    ret
14825  %elt.head = insertelement <vscale x 1 x double> poison, double %b, i32 0
14826  %vb = shufflevector <vscale x 1 x double> %elt.head, <vscale x 1 x double> poison, <vscale x 1 x i32> zeroinitializer
14827  %negva = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %va, <vscale x 1 x i1> splat (i1 true), i32 %evl)
14828  %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %vb, <vscale x 1 x double> %negva, <vscale x 1 x double> %vc, <vscale x 1 x i1> splat (i1 true), i32 %evl)
14829  ret <vscale x 1 x double> %v
14830}
14831
14832define <vscale x 1 x double> @vfnmsub_vf_nxv1f64_neg_splat(<vscale x 1 x double> %va, double %b, <vscale x 1 x double> %vc, <vscale x 1 x i1> %m, i32 zeroext %evl) {
14833; CHECK-LABEL: vfnmsub_vf_nxv1f64_neg_splat:
14834; CHECK:       # %bb.0:
14835; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma
14836; CHECK-NEXT:    vfnmsub.vf v8, fa0, v9, v0.t
14837; CHECK-NEXT:    ret
14838  %elt.head = insertelement <vscale x 1 x double> poison, double %b, i32 0
14839  %vb = shufflevector <vscale x 1 x double> %elt.head, <vscale x 1 x double> poison, <vscale x 1 x i32> zeroinitializer
14840  %negvb = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %vb, <vscale x 1 x i1> %m, i32 %evl)
14841  %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %va, <vscale x 1 x double> %negvb, <vscale x 1 x double> %vc, <vscale x 1 x i1> %m, i32 %evl)
14842  ret <vscale x 1 x double> %v
14843}
14844
14845define <vscale x 1 x double> @vfnmsub_vf_nxv1f64_neg_splat_commute(<vscale x 1 x double> %va, double %b, <vscale x 1 x double> %vc, <vscale x 1 x i1> %m, i32 zeroext %evl) {
14846; CHECK-LABEL: vfnmsub_vf_nxv1f64_neg_splat_commute:
14847; CHECK:       # %bb.0:
14848; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma
14849; CHECK-NEXT:    vfnmsub.vf v8, fa0, v9, v0.t
14850; CHECK-NEXT:    ret
14851  %elt.head = insertelement <vscale x 1 x double> poison, double %b, i32 0
14852  %vb = shufflevector <vscale x 1 x double> %elt.head, <vscale x 1 x double> poison, <vscale x 1 x i32> zeroinitializer
14853  %negvb = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %vb, <vscale x 1 x i1> %m, i32 %evl)
14854  %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %negvb, <vscale x 1 x double> %va, <vscale x 1 x double> %vc, <vscale x 1 x i1> %m, i32 %evl)
14855  ret <vscale x 1 x double> %v
14856}
14857
14858define <vscale x 1 x double> @vfnmsub_vf_nxv1f64_neg_splat_unmasked(<vscale x 1 x double> %va, double %b, <vscale x 1 x double> %vc, i32 zeroext %evl) {
14859; CHECK-LABEL: vfnmsub_vf_nxv1f64_neg_splat_unmasked:
14860; CHECK:       # %bb.0:
14861; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma
14862; CHECK-NEXT:    vfnmsub.vf v8, fa0, v9
14863; CHECK-NEXT:    ret
14864  %elt.head = insertelement <vscale x 1 x double> poison, double %b, i32 0
14865  %vb = shufflevector <vscale x 1 x double> %elt.head, <vscale x 1 x double> poison, <vscale x 1 x i32> zeroinitializer
14866  %negvb = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %vb, <vscale x 1 x i1> splat (i1 true), i32 %evl)
14867  %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %va, <vscale x 1 x double> %negvb, <vscale x 1 x double> %vc, <vscale x 1 x i1> splat (i1 true), i32 %evl)
14868  ret <vscale x 1 x double> %v
14869}
14870
14871define <vscale x 1 x double> @vfnmsub_vf_nxv1f64_neg_splat_unmasked_commute(<vscale x 1 x double> %va, double %b, <vscale x 1 x double> %vc, i32 zeroext %evl) {
14872; CHECK-LABEL: vfnmsub_vf_nxv1f64_neg_splat_unmasked_commute:
14873; CHECK:       # %bb.0:
14874; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma
14875; CHECK-NEXT:    vfnmsub.vf v8, fa0, v9
14876; CHECK-NEXT:    ret
14877  %elt.head = insertelement <vscale x 1 x double> poison, double %b, i32 0
14878  %vb = shufflevector <vscale x 1 x double> %elt.head, <vscale x 1 x double> poison, <vscale x 1 x i32> zeroinitializer
14879  %negvb = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %vb, <vscale x 1 x i1> splat (i1 true), i32 %evl)
14880  %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %negvb, <vscale x 1 x double> %va, <vscale x 1 x double> %vc, <vscale x 1 x i1> splat (i1 true), i32 %evl)
14881  ret <vscale x 1 x double> %v
14882}
14883
14884declare <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double>, <vscale x 2 x i1>, i32)
14885
14886define <vscale x 2 x double> @vfmsub_vv_nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x double> %b, <vscale x 2 x double> %c, <vscale x 2 x i1> %m, i32 zeroext %evl) {
14887; CHECK-LABEL: vfmsub_vv_nxv2f64:
14888; CHECK:       # %bb.0:
14889; CHECK-NEXT:    vsetvli zero, a0, e64, m2, ta, ma
14890; CHECK-NEXT:    vfmsub.vv v10, v8, v12, v0.t
14891; CHECK-NEXT:    vmv.v.v v8, v10
14892; CHECK-NEXT:    ret
14893  %negc = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %c, <vscale x 2 x i1> %m, i32 %evl)
14894  %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x double> %b, <vscale x 2 x double> %negc, <vscale x 2 x i1> %m, i32 %evl)
14895  ret <vscale x 2 x double> %v
14896}
14897
14898define <vscale x 2 x double> @vfmsub_vv_nxv2f64_unmasked(<vscale x 2 x double> %va, <vscale x 2 x double> %b, <vscale x 2 x double> %c, i32 zeroext %evl) {
14899; CHECK-LABEL: vfmsub_vv_nxv2f64_unmasked:
14900; CHECK:       # %bb.0:
14901; CHECK-NEXT:    vsetvli zero, a0, e64, m2, ta, ma
14902; CHECK-NEXT:    vfmsub.vv v8, v10, v12
14903; CHECK-NEXT:    ret
14904  %negc = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %c, <vscale x 2 x i1> splat (i1 true), i32 %evl)
14905  %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x double> %b, <vscale x 2 x double> %negc, <vscale x 2 x i1> splat (i1 true), i32 %evl)
14906  ret <vscale x 2 x double> %v
14907}
14908
14909define <vscale x 2 x double> @vfmsub_vf_nxv2f64(<vscale x 2 x double> %va, double %b, <vscale x 2 x double> %vc, <vscale x 2 x i1> %m, i32 zeroext %evl) {
14910; CHECK-LABEL: vfmsub_vf_nxv2f64:
14911; CHECK:       # %bb.0:
14912; CHECK-NEXT:    vsetvli zero, a0, e64, m2, ta, ma
14913; CHECK-NEXT:    vfmsub.vf v8, fa0, v10, v0.t
14914; CHECK-NEXT:    ret
14915  %elt.head = insertelement <vscale x 2 x double> poison, double %b, i32 0
14916  %vb = shufflevector <vscale x 2 x double> %elt.head, <vscale x 2 x double> poison, <vscale x 2 x i32> zeroinitializer
14917  %negvc = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %vc, <vscale x 2 x i1> %m, i32 %evl)
14918  %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x double> %vb, <vscale x 2 x double> %negvc, <vscale x 2 x i1> %m, i32 %evl)
14919  ret <vscale x 2 x double> %v
14920}
14921
14922define <vscale x 2 x double> @vfmsub_vf_nxv2f64_commute(<vscale x 2 x double> %va, double %b, <vscale x 2 x double> %vc, <vscale x 2 x i1> %m, i32 zeroext %evl) {
14923; CHECK-LABEL: vfmsub_vf_nxv2f64_commute:
14924; CHECK:       # %bb.0:
14925; CHECK-NEXT:    vsetvli zero, a0, e64, m2, ta, ma
14926; CHECK-NEXT:    vfmsub.vf v8, fa0, v10, v0.t
14927; CHECK-NEXT:    ret
14928  %elt.head = insertelement <vscale x 2 x double> poison, double %b, i32 0
14929  %vb = shufflevector <vscale x 2 x double> %elt.head, <vscale x 2 x double> poison, <vscale x 2 x i32> zeroinitializer
14930  %negvc = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %vc, <vscale x 2 x i1> %m, i32 %evl)
14931  %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %vb, <vscale x 2 x double> %va, <vscale x 2 x double> %negvc, <vscale x 2 x i1> %m, i32 %evl)
14932  ret <vscale x 2 x double> %v
14933}
14934
14935define <vscale x 2 x double> @vfmsub_vf_nxv2f64_unmasked(<vscale x 2 x double> %va, double %b, <vscale x 2 x double> %vc, i32 zeroext %evl) {
14936; CHECK-LABEL: vfmsub_vf_nxv2f64_unmasked:
14937; CHECK:       # %bb.0:
14938; CHECK-NEXT:    vsetvli zero, a0, e64, m2, ta, ma
14939; CHECK-NEXT:    vfmsub.vf v8, fa0, v10
14940; CHECK-NEXT:    ret
14941  %elt.head = insertelement <vscale x 2 x double> poison, double %b, i32 0
14942  %vb = shufflevector <vscale x 2 x double> %elt.head, <vscale x 2 x double> poison, <vscale x 2 x i32> zeroinitializer
14943  %negvc = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %vc, <vscale x 2 x i1> splat (i1 true), i32 %evl)
14944  %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x double> %vb, <vscale x 2 x double> %negvc, <vscale x 2 x i1> splat (i1 true), i32 %evl)
14945  ret <vscale x 2 x double> %v
14946}
14947
14948define <vscale x 2 x double> @vfmsub_vf_nxv2f64_unmasked_commute(<vscale x 2 x double> %va, double %b, <vscale x 2 x double> %vc, i32 zeroext %evl) {
14949; CHECK-LABEL: vfmsub_vf_nxv2f64_unmasked_commute:
14950; CHECK:       # %bb.0:
14951; CHECK-NEXT:    vsetvli zero, a0, e64, m2, ta, ma
14952; CHECK-NEXT:    vfmsub.vf v8, fa0, v10
14953; CHECK-NEXT:    ret
14954  %elt.head = insertelement <vscale x 2 x double> poison, double %b, i32 0
14955  %vb = shufflevector <vscale x 2 x double> %elt.head, <vscale x 2 x double> poison, <vscale x 2 x i32> zeroinitializer
14956  %negvc = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %vc, <vscale x 2 x i1> splat (i1 true), i32 %evl)
14957  %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %vb, <vscale x 2 x double> %va, <vscale x 2 x double> %negvc, <vscale x 2 x i1> splat (i1 true), i32 %evl)
14958  ret <vscale x 2 x double> %v
14959}
14960
14961define <vscale x 2 x double> @vfnmadd_vv_nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x double> %b, <vscale x 2 x double> %c, <vscale x 2 x i1> %m, i32 zeroext %evl) {
14962; CHECK-LABEL: vfnmadd_vv_nxv2f64:
14963; CHECK:       # %bb.0:
14964; CHECK-NEXT:    vsetvli zero, a0, e64, m2, ta, ma
14965; CHECK-NEXT:    vfnmadd.vv v10, v8, v12, v0.t
14966; CHECK-NEXT:    vmv.v.v v8, v10
14967; CHECK-NEXT:    ret
14968  %negb = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %b, <vscale x 2 x i1> %m, i32 %evl)
14969  %negc = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %c, <vscale x 2 x i1> %m, i32 %evl)
14970  %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x double> %negb, <vscale x 2 x double> %negc, <vscale x 2 x i1> %m, i32 %evl)
14971  ret <vscale x 2 x double> %v
14972}
14973
14974define <vscale x 2 x double> @vfnmadd_vv_nxv2f64_commuted(<vscale x 2 x double> %va, <vscale x 2 x double> %b, <vscale x 2 x double> %c, <vscale x 2 x i1> %m, i32 zeroext %evl) {
14975; CHECK-LABEL: vfnmadd_vv_nxv2f64_commuted:
14976; CHECK:       # %bb.0:
14977; CHECK-NEXT:    vsetvli zero, a0, e64, m2, ta, ma
14978; CHECK-NEXT:    vfnmadd.vv v8, v10, v12, v0.t
14979; CHECK-NEXT:    ret
14980  %negb = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %b, <vscale x 2 x i1> %m, i32 %evl)
14981  %negc = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %c, <vscale x 2 x i1> %m, i32 %evl)
14982  %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %negb, <vscale x 2 x double> %va, <vscale x 2 x double> %negc, <vscale x 2 x i1> %m, i32 %evl)
14983  ret <vscale x 2 x double> %v
14984}
14985
14986define <vscale x 2 x double> @vfnmadd_vv_nxv2f64_unmasked(<vscale x 2 x double> %va, <vscale x 2 x double> %b, <vscale x 2 x double> %c, i32 zeroext %evl) {
14987; CHECK-LABEL: vfnmadd_vv_nxv2f64_unmasked:
14988; CHECK:       # %bb.0:
14989; CHECK-NEXT:    vsetvli zero, a0, e64, m2, ta, ma
14990; CHECK-NEXT:    vfnmadd.vv v8, v10, v12
14991; CHECK-NEXT:    ret
14992  %negb = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %b, <vscale x 2 x i1> splat (i1 true), i32 %evl)
14993  %negc = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %c, <vscale x 2 x i1> splat (i1 true), i32 %evl)
14994  %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x double> %negb, <vscale x 2 x double> %negc, <vscale x 2 x i1> splat (i1 true), i32 %evl)
14995  ret <vscale x 2 x double> %v
14996}
14997
14998define <vscale x 2 x double> @vfnmadd_vv_nxv2f64_unmasked_commuted(<vscale x 2 x double> %va, <vscale x 2 x double> %b, <vscale x 2 x double> %c, i32 zeroext %evl) {
14999; CHECK-LABEL: vfnmadd_vv_nxv2f64_unmasked_commuted:
15000; CHECK:       # %bb.0:
15001; CHECK-NEXT:    vsetvli zero, a0, e64, m2, ta, ma
15002; CHECK-NEXT:    vfnmadd.vv v8, v10, v12
15003; CHECK-NEXT:    ret
15004  %negb = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %b, <vscale x 2 x i1> splat (i1 true), i32 %evl)
15005  %negc = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %c, <vscale x 2 x i1> splat (i1 true), i32 %evl)
15006  %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %negb, <vscale x 2 x double> %va, <vscale x 2 x double> %negc, <vscale x 2 x i1> splat (i1 true), i32 %evl)
15007  ret <vscale x 2 x double> %v
15008}
15009
15010define <vscale x 2 x double> @vfnmadd_vf_nxv2f64(<vscale x 2 x double> %va, double %b, <vscale x 2 x double> %vc, <vscale x 2 x i1> %m, i32 zeroext %evl) {
15011; CHECK-LABEL: vfnmadd_vf_nxv2f64:
15012; CHECK:       # %bb.0:
15013; CHECK-NEXT:    vsetvli zero, a0, e64, m2, ta, ma
15014; CHECK-NEXT:    vfnmadd.vf v8, fa0, v10, v0.t
15015; CHECK-NEXT:    ret
15016  %elt.head = insertelement <vscale x 2 x double> poison, double %b, i32 0
15017  %vb = shufflevector <vscale x 2 x double> %elt.head, <vscale x 2 x double> poison, <vscale x 2 x i32> zeroinitializer
15018  %negva = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x i1> %m, i32 %evl)
15019  %negvc = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %vc, <vscale x 2 x i1> %m, i32 %evl)
15020  %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %negva, <vscale x 2 x double> %vb, <vscale x 2 x double> %negvc, <vscale x 2 x i1> %m, i32 %evl)
15021  ret <vscale x 2 x double> %v
15022}
15023
15024define <vscale x 2 x double> @vfnmadd_vf_nxv2f64_commute(<vscale x 2 x double> %va, double %b, <vscale x 2 x double> %vc, <vscale x 2 x i1> %m, i32 zeroext %evl) {
15025; CHECK-LABEL: vfnmadd_vf_nxv2f64_commute:
15026; CHECK:       # %bb.0:
15027; CHECK-NEXT:    vsetvli zero, a0, e64, m2, ta, ma
15028; CHECK-NEXT:    vfnmadd.vf v8, fa0, v10, v0.t
15029; CHECK-NEXT:    ret
15030  %elt.head = insertelement <vscale x 2 x double> poison, double %b, i32 0
15031  %vb = shufflevector <vscale x 2 x double> %elt.head, <vscale x 2 x double> poison, <vscale x 2 x i32> zeroinitializer
15032  %negva = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x i1> %m, i32 %evl)
15033  %negvc = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %vc, <vscale x 2 x i1> %m, i32 %evl)
15034  %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %vb, <vscale x 2 x double> %negva, <vscale x 2 x double> %negvc, <vscale x 2 x i1> %m, i32 %evl)
15035  ret <vscale x 2 x double> %v
15036}
15037
15038define <vscale x 2 x double> @vfnmadd_vf_nxv2f64_unmasked(<vscale x 2 x double> %va, double %b, <vscale x 2 x double> %vc, i32 zeroext %evl) {
15039; CHECK-LABEL: vfnmadd_vf_nxv2f64_unmasked:
15040; CHECK:       # %bb.0:
15041; CHECK-NEXT:    vsetvli zero, a0, e64, m2, ta, ma
15042; CHECK-NEXT:    vfnmadd.vf v8, fa0, v10
15043; CHECK-NEXT:    ret
15044  %elt.head = insertelement <vscale x 2 x double> poison, double %b, i32 0
15045  %vb = shufflevector <vscale x 2 x double> %elt.head, <vscale x 2 x double> poison, <vscale x 2 x i32> zeroinitializer
15046  %negva = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x i1> splat (i1 true), i32 %evl)
15047  %negvc = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %vc, <vscale x 2 x i1> splat (i1 true), i32 %evl)
15048  %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %negva, <vscale x 2 x double> %vb, <vscale x 2 x double> %negvc, <vscale x 2 x i1> splat (i1 true), i32 %evl)
15049  ret <vscale x 2 x double> %v
15050}
15051
15052define <vscale x 2 x double> @vfnmadd_vf_nxv2f64_unmasked_commute(<vscale x 2 x double> %va, double %b, <vscale x 2 x double> %vc, i32 zeroext %evl) {
15053; CHECK-LABEL: vfnmadd_vf_nxv2f64_unmasked_commute:
15054; CHECK:       # %bb.0:
15055; CHECK-NEXT:    vsetvli zero, a0, e64, m2, ta, ma
15056; CHECK-NEXT:    vfnmadd.vf v8, fa0, v10
15057; CHECK-NEXT:    ret
15058  %elt.head = insertelement <vscale x 2 x double> poison, double %b, i32 0
15059  %vb = shufflevector <vscale x 2 x double> %elt.head, <vscale x 2 x double> poison, <vscale x 2 x i32> zeroinitializer
15060  %negva = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x i1> splat (i1 true), i32 %evl)
15061  %negvc = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %vc, <vscale x 2 x i1> splat (i1 true), i32 %evl)
15062  %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %vb, <vscale x 2 x double> %negva, <vscale x 2 x double> %negvc, <vscale x 2 x i1> splat (i1 true), i32 %evl)
15063  ret <vscale x 2 x double> %v
15064}
15065
15066define <vscale x 2 x double> @vfnmadd_vf_nxv2f64_neg_splat(<vscale x 2 x double> %va, double %b, <vscale x 2 x double> %vc, <vscale x 2 x i1> %m, i32 zeroext %evl) {
15067; CHECK-LABEL: vfnmadd_vf_nxv2f64_neg_splat:
15068; CHECK:       # %bb.0:
15069; CHECK-NEXT:    vsetvli zero, a0, e64, m2, ta, ma
15070; CHECK-NEXT:    vfnmadd.vf v8, fa0, v10, v0.t
15071; CHECK-NEXT:    ret
15072  %elt.head = insertelement <vscale x 2 x double> poison, double %b, i32 0
15073  %vb = shufflevector <vscale x 2 x double> %elt.head, <vscale x 2 x double> poison, <vscale x 2 x i32> zeroinitializer
15074  %negvb = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %vb, <vscale x 2 x i1> %m, i32 %evl)
15075  %negvc = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %vc, <vscale x 2 x i1> %m, i32 %evl)
15076  %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x double> %negvb, <vscale x 2 x double> %negvc, <vscale x 2 x i1> %m, i32 %evl)
15077  ret <vscale x 2 x double> %v
15078}
15079
15080define <vscale x 2 x double> @vfnmadd_vf_nxv2f64_neg_splat_commute(<vscale x 2 x double> %va, double %b, <vscale x 2 x double> %vc, <vscale x 2 x i1> %m, i32 zeroext %evl) {
15081; CHECK-LABEL: vfnmadd_vf_nxv2f64_neg_splat_commute:
15082; CHECK:       # %bb.0:
15083; CHECK-NEXT:    vsetvli zero, a0, e64, m2, ta, ma
15084; CHECK-NEXT:    vfnmadd.vf v8, fa0, v10, v0.t
15085; CHECK-NEXT:    ret
15086  %elt.head = insertelement <vscale x 2 x double> poison, double %b, i32 0
15087  %vb = shufflevector <vscale x 2 x double> %elt.head, <vscale x 2 x double> poison, <vscale x 2 x i32> zeroinitializer
15088  %negvb = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %vb, <vscale x 2 x i1> %m, i32 %evl)
15089  %negvc = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %vc, <vscale x 2 x i1> %m, i32 %evl)
15090  %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %negvb, <vscale x 2 x double> %va, <vscale x 2 x double> %negvc, <vscale x 2 x i1> %m, i32 %evl)
15091  ret <vscale x 2 x double> %v
15092}
15093
15094define <vscale x 2 x double> @vfnmadd_vf_nxv2f64_neg_splat_unmasked(<vscale x 2 x double> %va, double %b, <vscale x 2 x double> %vc, i32 zeroext %evl) {
15095; CHECK-LABEL: vfnmadd_vf_nxv2f64_neg_splat_unmasked:
15096; CHECK:       # %bb.0:
15097; CHECK-NEXT:    vsetvli zero, a0, e64, m2, ta, ma
15098; CHECK-NEXT:    vfnmadd.vf v8, fa0, v10
15099; CHECK-NEXT:    ret
15100  %elt.head = insertelement <vscale x 2 x double> poison, double %b, i32 0
15101  %vb = shufflevector <vscale x 2 x double> %elt.head, <vscale x 2 x double> poison, <vscale x 2 x i32> zeroinitializer
15102  %negvb = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %vb, <vscale x 2 x i1> splat (i1 true), i32 %evl)
15103  %negvc = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %vc, <vscale x 2 x i1> splat (i1 true), i32 %evl)
15104  %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x double> %negvb, <vscale x 2 x double> %negvc, <vscale x 2 x i1> splat (i1 true), i32 %evl)
15105  ret <vscale x 2 x double> %v
15106}
15107
15108define <vscale x 2 x double> @vfnmadd_vf_nxv2f64_neg_splat_unmasked_commute(<vscale x 2 x double> %va, double %b, <vscale x 2 x double> %vc, i32 zeroext %evl) {
15109; CHECK-LABEL: vfnmadd_vf_nxv2f64_neg_splat_unmasked_commute:
15110; CHECK:       # %bb.0:
15111; CHECK-NEXT:    vsetvli zero, a0, e64, m2, ta, ma
15112; CHECK-NEXT:    vfnmadd.vf v8, fa0, v10
15113; CHECK-NEXT:    ret
15114  %elt.head = insertelement <vscale x 2 x double> poison, double %b, i32 0
15115  %vb = shufflevector <vscale x 2 x double> %elt.head, <vscale x 2 x double> poison, <vscale x 2 x i32> zeroinitializer
15116  %negvb = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %vb, <vscale x 2 x i1> splat (i1 true), i32 %evl)
15117  %negvc = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %vc, <vscale x 2 x i1> splat (i1 true), i32 %evl)
15118  %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %negvb, <vscale x 2 x double> %va, <vscale x 2 x double> %negvc, <vscale x 2 x i1> splat (i1 true), i32 %evl)
15119  ret <vscale x 2 x double> %v
15120}
15121
15122define <vscale x 2 x double> @vfnmsub_vv_nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x double> %b, <vscale x 2 x double> %c, <vscale x 2 x i1> %m, i32 zeroext %evl) {
15123; CHECK-LABEL: vfnmsub_vv_nxv2f64:
15124; CHECK:       # %bb.0:
15125; CHECK-NEXT:    vsetvli zero, a0, e64, m2, ta, ma
15126; CHECK-NEXT:    vfnmadd.vv v10, v8, v12, v0.t
15127; CHECK-NEXT:    vmv.v.v v8, v10
15128; CHECK-NEXT:    ret
15129  %negb = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %b, <vscale x 2 x i1> %m, i32 %evl)
15130  %negc = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %c, <vscale x 2 x i1> %m, i32 %evl)
15131  %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x double> %negb, <vscale x 2 x double> %negc, <vscale x 2 x i1> %m, i32 %evl)
15132  ret <vscale x 2 x double> %v
15133}
15134
15135define <vscale x 2 x double> @vfnmsub_vv_nxv2f64_commuted(<vscale x 2 x double> %va, <vscale x 2 x double> %b, <vscale x 2 x double> %c, <vscale x 2 x i1> %m, i32 zeroext %evl) {
15136; CHECK-LABEL: vfnmsub_vv_nxv2f64_commuted:
15137; CHECK:       # %bb.0:
15138; CHECK-NEXT:    vsetvli zero, a0, e64, m2, ta, ma
15139; CHECK-NEXT:    vfnmadd.vv v8, v10, v12, v0.t
15140; CHECK-NEXT:    ret
15141  %negb = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %b, <vscale x 2 x i1> %m, i32 %evl)
15142  %negc = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %c, <vscale x 2 x i1> %m, i32 %evl)
15143  %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %negb, <vscale x 2 x double> %va, <vscale x 2 x double> %negc, <vscale x 2 x i1> %m, i32 %evl)
15144  ret <vscale x 2 x double> %v
15145}
15146
15147define <vscale x 2 x double> @vfnmsub_vv_nxv2f64_unmasked(<vscale x 2 x double> %va, <vscale x 2 x double> %b, <vscale x 2 x double> %c, i32 zeroext %evl) {
15148; CHECK-LABEL: vfnmsub_vv_nxv2f64_unmasked:
15149; CHECK:       # %bb.0:
15150; CHECK-NEXT:    vsetvli zero, a0, e64, m2, ta, ma
15151; CHECK-NEXT:    vfnmadd.vv v8, v10, v12
15152; CHECK-NEXT:    ret
15153  %negb = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %b, <vscale x 2 x i1> splat (i1 true), i32 %evl)
15154  %negc = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %c, <vscale x 2 x i1> splat (i1 true), i32 %evl)
15155  %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x double> %negb, <vscale x 2 x double> %negc, <vscale x 2 x i1> splat (i1 true), i32 %evl)
15156  ret <vscale x 2 x double> %v
15157}
15158
15159define <vscale x 2 x double> @vfnmsub_vv_nxv2f64_unmasked_commuted(<vscale x 2 x double> %va, <vscale x 2 x double> %b, <vscale x 2 x double> %c, i32 zeroext %evl) {
15160; CHECK-LABEL: vfnmsub_vv_nxv2f64_unmasked_commuted:
15161; CHECK:       # %bb.0:
15162; CHECK-NEXT:    vsetvli zero, a0, e64, m2, ta, ma
15163; CHECK-NEXT:    vfnmadd.vv v8, v10, v12
15164; CHECK-NEXT:    ret
15165  %negb = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %b, <vscale x 2 x i1> splat (i1 true), i32 %evl)
15166  %negc = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %c, <vscale x 2 x i1> splat (i1 true), i32 %evl)
15167  %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %negb, <vscale x 2 x double> %va, <vscale x 2 x double> %negc, <vscale x 2 x i1> splat (i1 true), i32 %evl)
15168  ret <vscale x 2 x double> %v
15169}
15170
15171define <vscale x 2 x double> @vfnmsub_vf_nxv2f64(<vscale x 2 x double> %va, double %b, <vscale x 2 x double> %vc, <vscale x 2 x i1> %m, i32 zeroext %evl) {
15172; CHECK-LABEL: vfnmsub_vf_nxv2f64:
15173; CHECK:       # %bb.0:
15174; CHECK-NEXT:    vsetvli zero, a0, e64, m2, ta, ma
15175; CHECK-NEXT:    vfnmsub.vf v8, fa0, v10, v0.t
15176; CHECK-NEXT:    ret
15177  %elt.head = insertelement <vscale x 2 x double> poison, double %b, i32 0
15178  %vb = shufflevector <vscale x 2 x double> %elt.head, <vscale x 2 x double> poison, <vscale x 2 x i32> zeroinitializer
15179  %negva = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x i1> %m, i32 %evl)
15180  %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %negva, <vscale x 2 x double> %vb, <vscale x 2 x double> %vc, <vscale x 2 x i1> %m, i32 %evl)
15181  ret <vscale x 2 x double> %v
15182}
15183
15184define <vscale x 2 x double> @vfnmsub_vf_nxv2f64_commute(<vscale x 2 x double> %va, double %b, <vscale x 2 x double> %vc, <vscale x 2 x i1> %m, i32 zeroext %evl) {
15185; CHECK-LABEL: vfnmsub_vf_nxv2f64_commute:
15186; CHECK:       # %bb.0:
15187; CHECK-NEXT:    vsetvli zero, a0, e64, m2, ta, ma
15188; CHECK-NEXT:    vfnmsub.vf v8, fa0, v10, v0.t
15189; CHECK-NEXT:    ret
15190  %elt.head = insertelement <vscale x 2 x double> poison, double %b, i32 0
15191  %vb = shufflevector <vscale x 2 x double> %elt.head, <vscale x 2 x double> poison, <vscale x 2 x i32> zeroinitializer
15192  %negva = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x i1> %m, i32 %evl)
15193  %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %vb, <vscale x 2 x double> %negva, <vscale x 2 x double> %vc, <vscale x 2 x i1> %m, i32 %evl)
15194  ret <vscale x 2 x double> %v
15195}
15196
15197define <vscale x 2 x double> @vfnmsub_vf_nxv2f64_unmasked(<vscale x 2 x double> %va, double %b, <vscale x 2 x double> %vc, i32 zeroext %evl) {
15198; CHECK-LABEL: vfnmsub_vf_nxv2f64_unmasked:
15199; CHECK:       # %bb.0:
15200; CHECK-NEXT:    vsetvli zero, a0, e64, m2, ta, ma
15201; CHECK-NEXT:    vfnmsub.vf v8, fa0, v10
15202; CHECK-NEXT:    ret
15203  %elt.head = insertelement <vscale x 2 x double> poison, double %b, i32 0
15204  %vb = shufflevector <vscale x 2 x double> %elt.head, <vscale x 2 x double> poison, <vscale x 2 x i32> zeroinitializer
15205  %negva = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x i1> splat (i1 true), i32 %evl)
15206  %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %negva, <vscale x 2 x double> %vb, <vscale x 2 x double> %vc, <vscale x 2 x i1> splat (i1 true), i32 %evl)
15207  ret <vscale x 2 x double> %v
15208}
15209
15210define <vscale x 2 x double> @vfnmsub_vf_nxv2f64_unmasked_commute(<vscale x 2 x double> %va, double %b, <vscale x 2 x double> %vc, i32 zeroext %evl) {
15211; CHECK-LABEL: vfnmsub_vf_nxv2f64_unmasked_commute:
15212; CHECK:       # %bb.0:
15213; CHECK-NEXT:    vsetvli zero, a0, e64, m2, ta, ma
15214; CHECK-NEXT:    vfnmsub.vf v8, fa0, v10
15215; CHECK-NEXT:    ret
15216  %elt.head = insertelement <vscale x 2 x double> poison, double %b, i32 0
15217  %vb = shufflevector <vscale x 2 x double> %elt.head, <vscale x 2 x double> poison, <vscale x 2 x i32> zeroinitializer
15218  %negva = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x i1> splat (i1 true), i32 %evl)
15219  %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %vb, <vscale x 2 x double> %negva, <vscale x 2 x double> %vc, <vscale x 2 x i1> splat (i1 true), i32 %evl)
15220  ret <vscale x 2 x double> %v
15221}
15222
15223define <vscale x 2 x double> @vfnmsub_vf_nxv2f64_neg_splat(<vscale x 2 x double> %va, double %b, <vscale x 2 x double> %vc, <vscale x 2 x i1> %m, i32 zeroext %evl) {
15224; CHECK-LABEL: vfnmsub_vf_nxv2f64_neg_splat:
15225; CHECK:       # %bb.0:
15226; CHECK-NEXT:    vsetvli zero, a0, e64, m2, ta, ma
15227; CHECK-NEXT:    vfnmsub.vf v8, fa0, v10, v0.t
15228; CHECK-NEXT:    ret
15229  %elt.head = insertelement <vscale x 2 x double> poison, double %b, i32 0
15230  %vb = shufflevector <vscale x 2 x double> %elt.head, <vscale x 2 x double> poison, <vscale x 2 x i32> zeroinitializer
15231  %negvb = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %vb, <vscale x 2 x i1> %m, i32 %evl)
15232  %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x double> %negvb, <vscale x 2 x double> %vc, <vscale x 2 x i1> %m, i32 %evl)
15233  ret <vscale x 2 x double> %v
15234}
15235
15236define <vscale x 2 x double> @vfnmsub_vf_nxv2f64_neg_splat_commute(<vscale x 2 x double> %va, double %b, <vscale x 2 x double> %vc, <vscale x 2 x i1> %m, i32 zeroext %evl) {
15237; CHECK-LABEL: vfnmsub_vf_nxv2f64_neg_splat_commute:
15238; CHECK:       # %bb.0:
15239; CHECK-NEXT:    vsetvli zero, a0, e64, m2, ta, ma
15240; CHECK-NEXT:    vfnmsub.vf v8, fa0, v10, v0.t
15241; CHECK-NEXT:    ret
15242  %elt.head = insertelement <vscale x 2 x double> poison, double %b, i32 0
15243  %vb = shufflevector <vscale x 2 x double> %elt.head, <vscale x 2 x double> poison, <vscale x 2 x i32> zeroinitializer
15244  %negvb = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %vb, <vscale x 2 x i1> %m, i32 %evl)
15245  %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %negvb, <vscale x 2 x double> %va, <vscale x 2 x double> %vc, <vscale x 2 x i1> %m, i32 %evl)
15246  ret <vscale x 2 x double> %v
15247}
15248
15249define <vscale x 2 x double> @vfnmsub_vf_nxv2f64_neg_splat_unmasked(<vscale x 2 x double> %va, double %b, <vscale x 2 x double> %vc, i32 zeroext %evl) {
15250; CHECK-LABEL: vfnmsub_vf_nxv2f64_neg_splat_unmasked:
15251; CHECK:       # %bb.0:
15252; CHECK-NEXT:    vsetvli zero, a0, e64, m2, ta, ma
15253; CHECK-NEXT:    vfnmsub.vf v8, fa0, v10
15254; CHECK-NEXT:    ret
15255  %elt.head = insertelement <vscale x 2 x double> poison, double %b, i32 0
15256  %vb = shufflevector <vscale x 2 x double> %elt.head, <vscale x 2 x double> poison, <vscale x 2 x i32> zeroinitializer
15257  %negvb = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %vb, <vscale x 2 x i1> splat (i1 true), i32 %evl)
15258  %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x double> %negvb, <vscale x 2 x double> %vc, <vscale x 2 x i1> splat (i1 true), i32 %evl)
15259  ret <vscale x 2 x double> %v
15260}
15261
15262define <vscale x 2 x double> @vfnmsub_vf_nxv2f64_neg_splat_unmasked_commute(<vscale x 2 x double> %va, double %b, <vscale x 2 x double> %vc, i32 zeroext %evl) {
15263; CHECK-LABEL: vfnmsub_vf_nxv2f64_neg_splat_unmasked_commute:
15264; CHECK:       # %bb.0:
15265; CHECK-NEXT:    vsetvli zero, a0, e64, m2, ta, ma
15266; CHECK-NEXT:    vfnmsub.vf v8, fa0, v10
15267; CHECK-NEXT:    ret
15268  %elt.head = insertelement <vscale x 2 x double> poison, double %b, i32 0
15269  %vb = shufflevector <vscale x 2 x double> %elt.head, <vscale x 2 x double> poison, <vscale x 2 x i32> zeroinitializer
15270  %negvb = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %vb, <vscale x 2 x i1> splat (i1 true), i32 %evl)
15271  %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %negvb, <vscale x 2 x double> %va, <vscale x 2 x double> %vc, <vscale x 2 x i1> splat (i1 true), i32 %evl)
15272  ret <vscale x 2 x double> %v
15273}
15274
15275declare <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double>, <vscale x 4 x i1>, i32)
15276
15277define <vscale x 4 x double> @vfmsub_vv_nxv4f64(<vscale x 4 x double> %va, <vscale x 4 x double> %b, <vscale x 4 x double> %c, <vscale x 4 x i1> %m, i32 zeroext %evl) {
15278; CHECK-LABEL: vfmsub_vv_nxv4f64:
15279; CHECK:       # %bb.0:
15280; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
15281; CHECK-NEXT:    vfmsub.vv v12, v8, v16, v0.t
15282; CHECK-NEXT:    vmv.v.v v8, v12
15283; CHECK-NEXT:    ret
15284  %negc = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %c, <vscale x 4 x i1> %m, i32 %evl)
15285  %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %va, <vscale x 4 x double> %b, <vscale x 4 x double> %negc, <vscale x 4 x i1> %m, i32 %evl)
15286  ret <vscale x 4 x double> %v
15287}
15288
15289define <vscale x 4 x double> @vfmsub_vv_nxv4f64_unmasked(<vscale x 4 x double> %va, <vscale x 4 x double> %b, <vscale x 4 x double> %c, i32 zeroext %evl) {
15290; CHECK-LABEL: vfmsub_vv_nxv4f64_unmasked:
15291; CHECK:       # %bb.0:
15292; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
15293; CHECK-NEXT:    vfmsub.vv v8, v12, v16
15294; CHECK-NEXT:    ret
15295  %negc = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %c, <vscale x 4 x i1> splat (i1 true), i32 %evl)
15296  %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %va, <vscale x 4 x double> %b, <vscale x 4 x double> %negc, <vscale x 4 x i1> splat (i1 true), i32 %evl)
15297  ret <vscale x 4 x double> %v
15298}
15299
15300define <vscale x 4 x double> @vfmsub_vf_nxv4f64(<vscale x 4 x double> %va, double %b, <vscale x 4 x double> %vc, <vscale x 4 x i1> %m, i32 zeroext %evl) {
15301; CHECK-LABEL: vfmsub_vf_nxv4f64:
15302; CHECK:       # %bb.0:
15303; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
15304; CHECK-NEXT:    vfmsub.vf v8, fa0, v12, v0.t
15305; CHECK-NEXT:    ret
15306  %elt.head = insertelement <vscale x 4 x double> poison, double %b, i32 0
15307  %vb = shufflevector <vscale x 4 x double> %elt.head, <vscale x 4 x double> poison, <vscale x 4 x i32> zeroinitializer
15308  %negvc = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %vc, <vscale x 4 x i1> %m, i32 %evl)
15309  %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %va, <vscale x 4 x double> %vb, <vscale x 4 x double> %negvc, <vscale x 4 x i1> %m, i32 %evl)
15310  ret <vscale x 4 x double> %v
15311}
15312
15313define <vscale x 4 x double> @vfmsub_vf_nxv4f64_commute(<vscale x 4 x double> %va, double %b, <vscale x 4 x double> %vc, <vscale x 4 x i1> %m, i32 zeroext %evl) {
15314; CHECK-LABEL: vfmsub_vf_nxv4f64_commute:
15315; CHECK:       # %bb.0:
15316; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
15317; CHECK-NEXT:    vfmsub.vf v8, fa0, v12, v0.t
15318; CHECK-NEXT:    ret
15319  %elt.head = insertelement <vscale x 4 x double> poison, double %b, i32 0
15320  %vb = shufflevector <vscale x 4 x double> %elt.head, <vscale x 4 x double> poison, <vscale x 4 x i32> zeroinitializer
15321  %negvc = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %vc, <vscale x 4 x i1> %m, i32 %evl)
15322  %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %vb, <vscale x 4 x double> %va, <vscale x 4 x double> %negvc, <vscale x 4 x i1> %m, i32 %evl)
15323  ret <vscale x 4 x double> %v
15324}
15325
15326define <vscale x 4 x double> @vfmsub_vf_nxv4f64_unmasked(<vscale x 4 x double> %va, double %b, <vscale x 4 x double> %vc, i32 zeroext %evl) {
15327; CHECK-LABEL: vfmsub_vf_nxv4f64_unmasked:
15328; CHECK:       # %bb.0:
15329; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
15330; CHECK-NEXT:    vfmsub.vf v8, fa0, v12
15331; CHECK-NEXT:    ret
15332  %elt.head = insertelement <vscale x 4 x double> poison, double %b, i32 0
15333  %vb = shufflevector <vscale x 4 x double> %elt.head, <vscale x 4 x double> poison, <vscale x 4 x i32> zeroinitializer
15334  %negvc = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %vc, <vscale x 4 x i1> splat (i1 true), i32 %evl)
15335  %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %va, <vscale x 4 x double> %vb, <vscale x 4 x double> %negvc, <vscale x 4 x i1> splat (i1 true), i32 %evl)
15336  ret <vscale x 4 x double> %v
15337}
15338
15339define <vscale x 4 x double> @vfmsub_vf_nxv4f64_unmasked_commute(<vscale x 4 x double> %va, double %b, <vscale x 4 x double> %vc, i32 zeroext %evl) {
15340; CHECK-LABEL: vfmsub_vf_nxv4f64_unmasked_commute:
15341; CHECK:       # %bb.0:
15342; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
15343; CHECK-NEXT:    vfmsub.vf v8, fa0, v12
15344; CHECK-NEXT:    ret
15345  %elt.head = insertelement <vscale x 4 x double> poison, double %b, i32 0
15346  %vb = shufflevector <vscale x 4 x double> %elt.head, <vscale x 4 x double> poison, <vscale x 4 x i32> zeroinitializer
15347  %negvc = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %vc, <vscale x 4 x i1> splat (i1 true), i32 %evl)
15348  %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %vb, <vscale x 4 x double> %va, <vscale x 4 x double> %negvc, <vscale x 4 x i1> splat (i1 true), i32 %evl)
15349  ret <vscale x 4 x double> %v
15350}
15351
15352define <vscale x 4 x double> @vfnmadd_vv_nxv4f64(<vscale x 4 x double> %va, <vscale x 4 x double> %b, <vscale x 4 x double> %c, <vscale x 4 x i1> %m, i32 zeroext %evl) {
15353; CHECK-LABEL: vfnmadd_vv_nxv4f64:
15354; CHECK:       # %bb.0:
15355; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
15356; CHECK-NEXT:    vfnmadd.vv v12, v8, v16, v0.t
15357; CHECK-NEXT:    vmv.v.v v8, v12
15358; CHECK-NEXT:    ret
15359  %negb = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %b, <vscale x 4 x i1> %m, i32 %evl)
15360  %negc = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %c, <vscale x 4 x i1> %m, i32 %evl)
15361  %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %va, <vscale x 4 x double> %negb, <vscale x 4 x double> %negc, <vscale x 4 x i1> %m, i32 %evl)
15362  ret <vscale x 4 x double> %v
15363}
15364
15365define <vscale x 4 x double> @vfnmadd_vv_nxv4f64_commuted(<vscale x 4 x double> %va, <vscale x 4 x double> %b, <vscale x 4 x double> %c, <vscale x 4 x i1> %m, i32 zeroext %evl) {
15366; CHECK-LABEL: vfnmadd_vv_nxv4f64_commuted:
15367; CHECK:       # %bb.0:
15368; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
15369; CHECK-NEXT:    vfnmadd.vv v8, v12, v16, v0.t
15370; CHECK-NEXT:    ret
15371  %negb = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %b, <vscale x 4 x i1> %m, i32 %evl)
15372  %negc = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %c, <vscale x 4 x i1> %m, i32 %evl)
15373  %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %negb, <vscale x 4 x double> %va, <vscale x 4 x double> %negc, <vscale x 4 x i1> %m, i32 %evl)
15374  ret <vscale x 4 x double> %v
15375}
15376
15377define <vscale x 4 x double> @vfnmadd_vv_nxv4f64_unmasked(<vscale x 4 x double> %va, <vscale x 4 x double> %b, <vscale x 4 x double> %c, i32 zeroext %evl) {
15378; CHECK-LABEL: vfnmadd_vv_nxv4f64_unmasked:
15379; CHECK:       # %bb.0:
15380; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
15381; CHECK-NEXT:    vfnmadd.vv v8, v12, v16
15382; CHECK-NEXT:    ret
15383  %negb = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %b, <vscale x 4 x i1> splat (i1 true), i32 %evl)
15384  %negc = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %c, <vscale x 4 x i1> splat (i1 true), i32 %evl)
15385  %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %va, <vscale x 4 x double> %negb, <vscale x 4 x double> %negc, <vscale x 4 x i1> splat (i1 true), i32 %evl)
15386  ret <vscale x 4 x double> %v
15387}
15388
15389define <vscale x 4 x double> @vfnmadd_vv_nxv4f64_unmasked_commuted(<vscale x 4 x double> %va, <vscale x 4 x double> %b, <vscale x 4 x double> %c, i32 zeroext %evl) {
15390; CHECK-LABEL: vfnmadd_vv_nxv4f64_unmasked_commuted:
15391; CHECK:       # %bb.0:
15392; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
15393; CHECK-NEXT:    vfnmadd.vv v8, v12, v16
15394; CHECK-NEXT:    ret
15395  %negb = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %b, <vscale x 4 x i1> splat (i1 true), i32 %evl)
15396  %negc = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %c, <vscale x 4 x i1> splat (i1 true), i32 %evl)
15397  %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %negb, <vscale x 4 x double> %va, <vscale x 4 x double> %negc, <vscale x 4 x i1> splat (i1 true), i32 %evl)
15398  ret <vscale x 4 x double> %v
15399}
15400
15401define <vscale x 4 x double> @vfnmadd_vf_nxv4f64(<vscale x 4 x double> %va, double %b, <vscale x 4 x double> %vc, <vscale x 4 x i1> %m, i32 zeroext %evl) {
15402; CHECK-LABEL: vfnmadd_vf_nxv4f64:
15403; CHECK:       # %bb.0:
15404; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
15405; CHECK-NEXT:    vfnmadd.vf v8, fa0, v12, v0.t
15406; CHECK-NEXT:    ret
15407  %elt.head = insertelement <vscale x 4 x double> poison, double %b, i32 0
15408  %vb = shufflevector <vscale x 4 x double> %elt.head, <vscale x 4 x double> poison, <vscale x 4 x i32> zeroinitializer
15409  %negva = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %va, <vscale x 4 x i1> %m, i32 %evl)
15410  %negvc = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %vc, <vscale x 4 x i1> %m, i32 %evl)
15411  %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %negva, <vscale x 4 x double> %vb, <vscale x 4 x double> %negvc, <vscale x 4 x i1> %m, i32 %evl)
15412  ret <vscale x 4 x double> %v
15413}
15414
15415define <vscale x 4 x double> @vfnmadd_vf_nxv4f64_commute(<vscale x 4 x double> %va, double %b, <vscale x 4 x double> %vc, <vscale x 4 x i1> %m, i32 zeroext %evl) {
15416; CHECK-LABEL: vfnmadd_vf_nxv4f64_commute:
15417; CHECK:       # %bb.0:
15418; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
15419; CHECK-NEXT:    vfnmadd.vf v8, fa0, v12, v0.t
15420; CHECK-NEXT:    ret
15421  %elt.head = insertelement <vscale x 4 x double> poison, double %b, i32 0
15422  %vb = shufflevector <vscale x 4 x double> %elt.head, <vscale x 4 x double> poison, <vscale x 4 x i32> zeroinitializer
15423  %negva = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %va, <vscale x 4 x i1> %m, i32 %evl)
15424  %negvc = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %vc, <vscale x 4 x i1> %m, i32 %evl)
15425  %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %vb, <vscale x 4 x double> %negva, <vscale x 4 x double> %negvc, <vscale x 4 x i1> %m, i32 %evl)
15426  ret <vscale x 4 x double> %v
15427}
15428
15429define <vscale x 4 x double> @vfnmadd_vf_nxv4f64_unmasked(<vscale x 4 x double> %va, double %b, <vscale x 4 x double> %vc, i32 zeroext %evl) {
15430; CHECK-LABEL: vfnmadd_vf_nxv4f64_unmasked:
15431; CHECK:       # %bb.0:
15432; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
15433; CHECK-NEXT:    vfnmadd.vf v8, fa0, v12
15434; CHECK-NEXT:    ret
15435  %elt.head = insertelement <vscale x 4 x double> poison, double %b, i32 0
15436  %vb = shufflevector <vscale x 4 x double> %elt.head, <vscale x 4 x double> poison, <vscale x 4 x i32> zeroinitializer
15437  %negva = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %va, <vscale x 4 x i1> splat (i1 true), i32 %evl)
15438  %negvc = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %vc, <vscale x 4 x i1> splat (i1 true), i32 %evl)
15439  %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %negva, <vscale x 4 x double> %vb, <vscale x 4 x double> %negvc, <vscale x 4 x i1> splat (i1 true), i32 %evl)
15440  ret <vscale x 4 x double> %v
15441}
15442
15443define <vscale x 4 x double> @vfnmadd_vf_nxv4f64_unmasked_commute(<vscale x 4 x double> %va, double %b, <vscale x 4 x double> %vc, i32 zeroext %evl) {
15444; CHECK-LABEL: vfnmadd_vf_nxv4f64_unmasked_commute:
15445; CHECK:       # %bb.0:
15446; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
15447; CHECK-NEXT:    vfnmadd.vf v8, fa0, v12
15448; CHECK-NEXT:    ret
15449  %elt.head = insertelement <vscale x 4 x double> poison, double %b, i32 0
15450  %vb = shufflevector <vscale x 4 x double> %elt.head, <vscale x 4 x double> poison, <vscale x 4 x i32> zeroinitializer
15451  %negva = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %va, <vscale x 4 x i1> splat (i1 true), i32 %evl)
15452  %negvc = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %vc, <vscale x 4 x i1> splat (i1 true), i32 %evl)
15453  %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %vb, <vscale x 4 x double> %negva, <vscale x 4 x double> %negvc, <vscale x 4 x i1> splat (i1 true), i32 %evl)
15454  ret <vscale x 4 x double> %v
15455}
15456
15457define <vscale x 4 x double> @vfnmadd_vf_nxv4f64_neg_splat(<vscale x 4 x double> %va, double %b, <vscale x 4 x double> %vc, <vscale x 4 x i1> %m, i32 zeroext %evl) {
15458; CHECK-LABEL: vfnmadd_vf_nxv4f64_neg_splat:
15459; CHECK:       # %bb.0:
15460; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
15461; CHECK-NEXT:    vfnmadd.vf v8, fa0, v12, v0.t
15462; CHECK-NEXT:    ret
15463  %elt.head = insertelement <vscale x 4 x double> poison, double %b, i32 0
15464  %vb = shufflevector <vscale x 4 x double> %elt.head, <vscale x 4 x double> poison, <vscale x 4 x i32> zeroinitializer
15465  %negvb = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %vb, <vscale x 4 x i1> %m, i32 %evl)
15466  %negvc = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %vc, <vscale x 4 x i1> %m, i32 %evl)
15467  %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %va, <vscale x 4 x double> %negvb, <vscale x 4 x double> %negvc, <vscale x 4 x i1> %m, i32 %evl)
15468  ret <vscale x 4 x double> %v
15469}
15470
15471define <vscale x 4 x double> @vfnmadd_vf_nxv4f64_neg_splat_commute(<vscale x 4 x double> %va, double %b, <vscale x 4 x double> %vc, <vscale x 4 x i1> %m, i32 zeroext %evl) {
15472; CHECK-LABEL: vfnmadd_vf_nxv4f64_neg_splat_commute:
15473; CHECK:       # %bb.0:
15474; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
15475; CHECK-NEXT:    vfnmadd.vf v8, fa0, v12, v0.t
15476; CHECK-NEXT:    ret
15477  %elt.head = insertelement <vscale x 4 x double> poison, double %b, i32 0
15478  %vb = shufflevector <vscale x 4 x double> %elt.head, <vscale x 4 x double> poison, <vscale x 4 x i32> zeroinitializer
15479  %negvb = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %vb, <vscale x 4 x i1> %m, i32 %evl)
15480  %negvc = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %vc, <vscale x 4 x i1> %m, i32 %evl)
15481  %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %negvb, <vscale x 4 x double> %va, <vscale x 4 x double> %negvc, <vscale x 4 x i1> %m, i32 %evl)
15482  ret <vscale x 4 x double> %v
15483}
15484
15485define <vscale x 4 x double> @vfnmadd_vf_nxv4f64_neg_splat_unmasked(<vscale x 4 x double> %va, double %b, <vscale x 4 x double> %vc, i32 zeroext %evl) {
15486; CHECK-LABEL: vfnmadd_vf_nxv4f64_neg_splat_unmasked:
15487; CHECK:       # %bb.0:
15488; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
15489; CHECK-NEXT:    vfnmadd.vf v8, fa0, v12
15490; CHECK-NEXT:    ret
15491  %elt.head = insertelement <vscale x 4 x double> poison, double %b, i32 0
15492  %vb = shufflevector <vscale x 4 x double> %elt.head, <vscale x 4 x double> poison, <vscale x 4 x i32> zeroinitializer
15493  %negvb = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %vb, <vscale x 4 x i1> splat (i1 true), i32 %evl)
15494  %negvc = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %vc, <vscale x 4 x i1> splat (i1 true), i32 %evl)
15495  %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %va, <vscale x 4 x double> %negvb, <vscale x 4 x double> %negvc, <vscale x 4 x i1> splat (i1 true), i32 %evl)
15496  ret <vscale x 4 x double> %v
15497}
15498
15499define <vscale x 4 x double> @vfnmadd_vf_nxv4f64_neg_splat_unmasked_commute(<vscale x 4 x double> %va, double %b, <vscale x 4 x double> %vc, i32 zeroext %evl) {
15500; CHECK-LABEL: vfnmadd_vf_nxv4f64_neg_splat_unmasked_commute:
15501; CHECK:       # %bb.0:
15502; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
15503; CHECK-NEXT:    vfnmadd.vf v8, fa0, v12
15504; CHECK-NEXT:    ret
15505  %elt.head = insertelement <vscale x 4 x double> poison, double %b, i32 0
15506  %vb = shufflevector <vscale x 4 x double> %elt.head, <vscale x 4 x double> poison, <vscale x 4 x i32> zeroinitializer
15507  %negvb = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %vb, <vscale x 4 x i1> splat (i1 true), i32 %evl)
15508  %negvc = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %vc, <vscale x 4 x i1> splat (i1 true), i32 %evl)
15509  %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %negvb, <vscale x 4 x double> %va, <vscale x 4 x double> %negvc, <vscale x 4 x i1> splat (i1 true), i32 %evl)
15510  ret <vscale x 4 x double> %v
15511}
15512
15513define <vscale x 4 x double> @vfnmsub_vv_nxv4f64(<vscale x 4 x double> %va, <vscale x 4 x double> %b, <vscale x 4 x double> %c, <vscale x 4 x i1> %m, i32 zeroext %evl) {
15514; CHECK-LABEL: vfnmsub_vv_nxv4f64:
15515; CHECK:       # %bb.0:
15516; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
15517; CHECK-NEXT:    vfnmadd.vv v12, v8, v16, v0.t
15518; CHECK-NEXT:    vmv.v.v v8, v12
15519; CHECK-NEXT:    ret
15520  %negb = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %b, <vscale x 4 x i1> %m, i32 %evl)
15521  %negc = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %c, <vscale x 4 x i1> %m, i32 %evl)
15522  %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %va, <vscale x 4 x double> %negb, <vscale x 4 x double> %negc, <vscale x 4 x i1> %m, i32 %evl)
15523  ret <vscale x 4 x double> %v
15524}
15525
15526define <vscale x 4 x double> @vfnmsub_vv_nxv4f64_commuted(<vscale x 4 x double> %va, <vscale x 4 x double> %b, <vscale x 4 x double> %c, <vscale x 4 x i1> %m, i32 zeroext %evl) {
15527; CHECK-LABEL: vfnmsub_vv_nxv4f64_commuted:
15528; CHECK:       # %bb.0:
15529; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
15530; CHECK-NEXT:    vfnmadd.vv v8, v12, v16, v0.t
15531; CHECK-NEXT:    ret
15532  %negb = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %b, <vscale x 4 x i1> %m, i32 %evl)
15533  %negc = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %c, <vscale x 4 x i1> %m, i32 %evl)
15534  %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %negb, <vscale x 4 x double> %va, <vscale x 4 x double> %negc, <vscale x 4 x i1> %m, i32 %evl)
15535  ret <vscale x 4 x double> %v
15536}
15537
15538define <vscale x 4 x double> @vfnmsub_vv_nxv4f64_unmasked(<vscale x 4 x double> %va, <vscale x 4 x double> %b, <vscale x 4 x double> %c, i32 zeroext %evl) {
15539; CHECK-LABEL: vfnmsub_vv_nxv4f64_unmasked:
15540; CHECK:       # %bb.0:
15541; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
15542; CHECK-NEXT:    vfnmadd.vv v8, v12, v16
15543; CHECK-NEXT:    ret
15544  %negb = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %b, <vscale x 4 x i1> splat (i1 true), i32 %evl)
15545  %negc = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %c, <vscale x 4 x i1> splat (i1 true), i32 %evl)
15546  %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %va, <vscale x 4 x double> %negb, <vscale x 4 x double> %negc, <vscale x 4 x i1> splat (i1 true), i32 %evl)
15547  ret <vscale x 4 x double> %v
15548}
15549
15550define <vscale x 4 x double> @vfnmsub_vv_nxv4f64_unmasked_commuted(<vscale x 4 x double> %va, <vscale x 4 x double> %b, <vscale x 4 x double> %c, i32 zeroext %evl) {
15551; CHECK-LABEL: vfnmsub_vv_nxv4f64_unmasked_commuted:
15552; CHECK:       # %bb.0:
15553; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
15554; CHECK-NEXT:    vfnmadd.vv v8, v12, v16
15555; CHECK-NEXT:    ret
15556  %negb = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %b, <vscale x 4 x i1> splat (i1 true), i32 %evl)
15557  %negc = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %c, <vscale x 4 x i1> splat (i1 true), i32 %evl)
15558  %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %negb, <vscale x 4 x double> %va, <vscale x 4 x double> %negc, <vscale x 4 x i1> splat (i1 true), i32 %evl)
15559  ret <vscale x 4 x double> %v
15560}
15561
15562define <vscale x 4 x double> @vfnmsub_vf_nxv4f64(<vscale x 4 x double> %va, double %b, <vscale x 4 x double> %vc, <vscale x 4 x i1> %m, i32 zeroext %evl) {
15563; CHECK-LABEL: vfnmsub_vf_nxv4f64:
15564; CHECK:       # %bb.0:
15565; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
15566; CHECK-NEXT:    vfnmsub.vf v8, fa0, v12, v0.t
15567; CHECK-NEXT:    ret
15568  %elt.head = insertelement <vscale x 4 x double> poison, double %b, i32 0
15569  %vb = shufflevector <vscale x 4 x double> %elt.head, <vscale x 4 x double> poison, <vscale x 4 x i32> zeroinitializer
15570  %negva = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %va, <vscale x 4 x i1> %m, i32 %evl)
15571  %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %negva, <vscale x 4 x double> %vb, <vscale x 4 x double> %vc, <vscale x 4 x i1> %m, i32 %evl)
15572  ret <vscale x 4 x double> %v
15573}
15574
15575define <vscale x 4 x double> @vfnmsub_vf_nxv4f64_commute(<vscale x 4 x double> %va, double %b, <vscale x 4 x double> %vc, <vscale x 4 x i1> %m, i32 zeroext %evl) {
15576; CHECK-LABEL: vfnmsub_vf_nxv4f64_commute:
15577; CHECK:       # %bb.0:
15578; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
15579; CHECK-NEXT:    vfnmsub.vf v8, fa0, v12, v0.t
15580; CHECK-NEXT:    ret
15581  %elt.head = insertelement <vscale x 4 x double> poison, double %b, i32 0
15582  %vb = shufflevector <vscale x 4 x double> %elt.head, <vscale x 4 x double> poison, <vscale x 4 x i32> zeroinitializer
15583  %negva = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %va, <vscale x 4 x i1> %m, i32 %evl)
15584  %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %vb, <vscale x 4 x double> %negva, <vscale x 4 x double> %vc, <vscale x 4 x i1> %m, i32 %evl)
15585  ret <vscale x 4 x double> %v
15586}
15587
15588define <vscale x 4 x double> @vfnmsub_vf_nxv4f64_unmasked(<vscale x 4 x double> %va, double %b, <vscale x 4 x double> %vc, i32 zeroext %evl) {
15589; CHECK-LABEL: vfnmsub_vf_nxv4f64_unmasked:
15590; CHECK:       # %bb.0:
15591; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
15592; CHECK-NEXT:    vfnmsub.vf v8, fa0, v12
15593; CHECK-NEXT:    ret
15594  %elt.head = insertelement <vscale x 4 x double> poison, double %b, i32 0
15595  %vb = shufflevector <vscale x 4 x double> %elt.head, <vscale x 4 x double> poison, <vscale x 4 x i32> zeroinitializer
15596  %negva = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %va, <vscale x 4 x i1> splat (i1 true), i32 %evl)
15597  %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %negva, <vscale x 4 x double> %vb, <vscale x 4 x double> %vc, <vscale x 4 x i1> splat (i1 true), i32 %evl)
15598  ret <vscale x 4 x double> %v
15599}
15600
15601define <vscale x 4 x double> @vfnmsub_vf_nxv4f64_unmasked_commute(<vscale x 4 x double> %va, double %b, <vscale x 4 x double> %vc, i32 zeroext %evl) {
15602; CHECK-LABEL: vfnmsub_vf_nxv4f64_unmasked_commute:
15603; CHECK:       # %bb.0:
15604; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
15605; CHECK-NEXT:    vfnmsub.vf v8, fa0, v12
15606; CHECK-NEXT:    ret
15607  %elt.head = insertelement <vscale x 4 x double> poison, double %b, i32 0
15608  %vb = shufflevector <vscale x 4 x double> %elt.head, <vscale x 4 x double> poison, <vscale x 4 x i32> zeroinitializer
15609  %negva = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %va, <vscale x 4 x i1> splat (i1 true), i32 %evl)
15610  %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %vb, <vscale x 4 x double> %negva, <vscale x 4 x double> %vc, <vscale x 4 x i1> splat (i1 true), i32 %evl)
15611  ret <vscale x 4 x double> %v
15612}
15613
15614define <vscale x 4 x double> @vfnmsub_vf_nxv4f64_neg_splat(<vscale x 4 x double> %va, double %b, <vscale x 4 x double> %vc, <vscale x 4 x i1> %m, i32 zeroext %evl) {
15615; CHECK-LABEL: vfnmsub_vf_nxv4f64_neg_splat:
15616; CHECK:       # %bb.0:
15617; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
15618; CHECK-NEXT:    vfnmsub.vf v8, fa0, v12, v0.t
15619; CHECK-NEXT:    ret
15620  %elt.head = insertelement <vscale x 4 x double> poison, double %b, i32 0
15621  %vb = shufflevector <vscale x 4 x double> %elt.head, <vscale x 4 x double> poison, <vscale x 4 x i32> zeroinitializer
15622  %negvb = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %vb, <vscale x 4 x i1> %m, i32 %evl)
15623  %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %va, <vscale x 4 x double> %negvb, <vscale x 4 x double> %vc, <vscale x 4 x i1> %m, i32 %evl)
15624  ret <vscale x 4 x double> %v
15625}
15626
15627define <vscale x 4 x double> @vfnmsub_vf_nxv4f64_neg_splat_commute(<vscale x 4 x double> %va, double %b, <vscale x 4 x double> %vc, <vscale x 4 x i1> %m, i32 zeroext %evl) {
15628; CHECK-LABEL: vfnmsub_vf_nxv4f64_neg_splat_commute:
15629; CHECK:       # %bb.0:
15630; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
15631; CHECK-NEXT:    vfnmsub.vf v8, fa0, v12, v0.t
15632; CHECK-NEXT:    ret
15633  %elt.head = insertelement <vscale x 4 x double> poison, double %b, i32 0
15634  %vb = shufflevector <vscale x 4 x double> %elt.head, <vscale x 4 x double> poison, <vscale x 4 x i32> zeroinitializer
15635  %negvb = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %vb, <vscale x 4 x i1> %m, i32 %evl)
15636  %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %negvb, <vscale x 4 x double> %va, <vscale x 4 x double> %vc, <vscale x 4 x i1> %m, i32 %evl)
15637  ret <vscale x 4 x double> %v
15638}
15639
15640define <vscale x 4 x double> @vfnmsub_vf_nxv4f64_neg_splat_unmasked(<vscale x 4 x double> %va, double %b, <vscale x 4 x double> %vc, i32 zeroext %evl) {
15641; CHECK-LABEL: vfnmsub_vf_nxv4f64_neg_splat_unmasked:
15642; CHECK:       # %bb.0:
15643; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
15644; CHECK-NEXT:    vfnmsub.vf v8, fa0, v12
15645; CHECK-NEXT:    ret
15646  %elt.head = insertelement <vscale x 4 x double> poison, double %b, i32 0
15647  %vb = shufflevector <vscale x 4 x double> %elt.head, <vscale x 4 x double> poison, <vscale x 4 x i32> zeroinitializer
15648  %negvb = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %vb, <vscale x 4 x i1> splat (i1 true), i32 %evl)
15649  %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %va, <vscale x 4 x double> %negvb, <vscale x 4 x double> %vc, <vscale x 4 x i1> splat (i1 true), i32 %evl)
15650  ret <vscale x 4 x double> %v
15651}
15652
15653define <vscale x 4 x double> @vfnmsub_vf_nxv4f64_neg_splat_unmasked_commute(<vscale x 4 x double> %va, double %b, <vscale x 4 x double> %vc, i32 zeroext %evl) {
15654; CHECK-LABEL: vfnmsub_vf_nxv4f64_neg_splat_unmasked_commute:
15655; CHECK:       # %bb.0:
15656; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
15657; CHECK-NEXT:    vfnmsub.vf v8, fa0, v12
15658; CHECK-NEXT:    ret
15659  %elt.head = insertelement <vscale x 4 x double> poison, double %b, i32 0
15660  %vb = shufflevector <vscale x 4 x double> %elt.head, <vscale x 4 x double> poison, <vscale x 4 x i32> zeroinitializer
15661  %negvb = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %vb, <vscale x 4 x i1> splat (i1 true), i32 %evl)
15662  %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %negvb, <vscale x 4 x double> %va, <vscale x 4 x double> %vc, <vscale x 4 x i1> splat (i1 true), i32 %evl)
15663  ret <vscale x 4 x double> %v
15664}
15665
15666declare <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double>, <vscale x 8 x i1>, i32)
15667
15668define <vscale x 8 x double> @vfmsub_vv_nxv8f64(<vscale x 8 x double> %va, <vscale x 8 x double> %b, <vscale x 8 x double> %c, <vscale x 8 x i1> %m, i32 zeroext %evl) {
15669; CHECK-LABEL: vfmsub_vv_nxv8f64:
15670; CHECK:       # %bb.0:
15671; CHECK-NEXT:    vl8re64.v v24, (a0)
15672; CHECK-NEXT:    vsetvli zero, a1, e64, m8, ta, ma
15673; CHECK-NEXT:    vfmsub.vv v16, v8, v24, v0.t
15674; CHECK-NEXT:    vmv.v.v v8, v16
15675; CHECK-NEXT:    ret
15676  %negc = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %c, <vscale x 8 x i1> %m, i32 %evl)
15677  %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %va, <vscale x 8 x double> %b, <vscale x 8 x double> %negc, <vscale x 8 x i1> %m, i32 %evl)
15678  ret <vscale x 8 x double> %v
15679}
15680
15681define <vscale x 8 x double> @vfmsub_vv_nxv8f64_unmasked(<vscale x 8 x double> %va, <vscale x 8 x double> %b, <vscale x 8 x double> %c, i32 zeroext %evl) {
15682; CHECK-LABEL: vfmsub_vv_nxv8f64_unmasked:
15683; CHECK:       # %bb.0:
15684; CHECK-NEXT:    vl8re64.v v24, (a0)
15685; CHECK-NEXT:    vsetvli zero, a1, e64, m8, ta, ma
15686; CHECK-NEXT:    vfmsub.vv v8, v16, v24
15687; CHECK-NEXT:    ret
15688  %negc = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %c, <vscale x 8 x i1> splat (i1 true), i32 %evl)
15689  %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %va, <vscale x 8 x double> %b, <vscale x 8 x double> %negc, <vscale x 8 x i1> splat (i1 true), i32 %evl)
15690  ret <vscale x 8 x double> %v
15691}
15692
15693define <vscale x 8 x double> @vfmsub_vf_nxv8f64(<vscale x 8 x double> %va, double %b, <vscale x 8 x double> %vc, <vscale x 8 x i1> %m, i32 zeroext %evl) {
15694; CHECK-LABEL: vfmsub_vf_nxv8f64:
15695; CHECK:       # %bb.0:
15696; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma
15697; CHECK-NEXT:    vfmsub.vf v8, fa0, v16, v0.t
15698; CHECK-NEXT:    ret
15699  %elt.head = insertelement <vscale x 8 x double> poison, double %b, i32 0
15700  %vb = shufflevector <vscale x 8 x double> %elt.head, <vscale x 8 x double> poison, <vscale x 8 x i32> zeroinitializer
15701  %negvc = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %vc, <vscale x 8 x i1> %m, i32 %evl)
15702  %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %va, <vscale x 8 x double> %vb, <vscale x 8 x double> %negvc, <vscale x 8 x i1> %m, i32 %evl)
15703  ret <vscale x 8 x double> %v
15704}
15705
15706define <vscale x 8 x double> @vfmsub_vf_nxv8f64_commute(<vscale x 8 x double> %va, double %b, <vscale x 8 x double> %vc, <vscale x 8 x i1> %m, i32 zeroext %evl) {
15707; CHECK-LABEL: vfmsub_vf_nxv8f64_commute:
15708; CHECK:       # %bb.0:
15709; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma
15710; CHECK-NEXT:    vfmsub.vf v8, fa0, v16, v0.t
15711; CHECK-NEXT:    ret
15712  %elt.head = insertelement <vscale x 8 x double> poison, double %b, i32 0
15713  %vb = shufflevector <vscale x 8 x double> %elt.head, <vscale x 8 x double> poison, <vscale x 8 x i32> zeroinitializer
15714  %negvc = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %vc, <vscale x 8 x i1> %m, i32 %evl)
15715  %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %vb, <vscale x 8 x double> %va, <vscale x 8 x double> %negvc, <vscale x 8 x i1> %m, i32 %evl)
15716  ret <vscale x 8 x double> %v
15717}
15718
15719define <vscale x 8 x double> @vfmsub_vf_nxv8f64_unmasked(<vscale x 8 x double> %va, double %b, <vscale x 8 x double> %vc, i32 zeroext %evl) {
15720; CHECK-LABEL: vfmsub_vf_nxv8f64_unmasked:
15721; CHECK:       # %bb.0:
15722; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma
15723; CHECK-NEXT:    vfmsub.vf v8, fa0, v16
15724; CHECK-NEXT:    ret
15725  %elt.head = insertelement <vscale x 8 x double> poison, double %b, i32 0
15726  %vb = shufflevector <vscale x 8 x double> %elt.head, <vscale x 8 x double> poison, <vscale x 8 x i32> zeroinitializer
15727  %negvc = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %vc, <vscale x 8 x i1> splat (i1 true), i32 %evl)
15728  %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %va, <vscale x 8 x double> %vb, <vscale x 8 x double> %negvc, <vscale x 8 x i1> splat (i1 true), i32 %evl)
15729  ret <vscale x 8 x double> %v
15730}
15731
15732define <vscale x 8 x double> @vfmsub_vf_nxv8f64_unmasked_commute(<vscale x 8 x double> %va, double %b, <vscale x 8 x double> %vc, i32 zeroext %evl) {
15733; CHECK-LABEL: vfmsub_vf_nxv8f64_unmasked_commute:
15734; CHECK:       # %bb.0:
15735; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma
15736; CHECK-NEXT:    vfmsub.vf v8, fa0, v16
15737; CHECK-NEXT:    ret
15738  %elt.head = insertelement <vscale x 8 x double> poison, double %b, i32 0
15739  %vb = shufflevector <vscale x 8 x double> %elt.head, <vscale x 8 x double> poison, <vscale x 8 x i32> zeroinitializer
15740  %negvc = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %vc, <vscale x 8 x i1> splat (i1 true), i32 %evl)
15741  %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %vb, <vscale x 8 x double> %va, <vscale x 8 x double> %negvc, <vscale x 8 x i1> splat (i1 true), i32 %evl)
15742  ret <vscale x 8 x double> %v
15743}
15744
15745define <vscale x 8 x double> @vfnmadd_vv_nxv8f64(<vscale x 8 x double> %va, <vscale x 8 x double> %b, <vscale x 8 x double> %c, <vscale x 8 x i1> %m, i32 zeroext %evl) {
15746; CHECK-LABEL: vfnmadd_vv_nxv8f64:
15747; CHECK:       # %bb.0:
15748; CHECK-NEXT:    vl8re64.v v24, (a0)
15749; CHECK-NEXT:    vsetvli zero, a1, e64, m8, ta, ma
15750; CHECK-NEXT:    vfnmadd.vv v16, v8, v24, v0.t
15751; CHECK-NEXT:    vmv.v.v v8, v16
15752; CHECK-NEXT:    ret
15753  %negb = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %b, <vscale x 8 x i1> %m, i32 %evl)
15754  %negc = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %c, <vscale x 8 x i1> %m, i32 %evl)
15755  %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %va, <vscale x 8 x double> %negb, <vscale x 8 x double> %negc, <vscale x 8 x i1> %m, i32 %evl)
15756  ret <vscale x 8 x double> %v
15757}
15758
15759define <vscale x 8 x double> @vfnmadd_vv_nxv8f64_commuted(<vscale x 8 x double> %va, <vscale x 8 x double> %b, <vscale x 8 x double> %c, <vscale x 8 x i1> %m, i32 zeroext %evl) {
15760; CHECK-LABEL: vfnmadd_vv_nxv8f64_commuted:
15761; CHECK:       # %bb.0:
15762; CHECK-NEXT:    vl8re64.v v24, (a0)
15763; CHECK-NEXT:    vsetvli zero, a1, e64, m8, ta, ma
15764; CHECK-NEXT:    vfnmadd.vv v8, v16, v24, v0.t
15765; CHECK-NEXT:    ret
15766  %negb = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %b, <vscale x 8 x i1> %m, i32 %evl)
15767  %negc = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %c, <vscale x 8 x i1> %m, i32 %evl)
15768  %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %negb, <vscale x 8 x double> %va, <vscale x 8 x double> %negc, <vscale x 8 x i1> %m, i32 %evl)
15769  ret <vscale x 8 x double> %v
15770}
15771
15772define <vscale x 8 x double> @vfnmadd_vv_nxv8f64_unmasked(<vscale x 8 x double> %va, <vscale x 8 x double> %b, <vscale x 8 x double> %c, i32 zeroext %evl) {
15773; CHECK-LABEL: vfnmadd_vv_nxv8f64_unmasked:
15774; CHECK:       # %bb.0:
15775; CHECK-NEXT:    vl8re64.v v24, (a0)
15776; CHECK-NEXT:    vsetvli zero, a1, e64, m8, ta, ma
15777; CHECK-NEXT:    vfnmadd.vv v8, v16, v24
15778; CHECK-NEXT:    ret
15779  %negb = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %b, <vscale x 8 x i1> splat (i1 true), i32 %evl)
15780  %negc = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %c, <vscale x 8 x i1> splat (i1 true), i32 %evl)
15781  %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %va, <vscale x 8 x double> %negb, <vscale x 8 x double> %negc, <vscale x 8 x i1> splat (i1 true), i32 %evl)
15782  ret <vscale x 8 x double> %v
15783}
15784
15785define <vscale x 8 x double> @vfnmadd_vv_nxv8f64_unmasked_commuted(<vscale x 8 x double> %va, <vscale x 8 x double> %b, <vscale x 8 x double> %c, i32 zeroext %evl) {
15786; CHECK-LABEL: vfnmadd_vv_nxv8f64_unmasked_commuted:
15787; CHECK:       # %bb.0:
15788; CHECK-NEXT:    vl8re64.v v24, (a0)
15789; CHECK-NEXT:    vsetvli zero, a1, e64, m8, ta, ma
15790; CHECK-NEXT:    vfnmadd.vv v8, v16, v24
15791; CHECK-NEXT:    ret
15792  %negb = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %b, <vscale x 8 x i1> splat (i1 true), i32 %evl)
15793  %negc = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %c, <vscale x 8 x i1> splat (i1 true), i32 %evl)
15794  %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %negb, <vscale x 8 x double> %va, <vscale x 8 x double> %negc, <vscale x 8 x i1> splat (i1 true), i32 %evl)
15795  ret <vscale x 8 x double> %v
15796}
15797
15798define <vscale x 8 x double> @vfnmadd_vf_nxv8f64(<vscale x 8 x double> %va, double %b, <vscale x 8 x double> %vc, <vscale x 8 x i1> %m, i32 zeroext %evl) {
15799; CHECK-LABEL: vfnmadd_vf_nxv8f64:
15800; CHECK:       # %bb.0:
15801; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma
15802; CHECK-NEXT:    vfnmadd.vf v8, fa0, v16, v0.t
15803; CHECK-NEXT:    ret
15804  %elt.head = insertelement <vscale x 8 x double> poison, double %b, i32 0
15805  %vb = shufflevector <vscale x 8 x double> %elt.head, <vscale x 8 x double> poison, <vscale x 8 x i32> zeroinitializer
15806  %negva = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %va, <vscale x 8 x i1> %m, i32 %evl)
15807  %negvc = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %vc, <vscale x 8 x i1> %m, i32 %evl)
15808  %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %negva, <vscale x 8 x double> %vb, <vscale x 8 x double> %negvc, <vscale x 8 x i1> %m, i32 %evl)
15809  ret <vscale x 8 x double> %v
15810}
15811
15812define <vscale x 8 x double> @vfnmadd_vf_nxv8f64_commute(<vscale x 8 x double> %va, double %b, <vscale x 8 x double> %vc, <vscale x 8 x i1> %m, i32 zeroext %evl) {
15813; CHECK-LABEL: vfnmadd_vf_nxv8f64_commute:
15814; CHECK:       # %bb.0:
15815; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma
15816; CHECK-NEXT:    vfnmadd.vf v8, fa0, v16, v0.t
15817; CHECK-NEXT:    ret
15818  %elt.head = insertelement <vscale x 8 x double> poison, double %b, i32 0
15819  %vb = shufflevector <vscale x 8 x double> %elt.head, <vscale x 8 x double> poison, <vscale x 8 x i32> zeroinitializer
15820  %negva = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %va, <vscale x 8 x i1> %m, i32 %evl)
15821  %negvc = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %vc, <vscale x 8 x i1> %m, i32 %evl)
15822  %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %vb, <vscale x 8 x double> %negva, <vscale x 8 x double> %negvc, <vscale x 8 x i1> %m, i32 %evl)
15823  ret <vscale x 8 x double> %v
15824}
15825
15826define <vscale x 8 x double> @vfnmadd_vf_nxv8f64_unmasked(<vscale x 8 x double> %va, double %b, <vscale x 8 x double> %vc, i32 zeroext %evl) {
15827; CHECK-LABEL: vfnmadd_vf_nxv8f64_unmasked:
15828; CHECK:       # %bb.0:
15829; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma
15830; CHECK-NEXT:    vfnmadd.vf v8, fa0, v16
15831; CHECK-NEXT:    ret
15832  %elt.head = insertelement <vscale x 8 x double> poison, double %b, i32 0
15833  %vb = shufflevector <vscale x 8 x double> %elt.head, <vscale x 8 x double> poison, <vscale x 8 x i32> zeroinitializer
15834  %negva = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %va, <vscale x 8 x i1> splat (i1 true), i32 %evl)
15835  %negvc = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %vc, <vscale x 8 x i1> splat (i1 true), i32 %evl)
15836  %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %negva, <vscale x 8 x double> %vb, <vscale x 8 x double> %negvc, <vscale x 8 x i1> splat (i1 true), i32 %evl)
15837  ret <vscale x 8 x double> %v
15838}
15839
15840define <vscale x 8 x double> @vfnmadd_vf_nxv8f64_unmasked_commute(<vscale x 8 x double> %va, double %b, <vscale x 8 x double> %vc, i32 zeroext %evl) {
15841; CHECK-LABEL: vfnmadd_vf_nxv8f64_unmasked_commute:
15842; CHECK:       # %bb.0:
15843; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma
15844; CHECK-NEXT:    vfnmadd.vf v8, fa0, v16
15845; CHECK-NEXT:    ret
15846  %elt.head = insertelement <vscale x 8 x double> poison, double %b, i32 0
15847  %vb = shufflevector <vscale x 8 x double> %elt.head, <vscale x 8 x double> poison, <vscale x 8 x i32> zeroinitializer
15848  %negva = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %va, <vscale x 8 x i1> splat (i1 true), i32 %evl)
15849  %negvc = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %vc, <vscale x 8 x i1> splat (i1 true), i32 %evl)
15850  %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %vb, <vscale x 8 x double> %negva, <vscale x 8 x double> %negvc, <vscale x 8 x i1> splat (i1 true), i32 %evl)
15851  ret <vscale x 8 x double> %v
15852}
15853
15854define <vscale x 8 x double> @vfnmadd_vf_nxv8f64_neg_splat(<vscale x 8 x double> %va, double %b, <vscale x 8 x double> %vc, <vscale x 8 x i1> %m, i32 zeroext %evl) {
15855; CHECK-LABEL: vfnmadd_vf_nxv8f64_neg_splat:
15856; CHECK:       # %bb.0:
15857; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma
15858; CHECK-NEXT:    vfnmadd.vf v8, fa0, v16, v0.t
15859; CHECK-NEXT:    ret
15860  %elt.head = insertelement <vscale x 8 x double> poison, double %b, i32 0
15861  %vb = shufflevector <vscale x 8 x double> %elt.head, <vscale x 8 x double> poison, <vscale x 8 x i32> zeroinitializer
15862  %negvb = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %vb, <vscale x 8 x i1> %m, i32 %evl)
15863  %negvc = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %vc, <vscale x 8 x i1> %m, i32 %evl)
15864  %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %va, <vscale x 8 x double> %negvb, <vscale x 8 x double> %negvc, <vscale x 8 x i1> %m, i32 %evl)
15865  ret <vscale x 8 x double> %v
15866}
15867
15868define <vscale x 8 x double> @vfnmadd_vf_nxv8f64_neg_splat_commute(<vscale x 8 x double> %va, double %b, <vscale x 8 x double> %vc, <vscale x 8 x i1> %m, i32 zeroext %evl) {
15869; CHECK-LABEL: vfnmadd_vf_nxv8f64_neg_splat_commute:
15870; CHECK:       # %bb.0:
15871; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma
15872; CHECK-NEXT:    vfnmadd.vf v8, fa0, v16, v0.t
15873; CHECK-NEXT:    ret
15874  %elt.head = insertelement <vscale x 8 x double> poison, double %b, i32 0
15875  %vb = shufflevector <vscale x 8 x double> %elt.head, <vscale x 8 x double> poison, <vscale x 8 x i32> zeroinitializer
15876  %negvb = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %vb, <vscale x 8 x i1> %m, i32 %evl)
15877  %negvc = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %vc, <vscale x 8 x i1> %m, i32 %evl)
15878  %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %negvb, <vscale x 8 x double> %va, <vscale x 8 x double> %negvc, <vscale x 8 x i1> %m, i32 %evl)
15879  ret <vscale x 8 x double> %v
15880}
15881
15882define <vscale x 8 x double> @vfnmadd_vf_nxv8f64_neg_splat_unmasked(<vscale x 8 x double> %va, double %b, <vscale x 8 x double> %vc, i32 zeroext %evl) {
15883; CHECK-LABEL: vfnmadd_vf_nxv8f64_neg_splat_unmasked:
15884; CHECK:       # %bb.0:
15885; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma
15886; CHECK-NEXT:    vfnmadd.vf v8, fa0, v16
15887; CHECK-NEXT:    ret
15888  %elt.head = insertelement <vscale x 8 x double> poison, double %b, i32 0
15889  %vb = shufflevector <vscale x 8 x double> %elt.head, <vscale x 8 x double> poison, <vscale x 8 x i32> zeroinitializer
15890  %negvb = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %vb, <vscale x 8 x i1> splat (i1 true), i32 %evl)
15891  %negvc = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %vc, <vscale x 8 x i1> splat (i1 true), i32 %evl)
15892  %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %va, <vscale x 8 x double> %negvb, <vscale x 8 x double> %negvc, <vscale x 8 x i1> splat (i1 true), i32 %evl)
15893  ret <vscale x 8 x double> %v
15894}
15895
15896define <vscale x 8 x double> @vfnmadd_vf_nxv8f64_neg_splat_unmasked_commute(<vscale x 8 x double> %va, double %b, <vscale x 8 x double> %vc, i32 zeroext %evl) {
15897; CHECK-LABEL: vfnmadd_vf_nxv8f64_neg_splat_unmasked_commute:
15898; CHECK:       # %bb.0:
15899; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma
15900; CHECK-NEXT:    vfnmadd.vf v8, fa0, v16
15901; CHECK-NEXT:    ret
15902  %elt.head = insertelement <vscale x 8 x double> poison, double %b, i32 0
15903  %vb = shufflevector <vscale x 8 x double> %elt.head, <vscale x 8 x double> poison, <vscale x 8 x i32> zeroinitializer
15904  %negvb = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %vb, <vscale x 8 x i1> splat (i1 true), i32 %evl)
15905  %negvc = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %vc, <vscale x 8 x i1> splat (i1 true), i32 %evl)
15906  %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %negvb, <vscale x 8 x double> %va, <vscale x 8 x double> %negvc, <vscale x 8 x i1> splat (i1 true), i32 %evl)
15907  ret <vscale x 8 x double> %v
15908}
15909
15910define <vscale x 8 x double> @vfnmsub_vv_nxv8f64(<vscale x 8 x double> %va, <vscale x 8 x double> %b, <vscale x 8 x double> %c, <vscale x 8 x i1> %m, i32 zeroext %evl) {
15911; CHECK-LABEL: vfnmsub_vv_nxv8f64:
15912; CHECK:       # %bb.0:
15913; CHECK-NEXT:    vl8re64.v v24, (a0)
15914; CHECK-NEXT:    vsetvli zero, a1, e64, m8, ta, ma
15915; CHECK-NEXT:    vfnmadd.vv v16, v8, v24, v0.t
15916; CHECK-NEXT:    vmv.v.v v8, v16
15917; CHECK-NEXT:    ret
15918  %negb = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %b, <vscale x 8 x i1> %m, i32 %evl)
15919  %negc = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %c, <vscale x 8 x i1> %m, i32 %evl)
15920  %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %va, <vscale x 8 x double> %negb, <vscale x 8 x double> %negc, <vscale x 8 x i1> %m, i32 %evl)
15921  ret <vscale x 8 x double> %v
15922}
15923
15924define <vscale x 8 x double> @vfnmsub_vv_nxv8f64_commuted(<vscale x 8 x double> %va, <vscale x 8 x double> %b, <vscale x 8 x double> %c, <vscale x 8 x i1> %m, i32 zeroext %evl) {
15925; CHECK-LABEL: vfnmsub_vv_nxv8f64_commuted:
15926; CHECK:       # %bb.0:
15927; CHECK-NEXT:    vl8re64.v v24, (a0)
15928; CHECK-NEXT:    vsetvli zero, a1, e64, m8, ta, ma
15929; CHECK-NEXT:    vfnmadd.vv v8, v16, v24, v0.t
15930; CHECK-NEXT:    ret
15931  %negb = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %b, <vscale x 8 x i1> %m, i32 %evl)
15932  %negc = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %c, <vscale x 8 x i1> %m, i32 %evl)
15933  %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %negb, <vscale x 8 x double> %va, <vscale x 8 x double> %negc, <vscale x 8 x i1> %m, i32 %evl)
15934  ret <vscale x 8 x double> %v
15935}
15936
15937define <vscale x 8 x double> @vfnmsub_vv_nxv8f64_unmasked(<vscale x 8 x double> %va, <vscale x 8 x double> %b, <vscale x 8 x double> %c, i32 zeroext %evl) {
15938; CHECK-LABEL: vfnmsub_vv_nxv8f64_unmasked:
15939; CHECK:       # %bb.0:
15940; CHECK-NEXT:    vl8re64.v v24, (a0)
15941; CHECK-NEXT:    vsetvli zero, a1, e64, m8, ta, ma
15942; CHECK-NEXT:    vfnmadd.vv v8, v16, v24
15943; CHECK-NEXT:    ret
15944  %negb = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %b, <vscale x 8 x i1> splat (i1 true), i32 %evl)
15945  %negc = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %c, <vscale x 8 x i1> splat (i1 true), i32 %evl)
15946  %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %va, <vscale x 8 x double> %negb, <vscale x 8 x double> %negc, <vscale x 8 x i1> splat (i1 true), i32 %evl)
15947  ret <vscale x 8 x double> %v
15948}
15949
15950define <vscale x 8 x double> @vfnmsub_vv_nxv8f64_unmasked_commuted(<vscale x 8 x double> %va, <vscale x 8 x double> %b, <vscale x 8 x double> %c, i32 zeroext %evl) {
15951; CHECK-LABEL: vfnmsub_vv_nxv8f64_unmasked_commuted:
15952; CHECK:       # %bb.0:
15953; CHECK-NEXT:    vl8re64.v v24, (a0)
15954; CHECK-NEXT:    vsetvli zero, a1, e64, m8, ta, ma
15955; CHECK-NEXT:    vfnmadd.vv v8, v16, v24
15956; CHECK-NEXT:    ret
15957  %negb = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %b, <vscale x 8 x i1> splat (i1 true), i32 %evl)
15958  %negc = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %c, <vscale x 8 x i1> splat (i1 true), i32 %evl)
15959  %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %negb, <vscale x 8 x double> %va, <vscale x 8 x double> %negc, <vscale x 8 x i1> splat (i1 true), i32 %evl)
15960  ret <vscale x 8 x double> %v
15961}
15962
15963define <vscale x 8 x double> @vfnmsub_vf_nxv8f64(<vscale x 8 x double> %va, double %b, <vscale x 8 x double> %vc, <vscale x 8 x i1> %m, i32 zeroext %evl) {
15964; CHECK-LABEL: vfnmsub_vf_nxv8f64:
15965; CHECK:       # %bb.0:
15966; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma
15967; CHECK-NEXT:    vfnmsub.vf v8, fa0, v16, v0.t
15968; CHECK-NEXT:    ret
15969  %elt.head = insertelement <vscale x 8 x double> poison, double %b, i32 0
15970  %vb = shufflevector <vscale x 8 x double> %elt.head, <vscale x 8 x double> poison, <vscale x 8 x i32> zeroinitializer
15971  %negva = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %va, <vscale x 8 x i1> %m, i32 %evl)
15972  %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %negva, <vscale x 8 x double> %vb, <vscale x 8 x double> %vc, <vscale x 8 x i1> %m, i32 %evl)
15973  ret <vscale x 8 x double> %v
15974}
15975
15976define <vscale x 8 x double> @vfnmsub_vf_nxv8f64_commute(<vscale x 8 x double> %va, double %b, <vscale x 8 x double> %vc, <vscale x 8 x i1> %m, i32 zeroext %evl) {
15977; CHECK-LABEL: vfnmsub_vf_nxv8f64_commute:
15978; CHECK:       # %bb.0:
15979; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma
15980; CHECK-NEXT:    vfnmsub.vf v8, fa0, v16, v0.t
15981; CHECK-NEXT:    ret
15982  %elt.head = insertelement <vscale x 8 x double> poison, double %b, i32 0
15983  %vb = shufflevector <vscale x 8 x double> %elt.head, <vscale x 8 x double> poison, <vscale x 8 x i32> zeroinitializer
15984  %negva = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %va, <vscale x 8 x i1> %m, i32 %evl)
15985  %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %vb, <vscale x 8 x double> %negva, <vscale x 8 x double> %vc, <vscale x 8 x i1> %m, i32 %evl)
15986  ret <vscale x 8 x double> %v
15987}
15988
15989define <vscale x 8 x double> @vfnmsub_vf_nxv8f64_unmasked(<vscale x 8 x double> %va, double %b, <vscale x 8 x double> %vc, i32 zeroext %evl) {
15990; CHECK-LABEL: vfnmsub_vf_nxv8f64_unmasked:
15991; CHECK:       # %bb.0:
15992; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma
15993; CHECK-NEXT:    vfnmsub.vf v8, fa0, v16
15994; CHECK-NEXT:    ret
15995  %elt.head = insertelement <vscale x 8 x double> poison, double %b, i32 0
15996  %vb = shufflevector <vscale x 8 x double> %elt.head, <vscale x 8 x double> poison, <vscale x 8 x i32> zeroinitializer
15997  %negva = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %va, <vscale x 8 x i1> splat (i1 true), i32 %evl)
15998  %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %negva, <vscale x 8 x double> %vb, <vscale x 8 x double> %vc, <vscale x 8 x i1> splat (i1 true), i32 %evl)
15999  ret <vscale x 8 x double> %v
16000}
16001
16002define <vscale x 8 x double> @vfnmsub_vf_nxv8f64_unmasked_commute(<vscale x 8 x double> %va, double %b, <vscale x 8 x double> %vc, i32 zeroext %evl) {
16003; CHECK-LABEL: vfnmsub_vf_nxv8f64_unmasked_commute:
16004; CHECK:       # %bb.0:
16005; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma
16006; CHECK-NEXT:    vfnmsub.vf v8, fa0, v16
16007; CHECK-NEXT:    ret
16008  %elt.head = insertelement <vscale x 8 x double> poison, double %b, i32 0
16009  %vb = shufflevector <vscale x 8 x double> %elt.head, <vscale x 8 x double> poison, <vscale x 8 x i32> zeroinitializer
16010  %negva = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %va, <vscale x 8 x i1> splat (i1 true), i32 %evl)
16011  %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %vb, <vscale x 8 x double> %negva, <vscale x 8 x double> %vc, <vscale x 8 x i1> splat (i1 true), i32 %evl)
16012  ret <vscale x 8 x double> %v
16013}
16014
16015define <vscale x 8 x double> @vfnmsub_vf_nxv8f64_neg_splat(<vscale x 8 x double> %va, double %b, <vscale x 8 x double> %vc, <vscale x 8 x i1> %m, i32 zeroext %evl) {
16016; CHECK-LABEL: vfnmsub_vf_nxv8f64_neg_splat:
16017; CHECK:       # %bb.0:
16018; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma
16019; CHECK-NEXT:    vfnmsub.vf v8, fa0, v16, v0.t
16020; CHECK-NEXT:    ret
16021  %elt.head = insertelement <vscale x 8 x double> poison, double %b, i32 0
16022  %vb = shufflevector <vscale x 8 x double> %elt.head, <vscale x 8 x double> poison, <vscale x 8 x i32> zeroinitializer
16023  %negvb = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %vb, <vscale x 8 x i1> %m, i32 %evl)
16024  %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %va, <vscale x 8 x double> %negvb, <vscale x 8 x double> %vc, <vscale x 8 x i1> %m, i32 %evl)
16025  ret <vscale x 8 x double> %v
16026}
16027
16028define <vscale x 8 x double> @vfnmsub_vf_nxv8f64_neg_splat_commute(<vscale x 8 x double> %va, double %b, <vscale x 8 x double> %vc, <vscale x 8 x i1> %m, i32 zeroext %evl) {
16029; CHECK-LABEL: vfnmsub_vf_nxv8f64_neg_splat_commute:
16030; CHECK:       # %bb.0:
16031; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma
16032; CHECK-NEXT:    vfnmsub.vf v8, fa0, v16, v0.t
16033; CHECK-NEXT:    ret
16034  %elt.head = insertelement <vscale x 8 x double> poison, double %b, i32 0
16035  %vb = shufflevector <vscale x 8 x double> %elt.head, <vscale x 8 x double> poison, <vscale x 8 x i32> zeroinitializer
16036  %negvb = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %vb, <vscale x 8 x i1> %m, i32 %evl)
16037  %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %negvb, <vscale x 8 x double> %va, <vscale x 8 x double> %vc, <vscale x 8 x i1> %m, i32 %evl)
16038  ret <vscale x 8 x double> %v
16039}
16040
16041define <vscale x 8 x double> @vfnmsub_vf_nxv8f64_neg_splat_unmasked(<vscale x 8 x double> %va, double %b, <vscale x 8 x double> %vc, i32 zeroext %evl) {
16042; CHECK-LABEL: vfnmsub_vf_nxv8f64_neg_splat_unmasked:
16043; CHECK:       # %bb.0:
16044; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma
16045; CHECK-NEXT:    vfnmsub.vf v8, fa0, v16
16046; CHECK-NEXT:    ret
16047  %elt.head = insertelement <vscale x 8 x double> poison, double %b, i32 0
16048  %vb = shufflevector <vscale x 8 x double> %elt.head, <vscale x 8 x double> poison, <vscale x 8 x i32> zeroinitializer
16049  %negvb = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %vb, <vscale x 8 x i1> splat (i1 true), i32 %evl)
16050  %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %va, <vscale x 8 x double> %negvb, <vscale x 8 x double> %vc, <vscale x 8 x i1> splat (i1 true), i32 %evl)
16051  ret <vscale x 8 x double> %v
16052}
16053
16054define <vscale x 8 x double> @vfnmsub_vf_nxv8f64_neg_splat_unmasked_commute(<vscale x 8 x double> %va, double %b, <vscale x 8 x double> %vc, i32 zeroext %evl) {
16055; CHECK-LABEL: vfnmsub_vf_nxv8f64_neg_splat_unmasked_commute:
16056; CHECK:       # %bb.0:
16057; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma
16058; CHECK-NEXT:    vfnmsub.vf v8, fa0, v16
16059; CHECK-NEXT:    ret
16060  %elt.head = insertelement <vscale x 8 x double> poison, double %b, i32 0
16061  %vb = shufflevector <vscale x 8 x double> %elt.head, <vscale x 8 x double> poison, <vscale x 8 x i32> zeroinitializer
16062  %negvb = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %vb, <vscale x 8 x i1> splat (i1 true), i32 %evl)
16063  %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %negvb, <vscale x 8 x double> %va, <vscale x 8 x double> %vc, <vscale x 8 x i1> splat (i1 true), i32 %evl)
16064  ret <vscale x 8 x double> %v
16065}
16066
16067define <vscale x 1 x half> @vfma_vv_nxv1f16_double_neg(<vscale x 1 x half> %a, <vscale x 1 x half> %b, <vscale x 1 x half> %c, <vscale x 1 x i1> %m, i32 zeroext %evl) {
16068; ZVFH-LABEL: vfma_vv_nxv1f16_double_neg:
16069; ZVFH:       # %bb.0:
16070; ZVFH-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
16071; ZVFH-NEXT:    vfmadd.vv v9, v8, v10, v0.t
16072; ZVFH-NEXT:    vmv1r.v v8, v9
16073; ZVFH-NEXT:    ret
16074;
16075; ZVFHMIN-LABEL: vfma_vv_nxv1f16_double_neg:
16076; ZVFHMIN:       # %bb.0:
16077; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
16078; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v10, v0.t
16079; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v8, v0.t
16080; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v9, v0.t
16081; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, mf2, ta, ma
16082; ZVFHMIN-NEXT:    vfmadd.vv v12, v10, v11, v0.t
16083; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf4, ta, ma
16084; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v12, v0.t
16085; ZVFHMIN-NEXT:    ret
16086  %nega = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %a, <vscale x 1 x i1> %m, i32 %evl)
16087  %negb = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %b, <vscale x 1 x i1> %m, i32 %evl)
16088  %v = call <vscale x 1 x half> @llvm.vp.fma.nxv1f16(<vscale x 1 x half> %nega, <vscale x 1 x half> %negb, <vscale x 1 x half> %c, <vscale x 1 x i1> %m, i32 %evl)
16089  ret <vscale x 1 x half> %v
16090}
16091