xref: /llvm-project/llvm/test/CodeGen/RISCV/rvv/unaligned-loads-stores.ll (revision 1cb599835ccf7ee8b2d1d5a7f3107e19a26fc6f5) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple riscv32 -mattr=+d,+zvfh,+v < %s \
3; RUN:    -verify-machineinstrs | FileCheck %s
4; RUN: llc -mtriple riscv64 -mattr=+d,+zvfh,+v < %s \
5; RUN:    -verify-machineinstrs | FileCheck %s
6; RUN: llc -mtriple riscv32 -mattr=+d,+zvfh,+v,+unaligned-vector-mem < %s \
7; RUN:    -verify-machineinstrs | FileCheck --check-prefix=FAST %s
8; RUN: llc -mtriple riscv64 -mattr=+d,+zvfh,+v,+unaligned-vector-mem < %s \
9; RUN:    -verify-machineinstrs | FileCheck --check-prefix=FAST %s
10
11
12define <vscale x 1 x i32> @unaligned_load_nxv1i32_a1(ptr %ptr) {
13; CHECK-LABEL: unaligned_load_nxv1i32_a1:
14; CHECK:       # %bb.0:
15; CHECK-NEXT:    vsetvli a1, zero, e8, mf2, ta, ma
16; CHECK-NEXT:    vle8.v v8, (a0)
17; CHECK-NEXT:    ret
18;
19; FAST-LABEL: unaligned_load_nxv1i32_a1:
20; FAST:       # %bb.0:
21; FAST-NEXT:    vsetvli a1, zero, e32, mf2, ta, ma
22; FAST-NEXT:    vle32.v v8, (a0)
23; FAST-NEXT:    ret
24  %v = load <vscale x 1 x i32>, ptr %ptr, align 1
25  ret <vscale x 1 x i32> %v
26}
27
28define <vscale x 1 x i32> @unaligned_load_nxv1i32_a2(ptr %ptr) {
29; CHECK-LABEL: unaligned_load_nxv1i32_a2:
30; CHECK:       # %bb.0:
31; CHECK-NEXT:    vsetvli a1, zero, e8, mf2, ta, ma
32; CHECK-NEXT:    vle8.v v8, (a0)
33; CHECK-NEXT:    ret
34;
35; FAST-LABEL: unaligned_load_nxv1i32_a2:
36; FAST:       # %bb.0:
37; FAST-NEXT:    vsetvli a1, zero, e32, mf2, ta, ma
38; FAST-NEXT:    vle32.v v8, (a0)
39; FAST-NEXT:    ret
40  %v = load <vscale x 1 x i32>, ptr %ptr, align 2
41  ret <vscale x 1 x i32> %v
42}
43
44define <vscale x 1 x i32> @aligned_load_nxv1i32_a4(ptr %ptr) {
45; CHECK-LABEL: aligned_load_nxv1i32_a4:
46; CHECK:       # %bb.0:
47; CHECK-NEXT:    vsetvli a1, zero, e32, mf2, ta, ma
48; CHECK-NEXT:    vle32.v v8, (a0)
49; CHECK-NEXT:    ret
50;
51; FAST-LABEL: aligned_load_nxv1i32_a4:
52; FAST:       # %bb.0:
53; FAST-NEXT:    vsetvli a1, zero, e32, mf2, ta, ma
54; FAST-NEXT:    vle32.v v8, (a0)
55; FAST-NEXT:    ret
56  %v = load <vscale x 1 x i32>, ptr %ptr, align 4
57  ret <vscale x 1 x i32> %v
58}
59
60define <vscale x 1 x i64> @unaligned_load_nxv1i64_a1(ptr %ptr) {
61; CHECK-LABEL: unaligned_load_nxv1i64_a1:
62; CHECK:       # %bb.0:
63; CHECK-NEXT:    vl1r.v v8, (a0)
64; CHECK-NEXT:    ret
65;
66; FAST-LABEL: unaligned_load_nxv1i64_a1:
67; FAST:       # %bb.0:
68; FAST-NEXT:    vl1re64.v v8, (a0)
69; FAST-NEXT:    ret
70  %v = load <vscale x 1 x i64>, ptr %ptr, align 1
71  ret <vscale x 1 x i64> %v
72}
73
74define <vscale x 1 x i64> @unaligned_load_nxv1i64_a4(ptr %ptr) {
75; CHECK-LABEL: unaligned_load_nxv1i64_a4:
76; CHECK:       # %bb.0:
77; CHECK-NEXT:    vl1r.v v8, (a0)
78; CHECK-NEXT:    ret
79;
80; FAST-LABEL: unaligned_load_nxv1i64_a4:
81; FAST:       # %bb.0:
82; FAST-NEXT:    vl1re64.v v8, (a0)
83; FAST-NEXT:    ret
84  %v = load <vscale x 1 x i64>, ptr %ptr, align 4
85  ret <vscale x 1 x i64> %v
86}
87
88define <vscale x 1 x i64> @aligned_load_nxv1i64_a8(ptr %ptr) {
89; CHECK-LABEL: aligned_load_nxv1i64_a8:
90; CHECK:       # %bb.0:
91; CHECK-NEXT:    vl1re64.v v8, (a0)
92; CHECK-NEXT:    ret
93;
94; FAST-LABEL: aligned_load_nxv1i64_a8:
95; FAST:       # %bb.0:
96; FAST-NEXT:    vl1re64.v v8, (a0)
97; FAST-NEXT:    ret
98  %v = load <vscale x 1 x i64>, ptr %ptr, align 8
99  ret <vscale x 1 x i64> %v
100}
101
102define <vscale x 2 x i64> @unaligned_load_nxv2i64_a1(ptr %ptr) {
103; CHECK-LABEL: unaligned_load_nxv2i64_a1:
104; CHECK:       # %bb.0:
105; CHECK-NEXT:    vl2r.v v8, (a0)
106; CHECK-NEXT:    ret
107;
108; FAST-LABEL: unaligned_load_nxv2i64_a1:
109; FAST:       # %bb.0:
110; FAST-NEXT:    vl2re64.v v8, (a0)
111; FAST-NEXT:    ret
112  %v = load <vscale x 2 x i64>, ptr %ptr, align 1
113  ret <vscale x 2 x i64> %v
114}
115
116define <vscale x 2 x i64> @unaligned_load_nxv2i64_a4(ptr %ptr) {
117; CHECK-LABEL: unaligned_load_nxv2i64_a4:
118; CHECK:       # %bb.0:
119; CHECK-NEXT:    vl2r.v v8, (a0)
120; CHECK-NEXT:    ret
121;
122; FAST-LABEL: unaligned_load_nxv2i64_a4:
123; FAST:       # %bb.0:
124; FAST-NEXT:    vl2re64.v v8, (a0)
125; FAST-NEXT:    ret
126  %v = load <vscale x 2 x i64>, ptr %ptr, align 4
127  ret <vscale x 2 x i64> %v
128}
129
130define <vscale x 2 x i64> @aligned_load_nxv2i64_a8(ptr %ptr) {
131; CHECK-LABEL: aligned_load_nxv2i64_a8:
132; CHECK:       # %bb.0:
133; CHECK-NEXT:    vl2re64.v v8, (a0)
134; CHECK-NEXT:    ret
135;
136; FAST-LABEL: aligned_load_nxv2i64_a8:
137; FAST:       # %bb.0:
138; FAST-NEXT:    vl2re64.v v8, (a0)
139; FAST-NEXT:    ret
140  %v = load <vscale x 2 x i64>, ptr %ptr, align 8
141  ret <vscale x 2 x i64> %v
142}
143
144; Masks should always be aligned
145define <vscale x 1 x i1> @unaligned_load_nxv1i1_a1(ptr %ptr) {
146; CHECK-LABEL: unaligned_load_nxv1i1_a1:
147; CHECK:       # %bb.0:
148; CHECK-NEXT:    vsetvli a1, zero, e8, mf8, ta, ma
149; CHECK-NEXT:    vlm.v v0, (a0)
150; CHECK-NEXT:    ret
151;
152; FAST-LABEL: unaligned_load_nxv1i1_a1:
153; FAST:       # %bb.0:
154; FAST-NEXT:    vsetvli a1, zero, e8, mf8, ta, ma
155; FAST-NEXT:    vlm.v v0, (a0)
156; FAST-NEXT:    ret
157  %v = load <vscale x 1 x i1>, ptr %ptr, align 1
158  ret <vscale x 1 x i1> %v
159}
160
161define <vscale x 4 x float> @unaligned_load_nxv4f32_a1(ptr %ptr) {
162; CHECK-LABEL: unaligned_load_nxv4f32_a1:
163; CHECK:       # %bb.0:
164; CHECK-NEXT:    vl2r.v v8, (a0)
165; CHECK-NEXT:    ret
166;
167; FAST-LABEL: unaligned_load_nxv4f32_a1:
168; FAST:       # %bb.0:
169; FAST-NEXT:    vl2re32.v v8, (a0)
170; FAST-NEXT:    ret
171  %v = load <vscale x 4 x float>, ptr %ptr, align 1
172  ret <vscale x 4 x float> %v
173}
174
175define <vscale x 4 x float> @unaligned_load_nxv4f32_a2(ptr %ptr) {
176; CHECK-LABEL: unaligned_load_nxv4f32_a2:
177; CHECK:       # %bb.0:
178; CHECK-NEXT:    vl2r.v v8, (a0)
179; CHECK-NEXT:    ret
180;
181; FAST-LABEL: unaligned_load_nxv4f32_a2:
182; FAST:       # %bb.0:
183; FAST-NEXT:    vl2re32.v v8, (a0)
184; FAST-NEXT:    ret
185  %v = load <vscale x 4 x float>, ptr %ptr, align 2
186  ret <vscale x 4 x float> %v
187}
188
189define <vscale x 4 x float> @aligned_load_nxv4f32_a4(ptr %ptr) {
190; CHECK-LABEL: aligned_load_nxv4f32_a4:
191; CHECK:       # %bb.0:
192; CHECK-NEXT:    vl2re32.v v8, (a0)
193; CHECK-NEXT:    ret
194;
195; FAST-LABEL: aligned_load_nxv4f32_a4:
196; FAST:       # %bb.0:
197; FAST-NEXT:    vl2re32.v v8, (a0)
198; FAST-NEXT:    ret
199  %v = load <vscale x 4 x float>, ptr %ptr, align 4
200  ret <vscale x 4 x float> %v
201}
202
203define <vscale x 8 x half> @unaligned_load_nxv8f16_a1(ptr %ptr) {
204; CHECK-LABEL: unaligned_load_nxv8f16_a1:
205; CHECK:       # %bb.0:
206; CHECK-NEXT:    vl2r.v v8, (a0)
207; CHECK-NEXT:    ret
208;
209; FAST-LABEL: unaligned_load_nxv8f16_a1:
210; FAST:       # %bb.0:
211; FAST-NEXT:    vl2re16.v v8, (a0)
212; FAST-NEXT:    ret
213  %v = load <vscale x 8 x half>, ptr %ptr, align 1
214  ret <vscale x 8 x half> %v
215}
216
217define <vscale x 8 x half> @aligned_load_nxv8f16_a2(ptr %ptr) {
218; CHECK-LABEL: aligned_load_nxv8f16_a2:
219; CHECK:       # %bb.0:
220; CHECK-NEXT:    vl2re16.v v8, (a0)
221; CHECK-NEXT:    ret
222;
223; FAST-LABEL: aligned_load_nxv8f16_a2:
224; FAST:       # %bb.0:
225; FAST-NEXT:    vl2re16.v v8, (a0)
226; FAST-NEXT:    ret
227  %v = load <vscale x 8 x half>, ptr %ptr, align 2
228  ret <vscale x 8 x half> %v
229}
230
231define void @unaligned_store_nxv4i32_a1(<vscale x 4 x i32> %x, ptr %ptr) {
232; CHECK-LABEL: unaligned_store_nxv4i32_a1:
233; CHECK:       # %bb.0:
234; CHECK-NEXT:    vs2r.v v8, (a0)
235; CHECK-NEXT:    ret
236;
237; FAST-LABEL: unaligned_store_nxv4i32_a1:
238; FAST:       # %bb.0:
239; FAST-NEXT:    vs2r.v v8, (a0)
240; FAST-NEXT:    ret
241  store <vscale x 4 x i32> %x, ptr %ptr, align 1
242  ret void
243}
244
245define void @unaligned_store_nxv4i32_a2(<vscale x 4 x i32> %x, ptr %ptr) {
246; CHECK-LABEL: unaligned_store_nxv4i32_a2:
247; CHECK:       # %bb.0:
248; CHECK-NEXT:    vs2r.v v8, (a0)
249; CHECK-NEXT:    ret
250;
251; FAST-LABEL: unaligned_store_nxv4i32_a2:
252; FAST:       # %bb.0:
253; FAST-NEXT:    vs2r.v v8, (a0)
254; FAST-NEXT:    ret
255  store <vscale x 4 x i32> %x, ptr %ptr, align 2
256  ret void
257}
258
259define void @aligned_store_nxv4i32_a4(<vscale x 4 x i32> %x, ptr %ptr) {
260; CHECK-LABEL: aligned_store_nxv4i32_a4:
261; CHECK:       # %bb.0:
262; CHECK-NEXT:    vs2r.v v8, (a0)
263; CHECK-NEXT:    ret
264;
265; FAST-LABEL: aligned_store_nxv4i32_a4:
266; FAST:       # %bb.0:
267; FAST-NEXT:    vs2r.v v8, (a0)
268; FAST-NEXT:    ret
269  store <vscale x 4 x i32> %x, ptr %ptr, align 4
270  ret void
271}
272
273define void @unaligned_store_nxv1i16_a1(<vscale x 1 x i16> %x, ptr %ptr) {
274; CHECK-LABEL: unaligned_store_nxv1i16_a1:
275; CHECK:       # %bb.0:
276; CHECK-NEXT:    vsetvli a1, zero, e8, mf4, ta, ma
277; CHECK-NEXT:    vse8.v v8, (a0)
278; CHECK-NEXT:    ret
279;
280; FAST-LABEL: unaligned_store_nxv1i16_a1:
281; FAST:       # %bb.0:
282; FAST-NEXT:    vsetvli a1, zero, e16, mf4, ta, ma
283; FAST-NEXT:    vse16.v v8, (a0)
284; FAST-NEXT:    ret
285  store <vscale x 1 x i16> %x, ptr %ptr, align 1
286  ret void
287}
288
289define void @aligned_store_nxv1i16_a2(<vscale x 1 x i16> %x, ptr %ptr) {
290; CHECK-LABEL: aligned_store_nxv1i16_a2:
291; CHECK:       # %bb.0:
292; CHECK-NEXT:    vsetvli a1, zero, e16, mf4, ta, ma
293; CHECK-NEXT:    vse16.v v8, (a0)
294; CHECK-NEXT:    ret
295;
296; FAST-LABEL: aligned_store_nxv1i16_a2:
297; FAST:       # %bb.0:
298; FAST-NEXT:    vsetvli a1, zero, e16, mf4, ta, ma
299; FAST-NEXT:    vse16.v v8, (a0)
300; FAST-NEXT:    ret
301  store <vscale x 1 x i16> %x, ptr %ptr, align 2
302  ret void
303}
304