xref: /llvm-project/llvm/test/CodeGen/RISCV/rvv/setcc-int-vp.ll (revision 36e4176f1d83d04cdebb4e1870561099b2478d80) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=riscv32 -mattr=+v,+m -verify-machineinstrs < %s \
3; RUN:   | FileCheck %s --check-prefixes=CHECK,RV32
4; RUN: llc -mtriple=riscv64 -mattr=+v,+m -verify-machineinstrs < %s \
5; RUN:   | FileCheck %s --check-prefixes=CHECK,RV64
6
7; FIXME: We're missing canonicalizations of ISD::VP_SETCC equivalent to those
8; for ISD::SETCC, e.g., splats aren't moved to the RHS.
9
10declare <vscale x 1 x i1> @llvm.vp.icmp.nxv1i8(<vscale x 1 x i8>, <vscale x 1 x i8>, metadata, <vscale x 1 x i1>, i32)
11
12define <vscale x 1 x i1> @icmp_eq_vv_nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) {
13; CHECK-LABEL: icmp_eq_vv_nxv1i8:
14; CHECK:       # %bb.0:
15; CHECK-NEXT:    vsetvli zero, a0, e8, mf8, ta, ma
16; CHECK-NEXT:    vmseq.vv v0, v8, v9, v0.t
17; CHECK-NEXT:    ret
18  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %vb, metadata !"eq", <vscale x 1 x i1> %m, i32 %evl)
19  ret <vscale x 1 x i1> %v
20}
21
22define <vscale x 1 x i1> @icmp_eq_vx_nxv1i8(<vscale x 1 x i8> %va, i8 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {
23; CHECK-LABEL: icmp_eq_vx_nxv1i8:
24; CHECK:       # %bb.0:
25; CHECK-NEXT:    vsetvli zero, a1, e8, mf8, ta, ma
26; CHECK-NEXT:    vmseq.vx v0, v8, a0, v0.t
27; CHECK-NEXT:    ret
28  %elt.head = insertelement <vscale x 1 x i8> poison, i8 %b, i32 0
29  %vb = shufflevector <vscale x 1 x i8> %elt.head, <vscale x 1 x i8> poison, <vscale x 1 x i32> zeroinitializer
30  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %vb, metadata !"eq", <vscale x 1 x i1> %m, i32 %evl)
31  ret <vscale x 1 x i1> %v
32}
33
34define <vscale x 1 x i1> @icmp_eq_vx_swap_nxv1i8(<vscale x 1 x i8> %va, i8 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {
35; CHECK-LABEL: icmp_eq_vx_swap_nxv1i8:
36; CHECK:       # %bb.0:
37; CHECK-NEXT:    vsetvli zero, a1, e8, mf8, ta, ma
38; CHECK-NEXT:    vmseq.vx v0, v8, a0, v0.t
39; CHECK-NEXT:    ret
40  %elt.head = insertelement <vscale x 1 x i8> poison, i8 %b, i32 0
41  %vb = shufflevector <vscale x 1 x i8> %elt.head, <vscale x 1 x i8> poison, <vscale x 1 x i32> zeroinitializer
42  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i8(<vscale x 1 x i8> %vb, <vscale x 1 x i8> %va, metadata !"eq", <vscale x 1 x i1> %m, i32 %evl)
43  ret <vscale x 1 x i1> %v
44}
45
46define <vscale x 1 x i1> @icmp_eq_vi_nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {
47; CHECK-LABEL: icmp_eq_vi_nxv1i8:
48; CHECK:       # %bb.0:
49; CHECK-NEXT:    vsetvli zero, a0, e8, mf8, ta, ma
50; CHECK-NEXT:    vmseq.vi v0, v8, 4, v0.t
51; CHECK-NEXT:    ret
52  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> splat (i8 4), metadata !"eq", <vscale x 1 x i1> %m, i32 %evl)
53  ret <vscale x 1 x i1> %v
54}
55
56define <vscale x 1 x i1> @icmp_eq_vi_swap_nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {
57; CHECK-LABEL: icmp_eq_vi_swap_nxv1i8:
58; CHECK:       # %bb.0:
59; CHECK-NEXT:    vsetvli zero, a0, e8, mf8, ta, ma
60; CHECK-NEXT:    vmseq.vi v0, v8, 4, v0.t
61; CHECK-NEXT:    ret
62  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i8(<vscale x 1 x i8> splat (i8 4), <vscale x 1 x i8> %va, metadata !"eq", <vscale x 1 x i1> %m, i32 %evl)
63  ret <vscale x 1 x i1> %v
64}
65
66define <vscale x 1 x i1> @icmp_ne_vv_nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) {
67; CHECK-LABEL: icmp_ne_vv_nxv1i8:
68; CHECK:       # %bb.0:
69; CHECK-NEXT:    vsetvli zero, a0, e8, mf8, ta, ma
70; CHECK-NEXT:    vmsne.vv v0, v8, v9, v0.t
71; CHECK-NEXT:    ret
72  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %vb, metadata !"ne", <vscale x 1 x i1> %m, i32 %evl)
73  ret <vscale x 1 x i1> %v
74}
75
76define <vscale x 1 x i1> @icmp_ne_vx_nxv1i8(<vscale x 1 x i8> %va, i8 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {
77; CHECK-LABEL: icmp_ne_vx_nxv1i8:
78; CHECK:       # %bb.0:
79; CHECK-NEXT:    vsetvli zero, a1, e8, mf8, ta, ma
80; CHECK-NEXT:    vmsne.vx v0, v8, a0, v0.t
81; CHECK-NEXT:    ret
82  %elt.head = insertelement <vscale x 1 x i8> poison, i8 %b, i32 0
83  %vb = shufflevector <vscale x 1 x i8> %elt.head, <vscale x 1 x i8> poison, <vscale x 1 x i32> zeroinitializer
84  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %vb, metadata !"ne", <vscale x 1 x i1> %m, i32 %evl)
85  ret <vscale x 1 x i1> %v
86}
87
88define <vscale x 1 x i1> @icmp_ne_vx_swap_nxv1i8(<vscale x 1 x i8> %va, i8 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {
89; CHECK-LABEL: icmp_ne_vx_swap_nxv1i8:
90; CHECK:       # %bb.0:
91; CHECK-NEXT:    vsetvli zero, a1, e8, mf8, ta, ma
92; CHECK-NEXT:    vmsne.vx v0, v8, a0, v0.t
93; CHECK-NEXT:    ret
94  %elt.head = insertelement <vscale x 1 x i8> poison, i8 %b, i32 0
95  %vb = shufflevector <vscale x 1 x i8> %elt.head, <vscale x 1 x i8> poison, <vscale x 1 x i32> zeroinitializer
96  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i8(<vscale x 1 x i8> %vb, <vscale x 1 x i8> %va, metadata !"ne", <vscale x 1 x i1> %m, i32 %evl)
97  ret <vscale x 1 x i1> %v
98}
99
100define <vscale x 1 x i1> @icmp_ne_vi_nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {
101; CHECK-LABEL: icmp_ne_vi_nxv1i8:
102; CHECK:       # %bb.0:
103; CHECK-NEXT:    vsetvli zero, a0, e8, mf8, ta, ma
104; CHECK-NEXT:    vmsne.vi v0, v8, 4, v0.t
105; CHECK-NEXT:    ret
106  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> splat (i8 4), metadata !"ne", <vscale x 1 x i1> %m, i32 %evl)
107  ret <vscale x 1 x i1> %v
108}
109
110define <vscale x 1 x i1> @icmp_ne_vi_swap_nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {
111; CHECK-LABEL: icmp_ne_vi_swap_nxv1i8:
112; CHECK:       # %bb.0:
113; CHECK-NEXT:    vsetvli zero, a0, e8, mf8, ta, ma
114; CHECK-NEXT:    vmsne.vi v0, v8, 4, v0.t
115; CHECK-NEXT:    ret
116  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i8(<vscale x 1 x i8> splat (i8 4), <vscale x 1 x i8> %va, metadata !"ne", <vscale x 1 x i1> %m, i32 %evl)
117  ret <vscale x 1 x i1> %v
118}
119
120define <vscale x 1 x i1> @icmp_ugt_vv_nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) {
121; CHECK-LABEL: icmp_ugt_vv_nxv1i8:
122; CHECK:       # %bb.0:
123; CHECK-NEXT:    vsetvli zero, a0, e8, mf8, ta, ma
124; CHECK-NEXT:    vmsltu.vv v0, v9, v8, v0.t
125; CHECK-NEXT:    ret
126  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %vb, metadata !"ugt", <vscale x 1 x i1> %m, i32 %evl)
127  ret <vscale x 1 x i1> %v
128}
129
130define <vscale x 1 x i1> @icmp_ugt_vx_nxv1i8(<vscale x 1 x i8> %va, i8 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {
131; CHECK-LABEL: icmp_ugt_vx_nxv1i8:
132; CHECK:       # %bb.0:
133; CHECK-NEXT:    vsetvli zero, a1, e8, mf8, ta, ma
134; CHECK-NEXT:    vmsgtu.vx v0, v8, a0, v0.t
135; CHECK-NEXT:    ret
136  %elt.head = insertelement <vscale x 1 x i8> poison, i8 %b, i32 0
137  %vb = shufflevector <vscale x 1 x i8> %elt.head, <vscale x 1 x i8> poison, <vscale x 1 x i32> zeroinitializer
138  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %vb, metadata !"ugt", <vscale x 1 x i1> %m, i32 %evl)
139  ret <vscale x 1 x i1> %v
140}
141
142define <vscale x 1 x i1> @icmp_ugt_vx_swap_nxv1i8(<vscale x 1 x i8> %va, i8 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {
143; CHECK-LABEL: icmp_ugt_vx_swap_nxv1i8:
144; CHECK:       # %bb.0:
145; CHECK-NEXT:    vsetvli zero, a1, e8, mf8, ta, ma
146; CHECK-NEXT:    vmsltu.vx v0, v8, a0, v0.t
147; CHECK-NEXT:    ret
148  %elt.head = insertelement <vscale x 1 x i8> poison, i8 %b, i32 0
149  %vb = shufflevector <vscale x 1 x i8> %elt.head, <vscale x 1 x i8> poison, <vscale x 1 x i32> zeroinitializer
150  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i8(<vscale x 1 x i8> %vb, <vscale x 1 x i8> %va, metadata !"ugt", <vscale x 1 x i1> %m, i32 %evl)
151  ret <vscale x 1 x i1> %v
152}
153
154define <vscale x 1 x i1> @icmp_ugt_vi_nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {
155; CHECK-LABEL: icmp_ugt_vi_nxv1i8:
156; CHECK:       # %bb.0:
157; CHECK-NEXT:    vsetvli zero, a0, e8, mf8, ta, ma
158; CHECK-NEXT:    vmsgtu.vi v0, v8, 4, v0.t
159; CHECK-NEXT:    ret
160  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> splat (i8 4), metadata !"ugt", <vscale x 1 x i1> %m, i32 %evl)
161  ret <vscale x 1 x i1> %v
162}
163
164define <vscale x 1 x i1> @icmp_ugt_vi_swap_nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {
165; CHECK-LABEL: icmp_ugt_vi_swap_nxv1i8:
166; CHECK:       # %bb.0:
167; CHECK-NEXT:    vsetvli zero, a0, e8, mf8, ta, ma
168; CHECK-NEXT:    vmsleu.vi v0, v8, 3, v0.t
169; CHECK-NEXT:    ret
170  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i8(<vscale x 1 x i8> splat (i8 4), <vscale x 1 x i8> %va, metadata !"ugt", <vscale x 1 x i1> %m, i32 %evl)
171  ret <vscale x 1 x i1> %v
172}
173
174define <vscale x 1 x i1> @icmp_uge_vv_nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) {
175; CHECK-LABEL: icmp_uge_vv_nxv1i8:
176; CHECK:       # %bb.0:
177; CHECK-NEXT:    vsetvli zero, a0, e8, mf8, ta, ma
178; CHECK-NEXT:    vmsleu.vv v0, v9, v8, v0.t
179; CHECK-NEXT:    ret
180  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %vb, metadata !"uge", <vscale x 1 x i1> %m, i32 %evl)
181  ret <vscale x 1 x i1> %v
182}
183
184define <vscale x 1 x i1> @icmp_uge_vx_nxv1i8(<vscale x 1 x i8> %va, i8 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {
185; CHECK-LABEL: icmp_uge_vx_nxv1i8:
186; CHECK:       # %bb.0:
187; CHECK-NEXT:    vsetvli zero, a1, e8, mf8, ta, ma
188; CHECK-NEXT:    vmv.v.x v9, a0
189; CHECK-NEXT:    vmsleu.vv v0, v9, v8, v0.t
190; CHECK-NEXT:    ret
191  %elt.head = insertelement <vscale x 1 x i8> poison, i8 %b, i32 0
192  %vb = shufflevector <vscale x 1 x i8> %elt.head, <vscale x 1 x i8> poison, <vscale x 1 x i32> zeroinitializer
193  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %vb, metadata !"uge", <vscale x 1 x i1> %m, i32 %evl)
194  ret <vscale x 1 x i1> %v
195}
196
197define <vscale x 1 x i1> @icmp_uge_vx_swap_nxv1i8(<vscale x 1 x i8> %va, i8 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {
198; CHECK-LABEL: icmp_uge_vx_swap_nxv1i8:
199; CHECK:       # %bb.0:
200; CHECK-NEXT:    vsetvli zero, a1, e8, mf8, ta, ma
201; CHECK-NEXT:    vmsleu.vx v0, v8, a0, v0.t
202; CHECK-NEXT:    ret
203  %elt.head = insertelement <vscale x 1 x i8> poison, i8 %b, i32 0
204  %vb = shufflevector <vscale x 1 x i8> %elt.head, <vscale x 1 x i8> poison, <vscale x 1 x i32> zeroinitializer
205  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i8(<vscale x 1 x i8> %vb, <vscale x 1 x i8> %va, metadata !"uge", <vscale x 1 x i1> %m, i32 %evl)
206  ret <vscale x 1 x i1> %v
207}
208
209define <vscale x 1 x i1> @icmp_uge_vi_nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {
210; CHECK-LABEL: icmp_uge_vi_nxv1i8:
211; CHECK:       # %bb.0:
212; CHECK-NEXT:    vsetvli zero, a0, e8, mf8, ta, ma
213; CHECK-NEXT:    vmsgtu.vi v0, v8, 3, v0.t
214; CHECK-NEXT:    ret
215  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> splat (i8 4), metadata !"uge", <vscale x 1 x i1> %m, i32 %evl)
216  ret <vscale x 1 x i1> %v
217}
218
219define <vscale x 1 x i1> @icmp_uge_vi_swap_nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {
220; CHECK-LABEL: icmp_uge_vi_swap_nxv1i8:
221; CHECK:       # %bb.0:
222; CHECK-NEXT:    vsetvli zero, a0, e8, mf8, ta, ma
223; CHECK-NEXT:    vmsleu.vi v0, v8, 4, v0.t
224; CHECK-NEXT:    ret
225  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i8(<vscale x 1 x i8> splat (i8 4), <vscale x 1 x i8> %va, metadata !"uge", <vscale x 1 x i1> %m, i32 %evl)
226  ret <vscale x 1 x i1> %v
227}
228
229define <vscale x 1 x i1> @icmp_ult_vv_nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) {
230; CHECK-LABEL: icmp_ult_vv_nxv1i8:
231; CHECK:       # %bb.0:
232; CHECK-NEXT:    vsetvli zero, a0, e8, mf8, ta, ma
233; CHECK-NEXT:    vmsltu.vv v0, v8, v9, v0.t
234; CHECK-NEXT:    ret
235  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %vb, metadata !"ult", <vscale x 1 x i1> %m, i32 %evl)
236  ret <vscale x 1 x i1> %v
237}
238
239define <vscale x 1 x i1> @icmp_ult_vx_nxv1i8(<vscale x 1 x i8> %va, i8 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {
240; CHECK-LABEL: icmp_ult_vx_nxv1i8:
241; CHECK:       # %bb.0:
242; CHECK-NEXT:    vsetvli zero, a1, e8, mf8, ta, ma
243; CHECK-NEXT:    vmsltu.vx v0, v8, a0, v0.t
244; CHECK-NEXT:    ret
245  %elt.head = insertelement <vscale x 1 x i8> poison, i8 %b, i32 0
246  %vb = shufflevector <vscale x 1 x i8> %elt.head, <vscale x 1 x i8> poison, <vscale x 1 x i32> zeroinitializer
247  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %vb, metadata !"ult", <vscale x 1 x i1> %m, i32 %evl)
248  ret <vscale x 1 x i1> %v
249}
250
251define <vscale x 1 x i1> @icmp_ult_vx_swap_nxv1i8(<vscale x 1 x i8> %va, i8 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {
252; CHECK-LABEL: icmp_ult_vx_swap_nxv1i8:
253; CHECK:       # %bb.0:
254; CHECK-NEXT:    vsetvli zero, a1, e8, mf8, ta, ma
255; CHECK-NEXT:    vmsgtu.vx v0, v8, a0, v0.t
256; CHECK-NEXT:    ret
257  %elt.head = insertelement <vscale x 1 x i8> poison, i8 %b, i32 0
258  %vb = shufflevector <vscale x 1 x i8> %elt.head, <vscale x 1 x i8> poison, <vscale x 1 x i32> zeroinitializer
259  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i8(<vscale x 1 x i8> %vb, <vscale x 1 x i8> %va, metadata !"ult", <vscale x 1 x i1> %m, i32 %evl)
260  ret <vscale x 1 x i1> %v
261}
262
263define <vscale x 1 x i1> @icmp_ult_vi_nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {
264; CHECK-LABEL: icmp_ult_vi_nxv1i8:
265; CHECK:       # %bb.0:
266; CHECK-NEXT:    vsetvli zero, a0, e8, mf8, ta, ma
267; CHECK-NEXT:    vmsleu.vi v0, v8, 3, v0.t
268; CHECK-NEXT:    ret
269  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> splat (i8 4), metadata !"ult", <vscale x 1 x i1> %m, i32 %evl)
270  ret <vscale x 1 x i1> %v
271}
272
273define <vscale x 1 x i1> @icmp_ult_vi_swap_nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {
274; CHECK-LABEL: icmp_ult_vi_swap_nxv1i8:
275; CHECK:       # %bb.0:
276; CHECK-NEXT:    vsetvli zero, a0, e8, mf8, ta, ma
277; CHECK-NEXT:    vmsgtu.vi v0, v8, 4, v0.t
278; CHECK-NEXT:    ret
279  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i8(<vscale x 1 x i8> splat (i8 4), <vscale x 1 x i8> %va, metadata !"ult", <vscale x 1 x i1> %m, i32 %evl)
280  ret <vscale x 1 x i1> %v
281}
282
283define <vscale x 1 x i1> @icmp_sgt_vv_nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) {
284; CHECK-LABEL: icmp_sgt_vv_nxv1i8:
285; CHECK:       # %bb.0:
286; CHECK-NEXT:    vsetvli zero, a0, e8, mf8, ta, ma
287; CHECK-NEXT:    vmslt.vv v0, v9, v8, v0.t
288; CHECK-NEXT:    ret
289  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %vb, metadata !"sgt", <vscale x 1 x i1> %m, i32 %evl)
290  ret <vscale x 1 x i1> %v
291}
292
293define <vscale x 1 x i1> @icmp_sgt_vx_nxv1i8(<vscale x 1 x i8> %va, i8 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {
294; CHECK-LABEL: icmp_sgt_vx_nxv1i8:
295; CHECK:       # %bb.0:
296; CHECK-NEXT:    vsetvli zero, a1, e8, mf8, ta, ma
297; CHECK-NEXT:    vmsgt.vx v0, v8, a0, v0.t
298; CHECK-NEXT:    ret
299  %elt.head = insertelement <vscale x 1 x i8> poison, i8 %b, i32 0
300  %vb = shufflevector <vscale x 1 x i8> %elt.head, <vscale x 1 x i8> poison, <vscale x 1 x i32> zeroinitializer
301  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %vb, metadata !"sgt", <vscale x 1 x i1> %m, i32 %evl)
302  ret <vscale x 1 x i1> %v
303}
304
305define <vscale x 1 x i1> @icmp_sgt_vx_swap_nxv1i8(<vscale x 1 x i8> %va, i8 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {
306; CHECK-LABEL: icmp_sgt_vx_swap_nxv1i8:
307; CHECK:       # %bb.0:
308; CHECK-NEXT:    vsetvli zero, a1, e8, mf8, ta, ma
309; CHECK-NEXT:    vmslt.vx v0, v8, a0, v0.t
310; CHECK-NEXT:    ret
311  %elt.head = insertelement <vscale x 1 x i8> poison, i8 %b, i32 0
312  %vb = shufflevector <vscale x 1 x i8> %elt.head, <vscale x 1 x i8> poison, <vscale x 1 x i32> zeroinitializer
313  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i8(<vscale x 1 x i8> %vb, <vscale x 1 x i8> %va, metadata !"sgt", <vscale x 1 x i1> %m, i32 %evl)
314  ret <vscale x 1 x i1> %v
315}
316
317define <vscale x 1 x i1> @icmp_sgt_vi_nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {
318; CHECK-LABEL: icmp_sgt_vi_nxv1i8:
319; CHECK:       # %bb.0:
320; CHECK-NEXT:    vsetvli zero, a0, e8, mf8, ta, ma
321; CHECK-NEXT:    vmsgt.vi v0, v8, 4, v0.t
322; CHECK-NEXT:    ret
323  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> splat (i8 4), metadata !"sgt", <vscale x 1 x i1> %m, i32 %evl)
324  ret <vscale x 1 x i1> %v
325}
326
327define <vscale x 1 x i1> @icmp_sgt_vi_swap_nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {
328; CHECK-LABEL: icmp_sgt_vi_swap_nxv1i8:
329; CHECK:       # %bb.0:
330; CHECK-NEXT:    vsetvli zero, a0, e8, mf8, ta, ma
331; CHECK-NEXT:    vmsle.vi v0, v8, 3, v0.t
332; CHECK-NEXT:    ret
333  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i8(<vscale x 1 x i8> splat (i8 4), <vscale x 1 x i8> %va, metadata !"sgt", <vscale x 1 x i1> %m, i32 %evl)
334  ret <vscale x 1 x i1> %v
335}
336
337define <vscale x 1 x i1> @icmp_sge_vv_nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) {
338; CHECK-LABEL: icmp_sge_vv_nxv1i8:
339; CHECK:       # %bb.0:
340; CHECK-NEXT:    vsetvli zero, a0, e8, mf8, ta, ma
341; CHECK-NEXT:    vmsle.vv v0, v9, v8, v0.t
342; CHECK-NEXT:    ret
343  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %vb, metadata !"sge", <vscale x 1 x i1> %m, i32 %evl)
344  ret <vscale x 1 x i1> %v
345}
346
347define <vscale x 1 x i1> @icmp_sge_vx_nxv1i8(<vscale x 1 x i8> %va, i8 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {
348; CHECK-LABEL: icmp_sge_vx_nxv1i8:
349; CHECK:       # %bb.0:
350; CHECK-NEXT:    vsetvli zero, a1, e8, mf8, ta, ma
351; CHECK-NEXT:    vmv.v.x v9, a0
352; CHECK-NEXT:    vmsle.vv v0, v9, v8, v0.t
353; CHECK-NEXT:    ret
354  %elt.head = insertelement <vscale x 1 x i8> poison, i8 %b, i32 0
355  %vb = shufflevector <vscale x 1 x i8> %elt.head, <vscale x 1 x i8> poison, <vscale x 1 x i32> zeroinitializer
356  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %vb, metadata !"sge", <vscale x 1 x i1> %m, i32 %evl)
357  ret <vscale x 1 x i1> %v
358}
359
360define <vscale x 1 x i1> @icmp_sge_vx_swap_nxv1i8(<vscale x 1 x i8> %va, i8 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {
361; CHECK-LABEL: icmp_sge_vx_swap_nxv1i8:
362; CHECK:       # %bb.0:
363; CHECK-NEXT:    vsetvli zero, a1, e8, mf8, ta, ma
364; CHECK-NEXT:    vmsle.vx v0, v8, a0, v0.t
365; CHECK-NEXT:    ret
366  %elt.head = insertelement <vscale x 1 x i8> poison, i8 %b, i32 0
367  %vb = shufflevector <vscale x 1 x i8> %elt.head, <vscale x 1 x i8> poison, <vscale x 1 x i32> zeroinitializer
368  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i8(<vscale x 1 x i8> %vb, <vscale x 1 x i8> %va, metadata !"sge", <vscale x 1 x i1> %m, i32 %evl)
369  ret <vscale x 1 x i1> %v
370}
371
372define <vscale x 1 x i1> @icmp_sge_vi_nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {
373; CHECK-LABEL: icmp_sge_vi_nxv1i8:
374; CHECK:       # %bb.0:
375; CHECK-NEXT:    vsetvli zero, a0, e8, mf8, ta, ma
376; CHECK-NEXT:    vmsgt.vi v0, v8, 3, v0.t
377; CHECK-NEXT:    ret
378  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> splat (i8 4), metadata !"sge", <vscale x 1 x i1> %m, i32 %evl)
379  ret <vscale x 1 x i1> %v
380}
381
382define <vscale x 1 x i1> @icmp_sge_vi_swap_nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {
383; CHECK-LABEL: icmp_sge_vi_swap_nxv1i8:
384; CHECK:       # %bb.0:
385; CHECK-NEXT:    vsetvli zero, a0, e8, mf8, ta, ma
386; CHECK-NEXT:    vmsle.vi v0, v8, 4, v0.t
387; CHECK-NEXT:    ret
388  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i8(<vscale x 1 x i8> splat (i8 4), <vscale x 1 x i8> %va, metadata !"sge", <vscale x 1 x i1> %m, i32 %evl)
389  ret <vscale x 1 x i1> %v
390}
391
392define <vscale x 1 x i1> @icmp_slt_vv_nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) {
393; CHECK-LABEL: icmp_slt_vv_nxv1i8:
394; CHECK:       # %bb.0:
395; CHECK-NEXT:    vsetvli zero, a0, e8, mf8, ta, ma
396; CHECK-NEXT:    vmslt.vv v0, v8, v9, v0.t
397; CHECK-NEXT:    ret
398  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %vb, metadata !"slt", <vscale x 1 x i1> %m, i32 %evl)
399  ret <vscale x 1 x i1> %v
400}
401
402define <vscale x 1 x i1> @icmp_slt_vx_nxv1i8(<vscale x 1 x i8> %va, i8 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {
403; CHECK-LABEL: icmp_slt_vx_nxv1i8:
404; CHECK:       # %bb.0:
405; CHECK-NEXT:    vsetvli zero, a1, e8, mf8, ta, ma
406; CHECK-NEXT:    vmslt.vx v0, v8, a0, v0.t
407; CHECK-NEXT:    ret
408  %elt.head = insertelement <vscale x 1 x i8> poison, i8 %b, i32 0
409  %vb = shufflevector <vscale x 1 x i8> %elt.head, <vscale x 1 x i8> poison, <vscale x 1 x i32> zeroinitializer
410  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %vb, metadata !"slt", <vscale x 1 x i1> %m, i32 %evl)
411  ret <vscale x 1 x i1> %v
412}
413
414define <vscale x 1 x i1> @icmp_slt_vx_swap_nxv1i8(<vscale x 1 x i8> %va, i8 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {
415; CHECK-LABEL: icmp_slt_vx_swap_nxv1i8:
416; CHECK:       # %bb.0:
417; CHECK-NEXT:    vsetvli zero, a1, e8, mf8, ta, ma
418; CHECK-NEXT:    vmsgt.vx v0, v8, a0, v0.t
419; CHECK-NEXT:    ret
420  %elt.head = insertelement <vscale x 1 x i8> poison, i8 %b, i32 0
421  %vb = shufflevector <vscale x 1 x i8> %elt.head, <vscale x 1 x i8> poison, <vscale x 1 x i32> zeroinitializer
422  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i8(<vscale x 1 x i8> %vb, <vscale x 1 x i8> %va, metadata !"slt", <vscale x 1 x i1> %m, i32 %evl)
423  ret <vscale x 1 x i1> %v
424}
425
426define <vscale x 1 x i1> @icmp_slt_vi_nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {
427; CHECK-LABEL: icmp_slt_vi_nxv1i8:
428; CHECK:       # %bb.0:
429; CHECK-NEXT:    vsetvli zero, a0, e8, mf8, ta, ma
430; CHECK-NEXT:    vmsle.vi v0, v8, 3, v0.t
431; CHECK-NEXT:    ret
432  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> splat (i8 4), metadata !"slt", <vscale x 1 x i1> %m, i32 %evl)
433  ret <vscale x 1 x i1> %v
434}
435
436define <vscale x 1 x i1> @icmp_slt_vi_swap_nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {
437; CHECK-LABEL: icmp_slt_vi_swap_nxv1i8:
438; CHECK:       # %bb.0:
439; CHECK-NEXT:    vsetvli zero, a0, e8, mf8, ta, ma
440; CHECK-NEXT:    vmsgt.vi v0, v8, 4, v0.t
441; CHECK-NEXT:    ret
442  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i8(<vscale x 1 x i8> splat (i8 4), <vscale x 1 x i8> %va, metadata !"slt", <vscale x 1 x i1> %m, i32 %evl)
443  ret <vscale x 1 x i1> %v
444}
445
446define <vscale x 1 x i1> @icmp_sle_vv_nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) {
447; CHECK-LABEL: icmp_sle_vv_nxv1i8:
448; CHECK:       # %bb.0:
449; CHECK-NEXT:    vsetvli zero, a0, e8, mf8, ta, ma
450; CHECK-NEXT:    vmsle.vv v0, v8, v9, v0.t
451; CHECK-NEXT:    ret
452  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %vb, metadata !"sle", <vscale x 1 x i1> %m, i32 %evl)
453  ret <vscale x 1 x i1> %v
454}
455
456define <vscale x 1 x i1> @icmp_sle_vx_nxv1i8(<vscale x 1 x i8> %va, i8 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {
457; CHECK-LABEL: icmp_sle_vx_nxv1i8:
458; CHECK:       # %bb.0:
459; CHECK-NEXT:    vsetvli zero, a1, e8, mf8, ta, ma
460; CHECK-NEXT:    vmsle.vx v0, v8, a0, v0.t
461; CHECK-NEXT:    ret
462  %elt.head = insertelement <vscale x 1 x i8> poison, i8 %b, i32 0
463  %vb = shufflevector <vscale x 1 x i8> %elt.head, <vscale x 1 x i8> poison, <vscale x 1 x i32> zeroinitializer
464  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %vb, metadata !"sle", <vscale x 1 x i1> %m, i32 %evl)
465  ret <vscale x 1 x i1> %v
466}
467
468define <vscale x 1 x i1> @icmp_sle_vx_swap_nxv1i8(<vscale x 1 x i8> %va, i8 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {
469; CHECK-LABEL: icmp_sle_vx_swap_nxv1i8:
470; CHECK:       # %bb.0:
471; CHECK-NEXT:    vsetvli zero, a1, e8, mf8, ta, ma
472; CHECK-NEXT:    vmv.v.x v9, a0
473; CHECK-NEXT:    vmsle.vv v0, v9, v8, v0.t
474; CHECK-NEXT:    ret
475  %elt.head = insertelement <vscale x 1 x i8> poison, i8 %b, i32 0
476  %vb = shufflevector <vscale x 1 x i8> %elt.head, <vscale x 1 x i8> poison, <vscale x 1 x i32> zeroinitializer
477  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i8(<vscale x 1 x i8> %vb, <vscale x 1 x i8> %va, metadata !"sle", <vscale x 1 x i1> %m, i32 %evl)
478  ret <vscale x 1 x i1> %v
479}
480
481define <vscale x 1 x i1> @icmp_sle_vi_nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {
482; CHECK-LABEL: icmp_sle_vi_nxv1i8:
483; CHECK:       # %bb.0:
484; CHECK-NEXT:    vsetvli zero, a0, e8, mf8, ta, ma
485; CHECK-NEXT:    vmsle.vi v0, v8, 4, v0.t
486; CHECK-NEXT:    ret
487  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> splat (i8 4), metadata !"sle", <vscale x 1 x i1> %m, i32 %evl)
488  ret <vscale x 1 x i1> %v
489}
490
491define <vscale x 1 x i1> @icmp_sle_vi_swap_nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {
492; CHECK-LABEL: icmp_sle_vi_swap_nxv1i8:
493; CHECK:       # %bb.0:
494; CHECK-NEXT:    vsetvli zero, a0, e8, mf8, ta, ma
495; CHECK-NEXT:    vmsgt.vi v0, v8, 3, v0.t
496; CHECK-NEXT:    ret
497  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i8(<vscale x 1 x i8> splat (i8 4), <vscale x 1 x i8> %va, metadata !"sle", <vscale x 1 x i1> %m, i32 %evl)
498  ret <vscale x 1 x i1> %v
499}
500
501declare <vscale x 3 x i1> @llvm.vp.icmp.nxv3i8(<vscale x 3 x i8>, <vscale x 3 x i8>, metadata, <vscale x 3 x i1>, i32)
502
503define <vscale x 3 x i1> @icmp_eq_vv_nxv3i8(<vscale x 3 x i8> %va, <vscale x 3 x i8> %vb, <vscale x 3 x i1> %m, i32 zeroext %evl) {
504; CHECK-LABEL: icmp_eq_vv_nxv3i8:
505; CHECK:       # %bb.0:
506; CHECK-NEXT:    vsetvli zero, a0, e8, mf2, ta, ma
507; CHECK-NEXT:    vmseq.vv v0, v8, v9, v0.t
508; CHECK-NEXT:    ret
509  %v = call <vscale x 3 x i1> @llvm.vp.icmp.nxv3i8(<vscale x 3 x i8> %va, <vscale x 3 x i8> %vb, metadata !"eq", <vscale x 3 x i1> %m, i32 %evl)
510  ret <vscale x 3 x i1> %v
511}
512
513define <vscale x 3 x i1> @icmp_eq_vx_nxv3i8(<vscale x 3 x i8> %va, i8 %b, <vscale x 3 x i1> %m, i32 zeroext %evl) {
514; CHECK-LABEL: icmp_eq_vx_nxv3i8:
515; CHECK:       # %bb.0:
516; CHECK-NEXT:    vsetvli zero, a1, e8, mf2, ta, ma
517; CHECK-NEXT:    vmseq.vx v0, v8, a0, v0.t
518; CHECK-NEXT:    ret
519  %elt.head = insertelement <vscale x 3 x i8> poison, i8 %b, i32 0
520  %vb = shufflevector <vscale x 3 x i8> %elt.head, <vscale x 3 x i8> poison, <vscale x 3 x i32> zeroinitializer
521  %v = call <vscale x 3 x i1> @llvm.vp.icmp.nxv3i8(<vscale x 3 x i8> %va, <vscale x 3 x i8> %vb, metadata !"eq", <vscale x 3 x i1> %m, i32 %evl)
522  ret <vscale x 3 x i1> %v
523}
524
525define <vscale x 3 x i1> @icmp_eq_vx_swap_nxv3i8(<vscale x 3 x i8> %va, i8 %b, <vscale x 3 x i1> %m, i32 zeroext %evl) {
526; CHECK-LABEL: icmp_eq_vx_swap_nxv3i8:
527; CHECK:       # %bb.0:
528; CHECK-NEXT:    vsetvli zero, a1, e8, mf2, ta, ma
529; CHECK-NEXT:    vmseq.vx v0, v8, a0, v0.t
530; CHECK-NEXT:    ret
531  %elt.head = insertelement <vscale x 3 x i8> poison, i8 %b, i32 0
532  %vb = shufflevector <vscale x 3 x i8> %elt.head, <vscale x 3 x i8> poison, <vscale x 3 x i32> zeroinitializer
533  %v = call <vscale x 3 x i1> @llvm.vp.icmp.nxv3i8(<vscale x 3 x i8> %vb, <vscale x 3 x i8> %va, metadata !"eq", <vscale x 3 x i1> %m, i32 %evl)
534  ret <vscale x 3 x i1> %v
535}
536
537declare <vscale x 8 x i1> @llvm.vp.icmp.nxv8i7(<vscale x 8 x i7>, <vscale x 8 x i7>, metadata, <vscale x 8 x i1>, i32)
538
539define <vscale x 8 x i1> @icmp_eq_vv_nxv8i7(<vscale x 8 x i7> %va, <vscale x 8 x i7> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) {
540; CHECK-LABEL: icmp_eq_vv_nxv8i7:
541; CHECK:       # %bb.0:
542; CHECK-NEXT:    li a1, 127
543; CHECK-NEXT:    vsetvli zero, a0, e8, m1, ta, ma
544; CHECK-NEXT:    vand.vx v9, v9, a1
545; CHECK-NEXT:    vand.vx v8, v8, a1
546; CHECK-NEXT:    vmseq.vv v0, v8, v9, v0.t
547; CHECK-NEXT:    ret
548  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i7(<vscale x 8 x i7> %va, <vscale x 8 x i7> %vb, metadata !"eq", <vscale x 8 x i1> %m, i32 %evl)
549  ret <vscale x 8 x i1> %v
550}
551
552define <vscale x 8 x i1> @icmp_eq_vx_nxv8i7(<vscale x 8 x i7> %va, i7 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {
553; CHECK-LABEL: icmp_eq_vx_nxv8i7:
554; CHECK:       # %bb.0:
555; CHECK-NEXT:    li a2, 127
556; CHECK-NEXT:    vsetvli zero, a1, e8, m1, ta, ma
557; CHECK-NEXT:    vmv.v.x v9, a0
558; CHECK-NEXT:    vand.vx v8, v8, a2
559; CHECK-NEXT:    vand.vx v9, v9, a2
560; CHECK-NEXT:    vmseq.vv v0, v8, v9, v0.t
561; CHECK-NEXT:    ret
562  %elt.head = insertelement <vscale x 8 x i7> poison, i7 %b, i32 0
563  %vb = shufflevector <vscale x 8 x i7> %elt.head, <vscale x 8 x i7> poison, <vscale x 8 x i32> zeroinitializer
564  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i7(<vscale x 8 x i7> %va, <vscale x 8 x i7> %vb, metadata !"eq", <vscale x 8 x i1> %m, i32 %evl)
565  ret <vscale x 8 x i1> %v
566}
567
568define <vscale x 8 x i1> @icmp_eq_vx_swap_nxv8i7(<vscale x 8 x i7> %va, i7 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {
569; CHECK-LABEL: icmp_eq_vx_swap_nxv8i7:
570; CHECK:       # %bb.0:
571; CHECK-NEXT:    li a2, 127
572; CHECK-NEXT:    vsetvli zero, a1, e8, m1, ta, ma
573; CHECK-NEXT:    vmv.v.x v9, a0
574; CHECK-NEXT:    vand.vx v8, v8, a2
575; CHECK-NEXT:    vand.vx v9, v9, a2
576; CHECK-NEXT:    vmseq.vv v0, v9, v8, v0.t
577; CHECK-NEXT:    ret
578  %elt.head = insertelement <vscale x 8 x i7> poison, i7 %b, i32 0
579  %vb = shufflevector <vscale x 8 x i7> %elt.head, <vscale x 8 x i7> poison, <vscale x 8 x i32> zeroinitializer
580  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i7(<vscale x 8 x i7> %vb, <vscale x 8 x i7> %va, metadata !"eq", <vscale x 8 x i1> %m, i32 %evl)
581  ret <vscale x 8 x i1> %v
582}
583
584declare <vscale x 8 x i1> @llvm.vp.icmp.nxv8i8(<vscale x 8 x i8>, <vscale x 8 x i8>, metadata, <vscale x 8 x i1>, i32)
585
586define <vscale x 8 x i1> @icmp_eq_vv_nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) {
587; CHECK-LABEL: icmp_eq_vv_nxv8i8:
588; CHECK:       # %bb.0:
589; CHECK-NEXT:    vsetvli zero, a0, e8, m1, ta, ma
590; CHECK-NEXT:    vmseq.vv v0, v8, v9, v0.t
591; CHECK-NEXT:    ret
592  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %vb, metadata !"eq", <vscale x 8 x i1> %m, i32 %evl)
593  ret <vscale x 8 x i1> %v
594}
595
596define <vscale x 8 x i1> @icmp_eq_vx_nxv8i8(<vscale x 8 x i8> %va, i8 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {
597; CHECK-LABEL: icmp_eq_vx_nxv8i8:
598; CHECK:       # %bb.0:
599; CHECK-NEXT:    vsetvli zero, a1, e8, m1, ta, ma
600; CHECK-NEXT:    vmseq.vx v0, v8, a0, v0.t
601; CHECK-NEXT:    ret
602  %elt.head = insertelement <vscale x 8 x i8> poison, i8 %b, i32 0
603  %vb = shufflevector <vscale x 8 x i8> %elt.head, <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer
604  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %vb, metadata !"eq", <vscale x 8 x i1> %m, i32 %evl)
605  ret <vscale x 8 x i1> %v
606}
607
608define <vscale x 8 x i1> @icmp_eq_vx_swap_nxv8i8(<vscale x 8 x i8> %va, i8 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {
609; CHECK-LABEL: icmp_eq_vx_swap_nxv8i8:
610; CHECK:       # %bb.0:
611; CHECK-NEXT:    vsetvli zero, a1, e8, m1, ta, ma
612; CHECK-NEXT:    vmseq.vx v0, v8, a0, v0.t
613; CHECK-NEXT:    ret
614  %elt.head = insertelement <vscale x 8 x i8> poison, i8 %b, i32 0
615  %vb = shufflevector <vscale x 8 x i8> %elt.head, <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer
616  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i8(<vscale x 8 x i8> %vb, <vscale x 8 x i8> %va, metadata !"eq", <vscale x 8 x i1> %m, i32 %evl)
617  ret <vscale x 8 x i1> %v
618}
619
620define <vscale x 8 x i1> @icmp_eq_vi_nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {
621; CHECK-LABEL: icmp_eq_vi_nxv8i8:
622; CHECK:       # %bb.0:
623; CHECK-NEXT:    vsetvli zero, a0, e8, m1, ta, ma
624; CHECK-NEXT:    vmseq.vi v0, v8, 4, v0.t
625; CHECK-NEXT:    ret
626  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> splat (i8 4), metadata !"eq", <vscale x 8 x i1> %m, i32 %evl)
627  ret <vscale x 8 x i1> %v
628}
629
630define <vscale x 8 x i1> @icmp_eq_vi_swap_nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {
631; CHECK-LABEL: icmp_eq_vi_swap_nxv8i8:
632; CHECK:       # %bb.0:
633; CHECK-NEXT:    vsetvli zero, a0, e8, m1, ta, ma
634; CHECK-NEXT:    vmseq.vi v0, v8, 4, v0.t
635; CHECK-NEXT:    ret
636  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i8(<vscale x 8 x i8> splat (i8 4), <vscale x 8 x i8> %va, metadata !"eq", <vscale x 8 x i1> %m, i32 %evl)
637  ret <vscale x 8 x i1> %v
638}
639
640define <vscale x 8 x i1> @icmp_ne_vv_nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) {
641; CHECK-LABEL: icmp_ne_vv_nxv8i8:
642; CHECK:       # %bb.0:
643; CHECK-NEXT:    vsetvli zero, a0, e8, m1, ta, ma
644; CHECK-NEXT:    vmsne.vv v0, v8, v9, v0.t
645; CHECK-NEXT:    ret
646  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %vb, metadata !"ne", <vscale x 8 x i1> %m, i32 %evl)
647  ret <vscale x 8 x i1> %v
648}
649
650define <vscale x 8 x i1> @icmp_ne_vx_nxv8i8(<vscale x 8 x i8> %va, i8 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {
651; CHECK-LABEL: icmp_ne_vx_nxv8i8:
652; CHECK:       # %bb.0:
653; CHECK-NEXT:    vsetvli zero, a1, e8, m1, ta, ma
654; CHECK-NEXT:    vmsne.vx v0, v8, a0, v0.t
655; CHECK-NEXT:    ret
656  %elt.head = insertelement <vscale x 8 x i8> poison, i8 %b, i32 0
657  %vb = shufflevector <vscale x 8 x i8> %elt.head, <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer
658  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %vb, metadata !"ne", <vscale x 8 x i1> %m, i32 %evl)
659  ret <vscale x 8 x i1> %v
660}
661
662define <vscale x 8 x i1> @icmp_ne_vx_swap_nxv8i8(<vscale x 8 x i8> %va, i8 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {
663; CHECK-LABEL: icmp_ne_vx_swap_nxv8i8:
664; CHECK:       # %bb.0:
665; CHECK-NEXT:    vsetvli zero, a1, e8, m1, ta, ma
666; CHECK-NEXT:    vmsne.vx v0, v8, a0, v0.t
667; CHECK-NEXT:    ret
668  %elt.head = insertelement <vscale x 8 x i8> poison, i8 %b, i32 0
669  %vb = shufflevector <vscale x 8 x i8> %elt.head, <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer
670  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i8(<vscale x 8 x i8> %vb, <vscale x 8 x i8> %va, metadata !"ne", <vscale x 8 x i1> %m, i32 %evl)
671  ret <vscale x 8 x i1> %v
672}
673
674define <vscale x 8 x i1> @icmp_ne_vi_nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {
675; CHECK-LABEL: icmp_ne_vi_nxv8i8:
676; CHECK:       # %bb.0:
677; CHECK-NEXT:    vsetvli zero, a0, e8, m1, ta, ma
678; CHECK-NEXT:    vmsne.vi v0, v8, 4, v0.t
679; CHECK-NEXT:    ret
680  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> splat (i8 4), metadata !"ne", <vscale x 8 x i1> %m, i32 %evl)
681  ret <vscale x 8 x i1> %v
682}
683
684define <vscale x 8 x i1> @icmp_ne_vi_swap_nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {
685; CHECK-LABEL: icmp_ne_vi_swap_nxv8i8:
686; CHECK:       # %bb.0:
687; CHECK-NEXT:    vsetvli zero, a0, e8, m1, ta, ma
688; CHECK-NEXT:    vmsne.vi v0, v8, 4, v0.t
689; CHECK-NEXT:    ret
690  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i8(<vscale x 8 x i8> splat (i8 4), <vscale x 8 x i8> %va, metadata !"ne", <vscale x 8 x i1> %m, i32 %evl)
691  ret <vscale x 8 x i1> %v
692}
693
694define <vscale x 8 x i1> @icmp_ugt_vv_nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) {
695; CHECK-LABEL: icmp_ugt_vv_nxv8i8:
696; CHECK:       # %bb.0:
697; CHECK-NEXT:    vsetvli zero, a0, e8, m1, ta, ma
698; CHECK-NEXT:    vmsltu.vv v0, v9, v8, v0.t
699; CHECK-NEXT:    ret
700  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %vb, metadata !"ugt", <vscale x 8 x i1> %m, i32 %evl)
701  ret <vscale x 8 x i1> %v
702}
703
704define <vscale x 8 x i1> @icmp_ugt_vx_nxv8i8(<vscale x 8 x i8> %va, i8 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {
705; CHECK-LABEL: icmp_ugt_vx_nxv8i8:
706; CHECK:       # %bb.0:
707; CHECK-NEXT:    vsetvli zero, a1, e8, m1, ta, ma
708; CHECK-NEXT:    vmsgtu.vx v0, v8, a0, v0.t
709; CHECK-NEXT:    ret
710  %elt.head = insertelement <vscale x 8 x i8> poison, i8 %b, i32 0
711  %vb = shufflevector <vscale x 8 x i8> %elt.head, <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer
712  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %vb, metadata !"ugt", <vscale x 8 x i1> %m, i32 %evl)
713  ret <vscale x 8 x i1> %v
714}
715
716define <vscale x 8 x i1> @icmp_ugt_vx_swap_nxv8i8(<vscale x 8 x i8> %va, i8 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {
717; CHECK-LABEL: icmp_ugt_vx_swap_nxv8i8:
718; CHECK:       # %bb.0:
719; CHECK-NEXT:    vsetvli zero, a1, e8, m1, ta, ma
720; CHECK-NEXT:    vmsltu.vx v0, v8, a0, v0.t
721; CHECK-NEXT:    ret
722  %elt.head = insertelement <vscale x 8 x i8> poison, i8 %b, i32 0
723  %vb = shufflevector <vscale x 8 x i8> %elt.head, <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer
724  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i8(<vscale x 8 x i8> %vb, <vscale x 8 x i8> %va, metadata !"ugt", <vscale x 8 x i1> %m, i32 %evl)
725  ret <vscale x 8 x i1> %v
726}
727
728define <vscale x 8 x i1> @icmp_ugt_vi_nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {
729; CHECK-LABEL: icmp_ugt_vi_nxv8i8:
730; CHECK:       # %bb.0:
731; CHECK-NEXT:    vsetvli zero, a0, e8, m1, ta, ma
732; CHECK-NEXT:    vmsgtu.vi v0, v8, 4, v0.t
733; CHECK-NEXT:    ret
734  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> splat (i8 4), metadata !"ugt", <vscale x 8 x i1> %m, i32 %evl)
735  ret <vscale x 8 x i1> %v
736}
737
738define <vscale x 8 x i1> @icmp_ugt_vi_swap_nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {
739; CHECK-LABEL: icmp_ugt_vi_swap_nxv8i8:
740; CHECK:       # %bb.0:
741; CHECK-NEXT:    vsetvli zero, a0, e8, m1, ta, ma
742; CHECK-NEXT:    vmsleu.vi v0, v8, 3, v0.t
743; CHECK-NEXT:    ret
744  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i8(<vscale x 8 x i8> splat (i8 4), <vscale x 8 x i8> %va, metadata !"ugt", <vscale x 8 x i1> %m, i32 %evl)
745  ret <vscale x 8 x i1> %v
746}
747
748define <vscale x 8 x i1> @icmp_uge_vv_nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) {
749; CHECK-LABEL: icmp_uge_vv_nxv8i8:
750; CHECK:       # %bb.0:
751; CHECK-NEXT:    vsetvli zero, a0, e8, m1, ta, ma
752; CHECK-NEXT:    vmsleu.vv v0, v9, v8, v0.t
753; CHECK-NEXT:    ret
754  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %vb, metadata !"uge", <vscale x 8 x i1> %m, i32 %evl)
755  ret <vscale x 8 x i1> %v
756}
757
758define <vscale x 8 x i1> @icmp_uge_vx_nxv8i8(<vscale x 8 x i8> %va, i8 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {
759; CHECK-LABEL: icmp_uge_vx_nxv8i8:
760; CHECK:       # %bb.0:
761; CHECK-NEXT:    vsetvli zero, a1, e8, m1, ta, ma
762; CHECK-NEXT:    vmv.v.x v9, a0
763; CHECK-NEXT:    vmsleu.vv v0, v9, v8, v0.t
764; CHECK-NEXT:    ret
765  %elt.head = insertelement <vscale x 8 x i8> poison, i8 %b, i32 0
766  %vb = shufflevector <vscale x 8 x i8> %elt.head, <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer
767  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %vb, metadata !"uge", <vscale x 8 x i1> %m, i32 %evl)
768  ret <vscale x 8 x i1> %v
769}
770
771define <vscale x 8 x i1> @icmp_uge_vx_swap_nxv8i8(<vscale x 8 x i8> %va, i8 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {
772; CHECK-LABEL: icmp_uge_vx_swap_nxv8i8:
773; CHECK:       # %bb.0:
774; CHECK-NEXT:    vsetvli zero, a1, e8, m1, ta, ma
775; CHECK-NEXT:    vmsleu.vx v0, v8, a0, v0.t
776; CHECK-NEXT:    ret
777  %elt.head = insertelement <vscale x 8 x i8> poison, i8 %b, i32 0
778  %vb = shufflevector <vscale x 8 x i8> %elt.head, <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer
779  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i8(<vscale x 8 x i8> %vb, <vscale x 8 x i8> %va, metadata !"uge", <vscale x 8 x i1> %m, i32 %evl)
780  ret <vscale x 8 x i1> %v
781}
782
783define <vscale x 8 x i1> @icmp_uge_vi_nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {
784; CHECK-LABEL: icmp_uge_vi_nxv8i8:
785; CHECK:       # %bb.0:
786; CHECK-NEXT:    vsetvli zero, a0, e8, m1, ta, ma
787; CHECK-NEXT:    vmsgtu.vi v0, v8, 3, v0.t
788; CHECK-NEXT:    ret
789  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> splat (i8 4), metadata !"uge", <vscale x 8 x i1> %m, i32 %evl)
790  ret <vscale x 8 x i1> %v
791}
792
793define <vscale x 8 x i1> @icmp_uge_vi_swap_nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {
794; CHECK-LABEL: icmp_uge_vi_swap_nxv8i8:
795; CHECK:       # %bb.0:
796; CHECK-NEXT:    vsetvli zero, a0, e8, m1, ta, ma
797; CHECK-NEXT:    vmsleu.vi v0, v8, 4, v0.t
798; CHECK-NEXT:    ret
799  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i8(<vscale x 8 x i8> splat (i8 4), <vscale x 8 x i8> %va, metadata !"uge", <vscale x 8 x i1> %m, i32 %evl)
800  ret <vscale x 8 x i1> %v
801}
802
803define <vscale x 8 x i1> @icmp_ult_vv_nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) {
804; CHECK-LABEL: icmp_ult_vv_nxv8i8:
805; CHECK:       # %bb.0:
806; CHECK-NEXT:    vsetvli zero, a0, e8, m1, ta, ma
807; CHECK-NEXT:    vmsltu.vv v0, v8, v9, v0.t
808; CHECK-NEXT:    ret
809  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %vb, metadata !"ult", <vscale x 8 x i1> %m, i32 %evl)
810  ret <vscale x 8 x i1> %v
811}
812
813define <vscale x 8 x i1> @icmp_ult_vx_nxv8i8(<vscale x 8 x i8> %va, i8 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {
814; CHECK-LABEL: icmp_ult_vx_nxv8i8:
815; CHECK:       # %bb.0:
816; CHECK-NEXT:    vsetvli zero, a1, e8, m1, ta, ma
817; CHECK-NEXT:    vmsltu.vx v0, v8, a0, v0.t
818; CHECK-NEXT:    ret
819  %elt.head = insertelement <vscale x 8 x i8> poison, i8 %b, i32 0
820  %vb = shufflevector <vscale x 8 x i8> %elt.head, <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer
821  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %vb, metadata !"ult", <vscale x 8 x i1> %m, i32 %evl)
822  ret <vscale x 8 x i1> %v
823}
824
825define <vscale x 8 x i1> @icmp_ult_vx_swap_nxv8i8(<vscale x 8 x i8> %va, i8 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {
826; CHECK-LABEL: icmp_ult_vx_swap_nxv8i8:
827; CHECK:       # %bb.0:
828; CHECK-NEXT:    vsetvli zero, a1, e8, m1, ta, ma
829; CHECK-NEXT:    vmsgtu.vx v0, v8, a0, v0.t
830; CHECK-NEXT:    ret
831  %elt.head = insertelement <vscale x 8 x i8> poison, i8 %b, i32 0
832  %vb = shufflevector <vscale x 8 x i8> %elt.head, <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer
833  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i8(<vscale x 8 x i8> %vb, <vscale x 8 x i8> %va, metadata !"ult", <vscale x 8 x i1> %m, i32 %evl)
834  ret <vscale x 8 x i1> %v
835}
836
837define <vscale x 8 x i1> @icmp_ult_vi_nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {
838; CHECK-LABEL: icmp_ult_vi_nxv8i8:
839; CHECK:       # %bb.0:
840; CHECK-NEXT:    vsetvli zero, a0, e8, m1, ta, ma
841; CHECK-NEXT:    vmsleu.vi v0, v8, 3, v0.t
842; CHECK-NEXT:    ret
843  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> splat (i8 4), metadata !"ult", <vscale x 8 x i1> %m, i32 %evl)
844  ret <vscale x 8 x i1> %v
845}
846
847define <vscale x 8 x i1> @icmp_ult_vi_swap_nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {
848; CHECK-LABEL: icmp_ult_vi_swap_nxv8i8:
849; CHECK:       # %bb.0:
850; CHECK-NEXT:    vsetvli zero, a0, e8, m1, ta, ma
851; CHECK-NEXT:    vmsgtu.vi v0, v8, 4, v0.t
852; CHECK-NEXT:    ret
853  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i8(<vscale x 8 x i8> splat (i8 4), <vscale x 8 x i8> %va, metadata !"ult", <vscale x 8 x i1> %m, i32 %evl)
854  ret <vscale x 8 x i1> %v
855}
856
857define <vscale x 8 x i1> @icmp_sgt_vv_nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) {
858; CHECK-LABEL: icmp_sgt_vv_nxv8i8:
859; CHECK:       # %bb.0:
860; CHECK-NEXT:    vsetvli zero, a0, e8, m1, ta, ma
861; CHECK-NEXT:    vmslt.vv v0, v9, v8, v0.t
862; CHECK-NEXT:    ret
863  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %vb, metadata !"sgt", <vscale x 8 x i1> %m, i32 %evl)
864  ret <vscale x 8 x i1> %v
865}
866
867define <vscale x 8 x i1> @icmp_sgt_vx_nxv8i8(<vscale x 8 x i8> %va, i8 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {
868; CHECK-LABEL: icmp_sgt_vx_nxv8i8:
869; CHECK:       # %bb.0:
870; CHECK-NEXT:    vsetvli zero, a1, e8, m1, ta, ma
871; CHECK-NEXT:    vmsgt.vx v0, v8, a0, v0.t
872; CHECK-NEXT:    ret
873  %elt.head = insertelement <vscale x 8 x i8> poison, i8 %b, i32 0
874  %vb = shufflevector <vscale x 8 x i8> %elt.head, <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer
875  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %vb, metadata !"sgt", <vscale x 8 x i1> %m, i32 %evl)
876  ret <vscale x 8 x i1> %v
877}
878
879define <vscale x 8 x i1> @icmp_sgt_vx_swap_nxv8i8(<vscale x 8 x i8> %va, i8 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {
880; CHECK-LABEL: icmp_sgt_vx_swap_nxv8i8:
881; CHECK:       # %bb.0:
882; CHECK-NEXT:    vsetvli zero, a1, e8, m1, ta, ma
883; CHECK-NEXT:    vmslt.vx v0, v8, a0, v0.t
884; CHECK-NEXT:    ret
885  %elt.head = insertelement <vscale x 8 x i8> poison, i8 %b, i32 0
886  %vb = shufflevector <vscale x 8 x i8> %elt.head, <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer
887  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i8(<vscale x 8 x i8> %vb, <vscale x 8 x i8> %va, metadata !"sgt", <vscale x 8 x i1> %m, i32 %evl)
888  ret <vscale x 8 x i1> %v
889}
890
891define <vscale x 8 x i1> @icmp_sgt_vi_nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {
892; CHECK-LABEL: icmp_sgt_vi_nxv8i8:
893; CHECK:       # %bb.0:
894; CHECK-NEXT:    vsetvli zero, a0, e8, m1, ta, ma
895; CHECK-NEXT:    vmsgt.vi v0, v8, 4, v0.t
896; CHECK-NEXT:    ret
897  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> splat (i8 4), metadata !"sgt", <vscale x 8 x i1> %m, i32 %evl)
898  ret <vscale x 8 x i1> %v
899}
900
901define <vscale x 8 x i1> @icmp_sgt_vi_swap_nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {
902; CHECK-LABEL: icmp_sgt_vi_swap_nxv8i8:
903; CHECK:       # %bb.0:
904; CHECK-NEXT:    vsetvli zero, a0, e8, m1, ta, ma
905; CHECK-NEXT:    vmsle.vi v0, v8, 3, v0.t
906; CHECK-NEXT:    ret
907  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i8(<vscale x 8 x i8> splat (i8 4), <vscale x 8 x i8> %va, metadata !"sgt", <vscale x 8 x i1> %m, i32 %evl)
908  ret <vscale x 8 x i1> %v
909}
910
911define <vscale x 8 x i1> @icmp_sge_vv_nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) {
912; CHECK-LABEL: icmp_sge_vv_nxv8i8:
913; CHECK:       # %bb.0:
914; CHECK-NEXT:    vsetvli zero, a0, e8, m1, ta, ma
915; CHECK-NEXT:    vmsle.vv v0, v9, v8, v0.t
916; CHECK-NEXT:    ret
917  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %vb, metadata !"sge", <vscale x 8 x i1> %m, i32 %evl)
918  ret <vscale x 8 x i1> %v
919}
920
921define <vscale x 8 x i1> @icmp_sge_vx_nxv8i8(<vscale x 8 x i8> %va, i8 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {
922; CHECK-LABEL: icmp_sge_vx_nxv8i8:
923; CHECK:       # %bb.0:
924; CHECK-NEXT:    vsetvli zero, a1, e8, m1, ta, ma
925; CHECK-NEXT:    vmv.v.x v9, a0
926; CHECK-NEXT:    vmsle.vv v0, v9, v8, v0.t
927; CHECK-NEXT:    ret
928  %elt.head = insertelement <vscale x 8 x i8> poison, i8 %b, i32 0
929  %vb = shufflevector <vscale x 8 x i8> %elt.head, <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer
930  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %vb, metadata !"sge", <vscale x 8 x i1> %m, i32 %evl)
931  ret <vscale x 8 x i1> %v
932}
933
934define <vscale x 8 x i1> @icmp_sge_vx_swap_nxv8i8(<vscale x 8 x i8> %va, i8 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {
935; CHECK-LABEL: icmp_sge_vx_swap_nxv8i8:
936; CHECK:       # %bb.0:
937; CHECK-NEXT:    vsetvli zero, a1, e8, m1, ta, ma
938; CHECK-NEXT:    vmsle.vx v0, v8, a0, v0.t
939; CHECK-NEXT:    ret
940  %elt.head = insertelement <vscale x 8 x i8> poison, i8 %b, i32 0
941  %vb = shufflevector <vscale x 8 x i8> %elt.head, <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer
942  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i8(<vscale x 8 x i8> %vb, <vscale x 8 x i8> %va, metadata !"sge", <vscale x 8 x i1> %m, i32 %evl)
943  ret <vscale x 8 x i1> %v
944}
945
946define <vscale x 8 x i1> @icmp_sge_vi_nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {
947; CHECK-LABEL: icmp_sge_vi_nxv8i8:
948; CHECK:       # %bb.0:
949; CHECK-NEXT:    vsetvli zero, a0, e8, m1, ta, ma
950; CHECK-NEXT:    vmsgt.vi v0, v8, 3, v0.t
951; CHECK-NEXT:    ret
952  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> splat (i8 4), metadata !"sge", <vscale x 8 x i1> %m, i32 %evl)
953  ret <vscale x 8 x i1> %v
954}
955
956define <vscale x 8 x i1> @icmp_sge_vi_swap_nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {
957; CHECK-LABEL: icmp_sge_vi_swap_nxv8i8:
958; CHECK:       # %bb.0:
959; CHECK-NEXT:    vsetvli zero, a0, e8, m1, ta, ma
960; CHECK-NEXT:    vmsle.vi v0, v8, 4, v0.t
961; CHECK-NEXT:    ret
962  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i8(<vscale x 8 x i8> splat (i8 4), <vscale x 8 x i8> %va, metadata !"sge", <vscale x 8 x i1> %m, i32 %evl)
963  ret <vscale x 8 x i1> %v
964}
965
966define <vscale x 8 x i1> @icmp_slt_vv_nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) {
967; CHECK-LABEL: icmp_slt_vv_nxv8i8:
968; CHECK:       # %bb.0:
969; CHECK-NEXT:    vsetvli zero, a0, e8, m1, ta, ma
970; CHECK-NEXT:    vmslt.vv v0, v8, v9, v0.t
971; CHECK-NEXT:    ret
972  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %vb, metadata !"slt", <vscale x 8 x i1> %m, i32 %evl)
973  ret <vscale x 8 x i1> %v
974}
975
976define <vscale x 8 x i1> @icmp_slt_vx_nxv8i8(<vscale x 8 x i8> %va, i8 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {
977; CHECK-LABEL: icmp_slt_vx_nxv8i8:
978; CHECK:       # %bb.0:
979; CHECK-NEXT:    vsetvli zero, a1, e8, m1, ta, ma
980; CHECK-NEXT:    vmslt.vx v0, v8, a0, v0.t
981; CHECK-NEXT:    ret
982  %elt.head = insertelement <vscale x 8 x i8> poison, i8 %b, i32 0
983  %vb = shufflevector <vscale x 8 x i8> %elt.head, <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer
984  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %vb, metadata !"slt", <vscale x 8 x i1> %m, i32 %evl)
985  ret <vscale x 8 x i1> %v
986}
987
988define <vscale x 8 x i1> @icmp_slt_vx_swap_nxv8i8(<vscale x 8 x i8> %va, i8 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {
989; CHECK-LABEL: icmp_slt_vx_swap_nxv8i8:
990; CHECK:       # %bb.0:
991; CHECK-NEXT:    vsetvli zero, a1, e8, m1, ta, ma
992; CHECK-NEXT:    vmsgt.vx v0, v8, a0, v0.t
993; CHECK-NEXT:    ret
994  %elt.head = insertelement <vscale x 8 x i8> poison, i8 %b, i32 0
995  %vb = shufflevector <vscale x 8 x i8> %elt.head, <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer
996  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i8(<vscale x 8 x i8> %vb, <vscale x 8 x i8> %va, metadata !"slt", <vscale x 8 x i1> %m, i32 %evl)
997  ret <vscale x 8 x i1> %v
998}
999
1000define <vscale x 8 x i1> @icmp_slt_vi_nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {
1001; CHECK-LABEL: icmp_slt_vi_nxv8i8:
1002; CHECK:       # %bb.0:
1003; CHECK-NEXT:    vsetvli zero, a0, e8, m1, ta, ma
1004; CHECK-NEXT:    vmsle.vi v0, v8, 3, v0.t
1005; CHECK-NEXT:    ret
1006  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> splat (i8 4), metadata !"slt", <vscale x 8 x i1> %m, i32 %evl)
1007  ret <vscale x 8 x i1> %v
1008}
1009
1010define <vscale x 8 x i1> @icmp_slt_vi_swap_nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {
1011; CHECK-LABEL: icmp_slt_vi_swap_nxv8i8:
1012; CHECK:       # %bb.0:
1013; CHECK-NEXT:    vsetvli zero, a0, e8, m1, ta, ma
1014; CHECK-NEXT:    vmsgt.vi v0, v8, 4, v0.t
1015; CHECK-NEXT:    ret
1016  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i8(<vscale x 8 x i8> splat (i8 4), <vscale x 8 x i8> %va, metadata !"slt", <vscale x 8 x i1> %m, i32 %evl)
1017  ret <vscale x 8 x i1> %v
1018}
1019
1020define <vscale x 8 x i1> @icmp_sle_vv_nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) {
1021; CHECK-LABEL: icmp_sle_vv_nxv8i8:
1022; CHECK:       # %bb.0:
1023; CHECK-NEXT:    vsetvli zero, a0, e8, m1, ta, ma
1024; CHECK-NEXT:    vmsle.vv v0, v8, v9, v0.t
1025; CHECK-NEXT:    ret
1026  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %vb, metadata !"sle", <vscale x 8 x i1> %m, i32 %evl)
1027  ret <vscale x 8 x i1> %v
1028}
1029
1030define <vscale x 8 x i1> @icmp_sle_vx_nxv8i8(<vscale x 8 x i8> %va, i8 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {
1031; CHECK-LABEL: icmp_sle_vx_nxv8i8:
1032; CHECK:       # %bb.0:
1033; CHECK-NEXT:    vsetvli zero, a1, e8, m1, ta, ma
1034; CHECK-NEXT:    vmsle.vx v0, v8, a0, v0.t
1035; CHECK-NEXT:    ret
1036  %elt.head = insertelement <vscale x 8 x i8> poison, i8 %b, i32 0
1037  %vb = shufflevector <vscale x 8 x i8> %elt.head, <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer
1038  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %vb, metadata !"sle", <vscale x 8 x i1> %m, i32 %evl)
1039  ret <vscale x 8 x i1> %v
1040}
1041
1042define <vscale x 8 x i1> @icmp_sle_vx_swap_nxv8i8(<vscale x 8 x i8> %va, i8 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {
1043; CHECK-LABEL: icmp_sle_vx_swap_nxv8i8:
1044; CHECK:       # %bb.0:
1045; CHECK-NEXT:    vsetvli zero, a1, e8, m1, ta, ma
1046; CHECK-NEXT:    vmv.v.x v9, a0
1047; CHECK-NEXT:    vmsle.vv v0, v9, v8, v0.t
1048; CHECK-NEXT:    ret
1049  %elt.head = insertelement <vscale x 8 x i8> poison, i8 %b, i32 0
1050  %vb = shufflevector <vscale x 8 x i8> %elt.head, <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer
1051  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i8(<vscale x 8 x i8> %vb, <vscale x 8 x i8> %va, metadata !"sle", <vscale x 8 x i1> %m, i32 %evl)
1052  ret <vscale x 8 x i1> %v
1053}
1054
1055define <vscale x 8 x i1> @icmp_sle_vi_nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {
1056; CHECK-LABEL: icmp_sle_vi_nxv8i8:
1057; CHECK:       # %bb.0:
1058; CHECK-NEXT:    vsetvli zero, a0, e8, m1, ta, ma
1059; CHECK-NEXT:    vmsle.vi v0, v8, 4, v0.t
1060; CHECK-NEXT:    ret
1061  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> splat (i8 4), metadata !"sle", <vscale x 8 x i1> %m, i32 %evl)
1062  ret <vscale x 8 x i1> %v
1063}
1064
1065define <vscale x 8 x i1> @icmp_sle_vi_swap_nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {
1066; CHECK-LABEL: icmp_sle_vi_swap_nxv8i8:
1067; CHECK:       # %bb.0:
1068; CHECK-NEXT:    vsetvli zero, a0, e8, m1, ta, ma
1069; CHECK-NEXT:    vmsgt.vi v0, v8, 3, v0.t
1070; CHECK-NEXT:    ret
1071  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i8(<vscale x 8 x i8> splat (i8 4), <vscale x 8 x i8> %va, metadata !"sle", <vscale x 8 x i1> %m, i32 %evl)
1072  ret <vscale x 8 x i1> %v
1073}
1074
1075declare <vscale x 128 x i1> @llvm.vp.icmp.nxv128i8(<vscale x 128 x i8>, <vscale x 128 x i8>, metadata, <vscale x 128 x i1>, i32)
1076
1077define <vscale x 128 x i1> @icmp_eq_vv_nxv128i8(<vscale x 128 x i8> %va, <vscale x 128 x i8> %vb, <vscale x 128 x i1> %m, i32 zeroext %evl) {
1078; CHECK-LABEL: icmp_eq_vv_nxv128i8:
1079; CHECK:       # %bb.0:
1080; CHECK-NEXT:    addi sp, sp, -16
1081; CHECK-NEXT:    .cfi_def_cfa_offset 16
1082; CHECK-NEXT:    csrr a1, vlenb
1083; CHECK-NEXT:    slli a1, a1, 4
1084; CHECK-NEXT:    sub sp, sp, a1
1085; CHECK-NEXT:    .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x10, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 16 * vlenb
1086; CHECK-NEXT:    vsetvli a1, zero, e8, m8, ta, ma
1087; CHECK-NEXT:    vmv1r.v v7, v0
1088; CHECK-NEXT:    csrr a1, vlenb
1089; CHECK-NEXT:    slli a1, a1, 3
1090; CHECK-NEXT:    add a1, sp, a1
1091; CHECK-NEXT:    addi a1, a1, 16
1092; CHECK-NEXT:    vs8r.v v8, (a1) # Unknown-size Folded Spill
1093; CHECK-NEXT:    csrr a1, vlenb
1094; CHECK-NEXT:    vlm.v v0, (a2)
1095; CHECK-NEXT:    slli a1, a1, 3
1096; CHECK-NEXT:    add a2, a0, a1
1097; CHECK-NEXT:    sub a4, a3, a1
1098; CHECK-NEXT:    vl8r.v v8, (a2)
1099; CHECK-NEXT:    sltu a2, a3, a4
1100; CHECK-NEXT:    vl8r.v v24, (a0)
1101; CHECK-NEXT:    addi a0, sp, 16
1102; CHECK-NEXT:    vs8r.v v24, (a0) # Unknown-size Folded Spill
1103; CHECK-NEXT:    addi a2, a2, -1
1104; CHECK-NEXT:    and a2, a2, a4
1105; CHECK-NEXT:    vsetvli zero, a2, e8, m8, ta, ma
1106; CHECK-NEXT:    vmseq.vv v6, v16, v8, v0.t
1107; CHECK-NEXT:    bltu a3, a1, .LBB96_2
1108; CHECK-NEXT:  # %bb.1:
1109; CHECK-NEXT:    mv a3, a1
1110; CHECK-NEXT:  .LBB96_2:
1111; CHECK-NEXT:    vmv1r.v v0, v7
1112; CHECK-NEXT:    csrr a0, vlenb
1113; CHECK-NEXT:    slli a0, a0, 3
1114; CHECK-NEXT:    add a0, sp, a0
1115; CHECK-NEXT:    addi a0, a0, 16
1116; CHECK-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
1117; CHECK-NEXT:    addi a0, sp, 16
1118; CHECK-NEXT:    vl8r.v v24, (a0) # Unknown-size Folded Reload
1119; CHECK-NEXT:    vsetvli zero, a3, e8, m8, ta, ma
1120; CHECK-NEXT:    vmseq.vv v16, v8, v24, v0.t
1121; CHECK-NEXT:    vmv1r.v v0, v16
1122; CHECK-NEXT:    vmv1r.v v8, v6
1123; CHECK-NEXT:    csrr a0, vlenb
1124; CHECK-NEXT:    slli a0, a0, 4
1125; CHECK-NEXT:    add sp, sp, a0
1126; CHECK-NEXT:    .cfi_def_cfa sp, 16
1127; CHECK-NEXT:    addi sp, sp, 16
1128; CHECK-NEXT:    .cfi_def_cfa_offset 0
1129; CHECK-NEXT:    ret
1130  %v = call <vscale x 128 x i1> @llvm.vp.icmp.nxv128i8(<vscale x 128 x i8> %va, <vscale x 128 x i8> %vb, metadata !"eq", <vscale x 128 x i1> %m, i32 %evl)
1131  ret <vscale x 128 x i1> %v
1132}
1133
1134define <vscale x 128 x i1> @icmp_eq_vx_nxv128i8(<vscale x 128 x i8> %va, i8 %b, <vscale x 128 x i1> %m, i32 zeroext %evl) {
1135; CHECK-LABEL: icmp_eq_vx_nxv128i8:
1136; CHECK:       # %bb.0:
1137; CHECK-NEXT:    vsetvli a3, zero, e8, m8, ta, ma
1138; CHECK-NEXT:    vmv1r.v v24, v0
1139; CHECK-NEXT:    vlm.v v0, (a1)
1140; CHECK-NEXT:    csrr a1, vlenb
1141; CHECK-NEXT:    slli a1, a1, 3
1142; CHECK-NEXT:    sub a3, a2, a1
1143; CHECK-NEXT:    sltu a4, a2, a3
1144; CHECK-NEXT:    addi a4, a4, -1
1145; CHECK-NEXT:    and a3, a4, a3
1146; CHECK-NEXT:    vsetvli zero, a3, e8, m8, ta, ma
1147; CHECK-NEXT:    vmseq.vx v25, v16, a0, v0.t
1148; CHECK-NEXT:    bltu a2, a1, .LBB97_2
1149; CHECK-NEXT:  # %bb.1:
1150; CHECK-NEXT:    mv a2, a1
1151; CHECK-NEXT:  .LBB97_2:
1152; CHECK-NEXT:    vmv1r.v v0, v24
1153; CHECK-NEXT:    vsetvli zero, a2, e8, m8, ta, ma
1154; CHECK-NEXT:    vmseq.vx v16, v8, a0, v0.t
1155; CHECK-NEXT:    vmv1r.v v0, v16
1156; CHECK-NEXT:    vmv1r.v v8, v25
1157; CHECK-NEXT:    ret
1158  %elt.head = insertelement <vscale x 128 x i8> poison, i8 %b, i8 0
1159  %vb = shufflevector <vscale x 128 x i8> %elt.head, <vscale x 128 x i8> poison, <vscale x 128 x i32> zeroinitializer
1160  %v = call <vscale x 128 x i1> @llvm.vp.icmp.nxv128i8(<vscale x 128 x i8> %va, <vscale x 128 x i8> %vb, metadata !"eq", <vscale x 128 x i1> %m, i32 %evl)
1161  ret <vscale x 128 x i1> %v
1162}
1163
1164define <vscale x 128 x i1> @icmp_eq_vx_swap_nxv128i8(<vscale x 128 x i8> %va, i8 %b, <vscale x 128 x i1> %m, i32 zeroext %evl) {
1165; CHECK-LABEL: icmp_eq_vx_swap_nxv128i8:
1166; CHECK:       # %bb.0:
1167; CHECK-NEXT:    vsetvli a3, zero, e8, m8, ta, ma
1168; CHECK-NEXT:    vmv1r.v v24, v0
1169; CHECK-NEXT:    vlm.v v0, (a1)
1170; CHECK-NEXT:    csrr a1, vlenb
1171; CHECK-NEXT:    slli a1, a1, 3
1172; CHECK-NEXT:    sub a3, a2, a1
1173; CHECK-NEXT:    sltu a4, a2, a3
1174; CHECK-NEXT:    addi a4, a4, -1
1175; CHECK-NEXT:    and a3, a4, a3
1176; CHECK-NEXT:    vsetvli zero, a3, e8, m8, ta, ma
1177; CHECK-NEXT:    vmseq.vx v25, v16, a0, v0.t
1178; CHECK-NEXT:    bltu a2, a1, .LBB98_2
1179; CHECK-NEXT:  # %bb.1:
1180; CHECK-NEXT:    mv a2, a1
1181; CHECK-NEXT:  .LBB98_2:
1182; CHECK-NEXT:    vmv1r.v v0, v24
1183; CHECK-NEXT:    vsetvli zero, a2, e8, m8, ta, ma
1184; CHECK-NEXT:    vmseq.vx v16, v8, a0, v0.t
1185; CHECK-NEXT:    vmv1r.v v0, v16
1186; CHECK-NEXT:    vmv1r.v v8, v25
1187; CHECK-NEXT:    ret
1188  %elt.head = insertelement <vscale x 128 x i8> poison, i8 %b, i8 0
1189  %vb = shufflevector <vscale x 128 x i8> %elt.head, <vscale x 128 x i8> poison, <vscale x 128 x i32> zeroinitializer
1190  %v = call <vscale x 128 x i1> @llvm.vp.icmp.nxv128i8(<vscale x 128 x i8> %vb, <vscale x 128 x i8> %va, metadata !"eq", <vscale x 128 x i1> %m, i32 %evl)
1191  ret <vscale x 128 x i1> %v
1192}
1193
1194declare <vscale x 1 x i1> @llvm.vp.icmp.nxv1i32(<vscale x 1 x i32>, <vscale x 1 x i32>, metadata, <vscale x 1 x i1>, i32)
1195
1196define <vscale x 1 x i1> @icmp_eq_vv_nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) {
1197; CHECK-LABEL: icmp_eq_vv_nxv1i32:
1198; CHECK:       # %bb.0:
1199; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma
1200; CHECK-NEXT:    vmseq.vv v0, v8, v9, v0.t
1201; CHECK-NEXT:    ret
1202  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %vb, metadata !"eq", <vscale x 1 x i1> %m, i32 %evl)
1203  ret <vscale x 1 x i1> %v
1204}
1205
1206define <vscale x 1 x i1> @icmp_eq_vx_nxv1i32(<vscale x 1 x i32> %va, i32 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {
1207; CHECK-LABEL: icmp_eq_vx_nxv1i32:
1208; CHECK:       # %bb.0:
1209; CHECK-NEXT:    vsetvli zero, a1, e32, mf2, ta, ma
1210; CHECK-NEXT:    vmseq.vx v0, v8, a0, v0.t
1211; CHECK-NEXT:    ret
1212  %elt.head = insertelement <vscale x 1 x i32> poison, i32 %b, i32 0
1213  %vb = shufflevector <vscale x 1 x i32> %elt.head, <vscale x 1 x i32> poison, <vscale x 1 x i32> zeroinitializer
1214  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %vb, metadata !"eq", <vscale x 1 x i1> %m, i32 %evl)
1215  ret <vscale x 1 x i1> %v
1216}
1217
1218define <vscale x 1 x i1> @icmp_eq_vx_swap_nxv1i32(<vscale x 1 x i32> %va, i32 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {
1219; CHECK-LABEL: icmp_eq_vx_swap_nxv1i32:
1220; CHECK:       # %bb.0:
1221; CHECK-NEXT:    vsetvli zero, a1, e32, mf2, ta, ma
1222; CHECK-NEXT:    vmseq.vx v0, v8, a0, v0.t
1223; CHECK-NEXT:    ret
1224  %elt.head = insertelement <vscale x 1 x i32> poison, i32 %b, i32 0
1225  %vb = shufflevector <vscale x 1 x i32> %elt.head, <vscale x 1 x i32> poison, <vscale x 1 x i32> zeroinitializer
1226  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i32(<vscale x 1 x i32> %vb, <vscale x 1 x i32> %va, metadata !"eq", <vscale x 1 x i1> %m, i32 %evl)
1227  ret <vscale x 1 x i1> %v
1228}
1229
1230define <vscale x 1 x i1> @icmp_eq_vi_nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {
1231; CHECK-LABEL: icmp_eq_vi_nxv1i32:
1232; CHECK:       # %bb.0:
1233; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma
1234; CHECK-NEXT:    vmseq.vi v0, v8, 4, v0.t
1235; CHECK-NEXT:    ret
1236  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> splat (i32 4), metadata !"eq", <vscale x 1 x i1> %m, i32 %evl)
1237  ret <vscale x 1 x i1> %v
1238}
1239
1240define <vscale x 1 x i1> @icmp_eq_vi_swap_nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {
1241; CHECK-LABEL: icmp_eq_vi_swap_nxv1i32:
1242; CHECK:       # %bb.0:
1243; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma
1244; CHECK-NEXT:    vmseq.vi v0, v8, 4, v0.t
1245; CHECK-NEXT:    ret
1246  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i32(<vscale x 1 x i32> splat (i32 4), <vscale x 1 x i32> %va, metadata !"eq", <vscale x 1 x i1> %m, i32 %evl)
1247  ret <vscale x 1 x i1> %v
1248}
1249
1250define <vscale x 1 x i1> @icmp_ne_vv_nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) {
1251; CHECK-LABEL: icmp_ne_vv_nxv1i32:
1252; CHECK:       # %bb.0:
1253; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma
1254; CHECK-NEXT:    vmsne.vv v0, v8, v9, v0.t
1255; CHECK-NEXT:    ret
1256  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %vb, metadata !"ne", <vscale x 1 x i1> %m, i32 %evl)
1257  ret <vscale x 1 x i1> %v
1258}
1259
1260define <vscale x 1 x i1> @icmp_ne_vx_nxv1i32(<vscale x 1 x i32> %va, i32 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {
1261; CHECK-LABEL: icmp_ne_vx_nxv1i32:
1262; CHECK:       # %bb.0:
1263; CHECK-NEXT:    vsetvli zero, a1, e32, mf2, ta, ma
1264; CHECK-NEXT:    vmsne.vx v0, v8, a0, v0.t
1265; CHECK-NEXT:    ret
1266  %elt.head = insertelement <vscale x 1 x i32> poison, i32 %b, i32 0
1267  %vb = shufflevector <vscale x 1 x i32> %elt.head, <vscale x 1 x i32> poison, <vscale x 1 x i32> zeroinitializer
1268  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %vb, metadata !"ne", <vscale x 1 x i1> %m, i32 %evl)
1269  ret <vscale x 1 x i1> %v
1270}
1271
1272define <vscale x 1 x i1> @icmp_ne_vx_swap_nxv1i32(<vscale x 1 x i32> %va, i32 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {
1273; CHECK-LABEL: icmp_ne_vx_swap_nxv1i32:
1274; CHECK:       # %bb.0:
1275; CHECK-NEXT:    vsetvli zero, a1, e32, mf2, ta, ma
1276; CHECK-NEXT:    vmsne.vx v0, v8, a0, v0.t
1277; CHECK-NEXT:    ret
1278  %elt.head = insertelement <vscale x 1 x i32> poison, i32 %b, i32 0
1279  %vb = shufflevector <vscale x 1 x i32> %elt.head, <vscale x 1 x i32> poison, <vscale x 1 x i32> zeroinitializer
1280  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i32(<vscale x 1 x i32> %vb, <vscale x 1 x i32> %va, metadata !"ne", <vscale x 1 x i1> %m, i32 %evl)
1281  ret <vscale x 1 x i1> %v
1282}
1283
1284define <vscale x 1 x i1> @icmp_ne_vi_nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {
1285; CHECK-LABEL: icmp_ne_vi_nxv1i32:
1286; CHECK:       # %bb.0:
1287; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma
1288; CHECK-NEXT:    vmsne.vi v0, v8, 4, v0.t
1289; CHECK-NEXT:    ret
1290  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> splat (i32 4), metadata !"ne", <vscale x 1 x i1> %m, i32 %evl)
1291  ret <vscale x 1 x i1> %v
1292}
1293
1294define <vscale x 1 x i1> @icmp_ne_vi_swap_nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {
1295; CHECK-LABEL: icmp_ne_vi_swap_nxv1i32:
1296; CHECK:       # %bb.0:
1297; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma
1298; CHECK-NEXT:    vmsne.vi v0, v8, 4, v0.t
1299; CHECK-NEXT:    ret
1300  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i32(<vscale x 1 x i32> splat (i32 4), <vscale x 1 x i32> %va, metadata !"ne", <vscale x 1 x i1> %m, i32 %evl)
1301  ret <vscale x 1 x i1> %v
1302}
1303
1304define <vscale x 1 x i1> @icmp_ugt_vv_nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) {
1305; CHECK-LABEL: icmp_ugt_vv_nxv1i32:
1306; CHECK:       # %bb.0:
1307; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma
1308; CHECK-NEXT:    vmsltu.vv v0, v9, v8, v0.t
1309; CHECK-NEXT:    ret
1310  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %vb, metadata !"ugt", <vscale x 1 x i1> %m, i32 %evl)
1311  ret <vscale x 1 x i1> %v
1312}
1313
1314define <vscale x 1 x i1> @icmp_ugt_vx_nxv1i32(<vscale x 1 x i32> %va, i32 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {
1315; CHECK-LABEL: icmp_ugt_vx_nxv1i32:
1316; CHECK:       # %bb.0:
1317; CHECK-NEXT:    vsetvli zero, a1, e32, mf2, ta, ma
1318; CHECK-NEXT:    vmsgtu.vx v0, v8, a0, v0.t
1319; CHECK-NEXT:    ret
1320  %elt.head = insertelement <vscale x 1 x i32> poison, i32 %b, i32 0
1321  %vb = shufflevector <vscale x 1 x i32> %elt.head, <vscale x 1 x i32> poison, <vscale x 1 x i32> zeroinitializer
1322  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %vb, metadata !"ugt", <vscale x 1 x i1> %m, i32 %evl)
1323  ret <vscale x 1 x i1> %v
1324}
1325
1326define <vscale x 1 x i1> @icmp_ugt_vx_swap_nxv1i32(<vscale x 1 x i32> %va, i32 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {
1327; CHECK-LABEL: icmp_ugt_vx_swap_nxv1i32:
1328; CHECK:       # %bb.0:
1329; CHECK-NEXT:    vsetvli zero, a1, e32, mf2, ta, ma
1330; CHECK-NEXT:    vmsltu.vx v0, v8, a0, v0.t
1331; CHECK-NEXT:    ret
1332  %elt.head = insertelement <vscale x 1 x i32> poison, i32 %b, i32 0
1333  %vb = shufflevector <vscale x 1 x i32> %elt.head, <vscale x 1 x i32> poison, <vscale x 1 x i32> zeroinitializer
1334  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i32(<vscale x 1 x i32> %vb, <vscale x 1 x i32> %va, metadata !"ugt", <vscale x 1 x i1> %m, i32 %evl)
1335  ret <vscale x 1 x i1> %v
1336}
1337
1338define <vscale x 1 x i1> @icmp_ugt_vi_nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {
1339; CHECK-LABEL: icmp_ugt_vi_nxv1i32:
1340; CHECK:       # %bb.0:
1341; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma
1342; CHECK-NEXT:    vmsgtu.vi v0, v8, 4, v0.t
1343; CHECK-NEXT:    ret
1344  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> splat (i32 4), metadata !"ugt", <vscale x 1 x i1> %m, i32 %evl)
1345  ret <vscale x 1 x i1> %v
1346}
1347
1348define <vscale x 1 x i1> @icmp_ugt_vi_swap_nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {
1349; CHECK-LABEL: icmp_ugt_vi_swap_nxv1i32:
1350; CHECK:       # %bb.0:
1351; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma
1352; CHECK-NEXT:    vmsleu.vi v0, v8, 3, v0.t
1353; CHECK-NEXT:    ret
1354  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i32(<vscale x 1 x i32> splat (i32 4), <vscale x 1 x i32> %va, metadata !"ugt", <vscale x 1 x i1> %m, i32 %evl)
1355  ret <vscale x 1 x i1> %v
1356}
1357
1358define <vscale x 1 x i1> @icmp_uge_vv_nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) {
1359; CHECK-LABEL: icmp_uge_vv_nxv1i32:
1360; CHECK:       # %bb.0:
1361; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma
1362; CHECK-NEXT:    vmsleu.vv v0, v9, v8, v0.t
1363; CHECK-NEXT:    ret
1364  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %vb, metadata !"uge", <vscale x 1 x i1> %m, i32 %evl)
1365  ret <vscale x 1 x i1> %v
1366}
1367
1368define <vscale x 1 x i1> @icmp_uge_vx_nxv1i32(<vscale x 1 x i32> %va, i32 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {
1369; CHECK-LABEL: icmp_uge_vx_nxv1i32:
1370; CHECK:       # %bb.0:
1371; CHECK-NEXT:    vsetvli zero, a1, e32, mf2, ta, ma
1372; CHECK-NEXT:    vmv.v.x v9, a0
1373; CHECK-NEXT:    vmsleu.vv v0, v9, v8, v0.t
1374; CHECK-NEXT:    ret
1375  %elt.head = insertelement <vscale x 1 x i32> poison, i32 %b, i32 0
1376  %vb = shufflevector <vscale x 1 x i32> %elt.head, <vscale x 1 x i32> poison, <vscale x 1 x i32> zeroinitializer
1377  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %vb, metadata !"uge", <vscale x 1 x i1> %m, i32 %evl)
1378  ret <vscale x 1 x i1> %v
1379}
1380
1381define <vscale x 1 x i1> @icmp_uge_vx_swap_nxv1i32(<vscale x 1 x i32> %va, i32 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {
1382; CHECK-LABEL: icmp_uge_vx_swap_nxv1i32:
1383; CHECK:       # %bb.0:
1384; CHECK-NEXT:    vsetvli zero, a1, e32, mf2, ta, ma
1385; CHECK-NEXT:    vmsleu.vx v0, v8, a0, v0.t
1386; CHECK-NEXT:    ret
1387  %elt.head = insertelement <vscale x 1 x i32> poison, i32 %b, i32 0
1388  %vb = shufflevector <vscale x 1 x i32> %elt.head, <vscale x 1 x i32> poison, <vscale x 1 x i32> zeroinitializer
1389  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i32(<vscale x 1 x i32> %vb, <vscale x 1 x i32> %va, metadata !"uge", <vscale x 1 x i1> %m, i32 %evl)
1390  ret <vscale x 1 x i1> %v
1391}
1392
1393define <vscale x 1 x i1> @icmp_uge_vi_nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {
1394; CHECK-LABEL: icmp_uge_vi_nxv1i32:
1395; CHECK:       # %bb.0:
1396; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma
1397; CHECK-NEXT:    vmsgtu.vi v0, v8, 3, v0.t
1398; CHECK-NEXT:    ret
1399  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> splat (i32 4), metadata !"uge", <vscale x 1 x i1> %m, i32 %evl)
1400  ret <vscale x 1 x i1> %v
1401}
1402
1403define <vscale x 1 x i1> @icmp_uge_vi_swap_nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {
1404; CHECK-LABEL: icmp_uge_vi_swap_nxv1i32:
1405; CHECK:       # %bb.0:
1406; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma
1407; CHECK-NEXT:    vmsleu.vi v0, v8, 4, v0.t
1408; CHECK-NEXT:    ret
1409  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i32(<vscale x 1 x i32> splat (i32 4), <vscale x 1 x i32> %va, metadata !"uge", <vscale x 1 x i1> %m, i32 %evl)
1410  ret <vscale x 1 x i1> %v
1411}
1412
1413define <vscale x 1 x i1> @icmp_ult_vv_nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) {
1414; CHECK-LABEL: icmp_ult_vv_nxv1i32:
1415; CHECK:       # %bb.0:
1416; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma
1417; CHECK-NEXT:    vmsltu.vv v0, v8, v9, v0.t
1418; CHECK-NEXT:    ret
1419  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %vb, metadata !"ult", <vscale x 1 x i1> %m, i32 %evl)
1420  ret <vscale x 1 x i1> %v
1421}
1422
1423define <vscale x 1 x i1> @icmp_ult_vx_nxv1i32(<vscale x 1 x i32> %va, i32 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {
1424; CHECK-LABEL: icmp_ult_vx_nxv1i32:
1425; CHECK:       # %bb.0:
1426; CHECK-NEXT:    vsetvli zero, a1, e32, mf2, ta, ma
1427; CHECK-NEXT:    vmsltu.vx v0, v8, a0, v0.t
1428; CHECK-NEXT:    ret
1429  %elt.head = insertelement <vscale x 1 x i32> poison, i32 %b, i32 0
1430  %vb = shufflevector <vscale x 1 x i32> %elt.head, <vscale x 1 x i32> poison, <vscale x 1 x i32> zeroinitializer
1431  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %vb, metadata !"ult", <vscale x 1 x i1> %m, i32 %evl)
1432  ret <vscale x 1 x i1> %v
1433}
1434
1435define <vscale x 1 x i1> @icmp_ult_vx_swap_nxv1i32(<vscale x 1 x i32> %va, i32 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {
1436; CHECK-LABEL: icmp_ult_vx_swap_nxv1i32:
1437; CHECK:       # %bb.0:
1438; CHECK-NEXT:    vsetvli zero, a1, e32, mf2, ta, ma
1439; CHECK-NEXT:    vmsgtu.vx v0, v8, a0, v0.t
1440; CHECK-NEXT:    ret
1441  %elt.head = insertelement <vscale x 1 x i32> poison, i32 %b, i32 0
1442  %vb = shufflevector <vscale x 1 x i32> %elt.head, <vscale x 1 x i32> poison, <vscale x 1 x i32> zeroinitializer
1443  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i32(<vscale x 1 x i32> %vb, <vscale x 1 x i32> %va, metadata !"ult", <vscale x 1 x i1> %m, i32 %evl)
1444  ret <vscale x 1 x i1> %v
1445}
1446
1447define <vscale x 1 x i1> @icmp_ult_vi_nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {
1448; CHECK-LABEL: icmp_ult_vi_nxv1i32:
1449; CHECK:       # %bb.0:
1450; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma
1451; CHECK-NEXT:    vmsleu.vi v0, v8, 3, v0.t
1452; CHECK-NEXT:    ret
1453  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> splat (i32 4), metadata !"ult", <vscale x 1 x i1> %m, i32 %evl)
1454  ret <vscale x 1 x i1> %v
1455}
1456
1457define <vscale x 1 x i1> @icmp_ult_vi_swap_nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {
1458; CHECK-LABEL: icmp_ult_vi_swap_nxv1i32:
1459; CHECK:       # %bb.0:
1460; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma
1461; CHECK-NEXT:    vmsgtu.vi v0, v8, 4, v0.t
1462; CHECK-NEXT:    ret
1463  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i32(<vscale x 1 x i32> splat (i32 4), <vscale x 1 x i32> %va, metadata !"ult", <vscale x 1 x i1> %m, i32 %evl)
1464  ret <vscale x 1 x i1> %v
1465}
1466
1467define <vscale x 1 x i1> @icmp_sgt_vv_nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) {
1468; CHECK-LABEL: icmp_sgt_vv_nxv1i32:
1469; CHECK:       # %bb.0:
1470; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma
1471; CHECK-NEXT:    vmslt.vv v0, v9, v8, v0.t
1472; CHECK-NEXT:    ret
1473  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %vb, metadata !"sgt", <vscale x 1 x i1> %m, i32 %evl)
1474  ret <vscale x 1 x i1> %v
1475}
1476
1477define <vscale x 1 x i1> @icmp_sgt_vx_nxv1i32(<vscale x 1 x i32> %va, i32 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {
1478; CHECK-LABEL: icmp_sgt_vx_nxv1i32:
1479; CHECK:       # %bb.0:
1480; CHECK-NEXT:    vsetvli zero, a1, e32, mf2, ta, ma
1481; CHECK-NEXT:    vmsgt.vx v0, v8, a0, v0.t
1482; CHECK-NEXT:    ret
1483  %elt.head = insertelement <vscale x 1 x i32> poison, i32 %b, i32 0
1484  %vb = shufflevector <vscale x 1 x i32> %elt.head, <vscale x 1 x i32> poison, <vscale x 1 x i32> zeroinitializer
1485  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %vb, metadata !"sgt", <vscale x 1 x i1> %m, i32 %evl)
1486  ret <vscale x 1 x i1> %v
1487}
1488
1489define <vscale x 1 x i1> @icmp_sgt_vx_swap_nxv1i32(<vscale x 1 x i32> %va, i32 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {
1490; CHECK-LABEL: icmp_sgt_vx_swap_nxv1i32:
1491; CHECK:       # %bb.0:
1492; CHECK-NEXT:    vsetvli zero, a1, e32, mf2, ta, ma
1493; CHECK-NEXT:    vmslt.vx v0, v8, a0, v0.t
1494; CHECK-NEXT:    ret
1495  %elt.head = insertelement <vscale x 1 x i32> poison, i32 %b, i32 0
1496  %vb = shufflevector <vscale x 1 x i32> %elt.head, <vscale x 1 x i32> poison, <vscale x 1 x i32> zeroinitializer
1497  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i32(<vscale x 1 x i32> %vb, <vscale x 1 x i32> %va, metadata !"sgt", <vscale x 1 x i1> %m, i32 %evl)
1498  ret <vscale x 1 x i1> %v
1499}
1500
1501define <vscale x 1 x i1> @icmp_sgt_vi_nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {
1502; CHECK-LABEL: icmp_sgt_vi_nxv1i32:
1503; CHECK:       # %bb.0:
1504; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma
1505; CHECK-NEXT:    vmsgt.vi v0, v8, 4, v0.t
1506; CHECK-NEXT:    ret
1507  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> splat (i32 4), metadata !"sgt", <vscale x 1 x i1> %m, i32 %evl)
1508  ret <vscale x 1 x i1> %v
1509}
1510
1511define <vscale x 1 x i1> @icmp_sgt_vi_swap_nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {
1512; CHECK-LABEL: icmp_sgt_vi_swap_nxv1i32:
1513; CHECK:       # %bb.0:
1514; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma
1515; CHECK-NEXT:    vmsle.vi v0, v8, 3, v0.t
1516; CHECK-NEXT:    ret
1517  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i32(<vscale x 1 x i32> splat (i32 4), <vscale x 1 x i32> %va, metadata !"sgt", <vscale x 1 x i1> %m, i32 %evl)
1518  ret <vscale x 1 x i1> %v
1519}
1520
1521define <vscale x 1 x i1> @icmp_sge_vv_nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) {
1522; CHECK-LABEL: icmp_sge_vv_nxv1i32:
1523; CHECK:       # %bb.0:
1524; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma
1525; CHECK-NEXT:    vmsle.vv v0, v9, v8, v0.t
1526; CHECK-NEXT:    ret
1527  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %vb, metadata !"sge", <vscale x 1 x i1> %m, i32 %evl)
1528  ret <vscale x 1 x i1> %v
1529}
1530
1531define <vscale x 1 x i1> @icmp_sge_vx_nxv1i32(<vscale x 1 x i32> %va, i32 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {
1532; CHECK-LABEL: icmp_sge_vx_nxv1i32:
1533; CHECK:       # %bb.0:
1534; CHECK-NEXT:    vsetvli zero, a1, e32, mf2, ta, ma
1535; CHECK-NEXT:    vmv.v.x v9, a0
1536; CHECK-NEXT:    vmsle.vv v0, v9, v8, v0.t
1537; CHECK-NEXT:    ret
1538  %elt.head = insertelement <vscale x 1 x i32> poison, i32 %b, i32 0
1539  %vb = shufflevector <vscale x 1 x i32> %elt.head, <vscale x 1 x i32> poison, <vscale x 1 x i32> zeroinitializer
1540  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %vb, metadata !"sge", <vscale x 1 x i1> %m, i32 %evl)
1541  ret <vscale x 1 x i1> %v
1542}
1543
1544define <vscale x 1 x i1> @icmp_sge_vx_swap_nxv1i32(<vscale x 1 x i32> %va, i32 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {
1545; CHECK-LABEL: icmp_sge_vx_swap_nxv1i32:
1546; CHECK:       # %bb.0:
1547; CHECK-NEXT:    vsetvli zero, a1, e32, mf2, ta, ma
1548; CHECK-NEXT:    vmsle.vx v0, v8, a0, v0.t
1549; CHECK-NEXT:    ret
1550  %elt.head = insertelement <vscale x 1 x i32> poison, i32 %b, i32 0
1551  %vb = shufflevector <vscale x 1 x i32> %elt.head, <vscale x 1 x i32> poison, <vscale x 1 x i32> zeroinitializer
1552  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i32(<vscale x 1 x i32> %vb, <vscale x 1 x i32> %va, metadata !"sge", <vscale x 1 x i1> %m, i32 %evl)
1553  ret <vscale x 1 x i1> %v
1554}
1555
1556define <vscale x 1 x i1> @icmp_sge_vi_nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {
1557; CHECK-LABEL: icmp_sge_vi_nxv1i32:
1558; CHECK:       # %bb.0:
1559; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma
1560; CHECK-NEXT:    vmsgt.vi v0, v8, 3, v0.t
1561; CHECK-NEXT:    ret
1562  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> splat (i32 4), metadata !"sge", <vscale x 1 x i1> %m, i32 %evl)
1563  ret <vscale x 1 x i1> %v
1564}
1565
1566define <vscale x 1 x i1> @icmp_sge_vi_swap_nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {
1567; CHECK-LABEL: icmp_sge_vi_swap_nxv1i32:
1568; CHECK:       # %bb.0:
1569; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma
1570; CHECK-NEXT:    vmsle.vi v0, v8, 4, v0.t
1571; CHECK-NEXT:    ret
1572  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i32(<vscale x 1 x i32> splat (i32 4), <vscale x 1 x i32> %va, metadata !"sge", <vscale x 1 x i1> %m, i32 %evl)
1573  ret <vscale x 1 x i1> %v
1574}
1575
1576define <vscale x 1 x i1> @icmp_slt_vv_nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) {
1577; CHECK-LABEL: icmp_slt_vv_nxv1i32:
1578; CHECK:       # %bb.0:
1579; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma
1580; CHECK-NEXT:    vmslt.vv v0, v8, v9, v0.t
1581; CHECK-NEXT:    ret
1582  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %vb, metadata !"slt", <vscale x 1 x i1> %m, i32 %evl)
1583  ret <vscale x 1 x i1> %v
1584}
1585
1586define <vscale x 1 x i1> @icmp_slt_vx_nxv1i32(<vscale x 1 x i32> %va, i32 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {
1587; CHECK-LABEL: icmp_slt_vx_nxv1i32:
1588; CHECK:       # %bb.0:
1589; CHECK-NEXT:    vsetvli zero, a1, e32, mf2, ta, ma
1590; CHECK-NEXT:    vmslt.vx v0, v8, a0, v0.t
1591; CHECK-NEXT:    ret
1592  %elt.head = insertelement <vscale x 1 x i32> poison, i32 %b, i32 0
1593  %vb = shufflevector <vscale x 1 x i32> %elt.head, <vscale x 1 x i32> poison, <vscale x 1 x i32> zeroinitializer
1594  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %vb, metadata !"slt", <vscale x 1 x i1> %m, i32 %evl)
1595  ret <vscale x 1 x i1> %v
1596}
1597
1598define <vscale x 1 x i1> @icmp_slt_vx_swap_nxv1i32(<vscale x 1 x i32> %va, i32 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {
1599; CHECK-LABEL: icmp_slt_vx_swap_nxv1i32:
1600; CHECK:       # %bb.0:
1601; CHECK-NEXT:    vsetvli zero, a1, e32, mf2, ta, ma
1602; CHECK-NEXT:    vmsgt.vx v0, v8, a0, v0.t
1603; CHECK-NEXT:    ret
1604  %elt.head = insertelement <vscale x 1 x i32> poison, i32 %b, i32 0
1605  %vb = shufflevector <vscale x 1 x i32> %elt.head, <vscale x 1 x i32> poison, <vscale x 1 x i32> zeroinitializer
1606  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i32(<vscale x 1 x i32> %vb, <vscale x 1 x i32> %va, metadata !"slt", <vscale x 1 x i1> %m, i32 %evl)
1607  ret <vscale x 1 x i1> %v
1608}
1609
1610define <vscale x 1 x i1> @icmp_slt_vi_nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {
1611; CHECK-LABEL: icmp_slt_vi_nxv1i32:
1612; CHECK:       # %bb.0:
1613; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma
1614; CHECK-NEXT:    vmsle.vi v0, v8, 3, v0.t
1615; CHECK-NEXT:    ret
1616  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> splat (i32 4), metadata !"slt", <vscale x 1 x i1> %m, i32 %evl)
1617  ret <vscale x 1 x i1> %v
1618}
1619
1620define <vscale x 1 x i1> @icmp_slt_vi_swap_nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {
1621; CHECK-LABEL: icmp_slt_vi_swap_nxv1i32:
1622; CHECK:       # %bb.0:
1623; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma
1624; CHECK-NEXT:    vmsgt.vi v0, v8, 4, v0.t
1625; CHECK-NEXT:    ret
1626  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i32(<vscale x 1 x i32> splat (i32 4), <vscale x 1 x i32> %va, metadata !"slt", <vscale x 1 x i1> %m, i32 %evl)
1627  ret <vscale x 1 x i1> %v
1628}
1629
1630define <vscale x 1 x i1> @icmp_sle_vv_nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) {
1631; CHECK-LABEL: icmp_sle_vv_nxv1i32:
1632; CHECK:       # %bb.0:
1633; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma
1634; CHECK-NEXT:    vmsle.vv v0, v8, v9, v0.t
1635; CHECK-NEXT:    ret
1636  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %vb, metadata !"sle", <vscale x 1 x i1> %m, i32 %evl)
1637  ret <vscale x 1 x i1> %v
1638}
1639
1640define <vscale x 1 x i1> @icmp_sle_vx_nxv1i32(<vscale x 1 x i32> %va, i32 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {
1641; CHECK-LABEL: icmp_sle_vx_nxv1i32:
1642; CHECK:       # %bb.0:
1643; CHECK-NEXT:    vsetvli zero, a1, e32, mf2, ta, ma
1644; CHECK-NEXT:    vmsle.vx v0, v8, a0, v0.t
1645; CHECK-NEXT:    ret
1646  %elt.head = insertelement <vscale x 1 x i32> poison, i32 %b, i32 0
1647  %vb = shufflevector <vscale x 1 x i32> %elt.head, <vscale x 1 x i32> poison, <vscale x 1 x i32> zeroinitializer
1648  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %vb, metadata !"sle", <vscale x 1 x i1> %m, i32 %evl)
1649  ret <vscale x 1 x i1> %v
1650}
1651
1652define <vscale x 1 x i1> @icmp_sle_vx_swap_nxv1i32(<vscale x 1 x i32> %va, i32 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {
1653; CHECK-LABEL: icmp_sle_vx_swap_nxv1i32:
1654; CHECK:       # %bb.0:
1655; CHECK-NEXT:    vsetvli zero, a1, e32, mf2, ta, ma
1656; CHECK-NEXT:    vmv.v.x v9, a0
1657; CHECK-NEXT:    vmsle.vv v0, v9, v8, v0.t
1658; CHECK-NEXT:    ret
1659  %elt.head = insertelement <vscale x 1 x i32> poison, i32 %b, i32 0
1660  %vb = shufflevector <vscale x 1 x i32> %elt.head, <vscale x 1 x i32> poison, <vscale x 1 x i32> zeroinitializer
1661  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i32(<vscale x 1 x i32> %vb, <vscale x 1 x i32> %va, metadata !"sle", <vscale x 1 x i1> %m, i32 %evl)
1662  ret <vscale x 1 x i1> %v
1663}
1664
1665define <vscale x 1 x i1> @icmp_sle_vi_nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {
1666; CHECK-LABEL: icmp_sle_vi_nxv1i32:
1667; CHECK:       # %bb.0:
1668; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma
1669; CHECK-NEXT:    vmsle.vi v0, v8, 4, v0.t
1670; CHECK-NEXT:    ret
1671  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> splat (i32 4), metadata !"sle", <vscale x 1 x i1> %m, i32 %evl)
1672  ret <vscale x 1 x i1> %v
1673}
1674
1675define <vscale x 1 x i1> @icmp_sle_vi_swap_nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {
1676; CHECK-LABEL: icmp_sle_vi_swap_nxv1i32:
1677; CHECK:       # %bb.0:
1678; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma
1679; CHECK-NEXT:    vmsgt.vi v0, v8, 3, v0.t
1680; CHECK-NEXT:    ret
1681  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i32(<vscale x 1 x i32> splat (i32 4), <vscale x 1 x i32> %va, metadata !"sle", <vscale x 1 x i1> %m, i32 %evl)
1682  ret <vscale x 1 x i1> %v
1683}
1684
1685declare <vscale x 8 x i1> @llvm.vp.icmp.nxv8i32(<vscale x 8 x i32>, <vscale x 8 x i32>, metadata, <vscale x 8 x i1>, i32)
1686
1687define <vscale x 8 x i1> @icmp_eq_vv_nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) {
1688; CHECK-LABEL: icmp_eq_vv_nxv8i32:
1689; CHECK:       # %bb.0:
1690; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma
1691; CHECK-NEXT:    vmseq.vv v16, v8, v12, v0.t
1692; CHECK-NEXT:    vmv1r.v v0, v16
1693; CHECK-NEXT:    ret
1694  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %vb, metadata !"eq", <vscale x 8 x i1> %m, i32 %evl)
1695  ret <vscale x 8 x i1> %v
1696}
1697
1698define <vscale x 8 x i1> @icmp_eq_vx_nxv8i32(<vscale x 8 x i32> %va, i32 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {
1699; CHECK-LABEL: icmp_eq_vx_nxv8i32:
1700; CHECK:       # %bb.0:
1701; CHECK-NEXT:    vsetvli zero, a1, e32, m4, ta, ma
1702; CHECK-NEXT:    vmseq.vx v12, v8, a0, v0.t
1703; CHECK-NEXT:    vmv1r.v v0, v12
1704; CHECK-NEXT:    ret
1705  %elt.head = insertelement <vscale x 8 x i32> poison, i32 %b, i32 0
1706  %vb = shufflevector <vscale x 8 x i32> %elt.head, <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer
1707  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %vb, metadata !"eq", <vscale x 8 x i1> %m, i32 %evl)
1708  ret <vscale x 8 x i1> %v
1709}
1710
1711define <vscale x 8 x i1> @icmp_eq_vx_swap_nxv8i32(<vscale x 8 x i32> %va, i32 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {
1712; CHECK-LABEL: icmp_eq_vx_swap_nxv8i32:
1713; CHECK:       # %bb.0:
1714; CHECK-NEXT:    vsetvli zero, a1, e32, m4, ta, ma
1715; CHECK-NEXT:    vmseq.vx v12, v8, a0, v0.t
1716; CHECK-NEXT:    vmv1r.v v0, v12
1717; CHECK-NEXT:    ret
1718  %elt.head = insertelement <vscale x 8 x i32> poison, i32 %b, i32 0
1719  %vb = shufflevector <vscale x 8 x i32> %elt.head, <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer
1720  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i32(<vscale x 8 x i32> %vb, <vscale x 8 x i32> %va, metadata !"eq", <vscale x 8 x i1> %m, i32 %evl)
1721  ret <vscale x 8 x i1> %v
1722}
1723
1724define <vscale x 8 x i1> @icmp_eq_vi_nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {
1725; CHECK-LABEL: icmp_eq_vi_nxv8i32:
1726; CHECK:       # %bb.0:
1727; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma
1728; CHECK-NEXT:    vmseq.vi v12, v8, 4, v0.t
1729; CHECK-NEXT:    vmv1r.v v0, v12
1730; CHECK-NEXT:    ret
1731  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> splat (i32 4), metadata !"eq", <vscale x 8 x i1> %m, i32 %evl)
1732  ret <vscale x 8 x i1> %v
1733}
1734
1735define <vscale x 8 x i1> @icmp_eq_vi_swap_nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {
1736; CHECK-LABEL: icmp_eq_vi_swap_nxv8i32:
1737; CHECK:       # %bb.0:
1738; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma
1739; CHECK-NEXT:    vmseq.vi v12, v8, 4, v0.t
1740; CHECK-NEXT:    vmv1r.v v0, v12
1741; CHECK-NEXT:    ret
1742  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i32(<vscale x 8 x i32> splat (i32 4), <vscale x 8 x i32> %va, metadata !"eq", <vscale x 8 x i1> %m, i32 %evl)
1743  ret <vscale x 8 x i1> %v
1744}
1745
1746define <vscale x 8 x i1> @icmp_ne_vv_nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) {
1747; CHECK-LABEL: icmp_ne_vv_nxv8i32:
1748; CHECK:       # %bb.0:
1749; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma
1750; CHECK-NEXT:    vmsne.vv v16, v8, v12, v0.t
1751; CHECK-NEXT:    vmv1r.v v0, v16
1752; CHECK-NEXT:    ret
1753  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %vb, metadata !"ne", <vscale x 8 x i1> %m, i32 %evl)
1754  ret <vscale x 8 x i1> %v
1755}
1756
1757define <vscale x 8 x i1> @icmp_ne_vx_nxv8i32(<vscale x 8 x i32> %va, i32 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {
1758; CHECK-LABEL: icmp_ne_vx_nxv8i32:
1759; CHECK:       # %bb.0:
1760; CHECK-NEXT:    vsetvli zero, a1, e32, m4, ta, ma
1761; CHECK-NEXT:    vmsne.vx v12, v8, a0, v0.t
1762; CHECK-NEXT:    vmv1r.v v0, v12
1763; CHECK-NEXT:    ret
1764  %elt.head = insertelement <vscale x 8 x i32> poison, i32 %b, i32 0
1765  %vb = shufflevector <vscale x 8 x i32> %elt.head, <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer
1766  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %vb, metadata !"ne", <vscale x 8 x i1> %m, i32 %evl)
1767  ret <vscale x 8 x i1> %v
1768}
1769
1770define <vscale x 8 x i1> @icmp_ne_vx_swap_nxv8i32(<vscale x 8 x i32> %va, i32 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {
1771; CHECK-LABEL: icmp_ne_vx_swap_nxv8i32:
1772; CHECK:       # %bb.0:
1773; CHECK-NEXT:    vsetvli zero, a1, e32, m4, ta, ma
1774; CHECK-NEXT:    vmsne.vx v12, v8, a0, v0.t
1775; CHECK-NEXT:    vmv1r.v v0, v12
1776; CHECK-NEXT:    ret
1777  %elt.head = insertelement <vscale x 8 x i32> poison, i32 %b, i32 0
1778  %vb = shufflevector <vscale x 8 x i32> %elt.head, <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer
1779  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i32(<vscale x 8 x i32> %vb, <vscale x 8 x i32> %va, metadata !"ne", <vscale x 8 x i1> %m, i32 %evl)
1780  ret <vscale x 8 x i1> %v
1781}
1782
1783define <vscale x 8 x i1> @icmp_ne_vi_nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {
1784; CHECK-LABEL: icmp_ne_vi_nxv8i32:
1785; CHECK:       # %bb.0:
1786; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma
1787; CHECK-NEXT:    vmsne.vi v12, v8, 4, v0.t
1788; CHECK-NEXT:    vmv1r.v v0, v12
1789; CHECK-NEXT:    ret
1790  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> splat (i32 4), metadata !"ne", <vscale x 8 x i1> %m, i32 %evl)
1791  ret <vscale x 8 x i1> %v
1792}
1793
1794define <vscale x 8 x i1> @icmp_ne_vi_swap_nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {
1795; CHECK-LABEL: icmp_ne_vi_swap_nxv8i32:
1796; CHECK:       # %bb.0:
1797; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma
1798; CHECK-NEXT:    vmsne.vi v12, v8, 4, v0.t
1799; CHECK-NEXT:    vmv1r.v v0, v12
1800; CHECK-NEXT:    ret
1801  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i32(<vscale x 8 x i32> splat (i32 4), <vscale x 8 x i32> %va, metadata !"ne", <vscale x 8 x i1> %m, i32 %evl)
1802  ret <vscale x 8 x i1> %v
1803}
1804
1805define <vscale x 8 x i1> @icmp_ugt_vv_nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) {
1806; CHECK-LABEL: icmp_ugt_vv_nxv8i32:
1807; CHECK:       # %bb.0:
1808; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma
1809; CHECK-NEXT:    vmsltu.vv v16, v12, v8, v0.t
1810; CHECK-NEXT:    vmv1r.v v0, v16
1811; CHECK-NEXT:    ret
1812  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %vb, metadata !"ugt", <vscale x 8 x i1> %m, i32 %evl)
1813  ret <vscale x 8 x i1> %v
1814}
1815
1816define <vscale x 8 x i1> @icmp_ugt_vx_nxv8i32(<vscale x 8 x i32> %va, i32 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {
1817; CHECK-LABEL: icmp_ugt_vx_nxv8i32:
1818; CHECK:       # %bb.0:
1819; CHECK-NEXT:    vsetvli zero, a1, e32, m4, ta, ma
1820; CHECK-NEXT:    vmsgtu.vx v12, v8, a0, v0.t
1821; CHECK-NEXT:    vmv1r.v v0, v12
1822; CHECK-NEXT:    ret
1823  %elt.head = insertelement <vscale x 8 x i32> poison, i32 %b, i32 0
1824  %vb = shufflevector <vscale x 8 x i32> %elt.head, <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer
1825  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %vb, metadata !"ugt", <vscale x 8 x i1> %m, i32 %evl)
1826  ret <vscale x 8 x i1> %v
1827}
1828
1829define <vscale x 8 x i1> @icmp_ugt_vx_swap_nxv8i32(<vscale x 8 x i32> %va, i32 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {
1830; CHECK-LABEL: icmp_ugt_vx_swap_nxv8i32:
1831; CHECK:       # %bb.0:
1832; CHECK-NEXT:    vsetvli zero, a1, e32, m4, ta, ma
1833; CHECK-NEXT:    vmsltu.vx v12, v8, a0, v0.t
1834; CHECK-NEXT:    vmv1r.v v0, v12
1835; CHECK-NEXT:    ret
1836  %elt.head = insertelement <vscale x 8 x i32> poison, i32 %b, i32 0
1837  %vb = shufflevector <vscale x 8 x i32> %elt.head, <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer
1838  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i32(<vscale x 8 x i32> %vb, <vscale x 8 x i32> %va, metadata !"ugt", <vscale x 8 x i1> %m, i32 %evl)
1839  ret <vscale x 8 x i1> %v
1840}
1841
1842define <vscale x 8 x i1> @icmp_ugt_vi_nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {
1843; CHECK-LABEL: icmp_ugt_vi_nxv8i32:
1844; CHECK:       # %bb.0:
1845; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma
1846; CHECK-NEXT:    vmsgtu.vi v12, v8, 4, v0.t
1847; CHECK-NEXT:    vmv1r.v v0, v12
1848; CHECK-NEXT:    ret
1849  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> splat (i32 4), metadata !"ugt", <vscale x 8 x i1> %m, i32 %evl)
1850  ret <vscale x 8 x i1> %v
1851}
1852
1853define <vscale x 8 x i1> @icmp_ugt_vi_swap_nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {
1854; CHECK-LABEL: icmp_ugt_vi_swap_nxv8i32:
1855; CHECK:       # %bb.0:
1856; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma
1857; CHECK-NEXT:    vmsleu.vi v12, v8, 3, v0.t
1858; CHECK-NEXT:    vmv1r.v v0, v12
1859; CHECK-NEXT:    ret
1860  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i32(<vscale x 8 x i32> splat (i32 4), <vscale x 8 x i32> %va, metadata !"ugt", <vscale x 8 x i1> %m, i32 %evl)
1861  ret <vscale x 8 x i1> %v
1862}
1863
1864define <vscale x 8 x i1> @icmp_uge_vv_nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) {
1865; CHECK-LABEL: icmp_uge_vv_nxv8i32:
1866; CHECK:       # %bb.0:
1867; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma
1868; CHECK-NEXT:    vmsleu.vv v16, v12, v8, v0.t
1869; CHECK-NEXT:    vmv1r.v v0, v16
1870; CHECK-NEXT:    ret
1871  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %vb, metadata !"uge", <vscale x 8 x i1> %m, i32 %evl)
1872  ret <vscale x 8 x i1> %v
1873}
1874
1875define <vscale x 8 x i1> @icmp_uge_vx_nxv8i32(<vscale x 8 x i32> %va, i32 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {
1876; CHECK-LABEL: icmp_uge_vx_nxv8i32:
1877; CHECK:       # %bb.0:
1878; CHECK-NEXT:    vsetvli zero, a1, e32, m4, ta, ma
1879; CHECK-NEXT:    vmv.v.x v16, a0
1880; CHECK-NEXT:    vmsleu.vv v12, v16, v8, v0.t
1881; CHECK-NEXT:    vmv1r.v v0, v12
1882; CHECK-NEXT:    ret
1883  %elt.head = insertelement <vscale x 8 x i32> poison, i32 %b, i32 0
1884  %vb = shufflevector <vscale x 8 x i32> %elt.head, <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer
1885  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %vb, metadata !"uge", <vscale x 8 x i1> %m, i32 %evl)
1886  ret <vscale x 8 x i1> %v
1887}
1888
1889define <vscale x 8 x i1> @icmp_uge_vx_swap_nxv8i32(<vscale x 8 x i32> %va, i32 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {
1890; CHECK-LABEL: icmp_uge_vx_swap_nxv8i32:
1891; CHECK:       # %bb.0:
1892; CHECK-NEXT:    vsetvli zero, a1, e32, m4, ta, ma
1893; CHECK-NEXT:    vmsleu.vx v12, v8, a0, v0.t
1894; CHECK-NEXT:    vmv1r.v v0, v12
1895; CHECK-NEXT:    ret
1896  %elt.head = insertelement <vscale x 8 x i32> poison, i32 %b, i32 0
1897  %vb = shufflevector <vscale x 8 x i32> %elt.head, <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer
1898  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i32(<vscale x 8 x i32> %vb, <vscale x 8 x i32> %va, metadata !"uge", <vscale x 8 x i1> %m, i32 %evl)
1899  ret <vscale x 8 x i1> %v
1900}
1901
1902define <vscale x 8 x i1> @icmp_uge_vi_nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {
1903; CHECK-LABEL: icmp_uge_vi_nxv8i32:
1904; CHECK:       # %bb.0:
1905; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma
1906; CHECK-NEXT:    vmsgtu.vi v12, v8, 3, v0.t
1907; CHECK-NEXT:    vmv1r.v v0, v12
1908; CHECK-NEXT:    ret
1909  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> splat (i32 4), metadata !"uge", <vscale x 8 x i1> %m, i32 %evl)
1910  ret <vscale x 8 x i1> %v
1911}
1912
1913define <vscale x 8 x i1> @icmp_uge_vi_swap_nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {
1914; CHECK-LABEL: icmp_uge_vi_swap_nxv8i32:
1915; CHECK:       # %bb.0:
1916; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma
1917; CHECK-NEXT:    vmsleu.vi v12, v8, 4, v0.t
1918; CHECK-NEXT:    vmv1r.v v0, v12
1919; CHECK-NEXT:    ret
1920  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i32(<vscale x 8 x i32> splat (i32 4), <vscale x 8 x i32> %va, metadata !"uge", <vscale x 8 x i1> %m, i32 %evl)
1921  ret <vscale x 8 x i1> %v
1922}
1923
1924define <vscale x 8 x i1> @icmp_ult_vv_nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) {
1925; CHECK-LABEL: icmp_ult_vv_nxv8i32:
1926; CHECK:       # %bb.0:
1927; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma
1928; CHECK-NEXT:    vmsltu.vv v16, v8, v12, v0.t
1929; CHECK-NEXT:    vmv1r.v v0, v16
1930; CHECK-NEXT:    ret
1931  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %vb, metadata !"ult", <vscale x 8 x i1> %m, i32 %evl)
1932  ret <vscale x 8 x i1> %v
1933}
1934
1935define <vscale x 8 x i1> @icmp_ult_vx_nxv8i32(<vscale x 8 x i32> %va, i32 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {
1936; CHECK-LABEL: icmp_ult_vx_nxv8i32:
1937; CHECK:       # %bb.0:
1938; CHECK-NEXT:    vsetvli zero, a1, e32, m4, ta, ma
1939; CHECK-NEXT:    vmsltu.vx v12, v8, a0, v0.t
1940; CHECK-NEXT:    vmv1r.v v0, v12
1941; CHECK-NEXT:    ret
1942  %elt.head = insertelement <vscale x 8 x i32> poison, i32 %b, i32 0
1943  %vb = shufflevector <vscale x 8 x i32> %elt.head, <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer
1944  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %vb, metadata !"ult", <vscale x 8 x i1> %m, i32 %evl)
1945  ret <vscale x 8 x i1> %v
1946}
1947
1948define <vscale x 8 x i1> @icmp_ult_vx_swap_nxv8i32(<vscale x 8 x i32> %va, i32 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {
1949; CHECK-LABEL: icmp_ult_vx_swap_nxv8i32:
1950; CHECK:       # %bb.0:
1951; CHECK-NEXT:    vsetvli zero, a1, e32, m4, ta, ma
1952; CHECK-NEXT:    vmsgtu.vx v12, v8, a0, v0.t
1953; CHECK-NEXT:    vmv1r.v v0, v12
1954; CHECK-NEXT:    ret
1955  %elt.head = insertelement <vscale x 8 x i32> poison, i32 %b, i32 0
1956  %vb = shufflevector <vscale x 8 x i32> %elt.head, <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer
1957  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i32(<vscale x 8 x i32> %vb, <vscale x 8 x i32> %va, metadata !"ult", <vscale x 8 x i1> %m, i32 %evl)
1958  ret <vscale x 8 x i1> %v
1959}
1960
1961define <vscale x 8 x i1> @icmp_ult_vi_nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {
1962; CHECK-LABEL: icmp_ult_vi_nxv8i32:
1963; CHECK:       # %bb.0:
1964; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma
1965; CHECK-NEXT:    vmsleu.vi v12, v8, 3, v0.t
1966; CHECK-NEXT:    vmv1r.v v0, v12
1967; CHECK-NEXT:    ret
1968  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> splat (i32 4), metadata !"ult", <vscale x 8 x i1> %m, i32 %evl)
1969  ret <vscale x 8 x i1> %v
1970}
1971
1972define <vscale x 8 x i1> @icmp_ult_vi_swap_nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {
1973; CHECK-LABEL: icmp_ult_vi_swap_nxv8i32:
1974; CHECK:       # %bb.0:
1975; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma
1976; CHECK-NEXT:    vmsgtu.vi v12, v8, 4, v0.t
1977; CHECK-NEXT:    vmv1r.v v0, v12
1978; CHECK-NEXT:    ret
1979  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i32(<vscale x 8 x i32> splat (i32 4), <vscale x 8 x i32> %va, metadata !"ult", <vscale x 8 x i1> %m, i32 %evl)
1980  ret <vscale x 8 x i1> %v
1981}
1982
1983define <vscale x 8 x i1> @icmp_sgt_vv_nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) {
1984; CHECK-LABEL: icmp_sgt_vv_nxv8i32:
1985; CHECK:       # %bb.0:
1986; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma
1987; CHECK-NEXT:    vmslt.vv v16, v12, v8, v0.t
1988; CHECK-NEXT:    vmv1r.v v0, v16
1989; CHECK-NEXT:    ret
1990  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %vb, metadata !"sgt", <vscale x 8 x i1> %m, i32 %evl)
1991  ret <vscale x 8 x i1> %v
1992}
1993
1994define <vscale x 8 x i1> @icmp_sgt_vx_nxv8i32(<vscale x 8 x i32> %va, i32 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {
1995; CHECK-LABEL: icmp_sgt_vx_nxv8i32:
1996; CHECK:       # %bb.0:
1997; CHECK-NEXT:    vsetvli zero, a1, e32, m4, ta, ma
1998; CHECK-NEXT:    vmsgt.vx v12, v8, a0, v0.t
1999; CHECK-NEXT:    vmv1r.v v0, v12
2000; CHECK-NEXT:    ret
2001  %elt.head = insertelement <vscale x 8 x i32> poison, i32 %b, i32 0
2002  %vb = shufflevector <vscale x 8 x i32> %elt.head, <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer
2003  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %vb, metadata !"sgt", <vscale x 8 x i1> %m, i32 %evl)
2004  ret <vscale x 8 x i1> %v
2005}
2006
2007define <vscale x 8 x i1> @icmp_sgt_vx_swap_nxv8i32(<vscale x 8 x i32> %va, i32 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {
2008; CHECK-LABEL: icmp_sgt_vx_swap_nxv8i32:
2009; CHECK:       # %bb.0:
2010; CHECK-NEXT:    vsetvli zero, a1, e32, m4, ta, ma
2011; CHECK-NEXT:    vmslt.vx v12, v8, a0, v0.t
2012; CHECK-NEXT:    vmv1r.v v0, v12
2013; CHECK-NEXT:    ret
2014  %elt.head = insertelement <vscale x 8 x i32> poison, i32 %b, i32 0
2015  %vb = shufflevector <vscale x 8 x i32> %elt.head, <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer
2016  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i32(<vscale x 8 x i32> %vb, <vscale x 8 x i32> %va, metadata !"sgt", <vscale x 8 x i1> %m, i32 %evl)
2017  ret <vscale x 8 x i1> %v
2018}
2019
2020define <vscale x 8 x i1> @icmp_sgt_vi_nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {
2021; CHECK-LABEL: icmp_sgt_vi_nxv8i32:
2022; CHECK:       # %bb.0:
2023; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma
2024; CHECK-NEXT:    vmsgt.vi v12, v8, 4, v0.t
2025; CHECK-NEXT:    vmv1r.v v0, v12
2026; CHECK-NEXT:    ret
2027  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> splat (i32 4), metadata !"sgt", <vscale x 8 x i1> %m, i32 %evl)
2028  ret <vscale x 8 x i1> %v
2029}
2030
2031define <vscale x 8 x i1> @icmp_sgt_vi_swap_nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {
2032; CHECK-LABEL: icmp_sgt_vi_swap_nxv8i32:
2033; CHECK:       # %bb.0:
2034; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma
2035; CHECK-NEXT:    vmsle.vi v12, v8, 3, v0.t
2036; CHECK-NEXT:    vmv1r.v v0, v12
2037; CHECK-NEXT:    ret
2038  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i32(<vscale x 8 x i32> splat (i32 4), <vscale x 8 x i32> %va, metadata !"sgt", <vscale x 8 x i1> %m, i32 %evl)
2039  ret <vscale x 8 x i1> %v
2040}
2041
2042define <vscale x 8 x i1> @icmp_sge_vv_nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) {
2043; CHECK-LABEL: icmp_sge_vv_nxv8i32:
2044; CHECK:       # %bb.0:
2045; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma
2046; CHECK-NEXT:    vmsle.vv v16, v12, v8, v0.t
2047; CHECK-NEXT:    vmv1r.v v0, v16
2048; CHECK-NEXT:    ret
2049  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %vb, metadata !"sge", <vscale x 8 x i1> %m, i32 %evl)
2050  ret <vscale x 8 x i1> %v
2051}
2052
2053define <vscale x 8 x i1> @icmp_sge_vx_nxv8i32(<vscale x 8 x i32> %va, i32 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {
2054; CHECK-LABEL: icmp_sge_vx_nxv8i32:
2055; CHECK:       # %bb.0:
2056; CHECK-NEXT:    vsetvli zero, a1, e32, m4, ta, ma
2057; CHECK-NEXT:    vmv.v.x v16, a0
2058; CHECK-NEXT:    vmsle.vv v12, v16, v8, v0.t
2059; CHECK-NEXT:    vmv1r.v v0, v12
2060; CHECK-NEXT:    ret
2061  %elt.head = insertelement <vscale x 8 x i32> poison, i32 %b, i32 0
2062  %vb = shufflevector <vscale x 8 x i32> %elt.head, <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer
2063  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %vb, metadata !"sge", <vscale x 8 x i1> %m, i32 %evl)
2064  ret <vscale x 8 x i1> %v
2065}
2066
2067define <vscale x 8 x i1> @icmp_sge_vx_swap_nxv8i32(<vscale x 8 x i32> %va, i32 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {
2068; CHECK-LABEL: icmp_sge_vx_swap_nxv8i32:
2069; CHECK:       # %bb.0:
2070; CHECK-NEXT:    vsetvli zero, a1, e32, m4, ta, ma
2071; CHECK-NEXT:    vmsle.vx v12, v8, a0, v0.t
2072; CHECK-NEXT:    vmv1r.v v0, v12
2073; CHECK-NEXT:    ret
2074  %elt.head = insertelement <vscale x 8 x i32> poison, i32 %b, i32 0
2075  %vb = shufflevector <vscale x 8 x i32> %elt.head, <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer
2076  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i32(<vscale x 8 x i32> %vb, <vscale x 8 x i32> %va, metadata !"sge", <vscale x 8 x i1> %m, i32 %evl)
2077  ret <vscale x 8 x i1> %v
2078}
2079
2080define <vscale x 8 x i1> @icmp_sge_vi_nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {
2081; CHECK-LABEL: icmp_sge_vi_nxv8i32:
2082; CHECK:       # %bb.0:
2083; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma
2084; CHECK-NEXT:    vmsgt.vi v12, v8, 3, v0.t
2085; CHECK-NEXT:    vmv1r.v v0, v12
2086; CHECK-NEXT:    ret
2087  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> splat (i32 4), metadata !"sge", <vscale x 8 x i1> %m, i32 %evl)
2088  ret <vscale x 8 x i1> %v
2089}
2090
2091define <vscale x 8 x i1> @icmp_sge_vi_swap_nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {
2092; CHECK-LABEL: icmp_sge_vi_swap_nxv8i32:
2093; CHECK:       # %bb.0:
2094; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma
2095; CHECK-NEXT:    vmsle.vi v12, v8, 4, v0.t
2096; CHECK-NEXT:    vmv1r.v v0, v12
2097; CHECK-NEXT:    ret
2098  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i32(<vscale x 8 x i32> splat (i32 4), <vscale x 8 x i32> %va, metadata !"sge", <vscale x 8 x i1> %m, i32 %evl)
2099  ret <vscale x 8 x i1> %v
2100}
2101
2102define <vscale x 8 x i1> @icmp_slt_vv_nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) {
2103; CHECK-LABEL: icmp_slt_vv_nxv8i32:
2104; CHECK:       # %bb.0:
2105; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma
2106; CHECK-NEXT:    vmslt.vv v16, v8, v12, v0.t
2107; CHECK-NEXT:    vmv1r.v v0, v16
2108; CHECK-NEXT:    ret
2109  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %vb, metadata !"slt", <vscale x 8 x i1> %m, i32 %evl)
2110  ret <vscale x 8 x i1> %v
2111}
2112
2113define <vscale x 8 x i1> @icmp_slt_vx_nxv8i32(<vscale x 8 x i32> %va, i32 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {
2114; CHECK-LABEL: icmp_slt_vx_nxv8i32:
2115; CHECK:       # %bb.0:
2116; CHECK-NEXT:    vsetvli zero, a1, e32, m4, ta, ma
2117; CHECK-NEXT:    vmslt.vx v12, v8, a0, v0.t
2118; CHECK-NEXT:    vmv1r.v v0, v12
2119; CHECK-NEXT:    ret
2120  %elt.head = insertelement <vscale x 8 x i32> poison, i32 %b, i32 0
2121  %vb = shufflevector <vscale x 8 x i32> %elt.head, <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer
2122  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %vb, metadata !"slt", <vscale x 8 x i1> %m, i32 %evl)
2123  ret <vscale x 8 x i1> %v
2124}
2125
2126define <vscale x 8 x i1> @icmp_slt_vx_swap_nxv8i32(<vscale x 8 x i32> %va, i32 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {
2127; CHECK-LABEL: icmp_slt_vx_swap_nxv8i32:
2128; CHECK:       # %bb.0:
2129; CHECK-NEXT:    vsetvli zero, a1, e32, m4, ta, ma
2130; CHECK-NEXT:    vmsgt.vx v12, v8, a0, v0.t
2131; CHECK-NEXT:    vmv1r.v v0, v12
2132; CHECK-NEXT:    ret
2133  %elt.head = insertelement <vscale x 8 x i32> poison, i32 %b, i32 0
2134  %vb = shufflevector <vscale x 8 x i32> %elt.head, <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer
2135  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i32(<vscale x 8 x i32> %vb, <vscale x 8 x i32> %va, metadata !"slt", <vscale x 8 x i1> %m, i32 %evl)
2136  ret <vscale x 8 x i1> %v
2137}
2138
2139define <vscale x 8 x i1> @icmp_slt_vi_nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {
2140; CHECK-LABEL: icmp_slt_vi_nxv8i32:
2141; CHECK:       # %bb.0:
2142; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma
2143; CHECK-NEXT:    vmsle.vi v12, v8, 3, v0.t
2144; CHECK-NEXT:    vmv1r.v v0, v12
2145; CHECK-NEXT:    ret
2146  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> splat (i32 4), metadata !"slt", <vscale x 8 x i1> %m, i32 %evl)
2147  ret <vscale x 8 x i1> %v
2148}
2149
2150define <vscale x 8 x i1> @icmp_slt_vi_swap_nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {
2151; CHECK-LABEL: icmp_slt_vi_swap_nxv8i32:
2152; CHECK:       # %bb.0:
2153; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma
2154; CHECK-NEXT:    vmsgt.vi v12, v8, 4, v0.t
2155; CHECK-NEXT:    vmv1r.v v0, v12
2156; CHECK-NEXT:    ret
2157  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i32(<vscale x 8 x i32> splat (i32 4), <vscale x 8 x i32> %va, metadata !"slt", <vscale x 8 x i1> %m, i32 %evl)
2158  ret <vscale x 8 x i1> %v
2159}
2160
2161define <vscale x 8 x i1> @icmp_sle_vv_nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) {
2162; CHECK-LABEL: icmp_sle_vv_nxv8i32:
2163; CHECK:       # %bb.0:
2164; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma
2165; CHECK-NEXT:    vmsle.vv v16, v8, v12, v0.t
2166; CHECK-NEXT:    vmv1r.v v0, v16
2167; CHECK-NEXT:    ret
2168  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %vb, metadata !"sle", <vscale x 8 x i1> %m, i32 %evl)
2169  ret <vscale x 8 x i1> %v
2170}
2171
2172define <vscale x 8 x i1> @icmp_sle_vx_nxv8i32(<vscale x 8 x i32> %va, i32 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {
2173; CHECK-LABEL: icmp_sle_vx_nxv8i32:
2174; CHECK:       # %bb.0:
2175; CHECK-NEXT:    vsetvli zero, a1, e32, m4, ta, ma
2176; CHECK-NEXT:    vmsle.vx v12, v8, a0, v0.t
2177; CHECK-NEXT:    vmv1r.v v0, v12
2178; CHECK-NEXT:    ret
2179  %elt.head = insertelement <vscale x 8 x i32> poison, i32 %b, i32 0
2180  %vb = shufflevector <vscale x 8 x i32> %elt.head, <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer
2181  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %vb, metadata !"sle", <vscale x 8 x i1> %m, i32 %evl)
2182  ret <vscale x 8 x i1> %v
2183}
2184
2185define <vscale x 8 x i1> @icmp_sle_vx_swap_nxv8i32(<vscale x 8 x i32> %va, i32 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {
2186; CHECK-LABEL: icmp_sle_vx_swap_nxv8i32:
2187; CHECK:       # %bb.0:
2188; CHECK-NEXT:    vsetvli zero, a1, e32, m4, ta, ma
2189; CHECK-NEXT:    vmv.v.x v16, a0
2190; CHECK-NEXT:    vmsle.vv v12, v16, v8, v0.t
2191; CHECK-NEXT:    vmv1r.v v0, v12
2192; CHECK-NEXT:    ret
2193  %elt.head = insertelement <vscale x 8 x i32> poison, i32 %b, i32 0
2194  %vb = shufflevector <vscale x 8 x i32> %elt.head, <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer
2195  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i32(<vscale x 8 x i32> %vb, <vscale x 8 x i32> %va, metadata !"sle", <vscale x 8 x i1> %m, i32 %evl)
2196  ret <vscale x 8 x i1> %v
2197}
2198
2199define <vscale x 8 x i1> @icmp_sle_vi_nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {
2200; CHECK-LABEL: icmp_sle_vi_nxv8i32:
2201; CHECK:       # %bb.0:
2202; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma
2203; CHECK-NEXT:    vmsle.vi v12, v8, 4, v0.t
2204; CHECK-NEXT:    vmv1r.v v0, v12
2205; CHECK-NEXT:    ret
2206  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> splat (i32 4), metadata !"sle", <vscale x 8 x i1> %m, i32 %evl)
2207  ret <vscale x 8 x i1> %v
2208}
2209
2210define <vscale x 8 x i1> @icmp_sle_vi_swap_nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {
2211; CHECK-LABEL: icmp_sle_vi_swap_nxv8i32:
2212; CHECK:       # %bb.0:
2213; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma
2214; CHECK-NEXT:    vmsgt.vi v12, v8, 3, v0.t
2215; CHECK-NEXT:    vmv1r.v v0, v12
2216; CHECK-NEXT:    ret
2217  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i32(<vscale x 8 x i32> splat (i32 4), <vscale x 8 x i32> %va, metadata !"sle", <vscale x 8 x i1> %m, i32 %evl)
2218  ret <vscale x 8 x i1> %v
2219}
2220
2221declare <vscale x 32 x i1> @llvm.vp.icmp.nxv32i32(<vscale x 32 x i32>, <vscale x 32 x i32>, metadata, <vscale x 32 x i1>, i32)
2222
2223define <vscale x 32 x i1> @icmp_eq_vv_nxv32i32(<vscale x 32 x i32> %va, <vscale x 32 x i32> %vb, <vscale x 32 x i1> %m, i32 zeroext %evl) {
2224; CHECK-LABEL: icmp_eq_vv_nxv32i32:
2225; CHECK:       # %bb.0:
2226; CHECK-NEXT:    addi sp, sp, -16
2227; CHECK-NEXT:    .cfi_def_cfa_offset 16
2228; CHECK-NEXT:    csrr a1, vlenb
2229; CHECK-NEXT:    slli a1, a1, 4
2230; CHECK-NEXT:    sub sp, sp, a1
2231; CHECK-NEXT:    .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x10, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 16 * vlenb
2232; CHECK-NEXT:    vsetvli a1, zero, e8, mf2, ta, ma
2233; CHECK-NEXT:    vmv1r.v v24, v0
2234; CHECK-NEXT:    csrr a1, vlenb
2235; CHECK-NEXT:    slli a1, a1, 3
2236; CHECK-NEXT:    add a1, sp, a1
2237; CHECK-NEXT:    addi a1, a1, 16
2238; CHECK-NEXT:    vs8r.v v8, (a1) # Unknown-size Folded Spill
2239; CHECK-NEXT:    csrr a3, vlenb
2240; CHECK-NEXT:    srli a1, a3, 2
2241; CHECK-NEXT:    slli a4, a3, 3
2242; CHECK-NEXT:    slli a3, a3, 1
2243; CHECK-NEXT:    add a4, a0, a4
2244; CHECK-NEXT:    sub a5, a2, a3
2245; CHECK-NEXT:    vl8re32.v v8, (a4)
2246; CHECK-NEXT:    sltu a4, a2, a5
2247; CHECK-NEXT:    addi a4, a4, -1
2248; CHECK-NEXT:    vl8re32.v v0, (a0)
2249; CHECK-NEXT:    addi a0, sp, 16
2250; CHECK-NEXT:    vs8r.v v0, (a0) # Unknown-size Folded Spill
2251; CHECK-NEXT:    vslidedown.vx v0, v24, a1
2252; CHECK-NEXT:    and a4, a4, a5
2253; CHECK-NEXT:    vsetvli zero, a4, e32, m8, ta, ma
2254; CHECK-NEXT:    vmseq.vv v7, v16, v8, v0.t
2255; CHECK-NEXT:    bltu a2, a3, .LBB189_2
2256; CHECK-NEXT:  # %bb.1:
2257; CHECK-NEXT:    mv a2, a3
2258; CHECK-NEXT:  .LBB189_2:
2259; CHECK-NEXT:    vmv1r.v v0, v24
2260; CHECK-NEXT:    csrr a0, vlenb
2261; CHECK-NEXT:    slli a0, a0, 3
2262; CHECK-NEXT:    add a0, sp, a0
2263; CHECK-NEXT:    addi a0, a0, 16
2264; CHECK-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
2265; CHECK-NEXT:    addi a0, sp, 16
2266; CHECK-NEXT:    vl8r.v v24, (a0) # Unknown-size Folded Reload
2267; CHECK-NEXT:    vsetvli zero, a2, e32, m8, ta, ma
2268; CHECK-NEXT:    vmseq.vv v16, v8, v24, v0.t
2269; CHECK-NEXT:    add a0, a1, a1
2270; CHECK-NEXT:    vsetvli zero, a0, e8, mf2, ta, ma
2271; CHECK-NEXT:    vslideup.vx v16, v7, a1
2272; CHECK-NEXT:    vmv1r.v v0, v16
2273; CHECK-NEXT:    csrr a0, vlenb
2274; CHECK-NEXT:    slli a0, a0, 4
2275; CHECK-NEXT:    add sp, sp, a0
2276; CHECK-NEXT:    .cfi_def_cfa sp, 16
2277; CHECK-NEXT:    addi sp, sp, 16
2278; CHECK-NEXT:    .cfi_def_cfa_offset 0
2279; CHECK-NEXT:    ret
2280  %v = call <vscale x 32 x i1> @llvm.vp.icmp.nxv32i32(<vscale x 32 x i32> %va, <vscale x 32 x i32> %vb, metadata !"eq", <vscale x 32 x i1> %m, i32 %evl)
2281  ret <vscale x 32 x i1> %v
2282}
2283
2284define <vscale x 32 x i1> @icmp_eq_vx_nxv32i32(<vscale x 32 x i32> %va, i32 %b, <vscale x 32 x i1> %m, i32 zeroext %evl) {
2285; CHECK-LABEL: icmp_eq_vx_nxv32i32:
2286; CHECK:       # %bb.0:
2287; CHECK-NEXT:    vsetvli a2, zero, e8, mf2, ta, ma
2288; CHECK-NEXT:    vmv1r.v v24, v0
2289; CHECK-NEXT:    csrr a3, vlenb
2290; CHECK-NEXT:    srli a2, a3, 2
2291; CHECK-NEXT:    slli a3, a3, 1
2292; CHECK-NEXT:    vslidedown.vx v0, v0, a2
2293; CHECK-NEXT:    sub a4, a1, a3
2294; CHECK-NEXT:    sltu a5, a1, a4
2295; CHECK-NEXT:    addi a5, a5, -1
2296; CHECK-NEXT:    and a4, a5, a4
2297; CHECK-NEXT:    vsetvli zero, a4, e32, m8, ta, ma
2298; CHECK-NEXT:    vmseq.vx v25, v16, a0, v0.t
2299; CHECK-NEXT:    bltu a1, a3, .LBB190_2
2300; CHECK-NEXT:  # %bb.1:
2301; CHECK-NEXT:    mv a1, a3
2302; CHECK-NEXT:  .LBB190_2:
2303; CHECK-NEXT:    vmv1r.v v0, v24
2304; CHECK-NEXT:    vsetvli zero, a1, e32, m8, ta, ma
2305; CHECK-NEXT:    vmseq.vx v16, v8, a0, v0.t
2306; CHECK-NEXT:    add a0, a2, a2
2307; CHECK-NEXT:    vsetvli zero, a0, e8, mf2, ta, ma
2308; CHECK-NEXT:    vslideup.vx v16, v25, a2
2309; CHECK-NEXT:    vmv1r.v v0, v16
2310; CHECK-NEXT:    ret
2311  %elt.head = insertelement <vscale x 32 x i32> poison, i32 %b, i32 0
2312  %vb = shufflevector <vscale x 32 x i32> %elt.head, <vscale x 32 x i32> poison, <vscale x 32 x i32> zeroinitializer
2313  %v = call <vscale x 32 x i1> @llvm.vp.icmp.nxv32i32(<vscale x 32 x i32> %va, <vscale x 32 x i32> %vb, metadata !"eq", <vscale x 32 x i1> %m, i32 %evl)
2314  ret <vscale x 32 x i1> %v
2315}
2316
2317define <vscale x 32 x i1> @icmp_eq_vx_swap_nxv32i32(<vscale x 32 x i32> %va, i32 %b, <vscale x 32 x i1> %m, i32 zeroext %evl) {
2318; CHECK-LABEL: icmp_eq_vx_swap_nxv32i32:
2319; CHECK:       # %bb.0:
2320; CHECK-NEXT:    vsetvli a2, zero, e8, mf2, ta, ma
2321; CHECK-NEXT:    vmv1r.v v24, v0
2322; CHECK-NEXT:    csrr a3, vlenb
2323; CHECK-NEXT:    srli a2, a3, 2
2324; CHECK-NEXT:    slli a3, a3, 1
2325; CHECK-NEXT:    vslidedown.vx v0, v0, a2
2326; CHECK-NEXT:    sub a4, a1, a3
2327; CHECK-NEXT:    sltu a5, a1, a4
2328; CHECK-NEXT:    addi a5, a5, -1
2329; CHECK-NEXT:    and a4, a5, a4
2330; CHECK-NEXT:    vsetvli zero, a4, e32, m8, ta, ma
2331; CHECK-NEXT:    vmseq.vx v25, v16, a0, v0.t
2332; CHECK-NEXT:    bltu a1, a3, .LBB191_2
2333; CHECK-NEXT:  # %bb.1:
2334; CHECK-NEXT:    mv a1, a3
2335; CHECK-NEXT:  .LBB191_2:
2336; CHECK-NEXT:    vmv1r.v v0, v24
2337; CHECK-NEXT:    vsetvli zero, a1, e32, m8, ta, ma
2338; CHECK-NEXT:    vmseq.vx v16, v8, a0, v0.t
2339; CHECK-NEXT:    add a0, a2, a2
2340; CHECK-NEXT:    vsetvli zero, a0, e8, mf2, ta, ma
2341; CHECK-NEXT:    vslideup.vx v16, v25, a2
2342; CHECK-NEXT:    vmv1r.v v0, v16
2343; CHECK-NEXT:    ret
2344  %elt.head = insertelement <vscale x 32 x i32> poison, i32 %b, i32 0
2345  %vb = shufflevector <vscale x 32 x i32> %elt.head, <vscale x 32 x i32> poison, <vscale x 32 x i32> zeroinitializer
2346  %v = call <vscale x 32 x i1> @llvm.vp.icmp.nxv32i32(<vscale x 32 x i32> %vb, <vscale x 32 x i32> %va, metadata !"eq", <vscale x 32 x i1> %m, i32 %evl)
2347  ret <vscale x 32 x i1> %v
2348}
2349
2350declare <vscale x 1 x i1> @llvm.vp.icmp.nxv1i64(<vscale x 1 x i64>, <vscale x 1 x i64>, metadata, <vscale x 1 x i1>, i32)
2351
2352define <vscale x 1 x i1> @icmp_eq_vv_nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) {
2353; CHECK-LABEL: icmp_eq_vv_nxv1i64:
2354; CHECK:       # %bb.0:
2355; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma
2356; CHECK-NEXT:    vmseq.vv v0, v8, v9, v0.t
2357; CHECK-NEXT:    ret
2358  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %vb, metadata !"eq", <vscale x 1 x i1> %m, i32 %evl)
2359  ret <vscale x 1 x i1> %v
2360}
2361
2362define <vscale x 1 x i1> @icmp_eq_vx_nxv1i64(<vscale x 1 x i64> %va, i64 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {
2363; RV32-LABEL: icmp_eq_vx_nxv1i64:
2364; RV32:       # %bb.0:
2365; RV32-NEXT:    addi sp, sp, -16
2366; RV32-NEXT:    .cfi_def_cfa_offset 16
2367; RV32-NEXT:    sw a0, 8(sp)
2368; RV32-NEXT:    sw a1, 12(sp)
2369; RV32-NEXT:    addi a0, sp, 8
2370; RV32-NEXT:    vsetvli zero, a2, e64, m1, ta, ma
2371; RV32-NEXT:    vlse64.v v9, (a0), zero
2372; RV32-NEXT:    vmseq.vv v0, v8, v9, v0.t
2373; RV32-NEXT:    addi sp, sp, 16
2374; RV32-NEXT:    .cfi_def_cfa_offset 0
2375; RV32-NEXT:    ret
2376;
2377; RV64-LABEL: icmp_eq_vx_nxv1i64:
2378; RV64:       # %bb.0:
2379; RV64-NEXT:    vsetvli zero, a1, e64, m1, ta, ma
2380; RV64-NEXT:    vmseq.vx v0, v8, a0, v0.t
2381; RV64-NEXT:    ret
2382  %elt.head = insertelement <vscale x 1 x i64> poison, i64 %b, i32 0
2383  %vb = shufflevector <vscale x 1 x i64> %elt.head, <vscale x 1 x i64> poison, <vscale x 1 x i32> zeroinitializer
2384  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %vb, metadata !"eq", <vscale x 1 x i1> %m, i32 %evl)
2385  ret <vscale x 1 x i1> %v
2386}
2387
2388define <vscale x 1 x i1> @icmp_eq_vx_swap_nxv1i64(<vscale x 1 x i64> %va, i64 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {
2389; RV32-LABEL: icmp_eq_vx_swap_nxv1i64:
2390; RV32:       # %bb.0:
2391; RV32-NEXT:    addi sp, sp, -16
2392; RV32-NEXT:    .cfi_def_cfa_offset 16
2393; RV32-NEXT:    sw a0, 8(sp)
2394; RV32-NEXT:    sw a1, 12(sp)
2395; RV32-NEXT:    addi a0, sp, 8
2396; RV32-NEXT:    vsetvli zero, a2, e64, m1, ta, ma
2397; RV32-NEXT:    vlse64.v v9, (a0), zero
2398; RV32-NEXT:    vmseq.vv v0, v9, v8, v0.t
2399; RV32-NEXT:    addi sp, sp, 16
2400; RV32-NEXT:    .cfi_def_cfa_offset 0
2401; RV32-NEXT:    ret
2402;
2403; RV64-LABEL: icmp_eq_vx_swap_nxv1i64:
2404; RV64:       # %bb.0:
2405; RV64-NEXT:    vsetvli zero, a1, e64, m1, ta, ma
2406; RV64-NEXT:    vmseq.vx v0, v8, a0, v0.t
2407; RV64-NEXT:    ret
2408  %elt.head = insertelement <vscale x 1 x i64> poison, i64 %b, i32 0
2409  %vb = shufflevector <vscale x 1 x i64> %elt.head, <vscale x 1 x i64> poison, <vscale x 1 x i32> zeroinitializer
2410  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i64(<vscale x 1 x i64> %vb, <vscale x 1 x i64> %va, metadata !"eq", <vscale x 1 x i1> %m, i32 %evl)
2411  ret <vscale x 1 x i1> %v
2412}
2413
2414define <vscale x 1 x i1> @icmp_eq_vi_nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {
2415; CHECK-LABEL: icmp_eq_vi_nxv1i64:
2416; CHECK:       # %bb.0:
2417; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma
2418; CHECK-NEXT:    vmseq.vi v0, v8, 4, v0.t
2419; CHECK-NEXT:    ret
2420  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> splat (i64 4), metadata !"eq", <vscale x 1 x i1> %m, i32 %evl)
2421  ret <vscale x 1 x i1> %v
2422}
2423
2424define <vscale x 1 x i1> @icmp_eq_vi_swap_nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {
2425; CHECK-LABEL: icmp_eq_vi_swap_nxv1i64:
2426; CHECK:       # %bb.0:
2427; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma
2428; CHECK-NEXT:    vmseq.vi v0, v8, 4, v0.t
2429; CHECK-NEXT:    ret
2430  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i64(<vscale x 1 x i64> splat (i64 4), <vscale x 1 x i64> %va, metadata !"eq", <vscale x 1 x i1> %m, i32 %evl)
2431  ret <vscale x 1 x i1> %v
2432}
2433
2434define <vscale x 1 x i1> @icmp_ne_vv_nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) {
2435; CHECK-LABEL: icmp_ne_vv_nxv1i64:
2436; CHECK:       # %bb.0:
2437; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma
2438; CHECK-NEXT:    vmsne.vv v0, v8, v9, v0.t
2439; CHECK-NEXT:    ret
2440  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %vb, metadata !"ne", <vscale x 1 x i1> %m, i32 %evl)
2441  ret <vscale x 1 x i1> %v
2442}
2443
2444define <vscale x 1 x i1> @icmp_ne_vx_nxv1i64(<vscale x 1 x i64> %va, i64 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {
2445; RV32-LABEL: icmp_ne_vx_nxv1i64:
2446; RV32:       # %bb.0:
2447; RV32-NEXT:    addi sp, sp, -16
2448; RV32-NEXT:    .cfi_def_cfa_offset 16
2449; RV32-NEXT:    sw a0, 8(sp)
2450; RV32-NEXT:    sw a1, 12(sp)
2451; RV32-NEXT:    addi a0, sp, 8
2452; RV32-NEXT:    vsetvli zero, a2, e64, m1, ta, ma
2453; RV32-NEXT:    vlse64.v v9, (a0), zero
2454; RV32-NEXT:    vmsne.vv v0, v8, v9, v0.t
2455; RV32-NEXT:    addi sp, sp, 16
2456; RV32-NEXT:    .cfi_def_cfa_offset 0
2457; RV32-NEXT:    ret
2458;
2459; RV64-LABEL: icmp_ne_vx_nxv1i64:
2460; RV64:       # %bb.0:
2461; RV64-NEXT:    vsetvli zero, a1, e64, m1, ta, ma
2462; RV64-NEXT:    vmsne.vx v0, v8, a0, v0.t
2463; RV64-NEXT:    ret
2464  %elt.head = insertelement <vscale x 1 x i64> poison, i64 %b, i32 0
2465  %vb = shufflevector <vscale x 1 x i64> %elt.head, <vscale x 1 x i64> poison, <vscale x 1 x i32> zeroinitializer
2466  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %vb, metadata !"ne", <vscale x 1 x i1> %m, i32 %evl)
2467  ret <vscale x 1 x i1> %v
2468}
2469
2470define <vscale x 1 x i1> @icmp_ne_vx_swap_nxv1i64(<vscale x 1 x i64> %va, i64 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {
2471; RV32-LABEL: icmp_ne_vx_swap_nxv1i64:
2472; RV32:       # %bb.0:
2473; RV32-NEXT:    addi sp, sp, -16
2474; RV32-NEXT:    .cfi_def_cfa_offset 16
2475; RV32-NEXT:    sw a0, 8(sp)
2476; RV32-NEXT:    sw a1, 12(sp)
2477; RV32-NEXT:    addi a0, sp, 8
2478; RV32-NEXT:    vsetvli zero, a2, e64, m1, ta, ma
2479; RV32-NEXT:    vlse64.v v9, (a0), zero
2480; RV32-NEXT:    vmsne.vv v0, v9, v8, v0.t
2481; RV32-NEXT:    addi sp, sp, 16
2482; RV32-NEXT:    .cfi_def_cfa_offset 0
2483; RV32-NEXT:    ret
2484;
2485; RV64-LABEL: icmp_ne_vx_swap_nxv1i64:
2486; RV64:       # %bb.0:
2487; RV64-NEXT:    vsetvli zero, a1, e64, m1, ta, ma
2488; RV64-NEXT:    vmsne.vx v0, v8, a0, v0.t
2489; RV64-NEXT:    ret
2490  %elt.head = insertelement <vscale x 1 x i64> poison, i64 %b, i32 0
2491  %vb = shufflevector <vscale x 1 x i64> %elt.head, <vscale x 1 x i64> poison, <vscale x 1 x i32> zeroinitializer
2492  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i64(<vscale x 1 x i64> %vb, <vscale x 1 x i64> %va, metadata !"ne", <vscale x 1 x i1> %m, i32 %evl)
2493  ret <vscale x 1 x i1> %v
2494}
2495
2496define <vscale x 1 x i1> @icmp_ne_vi_nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {
2497; CHECK-LABEL: icmp_ne_vi_nxv1i64:
2498; CHECK:       # %bb.0:
2499; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma
2500; CHECK-NEXT:    vmsne.vi v0, v8, 4, v0.t
2501; CHECK-NEXT:    ret
2502  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> splat (i64 4), metadata !"ne", <vscale x 1 x i1> %m, i32 %evl)
2503  ret <vscale x 1 x i1> %v
2504}
2505
2506define <vscale x 1 x i1> @icmp_ne_vi_swap_nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {
2507; CHECK-LABEL: icmp_ne_vi_swap_nxv1i64:
2508; CHECK:       # %bb.0:
2509; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma
2510; CHECK-NEXT:    vmsne.vi v0, v8, 4, v0.t
2511; CHECK-NEXT:    ret
2512  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i64(<vscale x 1 x i64> splat (i64 4), <vscale x 1 x i64> %va, metadata !"ne", <vscale x 1 x i1> %m, i32 %evl)
2513  ret <vscale x 1 x i1> %v
2514}
2515
2516define <vscale x 1 x i1> @icmp_ugt_vv_nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) {
2517; CHECK-LABEL: icmp_ugt_vv_nxv1i64:
2518; CHECK:       # %bb.0:
2519; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma
2520; CHECK-NEXT:    vmsltu.vv v0, v9, v8, v0.t
2521; CHECK-NEXT:    ret
2522  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %vb, metadata !"ugt", <vscale x 1 x i1> %m, i32 %evl)
2523  ret <vscale x 1 x i1> %v
2524}
2525
2526define <vscale x 1 x i1> @icmp_ugt_vx_nxv1i64(<vscale x 1 x i64> %va, i64 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {
2527; RV32-LABEL: icmp_ugt_vx_nxv1i64:
2528; RV32:       # %bb.0:
2529; RV32-NEXT:    addi sp, sp, -16
2530; RV32-NEXT:    .cfi_def_cfa_offset 16
2531; RV32-NEXT:    sw a0, 8(sp)
2532; RV32-NEXT:    sw a1, 12(sp)
2533; RV32-NEXT:    addi a0, sp, 8
2534; RV32-NEXT:    vsetvli zero, a2, e64, m1, ta, ma
2535; RV32-NEXT:    vlse64.v v9, (a0), zero
2536; RV32-NEXT:    vmsltu.vv v0, v9, v8, v0.t
2537; RV32-NEXT:    addi sp, sp, 16
2538; RV32-NEXT:    .cfi_def_cfa_offset 0
2539; RV32-NEXT:    ret
2540;
2541; RV64-LABEL: icmp_ugt_vx_nxv1i64:
2542; RV64:       # %bb.0:
2543; RV64-NEXT:    vsetvli zero, a1, e64, m1, ta, ma
2544; RV64-NEXT:    vmsgtu.vx v0, v8, a0, v0.t
2545; RV64-NEXT:    ret
2546  %elt.head = insertelement <vscale x 1 x i64> poison, i64 %b, i32 0
2547  %vb = shufflevector <vscale x 1 x i64> %elt.head, <vscale x 1 x i64> poison, <vscale x 1 x i32> zeroinitializer
2548  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %vb, metadata !"ugt", <vscale x 1 x i1> %m, i32 %evl)
2549  ret <vscale x 1 x i1> %v
2550}
2551
2552define <vscale x 1 x i1> @icmp_ugt_vx_swap_nxv1i64(<vscale x 1 x i64> %va, i64 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {
2553; RV32-LABEL: icmp_ugt_vx_swap_nxv1i64:
2554; RV32:       # %bb.0:
2555; RV32-NEXT:    addi sp, sp, -16
2556; RV32-NEXT:    .cfi_def_cfa_offset 16
2557; RV32-NEXT:    sw a0, 8(sp)
2558; RV32-NEXT:    sw a1, 12(sp)
2559; RV32-NEXT:    addi a0, sp, 8
2560; RV32-NEXT:    vsetvli zero, a2, e64, m1, ta, ma
2561; RV32-NEXT:    vlse64.v v9, (a0), zero
2562; RV32-NEXT:    vmsltu.vv v0, v8, v9, v0.t
2563; RV32-NEXT:    addi sp, sp, 16
2564; RV32-NEXT:    .cfi_def_cfa_offset 0
2565; RV32-NEXT:    ret
2566;
2567; RV64-LABEL: icmp_ugt_vx_swap_nxv1i64:
2568; RV64:       # %bb.0:
2569; RV64-NEXT:    vsetvli zero, a1, e64, m1, ta, ma
2570; RV64-NEXT:    vmsltu.vx v0, v8, a0, v0.t
2571; RV64-NEXT:    ret
2572  %elt.head = insertelement <vscale x 1 x i64> poison, i64 %b, i32 0
2573  %vb = shufflevector <vscale x 1 x i64> %elt.head, <vscale x 1 x i64> poison, <vscale x 1 x i32> zeroinitializer
2574  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i64(<vscale x 1 x i64> %vb, <vscale x 1 x i64> %va, metadata !"ugt", <vscale x 1 x i1> %m, i32 %evl)
2575  ret <vscale x 1 x i1> %v
2576}
2577
2578define <vscale x 1 x i1> @icmp_ugt_vi_nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {
2579; CHECK-LABEL: icmp_ugt_vi_nxv1i64:
2580; CHECK:       # %bb.0:
2581; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma
2582; CHECK-NEXT:    vmsgtu.vi v0, v8, 4, v0.t
2583; CHECK-NEXT:    ret
2584  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> splat (i64 4), metadata !"ugt", <vscale x 1 x i1> %m, i32 %evl)
2585  ret <vscale x 1 x i1> %v
2586}
2587
2588define <vscale x 1 x i1> @icmp_ugt_vi_swap_nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {
2589; CHECK-LABEL: icmp_ugt_vi_swap_nxv1i64:
2590; CHECK:       # %bb.0:
2591; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma
2592; CHECK-NEXT:    vmsleu.vi v0, v8, 3, v0.t
2593; CHECK-NEXT:    ret
2594  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i64(<vscale x 1 x i64> splat (i64 4), <vscale x 1 x i64> %va, metadata !"ugt", <vscale x 1 x i1> %m, i32 %evl)
2595  ret <vscale x 1 x i1> %v
2596}
2597
2598define <vscale x 1 x i1> @icmp_uge_vv_nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) {
2599; CHECK-LABEL: icmp_uge_vv_nxv1i64:
2600; CHECK:       # %bb.0:
2601; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma
2602; CHECK-NEXT:    vmsleu.vv v0, v9, v8, v0.t
2603; CHECK-NEXT:    ret
2604  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %vb, metadata !"uge", <vscale x 1 x i1> %m, i32 %evl)
2605  ret <vscale x 1 x i1> %v
2606}
2607
2608define <vscale x 1 x i1> @icmp_uge_vx_nxv1i64(<vscale x 1 x i64> %va, i64 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {
2609; RV32-LABEL: icmp_uge_vx_nxv1i64:
2610; RV32:       # %bb.0:
2611; RV32-NEXT:    addi sp, sp, -16
2612; RV32-NEXT:    .cfi_def_cfa_offset 16
2613; RV32-NEXT:    sw a0, 8(sp)
2614; RV32-NEXT:    sw a1, 12(sp)
2615; RV32-NEXT:    addi a0, sp, 8
2616; RV32-NEXT:    vsetvli zero, a2, e64, m1, ta, ma
2617; RV32-NEXT:    vlse64.v v9, (a0), zero
2618; RV32-NEXT:    vmsleu.vv v0, v9, v8, v0.t
2619; RV32-NEXT:    addi sp, sp, 16
2620; RV32-NEXT:    .cfi_def_cfa_offset 0
2621; RV32-NEXT:    ret
2622;
2623; RV64-LABEL: icmp_uge_vx_nxv1i64:
2624; RV64:       # %bb.0:
2625; RV64-NEXT:    vsetvli zero, a1, e64, m1, ta, ma
2626; RV64-NEXT:    vmv.v.x v9, a0
2627; RV64-NEXT:    vmsleu.vv v0, v9, v8, v0.t
2628; RV64-NEXT:    ret
2629  %elt.head = insertelement <vscale x 1 x i64> poison, i64 %b, i32 0
2630  %vb = shufflevector <vscale x 1 x i64> %elt.head, <vscale x 1 x i64> poison, <vscale x 1 x i32> zeroinitializer
2631  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %vb, metadata !"uge", <vscale x 1 x i1> %m, i32 %evl)
2632  ret <vscale x 1 x i1> %v
2633}
2634
2635define <vscale x 1 x i1> @icmp_uge_vx_swap_nxv1i64(<vscale x 1 x i64> %va, i64 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {
2636; RV32-LABEL: icmp_uge_vx_swap_nxv1i64:
2637; RV32:       # %bb.0:
2638; RV32-NEXT:    addi sp, sp, -16
2639; RV32-NEXT:    .cfi_def_cfa_offset 16
2640; RV32-NEXT:    sw a0, 8(sp)
2641; RV32-NEXT:    sw a1, 12(sp)
2642; RV32-NEXT:    addi a0, sp, 8
2643; RV32-NEXT:    vsetvli zero, a2, e64, m1, ta, ma
2644; RV32-NEXT:    vlse64.v v9, (a0), zero
2645; RV32-NEXT:    vmsleu.vv v0, v8, v9, v0.t
2646; RV32-NEXT:    addi sp, sp, 16
2647; RV32-NEXT:    .cfi_def_cfa_offset 0
2648; RV32-NEXT:    ret
2649;
2650; RV64-LABEL: icmp_uge_vx_swap_nxv1i64:
2651; RV64:       # %bb.0:
2652; RV64-NEXT:    vsetvli zero, a1, e64, m1, ta, ma
2653; RV64-NEXT:    vmsleu.vx v0, v8, a0, v0.t
2654; RV64-NEXT:    ret
2655  %elt.head = insertelement <vscale x 1 x i64> poison, i64 %b, i32 0
2656  %vb = shufflevector <vscale x 1 x i64> %elt.head, <vscale x 1 x i64> poison, <vscale x 1 x i32> zeroinitializer
2657  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i64(<vscale x 1 x i64> %vb, <vscale x 1 x i64> %va, metadata !"uge", <vscale x 1 x i1> %m, i32 %evl)
2658  ret <vscale x 1 x i1> %v
2659}
2660
2661define <vscale x 1 x i1> @icmp_uge_vi_nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {
2662; CHECK-LABEL: icmp_uge_vi_nxv1i64:
2663; CHECK:       # %bb.0:
2664; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma
2665; CHECK-NEXT:    vmsgtu.vi v0, v8, 3, v0.t
2666; CHECK-NEXT:    ret
2667  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> splat (i64 4), metadata !"uge", <vscale x 1 x i1> %m, i32 %evl)
2668  ret <vscale x 1 x i1> %v
2669}
2670
2671define <vscale x 1 x i1> @icmp_uge_vi_swap_nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {
2672; CHECK-LABEL: icmp_uge_vi_swap_nxv1i64:
2673; CHECK:       # %bb.0:
2674; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma
2675; CHECK-NEXT:    vmsleu.vi v0, v8, 4, v0.t
2676; CHECK-NEXT:    ret
2677  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i64(<vscale x 1 x i64> splat (i64 4), <vscale x 1 x i64> %va, metadata !"uge", <vscale x 1 x i1> %m, i32 %evl)
2678  ret <vscale x 1 x i1> %v
2679}
2680
2681define <vscale x 1 x i1> @icmp_ult_vv_nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) {
2682; CHECK-LABEL: icmp_ult_vv_nxv1i64:
2683; CHECK:       # %bb.0:
2684; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma
2685; CHECK-NEXT:    vmsltu.vv v0, v8, v9, v0.t
2686; CHECK-NEXT:    ret
2687  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %vb, metadata !"ult", <vscale x 1 x i1> %m, i32 %evl)
2688  ret <vscale x 1 x i1> %v
2689}
2690
2691define <vscale x 1 x i1> @icmp_ult_vx_nxv1i64(<vscale x 1 x i64> %va, i64 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {
2692; RV32-LABEL: icmp_ult_vx_nxv1i64:
2693; RV32:       # %bb.0:
2694; RV32-NEXT:    addi sp, sp, -16
2695; RV32-NEXT:    .cfi_def_cfa_offset 16
2696; RV32-NEXT:    sw a0, 8(sp)
2697; RV32-NEXT:    sw a1, 12(sp)
2698; RV32-NEXT:    addi a0, sp, 8
2699; RV32-NEXT:    vsetvli zero, a2, e64, m1, ta, ma
2700; RV32-NEXT:    vlse64.v v9, (a0), zero
2701; RV32-NEXT:    vmsltu.vv v0, v8, v9, v0.t
2702; RV32-NEXT:    addi sp, sp, 16
2703; RV32-NEXT:    .cfi_def_cfa_offset 0
2704; RV32-NEXT:    ret
2705;
2706; RV64-LABEL: icmp_ult_vx_nxv1i64:
2707; RV64:       # %bb.0:
2708; RV64-NEXT:    vsetvli zero, a1, e64, m1, ta, ma
2709; RV64-NEXT:    vmsltu.vx v0, v8, a0, v0.t
2710; RV64-NEXT:    ret
2711  %elt.head = insertelement <vscale x 1 x i64> poison, i64 %b, i32 0
2712  %vb = shufflevector <vscale x 1 x i64> %elt.head, <vscale x 1 x i64> poison, <vscale x 1 x i32> zeroinitializer
2713  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %vb, metadata !"ult", <vscale x 1 x i1> %m, i32 %evl)
2714  ret <vscale x 1 x i1> %v
2715}
2716
2717define <vscale x 1 x i1> @icmp_ult_vx_swap_nxv1i64(<vscale x 1 x i64> %va, i64 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {
2718; RV32-LABEL: icmp_ult_vx_swap_nxv1i64:
2719; RV32:       # %bb.0:
2720; RV32-NEXT:    addi sp, sp, -16
2721; RV32-NEXT:    .cfi_def_cfa_offset 16
2722; RV32-NEXT:    sw a0, 8(sp)
2723; RV32-NEXT:    sw a1, 12(sp)
2724; RV32-NEXT:    addi a0, sp, 8
2725; RV32-NEXT:    vsetvli zero, a2, e64, m1, ta, ma
2726; RV32-NEXT:    vlse64.v v9, (a0), zero
2727; RV32-NEXT:    vmsltu.vv v0, v9, v8, v0.t
2728; RV32-NEXT:    addi sp, sp, 16
2729; RV32-NEXT:    .cfi_def_cfa_offset 0
2730; RV32-NEXT:    ret
2731;
2732; RV64-LABEL: icmp_ult_vx_swap_nxv1i64:
2733; RV64:       # %bb.0:
2734; RV64-NEXT:    vsetvli zero, a1, e64, m1, ta, ma
2735; RV64-NEXT:    vmsgtu.vx v0, v8, a0, v0.t
2736; RV64-NEXT:    ret
2737  %elt.head = insertelement <vscale x 1 x i64> poison, i64 %b, i32 0
2738  %vb = shufflevector <vscale x 1 x i64> %elt.head, <vscale x 1 x i64> poison, <vscale x 1 x i32> zeroinitializer
2739  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i64(<vscale x 1 x i64> %vb, <vscale x 1 x i64> %va, metadata !"ult", <vscale x 1 x i1> %m, i32 %evl)
2740  ret <vscale x 1 x i1> %v
2741}
2742
2743define <vscale x 1 x i1> @icmp_ult_vi_nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {
2744; CHECK-LABEL: icmp_ult_vi_nxv1i64:
2745; CHECK:       # %bb.0:
2746; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma
2747; CHECK-NEXT:    vmsleu.vi v0, v8, 3, v0.t
2748; CHECK-NEXT:    ret
2749  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> splat (i64 4), metadata !"ult", <vscale x 1 x i1> %m, i32 %evl)
2750  ret <vscale x 1 x i1> %v
2751}
2752
2753define <vscale x 1 x i1> @icmp_ult_vi_swap_nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {
2754; CHECK-LABEL: icmp_ult_vi_swap_nxv1i64:
2755; CHECK:       # %bb.0:
2756; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma
2757; CHECK-NEXT:    vmsgtu.vi v0, v8, 4, v0.t
2758; CHECK-NEXT:    ret
2759  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i64(<vscale x 1 x i64> splat (i64 4), <vscale x 1 x i64> %va, metadata !"ult", <vscale x 1 x i1> %m, i32 %evl)
2760  ret <vscale x 1 x i1> %v
2761}
2762
2763define <vscale x 1 x i1> @icmp_sgt_vv_nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) {
2764; CHECK-LABEL: icmp_sgt_vv_nxv1i64:
2765; CHECK:       # %bb.0:
2766; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma
2767; CHECK-NEXT:    vmslt.vv v0, v9, v8, v0.t
2768; CHECK-NEXT:    ret
2769  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %vb, metadata !"sgt", <vscale x 1 x i1> %m, i32 %evl)
2770  ret <vscale x 1 x i1> %v
2771}
2772
2773define <vscale x 1 x i1> @icmp_sgt_vx_nxv1i64(<vscale x 1 x i64> %va, i64 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {
2774; RV32-LABEL: icmp_sgt_vx_nxv1i64:
2775; RV32:       # %bb.0:
2776; RV32-NEXT:    addi sp, sp, -16
2777; RV32-NEXT:    .cfi_def_cfa_offset 16
2778; RV32-NEXT:    sw a0, 8(sp)
2779; RV32-NEXT:    sw a1, 12(sp)
2780; RV32-NEXT:    addi a0, sp, 8
2781; RV32-NEXT:    vsetvli zero, a2, e64, m1, ta, ma
2782; RV32-NEXT:    vlse64.v v9, (a0), zero
2783; RV32-NEXT:    vmslt.vv v0, v9, v8, v0.t
2784; RV32-NEXT:    addi sp, sp, 16
2785; RV32-NEXT:    .cfi_def_cfa_offset 0
2786; RV32-NEXT:    ret
2787;
2788; RV64-LABEL: icmp_sgt_vx_nxv1i64:
2789; RV64:       # %bb.0:
2790; RV64-NEXT:    vsetvli zero, a1, e64, m1, ta, ma
2791; RV64-NEXT:    vmsgt.vx v0, v8, a0, v0.t
2792; RV64-NEXT:    ret
2793  %elt.head = insertelement <vscale x 1 x i64> poison, i64 %b, i32 0
2794  %vb = shufflevector <vscale x 1 x i64> %elt.head, <vscale x 1 x i64> poison, <vscale x 1 x i32> zeroinitializer
2795  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %vb, metadata !"sgt", <vscale x 1 x i1> %m, i32 %evl)
2796  ret <vscale x 1 x i1> %v
2797}
2798
2799define <vscale x 1 x i1> @icmp_sgt_vx_swap_nxv1i64(<vscale x 1 x i64> %va, i64 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {
2800; RV32-LABEL: icmp_sgt_vx_swap_nxv1i64:
2801; RV32:       # %bb.0:
2802; RV32-NEXT:    addi sp, sp, -16
2803; RV32-NEXT:    .cfi_def_cfa_offset 16
2804; RV32-NEXT:    sw a0, 8(sp)
2805; RV32-NEXT:    sw a1, 12(sp)
2806; RV32-NEXT:    addi a0, sp, 8
2807; RV32-NEXT:    vsetvli zero, a2, e64, m1, ta, ma
2808; RV32-NEXT:    vlse64.v v9, (a0), zero
2809; RV32-NEXT:    vmslt.vv v0, v8, v9, v0.t
2810; RV32-NEXT:    addi sp, sp, 16
2811; RV32-NEXT:    .cfi_def_cfa_offset 0
2812; RV32-NEXT:    ret
2813;
2814; RV64-LABEL: icmp_sgt_vx_swap_nxv1i64:
2815; RV64:       # %bb.0:
2816; RV64-NEXT:    vsetvli zero, a1, e64, m1, ta, ma
2817; RV64-NEXT:    vmslt.vx v0, v8, a0, v0.t
2818; RV64-NEXT:    ret
2819  %elt.head = insertelement <vscale x 1 x i64> poison, i64 %b, i32 0
2820  %vb = shufflevector <vscale x 1 x i64> %elt.head, <vscale x 1 x i64> poison, <vscale x 1 x i32> zeroinitializer
2821  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i64(<vscale x 1 x i64> %vb, <vscale x 1 x i64> %va, metadata !"sgt", <vscale x 1 x i1> %m, i32 %evl)
2822  ret <vscale x 1 x i1> %v
2823}
2824
2825define <vscale x 1 x i1> @icmp_sgt_vi_nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {
2826; CHECK-LABEL: icmp_sgt_vi_nxv1i64:
2827; CHECK:       # %bb.0:
2828; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma
2829; CHECK-NEXT:    vmsgt.vi v0, v8, 4, v0.t
2830; CHECK-NEXT:    ret
2831  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> splat (i64 4), metadata !"sgt", <vscale x 1 x i1> %m, i32 %evl)
2832  ret <vscale x 1 x i1> %v
2833}
2834
2835define <vscale x 1 x i1> @icmp_sgt_vi_swap_nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {
2836; CHECK-LABEL: icmp_sgt_vi_swap_nxv1i64:
2837; CHECK:       # %bb.0:
2838; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma
2839; CHECK-NEXT:    vmsle.vi v0, v8, 3, v0.t
2840; CHECK-NEXT:    ret
2841  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i64(<vscale x 1 x i64> splat (i64 4), <vscale x 1 x i64> %va, metadata !"sgt", <vscale x 1 x i1> %m, i32 %evl)
2842  ret <vscale x 1 x i1> %v
2843}
2844
2845define <vscale x 1 x i1> @icmp_sge_vv_nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) {
2846; CHECK-LABEL: icmp_sge_vv_nxv1i64:
2847; CHECK:       # %bb.0:
2848; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma
2849; CHECK-NEXT:    vmsle.vv v0, v9, v8, v0.t
2850; CHECK-NEXT:    ret
2851  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %vb, metadata !"sge", <vscale x 1 x i1> %m, i32 %evl)
2852  ret <vscale x 1 x i1> %v
2853}
2854
2855define <vscale x 1 x i1> @icmp_sge_vx_nxv1i64(<vscale x 1 x i64> %va, i64 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {
2856; RV32-LABEL: icmp_sge_vx_nxv1i64:
2857; RV32:       # %bb.0:
2858; RV32-NEXT:    addi sp, sp, -16
2859; RV32-NEXT:    .cfi_def_cfa_offset 16
2860; RV32-NEXT:    sw a0, 8(sp)
2861; RV32-NEXT:    sw a1, 12(sp)
2862; RV32-NEXT:    addi a0, sp, 8
2863; RV32-NEXT:    vsetvli zero, a2, e64, m1, ta, ma
2864; RV32-NEXT:    vlse64.v v9, (a0), zero
2865; RV32-NEXT:    vmsle.vv v0, v9, v8, v0.t
2866; RV32-NEXT:    addi sp, sp, 16
2867; RV32-NEXT:    .cfi_def_cfa_offset 0
2868; RV32-NEXT:    ret
2869;
2870; RV64-LABEL: icmp_sge_vx_nxv1i64:
2871; RV64:       # %bb.0:
2872; RV64-NEXT:    vsetvli zero, a1, e64, m1, ta, ma
2873; RV64-NEXT:    vmv.v.x v9, a0
2874; RV64-NEXT:    vmsle.vv v0, v9, v8, v0.t
2875; RV64-NEXT:    ret
2876  %elt.head = insertelement <vscale x 1 x i64> poison, i64 %b, i32 0
2877  %vb = shufflevector <vscale x 1 x i64> %elt.head, <vscale x 1 x i64> poison, <vscale x 1 x i32> zeroinitializer
2878  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %vb, metadata !"sge", <vscale x 1 x i1> %m, i32 %evl)
2879  ret <vscale x 1 x i1> %v
2880}
2881
2882define <vscale x 1 x i1> @icmp_sge_vx_swap_nxv1i64(<vscale x 1 x i64> %va, i64 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {
2883; RV32-LABEL: icmp_sge_vx_swap_nxv1i64:
2884; RV32:       # %bb.0:
2885; RV32-NEXT:    addi sp, sp, -16
2886; RV32-NEXT:    .cfi_def_cfa_offset 16
2887; RV32-NEXT:    sw a0, 8(sp)
2888; RV32-NEXT:    sw a1, 12(sp)
2889; RV32-NEXT:    addi a0, sp, 8
2890; RV32-NEXT:    vsetvli zero, a2, e64, m1, ta, ma
2891; RV32-NEXT:    vlse64.v v9, (a0), zero
2892; RV32-NEXT:    vmsle.vv v0, v8, v9, v0.t
2893; RV32-NEXT:    addi sp, sp, 16
2894; RV32-NEXT:    .cfi_def_cfa_offset 0
2895; RV32-NEXT:    ret
2896;
2897; RV64-LABEL: icmp_sge_vx_swap_nxv1i64:
2898; RV64:       # %bb.0:
2899; RV64-NEXT:    vsetvli zero, a1, e64, m1, ta, ma
2900; RV64-NEXT:    vmsle.vx v0, v8, a0, v0.t
2901; RV64-NEXT:    ret
2902  %elt.head = insertelement <vscale x 1 x i64> poison, i64 %b, i32 0
2903  %vb = shufflevector <vscale x 1 x i64> %elt.head, <vscale x 1 x i64> poison, <vscale x 1 x i32> zeroinitializer
2904  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i64(<vscale x 1 x i64> %vb, <vscale x 1 x i64> %va, metadata !"sge", <vscale x 1 x i1> %m, i32 %evl)
2905  ret <vscale x 1 x i1> %v
2906}
2907
2908define <vscale x 1 x i1> @icmp_sge_vi_nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {
2909; CHECK-LABEL: icmp_sge_vi_nxv1i64:
2910; CHECK:       # %bb.0:
2911; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma
2912; CHECK-NEXT:    vmsgt.vi v0, v8, 3, v0.t
2913; CHECK-NEXT:    ret
2914  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> splat (i64 4), metadata !"sge", <vscale x 1 x i1> %m, i32 %evl)
2915  ret <vscale x 1 x i1> %v
2916}
2917
2918define <vscale x 1 x i1> @icmp_sge_vi_swap_nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {
2919; CHECK-LABEL: icmp_sge_vi_swap_nxv1i64:
2920; CHECK:       # %bb.0:
2921; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma
2922; CHECK-NEXT:    vmsle.vi v0, v8, 4, v0.t
2923; CHECK-NEXT:    ret
2924  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i64(<vscale x 1 x i64> splat (i64 4), <vscale x 1 x i64> %va, metadata !"sge", <vscale x 1 x i1> %m, i32 %evl)
2925  ret <vscale x 1 x i1> %v
2926}
2927
2928define <vscale x 1 x i1> @icmp_slt_vv_nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) {
2929; CHECK-LABEL: icmp_slt_vv_nxv1i64:
2930; CHECK:       # %bb.0:
2931; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma
2932; CHECK-NEXT:    vmslt.vv v0, v8, v9, v0.t
2933; CHECK-NEXT:    ret
2934  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %vb, metadata !"slt", <vscale x 1 x i1> %m, i32 %evl)
2935  ret <vscale x 1 x i1> %v
2936}
2937
2938define <vscale x 1 x i1> @icmp_slt_vx_nxv1i64(<vscale x 1 x i64> %va, i64 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {
2939; RV32-LABEL: icmp_slt_vx_nxv1i64:
2940; RV32:       # %bb.0:
2941; RV32-NEXT:    addi sp, sp, -16
2942; RV32-NEXT:    .cfi_def_cfa_offset 16
2943; RV32-NEXT:    sw a0, 8(sp)
2944; RV32-NEXT:    sw a1, 12(sp)
2945; RV32-NEXT:    addi a0, sp, 8
2946; RV32-NEXT:    vsetvli zero, a2, e64, m1, ta, ma
2947; RV32-NEXT:    vlse64.v v9, (a0), zero
2948; RV32-NEXT:    vmslt.vv v0, v8, v9, v0.t
2949; RV32-NEXT:    addi sp, sp, 16
2950; RV32-NEXT:    .cfi_def_cfa_offset 0
2951; RV32-NEXT:    ret
2952;
2953; RV64-LABEL: icmp_slt_vx_nxv1i64:
2954; RV64:       # %bb.0:
2955; RV64-NEXT:    vsetvli zero, a1, e64, m1, ta, ma
2956; RV64-NEXT:    vmslt.vx v0, v8, a0, v0.t
2957; RV64-NEXT:    ret
2958  %elt.head = insertelement <vscale x 1 x i64> poison, i64 %b, i32 0
2959  %vb = shufflevector <vscale x 1 x i64> %elt.head, <vscale x 1 x i64> poison, <vscale x 1 x i32> zeroinitializer
2960  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %vb, metadata !"slt", <vscale x 1 x i1> %m, i32 %evl)
2961  ret <vscale x 1 x i1> %v
2962}
2963
2964define <vscale x 1 x i1> @icmp_slt_vx_swap_nxv1i64(<vscale x 1 x i64> %va, i64 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {
2965; RV32-LABEL: icmp_slt_vx_swap_nxv1i64:
2966; RV32:       # %bb.0:
2967; RV32-NEXT:    addi sp, sp, -16
2968; RV32-NEXT:    .cfi_def_cfa_offset 16
2969; RV32-NEXT:    sw a0, 8(sp)
2970; RV32-NEXT:    sw a1, 12(sp)
2971; RV32-NEXT:    addi a0, sp, 8
2972; RV32-NEXT:    vsetvli zero, a2, e64, m1, ta, ma
2973; RV32-NEXT:    vlse64.v v9, (a0), zero
2974; RV32-NEXT:    vmslt.vv v0, v9, v8, v0.t
2975; RV32-NEXT:    addi sp, sp, 16
2976; RV32-NEXT:    .cfi_def_cfa_offset 0
2977; RV32-NEXT:    ret
2978;
2979; RV64-LABEL: icmp_slt_vx_swap_nxv1i64:
2980; RV64:       # %bb.0:
2981; RV64-NEXT:    vsetvli zero, a1, e64, m1, ta, ma
2982; RV64-NEXT:    vmsgt.vx v0, v8, a0, v0.t
2983; RV64-NEXT:    ret
2984  %elt.head = insertelement <vscale x 1 x i64> poison, i64 %b, i32 0
2985  %vb = shufflevector <vscale x 1 x i64> %elt.head, <vscale x 1 x i64> poison, <vscale x 1 x i32> zeroinitializer
2986  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i64(<vscale x 1 x i64> %vb, <vscale x 1 x i64> %va, metadata !"slt", <vscale x 1 x i1> %m, i32 %evl)
2987  ret <vscale x 1 x i1> %v
2988}
2989
2990define <vscale x 1 x i1> @icmp_slt_vi_nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {
2991; CHECK-LABEL: icmp_slt_vi_nxv1i64:
2992; CHECK:       # %bb.0:
2993; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma
2994; CHECK-NEXT:    vmsle.vi v0, v8, 3, v0.t
2995; CHECK-NEXT:    ret
2996  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> splat (i64 4), metadata !"slt", <vscale x 1 x i1> %m, i32 %evl)
2997  ret <vscale x 1 x i1> %v
2998}
2999
3000define <vscale x 1 x i1> @icmp_slt_vi_swap_nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {
3001; CHECK-LABEL: icmp_slt_vi_swap_nxv1i64:
3002; CHECK:       # %bb.0:
3003; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma
3004; CHECK-NEXT:    vmsgt.vi v0, v8, 4, v0.t
3005; CHECK-NEXT:    ret
3006  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i64(<vscale x 1 x i64> splat (i64 4), <vscale x 1 x i64> %va, metadata !"slt", <vscale x 1 x i1> %m, i32 %evl)
3007  ret <vscale x 1 x i1> %v
3008}
3009
3010define <vscale x 1 x i1> @icmp_sle_vv_nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) {
3011; CHECK-LABEL: icmp_sle_vv_nxv1i64:
3012; CHECK:       # %bb.0:
3013; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma
3014; CHECK-NEXT:    vmsle.vv v0, v8, v9, v0.t
3015; CHECK-NEXT:    ret
3016  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %vb, metadata !"sle", <vscale x 1 x i1> %m, i32 %evl)
3017  ret <vscale x 1 x i1> %v
3018}
3019
3020define <vscale x 1 x i1> @icmp_sle_vx_nxv1i64(<vscale x 1 x i64> %va, i64 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {
3021; RV32-LABEL: icmp_sle_vx_nxv1i64:
3022; RV32:       # %bb.0:
3023; RV32-NEXT:    addi sp, sp, -16
3024; RV32-NEXT:    .cfi_def_cfa_offset 16
3025; RV32-NEXT:    sw a0, 8(sp)
3026; RV32-NEXT:    sw a1, 12(sp)
3027; RV32-NEXT:    addi a0, sp, 8
3028; RV32-NEXT:    vsetvli zero, a2, e64, m1, ta, ma
3029; RV32-NEXT:    vlse64.v v9, (a0), zero
3030; RV32-NEXT:    vmsle.vv v0, v8, v9, v0.t
3031; RV32-NEXT:    addi sp, sp, 16
3032; RV32-NEXT:    .cfi_def_cfa_offset 0
3033; RV32-NEXT:    ret
3034;
3035; RV64-LABEL: icmp_sle_vx_nxv1i64:
3036; RV64:       # %bb.0:
3037; RV64-NEXT:    vsetvli zero, a1, e64, m1, ta, ma
3038; RV64-NEXT:    vmsle.vx v0, v8, a0, v0.t
3039; RV64-NEXT:    ret
3040  %elt.head = insertelement <vscale x 1 x i64> poison, i64 %b, i32 0
3041  %vb = shufflevector <vscale x 1 x i64> %elt.head, <vscale x 1 x i64> poison, <vscale x 1 x i32> zeroinitializer
3042  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %vb, metadata !"sle", <vscale x 1 x i1> %m, i32 %evl)
3043  ret <vscale x 1 x i1> %v
3044}
3045
3046define <vscale x 1 x i1> @icmp_sle_vx_swap_nxv1i64(<vscale x 1 x i64> %va, i64 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {
3047; RV32-LABEL: icmp_sle_vx_swap_nxv1i64:
3048; RV32:       # %bb.0:
3049; RV32-NEXT:    addi sp, sp, -16
3050; RV32-NEXT:    .cfi_def_cfa_offset 16
3051; RV32-NEXT:    sw a0, 8(sp)
3052; RV32-NEXT:    sw a1, 12(sp)
3053; RV32-NEXT:    addi a0, sp, 8
3054; RV32-NEXT:    vsetvli zero, a2, e64, m1, ta, ma
3055; RV32-NEXT:    vlse64.v v9, (a0), zero
3056; RV32-NEXT:    vmsle.vv v0, v9, v8, v0.t
3057; RV32-NEXT:    addi sp, sp, 16
3058; RV32-NEXT:    .cfi_def_cfa_offset 0
3059; RV32-NEXT:    ret
3060;
3061; RV64-LABEL: icmp_sle_vx_swap_nxv1i64:
3062; RV64:       # %bb.0:
3063; RV64-NEXT:    vsetvli zero, a1, e64, m1, ta, ma
3064; RV64-NEXT:    vmv.v.x v9, a0
3065; RV64-NEXT:    vmsle.vv v0, v9, v8, v0.t
3066; RV64-NEXT:    ret
3067  %elt.head = insertelement <vscale x 1 x i64> poison, i64 %b, i32 0
3068  %vb = shufflevector <vscale x 1 x i64> %elt.head, <vscale x 1 x i64> poison, <vscale x 1 x i32> zeroinitializer
3069  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i64(<vscale x 1 x i64> %vb, <vscale x 1 x i64> %va, metadata !"sle", <vscale x 1 x i1> %m, i32 %evl)
3070  ret <vscale x 1 x i1> %v
3071}
3072
3073define <vscale x 1 x i1> @icmp_sle_vi_nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {
3074; CHECK-LABEL: icmp_sle_vi_nxv1i64:
3075; CHECK:       # %bb.0:
3076; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma
3077; CHECK-NEXT:    vmsle.vi v0, v8, 4, v0.t
3078; CHECK-NEXT:    ret
3079  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> splat (i64 4), metadata !"sle", <vscale x 1 x i1> %m, i32 %evl)
3080  ret <vscale x 1 x i1> %v
3081}
3082
3083define <vscale x 1 x i1> @icmp_sle_vi_swap_nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {
3084; CHECK-LABEL: icmp_sle_vi_swap_nxv1i64:
3085; CHECK:       # %bb.0:
3086; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma
3087; CHECK-NEXT:    vmsgt.vi v0, v8, 3, v0.t
3088; CHECK-NEXT:    ret
3089  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i64(<vscale x 1 x i64> splat (i64 4), <vscale x 1 x i64> %va, metadata !"sle", <vscale x 1 x i1> %m, i32 %evl)
3090  ret <vscale x 1 x i1> %v
3091}
3092
3093declare <vscale x 8 x i1> @llvm.vp.icmp.nxv8i64(<vscale x 8 x i64>, <vscale x 8 x i64>, metadata, <vscale x 8 x i1>, i32)
3094
3095define <vscale x 8 x i1> @icmp_eq_vv_nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) {
3096; CHECK-LABEL: icmp_eq_vv_nxv8i64:
3097; CHECK:       # %bb.0:
3098; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma
3099; CHECK-NEXT:    vmseq.vv v24, v8, v16, v0.t
3100; CHECK-NEXT:    vmv1r.v v0, v24
3101; CHECK-NEXT:    ret
3102  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %vb, metadata !"eq", <vscale x 8 x i1> %m, i32 %evl)
3103  ret <vscale x 8 x i1> %v
3104}
3105
3106define <vscale x 8 x i1> @icmp_eq_vx_nxv8i64(<vscale x 8 x i64> %va, i64 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {
3107; RV32-LABEL: icmp_eq_vx_nxv8i64:
3108; RV32:       # %bb.0:
3109; RV32-NEXT:    addi sp, sp, -16
3110; RV32-NEXT:    .cfi_def_cfa_offset 16
3111; RV32-NEXT:    sw a0, 8(sp)
3112; RV32-NEXT:    sw a1, 12(sp)
3113; RV32-NEXT:    addi a0, sp, 8
3114; RV32-NEXT:    vsetvli zero, a2, e64, m8, ta, ma
3115; RV32-NEXT:    vlse64.v v24, (a0), zero
3116; RV32-NEXT:    vmseq.vv v16, v8, v24, v0.t
3117; RV32-NEXT:    vmv1r.v v0, v16
3118; RV32-NEXT:    addi sp, sp, 16
3119; RV32-NEXT:    .cfi_def_cfa_offset 0
3120; RV32-NEXT:    ret
3121;
3122; RV64-LABEL: icmp_eq_vx_nxv8i64:
3123; RV64:       # %bb.0:
3124; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma
3125; RV64-NEXT:    vmseq.vx v16, v8, a0, v0.t
3126; RV64-NEXT:    vmv1r.v v0, v16
3127; RV64-NEXT:    ret
3128  %elt.head = insertelement <vscale x 8 x i64> poison, i64 %b, i32 0
3129  %vb = shufflevector <vscale x 8 x i64> %elt.head, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer
3130  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %vb, metadata !"eq", <vscale x 8 x i1> %m, i32 %evl)
3131  ret <vscale x 8 x i1> %v
3132}
3133
3134define <vscale x 8 x i1> @icmp_eq_vx_swap_nxv8i64(<vscale x 8 x i64> %va, i64 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {
3135; RV32-LABEL: icmp_eq_vx_swap_nxv8i64:
3136; RV32:       # %bb.0:
3137; RV32-NEXT:    addi sp, sp, -16
3138; RV32-NEXT:    .cfi_def_cfa_offset 16
3139; RV32-NEXT:    sw a0, 8(sp)
3140; RV32-NEXT:    sw a1, 12(sp)
3141; RV32-NEXT:    addi a0, sp, 8
3142; RV32-NEXT:    vsetvli zero, a2, e64, m8, ta, ma
3143; RV32-NEXT:    vlse64.v v24, (a0), zero
3144; RV32-NEXT:    vmseq.vv v16, v24, v8, v0.t
3145; RV32-NEXT:    vmv1r.v v0, v16
3146; RV32-NEXT:    addi sp, sp, 16
3147; RV32-NEXT:    .cfi_def_cfa_offset 0
3148; RV32-NEXT:    ret
3149;
3150; RV64-LABEL: icmp_eq_vx_swap_nxv8i64:
3151; RV64:       # %bb.0:
3152; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma
3153; RV64-NEXT:    vmseq.vx v16, v8, a0, v0.t
3154; RV64-NEXT:    vmv1r.v v0, v16
3155; RV64-NEXT:    ret
3156  %elt.head = insertelement <vscale x 8 x i64> poison, i64 %b, i32 0
3157  %vb = shufflevector <vscale x 8 x i64> %elt.head, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer
3158  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i64(<vscale x 8 x i64> %vb, <vscale x 8 x i64> %va, metadata !"eq", <vscale x 8 x i1> %m, i32 %evl)
3159  ret <vscale x 8 x i1> %v
3160}
3161
3162define <vscale x 8 x i1> @icmp_eq_vi_nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {
3163; CHECK-LABEL: icmp_eq_vi_nxv8i64:
3164; CHECK:       # %bb.0:
3165; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma
3166; CHECK-NEXT:    vmseq.vi v16, v8, 4, v0.t
3167; CHECK-NEXT:    vmv1r.v v0, v16
3168; CHECK-NEXT:    ret
3169  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> splat (i64 4), metadata !"eq", <vscale x 8 x i1> %m, i32 %evl)
3170  ret <vscale x 8 x i1> %v
3171}
3172
3173define <vscale x 8 x i1> @icmp_eq_vi_swap_nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {
3174; CHECK-LABEL: icmp_eq_vi_swap_nxv8i64:
3175; CHECK:       # %bb.0:
3176; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma
3177; CHECK-NEXT:    vmseq.vi v16, v8, 4, v0.t
3178; CHECK-NEXT:    vmv1r.v v0, v16
3179; CHECK-NEXT:    ret
3180  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i64(<vscale x 8 x i64> splat (i64 4), <vscale x 8 x i64> %va, metadata !"eq", <vscale x 8 x i1> %m, i32 %evl)
3181  ret <vscale x 8 x i1> %v
3182}
3183
3184define <vscale x 8 x i1> @icmp_ne_vv_nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) {
3185; CHECK-LABEL: icmp_ne_vv_nxv8i64:
3186; CHECK:       # %bb.0:
3187; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma
3188; CHECK-NEXT:    vmsne.vv v24, v8, v16, v0.t
3189; CHECK-NEXT:    vmv1r.v v0, v24
3190; CHECK-NEXT:    ret
3191  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %vb, metadata !"ne", <vscale x 8 x i1> %m, i32 %evl)
3192  ret <vscale x 8 x i1> %v
3193}
3194
3195define <vscale x 8 x i1> @icmp_ne_vx_nxv8i64(<vscale x 8 x i64> %va, i64 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {
3196; RV32-LABEL: icmp_ne_vx_nxv8i64:
3197; RV32:       # %bb.0:
3198; RV32-NEXT:    addi sp, sp, -16
3199; RV32-NEXT:    .cfi_def_cfa_offset 16
3200; RV32-NEXT:    sw a0, 8(sp)
3201; RV32-NEXT:    sw a1, 12(sp)
3202; RV32-NEXT:    addi a0, sp, 8
3203; RV32-NEXT:    vsetvli zero, a2, e64, m8, ta, ma
3204; RV32-NEXT:    vlse64.v v24, (a0), zero
3205; RV32-NEXT:    vmsne.vv v16, v8, v24, v0.t
3206; RV32-NEXT:    vmv1r.v v0, v16
3207; RV32-NEXT:    addi sp, sp, 16
3208; RV32-NEXT:    .cfi_def_cfa_offset 0
3209; RV32-NEXT:    ret
3210;
3211; RV64-LABEL: icmp_ne_vx_nxv8i64:
3212; RV64:       # %bb.0:
3213; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma
3214; RV64-NEXT:    vmsne.vx v16, v8, a0, v0.t
3215; RV64-NEXT:    vmv1r.v v0, v16
3216; RV64-NEXT:    ret
3217  %elt.head = insertelement <vscale x 8 x i64> poison, i64 %b, i32 0
3218  %vb = shufflevector <vscale x 8 x i64> %elt.head, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer
3219  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %vb, metadata !"ne", <vscale x 8 x i1> %m, i32 %evl)
3220  ret <vscale x 8 x i1> %v
3221}
3222
3223define <vscale x 8 x i1> @icmp_ne_vx_swap_nxv8i64(<vscale x 8 x i64> %va, i64 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {
3224; RV32-LABEL: icmp_ne_vx_swap_nxv8i64:
3225; RV32:       # %bb.0:
3226; RV32-NEXT:    addi sp, sp, -16
3227; RV32-NEXT:    .cfi_def_cfa_offset 16
3228; RV32-NEXT:    sw a0, 8(sp)
3229; RV32-NEXT:    sw a1, 12(sp)
3230; RV32-NEXT:    addi a0, sp, 8
3231; RV32-NEXT:    vsetvli zero, a2, e64, m8, ta, ma
3232; RV32-NEXT:    vlse64.v v24, (a0), zero
3233; RV32-NEXT:    vmsne.vv v16, v24, v8, v0.t
3234; RV32-NEXT:    vmv1r.v v0, v16
3235; RV32-NEXT:    addi sp, sp, 16
3236; RV32-NEXT:    .cfi_def_cfa_offset 0
3237; RV32-NEXT:    ret
3238;
3239; RV64-LABEL: icmp_ne_vx_swap_nxv8i64:
3240; RV64:       # %bb.0:
3241; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma
3242; RV64-NEXT:    vmsne.vx v16, v8, a0, v0.t
3243; RV64-NEXT:    vmv1r.v v0, v16
3244; RV64-NEXT:    ret
3245  %elt.head = insertelement <vscale x 8 x i64> poison, i64 %b, i32 0
3246  %vb = shufflevector <vscale x 8 x i64> %elt.head, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer
3247  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i64(<vscale x 8 x i64> %vb, <vscale x 8 x i64> %va, metadata !"ne", <vscale x 8 x i1> %m, i32 %evl)
3248  ret <vscale x 8 x i1> %v
3249}
3250
3251define <vscale x 8 x i1> @icmp_ne_vi_nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {
3252; CHECK-LABEL: icmp_ne_vi_nxv8i64:
3253; CHECK:       # %bb.0:
3254; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma
3255; CHECK-NEXT:    vmsne.vi v16, v8, 4, v0.t
3256; CHECK-NEXT:    vmv1r.v v0, v16
3257; CHECK-NEXT:    ret
3258  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> splat (i64 4), metadata !"ne", <vscale x 8 x i1> %m, i32 %evl)
3259  ret <vscale x 8 x i1> %v
3260}
3261
3262define <vscale x 8 x i1> @icmp_ne_vi_swap_nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {
3263; CHECK-LABEL: icmp_ne_vi_swap_nxv8i64:
3264; CHECK:       # %bb.0:
3265; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma
3266; CHECK-NEXT:    vmsne.vi v16, v8, 4, v0.t
3267; CHECK-NEXT:    vmv1r.v v0, v16
3268; CHECK-NEXT:    ret
3269  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i64(<vscale x 8 x i64> splat (i64 4), <vscale x 8 x i64> %va, metadata !"ne", <vscale x 8 x i1> %m, i32 %evl)
3270  ret <vscale x 8 x i1> %v
3271}
3272
3273define <vscale x 8 x i1> @icmp_ugt_vv_nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) {
3274; CHECK-LABEL: icmp_ugt_vv_nxv8i64:
3275; CHECK:       # %bb.0:
3276; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma
3277; CHECK-NEXT:    vmsltu.vv v24, v16, v8, v0.t
3278; CHECK-NEXT:    vmv1r.v v0, v24
3279; CHECK-NEXT:    ret
3280  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %vb, metadata !"ugt", <vscale x 8 x i1> %m, i32 %evl)
3281  ret <vscale x 8 x i1> %v
3282}
3283
3284define <vscale x 8 x i1> @icmp_ugt_vx_nxv8i64(<vscale x 8 x i64> %va, i64 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {
3285; RV32-LABEL: icmp_ugt_vx_nxv8i64:
3286; RV32:       # %bb.0:
3287; RV32-NEXT:    addi sp, sp, -16
3288; RV32-NEXT:    .cfi_def_cfa_offset 16
3289; RV32-NEXT:    sw a0, 8(sp)
3290; RV32-NEXT:    sw a1, 12(sp)
3291; RV32-NEXT:    addi a0, sp, 8
3292; RV32-NEXT:    vsetvli zero, a2, e64, m8, ta, ma
3293; RV32-NEXT:    vlse64.v v24, (a0), zero
3294; RV32-NEXT:    vmsltu.vv v16, v24, v8, v0.t
3295; RV32-NEXT:    vmv1r.v v0, v16
3296; RV32-NEXT:    addi sp, sp, 16
3297; RV32-NEXT:    .cfi_def_cfa_offset 0
3298; RV32-NEXT:    ret
3299;
3300; RV64-LABEL: icmp_ugt_vx_nxv8i64:
3301; RV64:       # %bb.0:
3302; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma
3303; RV64-NEXT:    vmsgtu.vx v16, v8, a0, v0.t
3304; RV64-NEXT:    vmv1r.v v0, v16
3305; RV64-NEXT:    ret
3306  %elt.head = insertelement <vscale x 8 x i64> poison, i64 %b, i32 0
3307  %vb = shufflevector <vscale x 8 x i64> %elt.head, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer
3308  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %vb, metadata !"ugt", <vscale x 8 x i1> %m, i32 %evl)
3309  ret <vscale x 8 x i1> %v
3310}
3311
3312define <vscale x 8 x i1> @icmp_ugt_vx_swap_nxv8i64(<vscale x 8 x i64> %va, i64 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {
3313; RV32-LABEL: icmp_ugt_vx_swap_nxv8i64:
3314; RV32:       # %bb.0:
3315; RV32-NEXT:    addi sp, sp, -16
3316; RV32-NEXT:    .cfi_def_cfa_offset 16
3317; RV32-NEXT:    sw a0, 8(sp)
3318; RV32-NEXT:    sw a1, 12(sp)
3319; RV32-NEXT:    addi a0, sp, 8
3320; RV32-NEXT:    vsetvli zero, a2, e64, m8, ta, ma
3321; RV32-NEXT:    vlse64.v v24, (a0), zero
3322; RV32-NEXT:    vmsltu.vv v16, v8, v24, v0.t
3323; RV32-NEXT:    vmv1r.v v0, v16
3324; RV32-NEXT:    addi sp, sp, 16
3325; RV32-NEXT:    .cfi_def_cfa_offset 0
3326; RV32-NEXT:    ret
3327;
3328; RV64-LABEL: icmp_ugt_vx_swap_nxv8i64:
3329; RV64:       # %bb.0:
3330; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma
3331; RV64-NEXT:    vmsltu.vx v16, v8, a0, v0.t
3332; RV64-NEXT:    vmv1r.v v0, v16
3333; RV64-NEXT:    ret
3334  %elt.head = insertelement <vscale x 8 x i64> poison, i64 %b, i32 0
3335  %vb = shufflevector <vscale x 8 x i64> %elt.head, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer
3336  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i64(<vscale x 8 x i64> %vb, <vscale x 8 x i64> %va, metadata !"ugt", <vscale x 8 x i1> %m, i32 %evl)
3337  ret <vscale x 8 x i1> %v
3338}
3339
3340define <vscale x 8 x i1> @icmp_ugt_vi_nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {
3341; CHECK-LABEL: icmp_ugt_vi_nxv8i64:
3342; CHECK:       # %bb.0:
3343; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma
3344; CHECK-NEXT:    vmsgtu.vi v16, v8, 4, v0.t
3345; CHECK-NEXT:    vmv1r.v v0, v16
3346; CHECK-NEXT:    ret
3347  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> splat (i64 4), metadata !"ugt", <vscale x 8 x i1> %m, i32 %evl)
3348  ret <vscale x 8 x i1> %v
3349}
3350
3351define <vscale x 8 x i1> @icmp_ugt_vi_swap_nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {
3352; CHECK-LABEL: icmp_ugt_vi_swap_nxv8i64:
3353; CHECK:       # %bb.0:
3354; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma
3355; CHECK-NEXT:    vmsleu.vi v16, v8, 3, v0.t
3356; CHECK-NEXT:    vmv1r.v v0, v16
3357; CHECK-NEXT:    ret
3358  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i64(<vscale x 8 x i64> splat (i64 4), <vscale x 8 x i64> %va, metadata !"ugt", <vscale x 8 x i1> %m, i32 %evl)
3359  ret <vscale x 8 x i1> %v
3360}
3361
3362define <vscale x 8 x i1> @icmp_uge_vv_nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) {
3363; CHECK-LABEL: icmp_uge_vv_nxv8i64:
3364; CHECK:       # %bb.0:
3365; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma
3366; CHECK-NEXT:    vmsleu.vv v24, v16, v8, v0.t
3367; CHECK-NEXT:    vmv1r.v v0, v24
3368; CHECK-NEXT:    ret
3369  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %vb, metadata !"uge", <vscale x 8 x i1> %m, i32 %evl)
3370  ret <vscale x 8 x i1> %v
3371}
3372
3373define <vscale x 8 x i1> @icmp_uge_vx_nxv8i64(<vscale x 8 x i64> %va, i64 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {
3374; RV32-LABEL: icmp_uge_vx_nxv8i64:
3375; RV32:       # %bb.0:
3376; RV32-NEXT:    addi sp, sp, -16
3377; RV32-NEXT:    .cfi_def_cfa_offset 16
3378; RV32-NEXT:    sw a0, 8(sp)
3379; RV32-NEXT:    sw a1, 12(sp)
3380; RV32-NEXT:    addi a0, sp, 8
3381; RV32-NEXT:    vsetvli zero, a2, e64, m8, ta, ma
3382; RV32-NEXT:    vlse64.v v24, (a0), zero
3383; RV32-NEXT:    vmsleu.vv v16, v24, v8, v0.t
3384; RV32-NEXT:    vmv1r.v v0, v16
3385; RV32-NEXT:    addi sp, sp, 16
3386; RV32-NEXT:    .cfi_def_cfa_offset 0
3387; RV32-NEXT:    ret
3388;
3389; RV64-LABEL: icmp_uge_vx_nxv8i64:
3390; RV64:       # %bb.0:
3391; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma
3392; RV64-NEXT:    vmv.v.x v24, a0
3393; RV64-NEXT:    vmsleu.vv v16, v24, v8, v0.t
3394; RV64-NEXT:    vmv1r.v v0, v16
3395; RV64-NEXT:    ret
3396  %elt.head = insertelement <vscale x 8 x i64> poison, i64 %b, i32 0
3397  %vb = shufflevector <vscale x 8 x i64> %elt.head, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer
3398  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %vb, metadata !"uge", <vscale x 8 x i1> %m, i32 %evl)
3399  ret <vscale x 8 x i1> %v
3400}
3401
3402define <vscale x 8 x i1> @icmp_uge_vx_swap_nxv8i64(<vscale x 8 x i64> %va, i64 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {
3403; RV32-LABEL: icmp_uge_vx_swap_nxv8i64:
3404; RV32:       # %bb.0:
3405; RV32-NEXT:    addi sp, sp, -16
3406; RV32-NEXT:    .cfi_def_cfa_offset 16
3407; RV32-NEXT:    sw a0, 8(sp)
3408; RV32-NEXT:    sw a1, 12(sp)
3409; RV32-NEXT:    addi a0, sp, 8
3410; RV32-NEXT:    vsetvli zero, a2, e64, m8, ta, ma
3411; RV32-NEXT:    vlse64.v v24, (a0), zero
3412; RV32-NEXT:    vmsleu.vv v16, v8, v24, v0.t
3413; RV32-NEXT:    vmv1r.v v0, v16
3414; RV32-NEXT:    addi sp, sp, 16
3415; RV32-NEXT:    .cfi_def_cfa_offset 0
3416; RV32-NEXT:    ret
3417;
3418; RV64-LABEL: icmp_uge_vx_swap_nxv8i64:
3419; RV64:       # %bb.0:
3420; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma
3421; RV64-NEXT:    vmsleu.vx v16, v8, a0, v0.t
3422; RV64-NEXT:    vmv1r.v v0, v16
3423; RV64-NEXT:    ret
3424  %elt.head = insertelement <vscale x 8 x i64> poison, i64 %b, i32 0
3425  %vb = shufflevector <vscale x 8 x i64> %elt.head, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer
3426  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i64(<vscale x 8 x i64> %vb, <vscale x 8 x i64> %va, metadata !"uge", <vscale x 8 x i1> %m, i32 %evl)
3427  ret <vscale x 8 x i1> %v
3428}
3429
3430define <vscale x 8 x i1> @icmp_uge_vi_nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {
3431; CHECK-LABEL: icmp_uge_vi_nxv8i64:
3432; CHECK:       # %bb.0:
3433; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma
3434; CHECK-NEXT:    vmsgtu.vi v16, v8, 3, v0.t
3435; CHECK-NEXT:    vmv1r.v v0, v16
3436; CHECK-NEXT:    ret
3437  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> splat (i64 4), metadata !"uge", <vscale x 8 x i1> %m, i32 %evl)
3438  ret <vscale x 8 x i1> %v
3439}
3440
3441define <vscale x 8 x i1> @icmp_uge_vi_swap_nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {
3442; CHECK-LABEL: icmp_uge_vi_swap_nxv8i64:
3443; CHECK:       # %bb.0:
3444; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma
3445; CHECK-NEXT:    vmsleu.vi v16, v8, 4, v0.t
3446; CHECK-NEXT:    vmv1r.v v0, v16
3447; CHECK-NEXT:    ret
3448  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i64(<vscale x 8 x i64> splat (i64 4), <vscale x 8 x i64> %va, metadata !"uge", <vscale x 8 x i1> %m, i32 %evl)
3449  ret <vscale x 8 x i1> %v
3450}
3451
3452define <vscale x 8 x i1> @icmp_ult_vv_nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) {
3453; CHECK-LABEL: icmp_ult_vv_nxv8i64:
3454; CHECK:       # %bb.0:
3455; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma
3456; CHECK-NEXT:    vmsltu.vv v24, v8, v16, v0.t
3457; CHECK-NEXT:    vmv1r.v v0, v24
3458; CHECK-NEXT:    ret
3459  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %vb, metadata !"ult", <vscale x 8 x i1> %m, i32 %evl)
3460  ret <vscale x 8 x i1> %v
3461}
3462
3463define <vscale x 8 x i1> @icmp_ult_vx_nxv8i64(<vscale x 8 x i64> %va, i64 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {
3464; RV32-LABEL: icmp_ult_vx_nxv8i64:
3465; RV32:       # %bb.0:
3466; RV32-NEXT:    addi sp, sp, -16
3467; RV32-NEXT:    .cfi_def_cfa_offset 16
3468; RV32-NEXT:    sw a0, 8(sp)
3469; RV32-NEXT:    sw a1, 12(sp)
3470; RV32-NEXT:    addi a0, sp, 8
3471; RV32-NEXT:    vsetvli zero, a2, e64, m8, ta, ma
3472; RV32-NEXT:    vlse64.v v24, (a0), zero
3473; RV32-NEXT:    vmsltu.vv v16, v8, v24, v0.t
3474; RV32-NEXT:    vmv1r.v v0, v16
3475; RV32-NEXT:    addi sp, sp, 16
3476; RV32-NEXT:    .cfi_def_cfa_offset 0
3477; RV32-NEXT:    ret
3478;
3479; RV64-LABEL: icmp_ult_vx_nxv8i64:
3480; RV64:       # %bb.0:
3481; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma
3482; RV64-NEXT:    vmsltu.vx v16, v8, a0, v0.t
3483; RV64-NEXT:    vmv1r.v v0, v16
3484; RV64-NEXT:    ret
3485  %elt.head = insertelement <vscale x 8 x i64> poison, i64 %b, i32 0
3486  %vb = shufflevector <vscale x 8 x i64> %elt.head, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer
3487  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %vb, metadata !"ult", <vscale x 8 x i1> %m, i32 %evl)
3488  ret <vscale x 8 x i1> %v
3489}
3490
3491define <vscale x 8 x i1> @icmp_ult_vx_swap_nxv8i64(<vscale x 8 x i64> %va, i64 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {
3492; RV32-LABEL: icmp_ult_vx_swap_nxv8i64:
3493; RV32:       # %bb.0:
3494; RV32-NEXT:    addi sp, sp, -16
3495; RV32-NEXT:    .cfi_def_cfa_offset 16
3496; RV32-NEXT:    sw a0, 8(sp)
3497; RV32-NEXT:    sw a1, 12(sp)
3498; RV32-NEXT:    addi a0, sp, 8
3499; RV32-NEXT:    vsetvli zero, a2, e64, m8, ta, ma
3500; RV32-NEXT:    vlse64.v v24, (a0), zero
3501; RV32-NEXT:    vmsltu.vv v16, v24, v8, v0.t
3502; RV32-NEXT:    vmv1r.v v0, v16
3503; RV32-NEXT:    addi sp, sp, 16
3504; RV32-NEXT:    .cfi_def_cfa_offset 0
3505; RV32-NEXT:    ret
3506;
3507; RV64-LABEL: icmp_ult_vx_swap_nxv8i64:
3508; RV64:       # %bb.0:
3509; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma
3510; RV64-NEXT:    vmsgtu.vx v16, v8, a0, v0.t
3511; RV64-NEXT:    vmv1r.v v0, v16
3512; RV64-NEXT:    ret
3513  %elt.head = insertelement <vscale x 8 x i64> poison, i64 %b, i32 0
3514  %vb = shufflevector <vscale x 8 x i64> %elt.head, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer
3515  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i64(<vscale x 8 x i64> %vb, <vscale x 8 x i64> %va, metadata !"ult", <vscale x 8 x i1> %m, i32 %evl)
3516  ret <vscale x 8 x i1> %v
3517}
3518
3519define <vscale x 8 x i1> @icmp_ult_vi_nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {
3520; CHECK-LABEL: icmp_ult_vi_nxv8i64:
3521; CHECK:       # %bb.0:
3522; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma
3523; CHECK-NEXT:    vmsleu.vi v16, v8, 3, v0.t
3524; CHECK-NEXT:    vmv1r.v v0, v16
3525; CHECK-NEXT:    ret
3526  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> splat (i64 4), metadata !"ult", <vscale x 8 x i1> %m, i32 %evl)
3527  ret <vscale x 8 x i1> %v
3528}
3529
3530define <vscale x 8 x i1> @icmp_ult_vi_swap_nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {
3531; CHECK-LABEL: icmp_ult_vi_swap_nxv8i64:
3532; CHECK:       # %bb.0:
3533; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma
3534; CHECK-NEXT:    vmsgtu.vi v16, v8, 4, v0.t
3535; CHECK-NEXT:    vmv1r.v v0, v16
3536; CHECK-NEXT:    ret
3537  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i64(<vscale x 8 x i64> splat (i64 4), <vscale x 8 x i64> %va, metadata !"ult", <vscale x 8 x i1> %m, i32 %evl)
3538  ret <vscale x 8 x i1> %v
3539}
3540
3541define <vscale x 8 x i1> @icmp_sgt_vv_nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) {
3542; CHECK-LABEL: icmp_sgt_vv_nxv8i64:
3543; CHECK:       # %bb.0:
3544; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma
3545; CHECK-NEXT:    vmslt.vv v24, v16, v8, v0.t
3546; CHECK-NEXT:    vmv1r.v v0, v24
3547; CHECK-NEXT:    ret
3548  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %vb, metadata !"sgt", <vscale x 8 x i1> %m, i32 %evl)
3549  ret <vscale x 8 x i1> %v
3550}
3551
3552define <vscale x 8 x i1> @icmp_sgt_vx_nxv8i64(<vscale x 8 x i64> %va, i64 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {
3553; RV32-LABEL: icmp_sgt_vx_nxv8i64:
3554; RV32:       # %bb.0:
3555; RV32-NEXT:    addi sp, sp, -16
3556; RV32-NEXT:    .cfi_def_cfa_offset 16
3557; RV32-NEXT:    sw a0, 8(sp)
3558; RV32-NEXT:    sw a1, 12(sp)
3559; RV32-NEXT:    addi a0, sp, 8
3560; RV32-NEXT:    vsetvli zero, a2, e64, m8, ta, ma
3561; RV32-NEXT:    vlse64.v v24, (a0), zero
3562; RV32-NEXT:    vmslt.vv v16, v24, v8, v0.t
3563; RV32-NEXT:    vmv1r.v v0, v16
3564; RV32-NEXT:    addi sp, sp, 16
3565; RV32-NEXT:    .cfi_def_cfa_offset 0
3566; RV32-NEXT:    ret
3567;
3568; RV64-LABEL: icmp_sgt_vx_nxv8i64:
3569; RV64:       # %bb.0:
3570; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma
3571; RV64-NEXT:    vmsgt.vx v16, v8, a0, v0.t
3572; RV64-NEXT:    vmv1r.v v0, v16
3573; RV64-NEXT:    ret
3574  %elt.head = insertelement <vscale x 8 x i64> poison, i64 %b, i32 0
3575  %vb = shufflevector <vscale x 8 x i64> %elt.head, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer
3576  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %vb, metadata !"sgt", <vscale x 8 x i1> %m, i32 %evl)
3577  ret <vscale x 8 x i1> %v
3578}
3579
3580define <vscale x 8 x i1> @icmp_sgt_vx_swap_nxv8i64(<vscale x 8 x i64> %va, i64 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {
3581; RV32-LABEL: icmp_sgt_vx_swap_nxv8i64:
3582; RV32:       # %bb.0:
3583; RV32-NEXT:    addi sp, sp, -16
3584; RV32-NEXT:    .cfi_def_cfa_offset 16
3585; RV32-NEXT:    sw a0, 8(sp)
3586; RV32-NEXT:    sw a1, 12(sp)
3587; RV32-NEXT:    addi a0, sp, 8
3588; RV32-NEXT:    vsetvli zero, a2, e64, m8, ta, ma
3589; RV32-NEXT:    vlse64.v v24, (a0), zero
3590; RV32-NEXT:    vmslt.vv v16, v8, v24, v0.t
3591; RV32-NEXT:    vmv1r.v v0, v16
3592; RV32-NEXT:    addi sp, sp, 16
3593; RV32-NEXT:    .cfi_def_cfa_offset 0
3594; RV32-NEXT:    ret
3595;
3596; RV64-LABEL: icmp_sgt_vx_swap_nxv8i64:
3597; RV64:       # %bb.0:
3598; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma
3599; RV64-NEXT:    vmslt.vx v16, v8, a0, v0.t
3600; RV64-NEXT:    vmv1r.v v0, v16
3601; RV64-NEXT:    ret
3602  %elt.head = insertelement <vscale x 8 x i64> poison, i64 %b, i32 0
3603  %vb = shufflevector <vscale x 8 x i64> %elt.head, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer
3604  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i64(<vscale x 8 x i64> %vb, <vscale x 8 x i64> %va, metadata !"sgt", <vscale x 8 x i1> %m, i32 %evl)
3605  ret <vscale x 8 x i1> %v
3606}
3607
3608define <vscale x 8 x i1> @icmp_sgt_vi_nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {
3609; CHECK-LABEL: icmp_sgt_vi_nxv8i64:
3610; CHECK:       # %bb.0:
3611; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma
3612; CHECK-NEXT:    vmsgt.vi v16, v8, 4, v0.t
3613; CHECK-NEXT:    vmv1r.v v0, v16
3614; CHECK-NEXT:    ret
3615  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> splat (i64 4), metadata !"sgt", <vscale x 8 x i1> %m, i32 %evl)
3616  ret <vscale x 8 x i1> %v
3617}
3618
3619define <vscale x 8 x i1> @icmp_sgt_vi_swap_nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {
3620; CHECK-LABEL: icmp_sgt_vi_swap_nxv8i64:
3621; CHECK:       # %bb.0:
3622; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma
3623; CHECK-NEXT:    vmsle.vi v16, v8, 3, v0.t
3624; CHECK-NEXT:    vmv1r.v v0, v16
3625; CHECK-NEXT:    ret
3626  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i64(<vscale x 8 x i64> splat (i64 4), <vscale x 8 x i64> %va, metadata !"sgt", <vscale x 8 x i1> %m, i32 %evl)
3627  ret <vscale x 8 x i1> %v
3628}
3629
3630define <vscale x 8 x i1> @icmp_sge_vv_nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) {
3631; CHECK-LABEL: icmp_sge_vv_nxv8i64:
3632; CHECK:       # %bb.0:
3633; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma
3634; CHECK-NEXT:    vmsle.vv v24, v16, v8, v0.t
3635; CHECK-NEXT:    vmv1r.v v0, v24
3636; CHECK-NEXT:    ret
3637  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %vb, metadata !"sge", <vscale x 8 x i1> %m, i32 %evl)
3638  ret <vscale x 8 x i1> %v
3639}
3640
3641define <vscale x 8 x i1> @icmp_sge_vx_nxv8i64(<vscale x 8 x i64> %va, i64 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {
3642; RV32-LABEL: icmp_sge_vx_nxv8i64:
3643; RV32:       # %bb.0:
3644; RV32-NEXT:    addi sp, sp, -16
3645; RV32-NEXT:    .cfi_def_cfa_offset 16
3646; RV32-NEXT:    sw a0, 8(sp)
3647; RV32-NEXT:    sw a1, 12(sp)
3648; RV32-NEXT:    addi a0, sp, 8
3649; RV32-NEXT:    vsetvli zero, a2, e64, m8, ta, ma
3650; RV32-NEXT:    vlse64.v v24, (a0), zero
3651; RV32-NEXT:    vmsle.vv v16, v24, v8, v0.t
3652; RV32-NEXT:    vmv1r.v v0, v16
3653; RV32-NEXT:    addi sp, sp, 16
3654; RV32-NEXT:    .cfi_def_cfa_offset 0
3655; RV32-NEXT:    ret
3656;
3657; RV64-LABEL: icmp_sge_vx_nxv8i64:
3658; RV64:       # %bb.0:
3659; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma
3660; RV64-NEXT:    vmv.v.x v24, a0
3661; RV64-NEXT:    vmsle.vv v16, v24, v8, v0.t
3662; RV64-NEXT:    vmv1r.v v0, v16
3663; RV64-NEXT:    ret
3664  %elt.head = insertelement <vscale x 8 x i64> poison, i64 %b, i32 0
3665  %vb = shufflevector <vscale x 8 x i64> %elt.head, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer
3666  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %vb, metadata !"sge", <vscale x 8 x i1> %m, i32 %evl)
3667  ret <vscale x 8 x i1> %v
3668}
3669
3670define <vscale x 8 x i1> @icmp_sge_vx_swap_nxv8i64(<vscale x 8 x i64> %va, i64 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {
3671; RV32-LABEL: icmp_sge_vx_swap_nxv8i64:
3672; RV32:       # %bb.0:
3673; RV32-NEXT:    addi sp, sp, -16
3674; RV32-NEXT:    .cfi_def_cfa_offset 16
3675; RV32-NEXT:    sw a0, 8(sp)
3676; RV32-NEXT:    sw a1, 12(sp)
3677; RV32-NEXT:    addi a0, sp, 8
3678; RV32-NEXT:    vsetvli zero, a2, e64, m8, ta, ma
3679; RV32-NEXT:    vlse64.v v24, (a0), zero
3680; RV32-NEXT:    vmsle.vv v16, v8, v24, v0.t
3681; RV32-NEXT:    vmv1r.v v0, v16
3682; RV32-NEXT:    addi sp, sp, 16
3683; RV32-NEXT:    .cfi_def_cfa_offset 0
3684; RV32-NEXT:    ret
3685;
3686; RV64-LABEL: icmp_sge_vx_swap_nxv8i64:
3687; RV64:       # %bb.0:
3688; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma
3689; RV64-NEXT:    vmsle.vx v16, v8, a0, v0.t
3690; RV64-NEXT:    vmv1r.v v0, v16
3691; RV64-NEXT:    ret
3692  %elt.head = insertelement <vscale x 8 x i64> poison, i64 %b, i32 0
3693  %vb = shufflevector <vscale x 8 x i64> %elt.head, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer
3694  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i64(<vscale x 8 x i64> %vb, <vscale x 8 x i64> %va, metadata !"sge", <vscale x 8 x i1> %m, i32 %evl)
3695  ret <vscale x 8 x i1> %v
3696}
3697
3698define <vscale x 8 x i1> @icmp_sge_vi_nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {
3699; CHECK-LABEL: icmp_sge_vi_nxv8i64:
3700; CHECK:       # %bb.0:
3701; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma
3702; CHECK-NEXT:    vmsgt.vi v16, v8, 3, v0.t
3703; CHECK-NEXT:    vmv1r.v v0, v16
3704; CHECK-NEXT:    ret
3705  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> splat (i64 4), metadata !"sge", <vscale x 8 x i1> %m, i32 %evl)
3706  ret <vscale x 8 x i1> %v
3707}
3708
3709define <vscale x 8 x i1> @icmp_sge_vi_swap_nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {
3710; CHECK-LABEL: icmp_sge_vi_swap_nxv8i64:
3711; CHECK:       # %bb.0:
3712; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma
3713; CHECK-NEXT:    vmsle.vi v16, v8, 4, v0.t
3714; CHECK-NEXT:    vmv1r.v v0, v16
3715; CHECK-NEXT:    ret
3716  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i64(<vscale x 8 x i64> splat (i64 4), <vscale x 8 x i64> %va, metadata !"sge", <vscale x 8 x i1> %m, i32 %evl)
3717  ret <vscale x 8 x i1> %v
3718}
3719
3720define <vscale x 8 x i1> @icmp_slt_vv_nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) {
3721; CHECK-LABEL: icmp_slt_vv_nxv8i64:
3722; CHECK:       # %bb.0:
3723; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma
3724; CHECK-NEXT:    vmslt.vv v24, v8, v16, v0.t
3725; CHECK-NEXT:    vmv1r.v v0, v24
3726; CHECK-NEXT:    ret
3727  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %vb, metadata !"slt", <vscale x 8 x i1> %m, i32 %evl)
3728  ret <vscale x 8 x i1> %v
3729}
3730
3731define <vscale x 8 x i1> @icmp_slt_vx_nxv8i64(<vscale x 8 x i64> %va, i64 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {
3732; RV32-LABEL: icmp_slt_vx_nxv8i64:
3733; RV32:       # %bb.0:
3734; RV32-NEXT:    addi sp, sp, -16
3735; RV32-NEXT:    .cfi_def_cfa_offset 16
3736; RV32-NEXT:    sw a0, 8(sp)
3737; RV32-NEXT:    sw a1, 12(sp)
3738; RV32-NEXT:    addi a0, sp, 8
3739; RV32-NEXT:    vsetvli zero, a2, e64, m8, ta, ma
3740; RV32-NEXT:    vlse64.v v24, (a0), zero
3741; RV32-NEXT:    vmslt.vv v16, v8, v24, v0.t
3742; RV32-NEXT:    vmv1r.v v0, v16
3743; RV32-NEXT:    addi sp, sp, 16
3744; RV32-NEXT:    .cfi_def_cfa_offset 0
3745; RV32-NEXT:    ret
3746;
3747; RV64-LABEL: icmp_slt_vx_nxv8i64:
3748; RV64:       # %bb.0:
3749; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma
3750; RV64-NEXT:    vmslt.vx v16, v8, a0, v0.t
3751; RV64-NEXT:    vmv1r.v v0, v16
3752; RV64-NEXT:    ret
3753  %elt.head = insertelement <vscale x 8 x i64> poison, i64 %b, i32 0
3754  %vb = shufflevector <vscale x 8 x i64> %elt.head, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer
3755  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %vb, metadata !"slt", <vscale x 8 x i1> %m, i32 %evl)
3756  ret <vscale x 8 x i1> %v
3757}
3758
3759define <vscale x 8 x i1> @icmp_slt_vx_swap_nxv8i64(<vscale x 8 x i64> %va, i64 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {
3760; RV32-LABEL: icmp_slt_vx_swap_nxv8i64:
3761; RV32:       # %bb.0:
3762; RV32-NEXT:    addi sp, sp, -16
3763; RV32-NEXT:    .cfi_def_cfa_offset 16
3764; RV32-NEXT:    sw a0, 8(sp)
3765; RV32-NEXT:    sw a1, 12(sp)
3766; RV32-NEXT:    addi a0, sp, 8
3767; RV32-NEXT:    vsetvli zero, a2, e64, m8, ta, ma
3768; RV32-NEXT:    vlse64.v v24, (a0), zero
3769; RV32-NEXT:    vmslt.vv v16, v24, v8, v0.t
3770; RV32-NEXT:    vmv1r.v v0, v16
3771; RV32-NEXT:    addi sp, sp, 16
3772; RV32-NEXT:    .cfi_def_cfa_offset 0
3773; RV32-NEXT:    ret
3774;
3775; RV64-LABEL: icmp_slt_vx_swap_nxv8i64:
3776; RV64:       # %bb.0:
3777; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma
3778; RV64-NEXT:    vmsgt.vx v16, v8, a0, v0.t
3779; RV64-NEXT:    vmv1r.v v0, v16
3780; RV64-NEXT:    ret
3781  %elt.head = insertelement <vscale x 8 x i64> poison, i64 %b, i32 0
3782  %vb = shufflevector <vscale x 8 x i64> %elt.head, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer
3783  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i64(<vscale x 8 x i64> %vb, <vscale x 8 x i64> %va, metadata !"slt", <vscale x 8 x i1> %m, i32 %evl)
3784  ret <vscale x 8 x i1> %v
3785}
3786
3787define <vscale x 8 x i1> @icmp_slt_vi_nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {
3788; CHECK-LABEL: icmp_slt_vi_nxv8i64:
3789; CHECK:       # %bb.0:
3790; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma
3791; CHECK-NEXT:    vmsle.vi v16, v8, 3, v0.t
3792; CHECK-NEXT:    vmv1r.v v0, v16
3793; CHECK-NEXT:    ret
3794  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> splat (i64 4), metadata !"slt", <vscale x 8 x i1> %m, i32 %evl)
3795  ret <vscale x 8 x i1> %v
3796}
3797
3798define <vscale x 8 x i1> @icmp_slt_vi_swap_nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {
3799; CHECK-LABEL: icmp_slt_vi_swap_nxv8i64:
3800; CHECK:       # %bb.0:
3801; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma
3802; CHECK-NEXT:    vmsgt.vi v16, v8, 4, v0.t
3803; CHECK-NEXT:    vmv1r.v v0, v16
3804; CHECK-NEXT:    ret
3805  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i64(<vscale x 8 x i64> splat (i64 4), <vscale x 8 x i64> %va, metadata !"slt", <vscale x 8 x i1> %m, i32 %evl)
3806  ret <vscale x 8 x i1> %v
3807}
3808
3809define <vscale x 8 x i1> @icmp_sle_vv_nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) {
3810; CHECK-LABEL: icmp_sle_vv_nxv8i64:
3811; CHECK:       # %bb.0:
3812; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma
3813; CHECK-NEXT:    vmsle.vv v24, v8, v16, v0.t
3814; CHECK-NEXT:    vmv1r.v v0, v24
3815; CHECK-NEXT:    ret
3816  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %vb, metadata !"sle", <vscale x 8 x i1> %m, i32 %evl)
3817  ret <vscale x 8 x i1> %v
3818}
3819
3820define <vscale x 8 x i1> @icmp_sle_vx_nxv8i64(<vscale x 8 x i64> %va, i64 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {
3821; RV32-LABEL: icmp_sle_vx_nxv8i64:
3822; RV32:       # %bb.0:
3823; RV32-NEXT:    addi sp, sp, -16
3824; RV32-NEXT:    .cfi_def_cfa_offset 16
3825; RV32-NEXT:    sw a0, 8(sp)
3826; RV32-NEXT:    sw a1, 12(sp)
3827; RV32-NEXT:    addi a0, sp, 8
3828; RV32-NEXT:    vsetvli zero, a2, e64, m8, ta, ma
3829; RV32-NEXT:    vlse64.v v24, (a0), zero
3830; RV32-NEXT:    vmsle.vv v16, v8, v24, v0.t
3831; RV32-NEXT:    vmv1r.v v0, v16
3832; RV32-NEXT:    addi sp, sp, 16
3833; RV32-NEXT:    .cfi_def_cfa_offset 0
3834; RV32-NEXT:    ret
3835;
3836; RV64-LABEL: icmp_sle_vx_nxv8i64:
3837; RV64:       # %bb.0:
3838; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma
3839; RV64-NEXT:    vmsle.vx v16, v8, a0, v0.t
3840; RV64-NEXT:    vmv1r.v v0, v16
3841; RV64-NEXT:    ret
3842  %elt.head = insertelement <vscale x 8 x i64> poison, i64 %b, i32 0
3843  %vb = shufflevector <vscale x 8 x i64> %elt.head, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer
3844  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %vb, metadata !"sle", <vscale x 8 x i1> %m, i32 %evl)
3845  ret <vscale x 8 x i1> %v
3846}
3847
3848define <vscale x 8 x i1> @icmp_sle_vx_swap_nxv8i64(<vscale x 8 x i64> %va, i64 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {
3849; RV32-LABEL: icmp_sle_vx_swap_nxv8i64:
3850; RV32:       # %bb.0:
3851; RV32-NEXT:    addi sp, sp, -16
3852; RV32-NEXT:    .cfi_def_cfa_offset 16
3853; RV32-NEXT:    sw a0, 8(sp)
3854; RV32-NEXT:    sw a1, 12(sp)
3855; RV32-NEXT:    addi a0, sp, 8
3856; RV32-NEXT:    vsetvli zero, a2, e64, m8, ta, ma
3857; RV32-NEXT:    vlse64.v v24, (a0), zero
3858; RV32-NEXT:    vmsle.vv v16, v24, v8, v0.t
3859; RV32-NEXT:    vmv1r.v v0, v16
3860; RV32-NEXT:    addi sp, sp, 16
3861; RV32-NEXT:    .cfi_def_cfa_offset 0
3862; RV32-NEXT:    ret
3863;
3864; RV64-LABEL: icmp_sle_vx_swap_nxv8i64:
3865; RV64:       # %bb.0:
3866; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma
3867; RV64-NEXT:    vmv.v.x v24, a0
3868; RV64-NEXT:    vmsle.vv v16, v24, v8, v0.t
3869; RV64-NEXT:    vmv1r.v v0, v16
3870; RV64-NEXT:    ret
3871  %elt.head = insertelement <vscale x 8 x i64> poison, i64 %b, i32 0
3872  %vb = shufflevector <vscale x 8 x i64> %elt.head, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer
3873  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i64(<vscale x 8 x i64> %vb, <vscale x 8 x i64> %va, metadata !"sle", <vscale x 8 x i1> %m, i32 %evl)
3874  ret <vscale x 8 x i1> %v
3875}
3876
3877define <vscale x 8 x i1> @icmp_sle_vi_nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {
3878; CHECK-LABEL: icmp_sle_vi_nxv8i64:
3879; CHECK:       # %bb.0:
3880; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma
3881; CHECK-NEXT:    vmsle.vi v16, v8, 4, v0.t
3882; CHECK-NEXT:    vmv1r.v v0, v16
3883; CHECK-NEXT:    ret
3884  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> splat (i64 4), metadata !"sle", <vscale x 8 x i1> %m, i32 %evl)
3885  ret <vscale x 8 x i1> %v
3886}
3887
3888define <vscale x 8 x i1> @icmp_sle_vi_swap_nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {
3889; CHECK-LABEL: icmp_sle_vi_swap_nxv8i64:
3890; CHECK:       # %bb.0:
3891; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma
3892; CHECK-NEXT:    vmsgt.vi v16, v8, 3, v0.t
3893; CHECK-NEXT:    vmv1r.v v0, v16
3894; CHECK-NEXT:    ret
3895  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i64(<vscale x 8 x i64> splat (i64 4), <vscale x 8 x i64> %va, metadata !"sle", <vscale x 8 x i1> %m, i32 %evl)
3896  ret <vscale x 8 x i1> %v
3897}
3898