1# NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2# RUN: llc -mtriple riscv32 -mattr=+zve64x -start-before=prologepilog -o - \ 3# RUN: -verify-machineinstrs %s | FileCheck %s --check-prefix=RV32 4# RUN: llc -mtriple riscv32 -mattr=+v -start-before=prologepilog -o - \ 5# RUN: -verify-machineinstrs %s | FileCheck %s --check-prefix=RV32 6# RUN: llc -mtriple riscv64 -mattr=+zve64x -start-before=prologepilog -o - \ 7# RUN: -verify-machineinstrs %s | FileCheck %s --check-prefix=RV64 8# RUN: llc -mtriple riscv64 -mattr=+v -start-before=prologepilog -o - \ 9# RUN: -verify-machineinstrs %s | FileCheck %s --check-prefix=RV64 10--- | 11 target datalayout = "e-m:e-p:64:64-i64:64-i128:128-n64-S128" 12 target triple = "riscv64" 13 14 declare void @extern(ptr) 15 16 define void @rvv_stack_align8() #0 { 17 ; RV32-LABEL: rvv_stack_align8: 18 ; RV32: # %bb.0: 19 ; RV32-NEXT: addi sp, sp, -48 20 ; RV32-NEXT: sw ra, 44(sp) # 4-byte Folded Spill 21 ; RV32-NEXT: csrr a0, vlenb 22 ; RV32-NEXT: slli a0, a0, 1 23 ; RV32-NEXT: sub sp, sp, a0 24 ; RV32-NEXT: addi a0, sp, 32 25 ; RV32-NEXT: addi a1, sp, 16 26 ; RV32-NEXT: addi a2, sp, 8 27 ; RV32-NEXT: call extern 28 ; RV32-NEXT: csrr a0, vlenb 29 ; RV32-NEXT: slli a0, a0, 1 30 ; RV32-NEXT: add sp, sp, a0 31 ; RV32-NEXT: lw ra, 44(sp) # 4-byte Folded Reload 32 ; RV32-NEXT: addi sp, sp, 48 33 ; RV32-NEXT: ret 34 ; 35 ; RV64-LABEL: rvv_stack_align8: 36 ; RV64: # %bb.0: 37 ; RV64-NEXT: addi sp, sp, -48 38 ; RV64-NEXT: sd ra, 40(sp) # 8-byte Folded Spill 39 ; RV64-NEXT: csrr a0, vlenb 40 ; RV64-NEXT: slli a0, a0, 1 41 ; RV64-NEXT: sub sp, sp, a0 42 ; RV64-NEXT: addi a0, sp, 32 43 ; RV64-NEXT: addi a1, sp, 16 44 ; RV64-NEXT: addi a2, sp, 8 45 ; RV64-NEXT: call extern 46 ; RV64-NEXT: csrr a0, vlenb 47 ; RV64-NEXT: slli a0, a0, 1 48 ; RV64-NEXT: add sp, sp, a0 49 ; RV64-NEXT: ld ra, 40(sp) # 8-byte Folded Reload 50 ; RV64-NEXT: addi sp, sp, 48 51 ; RV64-NEXT: ret 52 %a = alloca <vscale x 4 x i32>, align 8 53 %b = alloca i64 54 %c = alloca i64 55 call void @extern(ptr %a) 56 ret void 57 } 58 59 define void @rvv_stack_align16() #0 { 60 ; RV32-LABEL: rvv_stack_align16: 61 ; RV32: # %bb.0: 62 ; RV32-NEXT: addi sp, sp, -48 63 ; RV32-NEXT: sw ra, 44(sp) # 4-byte Folded Spill 64 ; RV32-NEXT: csrr a0, vlenb 65 ; RV32-NEXT: slli a0, a0, 1 66 ; RV32-NEXT: sub sp, sp, a0 67 ; RV32-NEXT: addi a0, sp, 32 68 ; RV32-NEXT: addi a1, sp, 16 69 ; RV32-NEXT: addi a2, sp, 8 70 ; RV32-NEXT: call extern 71 ; RV32-NEXT: csrr a0, vlenb 72 ; RV32-NEXT: slli a0, a0, 1 73 ; RV32-NEXT: add sp, sp, a0 74 ; RV32-NEXT: lw ra, 44(sp) # 4-byte Folded Reload 75 ; RV32-NEXT: addi sp, sp, 48 76 ; RV32-NEXT: ret 77 ; 78 ; RV64-LABEL: rvv_stack_align16: 79 ; RV64: # %bb.0: 80 ; RV64-NEXT: addi sp, sp, -48 81 ; RV64-NEXT: sd ra, 40(sp) # 8-byte Folded Spill 82 ; RV64-NEXT: csrr a0, vlenb 83 ; RV64-NEXT: slli a0, a0, 1 84 ; RV64-NEXT: sub sp, sp, a0 85 ; RV64-NEXT: addi a0, sp, 32 86 ; RV64-NEXT: addi a1, sp, 16 87 ; RV64-NEXT: addi a2, sp, 8 88 ; RV64-NEXT: call extern 89 ; RV64-NEXT: csrr a0, vlenb 90 ; RV64-NEXT: slli a0, a0, 1 91 ; RV64-NEXT: add sp, sp, a0 92 ; RV64-NEXT: ld ra, 40(sp) # 8-byte Folded Reload 93 ; RV64-NEXT: addi sp, sp, 48 94 ; RV64-NEXT: ret 95 %a = alloca <vscale x 4 x i32>, align 16 96 %b = alloca i64 97 %c = alloca i64 98 call void @extern(ptr %a) 99 ret void 100 } 101 102 define void @rvv_stack_align32() #0 { 103 ; RV32-LABEL: rvv_stack_align32: 104 ; RV32: # %bb.0: 105 ; RV32-NEXT: addi sp, sp, -48 106 ; RV32-NEXT: sw ra, 44(sp) # 4-byte Folded Spill 107 ; RV32-NEXT: sw s0, 40(sp) # 4-byte Folded Spill 108 ; RV32-NEXT: addi s0, sp, 48 109 ; RV32-NEXT: csrr a0, vlenb 110 ; RV32-NEXT: slli a0, a0, 2 111 ; RV32-NEXT: sub sp, sp, a0 112 ; RV32-NEXT: andi sp, sp, -32 113 ; RV32-NEXT: addi a0, sp, 32 114 ; RV32-NEXT: addi a1, sp, 16 115 ; RV32-NEXT: addi a2, sp, 8 116 ; RV32-NEXT: call extern 117 ; RV32-NEXT: addi sp, s0, -48 118 ; RV32-NEXT: lw ra, 44(sp) # 4-byte Folded Reload 119 ; RV32-NEXT: lw s0, 40(sp) # 4-byte Folded Reload 120 ; RV32-NEXT: addi sp, sp, 48 121 ; RV32-NEXT: ret 122 ; 123 ; RV64-LABEL: rvv_stack_align32: 124 ; RV64: # %bb.0: 125 ; RV64-NEXT: addi sp, sp, -80 126 ; RV64-NEXT: sd ra, 72(sp) # 8-byte Folded Spill 127 ; RV64-NEXT: sd s0, 64(sp) # 8-byte Folded Spill 128 ; RV64-NEXT: addi s0, sp, 80 129 ; RV64-NEXT: csrr a0, vlenb 130 ; RV64-NEXT: slli a0, a0, 2 131 ; RV64-NEXT: sub sp, sp, a0 132 ; RV64-NEXT: andi sp, sp, -32 133 ; RV64-NEXT: addi a0, sp, 64 134 ; RV64-NEXT: addi a1, sp, 40 135 ; RV64-NEXT: addi a2, sp, 32 136 ; RV64-NEXT: call extern 137 ; RV64-NEXT: addi sp, s0, -80 138 ; RV64-NEXT: ld ra, 72(sp) # 8-byte Folded Reload 139 ; RV64-NEXT: ld s0, 64(sp) # 8-byte Folded Reload 140 ; RV64-NEXT: addi sp, sp, 80 141 ; RV64-NEXT: ret 142 %a = alloca <vscale x 4 x i32>, align 32 143 %b = alloca i64 144 %c = alloca i64 145 call void @extern(ptr %a) 146 ret void 147 } 148 149 attributes #0 = { nounwind nofree nosync } 150... 151--- 152name: rvv_stack_align8 153alignment: 4 154frameInfo: 155 isFrameAddressTaken: false 156 isReturnAddressTaken: false 157 hasStackMap: false 158 hasPatchPoint: false 159 stackSize: 0 160 offsetAdjustment: 0 161 maxAlignment: 8 162 adjustsStack: true 163 hasCalls: true 164 stackProtector: '' 165 maxCallFrameSize: 4294967295 166 cvBytesOfCalleeSavedRegisters: 0 167 hasOpaqueSPAdjustment: false 168 hasVAStart: false 169 hasMustTailInVarArgFunc: false 170 hasTailCall: false 171 localFrameSize: 0 172 savePoint: '' 173 restorePoint: '' 174fixedStack: [] 175stack: 176 - { id: 0, name: a, type: default, offset: 0, size: 16, alignment: 8, 177 stack-id: scalable-vector, callee-saved-register: '', callee-saved-restored: true, 178 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 179 - { id: 1, name: b, type: default, offset: 0, size: 8, alignment: 8, 180 stack-id: default, callee-saved-register: '', callee-saved-restored: true, 181 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 182 - { id: 2, name: c, type: default, offset: 0, size: 8, alignment: 8, 183 stack-id: default, callee-saved-register: '', callee-saved-restored: true, 184 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 185body: | 186 bb.0 (%ir-block.0): 187 ADJCALLSTACKDOWN 0, 0, implicit-def dead $x2, implicit $x2 188 $x10 = ADDI %stack.0.a, 0 189 $x11 = ADDI %stack.1.b, 0 190 $x12 = ADDI %stack.2.c, 0 191 PseudoCALL target-flags(riscv-call) @extern, csr_ilp32d_lp64d, implicit-def dead $x1, implicit killed $x10, implicit-def $x2 192 ADJCALLSTACKUP 0, 0, implicit-def dead $x2, implicit $x2 193 PseudoRET 194 195... 196--- 197name: rvv_stack_align16 198alignment: 4 199frameInfo: 200 isFrameAddressTaken: false 201 isReturnAddressTaken: false 202 hasStackMap: false 203 hasPatchPoint: false 204 stackSize: 0 205 offsetAdjustment: 0 206 maxAlignment: 16 207 adjustsStack: true 208 hasCalls: true 209 stackProtector: '' 210 maxCallFrameSize: 4294967295 211 cvBytesOfCalleeSavedRegisters: 0 212 hasOpaqueSPAdjustment: false 213 hasVAStart: false 214 hasMustTailInVarArgFunc: false 215 hasTailCall: false 216 localFrameSize: 0 217 savePoint: '' 218 restorePoint: '' 219fixedStack: [] 220stack: 221 - { id: 0, name: a, type: default, offset: 0, size: 16, alignment: 16, 222 stack-id: scalable-vector, callee-saved-register: '', callee-saved-restored: true, 223 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 224 - { id: 1, name: b, type: default, offset: 0, size: 8, alignment: 8, 225 stack-id: default, callee-saved-register: '', callee-saved-restored: true, 226 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 227 - { id: 2, name: c, type: default, offset: 0, size: 8, alignment: 8, 228 stack-id: default, callee-saved-register: '', callee-saved-restored: true, 229 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 230body: | 231 bb.0 (%ir-block.0): 232 ADJCALLSTACKDOWN 0, 0, implicit-def dead $x2, implicit $x2 233 $x10 = ADDI %stack.0.a, 0 234 $x11 = ADDI %stack.1.b, 0 235 $x12 = ADDI %stack.2.c, 0 236 PseudoCALL target-flags(riscv-call) @extern, csr_ilp32d_lp64d, implicit-def dead $x1, implicit killed $x10, implicit-def $x2 237 ADJCALLSTACKUP 0, 0, implicit-def dead $x2, implicit $x2 238 PseudoRET 239 240... 241--- 242name: rvv_stack_align32 243alignment: 4 244frameInfo: 245 isFrameAddressTaken: false 246 isReturnAddressTaken: false 247 hasStackMap: false 248 hasPatchPoint: false 249 stackSize: 0 250 offsetAdjustment: 0 251 maxAlignment: 32 252 adjustsStack: true 253 hasCalls: true 254 stackProtector: '' 255 maxCallFrameSize: 4294967295 256 cvBytesOfCalleeSavedRegisters: 0 257 hasOpaqueSPAdjustment: false 258 hasVAStart: false 259 hasMustTailInVarArgFunc: false 260 hasTailCall: false 261 localFrameSize: 0 262 savePoint: '' 263 restorePoint: '' 264fixedStack: [] 265stack: 266 - { id: 0, name: a, type: default, offset: 0, size: 16, alignment: 32, 267 stack-id: scalable-vector, callee-saved-register: '', callee-saved-restored: true, 268 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 269 - { id: 1, name: b, type: default, offset: 0, size: 8, alignment: 8, 270 stack-id: default, callee-saved-register: '', callee-saved-restored: true, 271 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 272 - { id: 2, name: c, type: default, offset: 0, size: 8, alignment: 8, 273 stack-id: default, callee-saved-register: '', callee-saved-restored: true, 274 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 275body: | 276 bb.0 (%ir-block.0): 277 ADJCALLSTACKDOWN 0, 0, implicit-def dead $x2, implicit $x2 278 $x10 = ADDI %stack.0.a, 0 279 $x11 = ADDI %stack.1.b, 0 280 $x12 = ADDI %stack.2.c, 0 281 PseudoCALL target-flags(riscv-call) @extern, csr_ilp32d_lp64d, implicit-def dead $x1, implicit killed $x10, implicit-def $x2 282 ADJCALLSTACKUP 0, 0, implicit-def dead $x2, implicit $x2 283 PseudoRET 284 285... 286