xref: /llvm-project/llvm/test/CodeGen/RISCV/rvv/rv32-spill-vector.ll (revision ab393cee9dffdb225b94badcb9c21f80b156b74b) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=riscv32 -mattr=+v -O0 < %s \
3; RUN:    | FileCheck --check-prefix=SPILL-O0 %s
4; RUN: llc -mtriple=riscv32 -mattr=+v -O2 < %s \
5; RUN:    | FileCheck --check-prefix=SPILL-O2 %s
6
7define <vscale x 1 x i32> @spill_lmul_mf2(<vscale x 1 x i32> %va) nounwind {
8; SPILL-O0-LABEL: spill_lmul_mf2:
9; SPILL-O0:       # %bb.0: # %entry
10; SPILL-O0-NEXT:    addi sp, sp, -16
11; SPILL-O0-NEXT:    csrr a0, vlenb
12; SPILL-O0-NEXT:    sub sp, sp, a0
13; SPILL-O0-NEXT:    addi a0, sp, 16
14; SPILL-O0-NEXT:    vs1r.v v8, (a0) # Unknown-size Folded Spill
15; SPILL-O0-NEXT:    #APP
16; SPILL-O0-NEXT:    #NO_APP
17; SPILL-O0-NEXT:    addi a0, sp, 16
18; SPILL-O0-NEXT:    vl1r.v v8, (a0) # Unknown-size Folded Reload
19; SPILL-O0-NEXT:    csrr a0, vlenb
20; SPILL-O0-NEXT:    add sp, sp, a0
21; SPILL-O0-NEXT:    addi sp, sp, 16
22; SPILL-O0-NEXT:    ret
23;
24; SPILL-O2-LABEL: spill_lmul_mf2:
25; SPILL-O2:       # %bb.0: # %entry
26; SPILL-O2-NEXT:    addi sp, sp, -16
27; SPILL-O2-NEXT:    csrr a0, vlenb
28; SPILL-O2-NEXT:    sub sp, sp, a0
29; SPILL-O2-NEXT:    addi a0, sp, 16
30; SPILL-O2-NEXT:    vs1r.v v8, (a0) # Unknown-size Folded Spill
31; SPILL-O2-NEXT:    #APP
32; SPILL-O2-NEXT:    #NO_APP
33; SPILL-O2-NEXT:    vl1r.v v8, (a0) # Unknown-size Folded Reload
34; SPILL-O2-NEXT:    csrr a0, vlenb
35; SPILL-O2-NEXT:    add sp, sp, a0
36; SPILL-O2-NEXT:    addi sp, sp, 16
37; SPILL-O2-NEXT:    ret
38entry:
39  call void asm sideeffect "",
40  "~{v0},~{v1},~{v2},~{v3},~{v4},~{v5},~{v6},~{v7},~{v8},~{v9},~{v10},~{v11},~{v12},~{v13},~{v14},~{v15},~{v16},~{v17},~{v18},~{v19},~{v20},~{v21},~{v22},~{v23},~{v24},~{v25},~{v26},~{v27},~{v28},~{v29},~{v30},~{v31}"()
41
42  ret <vscale x 1 x i32> %va
43}
44
45define <vscale x 2 x i32> @spill_lmul_1(<vscale x 2 x i32> %va) nounwind {
46; SPILL-O0-LABEL: spill_lmul_1:
47; SPILL-O0:       # %bb.0: # %entry
48; SPILL-O0-NEXT:    addi sp, sp, -16
49; SPILL-O0-NEXT:    csrr a0, vlenb
50; SPILL-O0-NEXT:    sub sp, sp, a0
51; SPILL-O0-NEXT:    addi a0, sp, 16
52; SPILL-O0-NEXT:    vs1r.v v8, (a0) # Unknown-size Folded Spill
53; SPILL-O0-NEXT:    #APP
54; SPILL-O0-NEXT:    #NO_APP
55; SPILL-O0-NEXT:    addi a0, sp, 16
56; SPILL-O0-NEXT:    vl1r.v v8, (a0) # Unknown-size Folded Reload
57; SPILL-O0-NEXT:    csrr a0, vlenb
58; SPILL-O0-NEXT:    add sp, sp, a0
59; SPILL-O0-NEXT:    addi sp, sp, 16
60; SPILL-O0-NEXT:    ret
61;
62; SPILL-O2-LABEL: spill_lmul_1:
63; SPILL-O2:       # %bb.0: # %entry
64; SPILL-O2-NEXT:    addi sp, sp, -16
65; SPILL-O2-NEXT:    csrr a0, vlenb
66; SPILL-O2-NEXT:    sub sp, sp, a0
67; SPILL-O2-NEXT:    addi a0, sp, 16
68; SPILL-O2-NEXT:    vs1r.v v8, (a0) # Unknown-size Folded Spill
69; SPILL-O2-NEXT:    #APP
70; SPILL-O2-NEXT:    #NO_APP
71; SPILL-O2-NEXT:    vl1r.v v8, (a0) # Unknown-size Folded Reload
72; SPILL-O2-NEXT:    csrr a0, vlenb
73; SPILL-O2-NEXT:    add sp, sp, a0
74; SPILL-O2-NEXT:    addi sp, sp, 16
75; SPILL-O2-NEXT:    ret
76entry:
77  call void asm sideeffect "",
78  "~{v0},~{v1},~{v2},~{v3},~{v4},~{v5},~{v6},~{v7},~{v8},~{v9},~{v10},~{v11},~{v12},~{v13},~{v14},~{v15},~{v16},~{v17},~{v18},~{v19},~{v20},~{v21},~{v22},~{v23},~{v24},~{v25},~{v26},~{v27},~{v28},~{v29},~{v30},~{v31}"()
79
80  ret <vscale x 2 x i32> %va
81}
82
83define <vscale x 4 x i32> @spill_lmul_2(<vscale x 4 x i32> %va) nounwind {
84; SPILL-O0-LABEL: spill_lmul_2:
85; SPILL-O0:       # %bb.0: # %entry
86; SPILL-O0-NEXT:    addi sp, sp, -16
87; SPILL-O0-NEXT:    csrr a0, vlenb
88; SPILL-O0-NEXT:    slli a0, a0, 1
89; SPILL-O0-NEXT:    sub sp, sp, a0
90; SPILL-O0-NEXT:    addi a0, sp, 16
91; SPILL-O0-NEXT:    vs2r.v v8, (a0) # Unknown-size Folded Spill
92; SPILL-O0-NEXT:    #APP
93; SPILL-O0-NEXT:    #NO_APP
94; SPILL-O0-NEXT:    addi a0, sp, 16
95; SPILL-O0-NEXT:    vl2r.v v8, (a0) # Unknown-size Folded Reload
96; SPILL-O0-NEXT:    csrr a0, vlenb
97; SPILL-O0-NEXT:    slli a0, a0, 1
98; SPILL-O0-NEXT:    add sp, sp, a0
99; SPILL-O0-NEXT:    addi sp, sp, 16
100; SPILL-O0-NEXT:    ret
101;
102; SPILL-O2-LABEL: spill_lmul_2:
103; SPILL-O2:       # %bb.0: # %entry
104; SPILL-O2-NEXT:    addi sp, sp, -16
105; SPILL-O2-NEXT:    csrr a0, vlenb
106; SPILL-O2-NEXT:    slli a0, a0, 1
107; SPILL-O2-NEXT:    sub sp, sp, a0
108; SPILL-O2-NEXT:    addi a0, sp, 16
109; SPILL-O2-NEXT:    vs2r.v v8, (a0) # Unknown-size Folded Spill
110; SPILL-O2-NEXT:    #APP
111; SPILL-O2-NEXT:    #NO_APP
112; SPILL-O2-NEXT:    vl2r.v v8, (a0) # Unknown-size Folded Reload
113; SPILL-O2-NEXT:    csrr a0, vlenb
114; SPILL-O2-NEXT:    slli a0, a0, 1
115; SPILL-O2-NEXT:    add sp, sp, a0
116; SPILL-O2-NEXT:    addi sp, sp, 16
117; SPILL-O2-NEXT:    ret
118entry:
119  call void asm sideeffect "",
120  "~{v0},~{v1},~{v2},~{v3},~{v4},~{v5},~{v6},~{v7},~{v8},~{v9},~{v10},~{v11},~{v12},~{v13},~{v14},~{v15},~{v16},~{v17},~{v18},~{v19},~{v20},~{v21},~{v22},~{v23},~{v24},~{v25},~{v26},~{v27},~{v28},~{v29},~{v30},~{v31}"()
121
122  ret <vscale x 4 x i32> %va
123}
124
125define <vscale x 8 x i32> @spill_lmul_4(<vscale x 8 x i32> %va) nounwind {
126; SPILL-O0-LABEL: spill_lmul_4:
127; SPILL-O0:       # %bb.0: # %entry
128; SPILL-O0-NEXT:    addi sp, sp, -16
129; SPILL-O0-NEXT:    csrr a0, vlenb
130; SPILL-O0-NEXT:    slli a0, a0, 2
131; SPILL-O0-NEXT:    sub sp, sp, a0
132; SPILL-O0-NEXT:    addi a0, sp, 16
133; SPILL-O0-NEXT:    vs4r.v v8, (a0) # Unknown-size Folded Spill
134; SPILL-O0-NEXT:    #APP
135; SPILL-O0-NEXT:    #NO_APP
136; SPILL-O0-NEXT:    addi a0, sp, 16
137; SPILL-O0-NEXT:    vl4r.v v8, (a0) # Unknown-size Folded Reload
138; SPILL-O0-NEXT:    csrr a0, vlenb
139; SPILL-O0-NEXT:    slli a0, a0, 2
140; SPILL-O0-NEXT:    add sp, sp, a0
141; SPILL-O0-NEXT:    addi sp, sp, 16
142; SPILL-O0-NEXT:    ret
143;
144; SPILL-O2-LABEL: spill_lmul_4:
145; SPILL-O2:       # %bb.0: # %entry
146; SPILL-O2-NEXT:    addi sp, sp, -16
147; SPILL-O2-NEXT:    csrr a0, vlenb
148; SPILL-O2-NEXT:    slli a0, a0, 2
149; SPILL-O2-NEXT:    sub sp, sp, a0
150; SPILL-O2-NEXT:    addi a0, sp, 16
151; SPILL-O2-NEXT:    vs4r.v v8, (a0) # Unknown-size Folded Spill
152; SPILL-O2-NEXT:    #APP
153; SPILL-O2-NEXT:    #NO_APP
154; SPILL-O2-NEXT:    vl4r.v v8, (a0) # Unknown-size Folded Reload
155; SPILL-O2-NEXT:    csrr a0, vlenb
156; SPILL-O2-NEXT:    slli a0, a0, 2
157; SPILL-O2-NEXT:    add sp, sp, a0
158; SPILL-O2-NEXT:    addi sp, sp, 16
159; SPILL-O2-NEXT:    ret
160entry:
161  call void asm sideeffect "",
162  "~{v0},~{v1},~{v2},~{v3},~{v4},~{v5},~{v6},~{v7},~{v8},~{v9},~{v10},~{v11},~{v12},~{v13},~{v14},~{v15},~{v16},~{v17},~{v18},~{v19},~{v20},~{v21},~{v22},~{v23},~{v24},~{v25},~{v26},~{v27},~{v28},~{v29},~{v30},~{v31}"()
163
164  ret <vscale x 8 x i32> %va
165}
166
167define <vscale x 16 x i32> @spill_lmul_8(<vscale x 16 x i32> %va) nounwind {
168; SPILL-O0-LABEL: spill_lmul_8:
169; SPILL-O0:       # %bb.0: # %entry
170; SPILL-O0-NEXT:    addi sp, sp, -16
171; SPILL-O0-NEXT:    csrr a0, vlenb
172; SPILL-O0-NEXT:    slli a0, a0, 3
173; SPILL-O0-NEXT:    sub sp, sp, a0
174; SPILL-O0-NEXT:    addi a0, sp, 16
175; SPILL-O0-NEXT:    vs8r.v v8, (a0) # Unknown-size Folded Spill
176; SPILL-O0-NEXT:    #APP
177; SPILL-O0-NEXT:    #NO_APP
178; SPILL-O0-NEXT:    addi a0, sp, 16
179; SPILL-O0-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
180; SPILL-O0-NEXT:    csrr a0, vlenb
181; SPILL-O0-NEXT:    slli a0, a0, 3
182; SPILL-O0-NEXT:    add sp, sp, a0
183; SPILL-O0-NEXT:    addi sp, sp, 16
184; SPILL-O0-NEXT:    ret
185;
186; SPILL-O2-LABEL: spill_lmul_8:
187; SPILL-O2:       # %bb.0: # %entry
188; SPILL-O2-NEXT:    addi sp, sp, -16
189; SPILL-O2-NEXT:    csrr a0, vlenb
190; SPILL-O2-NEXT:    slli a0, a0, 3
191; SPILL-O2-NEXT:    sub sp, sp, a0
192; SPILL-O2-NEXT:    addi a0, sp, 16
193; SPILL-O2-NEXT:    vs8r.v v8, (a0) # Unknown-size Folded Spill
194; SPILL-O2-NEXT:    #APP
195; SPILL-O2-NEXT:    #NO_APP
196; SPILL-O2-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
197; SPILL-O2-NEXT:    csrr a0, vlenb
198; SPILL-O2-NEXT:    slli a0, a0, 3
199; SPILL-O2-NEXT:    add sp, sp, a0
200; SPILL-O2-NEXT:    addi sp, sp, 16
201; SPILL-O2-NEXT:    ret
202entry:
203  call void asm sideeffect "",
204  "~{v0},~{v1},~{v2},~{v3},~{v4},~{v5},~{v6},~{v7},~{v8},~{v9},~{v10},~{v11},~{v12},~{v13},~{v14},~{v15},~{v16},~{v17},~{v18},~{v19},~{v20},~{v21},~{v22},~{v23},~{v24},~{v25},~{v26},~{v27},~{v28},~{v29},~{v30},~{v31}"()
205
206  ret <vscale x 16 x i32> %va
207}
208