xref: /llvm-project/llvm/test/CodeGen/RISCV/rvv/reg-alloc-reserve-bp.ll (revision 97982a8c605fac7c86d02e641a6cd7898b3ca343)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=riscv64 -mattr=+v,+f \
3; RUN:   -verify-machineinstrs < %s | FileCheck %s
4
5define void @foo(ptr nocapture noundef %p1) {
6; CHECK-LABEL: foo:
7; CHECK:       # %bb.0: # %entry
8; CHECK-NEXT:    addi sp, sp, -192
9; CHECK-NEXT:    .cfi_def_cfa_offset 192
10; CHECK-NEXT:    sd ra, 184(sp) # 8-byte Folded Spill
11; CHECK-NEXT:    sd s0, 176(sp) # 8-byte Folded Spill
12; CHECK-NEXT:    sd s1, 168(sp) # 8-byte Folded Spill
13; CHECK-NEXT:    sd s2, 160(sp) # 8-byte Folded Spill
14; CHECK-NEXT:    .cfi_offset ra, -8
15; CHECK-NEXT:    .cfi_offset s0, -16
16; CHECK-NEXT:    .cfi_offset s1, -24
17; CHECK-NEXT:    .cfi_offset s2, -32
18; CHECK-NEXT:    addi s0, sp, 192
19; CHECK-NEXT:    .cfi_def_cfa s0, 0
20; CHECK-NEXT:    csrr a1, vlenb
21; CHECK-NEXT:    slli a1, a1, 1
22; CHECK-NEXT:    sub sp, sp, a1
23; CHECK-NEXT:    andi sp, sp, -64
24; CHECK-NEXT:    mv s1, sp
25; CHECK-NEXT:    mv s2, a0
26; CHECK-NEXT:    vsetivli zero, 8, e32, m2, ta, ma
27; CHECK-NEXT:    vle32.v v8, (a0)
28; CHECK-NEXT:    addi a0, s1, 160
29; CHECK-NEXT:    vs2r.v v8, (a0) # Unknown-size Folded Spill
30; CHECK-NEXT:    addi sp, sp, -16
31; CHECK-NEXT:    addi t0, s1, 64
32; CHECK-NEXT:    li a0, 1
33; CHECK-NEXT:    li a1, 2
34; CHECK-NEXT:    li a2, 3
35; CHECK-NEXT:    li a3, 4
36; CHECK-NEXT:    li a4, 5
37; CHECK-NEXT:    li a5, 6
38; CHECK-NEXT:    li a6, 7
39; CHECK-NEXT:    li a7, 8
40; CHECK-NEXT:    sd t0, 0(sp)
41; CHECK-NEXT:    call bar
42; CHECK-NEXT:    addi sp, sp, 16
43; CHECK-NEXT:    vsetivli zero, 8, e32, m2, ta, ma
44; CHECK-NEXT:    vle32.v v8, (s2)
45; CHECK-NEXT:    addi a0, s1, 160
46; CHECK-NEXT:    vl2r.v v10, (a0) # Unknown-size Folded Reload
47; CHECK-NEXT:    vfadd.vv v8, v10, v8
48; CHECK-NEXT:    vse32.v v8, (s2)
49; CHECK-NEXT:    addi sp, s0, -192
50; CHECK-NEXT:    .cfi_def_cfa sp, 192
51; CHECK-NEXT:    ld ra, 184(sp) # 8-byte Folded Reload
52; CHECK-NEXT:    ld s0, 176(sp) # 8-byte Folded Reload
53; CHECK-NEXT:    ld s1, 168(sp) # 8-byte Folded Reload
54; CHECK-NEXT:    ld s2, 160(sp) # 8-byte Folded Reload
55; CHECK-NEXT:    .cfi_restore ra
56; CHECK-NEXT:    .cfi_restore s0
57; CHECK-NEXT:    .cfi_restore s1
58; CHECK-NEXT:    .cfi_restore s2
59; CHECK-NEXT:    addi sp, sp, 192
60; CHECK-NEXT:    .cfi_def_cfa_offset 0
61; CHECK-NEXT:    ret
62entry:
63  %vla = alloca [10 x i32], align 64
64  call void @llvm.lifetime.start.p0(i64 40, ptr nonnull %vla)
65  %0 = load <8 x float>, ptr %p1, align 32
66  call void @bar(i32 noundef signext 1, i32 noundef signext 2, i32 noundef signext 3, i32 noundef signext 4, i32 noundef signext 5, i32 noundef signext 6, i32 noundef signext 7, i32 noundef signext 8, ptr noundef nonnull %vla)
67  %1 = load <8 x float>, ptr %p1, align 32
68  %add = fadd <8 x float> %0, %1
69  store <8 x float> %add, ptr %p1, align 32
70  call void @llvm.lifetime.end.p0(i64 40, ptr nonnull %vla)
71  ret void
72}
73
74declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
75
76declare void @bar(i32 noundef signext, i32 noundef signext, i32 noundef signext, i32 noundef signext, i32 noundef signext, i32 noundef signext, i32 noundef signext, i32 noundef signext, ptr noundef)
77
78declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
79
80attributes #1 = { argmemonly mustprogress nofree nosync nounwind willreturn }
81