1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4 2; RUN: llc < %s -mtriple=riscv64 -mattr=+v | FileCheck %s 3 4define i8 @or_load_combine(ptr %p) { 5; CHECK-LABEL: or_load_combine: 6; CHECK: # %bb.0: 7; CHECK-NEXT: vsetivli zero, 2, e8, mf8, ta, ma 8; CHECK-NEXT: vle8.v v8, (a0) 9; CHECK-NEXT: vmv.x.s a0, v8 10; CHECK-NEXT: ori a0, a0, 1 11; CHECK-NEXT: ret 12 %load = load <2 x i8>, ptr %p 13 %extract = extractelement <2 x i8> %load, i64 0 14 %or = or i8 %extract, 1 15 ret i8 %or 16} 17