1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=riscv64 -mattr=+v -verify-machineinstrs \ 3; RUN: < %s | FileCheck %s 4 5define signext i32 @foo(i32 signext %aa) #0 { 6; CHECK-LABEL: foo: 7; CHECK: # %bb.0: # %entry 8; CHECK-NEXT: addi sp, sp, -96 9; CHECK-NEXT: .cfi_def_cfa_offset 96 10; CHECK-NEXT: sd ra, 88(sp) # 8-byte Folded Spill 11; CHECK-NEXT: sd s0, 80(sp) # 8-byte Folded Spill 12; CHECK-NEXT: sd s1, 72(sp) # 8-byte Folded Spill 13; CHECK-NEXT: .cfi_offset ra, -8 14; CHECK-NEXT: .cfi_offset s0, -16 15; CHECK-NEXT: .cfi_offset s1, -24 16; CHECK-NEXT: addi s0, sp, 96 17; CHECK-NEXT: .cfi_def_cfa s0, 0 18; CHECK-NEXT: csrr a1, vlenb 19; CHECK-NEXT: sub sp, sp, a1 20; CHECK-NEXT: andi sp, sp, -16 21; CHECK-NEXT: mv s1, sp 22; CHECK-NEXT: lw t0, 44(s1) 23; CHECK-NEXT: lw a2, 40(s1) 24; CHECK-NEXT: lw a3, 36(s1) 25; CHECK-NEXT: lw a4, 32(s1) 26; CHECK-NEXT: lw a5, 28(s1) 27; CHECK-NEXT: lw a6, 24(s1) 28; CHECK-NEXT: lw a7, 20(s1) 29; CHECK-NEXT: lw t1, 16(s1) 30; CHECK-NEXT: lw t2, 12(s1) 31; CHECK-NEXT: lw t3, 8(s1) 32; CHECK-NEXT: sw a0, 52(s1) 33; CHECK-NEXT: sw a0, 48(s1) 34; CHECK-NEXT: addi sp, sp, -32 35; CHECK-NEXT: addi a1, s1, 48 36; CHECK-NEXT: sd t1, 0(sp) 37; CHECK-NEXT: sd t2, 8(sp) 38; CHECK-NEXT: sd t3, 16(sp) 39; CHECK-NEXT: mv a0, t0 40; CHECK-NEXT: call gfunc 41; CHECK-NEXT: addi sp, sp, 32 42; CHECK-NEXT: li a0, 0 43; CHECK-NEXT: addi sp, s0, -96 44; CHECK-NEXT: .cfi_def_cfa sp, 96 45; CHECK-NEXT: ld ra, 88(sp) # 8-byte Folded Reload 46; CHECK-NEXT: ld s0, 80(sp) # 8-byte Folded Reload 47; CHECK-NEXT: ld s1, 72(sp) # 8-byte Folded Reload 48; CHECK-NEXT: .cfi_restore ra 49; CHECK-NEXT: .cfi_restore s0 50; CHECK-NEXT: .cfi_restore s1 51; CHECK-NEXT: addi sp, sp, 96 52; CHECK-NEXT: .cfi_def_cfa_offset 0 53; CHECK-NEXT: ret 54entry: 55 %aa.addr = alloca i32, align 4 56 %local = alloca i32, align 4 57 %a = alloca i32, align 4 58 %b = alloca i32, align 4 59 %c = alloca i32, align 4 60 %d = alloca i32, align 4 61 %e = alloca i32, align 4 62 %f = alloca i32, align 4 63 %g = alloca i32, align 4 64 %h = alloca i32, align 4 65 %i = alloca i32, align 4 66 %j = alloca i32, align 4 67 %local_v = alloca <vscale x 2 x i32>, align 4 68 store i32 %aa, ptr %aa.addr, align 4 69 %0 = load i32, ptr %aa.addr, align 4 70 store i32 %0, ptr %local, align 4 71 %1 = load i32, ptr %a, align 4 72 %2 = load i32, ptr %b, align 4 73 %3 = load i32, ptr %c, align 4 74 %4 = load i32, ptr %d, align 4 75 %5 = load i32, ptr %e, align 4 76 %6 = load i32, ptr %f, align 4 77 %7 = load i32, ptr %g, align 4 78 %8 = load i32, ptr %h, align 4 79 %9 = load i32, ptr %i, align 4 80 %10 = load i32, ptr %j, align 4 81 call void @gfunc(i32 signext %1, ptr %local, i32 signext %2, i32 signext %3, i32 signext %4, i32 signext %5, i32 signext %6, i32 signext %7, i32 %8, i32 %9, i32 %10) 82 ret i32 0 83} 84 85declare void @gfunc(i32 signext, ptr, i32 signext, i32 signext, i32 signext, i32 signext, i32 signext, i32 signext, i32, i32, i32) #1 86 87attributes #0 = { "stackrealign" } 88attributes #1 = { "stackrealign" } 89