xref: /llvm-project/llvm/test/CodeGen/RISCV/rvv/masked-load-fp.ll (revision 1cb599835ccf7ee8b2d1d5a7f3107e19a26fc6f5) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=riscv32 -mattr=+d,+zvfh,+zvfbfmin,+v -target-abi=ilp32d -verify-machineinstrs < %s | FileCheck %s
3; RUN: llc -mtriple=riscv64 -mattr=+d,+zvfh,+zvfbfmin,+v -target-abi=lp64d -verify-machineinstrs < %s | FileCheck %s
4; RUN: llc -mtriple=riscv32 -mattr=+d,+zvfhmin,+zvfbfmin,+v -target-abi=ilp32d -verify-machineinstrs < %s | FileCheck %s
5; RUN: llc -mtriple=riscv64 -mattr=+d,+zvfhmin,+zvfbfmin,+v -target-abi=lp64d -verify-machineinstrs < %s | FileCheck %s
6
7define <vscale x 1 x bfloat> @masked_load_nxv1bf16(ptr %a, <vscale x 1 x i1> %mask) nounwind {
8; CHECK-LABEL: masked_load_nxv1bf16:
9; CHECK:       # %bb.0:
10; CHECK-NEXT:    vsetvli a1, zero, e16, mf4, ta, ma
11; CHECK-NEXT:    vle16.v v8, (a0), v0.t
12; CHECK-NEXT:    ret
13  %load = call <vscale x 1 x bfloat> @llvm.masked.load.nxv1bf16(ptr %a, i32 2, <vscale x 1 x i1> %mask, <vscale x 1 x bfloat> undef)
14  ret <vscale x 1 x bfloat> %load
15}
16declare <vscale x 1 x bfloat> @llvm.masked.load.nxv1bf16(ptr, i32, <vscale x 1 x i1>, <vscale x 1 x bfloat>)
17
18define <vscale x 1 x half> @masked_load_nxv1f16(ptr %a, <vscale x 1 x i1> %mask) nounwind {
19; CHECK-LABEL: masked_load_nxv1f16:
20; CHECK:       # %bb.0:
21; CHECK-NEXT:    vsetvli a1, zero, e16, mf4, ta, ma
22; CHECK-NEXT:    vle16.v v8, (a0), v0.t
23; CHECK-NEXT:    ret
24  %load = call <vscale x 1 x half> @llvm.masked.load.nxv1f16(ptr %a, i32 2, <vscale x 1 x i1> %mask, <vscale x 1 x half> undef)
25  ret <vscale x 1 x half> %load
26}
27declare <vscale x 1 x half> @llvm.masked.load.nxv1f16(ptr, i32, <vscale x 1 x i1>, <vscale x 1 x half>)
28
29define <vscale x 1 x float> @masked_load_nxv1f32(ptr %a, <vscale x 1 x i1> %mask) nounwind {
30; CHECK-LABEL: masked_load_nxv1f32:
31; CHECK:       # %bb.0:
32; CHECK-NEXT:    vsetvli a1, zero, e32, mf2, ta, ma
33; CHECK-NEXT:    vle32.v v8, (a0), v0.t
34; CHECK-NEXT:    ret
35  %load = call <vscale x 1 x float> @llvm.masked.load.nxv1f32(ptr %a, i32 4, <vscale x 1 x i1> %mask, <vscale x 1 x float> undef)
36  ret <vscale x 1 x float> %load
37}
38declare <vscale x 1 x float> @llvm.masked.load.nxv1f32(ptr, i32, <vscale x 1 x i1>, <vscale x 1 x float>)
39
40define <vscale x 1 x double> @masked_load_nxv1f64(ptr %a, <vscale x 1 x i1> %mask) nounwind {
41; CHECK-LABEL: masked_load_nxv1f64:
42; CHECK:       # %bb.0:
43; CHECK-NEXT:    vsetvli a1, zero, e64, m1, ta, ma
44; CHECK-NEXT:    vle64.v v8, (a0), v0.t
45; CHECK-NEXT:    ret
46  %load = call <vscale x 1 x double> @llvm.masked.load.nxv1f64(ptr %a, i32 8, <vscale x 1 x i1> %mask, <vscale x 1 x double> undef)
47  ret <vscale x 1 x double> %load
48}
49declare <vscale x 1 x double> @llvm.masked.load.nxv1f64(ptr, i32, <vscale x 1 x i1>, <vscale x 1 x double>)
50
51define <vscale x 2 x bfloat> @masked_load_nxv2bf16(ptr %a, <vscale x 2 x i1> %mask) nounwind {
52; CHECK-LABEL: masked_load_nxv2bf16:
53; CHECK:       # %bb.0:
54; CHECK-NEXT:    vsetvli a1, zero, e16, mf2, ta, ma
55; CHECK-NEXT:    vle16.v v8, (a0), v0.t
56; CHECK-NEXT:    ret
57  %load = call <vscale x 2 x bfloat> @llvm.masked.load.nxv2bf16(ptr %a, i32 2, <vscale x 2 x i1> %mask, <vscale x 2 x bfloat> undef)
58  ret <vscale x 2 x bfloat> %load
59}
60declare <vscale x 2 x bfloat> @llvm.masked.load.nxv2bf16(ptr, i32, <vscale x 2 x i1>, <vscale x 2 x bfloat>)
61
62define <vscale x 2 x half> @masked_load_nxv2f16(ptr %a, <vscale x 2 x i1> %mask) nounwind {
63; CHECK-LABEL: masked_load_nxv2f16:
64; CHECK:       # %bb.0:
65; CHECK-NEXT:    vsetvli a1, zero, e16, mf2, ta, ma
66; CHECK-NEXT:    vle16.v v8, (a0), v0.t
67; CHECK-NEXT:    ret
68  %load = call <vscale x 2 x half> @llvm.masked.load.nxv2f16(ptr %a, i32 2, <vscale x 2 x i1> %mask, <vscale x 2 x half> undef)
69  ret <vscale x 2 x half> %load
70}
71declare <vscale x 2 x half> @llvm.masked.load.nxv2f16(ptr, i32, <vscale x 2 x i1>, <vscale x 2 x half>)
72
73define <vscale x 2 x float> @masked_load_nxv2f32(ptr %a, <vscale x 2 x i1> %mask) nounwind {
74; CHECK-LABEL: masked_load_nxv2f32:
75; CHECK:       # %bb.0:
76; CHECK-NEXT:    vsetvli a1, zero, e32, m1, ta, ma
77; CHECK-NEXT:    vle32.v v8, (a0), v0.t
78; CHECK-NEXT:    ret
79  %load = call <vscale x 2 x float> @llvm.masked.load.nxv2f32(ptr %a, i32 4, <vscale x 2 x i1> %mask, <vscale x 2 x float> undef)
80  ret <vscale x 2 x float> %load
81}
82declare <vscale x 2 x float> @llvm.masked.load.nxv2f32(ptr, i32, <vscale x 2 x i1>, <vscale x 2 x float>)
83
84define <vscale x 2 x double> @masked_load_nxv2f64(ptr %a, <vscale x 2 x i1> %mask) nounwind {
85; CHECK-LABEL: masked_load_nxv2f64:
86; CHECK:       # %bb.0:
87; CHECK-NEXT:    vsetvli a1, zero, e64, m2, ta, ma
88; CHECK-NEXT:    vle64.v v8, (a0), v0.t
89; CHECK-NEXT:    ret
90  %load = call <vscale x 2 x double> @llvm.masked.load.nxv2f64(ptr %a, i32 8, <vscale x 2 x i1> %mask, <vscale x 2 x double> undef)
91  ret <vscale x 2 x double> %load
92}
93declare <vscale x 2 x double> @llvm.masked.load.nxv2f64(ptr, i32, <vscale x 2 x i1>, <vscale x 2 x double>)
94
95define <vscale x 4 x bfloat> @masked_load_nxv4bf16(ptr %a, <vscale x 4 x i1> %mask) nounwind {
96; CHECK-LABEL: masked_load_nxv4bf16:
97; CHECK:       # %bb.0:
98; CHECK-NEXT:    vsetvli a1, zero, e16, m1, ta, ma
99; CHECK-NEXT:    vle16.v v8, (a0), v0.t
100; CHECK-NEXT:    ret
101  %load = call <vscale x 4 x bfloat> @llvm.masked.load.nxv4bf16(ptr %a, i32 2, <vscale x 4 x i1> %mask, <vscale x 4 x bfloat> undef)
102  ret <vscale x 4 x bfloat> %load
103}
104declare <vscale x 4 x bfloat> @llvm.masked.load.nxv4bf16(ptr, i32, <vscale x 4 x i1>, <vscale x 4 x bfloat>)
105
106define <vscale x 4 x half> @masked_load_nxv4f16(ptr %a, <vscale x 4 x i1> %mask) nounwind {
107; CHECK-LABEL: masked_load_nxv4f16:
108; CHECK:       # %bb.0:
109; CHECK-NEXT:    vsetvli a1, zero, e16, m1, ta, ma
110; CHECK-NEXT:    vle16.v v8, (a0), v0.t
111; CHECK-NEXT:    ret
112  %load = call <vscale x 4 x half> @llvm.masked.load.nxv4f16(ptr %a, i32 2, <vscale x 4 x i1> %mask, <vscale x 4 x half> undef)
113  ret <vscale x 4 x half> %load
114}
115declare <vscale x 4 x half> @llvm.masked.load.nxv4f16(ptr, i32, <vscale x 4 x i1>, <vscale x 4 x half>)
116
117define <vscale x 4 x float> @masked_load_nxv4f32(ptr %a, <vscale x 4 x i1> %mask) nounwind {
118; CHECK-LABEL: masked_load_nxv4f32:
119; CHECK:       # %bb.0:
120; CHECK-NEXT:    vsetvli a1, zero, e32, m2, ta, ma
121; CHECK-NEXT:    vle32.v v8, (a0), v0.t
122; CHECK-NEXT:    ret
123  %load = call <vscale x 4 x float> @llvm.masked.load.nxv4f32(ptr %a, i32 4, <vscale x 4 x i1> %mask, <vscale x 4 x float> undef)
124  ret <vscale x 4 x float> %load
125}
126declare <vscale x 4 x float> @llvm.masked.load.nxv4f32(ptr, i32, <vscale x 4 x i1>, <vscale x 4 x float>)
127
128define <vscale x 4 x double> @masked_load_nxv4f64(ptr %a, <vscale x 4 x i1> %mask) nounwind {
129; CHECK-LABEL: masked_load_nxv4f64:
130; CHECK:       # %bb.0:
131; CHECK-NEXT:    vsetvli a1, zero, e64, m4, ta, ma
132; CHECK-NEXT:    vle64.v v8, (a0), v0.t
133; CHECK-NEXT:    ret
134  %load = call <vscale x 4 x double> @llvm.masked.load.nxv4f64(ptr %a, i32 8, <vscale x 4 x i1> %mask, <vscale x 4 x double> undef)
135  ret <vscale x 4 x double> %load
136}
137declare <vscale x 4 x double> @llvm.masked.load.nxv4f64(ptr, i32, <vscale x 4 x i1>, <vscale x 4 x double>)
138
139define <vscale x 8 x bfloat> @masked_load_nxv8bf16(ptr %a, <vscale x 8 x i1> %mask) nounwind {
140; CHECK-LABEL: masked_load_nxv8bf16:
141; CHECK:       # %bb.0:
142; CHECK-NEXT:    vsetvli a1, zero, e16, m2, ta, ma
143; CHECK-NEXT:    vle16.v v8, (a0), v0.t
144; CHECK-NEXT:    ret
145  %load = call <vscale x 8 x bfloat> @llvm.masked.load.nxv8bf16(ptr %a, i32 2, <vscale x 8 x i1> %mask, <vscale x 8 x bfloat> undef)
146  ret <vscale x 8 x bfloat> %load
147}
148declare <vscale x 8 x bfloat> @llvm.masked.load.nxv8bf16(ptr, i32, <vscale x 8 x i1>, <vscale x 8 x bfloat>)
149
150define <vscale x 8 x half> @masked_load_nxv8f16(ptr %a, <vscale x 8 x i1> %mask) nounwind {
151; CHECK-LABEL: masked_load_nxv8f16:
152; CHECK:       # %bb.0:
153; CHECK-NEXT:    vsetvli a1, zero, e16, m2, ta, ma
154; CHECK-NEXT:    vle16.v v8, (a0), v0.t
155; CHECK-NEXT:    ret
156  %load = call <vscale x 8 x half> @llvm.masked.load.nxv8f16(ptr %a, i32 2, <vscale x 8 x i1> %mask, <vscale x 8 x half> undef)
157  ret <vscale x 8 x half> %load
158}
159declare <vscale x 8 x half> @llvm.masked.load.nxv8f16(ptr, i32, <vscale x 8 x i1>, <vscale x 8 x half>)
160
161define <vscale x 8 x float> @masked_load_nxv8f32(ptr %a, <vscale x 8 x i1> %mask) nounwind {
162; CHECK-LABEL: masked_load_nxv8f32:
163; CHECK:       # %bb.0:
164; CHECK-NEXT:    vsetvli a1, zero, e32, m4, ta, ma
165; CHECK-NEXT:    vle32.v v8, (a0), v0.t
166; CHECK-NEXT:    ret
167  %load = call <vscale x 8 x float> @llvm.masked.load.nxv8f32(ptr %a, i32 4, <vscale x 8 x i1> %mask, <vscale x 8 x float> undef)
168  ret <vscale x 8 x float> %load
169}
170declare <vscale x 8 x float> @llvm.masked.load.nxv8f32(ptr, i32, <vscale x 8 x i1>, <vscale x 8 x float>)
171
172define <vscale x 8 x double> @masked_load_nxv8f64(ptr %a, <vscale x 8 x i1> %mask) nounwind {
173; CHECK-LABEL: masked_load_nxv8f64:
174; CHECK:       # %bb.0:
175; CHECK-NEXT:    vsetvli a1, zero, e64, m8, ta, ma
176; CHECK-NEXT:    vle64.v v8, (a0), v0.t
177; CHECK-NEXT:    ret
178  %load = call <vscale x 8 x double> @llvm.masked.load.nxv8f64(ptr %a, i32 8, <vscale x 8 x i1> %mask, <vscale x 8 x double> undef)
179  ret <vscale x 8 x double> %load
180}
181declare <vscale x 8 x double> @llvm.masked.load.nxv8f64(ptr, i32, <vscale x 8 x i1>, <vscale x 8 x double>)
182
183define <vscale x 16 x bfloat> @masked_load_nxv16bf16(ptr %a, <vscale x 16 x i1> %mask) nounwind {
184; CHECK-LABEL: masked_load_nxv16bf16:
185; CHECK:       # %bb.0:
186; CHECK-NEXT:    vsetvli a1, zero, e16, m4, ta, ma
187; CHECK-NEXT:    vle16.v v8, (a0), v0.t
188; CHECK-NEXT:    ret
189  %load = call <vscale x 16 x bfloat> @llvm.masked.load.nxv16bf16(ptr %a, i32 2, <vscale x 16 x i1> %mask, <vscale x 16 x bfloat> undef)
190  ret <vscale x 16 x bfloat> %load
191}
192declare <vscale x 16 x bfloat> @llvm.masked.load.nxv16bf16(ptr, i32, <vscale x 16 x i1>, <vscale x 16 x bfloat>)
193
194define <vscale x 16 x half> @masked_load_nxv16f16(ptr %a, <vscale x 16 x i1> %mask) nounwind {
195; CHECK-LABEL: masked_load_nxv16f16:
196; CHECK:       # %bb.0:
197; CHECK-NEXT:    vsetvli a1, zero, e16, m4, ta, ma
198; CHECK-NEXT:    vle16.v v8, (a0), v0.t
199; CHECK-NEXT:    ret
200  %load = call <vscale x 16 x half> @llvm.masked.load.nxv16f16(ptr %a, i32 2, <vscale x 16 x i1> %mask, <vscale x 16 x half> undef)
201  ret <vscale x 16 x half> %load
202}
203declare <vscale x 16 x half> @llvm.masked.load.nxv16f16(ptr, i32, <vscale x 16 x i1>, <vscale x 16 x half>)
204
205define <vscale x 16 x float> @masked_load_nxv16f32(ptr %a, <vscale x 16 x i1> %mask) nounwind {
206; CHECK-LABEL: masked_load_nxv16f32:
207; CHECK:       # %bb.0:
208; CHECK-NEXT:    vsetvli a1, zero, e32, m8, ta, ma
209; CHECK-NEXT:    vle32.v v8, (a0), v0.t
210; CHECK-NEXT:    ret
211  %load = call <vscale x 16 x float> @llvm.masked.load.nxv16f32(ptr %a, i32 4, <vscale x 16 x i1> %mask, <vscale x 16 x float> undef)
212  ret <vscale x 16 x float> %load
213}
214declare <vscale x 16 x float> @llvm.masked.load.nxv16f32(ptr, i32, <vscale x 16 x i1>, <vscale x 16 x float>)
215
216define <vscale x 32 x bfloat> @masked_load_nxv32bf16(ptr %a, <vscale x 32 x i1> %mask) nounwind {
217; CHECK-LABEL: masked_load_nxv32bf16:
218; CHECK:       # %bb.0:
219; CHECK-NEXT:    vsetvli a1, zero, e16, m8, ta, ma
220; CHECK-NEXT:    vle16.v v8, (a0), v0.t
221; CHECK-NEXT:    ret
222  %load = call <vscale x 32 x bfloat> @llvm.masked.load.nxv32bf16(ptr %a, i32 2, <vscale x 32 x i1> %mask, <vscale x 32 x bfloat> undef)
223  ret <vscale x 32 x bfloat> %load
224}
225declare <vscale x 32 x bfloat> @llvm.masked.load.nxv32bf16(ptr, i32, <vscale x 32 x i1>, <vscale x 32 x bfloat>)
226
227define <vscale x 32 x half> @masked_load_nxv32f16(ptr %a, <vscale x 32 x i1> %mask) nounwind {
228; CHECK-LABEL: masked_load_nxv32f16:
229; CHECK:       # %bb.0:
230; CHECK-NEXT:    vsetvli a1, zero, e16, m8, ta, ma
231; CHECK-NEXT:    vle16.v v8, (a0), v0.t
232; CHECK-NEXT:    ret
233  %load = call <vscale x 32 x half> @llvm.masked.load.nxv32f16(ptr %a, i32 2, <vscale x 32 x i1> %mask, <vscale x 32 x half> undef)
234  ret <vscale x 32 x half> %load
235}
236declare <vscale x 32 x half> @llvm.masked.load.nxv32f16(ptr, i32, <vscale x 32 x i1>, <vscale x 32 x half>)
237