1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=riscv32 -mattr=+v -verify-machineinstrs < %s | FileCheck %s 3; RUN: llc -mtriple=riscv64 -mattr=+v -verify-machineinstrs < %s | FileCheck %s 4 5define <2 x i16> @vwmaccus_vx_v2i16(ptr %x, i8 %y, <2 x i16> %z) { 6; CHECK-LABEL: vwmaccus_vx_v2i16: 7; CHECK: # %bb.0: 8; CHECK-NEXT: vsetivli zero, 2, e8, mf8, ta, ma 9; CHECK-NEXT: vle8.v v9, (a0) 10; CHECK-NEXT: vwmaccus.vx v8, a1, v9 11; CHECK-NEXT: ret 12 %a = load <2 x i8>, ptr %x 13 %b = insertelement <2 x i8> poison, i8 %y, i32 0 14 %c = shufflevector <2 x i8> %b, <2 x i8> poison, <2 x i32> zeroinitializer 15 %d = sext <2 x i8> %a to <2 x i16> 16 %e = zext <2 x i8> %c to <2 x i16> 17 %f = mul <2 x i16> %d, %e 18 %g = add <2 x i16> %f, %z 19 ret <2 x i16> %g 20} 21 22define <4 x i16> @vwmaccus_vx_v4i16(ptr %x, i8 %y, <4 x i16> %z) { 23; CHECK-LABEL: vwmaccus_vx_v4i16: 24; CHECK: # %bb.0: 25; CHECK-NEXT: vsetivli zero, 4, e8, mf4, ta, ma 26; CHECK-NEXT: vle8.v v9, (a0) 27; CHECK-NEXT: vwmaccus.vx v8, a1, v9 28; CHECK-NEXT: ret 29 %a = load <4 x i8>, ptr %x 30 %b = insertelement <4 x i8> poison, i8 %y, i32 0 31 %c = shufflevector <4 x i8> %b, <4 x i8> poison, <4 x i32> zeroinitializer 32 %d = sext <4 x i8> %a to <4 x i16> 33 %e = zext <4 x i8> %c to <4 x i16> 34 %f = mul <4 x i16> %d, %e 35 %g = add <4 x i16> %f, %z 36 ret <4 x i16> %g 37} 38 39define <2 x i32> @vwmaccus_vx_v2i32(ptr %x, i16 %y, <2 x i32> %z) { 40; CHECK-LABEL: vwmaccus_vx_v2i32: 41; CHECK: # %bb.0: 42; CHECK-NEXT: vsetivli zero, 2, e16, mf4, ta, ma 43; CHECK-NEXT: vle16.v v9, (a0) 44; CHECK-NEXT: vwmaccus.vx v8, a1, v9 45; CHECK-NEXT: ret 46 %a = load <2 x i16>, ptr %x 47 %b = insertelement <2 x i16> poison, i16 %y, i32 0 48 %c = shufflevector <2 x i16> %b, <2 x i16> poison, <2 x i32> zeroinitializer 49 %d = sext <2 x i16> %a to <2 x i32> 50 %e = zext <2 x i16> %c to <2 x i32> 51 %f = mul <2 x i32> %d, %e 52 %g = add <2 x i32> %f, %z 53 ret <2 x i32> %g 54} 55 56define <8 x i16> @vwmaccus_vx_v8i16(ptr %x, i8 %y, <8 x i16> %z) { 57; CHECK-LABEL: vwmaccus_vx_v8i16: 58; CHECK: # %bb.0: 59; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, ma 60; CHECK-NEXT: vle8.v v9, (a0) 61; CHECK-NEXT: vwmaccus.vx v8, a1, v9 62; CHECK-NEXT: ret 63 %a = load <8 x i8>, ptr %x 64 %b = insertelement <8 x i8> poison, i8 %y, i32 0 65 %c = shufflevector <8 x i8> %b, <8 x i8> poison, <8 x i32> zeroinitializer 66 %d = sext <8 x i8> %a to <8 x i16> 67 %e = zext <8 x i8> %c to <8 x i16> 68 %f = mul <8 x i16> %d, %e 69 %g = add <8 x i16> %f, %z 70 ret <8 x i16> %g 71} 72 73define <4 x i32> @vwmaccus_vx_v4i32(ptr %x, i16 %y, <4 x i32> %z) { 74; CHECK-LABEL: vwmaccus_vx_v4i32: 75; CHECK: # %bb.0: 76; CHECK-NEXT: vsetivli zero, 4, e16, mf2, ta, ma 77; CHECK-NEXT: vle16.v v9, (a0) 78; CHECK-NEXT: vwmaccus.vx v8, a1, v9 79; CHECK-NEXT: ret 80 %a = load <4 x i16>, ptr %x 81 %b = insertelement <4 x i16> poison, i16 %y, i32 0 82 %c = shufflevector <4 x i16> %b, <4 x i16> poison, <4 x i32> zeroinitializer 83 %d = sext <4 x i16> %a to <4 x i32> 84 %e = zext <4 x i16> %c to <4 x i32> 85 %f = mul <4 x i32> %d, %e 86 %g = add <4 x i32> %f, %z 87 ret <4 x i32> %g 88} 89 90define <2 x i64> @vwmaccus_vx_v2i64(ptr %x, i32 %y, <2 x i64> %z) { 91; CHECK-LABEL: vwmaccus_vx_v2i64: 92; CHECK: # %bb.0: 93; CHECK-NEXT: vsetivli zero, 2, e32, mf2, ta, ma 94; CHECK-NEXT: vle32.v v9, (a0) 95; CHECK-NEXT: vwmaccus.vx v8, a1, v9 96; CHECK-NEXT: ret 97 %a = load <2 x i32>, ptr %x 98 %b = insertelement <2 x i32> poison, i32 %y, i64 0 99 %c = shufflevector <2 x i32> %b, <2 x i32> poison, <2 x i32> zeroinitializer 100 %d = sext <2 x i32> %a to <2 x i64> 101 %e = zext <2 x i32> %c to <2 x i64> 102 %f = mul <2 x i64> %d, %e 103 %g = add <2 x i64> %f, %z 104 ret <2 x i64> %g 105} 106 107define <16 x i16> @vwmaccus_vx_v16i16(ptr %x, i8 %y, <16 x i16> %z) { 108; CHECK-LABEL: vwmaccus_vx_v16i16: 109; CHECK: # %bb.0: 110; CHECK-NEXT: vsetivli zero, 16, e8, m1, ta, ma 111; CHECK-NEXT: vle8.v v10, (a0) 112; CHECK-NEXT: vwmaccus.vx v8, a1, v10 113; CHECK-NEXT: ret 114 %a = load <16 x i8>, ptr %x 115 %b = insertelement <16 x i8> poison, i8 %y, i32 0 116 %c = shufflevector <16 x i8> %b, <16 x i8> poison, <16 x i32> zeroinitializer 117 %d = sext <16 x i8> %a to <16 x i16> 118 %e = zext <16 x i8> %c to <16 x i16> 119 %f = mul <16 x i16> %d, %e 120 %g = add <16 x i16> %f, %z 121 ret <16 x i16> %g 122} 123 124define <8 x i32> @vwmaccus_vx_v8i32(ptr %x, i16 %y, <8 x i32> %z) { 125; CHECK-LABEL: vwmaccus_vx_v8i32: 126; CHECK: # %bb.0: 127; CHECK-NEXT: vsetivli zero, 8, e16, m1, ta, ma 128; CHECK-NEXT: vle16.v v10, (a0) 129; CHECK-NEXT: vwmaccus.vx v8, a1, v10 130; CHECK-NEXT: ret 131 %a = load <8 x i16>, ptr %x 132 %b = insertelement <8 x i16> poison, i16 %y, i32 0 133 %c = shufflevector <8 x i16> %b, <8 x i16> poison, <8 x i32> zeroinitializer 134 %d = sext <8 x i16> %a to <8 x i32> 135 %e = zext <8 x i16> %c to <8 x i32> 136 %f = mul <8 x i32> %d, %e 137 %g = add <8 x i32> %f, %z 138 ret <8 x i32> %g 139} 140 141define <4 x i64> @vwmaccus_vx_v4i64(ptr %x, i32 %y, <4 x i64> %z) { 142; CHECK-LABEL: vwmaccus_vx_v4i64: 143; CHECK: # %bb.0: 144; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, ma 145; CHECK-NEXT: vle32.v v10, (a0) 146; CHECK-NEXT: vwmaccus.vx v8, a1, v10 147; CHECK-NEXT: ret 148 %a = load <4 x i32>, ptr %x 149 %b = insertelement <4 x i32> poison, i32 %y, i64 0 150 %c = shufflevector <4 x i32> %b, <4 x i32> poison, <4 x i32> zeroinitializer 151 %d = sext <4 x i32> %a to <4 x i64> 152 %e = zext <4 x i32> %c to <4 x i64> 153 %f = mul <4 x i64> %d, %e 154 %g = add <4 x i64> %f, %z 155 ret <4 x i64> %g 156} 157 158define <32 x i16> @vwmaccus_vx_v32i16(ptr %x, i8 %y, <32 x i16> %z) { 159; CHECK-LABEL: vwmaccus_vx_v32i16: 160; CHECK: # %bb.0: 161; CHECK-NEXT: li a2, 32 162; CHECK-NEXT: vsetvli zero, a2, e8, m2, ta, ma 163; CHECK-NEXT: vle8.v v12, (a0) 164; CHECK-NEXT: vwmaccus.vx v8, a1, v12 165; CHECK-NEXT: ret 166 %a = load <32 x i8>, ptr %x 167 %b = insertelement <32 x i8> poison, i8 %y, i32 0 168 %c = shufflevector <32 x i8> %b, <32 x i8> poison, <32 x i32> zeroinitializer 169 %d = sext <32 x i8> %a to <32 x i16> 170 %e = zext <32 x i8> %c to <32 x i16> 171 %f = mul <32 x i16> %d, %e 172 %g = add <32 x i16> %f, %z 173 ret <32 x i16> %g 174} 175 176define <16 x i32> @vwmaccus_vx_v16i32(ptr %x, i16 %y, <16 x i32> %z) { 177; CHECK-LABEL: vwmaccus_vx_v16i32: 178; CHECK: # %bb.0: 179; CHECK-NEXT: vsetivli zero, 16, e16, m2, ta, ma 180; CHECK-NEXT: vle16.v v12, (a0) 181; CHECK-NEXT: vwmaccus.vx v8, a1, v12 182; CHECK-NEXT: ret 183 %a = load <16 x i16>, ptr %x 184 %b = insertelement <16 x i16> poison, i16 %y, i32 0 185 %c = shufflevector <16 x i16> %b, <16 x i16> poison, <16 x i32> zeroinitializer 186 %d = sext <16 x i16> %a to <16 x i32> 187 %e = zext <16 x i16> %c to <16 x i32> 188 %f = mul <16 x i32> %d, %e 189 %g = add <16 x i32> %f, %z 190 ret <16 x i32> %g 191} 192 193define <8 x i64> @vwmaccus_vx_v8i64(ptr %x, i32 %y, <8 x i64> %z) { 194; CHECK-LABEL: vwmaccus_vx_v8i64: 195; CHECK: # %bb.0: 196; CHECK-NEXT: vsetivli zero, 8, e32, m2, ta, ma 197; CHECK-NEXT: vle32.v v12, (a0) 198; CHECK-NEXT: vwmaccus.vx v8, a1, v12 199; CHECK-NEXT: ret 200 %a = load <8 x i32>, ptr %x 201 %b = insertelement <8 x i32> poison, i32 %y, i64 0 202 %c = shufflevector <8 x i32> %b, <8 x i32> poison, <8 x i32> zeroinitializer 203 %d = sext <8 x i32> %a to <8 x i64> 204 %e = zext <8 x i32> %c to <8 x i64> 205 %f = mul <8 x i64> %d, %e 206 %g = add <8 x i64> %f, %z 207 ret <8 x i64> %g 208} 209 210define <64 x i16> @vwmaccus_vx_v64i16(ptr %x, i8 %y, <64 x i16> %z) { 211; CHECK-LABEL: vwmaccus_vx_v64i16: 212; CHECK: # %bb.0: 213; CHECK-NEXT: li a2, 64 214; CHECK-NEXT: vsetvli zero, a2, e8, m4, ta, ma 215; CHECK-NEXT: vle8.v v16, (a0) 216; CHECK-NEXT: vwmaccus.vx v8, a1, v16 217; CHECK-NEXT: ret 218 %a = load <64 x i8>, ptr %x 219 %b = insertelement <64 x i8> poison, i8 %y, i32 0 220 %c = shufflevector <64 x i8> %b, <64 x i8> poison, <64 x i32> zeroinitializer 221 %d = sext <64 x i8> %a to <64 x i16> 222 %e = zext <64 x i8> %c to <64 x i16> 223 %f = mul <64 x i16> %d, %e 224 %g = add <64 x i16> %f, %z 225 ret <64 x i16> %g 226} 227 228define <32 x i32> @vwmaccus_vx_v32i32(ptr %x, i16 %y, <32 x i32> %z) { 229; CHECK-LABEL: vwmaccus_vx_v32i32: 230; CHECK: # %bb.0: 231; CHECK-NEXT: li a2, 32 232; CHECK-NEXT: vsetvli zero, a2, e16, m4, ta, ma 233; CHECK-NEXT: vle16.v v16, (a0) 234; CHECK-NEXT: vwmaccus.vx v8, a1, v16 235; CHECK-NEXT: ret 236 %a = load <32 x i16>, ptr %x 237 %b = insertelement <32 x i16> poison, i16 %y, i32 0 238 %c = shufflevector <32 x i16> %b, <32 x i16> poison, <32 x i32> zeroinitializer 239 %d = sext <32 x i16> %a to <32 x i32> 240 %e = zext <32 x i16> %c to <32 x i32> 241 %f = mul <32 x i32> %d, %e 242 %g = add <32 x i32> %f, %z 243 ret <32 x i32> %g 244} 245 246define <16 x i64> @vwmaccus_vx_v16i64(ptr %x, i32 %y, <16 x i64> %z) { 247; CHECK-LABEL: vwmaccus_vx_v16i64: 248; CHECK: # %bb.0: 249; CHECK-NEXT: vsetivli zero, 16, e32, m4, ta, ma 250; CHECK-NEXT: vle32.v v16, (a0) 251; CHECK-NEXT: vwmaccus.vx v8, a1, v16 252; CHECK-NEXT: ret 253 %a = load <16 x i32>, ptr %x 254 %b = insertelement <16 x i32> poison, i32 %y, i64 0 255 %c = shufflevector <16 x i32> %b, <16 x i32> poison, <16 x i32> zeroinitializer 256 %d = sext <16 x i32> %a to <16 x i64> 257 %e = zext <16 x i32> %c to <16 x i64> 258 %f = mul <16 x i64> %d, %e 259 %g = add <16 x i64> %f, %z 260 ret <16 x i64> %g 261} 262