xref: /llvm-project/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmul-vp.ll (revision 97982a8c605fac7c86d02e641a6cd7898b3ca343) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=riscv32 -mattr=+v -verify-machineinstrs < %s \
3; RUN:   | FileCheck %s --check-prefixes=CHECK,RV32
4; RUN: llc -mtriple=riscv64 -mattr=+v -verify-machineinstrs < %s \
5; RUN:   | FileCheck %s --check-prefixes=CHECK,RV64
6
7declare <8 x i7> @llvm.vp.mul.v8i7(<8 x i7>, <8 x i7>, <8 x i1>, i32)
8
9define <8 x i7> @vmul_vv_v8i7(<8 x i7> %va, <8 x i7> %b, <8 x i1> %m, i32 zeroext %evl) {
10; CHECK-LABEL: vmul_vv_v8i7:
11; CHECK:       # %bb.0:
12; CHECK-NEXT:    vsetvli zero, a0, e8, mf2, ta, ma
13; CHECK-NEXT:    vmul.vv v8, v8, v9, v0.t
14; CHECK-NEXT:    ret
15  %v = call <8 x i7> @llvm.vp.mul.v8i7(<8 x i7> %va, <8 x i7> %b, <8 x i1> %m, i32 %evl)
16  ret <8 x i7> %v
17}
18
19declare <2 x i8> @llvm.vp.mul.v2i8(<2 x i8>, <2 x i8>, <2 x i1>, i32)
20
21define <2 x i8> @vmul_vv_v2i8(<2 x i8> %va, <2 x i8> %b, <2 x i1> %m, i32 zeroext %evl) {
22; CHECK-LABEL: vmul_vv_v2i8:
23; CHECK:       # %bb.0:
24; CHECK-NEXT:    vsetvli zero, a0, e8, mf8, ta, ma
25; CHECK-NEXT:    vmul.vv v8, v8, v9, v0.t
26; CHECK-NEXT:    ret
27  %v = call <2 x i8> @llvm.vp.mul.v2i8(<2 x i8> %va, <2 x i8> %b, <2 x i1> %m, i32 %evl)
28  ret <2 x i8> %v
29}
30
31define <2 x i8> @vmul_vv_v2i8_unmasked(<2 x i8> %va, <2 x i8> %b, i32 zeroext %evl) {
32; CHECK-LABEL: vmul_vv_v2i8_unmasked:
33; CHECK:       # %bb.0:
34; CHECK-NEXT:    vsetvli zero, a0, e8, mf8, ta, ma
35; CHECK-NEXT:    vmul.vv v8, v8, v9
36; CHECK-NEXT:    ret
37  %v = call <2 x i8> @llvm.vp.mul.v2i8(<2 x i8> %va, <2 x i8> %b, <2 x i1> splat (i1 true), i32 %evl)
38  ret <2 x i8> %v
39}
40
41define <2 x i8> @vmul_vx_v2i8(<2 x i8> %va, i8 %b, <2 x i1> %m, i32 zeroext %evl) {
42; CHECK-LABEL: vmul_vx_v2i8:
43; CHECK:       # %bb.0:
44; CHECK-NEXT:    vsetvli zero, a1, e8, mf8, ta, ma
45; CHECK-NEXT:    vmul.vx v8, v8, a0, v0.t
46; CHECK-NEXT:    ret
47  %elt.head = insertelement <2 x i8> poison, i8 %b, i32 0
48  %vb = shufflevector <2 x i8> %elt.head, <2 x i8> poison, <2 x i32> zeroinitializer
49  %v = call <2 x i8> @llvm.vp.mul.v2i8(<2 x i8> %va, <2 x i8> %vb, <2 x i1> %m, i32 %evl)
50  ret <2 x i8> %v
51}
52
53define <2 x i8> @vmul_vx_v2i8_unmasked(<2 x i8> %va, i8 %b, i32 zeroext %evl) {
54; CHECK-LABEL: vmul_vx_v2i8_unmasked:
55; CHECK:       # %bb.0:
56; CHECK-NEXT:    vsetvli zero, a1, e8, mf8, ta, ma
57; CHECK-NEXT:    vmul.vx v8, v8, a0
58; CHECK-NEXT:    ret
59  %elt.head = insertelement <2 x i8> poison, i8 %b, i32 0
60  %vb = shufflevector <2 x i8> %elt.head, <2 x i8> poison, <2 x i32> zeroinitializer
61  %v = call <2 x i8> @llvm.vp.mul.v2i8(<2 x i8> %va, <2 x i8> %vb, <2 x i1> splat (i1 true), i32 %evl)
62  ret <2 x i8> %v
63}
64
65declare <4 x i8> @llvm.vp.mul.v4i8(<4 x i8>, <4 x i8>, <4 x i1>, i32)
66
67define <4 x i8> @vmul_vv_v4i8(<4 x i8> %va, <4 x i8> %b, <4 x i1> %m, i32 zeroext %evl) {
68; CHECK-LABEL: vmul_vv_v4i8:
69; CHECK:       # %bb.0:
70; CHECK-NEXT:    vsetvli zero, a0, e8, mf4, ta, ma
71; CHECK-NEXT:    vmul.vv v8, v8, v9, v0.t
72; CHECK-NEXT:    ret
73  %v = call <4 x i8> @llvm.vp.mul.v4i8(<4 x i8> %va, <4 x i8> %b, <4 x i1> %m, i32 %evl)
74  ret <4 x i8> %v
75}
76
77define <4 x i8> @vmul_vv_v4i8_unmasked(<4 x i8> %va, <4 x i8> %b, i32 zeroext %evl) {
78; CHECK-LABEL: vmul_vv_v4i8_unmasked:
79; CHECK:       # %bb.0:
80; CHECK-NEXT:    vsetvli zero, a0, e8, mf4, ta, ma
81; CHECK-NEXT:    vmul.vv v8, v8, v9
82; CHECK-NEXT:    ret
83  %v = call <4 x i8> @llvm.vp.mul.v4i8(<4 x i8> %va, <4 x i8> %b, <4 x i1> splat (i1 true), i32 %evl)
84  ret <4 x i8> %v
85}
86
87define <4 x i8> @vmul_vx_v4i8(<4 x i8> %va, i8 %b, <4 x i1> %m, i32 zeroext %evl) {
88; CHECK-LABEL: vmul_vx_v4i8:
89; CHECK:       # %bb.0:
90; CHECK-NEXT:    vsetvli zero, a1, e8, mf4, ta, ma
91; CHECK-NEXT:    vmul.vx v8, v8, a0, v0.t
92; CHECK-NEXT:    ret
93  %elt.head = insertelement <4 x i8> poison, i8 %b, i32 0
94  %vb = shufflevector <4 x i8> %elt.head, <4 x i8> poison, <4 x i32> zeroinitializer
95  %v = call <4 x i8> @llvm.vp.mul.v4i8(<4 x i8> %va, <4 x i8> %vb, <4 x i1> %m, i32 %evl)
96  ret <4 x i8> %v
97}
98
99define <4 x i8> @vmul_vx_v4i8_unmasked(<4 x i8> %va, i8 %b, i32 zeroext %evl) {
100; CHECK-LABEL: vmul_vx_v4i8_unmasked:
101; CHECK:       # %bb.0:
102; CHECK-NEXT:    vsetvli zero, a1, e8, mf4, ta, ma
103; CHECK-NEXT:    vmul.vx v8, v8, a0
104; CHECK-NEXT:    ret
105  %elt.head = insertelement <4 x i8> poison, i8 %b, i32 0
106  %vb = shufflevector <4 x i8> %elt.head, <4 x i8> poison, <4 x i32> zeroinitializer
107  %v = call <4 x i8> @llvm.vp.mul.v4i8(<4 x i8> %va, <4 x i8> %vb, <4 x i1> splat (i1 true), i32 %evl)
108  ret <4 x i8> %v
109}
110
111declare <8 x i8> @llvm.vp.mul.v8i8(<8 x i8>, <8 x i8>, <8 x i1>, i32)
112
113define <8 x i8> @vmul_vv_v8i8(<8 x i8> %va, <8 x i8> %b, <8 x i1> %m, i32 zeroext %evl) {
114; CHECK-LABEL: vmul_vv_v8i8:
115; CHECK:       # %bb.0:
116; CHECK-NEXT:    vsetvli zero, a0, e8, mf2, ta, ma
117; CHECK-NEXT:    vmul.vv v8, v8, v9, v0.t
118; CHECK-NEXT:    ret
119  %v = call <8 x i8> @llvm.vp.mul.v8i8(<8 x i8> %va, <8 x i8> %b, <8 x i1> %m, i32 %evl)
120  ret <8 x i8> %v
121}
122
123define <8 x i8> @vmul_vv_v8i8_unmasked(<8 x i8> %va, <8 x i8> %b, i32 zeroext %evl) {
124; CHECK-LABEL: vmul_vv_v8i8_unmasked:
125; CHECK:       # %bb.0:
126; CHECK-NEXT:    vsetvli zero, a0, e8, mf2, ta, ma
127; CHECK-NEXT:    vmul.vv v8, v8, v9
128; CHECK-NEXT:    ret
129  %v = call <8 x i8> @llvm.vp.mul.v8i8(<8 x i8> %va, <8 x i8> %b, <8 x i1> splat (i1 true), i32 %evl)
130  ret <8 x i8> %v
131}
132
133define <8 x i8> @vmul_vx_v8i8(<8 x i8> %va, i8 %b, <8 x i1> %m, i32 zeroext %evl) {
134; CHECK-LABEL: vmul_vx_v8i8:
135; CHECK:       # %bb.0:
136; CHECK-NEXT:    vsetvli zero, a1, e8, mf2, ta, ma
137; CHECK-NEXT:    vmul.vx v8, v8, a0, v0.t
138; CHECK-NEXT:    ret
139  %elt.head = insertelement <8 x i8> poison, i8 %b, i32 0
140  %vb = shufflevector <8 x i8> %elt.head, <8 x i8> poison, <8 x i32> zeroinitializer
141  %v = call <8 x i8> @llvm.vp.mul.v8i8(<8 x i8> %va, <8 x i8> %vb, <8 x i1> %m, i32 %evl)
142  ret <8 x i8> %v
143}
144
145define <8 x i8> @vmul_vx_v8i8_unmasked(<8 x i8> %va, i8 %b, i32 zeroext %evl) {
146; CHECK-LABEL: vmul_vx_v8i8_unmasked:
147; CHECK:       # %bb.0:
148; CHECK-NEXT:    vsetvli zero, a1, e8, mf2, ta, ma
149; CHECK-NEXT:    vmul.vx v8, v8, a0
150; CHECK-NEXT:    ret
151  %elt.head = insertelement <8 x i8> poison, i8 %b, i32 0
152  %vb = shufflevector <8 x i8> %elt.head, <8 x i8> poison, <8 x i32> zeroinitializer
153  %v = call <8 x i8> @llvm.vp.mul.v8i8(<8 x i8> %va, <8 x i8> %vb, <8 x i1> splat (i1 true), i32 %evl)
154  ret <8 x i8> %v
155}
156
157declare <16 x i8> @llvm.vp.mul.v16i8(<16 x i8>, <16 x i8>, <16 x i1>, i32)
158
159define <16 x i8> @vmul_vv_v16i8(<16 x i8> %va, <16 x i8> %b, <16 x i1> %m, i32 zeroext %evl) {
160; CHECK-LABEL: vmul_vv_v16i8:
161; CHECK:       # %bb.0:
162; CHECK-NEXT:    vsetvli zero, a0, e8, m1, ta, ma
163; CHECK-NEXT:    vmul.vv v8, v8, v9, v0.t
164; CHECK-NEXT:    ret
165  %v = call <16 x i8> @llvm.vp.mul.v16i8(<16 x i8> %va, <16 x i8> %b, <16 x i1> %m, i32 %evl)
166  ret <16 x i8> %v
167}
168
169define <16 x i8> @vmul_vv_v16i8_unmasked(<16 x i8> %va, <16 x i8> %b, i32 zeroext %evl) {
170; CHECK-LABEL: vmul_vv_v16i8_unmasked:
171; CHECK:       # %bb.0:
172; CHECK-NEXT:    vsetvli zero, a0, e8, m1, ta, ma
173; CHECK-NEXT:    vmul.vv v8, v8, v9
174; CHECK-NEXT:    ret
175  %v = call <16 x i8> @llvm.vp.mul.v16i8(<16 x i8> %va, <16 x i8> %b, <16 x i1> splat (i1 true), i32 %evl)
176  ret <16 x i8> %v
177}
178
179define <16 x i8> @vmul_vx_v16i8(<16 x i8> %va, i8 %b, <16 x i1> %m, i32 zeroext %evl) {
180; CHECK-LABEL: vmul_vx_v16i8:
181; CHECK:       # %bb.0:
182; CHECK-NEXT:    vsetvli zero, a1, e8, m1, ta, ma
183; CHECK-NEXT:    vmul.vx v8, v8, a0, v0.t
184; CHECK-NEXT:    ret
185  %elt.head = insertelement <16 x i8> poison, i8 %b, i32 0
186  %vb = shufflevector <16 x i8> %elt.head, <16 x i8> poison, <16 x i32> zeroinitializer
187  %v = call <16 x i8> @llvm.vp.mul.v16i8(<16 x i8> %va, <16 x i8> %vb, <16 x i1> %m, i32 %evl)
188  ret <16 x i8> %v
189}
190
191define <16 x i8> @vmul_vx_v16i8_unmasked(<16 x i8> %va, i8 %b, i32 zeroext %evl) {
192; CHECK-LABEL: vmul_vx_v16i8_unmasked:
193; CHECK:       # %bb.0:
194; CHECK-NEXT:    vsetvli zero, a1, e8, m1, ta, ma
195; CHECK-NEXT:    vmul.vx v8, v8, a0
196; CHECK-NEXT:    ret
197  %elt.head = insertelement <16 x i8> poison, i8 %b, i32 0
198  %vb = shufflevector <16 x i8> %elt.head, <16 x i8> poison, <16 x i32> zeroinitializer
199  %v = call <16 x i8> @llvm.vp.mul.v16i8(<16 x i8> %va, <16 x i8> %vb, <16 x i1> splat (i1 true), i32 %evl)
200  ret <16 x i8> %v
201}
202
203declare <2 x i16> @llvm.vp.mul.v2i16(<2 x i16>, <2 x i16>, <2 x i1>, i32)
204
205define <2 x i16> @vmul_vv_v2i16(<2 x i16> %va, <2 x i16> %b, <2 x i1> %m, i32 zeroext %evl) {
206; CHECK-LABEL: vmul_vv_v2i16:
207; CHECK:       # %bb.0:
208; CHECK-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
209; CHECK-NEXT:    vmul.vv v8, v8, v9, v0.t
210; CHECK-NEXT:    ret
211  %v = call <2 x i16> @llvm.vp.mul.v2i16(<2 x i16> %va, <2 x i16> %b, <2 x i1> %m, i32 %evl)
212  ret <2 x i16> %v
213}
214
215define <2 x i16> @vmul_vv_v2i16_unmasked(<2 x i16> %va, <2 x i16> %b, i32 zeroext %evl) {
216; CHECK-LABEL: vmul_vv_v2i16_unmasked:
217; CHECK:       # %bb.0:
218; CHECK-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
219; CHECK-NEXT:    vmul.vv v8, v8, v9
220; CHECK-NEXT:    ret
221  %v = call <2 x i16> @llvm.vp.mul.v2i16(<2 x i16> %va, <2 x i16> %b, <2 x i1> splat (i1 true), i32 %evl)
222  ret <2 x i16> %v
223}
224
225define <2 x i16> @vmul_vx_v2i16(<2 x i16> %va, i16 %b, <2 x i1> %m, i32 zeroext %evl) {
226; CHECK-LABEL: vmul_vx_v2i16:
227; CHECK:       # %bb.0:
228; CHECK-NEXT:    vsetvli zero, a1, e16, mf4, ta, ma
229; CHECK-NEXT:    vmul.vx v8, v8, a0, v0.t
230; CHECK-NEXT:    ret
231  %elt.head = insertelement <2 x i16> poison, i16 %b, i32 0
232  %vb = shufflevector <2 x i16> %elt.head, <2 x i16> poison, <2 x i32> zeroinitializer
233  %v = call <2 x i16> @llvm.vp.mul.v2i16(<2 x i16> %va, <2 x i16> %vb, <2 x i1> %m, i32 %evl)
234  ret <2 x i16> %v
235}
236
237define <2 x i16> @vmul_vx_v2i16_unmasked(<2 x i16> %va, i16 %b, i32 zeroext %evl) {
238; CHECK-LABEL: vmul_vx_v2i16_unmasked:
239; CHECK:       # %bb.0:
240; CHECK-NEXT:    vsetvli zero, a1, e16, mf4, ta, ma
241; CHECK-NEXT:    vmul.vx v8, v8, a0
242; CHECK-NEXT:    ret
243  %elt.head = insertelement <2 x i16> poison, i16 %b, i32 0
244  %vb = shufflevector <2 x i16> %elt.head, <2 x i16> poison, <2 x i32> zeroinitializer
245  %v = call <2 x i16> @llvm.vp.mul.v2i16(<2 x i16> %va, <2 x i16> %vb, <2 x i1> splat (i1 true), i32 %evl)
246  ret <2 x i16> %v
247}
248
249declare <4 x i16> @llvm.vp.mul.v4i16(<4 x i16>, <4 x i16>, <4 x i1>, i32)
250
251define <4 x i16> @vmul_vv_v4i16(<4 x i16> %va, <4 x i16> %b, <4 x i1> %m, i32 zeroext %evl) {
252; CHECK-LABEL: vmul_vv_v4i16:
253; CHECK:       # %bb.0:
254; CHECK-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
255; CHECK-NEXT:    vmul.vv v8, v8, v9, v0.t
256; CHECK-NEXT:    ret
257  %v = call <4 x i16> @llvm.vp.mul.v4i16(<4 x i16> %va, <4 x i16> %b, <4 x i1> %m, i32 %evl)
258  ret <4 x i16> %v
259}
260
261define <4 x i16> @vmul_vv_v4i16_unmasked(<4 x i16> %va, <4 x i16> %b, i32 zeroext %evl) {
262; CHECK-LABEL: vmul_vv_v4i16_unmasked:
263; CHECK:       # %bb.0:
264; CHECK-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
265; CHECK-NEXT:    vmul.vv v8, v8, v9
266; CHECK-NEXT:    ret
267  %v = call <4 x i16> @llvm.vp.mul.v4i16(<4 x i16> %va, <4 x i16> %b, <4 x i1> splat (i1 true), i32 %evl)
268  ret <4 x i16> %v
269}
270
271define <4 x i16> @vmul_vx_v4i16(<4 x i16> %va, i16 %b, <4 x i1> %m, i32 zeroext %evl) {
272; CHECK-LABEL: vmul_vx_v4i16:
273; CHECK:       # %bb.0:
274; CHECK-NEXT:    vsetvli zero, a1, e16, mf2, ta, ma
275; CHECK-NEXT:    vmul.vx v8, v8, a0, v0.t
276; CHECK-NEXT:    ret
277  %elt.head = insertelement <4 x i16> poison, i16 %b, i32 0
278  %vb = shufflevector <4 x i16> %elt.head, <4 x i16> poison, <4 x i32> zeroinitializer
279  %v = call <4 x i16> @llvm.vp.mul.v4i16(<4 x i16> %va, <4 x i16> %vb, <4 x i1> %m, i32 %evl)
280  ret <4 x i16> %v
281}
282
283define <4 x i16> @vmul_vx_v4i16_unmasked(<4 x i16> %va, i16 %b, i32 zeroext %evl) {
284; CHECK-LABEL: vmul_vx_v4i16_unmasked:
285; CHECK:       # %bb.0:
286; CHECK-NEXT:    vsetvli zero, a1, e16, mf2, ta, ma
287; CHECK-NEXT:    vmul.vx v8, v8, a0
288; CHECK-NEXT:    ret
289  %elt.head = insertelement <4 x i16> poison, i16 %b, i32 0
290  %vb = shufflevector <4 x i16> %elt.head, <4 x i16> poison, <4 x i32> zeroinitializer
291  %v = call <4 x i16> @llvm.vp.mul.v4i16(<4 x i16> %va, <4 x i16> %vb, <4 x i1> splat (i1 true), i32 %evl)
292  ret <4 x i16> %v
293}
294
295declare <8 x i16> @llvm.vp.mul.v8i16(<8 x i16>, <8 x i16>, <8 x i1>, i32)
296
297define <8 x i16> @vmul_vv_v8i16(<8 x i16> %va, <8 x i16> %b, <8 x i1> %m, i32 zeroext %evl) {
298; CHECK-LABEL: vmul_vv_v8i16:
299; CHECK:       # %bb.0:
300; CHECK-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
301; CHECK-NEXT:    vmul.vv v8, v8, v9, v0.t
302; CHECK-NEXT:    ret
303  %v = call <8 x i16> @llvm.vp.mul.v8i16(<8 x i16> %va, <8 x i16> %b, <8 x i1> %m, i32 %evl)
304  ret <8 x i16> %v
305}
306
307define <8 x i16> @vmul_vv_v8i16_unmasked(<8 x i16> %va, <8 x i16> %b, i32 zeroext %evl) {
308; CHECK-LABEL: vmul_vv_v8i16_unmasked:
309; CHECK:       # %bb.0:
310; CHECK-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
311; CHECK-NEXT:    vmul.vv v8, v8, v9
312; CHECK-NEXT:    ret
313  %v = call <8 x i16> @llvm.vp.mul.v8i16(<8 x i16> %va, <8 x i16> %b, <8 x i1> splat (i1 true), i32 %evl)
314  ret <8 x i16> %v
315}
316
317define <8 x i16> @vmul_vx_v8i16(<8 x i16> %va, i16 %b, <8 x i1> %m, i32 zeroext %evl) {
318; CHECK-LABEL: vmul_vx_v8i16:
319; CHECK:       # %bb.0:
320; CHECK-NEXT:    vsetvli zero, a1, e16, m1, ta, ma
321; CHECK-NEXT:    vmul.vx v8, v8, a0, v0.t
322; CHECK-NEXT:    ret
323  %elt.head = insertelement <8 x i16> poison, i16 %b, i32 0
324  %vb = shufflevector <8 x i16> %elt.head, <8 x i16> poison, <8 x i32> zeroinitializer
325  %v = call <8 x i16> @llvm.vp.mul.v8i16(<8 x i16> %va, <8 x i16> %vb, <8 x i1> %m, i32 %evl)
326  ret <8 x i16> %v
327}
328
329define <8 x i16> @vmul_vx_v8i16_commute(<8 x i16> %va, i16 %b, <8 x i1> %m, i32 zeroext %evl) {
330; CHECK-LABEL: vmul_vx_v8i16_commute:
331; CHECK:       # %bb.0:
332; CHECK-NEXT:    vsetvli zero, a1, e16, m1, ta, ma
333; CHECK-NEXT:    vmul.vx v8, v8, a0, v0.t
334; CHECK-NEXT:    ret
335  %elt.head = insertelement <8 x i16> poison, i16 %b, i32 0
336  %vb = shufflevector <8 x i16> %elt.head, <8 x i16> poison, <8 x i32> zeroinitializer
337  %v = call <8 x i16> @llvm.vp.mul.v8i16(<8 x i16> %vb, <8 x i16> %va, <8 x i1> %m, i32 %evl)
338  ret <8 x i16> %v
339}
340
341define <8 x i16> @vmul_vx_v8i16_unmasked(<8 x i16> %va, i16 %b, i32 zeroext %evl) {
342; CHECK-LABEL: vmul_vx_v8i16_unmasked:
343; CHECK:       # %bb.0:
344; CHECK-NEXT:    vsetvli zero, a1, e16, m1, ta, ma
345; CHECK-NEXT:    vmul.vx v8, v8, a0
346; CHECK-NEXT:    ret
347  %elt.head = insertelement <8 x i16> poison, i16 %b, i32 0
348  %vb = shufflevector <8 x i16> %elt.head, <8 x i16> poison, <8 x i32> zeroinitializer
349  %v = call <8 x i16> @llvm.vp.mul.v8i16(<8 x i16> %va, <8 x i16> %vb, <8 x i1> splat (i1 true), i32 %evl)
350  ret <8 x i16> %v
351}
352
353declare <12 x i16> @llvm.vp.mul.v12i16(<12 x i16>, <12 x i16>, <12 x i1>, i32)
354
355define <12 x i16> @vmul_vv_v12i16(<12 x i16> %va, <12 x i16> %b, <12 x i1> %m, i32 zeroext %evl) {
356; CHECK-LABEL: vmul_vv_v12i16:
357; CHECK:       # %bb.0:
358; CHECK-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
359; CHECK-NEXT:    vmul.vv v8, v8, v10, v0.t
360; CHECK-NEXT:    ret
361  %v = call <12 x i16> @llvm.vp.mul.v12i16(<12 x i16> %va, <12 x i16> %b, <12 x i1> %m, i32 %evl)
362  ret <12 x i16> %v
363}
364
365define <12 x i16> @vmul_vv_v12i16_unmasked(<12 x i16> %va, <12 x i16> %b, i32 zeroext %evl) {
366; CHECK-LABEL: vmul_vv_v12i16_unmasked:
367; CHECK:       # %bb.0:
368; CHECK-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
369; CHECK-NEXT:    vmul.vv v8, v8, v10
370; CHECK-NEXT:    ret
371  %v = call <12 x i16> @llvm.vp.mul.v12i16(<12 x i16> %va, <12 x i16> %b, <12 x i1> splat (i1 true), i32 %evl)
372  ret <12 x i16> %v
373}
374
375define <12 x i16> @vmul_vx_v12i16(<12 x i16> %va, i16 %b, <12 x i1> %m, i32 zeroext %evl) {
376; CHECK-LABEL: vmul_vx_v12i16:
377; CHECK:       # %bb.0:
378; CHECK-NEXT:    vsetvli zero, a1, e16, m2, ta, ma
379; CHECK-NEXT:    vmul.vx v8, v8, a0, v0.t
380; CHECK-NEXT:    ret
381  %elt.head = insertelement <12 x i16> poison, i16 %b, i32 0
382  %vb = shufflevector <12 x i16> %elt.head, <12 x i16> poison, <12 x i32> zeroinitializer
383  %v = call <12 x i16> @llvm.vp.mul.v12i16(<12 x i16> %va, <12 x i16> %vb, <12 x i1> %m, i32 %evl)
384  ret <12 x i16> %v
385}
386
387define <12 x i16> @vmul_vx_v12i16_unmasked(<12 x i16> %va, i16 %b, i32 zeroext %evl) {
388; CHECK-LABEL: vmul_vx_v12i16_unmasked:
389; CHECK:       # %bb.0:
390; CHECK-NEXT:    vsetvli zero, a1, e16, m2, ta, ma
391; CHECK-NEXT:    vmul.vx v8, v8, a0
392; CHECK-NEXT:    ret
393  %elt.head = insertelement <12 x i16> poison, i16 %b, i32 0
394  %vb = shufflevector <12 x i16> %elt.head, <12 x i16> poison, <12 x i32> zeroinitializer
395  %v = call <12 x i16> @llvm.vp.mul.v12i16(<12 x i16> %va, <12 x i16> %vb, <12 x i1> splat (i1 true), i32 %evl)
396  ret <12 x i16> %v
397}
398
399declare <16 x i16> @llvm.vp.mul.v16i16(<16 x i16>, <16 x i16>, <16 x i1>, i32)
400
401define <16 x i16> @vmul_vv_v16i16(<16 x i16> %va, <16 x i16> %b, <16 x i1> %m, i32 zeroext %evl) {
402; CHECK-LABEL: vmul_vv_v16i16:
403; CHECK:       # %bb.0:
404; CHECK-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
405; CHECK-NEXT:    vmul.vv v8, v8, v10, v0.t
406; CHECK-NEXT:    ret
407  %v = call <16 x i16> @llvm.vp.mul.v16i16(<16 x i16> %va, <16 x i16> %b, <16 x i1> %m, i32 %evl)
408  ret <16 x i16> %v
409}
410
411define <16 x i16> @vmul_vv_v16i16_unmasked(<16 x i16> %va, <16 x i16> %b, i32 zeroext %evl) {
412; CHECK-LABEL: vmul_vv_v16i16_unmasked:
413; CHECK:       # %bb.0:
414; CHECK-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
415; CHECK-NEXT:    vmul.vv v8, v8, v10
416; CHECK-NEXT:    ret
417  %v = call <16 x i16> @llvm.vp.mul.v16i16(<16 x i16> %va, <16 x i16> %b, <16 x i1> splat (i1 true), i32 %evl)
418  ret <16 x i16> %v
419}
420
421define <16 x i16> @vmul_vx_v16i16(<16 x i16> %va, i16 %b, <16 x i1> %m, i32 zeroext %evl) {
422; CHECK-LABEL: vmul_vx_v16i16:
423; CHECK:       # %bb.0:
424; CHECK-NEXT:    vsetvli zero, a1, e16, m2, ta, ma
425; CHECK-NEXT:    vmul.vx v8, v8, a0, v0.t
426; CHECK-NEXT:    ret
427  %elt.head = insertelement <16 x i16> poison, i16 %b, i32 0
428  %vb = shufflevector <16 x i16> %elt.head, <16 x i16> poison, <16 x i32> zeroinitializer
429  %v = call <16 x i16> @llvm.vp.mul.v16i16(<16 x i16> %va, <16 x i16> %vb, <16 x i1> %m, i32 %evl)
430  ret <16 x i16> %v
431}
432
433define <16 x i16> @vmul_vx_v16i16_unmasked(<16 x i16> %va, i16 %b, i32 zeroext %evl) {
434; CHECK-LABEL: vmul_vx_v16i16_unmasked:
435; CHECK:       # %bb.0:
436; CHECK-NEXT:    vsetvli zero, a1, e16, m2, ta, ma
437; CHECK-NEXT:    vmul.vx v8, v8, a0
438; CHECK-NEXT:    ret
439  %elt.head = insertelement <16 x i16> poison, i16 %b, i32 0
440  %vb = shufflevector <16 x i16> %elt.head, <16 x i16> poison, <16 x i32> zeroinitializer
441  %v = call <16 x i16> @llvm.vp.mul.v16i16(<16 x i16> %va, <16 x i16> %vb, <16 x i1> splat (i1 true), i32 %evl)
442  ret <16 x i16> %v
443}
444
445declare <2 x i32> @llvm.vp.mul.v2i32(<2 x i32>, <2 x i32>, <2 x i1>, i32)
446
447define <2 x i32> @vmul_vv_v2i32(<2 x i32> %va, <2 x i32> %b, <2 x i1> %m, i32 zeroext %evl) {
448; CHECK-LABEL: vmul_vv_v2i32:
449; CHECK:       # %bb.0:
450; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma
451; CHECK-NEXT:    vmul.vv v8, v8, v9, v0.t
452; CHECK-NEXT:    ret
453  %v = call <2 x i32> @llvm.vp.mul.v2i32(<2 x i32> %va, <2 x i32> %b, <2 x i1> %m, i32 %evl)
454  ret <2 x i32> %v
455}
456
457define <2 x i32> @vmul_vv_v2i32_unmasked(<2 x i32> %va, <2 x i32> %b, i32 zeroext %evl) {
458; CHECK-LABEL: vmul_vv_v2i32_unmasked:
459; CHECK:       # %bb.0:
460; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma
461; CHECK-NEXT:    vmul.vv v8, v8, v9
462; CHECK-NEXT:    ret
463  %v = call <2 x i32> @llvm.vp.mul.v2i32(<2 x i32> %va, <2 x i32> %b, <2 x i1> splat (i1 true), i32 %evl)
464  ret <2 x i32> %v
465}
466
467define <2 x i32> @vmul_vx_v2i32(<2 x i32> %va, i32 %b, <2 x i1> %m, i32 zeroext %evl) {
468; CHECK-LABEL: vmul_vx_v2i32:
469; CHECK:       # %bb.0:
470; CHECK-NEXT:    vsetvli zero, a1, e32, mf2, ta, ma
471; CHECK-NEXT:    vmul.vx v8, v8, a0, v0.t
472; CHECK-NEXT:    ret
473  %elt.head = insertelement <2 x i32> poison, i32 %b, i32 0
474  %vb = shufflevector <2 x i32> %elt.head, <2 x i32> poison, <2 x i32> zeroinitializer
475  %v = call <2 x i32> @llvm.vp.mul.v2i32(<2 x i32> %va, <2 x i32> %vb, <2 x i1> %m, i32 %evl)
476  ret <2 x i32> %v
477}
478
479define <2 x i32> @vmul_vx_v2i32_unmasked(<2 x i32> %va, i32 %b, i32 zeroext %evl) {
480; CHECK-LABEL: vmul_vx_v2i32_unmasked:
481; CHECK:       # %bb.0:
482; CHECK-NEXT:    vsetvli zero, a1, e32, mf2, ta, ma
483; CHECK-NEXT:    vmul.vx v8, v8, a0
484; CHECK-NEXT:    ret
485  %elt.head = insertelement <2 x i32> poison, i32 %b, i32 0
486  %vb = shufflevector <2 x i32> %elt.head, <2 x i32> poison, <2 x i32> zeroinitializer
487  %v = call <2 x i32> @llvm.vp.mul.v2i32(<2 x i32> %va, <2 x i32> %vb, <2 x i1> splat (i1 true), i32 %evl)
488  ret <2 x i32> %v
489}
490
491declare <4 x i32> @llvm.vp.mul.v4i32(<4 x i32>, <4 x i32>, <4 x i1>, i32)
492
493define <4 x i32> @vmul_vv_v4i32(<4 x i32> %va, <4 x i32> %b, <4 x i1> %m, i32 zeroext %evl) {
494; CHECK-LABEL: vmul_vv_v4i32:
495; CHECK:       # %bb.0:
496; CHECK-NEXT:    vsetvli zero, a0, e32, m1, ta, ma
497; CHECK-NEXT:    vmul.vv v8, v8, v9, v0.t
498; CHECK-NEXT:    ret
499  %v = call <4 x i32> @llvm.vp.mul.v4i32(<4 x i32> %va, <4 x i32> %b, <4 x i1> %m, i32 %evl)
500  ret <4 x i32> %v
501}
502
503define <4 x i32> @vmul_vv_v4i32_unmasked(<4 x i32> %va, <4 x i32> %b, i32 zeroext %evl) {
504; CHECK-LABEL: vmul_vv_v4i32_unmasked:
505; CHECK:       # %bb.0:
506; CHECK-NEXT:    vsetvli zero, a0, e32, m1, ta, ma
507; CHECK-NEXT:    vmul.vv v8, v8, v9
508; CHECK-NEXT:    ret
509  %v = call <4 x i32> @llvm.vp.mul.v4i32(<4 x i32> %va, <4 x i32> %b, <4 x i1> splat (i1 true), i32 %evl)
510  ret <4 x i32> %v
511}
512
513define <4 x i32> @vmul_vx_v4i32(<4 x i32> %va, i32 %b, <4 x i1> %m, i32 zeroext %evl) {
514; CHECK-LABEL: vmul_vx_v4i32:
515; CHECK:       # %bb.0:
516; CHECK-NEXT:    vsetvli zero, a1, e32, m1, ta, ma
517; CHECK-NEXT:    vmul.vx v8, v8, a0, v0.t
518; CHECK-NEXT:    ret
519  %elt.head = insertelement <4 x i32> poison, i32 %b, i32 0
520  %vb = shufflevector <4 x i32> %elt.head, <4 x i32> poison, <4 x i32> zeroinitializer
521  %v = call <4 x i32> @llvm.vp.mul.v4i32(<4 x i32> %va, <4 x i32> %vb, <4 x i1> %m, i32 %evl)
522  ret <4 x i32> %v
523}
524
525define <4 x i32> @vmul_vx_v4i32_unmasked(<4 x i32> %va, i32 %b, i32 zeroext %evl) {
526; CHECK-LABEL: vmul_vx_v4i32_unmasked:
527; CHECK:       # %bb.0:
528; CHECK-NEXT:    vsetvli zero, a1, e32, m1, ta, ma
529; CHECK-NEXT:    vmul.vx v8, v8, a0
530; CHECK-NEXT:    ret
531  %elt.head = insertelement <4 x i32> poison, i32 %b, i32 0
532  %vb = shufflevector <4 x i32> %elt.head, <4 x i32> poison, <4 x i32> zeroinitializer
533  %v = call <4 x i32> @llvm.vp.mul.v4i32(<4 x i32> %va, <4 x i32> %vb, <4 x i1> splat (i1 true), i32 %evl)
534  ret <4 x i32> %v
535}
536
537declare <8 x i32> @llvm.vp.mul.v8i32(<8 x i32>, <8 x i32>, <8 x i1>, i32)
538
539define <8 x i32> @vmul_vv_v8i32(<8 x i32> %va, <8 x i32> %b, <8 x i1> %m, i32 zeroext %evl) {
540; CHECK-LABEL: vmul_vv_v8i32:
541; CHECK:       # %bb.0:
542; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma
543; CHECK-NEXT:    vmul.vv v8, v8, v10, v0.t
544; CHECK-NEXT:    ret
545  %v = call <8 x i32> @llvm.vp.mul.v8i32(<8 x i32> %va, <8 x i32> %b, <8 x i1> %m, i32 %evl)
546  ret <8 x i32> %v
547}
548
549define <8 x i32> @vmul_vv_v8i32_unmasked(<8 x i32> %va, <8 x i32> %b, i32 zeroext %evl) {
550; CHECK-LABEL: vmul_vv_v8i32_unmasked:
551; CHECK:       # %bb.0:
552; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma
553; CHECK-NEXT:    vmul.vv v8, v8, v10
554; CHECK-NEXT:    ret
555  %v = call <8 x i32> @llvm.vp.mul.v8i32(<8 x i32> %va, <8 x i32> %b, <8 x i1> splat (i1 true), i32 %evl)
556  ret <8 x i32> %v
557}
558
559define <8 x i32> @vmul_vx_v8i32(<8 x i32> %va, i32 %b, <8 x i1> %m, i32 zeroext %evl) {
560; CHECK-LABEL: vmul_vx_v8i32:
561; CHECK:       # %bb.0:
562; CHECK-NEXT:    vsetvli zero, a1, e32, m2, ta, ma
563; CHECK-NEXT:    vmul.vx v8, v8, a0, v0.t
564; CHECK-NEXT:    ret
565  %elt.head = insertelement <8 x i32> poison, i32 %b, i32 0
566  %vb = shufflevector <8 x i32> %elt.head, <8 x i32> poison, <8 x i32> zeroinitializer
567  %v = call <8 x i32> @llvm.vp.mul.v8i32(<8 x i32> %va, <8 x i32> %vb, <8 x i1> %m, i32 %evl)
568  ret <8 x i32> %v
569}
570
571define <8 x i32> @vmul_vx_v8i32_unmasked(<8 x i32> %va, i32 %b, i32 zeroext %evl) {
572; CHECK-LABEL: vmul_vx_v8i32_unmasked:
573; CHECK:       # %bb.0:
574; CHECK-NEXT:    vsetvli zero, a1, e32, m2, ta, ma
575; CHECK-NEXT:    vmul.vx v8, v8, a0
576; CHECK-NEXT:    ret
577  %elt.head = insertelement <8 x i32> poison, i32 %b, i32 0
578  %vb = shufflevector <8 x i32> %elt.head, <8 x i32> poison, <8 x i32> zeroinitializer
579  %v = call <8 x i32> @llvm.vp.mul.v8i32(<8 x i32> %va, <8 x i32> %vb, <8 x i1> splat (i1 true), i32 %evl)
580  ret <8 x i32> %v
581}
582
583declare <16 x i32> @llvm.vp.mul.v16i32(<16 x i32>, <16 x i32>, <16 x i1>, i32)
584
585define <16 x i32> @vmul_vv_v16i32(<16 x i32> %va, <16 x i32> %b, <16 x i1> %m, i32 zeroext %evl) {
586; CHECK-LABEL: vmul_vv_v16i32:
587; CHECK:       # %bb.0:
588; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma
589; CHECK-NEXT:    vmul.vv v8, v8, v12, v0.t
590; CHECK-NEXT:    ret
591  %v = call <16 x i32> @llvm.vp.mul.v16i32(<16 x i32> %va, <16 x i32> %b, <16 x i1> %m, i32 %evl)
592  ret <16 x i32> %v
593}
594
595define <16 x i32> @vmul_vv_v16i32_unmasked(<16 x i32> %va, <16 x i32> %b, i32 zeroext %evl) {
596; CHECK-LABEL: vmul_vv_v16i32_unmasked:
597; CHECK:       # %bb.0:
598; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma
599; CHECK-NEXT:    vmul.vv v8, v8, v12
600; CHECK-NEXT:    ret
601  %v = call <16 x i32> @llvm.vp.mul.v16i32(<16 x i32> %va, <16 x i32> %b, <16 x i1> splat (i1 true), i32 %evl)
602  ret <16 x i32> %v
603}
604
605define <16 x i32> @vmul_vx_v16i32(<16 x i32> %va, i32 %b, <16 x i1> %m, i32 zeroext %evl) {
606; CHECK-LABEL: vmul_vx_v16i32:
607; CHECK:       # %bb.0:
608; CHECK-NEXT:    vsetvli zero, a1, e32, m4, ta, ma
609; CHECK-NEXT:    vmul.vx v8, v8, a0, v0.t
610; CHECK-NEXT:    ret
611  %elt.head = insertelement <16 x i32> poison, i32 %b, i32 0
612  %vb = shufflevector <16 x i32> %elt.head, <16 x i32> poison, <16 x i32> zeroinitializer
613  %v = call <16 x i32> @llvm.vp.mul.v16i32(<16 x i32> %va, <16 x i32> %vb, <16 x i1> %m, i32 %evl)
614  ret <16 x i32> %v
615}
616
617define <16 x i32> @vmul_vx_v16i32_unmasked(<16 x i32> %va, i32 %b, i32 zeroext %evl) {
618; CHECK-LABEL: vmul_vx_v16i32_unmasked:
619; CHECK:       # %bb.0:
620; CHECK-NEXT:    vsetvli zero, a1, e32, m4, ta, ma
621; CHECK-NEXT:    vmul.vx v8, v8, a0
622; CHECK-NEXT:    ret
623  %elt.head = insertelement <16 x i32> poison, i32 %b, i32 0
624  %vb = shufflevector <16 x i32> %elt.head, <16 x i32> poison, <16 x i32> zeroinitializer
625  %v = call <16 x i32> @llvm.vp.mul.v16i32(<16 x i32> %va, <16 x i32> %vb, <16 x i1> splat (i1 true), i32 %evl)
626  ret <16 x i32> %v
627}
628
629declare <2 x i64> @llvm.vp.mul.v2i64(<2 x i64>, <2 x i64>, <2 x i1>, i32)
630
631define <2 x i64> @vmul_vv_v2i64(<2 x i64> %va, <2 x i64> %b, <2 x i1> %m, i32 zeroext %evl) {
632; CHECK-LABEL: vmul_vv_v2i64:
633; CHECK:       # %bb.0:
634; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma
635; CHECK-NEXT:    vmul.vv v8, v8, v9, v0.t
636; CHECK-NEXT:    ret
637  %v = call <2 x i64> @llvm.vp.mul.v2i64(<2 x i64> %va, <2 x i64> %b, <2 x i1> %m, i32 %evl)
638  ret <2 x i64> %v
639}
640
641define <2 x i64> @vmul_vv_v2i64_unmasked(<2 x i64> %va, <2 x i64> %b, i32 zeroext %evl) {
642; CHECK-LABEL: vmul_vv_v2i64_unmasked:
643; CHECK:       # %bb.0:
644; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma
645; CHECK-NEXT:    vmul.vv v8, v8, v9
646; CHECK-NEXT:    ret
647  %v = call <2 x i64> @llvm.vp.mul.v2i64(<2 x i64> %va, <2 x i64> %b, <2 x i1> splat (i1 true), i32 %evl)
648  ret <2 x i64> %v
649}
650
651define <2 x i64> @vmul_vx_v2i64(<2 x i64> %va, i64 %b, <2 x i1> %m, i32 zeroext %evl) {
652; RV32-LABEL: vmul_vx_v2i64:
653; RV32:       # %bb.0:
654; RV32-NEXT:    addi sp, sp, -16
655; RV32-NEXT:    .cfi_def_cfa_offset 16
656; RV32-NEXT:    sw a0, 8(sp)
657; RV32-NEXT:    sw a1, 12(sp)
658; RV32-NEXT:    addi a0, sp, 8
659; RV32-NEXT:    vsetivli zero, 2, e64, m1, ta, ma
660; RV32-NEXT:    vlse64.v v9, (a0), zero
661; RV32-NEXT:    vsetvli zero, a2, e64, m1, ta, ma
662; RV32-NEXT:    vmul.vv v8, v8, v9, v0.t
663; RV32-NEXT:    addi sp, sp, 16
664; RV32-NEXT:    .cfi_def_cfa_offset 0
665; RV32-NEXT:    ret
666;
667; RV64-LABEL: vmul_vx_v2i64:
668; RV64:       # %bb.0:
669; RV64-NEXT:    vsetvli zero, a1, e64, m1, ta, ma
670; RV64-NEXT:    vmul.vx v8, v8, a0, v0.t
671; RV64-NEXT:    ret
672  %elt.head = insertelement <2 x i64> poison, i64 %b, i32 0
673  %vb = shufflevector <2 x i64> %elt.head, <2 x i64> poison, <2 x i32> zeroinitializer
674  %v = call <2 x i64> @llvm.vp.mul.v2i64(<2 x i64> %va, <2 x i64> %vb, <2 x i1> %m, i32 %evl)
675  ret <2 x i64> %v
676}
677
678define <2 x i64> @vmul_vx_v2i64_unmasked(<2 x i64> %va, i64 %b, i32 zeroext %evl) {
679; RV32-LABEL: vmul_vx_v2i64_unmasked:
680; RV32:       # %bb.0:
681; RV32-NEXT:    addi sp, sp, -16
682; RV32-NEXT:    .cfi_def_cfa_offset 16
683; RV32-NEXT:    sw a0, 8(sp)
684; RV32-NEXT:    sw a1, 12(sp)
685; RV32-NEXT:    addi a0, sp, 8
686; RV32-NEXT:    vsetivli zero, 2, e64, m1, ta, ma
687; RV32-NEXT:    vlse64.v v9, (a0), zero
688; RV32-NEXT:    vsetvli zero, a2, e64, m1, ta, ma
689; RV32-NEXT:    vmul.vv v8, v8, v9
690; RV32-NEXT:    addi sp, sp, 16
691; RV32-NEXT:    .cfi_def_cfa_offset 0
692; RV32-NEXT:    ret
693;
694; RV64-LABEL: vmul_vx_v2i64_unmasked:
695; RV64:       # %bb.0:
696; RV64-NEXT:    vsetvli zero, a1, e64, m1, ta, ma
697; RV64-NEXT:    vmul.vx v8, v8, a0
698; RV64-NEXT:    ret
699  %elt.head = insertelement <2 x i64> poison, i64 %b, i32 0
700  %vb = shufflevector <2 x i64> %elt.head, <2 x i64> poison, <2 x i32> zeroinitializer
701  %v = call <2 x i64> @llvm.vp.mul.v2i64(<2 x i64> %va, <2 x i64> %vb, <2 x i1> splat (i1 true), i32 %evl)
702  ret <2 x i64> %v
703}
704
705declare <4 x i64> @llvm.vp.mul.v4i64(<4 x i64>, <4 x i64>, <4 x i1>, i32)
706
707define <4 x i64> @vmul_vv_v4i64(<4 x i64> %va, <4 x i64> %b, <4 x i1> %m, i32 zeroext %evl) {
708; CHECK-LABEL: vmul_vv_v4i64:
709; CHECK:       # %bb.0:
710; CHECK-NEXT:    vsetvli zero, a0, e64, m2, ta, ma
711; CHECK-NEXT:    vmul.vv v8, v8, v10, v0.t
712; CHECK-NEXT:    ret
713  %v = call <4 x i64> @llvm.vp.mul.v4i64(<4 x i64> %va, <4 x i64> %b, <4 x i1> %m, i32 %evl)
714  ret <4 x i64> %v
715}
716
717define <4 x i64> @vmul_vv_v4i64_unmasked(<4 x i64> %va, <4 x i64> %b, i32 zeroext %evl) {
718; CHECK-LABEL: vmul_vv_v4i64_unmasked:
719; CHECK:       # %bb.0:
720; CHECK-NEXT:    vsetvli zero, a0, e64, m2, ta, ma
721; CHECK-NEXT:    vmul.vv v8, v8, v10
722; CHECK-NEXT:    ret
723  %v = call <4 x i64> @llvm.vp.mul.v4i64(<4 x i64> %va, <4 x i64> %b, <4 x i1> splat (i1 true), i32 %evl)
724  ret <4 x i64> %v
725}
726
727define <4 x i64> @vmul_vx_v4i64(<4 x i64> %va, i64 %b, <4 x i1> %m, i32 zeroext %evl) {
728; RV32-LABEL: vmul_vx_v4i64:
729; RV32:       # %bb.0:
730; RV32-NEXT:    addi sp, sp, -16
731; RV32-NEXT:    .cfi_def_cfa_offset 16
732; RV32-NEXT:    sw a0, 8(sp)
733; RV32-NEXT:    sw a1, 12(sp)
734; RV32-NEXT:    addi a0, sp, 8
735; RV32-NEXT:    vsetivli zero, 4, e64, m2, ta, ma
736; RV32-NEXT:    vlse64.v v10, (a0), zero
737; RV32-NEXT:    vsetvli zero, a2, e64, m2, ta, ma
738; RV32-NEXT:    vmul.vv v8, v8, v10, v0.t
739; RV32-NEXT:    addi sp, sp, 16
740; RV32-NEXT:    .cfi_def_cfa_offset 0
741; RV32-NEXT:    ret
742;
743; RV64-LABEL: vmul_vx_v4i64:
744; RV64:       # %bb.0:
745; RV64-NEXT:    vsetvli zero, a1, e64, m2, ta, ma
746; RV64-NEXT:    vmul.vx v8, v8, a0, v0.t
747; RV64-NEXT:    ret
748  %elt.head = insertelement <4 x i64> poison, i64 %b, i32 0
749  %vb = shufflevector <4 x i64> %elt.head, <4 x i64> poison, <4 x i32> zeroinitializer
750  %v = call <4 x i64> @llvm.vp.mul.v4i64(<4 x i64> %va, <4 x i64> %vb, <4 x i1> %m, i32 %evl)
751  ret <4 x i64> %v
752}
753
754define <4 x i64> @vmul_vx_v4i64_unmasked(<4 x i64> %va, i64 %b, i32 zeroext %evl) {
755; RV32-LABEL: vmul_vx_v4i64_unmasked:
756; RV32:       # %bb.0:
757; RV32-NEXT:    addi sp, sp, -16
758; RV32-NEXT:    .cfi_def_cfa_offset 16
759; RV32-NEXT:    sw a0, 8(sp)
760; RV32-NEXT:    sw a1, 12(sp)
761; RV32-NEXT:    addi a0, sp, 8
762; RV32-NEXT:    vsetivli zero, 4, e64, m2, ta, ma
763; RV32-NEXT:    vlse64.v v10, (a0), zero
764; RV32-NEXT:    vsetvli zero, a2, e64, m2, ta, ma
765; RV32-NEXT:    vmul.vv v8, v8, v10
766; RV32-NEXT:    addi sp, sp, 16
767; RV32-NEXT:    .cfi_def_cfa_offset 0
768; RV32-NEXT:    ret
769;
770; RV64-LABEL: vmul_vx_v4i64_unmasked:
771; RV64:       # %bb.0:
772; RV64-NEXT:    vsetvli zero, a1, e64, m2, ta, ma
773; RV64-NEXT:    vmul.vx v8, v8, a0
774; RV64-NEXT:    ret
775  %elt.head = insertelement <4 x i64> poison, i64 %b, i32 0
776  %vb = shufflevector <4 x i64> %elt.head, <4 x i64> poison, <4 x i32> zeroinitializer
777  %v = call <4 x i64> @llvm.vp.mul.v4i64(<4 x i64> %va, <4 x i64> %vb, <4 x i1> splat (i1 true), i32 %evl)
778  ret <4 x i64> %v
779}
780
781declare <8 x i64> @llvm.vp.mul.v8i64(<8 x i64>, <8 x i64>, <8 x i1>, i32)
782
783define <8 x i64> @vmul_vv_v8i64(<8 x i64> %va, <8 x i64> %b, <8 x i1> %m, i32 zeroext %evl) {
784; CHECK-LABEL: vmul_vv_v8i64:
785; CHECK:       # %bb.0:
786; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
787; CHECK-NEXT:    vmul.vv v8, v8, v12, v0.t
788; CHECK-NEXT:    ret
789  %v = call <8 x i64> @llvm.vp.mul.v8i64(<8 x i64> %va, <8 x i64> %b, <8 x i1> %m, i32 %evl)
790  ret <8 x i64> %v
791}
792
793define <8 x i64> @vmul_vv_v8i64_unmasked(<8 x i64> %va, <8 x i64> %b, i32 zeroext %evl) {
794; CHECK-LABEL: vmul_vv_v8i64_unmasked:
795; CHECK:       # %bb.0:
796; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
797; CHECK-NEXT:    vmul.vv v8, v8, v12
798; CHECK-NEXT:    ret
799  %v = call <8 x i64> @llvm.vp.mul.v8i64(<8 x i64> %va, <8 x i64> %b, <8 x i1> splat (i1 true), i32 %evl)
800  ret <8 x i64> %v
801}
802
803define <8 x i64> @vmul_vx_v8i64(<8 x i64> %va, i64 %b, <8 x i1> %m, i32 zeroext %evl) {
804; RV32-LABEL: vmul_vx_v8i64:
805; RV32:       # %bb.0:
806; RV32-NEXT:    addi sp, sp, -16
807; RV32-NEXT:    .cfi_def_cfa_offset 16
808; RV32-NEXT:    sw a0, 8(sp)
809; RV32-NEXT:    sw a1, 12(sp)
810; RV32-NEXT:    addi a0, sp, 8
811; RV32-NEXT:    vsetivli zero, 8, e64, m4, ta, ma
812; RV32-NEXT:    vlse64.v v12, (a0), zero
813; RV32-NEXT:    vsetvli zero, a2, e64, m4, ta, ma
814; RV32-NEXT:    vmul.vv v8, v8, v12, v0.t
815; RV32-NEXT:    addi sp, sp, 16
816; RV32-NEXT:    .cfi_def_cfa_offset 0
817; RV32-NEXT:    ret
818;
819; RV64-LABEL: vmul_vx_v8i64:
820; RV64:       # %bb.0:
821; RV64-NEXT:    vsetvli zero, a1, e64, m4, ta, ma
822; RV64-NEXT:    vmul.vx v8, v8, a0, v0.t
823; RV64-NEXT:    ret
824  %elt.head = insertelement <8 x i64> poison, i64 %b, i32 0
825  %vb = shufflevector <8 x i64> %elt.head, <8 x i64> poison, <8 x i32> zeroinitializer
826  %v = call <8 x i64> @llvm.vp.mul.v8i64(<8 x i64> %va, <8 x i64> %vb, <8 x i1> %m, i32 %evl)
827  ret <8 x i64> %v
828}
829
830define <8 x i64> @vmul_vx_v8i64_unmasked(<8 x i64> %va, i64 %b, i32 zeroext %evl) {
831; RV32-LABEL: vmul_vx_v8i64_unmasked:
832; RV32:       # %bb.0:
833; RV32-NEXT:    addi sp, sp, -16
834; RV32-NEXT:    .cfi_def_cfa_offset 16
835; RV32-NEXT:    sw a0, 8(sp)
836; RV32-NEXT:    sw a1, 12(sp)
837; RV32-NEXT:    addi a0, sp, 8
838; RV32-NEXT:    vsetivli zero, 8, e64, m4, ta, ma
839; RV32-NEXT:    vlse64.v v12, (a0), zero
840; RV32-NEXT:    vsetvli zero, a2, e64, m4, ta, ma
841; RV32-NEXT:    vmul.vv v8, v8, v12
842; RV32-NEXT:    addi sp, sp, 16
843; RV32-NEXT:    .cfi_def_cfa_offset 0
844; RV32-NEXT:    ret
845;
846; RV64-LABEL: vmul_vx_v8i64_unmasked:
847; RV64:       # %bb.0:
848; RV64-NEXT:    vsetvli zero, a1, e64, m4, ta, ma
849; RV64-NEXT:    vmul.vx v8, v8, a0
850; RV64-NEXT:    ret
851  %elt.head = insertelement <8 x i64> poison, i64 %b, i32 0
852  %vb = shufflevector <8 x i64> %elt.head, <8 x i64> poison, <8 x i32> zeroinitializer
853  %v = call <8 x i64> @llvm.vp.mul.v8i64(<8 x i64> %va, <8 x i64> %vb, <8 x i1> splat (i1 true), i32 %evl)
854  ret <8 x i64> %v
855}
856
857declare <16 x i64> @llvm.vp.mul.v16i64(<16 x i64>, <16 x i64>, <16 x i1>, i32)
858
859define <16 x i64> @vmul_vv_v16i64(<16 x i64> %va, <16 x i64> %b, <16 x i1> %m, i32 zeroext %evl) {
860; CHECK-LABEL: vmul_vv_v16i64:
861; CHECK:       # %bb.0:
862; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma
863; CHECK-NEXT:    vmul.vv v8, v8, v16, v0.t
864; CHECK-NEXT:    ret
865  %v = call <16 x i64> @llvm.vp.mul.v16i64(<16 x i64> %va, <16 x i64> %b, <16 x i1> %m, i32 %evl)
866  ret <16 x i64> %v
867}
868
869define <16 x i64> @vmul_vv_v16i64_unmasked(<16 x i64> %va, <16 x i64> %b, i32 zeroext %evl) {
870; CHECK-LABEL: vmul_vv_v16i64_unmasked:
871; CHECK:       # %bb.0:
872; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma
873; CHECK-NEXT:    vmul.vv v8, v8, v16
874; CHECK-NEXT:    ret
875  %v = call <16 x i64> @llvm.vp.mul.v16i64(<16 x i64> %va, <16 x i64> %b, <16 x i1> splat (i1 true), i32 %evl)
876  ret <16 x i64> %v
877}
878
879define <16 x i64> @vmul_vx_v16i64(<16 x i64> %va, i64 %b, <16 x i1> %m, i32 zeroext %evl) {
880; RV32-LABEL: vmul_vx_v16i64:
881; RV32:       # %bb.0:
882; RV32-NEXT:    addi sp, sp, -16
883; RV32-NEXT:    .cfi_def_cfa_offset 16
884; RV32-NEXT:    sw a0, 8(sp)
885; RV32-NEXT:    sw a1, 12(sp)
886; RV32-NEXT:    addi a0, sp, 8
887; RV32-NEXT:    vsetivli zero, 16, e64, m8, ta, ma
888; RV32-NEXT:    vlse64.v v16, (a0), zero
889; RV32-NEXT:    vsetvli zero, a2, e64, m8, ta, ma
890; RV32-NEXT:    vmul.vv v8, v8, v16, v0.t
891; RV32-NEXT:    addi sp, sp, 16
892; RV32-NEXT:    .cfi_def_cfa_offset 0
893; RV32-NEXT:    ret
894;
895; RV64-LABEL: vmul_vx_v16i64:
896; RV64:       # %bb.0:
897; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma
898; RV64-NEXT:    vmul.vx v8, v8, a0, v0.t
899; RV64-NEXT:    ret
900  %elt.head = insertelement <16 x i64> poison, i64 %b, i32 0
901  %vb = shufflevector <16 x i64> %elt.head, <16 x i64> poison, <16 x i32> zeroinitializer
902  %v = call <16 x i64> @llvm.vp.mul.v16i64(<16 x i64> %va, <16 x i64> %vb, <16 x i1> %m, i32 %evl)
903  ret <16 x i64> %v
904}
905
906define <16 x i64> @vmul_vx_v16i64_unmasked(<16 x i64> %va, i64 %b, i32 zeroext %evl) {
907; RV32-LABEL: vmul_vx_v16i64_unmasked:
908; RV32:       # %bb.0:
909; RV32-NEXT:    addi sp, sp, -16
910; RV32-NEXT:    .cfi_def_cfa_offset 16
911; RV32-NEXT:    sw a0, 8(sp)
912; RV32-NEXT:    sw a1, 12(sp)
913; RV32-NEXT:    addi a0, sp, 8
914; RV32-NEXT:    vsetivli zero, 16, e64, m8, ta, ma
915; RV32-NEXT:    vlse64.v v16, (a0), zero
916; RV32-NEXT:    vsetvli zero, a2, e64, m8, ta, ma
917; RV32-NEXT:    vmul.vv v8, v8, v16
918; RV32-NEXT:    addi sp, sp, 16
919; RV32-NEXT:    .cfi_def_cfa_offset 0
920; RV32-NEXT:    ret
921;
922; RV64-LABEL: vmul_vx_v16i64_unmasked:
923; RV64:       # %bb.0:
924; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma
925; RV64-NEXT:    vmul.vx v8, v8, a0
926; RV64-NEXT:    ret
927  %elt.head = insertelement <16 x i64> poison, i64 %b, i32 0
928  %vb = shufflevector <16 x i64> %elt.head, <16 x i64> poison, <16 x i32> zeroinitializer
929  %v = call <16 x i64> @llvm.vp.mul.v16i64(<16 x i64> %va, <16 x i64> %vb, <16 x i1> splat (i1 true), i32 %evl)
930  ret <16 x i64> %v
931}
932
933
934define <8 x i64> @vmul_vv_undef_v8i64(<8 x i64> %va, <8 x i1> %m, i32 zeroext %evl) {
935; RV32-LABEL: vmul_vv_undef_v8i64:
936; RV32:       # %bb.0:
937; RV32-NEXT:    vsetvli a0, zero, e64, m4, ta, ma
938; RV32-NEXT:    vmv.v.i v8, 0
939; RV32-NEXT:    ret
940;
941; RV64-LABEL: vmul_vv_undef_v8i64:
942; RV64:       # %bb.0:
943; RV64-NEXT:    vsetivli zero, 8, e64, m4, ta, ma
944; RV64-NEXT:    vmv.v.i v8, 0
945; RV64-NEXT:    ret
946  %v = call <8 x i64> @llvm.vp.mul.v8i64(<8 x i64> %va, <8 x i64> undef, <8 x i1> %m, i32 %evl)
947  ret <8 x i64> %v
948}
949
950define <8 x i64> @vmul_vx_undef_v8i64_unmasked(<8 x i64> %va, i32 zeroext %evl) {
951; RV32-LABEL: vmul_vx_undef_v8i64_unmasked:
952; RV32:       # %bb.0:
953; RV32-NEXT:    vsetvli a0, zero, e64, m4, ta, ma
954; RV32-NEXT:    vmv.v.i v8, 0
955; RV32-NEXT:    ret
956;
957; RV64-LABEL: vmul_vx_undef_v8i64_unmasked:
958; RV64:       # %bb.0:
959; RV64-NEXT:    vsetivli zero, 8, e64, m4, ta, ma
960; RV64-NEXT:    vmv.v.i v8, 0
961; RV64-NEXT:    ret
962  %head = insertelement <8 x i1> poison, i1 true, i32 0
963  %m = shufflevector <8 x i1> %head, <8 x i1> poison, <8 x i32> zeroinitializer
964  %v = call <8 x i64> @llvm.vp.mul.v8i64(<8 x i64> %va, <8 x i64> undef, <8 x i1> %m, i32 %evl)
965  ret <8 x i64> %v
966}
967
968define <8 x i64> @vmul_vx_zero_v8i64(<8 x i64> %va, <8 x i1> %m, i32 zeroext %evl) {
969; RV32-LABEL: vmul_vx_zero_v8i64:
970; RV32:       # %bb.0:
971; RV32-NEXT:    vsetvli a0, zero, e64, m4, ta, ma
972; RV32-NEXT:    vmv.v.i v8, 0
973; RV32-NEXT:    ret
974;
975; RV64-LABEL: vmul_vx_zero_v8i64:
976; RV64:       # %bb.0:
977; RV64-NEXT:    vsetivli zero, 8, e64, m4, ta, ma
978; RV64-NEXT:    vmv.v.i v8, 0
979; RV64-NEXT:    ret
980  %elt.head = insertelement <8 x i64> poison, i64 0, i32 0
981  %vb = shufflevector <8 x i64> %elt.head, <8 x i64> poison, <8 x i32> zeroinitializer
982  %v = call <8 x i64> @llvm.vp.mul.v8i64(<8 x i64> %va, <8 x i64> %vb, <8 x i1> %m, i32 %evl)
983  ret <8 x i64> %v
984}
985
986define <8 x i64> @vmul_vx_zero_v8i64_unmasked(<8 x i64> %va, i32 zeroext %evl) {
987; RV32-LABEL: vmul_vx_zero_v8i64_unmasked:
988; RV32:       # %bb.0:
989; RV32-NEXT:    vsetvli a0, zero, e64, m4, ta, ma
990; RV32-NEXT:    vmv.v.i v8, 0
991; RV32-NEXT:    ret
992;
993; RV64-LABEL: vmul_vx_zero_v8i64_unmasked:
994; RV64:       # %bb.0:
995; RV64-NEXT:    vsetivli zero, 8, e64, m4, ta, ma
996; RV64-NEXT:    vmv.v.i v8, 0
997; RV64-NEXT:    ret
998  %elt.head = insertelement <8 x i64> poison, i64 0, i32 0
999  %vb = shufflevector <8 x i64> %elt.head, <8 x i64> poison, <8 x i32> zeroinitializer
1000  %head = insertelement <8 x i1> poison, i1 true, i32 0
1001  %m = shufflevector <8 x i1> %head, <8 x i1> poison, <8 x i32> zeroinitializer
1002  %v = call <8 x i64> @llvm.vp.mul.v8i64(<8 x i64> %va, <8 x i64> %vb, <8 x i1> %m, i32 %evl)
1003  ret <8 x i64> %v
1004}
1005
1006define <8 x i64> @vmul_vx_one_v8i64(<8 x i64> %va, <8 x i1> %m, i32 zeroext %evl) {
1007; CHECK-LABEL: vmul_vx_one_v8i64:
1008; CHECK:       # %bb.0:
1009; CHECK-NEXT:    ret
1010  %elt.head = insertelement <8 x i64> poison, i64 1, i32 0
1011  %vb = shufflevector <8 x i64> %elt.head, <8 x i64> poison, <8 x i32> zeroinitializer
1012  %v = call <8 x i64> @llvm.vp.mul.v8i64(<8 x i64> %va, <8 x i64> %vb, <8 x i1> %m, i32 %evl)
1013  ret <8 x i64> %v
1014}
1015
1016define <8 x i64> @vmul_vx_one_v8i64_unmasked(<8 x i64> %va, i32 zeroext %evl) {
1017; CHECK-LABEL: vmul_vx_one_v8i64_unmasked:
1018; CHECK:       # %bb.0:
1019; CHECK-NEXT:    ret
1020  %elt.head = insertelement <8 x i64> poison, i64 1, i32 0
1021  %vb = shufflevector <8 x i64> %elt.head, <8 x i64> poison, <8 x i32> zeroinitializer
1022  %head = insertelement <8 x i1> poison, i1 true, i32 0
1023  %m = shufflevector <8 x i1> %head, <8 x i1> poison, <8 x i32> zeroinitializer
1024  %v = call <8 x i64> @llvm.vp.mul.v8i64(<8 x i64> %va, <8 x i64> %vb, <8 x i1> %m, i32 %evl)
1025  ret <8 x i64> %v
1026}
1027
1028define <8 x i64> @vmul_vx_negone_v8i64(<8 x i64> %va, <8 x i1> %m, i32 zeroext %evl) {
1029; CHECK-LABEL: vmul_vx_negone_v8i64:
1030; CHECK:       # %bb.0:
1031; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
1032; CHECK-NEXT:    vrsub.vi v8, v8, 0, v0.t
1033; CHECK-NEXT:    ret
1034  %elt.head = insertelement <8 x i64> poison, i64 -1, i32 0
1035  %vb = shufflevector <8 x i64> %elt.head, <8 x i64> poison, <8 x i32> zeroinitializer
1036  %v = call <8 x i64> @llvm.vp.mul.v8i64(<8 x i64> %va, <8 x i64> %vb, <8 x i1> %m, i32 %evl)
1037  ret <8 x i64> %v
1038}
1039
1040define <8 x i64> @vmul_vx_negone_v8i64_unmasked(<8 x i64> %va, i32 zeroext %evl) {
1041; CHECK-LABEL: vmul_vx_negone_v8i64_unmasked:
1042; CHECK:       # %bb.0:
1043; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
1044; CHECK-NEXT:    vrsub.vi v8, v8, 0
1045; CHECK-NEXT:    ret
1046  %elt.head = insertelement <8 x i64> poison, i64 -1, i32 0
1047  %vb = shufflevector <8 x i64> %elt.head, <8 x i64> poison, <8 x i32> zeroinitializer
1048  %head = insertelement <8 x i1> poison, i1 true, i32 0
1049  %m = shufflevector <8 x i1> %head, <8 x i1> poison, <8 x i32> zeroinitializer
1050  %v = call <8 x i64> @llvm.vp.mul.v8i64(<8 x i64> %va, <8 x i64> %vb, <8 x i1> %m, i32 %evl)
1051  ret <8 x i64> %v
1052}
1053
1054define <8 x i64> @vmul_vx_pow2_v8i64(<8 x i64> %va, <8 x i1> %m, i32 zeroext %evl) {
1055; CHECK-LABEL: vmul_vx_pow2_v8i64:
1056; CHECK:       # %bb.0:
1057; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
1058; CHECK-NEXT:    vsll.vi v8, v8, 6, v0.t
1059; CHECK-NEXT:    ret
1060  %elt.head = insertelement <8 x i64> poison, i64 64, i32 0
1061  %vb = shufflevector <8 x i64> %elt.head, <8 x i64> poison, <8 x i32> zeroinitializer
1062  %v = call <8 x i64> @llvm.vp.mul.v8i64(<8 x i64> %va, <8 x i64> %vb, <8 x i1> %m, i32 %evl)
1063  ret <8 x i64> %v
1064}
1065
1066define <8 x i64> @vmul_vx_pow2_v8i64_unmasked(<8 x i64> %va, i32 zeroext %evl) {
1067; CHECK-LABEL: vmul_vx_pow2_v8i64_unmasked:
1068; CHECK:       # %bb.0:
1069; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
1070; CHECK-NEXT:    vsll.vi v8, v8, 6
1071; CHECK-NEXT:    ret
1072  %elt.head = insertelement <8 x i64> poison, i64 64, i32 0
1073  %vb = shufflevector <8 x i64> %elt.head, <8 x i64> poison, <8 x i32> zeroinitializer
1074  %head = insertelement <8 x i1> poison, i1 true, i32 0
1075  %m = shufflevector <8 x i1> %head, <8 x i1> poison, <8 x i32> zeroinitializer
1076  %v = call <8 x i64> @llvm.vp.mul.v8i64(<8 x i64> %va, <8 x i64> %vb, <8 x i1> %m, i32 %evl)
1077  ret <8 x i64> %v
1078}
1079
1080define <8 x i64> @vmul_vx_negpow2_v8i64(<8 x i64> %va, <8 x i1> %m, i32 zeroext %evl) {
1081; CHECK-LABEL: vmul_vx_negpow2_v8i64:
1082; CHECK:       # %bb.0:
1083; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
1084; CHECK-NEXT:    vsll.vi v8, v8, 6, v0.t
1085; CHECK-NEXT:    vrsub.vi v8, v8, 0, v0.t
1086; CHECK-NEXT:    ret
1087  %elt.head = insertelement <8 x i64> poison, i64 -64, i32 0
1088  %vb = shufflevector <8 x i64> %elt.head, <8 x i64> poison, <8 x i32> zeroinitializer
1089  %v = call <8 x i64> @llvm.vp.mul.v8i64(<8 x i64> %va, <8 x i64> %vb, <8 x i1> %m, i32 %evl)
1090  ret <8 x i64> %v
1091}
1092
1093define <8 x i64> @vmul_vx_negpow2_v8i64_unmasked(<8 x i64> %va, i32 zeroext %evl) {
1094; CHECK-LABEL: vmul_vx_negpow2_v8i64_unmasked:
1095; CHECK:       # %bb.0:
1096; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
1097; CHECK-NEXT:    vsll.vi v8, v8, 6
1098; CHECK-NEXT:    vrsub.vi v8, v8, 0
1099; CHECK-NEXT:    ret
1100  %elt.head = insertelement <8 x i64> poison, i64 -64, i32 0
1101  %vb = shufflevector <8 x i64> %elt.head, <8 x i64> poison, <8 x i32> zeroinitializer
1102  %head = insertelement <8 x i1> poison, i1 true, i32 0
1103  %m = shufflevector <8 x i1> %head, <8 x i1> poison, <8 x i32> zeroinitializer
1104  %v = call <8 x i64> @llvm.vp.mul.v8i64(<8 x i64> %va, <8 x i64> %vb, <8 x i1> %m, i32 %evl)
1105  ret <8 x i64> %v
1106}
1107
1108declare <8 x i64> @llvm.vp.shl.v8i64(<8 x i64>, <8 x i64>, <8 x i1>, i32)
1109
1110define <8 x i64> @vmul_vshl_vx_v8i64(<8 x i64> %va, <8 x i1> %m, i32 zeroext %evl) {
1111; CHECK-LABEL: vmul_vshl_vx_v8i64:
1112; CHECK:       # %bb.0:
1113; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
1114; CHECK-NEXT:    vsll.vi v8, v8, 3, v0.t
1115; CHECK-NEXT:    li a0, 7
1116; CHECK-NEXT:    vmul.vx v8, v8, a0, v0.t
1117; CHECK-NEXT:    ret
1118  %elt.head1 = insertelement <8 x i64> poison, i64 3, i32 0
1119  %vb = shufflevector <8 x i64> %elt.head1, <8 x i64> poison, <8 x i32> zeroinitializer
1120  %elt.head2 = insertelement <8 x i64> poison, i64 7, i32 0
1121  %vc = shufflevector <8 x i64> %elt.head2, <8 x i64> poison, <8 x i32> zeroinitializer
1122  %vshl = call <8 x i64> @llvm.vp.shl.v8i64(<8 x i64> %va, <8 x i64> %vb, <8 x i1> %m, i32 %evl)
1123  %v = call <8 x i64> @llvm.vp.mul.v8i64(<8 x i64> %vshl, <8 x i64> %vc, <8 x i1> %m, i32 %evl)
1124  ret <8 x i64> %v
1125}
1126
1127define <8 x i64> @vmul_vshl_vx_v8i64_unmasked(<8 x i64> %va, i32 zeroext %evl) {
1128; CHECK-LABEL: vmul_vshl_vx_v8i64_unmasked:
1129; CHECK:       # %bb.0:
1130; CHECK-NEXT:    li a0, 56
1131; CHECK-NEXT:    vsetivli zero, 8, e64, m4, ta, ma
1132; CHECK-NEXT:    vmul.vx v8, v8, a0
1133; CHECK-NEXT:    ret
1134  %head = insertelement <8 x i1> poison, i1 true, i32 0
1135  %m = shufflevector <8 x i1> %head, <8 x i1> poison, <8 x i32> zeroinitializer
1136  %elt.head1 = insertelement <8 x i64> poison, i64 3, i32 0
1137  %vb = shufflevector <8 x i64> %elt.head1, <8 x i64> poison, <8 x i32> zeroinitializer
1138  %elt.head2 = insertelement <8 x i64> poison, i64 7, i32 0
1139  %vc = shufflevector <8 x i64> %elt.head2, <8 x i64> poison, <8 x i32> zeroinitializer
1140  %vshl = call <8 x i64> @llvm.vp.shl.v8i64(<8 x i64> %va, <8 x i64> %vb, <8 x i1> %m, i32 %evl)
1141  %v = call <8 x i64> @llvm.vp.mul.v8i64(<8 x i64> %vshl, <8 x i64> %vc, <8 x i1> %m, i32 %evl)
1142  ret <8 x i64> %v
1143}
1144
1145define <8 x i64> @vmul_vshl_vv_v8i64(<8 x i64> %va, <8 x i64> %vb, <8 x i1> %m, i32 zeroext %evl) {
1146; CHECK-LABEL: vmul_vshl_vv_v8i64:
1147; CHECK:       # %bb.0:
1148; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
1149; CHECK-NEXT:    vsll.vi v8, v8, 7, v0.t
1150; CHECK-NEXT:    vmul.vv v8, v8, v12, v0.t
1151; CHECK-NEXT:    ret
1152  %elt.head = insertelement <8 x i64> poison, i64 7, i32 0
1153  %vc = shufflevector <8 x i64> %elt.head, <8 x i64> poison, <8 x i32> zeroinitializer
1154  %vshl = call <8 x i64> @llvm.vp.shl.v8i64(<8 x i64> %va, <8 x i64> %vc, <8 x i1> %m, i32 %evl)
1155  %v = call <8 x i64> @llvm.vp.mul.v8i64(<8 x i64> %vshl, <8 x i64> %vb, <8 x i1> %m, i32 %evl)
1156  ret <8 x i64> %v
1157}
1158
1159define <8 x i64> @vmul_vshl_vv_v8i64_unmasked(<8 x i64> %va, <8 x i64> %vb, i32 zeroext %evl) {
1160; CHECK-LABEL: vmul_vshl_vv_v8i64_unmasked:
1161; CHECK:       # %bb.0:
1162; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
1163; CHECK-NEXT:    vmul.vv v8, v8, v12
1164; CHECK-NEXT:    vsll.vi v8, v8, 7
1165; CHECK-NEXT:    ret
1166  %head = insertelement <8 x i1> poison, i1 true, i32 0
1167  %m = shufflevector <8 x i1> %head, <8 x i1> poison, <8 x i32> zeroinitializer
1168  %elt.head = insertelement <8 x i64> poison, i64 7, i32 0
1169  %vc = shufflevector <8 x i64> %elt.head, <8 x i64> poison, <8 x i32> zeroinitializer
1170  %vshl = call <8 x i64> @llvm.vp.shl.v8i64(<8 x i64> %va, <8 x i64> %vc, <8 x i1> %m, i32 %evl)
1171  %v = call <8 x i64> @llvm.vp.mul.v8i64(<8 x i64> %vshl, <8 x i64> %vb, <8 x i1> %m, i32 %evl)
1172  ret <8 x i64> %v
1173}
1174
1175declare <8 x i64> @llvm.vp.add.v8i64(<8 x i64>, <8 x i64>, <8 x i1>, i32)
1176
1177define <8 x i64> @vmul_vadd_vx_v8i64(<8 x i64> %va, <8 x i1> %m, i32 zeroext %evl) {
1178; CHECK-LABEL: vmul_vadd_vx_v8i64:
1179; CHECK:       # %bb.0:
1180; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
1181; CHECK-NEXT:    vadd.vi v8, v8, 3, v0.t
1182; CHECK-NEXT:    li a0, 7
1183; CHECK-NEXT:    vmul.vx v8, v8, a0, v0.t
1184; CHECK-NEXT:    ret
1185  %elt.head1 = insertelement <8 x i64> poison, i64 3, i32 0
1186  %vb = shufflevector <8 x i64> %elt.head1, <8 x i64> poison, <8 x i32> zeroinitializer
1187  %elt.head2 = insertelement <8 x i64> poison, i64 7, i32 0
1188  %vc = shufflevector <8 x i64> %elt.head2, <8 x i64> poison, <8 x i32> zeroinitializer
1189  %vadd = call <8 x i64> @llvm.vp.add.v8i64(<8 x i64> %va, <8 x i64> %vb, <8 x i1> %m, i32 %evl)
1190  %v = call <8 x i64> @llvm.vp.mul.v8i64(<8 x i64> %vadd, <8 x i64> %vc, <8 x i1> %m, i32 %evl)
1191  ret <8 x i64> %v
1192}
1193
1194define <8 x i64> @vmul_vadd_vx_v8i64_unmasked(<8 x i64> %va, i32 zeroext %evl) {
1195; CHECK-LABEL: vmul_vadd_vx_v8i64_unmasked:
1196; CHECK:       # %bb.0:
1197; CHECK-NEXT:    li a1, 21
1198; CHECK-NEXT:    vsetivli zero, 8, e64, m4, ta, ma
1199; CHECK-NEXT:    vmv.v.x v12, a1
1200; CHECK-NEXT:    li a1, 7
1201; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
1202; CHECK-NEXT:    vmadd.vx v8, a1, v12
1203; CHECK-NEXT:    ret
1204  %head = insertelement <8 x i1> poison, i1 true, i32 0
1205  %m = shufflevector <8 x i1> %head, <8 x i1> poison, <8 x i32> zeroinitializer
1206  %elt.head1 = insertelement <8 x i64> poison, i64 3, i32 0
1207  %vb = shufflevector <8 x i64> %elt.head1, <8 x i64> poison, <8 x i32> zeroinitializer
1208  %elt.head2 = insertelement <8 x i64> poison, i64 7, i32 0
1209  %vc = shufflevector <8 x i64> %elt.head2, <8 x i64> poison, <8 x i32> zeroinitializer
1210  %vadd = call <8 x i64> @llvm.vp.add.v8i64(<8 x i64> %va, <8 x i64> %vb, <8 x i1> %m, i32 %evl)
1211  %v = call <8 x i64> @llvm.vp.mul.v8i64(<8 x i64> %vadd, <8 x i64> %vc, <8 x i1> %m, i32 %evl)
1212  ret <8 x i64> %v
1213}
1214