xref: /llvm-project/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmax-vp.ll (revision b6c0f1bfa79a3a32d841ac5ab1f94c3aee3b5d90) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=riscv32 -mattr=+v -verify-machineinstrs < %s \
3; RUN:   | FileCheck %s --check-prefixes=CHECK,RV32
4; RUN: llc -mtriple=riscv64 -mattr=+v -verify-machineinstrs < %s \
5; RUN:   | FileCheck %s --check-prefixes=CHECK,RV64
6
7declare <8 x i7> @llvm.vp.smax.v8i7(<8 x i7>, <8 x i7>, <8 x i1>, i32)
8
9define <8 x i7> @vmax_vv_v8i7(<8 x i7> %va, <8 x i7> %b, <8 x i1> %m, i32 zeroext %evl) {
10; CHECK-LABEL: vmax_vv_v8i7:
11; CHECK:       # %bb.0:
12; CHECK-NEXT:    vsetvli zero, a0, e8, mf2, ta, ma
13; CHECK-NEXT:    vsll.vi v9, v9, 1, v0.t
14; CHECK-NEXT:    vsra.vi v9, v9, 1, v0.t
15; CHECK-NEXT:    vsll.vi v8, v8, 1, v0.t
16; CHECK-NEXT:    vsra.vi v8, v8, 1, v0.t
17; CHECK-NEXT:    vmax.vv v8, v8, v9, v0.t
18; CHECK-NEXT:    ret
19  %v = call <8 x i7> @llvm.vp.smax.v8i7(<8 x i7> %va, <8 x i7> %b, <8 x i1> %m, i32 %evl)
20  ret <8 x i7> %v
21}
22
23declare <2 x i8> @llvm.vp.smax.v2i8(<2 x i8>, <2 x i8>, <2 x i1>, i32)
24
25define <2 x i8> @vmax_vv_v2i8(<2 x i8> %va, <2 x i8> %b, <2 x i1> %m, i32 zeroext %evl) {
26; CHECK-LABEL: vmax_vv_v2i8:
27; CHECK:       # %bb.0:
28; CHECK-NEXT:    vsetvli zero, a0, e8, mf8, ta, ma
29; CHECK-NEXT:    vmax.vv v8, v8, v9, v0.t
30; CHECK-NEXT:    ret
31  %v = call <2 x i8> @llvm.vp.smax.v2i8(<2 x i8> %va, <2 x i8> %b, <2 x i1> %m, i32 %evl)
32  ret <2 x i8> %v
33}
34
35define <2 x i8> @vmax_vv_v2i8_unmasked(<2 x i8> %va, <2 x i8> %b, i32 zeroext %evl) {
36; CHECK-LABEL: vmax_vv_v2i8_unmasked:
37; CHECK:       # %bb.0:
38; CHECK-NEXT:    vsetvli zero, a0, e8, mf8, ta, ma
39; CHECK-NEXT:    vmax.vv v8, v8, v9
40; CHECK-NEXT:    ret
41  %v = call <2 x i8> @llvm.vp.smax.v2i8(<2 x i8> %va, <2 x i8> %b, <2 x i1> splat (i1 true), i32 %evl)
42  ret <2 x i8> %v
43}
44
45define <2 x i8> @vmax_vx_v2i8(<2 x i8> %va, i8 %b, <2 x i1> %m, i32 zeroext %evl) {
46; CHECK-LABEL: vmax_vx_v2i8:
47; CHECK:       # %bb.0:
48; CHECK-NEXT:    vsetvli zero, a1, e8, mf8, ta, ma
49; CHECK-NEXT:    vmax.vx v8, v8, a0, v0.t
50; CHECK-NEXT:    ret
51  %elt.head = insertelement <2 x i8> poison, i8 %b, i32 0
52  %vb = shufflevector <2 x i8> %elt.head, <2 x i8> poison, <2 x i32> zeroinitializer
53  %v = call <2 x i8> @llvm.vp.smax.v2i8(<2 x i8> %va, <2 x i8> %vb, <2 x i1> %m, i32 %evl)
54  ret <2 x i8> %v
55}
56
57define <2 x i8> @vmax_vx_v2i8_unmasked(<2 x i8> %va, i8 %b, i32 zeroext %evl) {
58; CHECK-LABEL: vmax_vx_v2i8_unmasked:
59; CHECK:       # %bb.0:
60; CHECK-NEXT:    vsetvli zero, a1, e8, mf8, ta, ma
61; CHECK-NEXT:    vmax.vx v8, v8, a0
62; CHECK-NEXT:    ret
63  %elt.head = insertelement <2 x i8> poison, i8 %b, i32 0
64  %vb = shufflevector <2 x i8> %elt.head, <2 x i8> poison, <2 x i32> zeroinitializer
65  %v = call <2 x i8> @llvm.vp.smax.v2i8(<2 x i8> %va, <2 x i8> %vb, <2 x i1> splat (i1 true), i32 %evl)
66  ret <2 x i8> %v
67}
68
69declare <4 x i8> @llvm.vp.smax.v4i8(<4 x i8>, <4 x i8>, <4 x i1>, i32)
70
71define <4 x i8> @vmax_vv_v4i8(<4 x i8> %va, <4 x i8> %b, <4 x i1> %m, i32 zeroext %evl) {
72; CHECK-LABEL: vmax_vv_v4i8:
73; CHECK:       # %bb.0:
74; CHECK-NEXT:    vsetvli zero, a0, e8, mf4, ta, ma
75; CHECK-NEXT:    vmax.vv v8, v8, v9, v0.t
76; CHECK-NEXT:    ret
77  %v = call <4 x i8> @llvm.vp.smax.v4i8(<4 x i8> %va, <4 x i8> %b, <4 x i1> %m, i32 %evl)
78  ret <4 x i8> %v
79}
80
81define <4 x i8> @vmax_vv_v4i8_unmasked(<4 x i8> %va, <4 x i8> %b, i32 zeroext %evl) {
82; CHECK-LABEL: vmax_vv_v4i8_unmasked:
83; CHECK:       # %bb.0:
84; CHECK-NEXT:    vsetvli zero, a0, e8, mf4, ta, ma
85; CHECK-NEXT:    vmax.vv v8, v8, v9
86; CHECK-NEXT:    ret
87  %v = call <4 x i8> @llvm.vp.smax.v4i8(<4 x i8> %va, <4 x i8> %b, <4 x i1> splat (i1 true), i32 %evl)
88  ret <4 x i8> %v
89}
90
91define <4 x i8> @vmax_vx_v4i8(<4 x i8> %va, i8 %b, <4 x i1> %m, i32 zeroext %evl) {
92; CHECK-LABEL: vmax_vx_v4i8:
93; CHECK:       # %bb.0:
94; CHECK-NEXT:    vsetvli zero, a1, e8, mf4, ta, ma
95; CHECK-NEXT:    vmax.vx v8, v8, a0, v0.t
96; CHECK-NEXT:    ret
97  %elt.head = insertelement <4 x i8> poison, i8 %b, i32 0
98  %vb = shufflevector <4 x i8> %elt.head, <4 x i8> poison, <4 x i32> zeroinitializer
99  %v = call <4 x i8> @llvm.vp.smax.v4i8(<4 x i8> %va, <4 x i8> %vb, <4 x i1> %m, i32 %evl)
100  ret <4 x i8> %v
101}
102
103define <4 x i8> @vmax_vx_v4i8_commute(<4 x i8> %va, i8 %b, <4 x i1> %m, i32 zeroext %evl) {
104; CHECK-LABEL: vmax_vx_v4i8_commute:
105; CHECK:       # %bb.0:
106; CHECK-NEXT:    vsetvli zero, a1, e8, mf4, ta, ma
107; CHECK-NEXT:    vmax.vx v8, v8, a0, v0.t
108; CHECK-NEXT:    ret
109  %elt.head = insertelement <4 x i8> poison, i8 %b, i32 0
110  %vb = shufflevector <4 x i8> %elt.head, <4 x i8> poison, <4 x i32> zeroinitializer
111  %v = call <4 x i8> @llvm.vp.smax.v4i8(<4 x i8> %vb, <4 x i8> %va, <4 x i1> %m, i32 %evl)
112  ret <4 x i8> %v
113}
114
115define <4 x i8> @vmax_vx_v4i8_unmasked(<4 x i8> %va, i8 %b, i32 zeroext %evl) {
116; CHECK-LABEL: vmax_vx_v4i8_unmasked:
117; CHECK:       # %bb.0:
118; CHECK-NEXT:    vsetvli zero, a1, e8, mf4, ta, ma
119; CHECK-NEXT:    vmax.vx v8, v8, a0
120; CHECK-NEXT:    ret
121  %elt.head = insertelement <4 x i8> poison, i8 %b, i32 0
122  %vb = shufflevector <4 x i8> %elt.head, <4 x i8> poison, <4 x i32> zeroinitializer
123  %v = call <4 x i8> @llvm.vp.smax.v4i8(<4 x i8> %va, <4 x i8> %vb, <4 x i1> splat (i1 true), i32 %evl)
124  ret <4 x i8> %v
125}
126
127declare <5 x i8> @llvm.vp.smax.v5i8(<5 x i8>, <5 x i8>, <5 x i1>, i32)
128
129define <5 x i8> @vmax_vv_v5i8(<5 x i8> %va, <5 x i8> %b, <5 x i1> %m, i32 zeroext %evl) {
130; CHECK-LABEL: vmax_vv_v5i8:
131; CHECK:       # %bb.0:
132; CHECK-NEXT:    vsetvli zero, a0, e8, mf2, ta, ma
133; CHECK-NEXT:    vmax.vv v8, v8, v9, v0.t
134; CHECK-NEXT:    ret
135  %v = call <5 x i8> @llvm.vp.smax.v5i8(<5 x i8> %va, <5 x i8> %b, <5 x i1> %m, i32 %evl)
136  ret <5 x i8> %v
137}
138
139define <5 x i8> @vmax_vv_v5i8_unmasked(<5 x i8> %va, <5 x i8> %b, i32 zeroext %evl) {
140; CHECK-LABEL: vmax_vv_v5i8_unmasked:
141; CHECK:       # %bb.0:
142; CHECK-NEXT:    vsetvli zero, a0, e8, mf2, ta, ma
143; CHECK-NEXT:    vmax.vv v8, v8, v9
144; CHECK-NEXT:    ret
145  %v = call <5 x i8> @llvm.vp.smax.v5i8(<5 x i8> %va, <5 x i8> %b, <5 x i1> splat (i1 true), i32 %evl)
146  ret <5 x i8> %v
147}
148
149define <5 x i8> @vmax_vx_v5i8(<5 x i8> %va, i8 %b, <5 x i1> %m, i32 zeroext %evl) {
150; CHECK-LABEL: vmax_vx_v5i8:
151; CHECK:       # %bb.0:
152; CHECK-NEXT:    vsetvli zero, a1, e8, mf2, ta, ma
153; CHECK-NEXT:    vmax.vx v8, v8, a0, v0.t
154; CHECK-NEXT:    ret
155  %elt.head = insertelement <5 x i8> poison, i8 %b, i32 0
156  %vb = shufflevector <5 x i8> %elt.head, <5 x i8> poison, <5 x i32> zeroinitializer
157  %v = call <5 x i8> @llvm.vp.smax.v5i8(<5 x i8> %va, <5 x i8> %vb, <5 x i1> %m, i32 %evl)
158  ret <5 x i8> %v
159}
160
161define <5 x i8> @vmax_vx_v5i8_unmasked(<5 x i8> %va, i8 %b, i32 zeroext %evl) {
162; CHECK-LABEL: vmax_vx_v5i8_unmasked:
163; CHECK:       # %bb.0:
164; CHECK-NEXT:    vsetvli zero, a1, e8, mf2, ta, ma
165; CHECK-NEXT:    vmax.vx v8, v8, a0
166; CHECK-NEXT:    ret
167  %elt.head = insertelement <5 x i8> poison, i8 %b, i32 0
168  %vb = shufflevector <5 x i8> %elt.head, <5 x i8> poison, <5 x i32> zeroinitializer
169  %v = call <5 x i8> @llvm.vp.smax.v5i8(<5 x i8> %va, <5 x i8> %vb, <5 x i1> splat (i1 true), i32 %evl)
170  ret <5 x i8> %v
171}
172
173declare <8 x i8> @llvm.vp.smax.v8i8(<8 x i8>, <8 x i8>, <8 x i1>, i32)
174
175define <8 x i8> @vmax_vv_v8i8(<8 x i8> %va, <8 x i8> %b, <8 x i1> %m, i32 zeroext %evl) {
176; CHECK-LABEL: vmax_vv_v8i8:
177; CHECK:       # %bb.0:
178; CHECK-NEXT:    vsetvli zero, a0, e8, mf2, ta, ma
179; CHECK-NEXT:    vmax.vv v8, v8, v9, v0.t
180; CHECK-NEXT:    ret
181  %v = call <8 x i8> @llvm.vp.smax.v8i8(<8 x i8> %va, <8 x i8> %b, <8 x i1> %m, i32 %evl)
182  ret <8 x i8> %v
183}
184
185define <8 x i8> @vmax_vv_v8i8_unmasked(<8 x i8> %va, <8 x i8> %b, i32 zeroext %evl) {
186; CHECK-LABEL: vmax_vv_v8i8_unmasked:
187; CHECK:       # %bb.0:
188; CHECK-NEXT:    vsetvli zero, a0, e8, mf2, ta, ma
189; CHECK-NEXT:    vmax.vv v8, v8, v9
190; CHECK-NEXT:    ret
191  %v = call <8 x i8> @llvm.vp.smax.v8i8(<8 x i8> %va, <8 x i8> %b, <8 x i1> splat (i1 true), i32 %evl)
192  ret <8 x i8> %v
193}
194
195define <8 x i8> @vmax_vx_v8i8(<8 x i8> %va, i8 %b, <8 x i1> %m, i32 zeroext %evl) {
196; CHECK-LABEL: vmax_vx_v8i8:
197; CHECK:       # %bb.0:
198; CHECK-NEXT:    vsetvli zero, a1, e8, mf2, ta, ma
199; CHECK-NEXT:    vmax.vx v8, v8, a0, v0.t
200; CHECK-NEXT:    ret
201  %elt.head = insertelement <8 x i8> poison, i8 %b, i32 0
202  %vb = shufflevector <8 x i8> %elt.head, <8 x i8> poison, <8 x i32> zeroinitializer
203  %v = call <8 x i8> @llvm.vp.smax.v8i8(<8 x i8> %va, <8 x i8> %vb, <8 x i1> %m, i32 %evl)
204  ret <8 x i8> %v
205}
206
207define <8 x i8> @vmax_vx_v8i8_unmasked(<8 x i8> %va, i8 %b, i32 zeroext %evl) {
208; CHECK-LABEL: vmax_vx_v8i8_unmasked:
209; CHECK:       # %bb.0:
210; CHECK-NEXT:    vsetvli zero, a1, e8, mf2, ta, ma
211; CHECK-NEXT:    vmax.vx v8, v8, a0
212; CHECK-NEXT:    ret
213  %elt.head = insertelement <8 x i8> poison, i8 %b, i32 0
214  %vb = shufflevector <8 x i8> %elt.head, <8 x i8> poison, <8 x i32> zeroinitializer
215  %v = call <8 x i8> @llvm.vp.smax.v8i8(<8 x i8> %va, <8 x i8> %vb, <8 x i1> splat (i1 true), i32 %evl)
216  ret <8 x i8> %v
217}
218
219declare <16 x i8> @llvm.vp.smax.v16i8(<16 x i8>, <16 x i8>, <16 x i1>, i32)
220
221define <16 x i8> @vmax_vv_v16i8(<16 x i8> %va, <16 x i8> %b, <16 x i1> %m, i32 zeroext %evl) {
222; CHECK-LABEL: vmax_vv_v16i8:
223; CHECK:       # %bb.0:
224; CHECK-NEXT:    vsetvli zero, a0, e8, m1, ta, ma
225; CHECK-NEXT:    vmax.vv v8, v8, v9, v0.t
226; CHECK-NEXT:    ret
227  %v = call <16 x i8> @llvm.vp.smax.v16i8(<16 x i8> %va, <16 x i8> %b, <16 x i1> %m, i32 %evl)
228  ret <16 x i8> %v
229}
230
231define <16 x i8> @vmax_vv_v16i8_unmasked(<16 x i8> %va, <16 x i8> %b, i32 zeroext %evl) {
232; CHECK-LABEL: vmax_vv_v16i8_unmasked:
233; CHECK:       # %bb.0:
234; CHECK-NEXT:    vsetvli zero, a0, e8, m1, ta, ma
235; CHECK-NEXT:    vmax.vv v8, v8, v9
236; CHECK-NEXT:    ret
237  %v = call <16 x i8> @llvm.vp.smax.v16i8(<16 x i8> %va, <16 x i8> %b, <16 x i1> splat (i1 true), i32 %evl)
238  ret <16 x i8> %v
239}
240
241define <16 x i8> @vmax_vx_v16i8(<16 x i8> %va, i8 %b, <16 x i1> %m, i32 zeroext %evl) {
242; CHECK-LABEL: vmax_vx_v16i8:
243; CHECK:       # %bb.0:
244; CHECK-NEXT:    vsetvli zero, a1, e8, m1, ta, ma
245; CHECK-NEXT:    vmax.vx v8, v8, a0, v0.t
246; CHECK-NEXT:    ret
247  %elt.head = insertelement <16 x i8> poison, i8 %b, i32 0
248  %vb = shufflevector <16 x i8> %elt.head, <16 x i8> poison, <16 x i32> zeroinitializer
249  %v = call <16 x i8> @llvm.vp.smax.v16i8(<16 x i8> %va, <16 x i8> %vb, <16 x i1> %m, i32 %evl)
250  ret <16 x i8> %v
251}
252
253define <16 x i8> @vmax_vx_v16i8_unmasked(<16 x i8> %va, i8 %b, i32 zeroext %evl) {
254; CHECK-LABEL: vmax_vx_v16i8_unmasked:
255; CHECK:       # %bb.0:
256; CHECK-NEXT:    vsetvli zero, a1, e8, m1, ta, ma
257; CHECK-NEXT:    vmax.vx v8, v8, a0
258; CHECK-NEXT:    ret
259  %elt.head = insertelement <16 x i8> poison, i8 %b, i32 0
260  %vb = shufflevector <16 x i8> %elt.head, <16 x i8> poison, <16 x i32> zeroinitializer
261  %v = call <16 x i8> @llvm.vp.smax.v16i8(<16 x i8> %va, <16 x i8> %vb, <16 x i1> splat (i1 true), i32 %evl)
262  ret <16 x i8> %v
263}
264
265declare <256 x i8> @llvm.vp.smax.v258i8(<256 x i8>, <256 x i8>, <256 x i1>, i32)
266
267define <256 x i8> @vmax_vx_v258i8(<256 x i8> %va, i8 %b, <256 x i1> %m, i32 zeroext %evl) {
268; CHECK-LABEL: vmax_vx_v258i8:
269; CHECK:       # %bb.0:
270; CHECK-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
271; CHECK-NEXT:    vmv1r.v v24, v0
272; CHECK-NEXT:    li a3, 128
273; CHECK-NEXT:    vsetvli zero, a3, e8, m8, ta, ma
274; CHECK-NEXT:    vlm.v v0, (a1)
275; CHECK-NEXT:    addi a1, a2, -128
276; CHECK-NEXT:    sltu a4, a2, a1
277; CHECK-NEXT:    addi a4, a4, -1
278; CHECK-NEXT:    and a1, a4, a1
279; CHECK-NEXT:    vsetvli zero, a1, e8, m8, ta, ma
280; CHECK-NEXT:    vmax.vx v16, v16, a0, v0.t
281; CHECK-NEXT:    bltu a2, a3, .LBB22_2
282; CHECK-NEXT:  # %bb.1:
283; CHECK-NEXT:    li a2, 128
284; CHECK-NEXT:  .LBB22_2:
285; CHECK-NEXT:    vmv1r.v v0, v24
286; CHECK-NEXT:    vsetvli zero, a2, e8, m8, ta, ma
287; CHECK-NEXT:    vmax.vx v8, v8, a0, v0.t
288; CHECK-NEXT:    ret
289  %elt.head = insertelement <256 x i8> poison, i8 %b, i32 0
290  %vb = shufflevector <256 x i8> %elt.head, <256 x i8> poison, <256 x i32> zeroinitializer
291  %v = call <256 x i8> @llvm.vp.smax.v258i8(<256 x i8> %va, <256 x i8> %vb, <256 x i1> %m, i32 %evl)
292  ret <256 x i8> %v
293}
294
295define <256 x i8> @vmax_vx_v258i8_unmasked(<256 x i8> %va, i8 %b, i32 zeroext %evl) {
296; CHECK-LABEL: vmax_vx_v258i8_unmasked:
297; CHECK:       # %bb.0:
298; CHECK-NEXT:    li a3, 128
299; CHECK-NEXT:    mv a2, a1
300; CHECK-NEXT:    bltu a1, a3, .LBB23_2
301; CHECK-NEXT:  # %bb.1:
302; CHECK-NEXT:    li a2, 128
303; CHECK-NEXT:  .LBB23_2:
304; CHECK-NEXT:    vsetvli zero, a2, e8, m8, ta, ma
305; CHECK-NEXT:    vmax.vx v8, v8, a0
306; CHECK-NEXT:    addi a2, a1, -128
307; CHECK-NEXT:    sltu a1, a1, a2
308; CHECK-NEXT:    addi a1, a1, -1
309; CHECK-NEXT:    and a1, a1, a2
310; CHECK-NEXT:    vsetvli zero, a1, e8, m8, ta, ma
311; CHECK-NEXT:    vmax.vx v16, v16, a0
312; CHECK-NEXT:    ret
313  %elt.head = insertelement <256 x i8> poison, i8 %b, i32 0
314  %vb = shufflevector <256 x i8> %elt.head, <256 x i8> poison, <256 x i32> zeroinitializer
315  %v = call <256 x i8> @llvm.vp.smax.v258i8(<256 x i8> %va, <256 x i8> %vb, <256 x i1> splat (i1 true), i32 %evl)
316  ret <256 x i8> %v
317}
318
319; Test splitting when the %evl is a known constant.
320
321define <256 x i8> @vmax_vx_v258i8_evl129(<256 x i8> %va, i8 %b, <256 x i1> %m) {
322; CHECK-LABEL: vmax_vx_v258i8_evl129:
323; CHECK:       # %bb.0:
324; CHECK-NEXT:    li a2, 128
325; CHECK-NEXT:    vsetvli zero, a2, e8, m8, ta, ma
326; CHECK-NEXT:    vlm.v v24, (a1)
327; CHECK-NEXT:    vmax.vx v8, v8, a0, v0.t
328; CHECK-NEXT:    vmv1r.v v0, v24
329; CHECK-NEXT:    vsetivli zero, 1, e8, m8, ta, ma
330; CHECK-NEXT:    vmax.vx v16, v16, a0, v0.t
331; CHECK-NEXT:    ret
332  %elt.head = insertelement <256 x i8> poison, i8 %b, i32 0
333  %vb = shufflevector <256 x i8> %elt.head, <256 x i8> poison, <256 x i32> zeroinitializer
334  %v = call <256 x i8> @llvm.vp.smax.v258i8(<256 x i8> %va, <256 x i8> %vb, <256 x i1> %m, i32 129)
335  ret <256 x i8> %v
336}
337
338; The upper half is doing nothing.
339
340define <256 x i8> @vmax_vx_v258i8_evl128(<256 x i8> %va, i8 %b, <256 x i1> %m) {
341; CHECK-LABEL: vmax_vx_v258i8_evl128:
342; CHECK:       # %bb.0:
343; CHECK-NEXT:    li a1, 128
344; CHECK-NEXT:    vsetvli zero, a1, e8, m8, ta, ma
345; CHECK-NEXT:    vmax.vx v8, v8, a0, v0.t
346; CHECK-NEXT:    ret
347  %elt.head = insertelement <256 x i8> poison, i8 %b, i32 0
348  %vb = shufflevector <256 x i8> %elt.head, <256 x i8> poison, <256 x i32> zeroinitializer
349  %v = call <256 x i8> @llvm.vp.smax.v258i8(<256 x i8> %va, <256 x i8> %vb, <256 x i1> %m, i32 128)
350  ret <256 x i8> %v
351}
352
353declare <2 x i16> @llvm.vp.smax.v2i16(<2 x i16>, <2 x i16>, <2 x i1>, i32)
354
355define <2 x i16> @vmax_vv_v2i16(<2 x i16> %va, <2 x i16> %b, <2 x i1> %m, i32 zeroext %evl) {
356; CHECK-LABEL: vmax_vv_v2i16:
357; CHECK:       # %bb.0:
358; CHECK-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
359; CHECK-NEXT:    vmax.vv v8, v8, v9, v0.t
360; CHECK-NEXT:    ret
361  %v = call <2 x i16> @llvm.vp.smax.v2i16(<2 x i16> %va, <2 x i16> %b, <2 x i1> %m, i32 %evl)
362  ret <2 x i16> %v
363}
364
365define <2 x i16> @vmax_vv_v2i16_unmasked(<2 x i16> %va, <2 x i16> %b, i32 zeroext %evl) {
366; CHECK-LABEL: vmax_vv_v2i16_unmasked:
367; CHECK:       # %bb.0:
368; CHECK-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
369; CHECK-NEXT:    vmax.vv v8, v8, v9
370; CHECK-NEXT:    ret
371  %v = call <2 x i16> @llvm.vp.smax.v2i16(<2 x i16> %va, <2 x i16> %b, <2 x i1> splat (i1 true), i32 %evl)
372  ret <2 x i16> %v
373}
374
375define <2 x i16> @vmax_vx_v2i16(<2 x i16> %va, i16 %b, <2 x i1> %m, i32 zeroext %evl) {
376; CHECK-LABEL: vmax_vx_v2i16:
377; CHECK:       # %bb.0:
378; CHECK-NEXT:    vsetvli zero, a1, e16, mf4, ta, ma
379; CHECK-NEXT:    vmax.vx v8, v8, a0, v0.t
380; CHECK-NEXT:    ret
381  %elt.head = insertelement <2 x i16> poison, i16 %b, i32 0
382  %vb = shufflevector <2 x i16> %elt.head, <2 x i16> poison, <2 x i32> zeroinitializer
383  %v = call <2 x i16> @llvm.vp.smax.v2i16(<2 x i16> %va, <2 x i16> %vb, <2 x i1> %m, i32 %evl)
384  ret <2 x i16> %v
385}
386
387define <2 x i16> @vmax_vx_v2i16_unmasked(<2 x i16> %va, i16 %b, i32 zeroext %evl) {
388; CHECK-LABEL: vmax_vx_v2i16_unmasked:
389; CHECK:       # %bb.0:
390; CHECK-NEXT:    vsetvli zero, a1, e16, mf4, ta, ma
391; CHECK-NEXT:    vmax.vx v8, v8, a0
392; CHECK-NEXT:    ret
393  %elt.head = insertelement <2 x i16> poison, i16 %b, i32 0
394  %vb = shufflevector <2 x i16> %elt.head, <2 x i16> poison, <2 x i32> zeroinitializer
395  %v = call <2 x i16> @llvm.vp.smax.v2i16(<2 x i16> %va, <2 x i16> %vb, <2 x i1> splat (i1 true), i32 %evl)
396  ret <2 x i16> %v
397}
398
399declare <4 x i16> @llvm.vp.smax.v4i16(<4 x i16>, <4 x i16>, <4 x i1>, i32)
400
401define <4 x i16> @vmax_vv_v4i16(<4 x i16> %va, <4 x i16> %b, <4 x i1> %m, i32 zeroext %evl) {
402; CHECK-LABEL: vmax_vv_v4i16:
403; CHECK:       # %bb.0:
404; CHECK-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
405; CHECK-NEXT:    vmax.vv v8, v8, v9, v0.t
406; CHECK-NEXT:    ret
407  %v = call <4 x i16> @llvm.vp.smax.v4i16(<4 x i16> %va, <4 x i16> %b, <4 x i1> %m, i32 %evl)
408  ret <4 x i16> %v
409}
410
411define <4 x i16> @vmax_vv_v4i16_unmasked(<4 x i16> %va, <4 x i16> %b, i32 zeroext %evl) {
412; CHECK-LABEL: vmax_vv_v4i16_unmasked:
413; CHECK:       # %bb.0:
414; CHECK-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
415; CHECK-NEXT:    vmax.vv v8, v8, v9
416; CHECK-NEXT:    ret
417  %v = call <4 x i16> @llvm.vp.smax.v4i16(<4 x i16> %va, <4 x i16> %b, <4 x i1> splat (i1 true), i32 %evl)
418  ret <4 x i16> %v
419}
420
421define <4 x i16> @vmax_vx_v4i16(<4 x i16> %va, i16 %b, <4 x i1> %m, i32 zeroext %evl) {
422; CHECK-LABEL: vmax_vx_v4i16:
423; CHECK:       # %bb.0:
424; CHECK-NEXT:    vsetvli zero, a1, e16, mf2, ta, ma
425; CHECK-NEXT:    vmax.vx v8, v8, a0, v0.t
426; CHECK-NEXT:    ret
427  %elt.head = insertelement <4 x i16> poison, i16 %b, i32 0
428  %vb = shufflevector <4 x i16> %elt.head, <4 x i16> poison, <4 x i32> zeroinitializer
429  %v = call <4 x i16> @llvm.vp.smax.v4i16(<4 x i16> %va, <4 x i16> %vb, <4 x i1> %m, i32 %evl)
430  ret <4 x i16> %v
431}
432
433define <4 x i16> @vmax_vx_v4i16_unmasked(<4 x i16> %va, i16 %b, i32 zeroext %evl) {
434; CHECK-LABEL: vmax_vx_v4i16_unmasked:
435; CHECK:       # %bb.0:
436; CHECK-NEXT:    vsetvli zero, a1, e16, mf2, ta, ma
437; CHECK-NEXT:    vmax.vx v8, v8, a0
438; CHECK-NEXT:    ret
439  %elt.head = insertelement <4 x i16> poison, i16 %b, i32 0
440  %vb = shufflevector <4 x i16> %elt.head, <4 x i16> poison, <4 x i32> zeroinitializer
441  %v = call <4 x i16> @llvm.vp.smax.v4i16(<4 x i16> %va, <4 x i16> %vb, <4 x i1> splat (i1 true), i32 %evl)
442  ret <4 x i16> %v
443}
444
445declare <8 x i16> @llvm.vp.smax.v8i16(<8 x i16>, <8 x i16>, <8 x i1>, i32)
446
447define <8 x i16> @vmax_vv_v8i16(<8 x i16> %va, <8 x i16> %b, <8 x i1> %m, i32 zeroext %evl) {
448; CHECK-LABEL: vmax_vv_v8i16:
449; CHECK:       # %bb.0:
450; CHECK-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
451; CHECK-NEXT:    vmax.vv v8, v8, v9, v0.t
452; CHECK-NEXT:    ret
453  %v = call <8 x i16> @llvm.vp.smax.v8i16(<8 x i16> %va, <8 x i16> %b, <8 x i1> %m, i32 %evl)
454  ret <8 x i16> %v
455}
456
457define <8 x i16> @vmax_vv_v8i16_unmasked(<8 x i16> %va, <8 x i16> %b, i32 zeroext %evl) {
458; CHECK-LABEL: vmax_vv_v8i16_unmasked:
459; CHECK:       # %bb.0:
460; CHECK-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
461; CHECK-NEXT:    vmax.vv v8, v8, v9
462; CHECK-NEXT:    ret
463  %v = call <8 x i16> @llvm.vp.smax.v8i16(<8 x i16> %va, <8 x i16> %b, <8 x i1> splat (i1 true), i32 %evl)
464  ret <8 x i16> %v
465}
466
467define <8 x i16> @vmax_vx_v8i16(<8 x i16> %va, i16 %b, <8 x i1> %m, i32 zeroext %evl) {
468; CHECK-LABEL: vmax_vx_v8i16:
469; CHECK:       # %bb.0:
470; CHECK-NEXT:    vsetvli zero, a1, e16, m1, ta, ma
471; CHECK-NEXT:    vmax.vx v8, v8, a0, v0.t
472; CHECK-NEXT:    ret
473  %elt.head = insertelement <8 x i16> poison, i16 %b, i32 0
474  %vb = shufflevector <8 x i16> %elt.head, <8 x i16> poison, <8 x i32> zeroinitializer
475  %v = call <8 x i16> @llvm.vp.smax.v8i16(<8 x i16> %va, <8 x i16> %vb, <8 x i1> %m, i32 %evl)
476  ret <8 x i16> %v
477}
478
479define <8 x i16> @vmax_vx_v8i16_unmasked(<8 x i16> %va, i16 %b, i32 zeroext %evl) {
480; CHECK-LABEL: vmax_vx_v8i16_unmasked:
481; CHECK:       # %bb.0:
482; CHECK-NEXT:    vsetvli zero, a1, e16, m1, ta, ma
483; CHECK-NEXT:    vmax.vx v8, v8, a0
484; CHECK-NEXT:    ret
485  %elt.head = insertelement <8 x i16> poison, i16 %b, i32 0
486  %vb = shufflevector <8 x i16> %elt.head, <8 x i16> poison, <8 x i32> zeroinitializer
487  %v = call <8 x i16> @llvm.vp.smax.v8i16(<8 x i16> %va, <8 x i16> %vb, <8 x i1> splat (i1 true), i32 %evl)
488  ret <8 x i16> %v
489}
490
491declare <16 x i16> @llvm.vp.smax.v16i16(<16 x i16>, <16 x i16>, <16 x i1>, i32)
492
493define <16 x i16> @vmax_vv_v16i16(<16 x i16> %va, <16 x i16> %b, <16 x i1> %m, i32 zeroext %evl) {
494; CHECK-LABEL: vmax_vv_v16i16:
495; CHECK:       # %bb.0:
496; CHECK-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
497; CHECK-NEXT:    vmax.vv v8, v8, v10, v0.t
498; CHECK-NEXT:    ret
499  %v = call <16 x i16> @llvm.vp.smax.v16i16(<16 x i16> %va, <16 x i16> %b, <16 x i1> %m, i32 %evl)
500  ret <16 x i16> %v
501}
502
503define <16 x i16> @vmax_vv_v16i16_unmasked(<16 x i16> %va, <16 x i16> %b, i32 zeroext %evl) {
504; CHECK-LABEL: vmax_vv_v16i16_unmasked:
505; CHECK:       # %bb.0:
506; CHECK-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
507; CHECK-NEXT:    vmax.vv v8, v8, v10
508; CHECK-NEXT:    ret
509  %v = call <16 x i16> @llvm.vp.smax.v16i16(<16 x i16> %va, <16 x i16> %b, <16 x i1> splat (i1 true), i32 %evl)
510  ret <16 x i16> %v
511}
512
513define <16 x i16> @vmax_vx_v16i16(<16 x i16> %va, i16 %b, <16 x i1> %m, i32 zeroext %evl) {
514; CHECK-LABEL: vmax_vx_v16i16:
515; CHECK:       # %bb.0:
516; CHECK-NEXT:    vsetvli zero, a1, e16, m2, ta, ma
517; CHECK-NEXT:    vmax.vx v8, v8, a0, v0.t
518; CHECK-NEXT:    ret
519  %elt.head = insertelement <16 x i16> poison, i16 %b, i32 0
520  %vb = shufflevector <16 x i16> %elt.head, <16 x i16> poison, <16 x i32> zeroinitializer
521  %v = call <16 x i16> @llvm.vp.smax.v16i16(<16 x i16> %va, <16 x i16> %vb, <16 x i1> %m, i32 %evl)
522  ret <16 x i16> %v
523}
524
525define <16 x i16> @vmax_vx_v16i16_unmasked(<16 x i16> %va, i16 %b, i32 zeroext %evl) {
526; CHECK-LABEL: vmax_vx_v16i16_unmasked:
527; CHECK:       # %bb.0:
528; CHECK-NEXT:    vsetvli zero, a1, e16, m2, ta, ma
529; CHECK-NEXT:    vmax.vx v8, v8, a0
530; CHECK-NEXT:    ret
531  %elt.head = insertelement <16 x i16> poison, i16 %b, i32 0
532  %vb = shufflevector <16 x i16> %elt.head, <16 x i16> poison, <16 x i32> zeroinitializer
533  %v = call <16 x i16> @llvm.vp.smax.v16i16(<16 x i16> %va, <16 x i16> %vb, <16 x i1> splat (i1 true), i32 %evl)
534  ret <16 x i16> %v
535}
536
537declare <2 x i32> @llvm.vp.smax.v2i32(<2 x i32>, <2 x i32>, <2 x i1>, i32)
538
539define <2 x i32> @vmax_vv_v2i32(<2 x i32> %va, <2 x i32> %b, <2 x i1> %m, i32 zeroext %evl) {
540; CHECK-LABEL: vmax_vv_v2i32:
541; CHECK:       # %bb.0:
542; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma
543; CHECK-NEXT:    vmax.vv v8, v8, v9, v0.t
544; CHECK-NEXT:    ret
545  %v = call <2 x i32> @llvm.vp.smax.v2i32(<2 x i32> %va, <2 x i32> %b, <2 x i1> %m, i32 %evl)
546  ret <2 x i32> %v
547}
548
549define <2 x i32> @vmax_vv_v2i32_unmasked(<2 x i32> %va, <2 x i32> %b, i32 zeroext %evl) {
550; CHECK-LABEL: vmax_vv_v2i32_unmasked:
551; CHECK:       # %bb.0:
552; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma
553; CHECK-NEXT:    vmax.vv v8, v8, v9
554; CHECK-NEXT:    ret
555  %v = call <2 x i32> @llvm.vp.smax.v2i32(<2 x i32> %va, <2 x i32> %b, <2 x i1> splat (i1 true), i32 %evl)
556  ret <2 x i32> %v
557}
558
559define <2 x i32> @vmax_vx_v2i32(<2 x i32> %va, i32 %b, <2 x i1> %m, i32 zeroext %evl) {
560; CHECK-LABEL: vmax_vx_v2i32:
561; CHECK:       # %bb.0:
562; CHECK-NEXT:    vsetvli zero, a1, e32, mf2, ta, ma
563; CHECK-NEXT:    vmax.vx v8, v8, a0, v0.t
564; CHECK-NEXT:    ret
565  %elt.head = insertelement <2 x i32> poison, i32 %b, i32 0
566  %vb = shufflevector <2 x i32> %elt.head, <2 x i32> poison, <2 x i32> zeroinitializer
567  %v = call <2 x i32> @llvm.vp.smax.v2i32(<2 x i32> %va, <2 x i32> %vb, <2 x i1> %m, i32 %evl)
568  ret <2 x i32> %v
569}
570
571define <2 x i32> @vmax_vx_v2i32_unmasked(<2 x i32> %va, i32 %b, i32 zeroext %evl) {
572; CHECK-LABEL: vmax_vx_v2i32_unmasked:
573; CHECK:       # %bb.0:
574; CHECK-NEXT:    vsetvli zero, a1, e32, mf2, ta, ma
575; CHECK-NEXT:    vmax.vx v8, v8, a0
576; CHECK-NEXT:    ret
577  %elt.head = insertelement <2 x i32> poison, i32 %b, i32 0
578  %vb = shufflevector <2 x i32> %elt.head, <2 x i32> poison, <2 x i32> zeroinitializer
579  %v = call <2 x i32> @llvm.vp.smax.v2i32(<2 x i32> %va, <2 x i32> %vb, <2 x i1> splat (i1 true), i32 %evl)
580  ret <2 x i32> %v
581}
582
583declare <4 x i32> @llvm.vp.smax.v4i32(<4 x i32>, <4 x i32>, <4 x i1>, i32)
584
585define <4 x i32> @vmax_vv_v4i32(<4 x i32> %va, <4 x i32> %b, <4 x i1> %m, i32 zeroext %evl) {
586; CHECK-LABEL: vmax_vv_v4i32:
587; CHECK:       # %bb.0:
588; CHECK-NEXT:    vsetvli zero, a0, e32, m1, ta, ma
589; CHECK-NEXT:    vmax.vv v8, v8, v9, v0.t
590; CHECK-NEXT:    ret
591  %v = call <4 x i32> @llvm.vp.smax.v4i32(<4 x i32> %va, <4 x i32> %b, <4 x i1> %m, i32 %evl)
592  ret <4 x i32> %v
593}
594
595define <4 x i32> @vmax_vv_v4i32_unmasked(<4 x i32> %va, <4 x i32> %b, i32 zeroext %evl) {
596; CHECK-LABEL: vmax_vv_v4i32_unmasked:
597; CHECK:       # %bb.0:
598; CHECK-NEXT:    vsetvli zero, a0, e32, m1, ta, ma
599; CHECK-NEXT:    vmax.vv v8, v8, v9
600; CHECK-NEXT:    ret
601  %v = call <4 x i32> @llvm.vp.smax.v4i32(<4 x i32> %va, <4 x i32> %b, <4 x i1> splat (i1 true), i32 %evl)
602  ret <4 x i32> %v
603}
604
605define <4 x i32> @vmax_vx_v4i32(<4 x i32> %va, i32 %b, <4 x i1> %m, i32 zeroext %evl) {
606; CHECK-LABEL: vmax_vx_v4i32:
607; CHECK:       # %bb.0:
608; CHECK-NEXT:    vsetvli zero, a1, e32, m1, ta, ma
609; CHECK-NEXT:    vmax.vx v8, v8, a0, v0.t
610; CHECK-NEXT:    ret
611  %elt.head = insertelement <4 x i32> poison, i32 %b, i32 0
612  %vb = shufflevector <4 x i32> %elt.head, <4 x i32> poison, <4 x i32> zeroinitializer
613  %v = call <4 x i32> @llvm.vp.smax.v4i32(<4 x i32> %va, <4 x i32> %vb, <4 x i1> %m, i32 %evl)
614  ret <4 x i32> %v
615}
616
617define <4 x i32> @vmax_vx_v4i32_unmasked(<4 x i32> %va, i32 %b, i32 zeroext %evl) {
618; CHECK-LABEL: vmax_vx_v4i32_unmasked:
619; CHECK:       # %bb.0:
620; CHECK-NEXT:    vsetvli zero, a1, e32, m1, ta, ma
621; CHECK-NEXT:    vmax.vx v8, v8, a0
622; CHECK-NEXT:    ret
623  %elt.head = insertelement <4 x i32> poison, i32 %b, i32 0
624  %vb = shufflevector <4 x i32> %elt.head, <4 x i32> poison, <4 x i32> zeroinitializer
625  %v = call <4 x i32> @llvm.vp.smax.v4i32(<4 x i32> %va, <4 x i32> %vb, <4 x i1> splat (i1 true), i32 %evl)
626  ret <4 x i32> %v
627}
628
629declare <8 x i32> @llvm.vp.smax.v8i32(<8 x i32>, <8 x i32>, <8 x i1>, i32)
630
631define <8 x i32> @vmax_vv_v8i32(<8 x i32> %va, <8 x i32> %b, <8 x i1> %m, i32 zeroext %evl) {
632; CHECK-LABEL: vmax_vv_v8i32:
633; CHECK:       # %bb.0:
634; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma
635; CHECK-NEXT:    vmax.vv v8, v8, v10, v0.t
636; CHECK-NEXT:    ret
637  %v = call <8 x i32> @llvm.vp.smax.v8i32(<8 x i32> %va, <8 x i32> %b, <8 x i1> %m, i32 %evl)
638  ret <8 x i32> %v
639}
640
641define <8 x i32> @vmax_vv_v8i32_unmasked(<8 x i32> %va, <8 x i32> %b, i32 zeroext %evl) {
642; CHECK-LABEL: vmax_vv_v8i32_unmasked:
643; CHECK:       # %bb.0:
644; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma
645; CHECK-NEXT:    vmax.vv v8, v8, v10
646; CHECK-NEXT:    ret
647  %v = call <8 x i32> @llvm.vp.smax.v8i32(<8 x i32> %va, <8 x i32> %b, <8 x i1> splat (i1 true), i32 %evl)
648  ret <8 x i32> %v
649}
650
651define <8 x i32> @vmax_vx_v8i32(<8 x i32> %va, i32 %b, <8 x i1> %m, i32 zeroext %evl) {
652; CHECK-LABEL: vmax_vx_v8i32:
653; CHECK:       # %bb.0:
654; CHECK-NEXT:    vsetvli zero, a1, e32, m2, ta, ma
655; CHECK-NEXT:    vmax.vx v8, v8, a0, v0.t
656; CHECK-NEXT:    ret
657  %elt.head = insertelement <8 x i32> poison, i32 %b, i32 0
658  %vb = shufflevector <8 x i32> %elt.head, <8 x i32> poison, <8 x i32> zeroinitializer
659  %v = call <8 x i32> @llvm.vp.smax.v8i32(<8 x i32> %va, <8 x i32> %vb, <8 x i1> %m, i32 %evl)
660  ret <8 x i32> %v
661}
662
663define <8 x i32> @vmax_vx_v8i32_unmasked(<8 x i32> %va, i32 %b, i32 zeroext %evl) {
664; CHECK-LABEL: vmax_vx_v8i32_unmasked:
665; CHECK:       # %bb.0:
666; CHECK-NEXT:    vsetvli zero, a1, e32, m2, ta, ma
667; CHECK-NEXT:    vmax.vx v8, v8, a0
668; CHECK-NEXT:    ret
669  %elt.head = insertelement <8 x i32> poison, i32 %b, i32 0
670  %vb = shufflevector <8 x i32> %elt.head, <8 x i32> poison, <8 x i32> zeroinitializer
671  %v = call <8 x i32> @llvm.vp.smax.v8i32(<8 x i32> %va, <8 x i32> %vb, <8 x i1> splat (i1 true), i32 %evl)
672  ret <8 x i32> %v
673}
674
675declare <16 x i32> @llvm.vp.smax.v16i32(<16 x i32>, <16 x i32>, <16 x i1>, i32)
676
677define <16 x i32> @vmax_vv_v16i32(<16 x i32> %va, <16 x i32> %b, <16 x i1> %m, i32 zeroext %evl) {
678; CHECK-LABEL: vmax_vv_v16i32:
679; CHECK:       # %bb.0:
680; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma
681; CHECK-NEXT:    vmax.vv v8, v8, v12, v0.t
682; CHECK-NEXT:    ret
683  %v = call <16 x i32> @llvm.vp.smax.v16i32(<16 x i32> %va, <16 x i32> %b, <16 x i1> %m, i32 %evl)
684  ret <16 x i32> %v
685}
686
687define <16 x i32> @vmax_vv_v16i32_unmasked(<16 x i32> %va, <16 x i32> %b, i32 zeroext %evl) {
688; CHECK-LABEL: vmax_vv_v16i32_unmasked:
689; CHECK:       # %bb.0:
690; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma
691; CHECK-NEXT:    vmax.vv v8, v8, v12
692; CHECK-NEXT:    ret
693  %v = call <16 x i32> @llvm.vp.smax.v16i32(<16 x i32> %va, <16 x i32> %b, <16 x i1> splat (i1 true), i32 %evl)
694  ret <16 x i32> %v
695}
696
697define <16 x i32> @vmax_vx_v16i32(<16 x i32> %va, i32 %b, <16 x i1> %m, i32 zeroext %evl) {
698; CHECK-LABEL: vmax_vx_v16i32:
699; CHECK:       # %bb.0:
700; CHECK-NEXT:    vsetvli zero, a1, e32, m4, ta, ma
701; CHECK-NEXT:    vmax.vx v8, v8, a0, v0.t
702; CHECK-NEXT:    ret
703  %elt.head = insertelement <16 x i32> poison, i32 %b, i32 0
704  %vb = shufflevector <16 x i32> %elt.head, <16 x i32> poison, <16 x i32> zeroinitializer
705  %v = call <16 x i32> @llvm.vp.smax.v16i32(<16 x i32> %va, <16 x i32> %vb, <16 x i1> %m, i32 %evl)
706  ret <16 x i32> %v
707}
708
709define <16 x i32> @vmax_vx_v16i32_unmasked(<16 x i32> %va, i32 %b, i32 zeroext %evl) {
710; CHECK-LABEL: vmax_vx_v16i32_unmasked:
711; CHECK:       # %bb.0:
712; CHECK-NEXT:    vsetvli zero, a1, e32, m4, ta, ma
713; CHECK-NEXT:    vmax.vx v8, v8, a0
714; CHECK-NEXT:    ret
715  %elt.head = insertelement <16 x i32> poison, i32 %b, i32 0
716  %vb = shufflevector <16 x i32> %elt.head, <16 x i32> poison, <16 x i32> zeroinitializer
717  %v = call <16 x i32> @llvm.vp.smax.v16i32(<16 x i32> %va, <16 x i32> %vb, <16 x i1> splat (i1 true), i32 %evl)
718  ret <16 x i32> %v
719}
720
721declare <2 x i64> @llvm.vp.smax.v2i64(<2 x i64>, <2 x i64>, <2 x i1>, i32)
722
723define <2 x i64> @vmax_vv_v2i64(<2 x i64> %va, <2 x i64> %b, <2 x i1> %m, i32 zeroext %evl) {
724; CHECK-LABEL: vmax_vv_v2i64:
725; CHECK:       # %bb.0:
726; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma
727; CHECK-NEXT:    vmax.vv v8, v8, v9, v0.t
728; CHECK-NEXT:    ret
729  %v = call <2 x i64> @llvm.vp.smax.v2i64(<2 x i64> %va, <2 x i64> %b, <2 x i1> %m, i32 %evl)
730  ret <2 x i64> %v
731}
732
733define <2 x i64> @vmax_vv_v2i64_unmasked(<2 x i64> %va, <2 x i64> %b, i32 zeroext %evl) {
734; CHECK-LABEL: vmax_vv_v2i64_unmasked:
735; CHECK:       # %bb.0:
736; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma
737; CHECK-NEXT:    vmax.vv v8, v8, v9
738; CHECK-NEXT:    ret
739  %v = call <2 x i64> @llvm.vp.smax.v2i64(<2 x i64> %va, <2 x i64> %b, <2 x i1> splat (i1 true), i32 %evl)
740  ret <2 x i64> %v
741}
742
743define <2 x i64> @vmax_vx_v2i64(<2 x i64> %va, i64 %b, <2 x i1> %m, i32 zeroext %evl) {
744; RV32-LABEL: vmax_vx_v2i64:
745; RV32:       # %bb.0:
746; RV32-NEXT:    addi sp, sp, -16
747; RV32-NEXT:    .cfi_def_cfa_offset 16
748; RV32-NEXT:    sw a0, 8(sp)
749; RV32-NEXT:    sw a1, 12(sp)
750; RV32-NEXT:    addi a0, sp, 8
751; RV32-NEXT:    vsetivli zero, 2, e64, m1, ta, ma
752; RV32-NEXT:    vlse64.v v9, (a0), zero
753; RV32-NEXT:    vsetvli zero, a2, e64, m1, ta, ma
754; RV32-NEXT:    vmax.vv v8, v8, v9, v0.t
755; RV32-NEXT:    addi sp, sp, 16
756; RV32-NEXT:    .cfi_def_cfa_offset 0
757; RV32-NEXT:    ret
758;
759; RV64-LABEL: vmax_vx_v2i64:
760; RV64:       # %bb.0:
761; RV64-NEXT:    vsetvli zero, a1, e64, m1, ta, ma
762; RV64-NEXT:    vmax.vx v8, v8, a0, v0.t
763; RV64-NEXT:    ret
764  %elt.head = insertelement <2 x i64> poison, i64 %b, i32 0
765  %vb = shufflevector <2 x i64> %elt.head, <2 x i64> poison, <2 x i32> zeroinitializer
766  %v = call <2 x i64> @llvm.vp.smax.v2i64(<2 x i64> %va, <2 x i64> %vb, <2 x i1> %m, i32 %evl)
767  ret <2 x i64> %v
768}
769
770define <2 x i64> @vmax_vx_v2i64_unmasked(<2 x i64> %va, i64 %b, i32 zeroext %evl) {
771; RV32-LABEL: vmax_vx_v2i64_unmasked:
772; RV32:       # %bb.0:
773; RV32-NEXT:    addi sp, sp, -16
774; RV32-NEXT:    .cfi_def_cfa_offset 16
775; RV32-NEXT:    sw a0, 8(sp)
776; RV32-NEXT:    sw a1, 12(sp)
777; RV32-NEXT:    addi a0, sp, 8
778; RV32-NEXT:    vsetivli zero, 2, e64, m1, ta, ma
779; RV32-NEXT:    vlse64.v v9, (a0), zero
780; RV32-NEXT:    vsetvli zero, a2, e64, m1, ta, ma
781; RV32-NEXT:    vmax.vv v8, v8, v9
782; RV32-NEXT:    addi sp, sp, 16
783; RV32-NEXT:    .cfi_def_cfa_offset 0
784; RV32-NEXT:    ret
785;
786; RV64-LABEL: vmax_vx_v2i64_unmasked:
787; RV64:       # %bb.0:
788; RV64-NEXT:    vsetvli zero, a1, e64, m1, ta, ma
789; RV64-NEXT:    vmax.vx v8, v8, a0
790; RV64-NEXT:    ret
791  %elt.head = insertelement <2 x i64> poison, i64 %b, i32 0
792  %vb = shufflevector <2 x i64> %elt.head, <2 x i64> poison, <2 x i32> zeroinitializer
793  %v = call <2 x i64> @llvm.vp.smax.v2i64(<2 x i64> %va, <2 x i64> %vb, <2 x i1> splat (i1 true), i32 %evl)
794  ret <2 x i64> %v
795}
796
797declare <4 x i64> @llvm.vp.smax.v4i64(<4 x i64>, <4 x i64>, <4 x i1>, i32)
798
799define <4 x i64> @vmax_vv_v4i64(<4 x i64> %va, <4 x i64> %b, <4 x i1> %m, i32 zeroext %evl) {
800; CHECK-LABEL: vmax_vv_v4i64:
801; CHECK:       # %bb.0:
802; CHECK-NEXT:    vsetvli zero, a0, e64, m2, ta, ma
803; CHECK-NEXT:    vmax.vv v8, v8, v10, v0.t
804; CHECK-NEXT:    ret
805  %v = call <4 x i64> @llvm.vp.smax.v4i64(<4 x i64> %va, <4 x i64> %b, <4 x i1> %m, i32 %evl)
806  ret <4 x i64> %v
807}
808
809define <4 x i64> @vmax_vv_v4i64_unmasked(<4 x i64> %va, <4 x i64> %b, i32 zeroext %evl) {
810; CHECK-LABEL: vmax_vv_v4i64_unmasked:
811; CHECK:       # %bb.0:
812; CHECK-NEXT:    vsetvli zero, a0, e64, m2, ta, ma
813; CHECK-NEXT:    vmax.vv v8, v8, v10
814; CHECK-NEXT:    ret
815  %v = call <4 x i64> @llvm.vp.smax.v4i64(<4 x i64> %va, <4 x i64> %b, <4 x i1> splat (i1 true), i32 %evl)
816  ret <4 x i64> %v
817}
818
819define <4 x i64> @vmax_vx_v4i64(<4 x i64> %va, i64 %b, <4 x i1> %m, i32 zeroext %evl) {
820; RV32-LABEL: vmax_vx_v4i64:
821; RV32:       # %bb.0:
822; RV32-NEXT:    addi sp, sp, -16
823; RV32-NEXT:    .cfi_def_cfa_offset 16
824; RV32-NEXT:    sw a0, 8(sp)
825; RV32-NEXT:    sw a1, 12(sp)
826; RV32-NEXT:    addi a0, sp, 8
827; RV32-NEXT:    vsetivli zero, 4, e64, m2, ta, ma
828; RV32-NEXT:    vlse64.v v10, (a0), zero
829; RV32-NEXT:    vsetvli zero, a2, e64, m2, ta, ma
830; RV32-NEXT:    vmax.vv v8, v8, v10, v0.t
831; RV32-NEXT:    addi sp, sp, 16
832; RV32-NEXT:    .cfi_def_cfa_offset 0
833; RV32-NEXT:    ret
834;
835; RV64-LABEL: vmax_vx_v4i64:
836; RV64:       # %bb.0:
837; RV64-NEXT:    vsetvli zero, a1, e64, m2, ta, ma
838; RV64-NEXT:    vmax.vx v8, v8, a0, v0.t
839; RV64-NEXT:    ret
840  %elt.head = insertelement <4 x i64> poison, i64 %b, i32 0
841  %vb = shufflevector <4 x i64> %elt.head, <4 x i64> poison, <4 x i32> zeroinitializer
842  %v = call <4 x i64> @llvm.vp.smax.v4i64(<4 x i64> %va, <4 x i64> %vb, <4 x i1> %m, i32 %evl)
843  ret <4 x i64> %v
844}
845
846define <4 x i64> @vmax_vx_v4i64_unmasked(<4 x i64> %va, i64 %b, i32 zeroext %evl) {
847; RV32-LABEL: vmax_vx_v4i64_unmasked:
848; RV32:       # %bb.0:
849; RV32-NEXT:    addi sp, sp, -16
850; RV32-NEXT:    .cfi_def_cfa_offset 16
851; RV32-NEXT:    sw a0, 8(sp)
852; RV32-NEXT:    sw a1, 12(sp)
853; RV32-NEXT:    addi a0, sp, 8
854; RV32-NEXT:    vsetivli zero, 4, e64, m2, ta, ma
855; RV32-NEXT:    vlse64.v v10, (a0), zero
856; RV32-NEXT:    vsetvli zero, a2, e64, m2, ta, ma
857; RV32-NEXT:    vmax.vv v8, v8, v10
858; RV32-NEXT:    addi sp, sp, 16
859; RV32-NEXT:    .cfi_def_cfa_offset 0
860; RV32-NEXT:    ret
861;
862; RV64-LABEL: vmax_vx_v4i64_unmasked:
863; RV64:       # %bb.0:
864; RV64-NEXT:    vsetvli zero, a1, e64, m2, ta, ma
865; RV64-NEXT:    vmax.vx v8, v8, a0
866; RV64-NEXT:    ret
867  %elt.head = insertelement <4 x i64> poison, i64 %b, i32 0
868  %vb = shufflevector <4 x i64> %elt.head, <4 x i64> poison, <4 x i32> zeroinitializer
869  %v = call <4 x i64> @llvm.vp.smax.v4i64(<4 x i64> %va, <4 x i64> %vb, <4 x i1> splat (i1 true), i32 %evl)
870  ret <4 x i64> %v
871}
872
873declare <8 x i64> @llvm.vp.smax.v8i64(<8 x i64>, <8 x i64>, <8 x i1>, i32)
874
875define <8 x i64> @vmax_vv_v8i64(<8 x i64> %va, <8 x i64> %b, <8 x i1> %m, i32 zeroext %evl) {
876; CHECK-LABEL: vmax_vv_v8i64:
877; CHECK:       # %bb.0:
878; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
879; CHECK-NEXT:    vmax.vv v8, v8, v12, v0.t
880; CHECK-NEXT:    ret
881  %v = call <8 x i64> @llvm.vp.smax.v8i64(<8 x i64> %va, <8 x i64> %b, <8 x i1> %m, i32 %evl)
882  ret <8 x i64> %v
883}
884
885define <8 x i64> @vmax_vv_v8i64_unmasked(<8 x i64> %va, <8 x i64> %b, i32 zeroext %evl) {
886; CHECK-LABEL: vmax_vv_v8i64_unmasked:
887; CHECK:       # %bb.0:
888; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
889; CHECK-NEXT:    vmax.vv v8, v8, v12
890; CHECK-NEXT:    ret
891  %v = call <8 x i64> @llvm.vp.smax.v8i64(<8 x i64> %va, <8 x i64> %b, <8 x i1> splat (i1 true), i32 %evl)
892  ret <8 x i64> %v
893}
894
895define <8 x i64> @vmax_vx_v8i64(<8 x i64> %va, i64 %b, <8 x i1> %m, i32 zeroext %evl) {
896; RV32-LABEL: vmax_vx_v8i64:
897; RV32:       # %bb.0:
898; RV32-NEXT:    addi sp, sp, -16
899; RV32-NEXT:    .cfi_def_cfa_offset 16
900; RV32-NEXT:    sw a0, 8(sp)
901; RV32-NEXT:    sw a1, 12(sp)
902; RV32-NEXT:    addi a0, sp, 8
903; RV32-NEXT:    vsetivli zero, 8, e64, m4, ta, ma
904; RV32-NEXT:    vlse64.v v12, (a0), zero
905; RV32-NEXT:    vsetvli zero, a2, e64, m4, ta, ma
906; RV32-NEXT:    vmax.vv v8, v8, v12, v0.t
907; RV32-NEXT:    addi sp, sp, 16
908; RV32-NEXT:    .cfi_def_cfa_offset 0
909; RV32-NEXT:    ret
910;
911; RV64-LABEL: vmax_vx_v8i64:
912; RV64:       # %bb.0:
913; RV64-NEXT:    vsetvli zero, a1, e64, m4, ta, ma
914; RV64-NEXT:    vmax.vx v8, v8, a0, v0.t
915; RV64-NEXT:    ret
916  %elt.head = insertelement <8 x i64> poison, i64 %b, i32 0
917  %vb = shufflevector <8 x i64> %elt.head, <8 x i64> poison, <8 x i32> zeroinitializer
918  %v = call <8 x i64> @llvm.vp.smax.v8i64(<8 x i64> %va, <8 x i64> %vb, <8 x i1> %m, i32 %evl)
919  ret <8 x i64> %v
920}
921
922define <8 x i64> @vmax_vx_v8i64_unmasked(<8 x i64> %va, i64 %b, i32 zeroext %evl) {
923; RV32-LABEL: vmax_vx_v8i64_unmasked:
924; RV32:       # %bb.0:
925; RV32-NEXT:    addi sp, sp, -16
926; RV32-NEXT:    .cfi_def_cfa_offset 16
927; RV32-NEXT:    sw a0, 8(sp)
928; RV32-NEXT:    sw a1, 12(sp)
929; RV32-NEXT:    addi a0, sp, 8
930; RV32-NEXT:    vsetivli zero, 8, e64, m4, ta, ma
931; RV32-NEXT:    vlse64.v v12, (a0), zero
932; RV32-NEXT:    vsetvli zero, a2, e64, m4, ta, ma
933; RV32-NEXT:    vmax.vv v8, v8, v12
934; RV32-NEXT:    addi sp, sp, 16
935; RV32-NEXT:    .cfi_def_cfa_offset 0
936; RV32-NEXT:    ret
937;
938; RV64-LABEL: vmax_vx_v8i64_unmasked:
939; RV64:       # %bb.0:
940; RV64-NEXT:    vsetvli zero, a1, e64, m4, ta, ma
941; RV64-NEXT:    vmax.vx v8, v8, a0
942; RV64-NEXT:    ret
943  %elt.head = insertelement <8 x i64> poison, i64 %b, i32 0
944  %vb = shufflevector <8 x i64> %elt.head, <8 x i64> poison, <8 x i32> zeroinitializer
945  %v = call <8 x i64> @llvm.vp.smax.v8i64(<8 x i64> %va, <8 x i64> %vb, <8 x i1> splat (i1 true), i32 %evl)
946  ret <8 x i64> %v
947}
948
949declare <16 x i64> @llvm.vp.smax.v16i64(<16 x i64>, <16 x i64>, <16 x i1>, i32)
950
951define <16 x i64> @vmax_vv_v16i64(<16 x i64> %va, <16 x i64> %b, <16 x i1> %m, i32 zeroext %evl) {
952; CHECK-LABEL: vmax_vv_v16i64:
953; CHECK:       # %bb.0:
954; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma
955; CHECK-NEXT:    vmax.vv v8, v8, v16, v0.t
956; CHECK-NEXT:    ret
957  %v = call <16 x i64> @llvm.vp.smax.v16i64(<16 x i64> %va, <16 x i64> %b, <16 x i1> %m, i32 %evl)
958  ret <16 x i64> %v
959}
960
961define <16 x i64> @vmax_vv_v16i64_unmasked(<16 x i64> %va, <16 x i64> %b, i32 zeroext %evl) {
962; CHECK-LABEL: vmax_vv_v16i64_unmasked:
963; CHECK:       # %bb.0:
964; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma
965; CHECK-NEXT:    vmax.vv v8, v8, v16
966; CHECK-NEXT:    ret
967  %v = call <16 x i64> @llvm.vp.smax.v16i64(<16 x i64> %va, <16 x i64> %b, <16 x i1> splat (i1 true), i32 %evl)
968  ret <16 x i64> %v
969}
970
971define <16 x i64> @vmax_vx_v16i64(<16 x i64> %va, i64 %b, <16 x i1> %m, i32 zeroext %evl) {
972; RV32-LABEL: vmax_vx_v16i64:
973; RV32:       # %bb.0:
974; RV32-NEXT:    addi sp, sp, -16
975; RV32-NEXT:    .cfi_def_cfa_offset 16
976; RV32-NEXT:    sw a0, 8(sp)
977; RV32-NEXT:    sw a1, 12(sp)
978; RV32-NEXT:    addi a0, sp, 8
979; RV32-NEXT:    vsetivli zero, 16, e64, m8, ta, ma
980; RV32-NEXT:    vlse64.v v16, (a0), zero
981; RV32-NEXT:    vsetvli zero, a2, e64, m8, ta, ma
982; RV32-NEXT:    vmax.vv v8, v8, v16, v0.t
983; RV32-NEXT:    addi sp, sp, 16
984; RV32-NEXT:    .cfi_def_cfa_offset 0
985; RV32-NEXT:    ret
986;
987; RV64-LABEL: vmax_vx_v16i64:
988; RV64:       # %bb.0:
989; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma
990; RV64-NEXT:    vmax.vx v8, v8, a0, v0.t
991; RV64-NEXT:    ret
992  %elt.head = insertelement <16 x i64> poison, i64 %b, i32 0
993  %vb = shufflevector <16 x i64> %elt.head, <16 x i64> poison, <16 x i32> zeroinitializer
994  %v = call <16 x i64> @llvm.vp.smax.v16i64(<16 x i64> %va, <16 x i64> %vb, <16 x i1> %m, i32 %evl)
995  ret <16 x i64> %v
996}
997
998define <16 x i64> @vmax_vx_v16i64_unmasked(<16 x i64> %va, i64 %b, i32 zeroext %evl) {
999; RV32-LABEL: vmax_vx_v16i64_unmasked:
1000; RV32:       # %bb.0:
1001; RV32-NEXT:    addi sp, sp, -16
1002; RV32-NEXT:    .cfi_def_cfa_offset 16
1003; RV32-NEXT:    sw a0, 8(sp)
1004; RV32-NEXT:    sw a1, 12(sp)
1005; RV32-NEXT:    addi a0, sp, 8
1006; RV32-NEXT:    vsetivli zero, 16, e64, m8, ta, ma
1007; RV32-NEXT:    vlse64.v v16, (a0), zero
1008; RV32-NEXT:    vsetvli zero, a2, e64, m8, ta, ma
1009; RV32-NEXT:    vmax.vv v8, v8, v16
1010; RV32-NEXT:    addi sp, sp, 16
1011; RV32-NEXT:    .cfi_def_cfa_offset 0
1012; RV32-NEXT:    ret
1013;
1014; RV64-LABEL: vmax_vx_v16i64_unmasked:
1015; RV64:       # %bb.0:
1016; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma
1017; RV64-NEXT:    vmax.vx v8, v8, a0
1018; RV64-NEXT:    ret
1019  %elt.head = insertelement <16 x i64> poison, i64 %b, i32 0
1020  %vb = shufflevector <16 x i64> %elt.head, <16 x i64> poison, <16 x i32> zeroinitializer
1021  %v = call <16 x i64> @llvm.vp.smax.v16i64(<16 x i64> %va, <16 x i64> %vb, <16 x i1> splat (i1 true), i32 %evl)
1022  ret <16 x i64> %v
1023}
1024
1025; Test that split-legalization works as expected.
1026
1027declare <32 x i64> @llvm.vp.smax.v32i64(<32 x i64>, <32 x i64>, <32 x i1>, i32)
1028
1029define <32 x i64> @vmax_vx_v32i64(<32 x i64> %va, <32 x i1> %m, i32 zeroext %evl) {
1030; CHECK-LABEL: vmax_vx_v32i64:
1031; CHECK:       # %bb.0:
1032; CHECK-NEXT:    li a2, 16
1033; CHECK-NEXT:    vsetivli zero, 2, e8, mf4, ta, ma
1034; CHECK-NEXT:    vslidedown.vi v24, v0, 2
1035; CHECK-NEXT:    mv a1, a0
1036; CHECK-NEXT:    bltu a0, a2, .LBB74_2
1037; CHECK-NEXT:  # %bb.1:
1038; CHECK-NEXT:    li a1, 16
1039; CHECK-NEXT:  .LBB74_2:
1040; CHECK-NEXT:    li a2, -1
1041; CHECK-NEXT:    vsetvli zero, a1, e64, m8, ta, ma
1042; CHECK-NEXT:    vmax.vx v8, v8, a2, v0.t
1043; CHECK-NEXT:    addi a1, a0, -16
1044; CHECK-NEXT:    sltu a0, a0, a1
1045; CHECK-NEXT:    addi a0, a0, -1
1046; CHECK-NEXT:    and a0, a0, a1
1047; CHECK-NEXT:    vmv1r.v v0, v24
1048; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma
1049; CHECK-NEXT:    vmax.vx v16, v16, a2, v0.t
1050; CHECK-NEXT:    ret
1051  %v = call <32 x i64> @llvm.vp.smax.v32i64(<32 x i64> %va, <32 x i64> splat (i64 -1), <32 x i1> %m, i32 %evl)
1052  ret <32 x i64> %v
1053}
1054