xref: /llvm-project/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfsub-vp.ll (revision 8ce81f17a16b8b689895c7c093d0401a75c09882) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=riscv32 -mattr=+d,+zfh,+zvfh,+v -target-abi=ilp32d \
3; RUN:   -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,ZVFH
4; RUN: llc -mtriple=riscv64 -mattr=+d,+zfh,+zvfh,+v -target-abi=lp64d \
5; RUN:   -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,ZVFH
6; RUN: llc -mtriple=riscv32 -mattr=+d,+zfh,+zvfhmin,+v -target-abi=ilp32d \
7; RUN:   -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,ZVFHMIN
8; RUN: llc -mtriple=riscv64 -mattr=+d,+zfh,+zvfhmin,+v -target-abi=lp64d \
9; RUN:   -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,ZVFHMIN
10
11declare <2 x half> @llvm.vp.fsub.v2f16(<2 x half>, <2 x half>, <2 x i1>, i32)
12
13define <2 x half> @vfsub_vv_v2f16(<2 x half> %va, <2 x half> %b, <2 x i1> %m, i32 zeroext %evl) {
14; ZVFH-LABEL: vfsub_vv_v2f16:
15; ZVFH:       # %bb.0:
16; ZVFH-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
17; ZVFH-NEXT:    vfsub.vv v8, v8, v9, v0.t
18; ZVFH-NEXT:    ret
19;
20; ZVFHMIN-LABEL: vfsub_vv_v2f16:
21; ZVFHMIN:       # %bb.0:
22; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
23; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v9, v0.t
24; ZVFHMIN-NEXT:    vfwcvt.f.f.v v9, v8, v0.t
25; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, mf2, ta, ma
26; ZVFHMIN-NEXT:    vfsub.vv v9, v9, v10, v0.t
27; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf4, ta, ma
28; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v9, v0.t
29; ZVFHMIN-NEXT:    ret
30  %v = call <2 x half> @llvm.vp.fsub.v2f16(<2 x half> %va, <2 x half> %b, <2 x i1> %m, i32 %evl)
31  ret <2 x half> %v
32}
33
34define <2 x half> @vfsub_vv_v2f16_unmasked(<2 x half> %va, <2 x half> %b, i32 zeroext %evl) {
35; ZVFH-LABEL: vfsub_vv_v2f16_unmasked:
36; ZVFH:       # %bb.0:
37; ZVFH-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
38; ZVFH-NEXT:    vfsub.vv v8, v8, v9
39; ZVFH-NEXT:    ret
40;
41; ZVFHMIN-LABEL: vfsub_vv_v2f16_unmasked:
42; ZVFHMIN:       # %bb.0:
43; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
44; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v9
45; ZVFHMIN-NEXT:    vfwcvt.f.f.v v9, v8
46; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, mf2, ta, ma
47; ZVFHMIN-NEXT:    vfsub.vv v9, v9, v10
48; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf4, ta, ma
49; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v9
50; ZVFHMIN-NEXT:    ret
51  %v = call <2 x half> @llvm.vp.fsub.v2f16(<2 x half> %va, <2 x half> %b, <2 x i1> splat (i1 true), i32 %evl)
52  ret <2 x half> %v
53}
54
55define <2 x half> @vfsub_vf_v2f16(<2 x half> %va, half %b, <2 x i1> %m, i32 zeroext %evl) {
56; ZVFH-LABEL: vfsub_vf_v2f16:
57; ZVFH:       # %bb.0:
58; ZVFH-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
59; ZVFH-NEXT:    vfsub.vf v8, v8, fa0, v0.t
60; ZVFH-NEXT:    ret
61;
62; ZVFHMIN-LABEL: vfsub_vf_v2f16:
63; ZVFHMIN:       # %bb.0:
64; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
65; ZVFHMIN-NEXT:    vsetivli zero, 2, e16, mf4, ta, ma
66; ZVFHMIN-NEXT:    vmv.v.x v9, a1
67; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
68; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v8, v0.t
69; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v9, v0.t
70; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, mf2, ta, ma
71; ZVFHMIN-NEXT:    vfsub.vv v9, v10, v8, v0.t
72; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf4, ta, ma
73; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v9, v0.t
74; ZVFHMIN-NEXT:    ret
75  %elt.head = insertelement <2 x half> poison, half %b, i32 0
76  %vb = shufflevector <2 x half> %elt.head, <2 x half> poison, <2 x i32> zeroinitializer
77  %v = call <2 x half> @llvm.vp.fsub.v2f16(<2 x half> %va, <2 x half> %vb, <2 x i1> %m, i32 %evl)
78  ret <2 x half> %v
79}
80
81define <2 x half> @vfsub_vf_v2f16_unmasked(<2 x half> %va, half %b, i32 zeroext %evl) {
82; ZVFH-LABEL: vfsub_vf_v2f16_unmasked:
83; ZVFH:       # %bb.0:
84; ZVFH-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
85; ZVFH-NEXT:    vfsub.vf v8, v8, fa0
86; ZVFH-NEXT:    ret
87;
88; ZVFHMIN-LABEL: vfsub_vf_v2f16_unmasked:
89; ZVFHMIN:       # %bb.0:
90; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
91; ZVFHMIN-NEXT:    vsetivli zero, 2, e16, mf4, ta, ma
92; ZVFHMIN-NEXT:    vmv.v.x v9, a1
93; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
94; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v8
95; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v9
96; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, mf2, ta, ma
97; ZVFHMIN-NEXT:    vfsub.vv v9, v10, v8
98; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf4, ta, ma
99; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v9
100; ZVFHMIN-NEXT:    ret
101  %elt.head = insertelement <2 x half> poison, half %b, i32 0
102  %vb = shufflevector <2 x half> %elt.head, <2 x half> poison, <2 x i32> zeroinitializer
103  %v = call <2 x half> @llvm.vp.fsub.v2f16(<2 x half> %va, <2 x half> %vb, <2 x i1> splat (i1 true), i32 %evl)
104  ret <2 x half> %v
105}
106
107declare <3 x half> @llvm.vp.fsub.v3f16(<3 x half>, <3 x half>, <3 x i1>, i32)
108
109define <3 x half> @vfsub_vv_v3f16(<3 x half> %va, <3 x half> %b, <3 x i1> %m, i32 zeroext %evl) {
110; ZVFH-LABEL: vfsub_vv_v3f16:
111; ZVFH:       # %bb.0:
112; ZVFH-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
113; ZVFH-NEXT:    vfsub.vv v8, v8, v9, v0.t
114; ZVFH-NEXT:    ret
115;
116; ZVFHMIN-LABEL: vfsub_vv_v3f16:
117; ZVFHMIN:       # %bb.0:
118; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
119; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v9, v0.t
120; ZVFHMIN-NEXT:    vfwcvt.f.f.v v9, v8, v0.t
121; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m1, ta, ma
122; ZVFHMIN-NEXT:    vfsub.vv v9, v9, v10, v0.t
123; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf2, ta, ma
124; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v9, v0.t
125; ZVFHMIN-NEXT:    ret
126  %v = call <3 x half> @llvm.vp.fsub.v3f16(<3 x half> %va, <3 x half> %b, <3 x i1> %m, i32 %evl)
127  ret <3 x half> %v
128}
129
130declare <4 x half> @llvm.vp.fsub.v4f16(<4 x half>, <4 x half>, <4 x i1>, i32)
131
132define <4 x half> @vfsub_vv_v4f16(<4 x half> %va, <4 x half> %b, <4 x i1> %m, i32 zeroext %evl) {
133; ZVFH-LABEL: vfsub_vv_v4f16:
134; ZVFH:       # %bb.0:
135; ZVFH-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
136; ZVFH-NEXT:    vfsub.vv v8, v8, v9, v0.t
137; ZVFH-NEXT:    ret
138;
139; ZVFHMIN-LABEL: vfsub_vv_v4f16:
140; ZVFHMIN:       # %bb.0:
141; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
142; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v9, v0.t
143; ZVFHMIN-NEXT:    vfwcvt.f.f.v v9, v8, v0.t
144; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m1, ta, ma
145; ZVFHMIN-NEXT:    vfsub.vv v9, v9, v10, v0.t
146; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf2, ta, ma
147; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v9, v0.t
148; ZVFHMIN-NEXT:    ret
149  %v = call <4 x half> @llvm.vp.fsub.v4f16(<4 x half> %va, <4 x half> %b, <4 x i1> %m, i32 %evl)
150  ret <4 x half> %v
151}
152
153define <4 x half> @vfsub_vv_v4f16_unmasked(<4 x half> %va, <4 x half> %b, i32 zeroext %evl) {
154; ZVFH-LABEL: vfsub_vv_v4f16_unmasked:
155; ZVFH:       # %bb.0:
156; ZVFH-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
157; ZVFH-NEXT:    vfsub.vv v8, v8, v9
158; ZVFH-NEXT:    ret
159;
160; ZVFHMIN-LABEL: vfsub_vv_v4f16_unmasked:
161; ZVFHMIN:       # %bb.0:
162; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
163; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v9
164; ZVFHMIN-NEXT:    vfwcvt.f.f.v v9, v8
165; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m1, ta, ma
166; ZVFHMIN-NEXT:    vfsub.vv v9, v9, v10
167; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf2, ta, ma
168; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v9
169; ZVFHMIN-NEXT:    ret
170  %v = call <4 x half> @llvm.vp.fsub.v4f16(<4 x half> %va, <4 x half> %b, <4 x i1> splat (i1 true), i32 %evl)
171  ret <4 x half> %v
172}
173
174define <4 x half> @vfsub_vf_v4f16(<4 x half> %va, half %b, <4 x i1> %m, i32 zeroext %evl) {
175; ZVFH-LABEL: vfsub_vf_v4f16:
176; ZVFH:       # %bb.0:
177; ZVFH-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
178; ZVFH-NEXT:    vfsub.vf v8, v8, fa0, v0.t
179; ZVFH-NEXT:    ret
180;
181; ZVFHMIN-LABEL: vfsub_vf_v4f16:
182; ZVFHMIN:       # %bb.0:
183; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
184; ZVFHMIN-NEXT:    vsetivli zero, 4, e16, mf2, ta, ma
185; ZVFHMIN-NEXT:    vmv.v.x v9, a1
186; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
187; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v8, v0.t
188; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v9, v0.t
189; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m1, ta, ma
190; ZVFHMIN-NEXT:    vfsub.vv v9, v10, v8, v0.t
191; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf2, ta, ma
192; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v9, v0.t
193; ZVFHMIN-NEXT:    ret
194  %elt.head = insertelement <4 x half> poison, half %b, i32 0
195  %vb = shufflevector <4 x half> %elt.head, <4 x half> poison, <4 x i32> zeroinitializer
196  %v = call <4 x half> @llvm.vp.fsub.v4f16(<4 x half> %va, <4 x half> %vb, <4 x i1> %m, i32 %evl)
197  ret <4 x half> %v
198}
199
200define <4 x half> @vfsub_vf_v4f16_unmasked(<4 x half> %va, half %b, i32 zeroext %evl) {
201; ZVFH-LABEL: vfsub_vf_v4f16_unmasked:
202; ZVFH:       # %bb.0:
203; ZVFH-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
204; ZVFH-NEXT:    vfsub.vf v8, v8, fa0
205; ZVFH-NEXT:    ret
206;
207; ZVFHMIN-LABEL: vfsub_vf_v4f16_unmasked:
208; ZVFHMIN:       # %bb.0:
209; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
210; ZVFHMIN-NEXT:    vsetivli zero, 4, e16, mf2, ta, ma
211; ZVFHMIN-NEXT:    vmv.v.x v9, a1
212; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
213; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v8
214; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v9
215; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m1, ta, ma
216; ZVFHMIN-NEXT:    vfsub.vv v9, v10, v8
217; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf2, ta, ma
218; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v9
219; ZVFHMIN-NEXT:    ret
220  %elt.head = insertelement <4 x half> poison, half %b, i32 0
221  %vb = shufflevector <4 x half> %elt.head, <4 x half> poison, <4 x i32> zeroinitializer
222  %v = call <4 x half> @llvm.vp.fsub.v4f16(<4 x half> %va, <4 x half> %vb, <4 x i1> splat (i1 true), i32 %evl)
223  ret <4 x half> %v
224}
225
226declare <8 x half> @llvm.vp.fsub.v8f16(<8 x half>, <8 x half>, <8 x i1>, i32)
227
228define <8 x half> @vfsub_vv_v8f16(<8 x half> %va, <8 x half> %b, <8 x i1> %m, i32 zeroext %evl) {
229; ZVFH-LABEL: vfsub_vv_v8f16:
230; ZVFH:       # %bb.0:
231; ZVFH-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
232; ZVFH-NEXT:    vfsub.vv v8, v8, v9, v0.t
233; ZVFH-NEXT:    ret
234;
235; ZVFHMIN-LABEL: vfsub_vv_v8f16:
236; ZVFHMIN:       # %bb.0:
237; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
238; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v9, v0.t
239; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v8, v0.t
240; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m2, ta, ma
241; ZVFHMIN-NEXT:    vfsub.vv v10, v12, v10, v0.t
242; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m1, ta, ma
243; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v10, v0.t
244; ZVFHMIN-NEXT:    ret
245  %v = call <8 x half> @llvm.vp.fsub.v8f16(<8 x half> %va, <8 x half> %b, <8 x i1> %m, i32 %evl)
246  ret <8 x half> %v
247}
248
249define <8 x half> @vfsub_vv_v8f16_unmasked(<8 x half> %va, <8 x half> %b, i32 zeroext %evl) {
250; ZVFH-LABEL: vfsub_vv_v8f16_unmasked:
251; ZVFH:       # %bb.0:
252; ZVFH-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
253; ZVFH-NEXT:    vfsub.vv v8, v8, v9
254; ZVFH-NEXT:    ret
255;
256; ZVFHMIN-LABEL: vfsub_vv_v8f16_unmasked:
257; ZVFHMIN:       # %bb.0:
258; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
259; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v9
260; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v8
261; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m2, ta, ma
262; ZVFHMIN-NEXT:    vfsub.vv v10, v12, v10
263; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m1, ta, ma
264; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v10
265; ZVFHMIN-NEXT:    ret
266  %v = call <8 x half> @llvm.vp.fsub.v8f16(<8 x half> %va, <8 x half> %b, <8 x i1> splat (i1 true), i32 %evl)
267  ret <8 x half> %v
268}
269
270define <8 x half> @vfsub_vf_v8f16(<8 x half> %va, half %b, <8 x i1> %m, i32 zeroext %evl) {
271; ZVFH-LABEL: vfsub_vf_v8f16:
272; ZVFH:       # %bb.0:
273; ZVFH-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
274; ZVFH-NEXT:    vfsub.vf v8, v8, fa0, v0.t
275; ZVFH-NEXT:    ret
276;
277; ZVFHMIN-LABEL: vfsub_vf_v8f16:
278; ZVFHMIN:       # %bb.0:
279; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
280; ZVFHMIN-NEXT:    vsetivli zero, 8, e16, m1, ta, ma
281; ZVFHMIN-NEXT:    vmv.v.x v9, a1
282; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
283; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v8, v0.t
284; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v9, v0.t
285; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m2, ta, ma
286; ZVFHMIN-NEXT:    vfsub.vv v10, v10, v12, v0.t
287; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m1, ta, ma
288; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v10, v0.t
289; ZVFHMIN-NEXT:    ret
290  %elt.head = insertelement <8 x half> poison, half %b, i32 0
291  %vb = shufflevector <8 x half> %elt.head, <8 x half> poison, <8 x i32> zeroinitializer
292  %v = call <8 x half> @llvm.vp.fsub.v8f16(<8 x half> %va, <8 x half> %vb, <8 x i1> %m, i32 %evl)
293  ret <8 x half> %v
294}
295
296define <8 x half> @vfsub_vf_v8f16_unmasked(<8 x half> %va, half %b, i32 zeroext %evl) {
297; ZVFH-LABEL: vfsub_vf_v8f16_unmasked:
298; ZVFH:       # %bb.0:
299; ZVFH-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
300; ZVFH-NEXT:    vfsub.vf v8, v8, fa0
301; ZVFH-NEXT:    ret
302;
303; ZVFHMIN-LABEL: vfsub_vf_v8f16_unmasked:
304; ZVFHMIN:       # %bb.0:
305; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
306; ZVFHMIN-NEXT:    vsetivli zero, 8, e16, m1, ta, ma
307; ZVFHMIN-NEXT:    vmv.v.x v9, a1
308; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
309; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v8
310; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v9
311; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m2, ta, ma
312; ZVFHMIN-NEXT:    vfsub.vv v10, v10, v12
313; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m1, ta, ma
314; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v10
315; ZVFHMIN-NEXT:    ret
316  %elt.head = insertelement <8 x half> poison, half %b, i32 0
317  %vb = shufflevector <8 x half> %elt.head, <8 x half> poison, <8 x i32> zeroinitializer
318  %v = call <8 x half> @llvm.vp.fsub.v8f16(<8 x half> %va, <8 x half> %vb, <8 x i1> splat (i1 true), i32 %evl)
319  ret <8 x half> %v
320}
321
322declare <16 x half> @llvm.vp.fsub.v16f16(<16 x half>, <16 x half>, <16 x i1>, i32)
323
324define <16 x half> @vfsub_vv_v16f16(<16 x half> %va, <16 x half> %b, <16 x i1> %m, i32 zeroext %evl) {
325; ZVFH-LABEL: vfsub_vv_v16f16:
326; ZVFH:       # %bb.0:
327; ZVFH-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
328; ZVFH-NEXT:    vfsub.vv v8, v8, v10, v0.t
329; ZVFH-NEXT:    ret
330;
331; ZVFHMIN-LABEL: vfsub_vv_v16f16:
332; ZVFHMIN:       # %bb.0:
333; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
334; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v10, v0.t
335; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v8, v0.t
336; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m4, ta, ma
337; ZVFHMIN-NEXT:    vfsub.vv v12, v16, v12, v0.t
338; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m2, ta, ma
339; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v12, v0.t
340; ZVFHMIN-NEXT:    ret
341  %v = call <16 x half> @llvm.vp.fsub.v16f16(<16 x half> %va, <16 x half> %b, <16 x i1> %m, i32 %evl)
342  ret <16 x half> %v
343}
344
345define <16 x half> @vfsub_vv_v16f16_unmasked(<16 x half> %va, <16 x half> %b, i32 zeroext %evl) {
346; ZVFH-LABEL: vfsub_vv_v16f16_unmasked:
347; ZVFH:       # %bb.0:
348; ZVFH-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
349; ZVFH-NEXT:    vfsub.vv v8, v8, v10
350; ZVFH-NEXT:    ret
351;
352; ZVFHMIN-LABEL: vfsub_vv_v16f16_unmasked:
353; ZVFHMIN:       # %bb.0:
354; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
355; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v10
356; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v8
357; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m4, ta, ma
358; ZVFHMIN-NEXT:    vfsub.vv v12, v16, v12
359; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m2, ta, ma
360; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v12
361; ZVFHMIN-NEXT:    ret
362  %v = call <16 x half> @llvm.vp.fsub.v16f16(<16 x half> %va, <16 x half> %b, <16 x i1> splat (i1 true), i32 %evl)
363  ret <16 x half> %v
364}
365
366define <16 x half> @vfsub_vf_v16f16(<16 x half> %va, half %b, <16 x i1> %m, i32 zeroext %evl) {
367; ZVFH-LABEL: vfsub_vf_v16f16:
368; ZVFH:       # %bb.0:
369; ZVFH-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
370; ZVFH-NEXT:    vfsub.vf v8, v8, fa0, v0.t
371; ZVFH-NEXT:    ret
372;
373; ZVFHMIN-LABEL: vfsub_vf_v16f16:
374; ZVFHMIN:       # %bb.0:
375; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
376; ZVFHMIN-NEXT:    vsetivli zero, 16, e16, m2, ta, ma
377; ZVFHMIN-NEXT:    vmv.v.x v10, a1
378; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
379; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v8, v0.t
380; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v10, v0.t
381; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m4, ta, ma
382; ZVFHMIN-NEXT:    vfsub.vv v12, v12, v16, v0.t
383; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m2, ta, ma
384; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v12, v0.t
385; ZVFHMIN-NEXT:    ret
386  %elt.head = insertelement <16 x half> poison, half %b, i32 0
387  %vb = shufflevector <16 x half> %elt.head, <16 x half> poison, <16 x i32> zeroinitializer
388  %v = call <16 x half> @llvm.vp.fsub.v16f16(<16 x half> %va, <16 x half> %vb, <16 x i1> %m, i32 %evl)
389  ret <16 x half> %v
390}
391
392define <16 x half> @vfsub_vf_v16f16_unmasked(<16 x half> %va, half %b, i32 zeroext %evl) {
393; ZVFH-LABEL: vfsub_vf_v16f16_unmasked:
394; ZVFH:       # %bb.0:
395; ZVFH-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
396; ZVFH-NEXT:    vfsub.vf v8, v8, fa0
397; ZVFH-NEXT:    ret
398;
399; ZVFHMIN-LABEL: vfsub_vf_v16f16_unmasked:
400; ZVFHMIN:       # %bb.0:
401; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
402; ZVFHMIN-NEXT:    vsetivli zero, 16, e16, m2, ta, ma
403; ZVFHMIN-NEXT:    vmv.v.x v10, a1
404; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
405; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v8
406; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v10
407; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m4, ta, ma
408; ZVFHMIN-NEXT:    vfsub.vv v12, v12, v16
409; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m2, ta, ma
410; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v12
411; ZVFHMIN-NEXT:    ret
412  %elt.head = insertelement <16 x half> poison, half %b, i32 0
413  %vb = shufflevector <16 x half> %elt.head, <16 x half> poison, <16 x i32> zeroinitializer
414  %v = call <16 x half> @llvm.vp.fsub.v16f16(<16 x half> %va, <16 x half> %vb, <16 x i1> splat (i1 true), i32 %evl)
415  ret <16 x half> %v
416}
417
418declare <2 x float> @llvm.vp.fsub.v2f32(<2 x float>, <2 x float>, <2 x i1>, i32)
419
420define <2 x float> @vfsub_vv_v2f32(<2 x float> %va, <2 x float> %b, <2 x i1> %m, i32 zeroext %evl) {
421; CHECK-LABEL: vfsub_vv_v2f32:
422; CHECK:       # %bb.0:
423; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma
424; CHECK-NEXT:    vfsub.vv v8, v8, v9, v0.t
425; CHECK-NEXT:    ret
426  %v = call <2 x float> @llvm.vp.fsub.v2f32(<2 x float> %va, <2 x float> %b, <2 x i1> %m, i32 %evl)
427  ret <2 x float> %v
428}
429
430define <2 x float> @vfsub_vv_v2f32_unmasked(<2 x float> %va, <2 x float> %b, i32 zeroext %evl) {
431; CHECK-LABEL: vfsub_vv_v2f32_unmasked:
432; CHECK:       # %bb.0:
433; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma
434; CHECK-NEXT:    vfsub.vv v8, v8, v9
435; CHECK-NEXT:    ret
436  %v = call <2 x float> @llvm.vp.fsub.v2f32(<2 x float> %va, <2 x float> %b, <2 x i1> splat (i1 true), i32 %evl)
437  ret <2 x float> %v
438}
439
440define <2 x float> @vfsub_vf_v2f32(<2 x float> %va, float %b, <2 x i1> %m, i32 zeroext %evl) {
441; CHECK-LABEL: vfsub_vf_v2f32:
442; CHECK:       # %bb.0:
443; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma
444; CHECK-NEXT:    vfsub.vf v8, v8, fa0, v0.t
445; CHECK-NEXT:    ret
446  %elt.head = insertelement <2 x float> poison, float %b, i32 0
447  %vb = shufflevector <2 x float> %elt.head, <2 x float> poison, <2 x i32> zeroinitializer
448  %v = call <2 x float> @llvm.vp.fsub.v2f32(<2 x float> %va, <2 x float> %vb, <2 x i1> %m, i32 %evl)
449  ret <2 x float> %v
450}
451
452define <2 x float> @vfsub_vf_v2f32_unmasked(<2 x float> %va, float %b, i32 zeroext %evl) {
453; CHECK-LABEL: vfsub_vf_v2f32_unmasked:
454; CHECK:       # %bb.0:
455; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma
456; CHECK-NEXT:    vfsub.vf v8, v8, fa0
457; CHECK-NEXT:    ret
458  %elt.head = insertelement <2 x float> poison, float %b, i32 0
459  %vb = shufflevector <2 x float> %elt.head, <2 x float> poison, <2 x i32> zeroinitializer
460  %v = call <2 x float> @llvm.vp.fsub.v2f32(<2 x float> %va, <2 x float> %vb, <2 x i1> splat (i1 true), i32 %evl)
461  ret <2 x float> %v
462}
463
464declare <4 x float> @llvm.vp.fsub.v4f32(<4 x float>, <4 x float>, <4 x i1>, i32)
465
466define <4 x float> @vfsub_vv_v4f32(<4 x float> %va, <4 x float> %b, <4 x i1> %m, i32 zeroext %evl) {
467; CHECK-LABEL: vfsub_vv_v4f32:
468; CHECK:       # %bb.0:
469; CHECK-NEXT:    vsetvli zero, a0, e32, m1, ta, ma
470; CHECK-NEXT:    vfsub.vv v8, v8, v9, v0.t
471; CHECK-NEXT:    ret
472  %v = call <4 x float> @llvm.vp.fsub.v4f32(<4 x float> %va, <4 x float> %b, <4 x i1> %m, i32 %evl)
473  ret <4 x float> %v
474}
475
476define <4 x float> @vfsub_vv_v4f32_unmasked(<4 x float> %va, <4 x float> %b, i32 zeroext %evl) {
477; CHECK-LABEL: vfsub_vv_v4f32_unmasked:
478; CHECK:       # %bb.0:
479; CHECK-NEXT:    vsetvli zero, a0, e32, m1, ta, ma
480; CHECK-NEXT:    vfsub.vv v8, v8, v9
481; CHECK-NEXT:    ret
482  %v = call <4 x float> @llvm.vp.fsub.v4f32(<4 x float> %va, <4 x float> %b, <4 x i1> splat (i1 true), i32 %evl)
483  ret <4 x float> %v
484}
485
486define <4 x float> @vfsub_vf_v4f32(<4 x float> %va, float %b, <4 x i1> %m, i32 zeroext %evl) {
487; CHECK-LABEL: vfsub_vf_v4f32:
488; CHECK:       # %bb.0:
489; CHECK-NEXT:    vsetvli zero, a0, e32, m1, ta, ma
490; CHECK-NEXT:    vfsub.vf v8, v8, fa0, v0.t
491; CHECK-NEXT:    ret
492  %elt.head = insertelement <4 x float> poison, float %b, i32 0
493  %vb = shufflevector <4 x float> %elt.head, <4 x float> poison, <4 x i32> zeroinitializer
494  %v = call <4 x float> @llvm.vp.fsub.v4f32(<4 x float> %va, <4 x float> %vb, <4 x i1> %m, i32 %evl)
495  ret <4 x float> %v
496}
497
498define <4 x float> @vfsub_vf_v4f32_unmasked(<4 x float> %va, float %b, i32 zeroext %evl) {
499; CHECK-LABEL: vfsub_vf_v4f32_unmasked:
500; CHECK:       # %bb.0:
501; CHECK-NEXT:    vsetvli zero, a0, e32, m1, ta, ma
502; CHECK-NEXT:    vfsub.vf v8, v8, fa0
503; CHECK-NEXT:    ret
504  %elt.head = insertelement <4 x float> poison, float %b, i32 0
505  %vb = shufflevector <4 x float> %elt.head, <4 x float> poison, <4 x i32> zeroinitializer
506  %v = call <4 x float> @llvm.vp.fsub.v4f32(<4 x float> %va, <4 x float> %vb, <4 x i1> splat (i1 true), i32 %evl)
507  ret <4 x float> %v
508}
509
510declare <8 x float> @llvm.vp.fsub.v8f32(<8 x float>, <8 x float>, <8 x i1>, i32)
511
512define <8 x float> @vfsub_vv_v8f32(<8 x float> %va, <8 x float> %b, <8 x i1> %m, i32 zeroext %evl) {
513; CHECK-LABEL: vfsub_vv_v8f32:
514; CHECK:       # %bb.0:
515; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma
516; CHECK-NEXT:    vfsub.vv v8, v8, v10, v0.t
517; CHECK-NEXT:    ret
518  %v = call <8 x float> @llvm.vp.fsub.v8f32(<8 x float> %va, <8 x float> %b, <8 x i1> %m, i32 %evl)
519  ret <8 x float> %v
520}
521
522define <8 x float> @vfsub_vv_v8f32_unmasked(<8 x float> %va, <8 x float> %b, i32 zeroext %evl) {
523; CHECK-LABEL: vfsub_vv_v8f32_unmasked:
524; CHECK:       # %bb.0:
525; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma
526; CHECK-NEXT:    vfsub.vv v8, v8, v10
527; CHECK-NEXT:    ret
528  %v = call <8 x float> @llvm.vp.fsub.v8f32(<8 x float> %va, <8 x float> %b, <8 x i1> splat (i1 true), i32 %evl)
529  ret <8 x float> %v
530}
531
532define <8 x float> @vfsub_vf_v8f32(<8 x float> %va, float %b, <8 x i1> %m, i32 zeroext %evl) {
533; CHECK-LABEL: vfsub_vf_v8f32:
534; CHECK:       # %bb.0:
535; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma
536; CHECK-NEXT:    vfsub.vf v8, v8, fa0, v0.t
537; CHECK-NEXT:    ret
538  %elt.head = insertelement <8 x float> poison, float %b, i32 0
539  %vb = shufflevector <8 x float> %elt.head, <8 x float> poison, <8 x i32> zeroinitializer
540  %v = call <8 x float> @llvm.vp.fsub.v8f32(<8 x float> %va, <8 x float> %vb, <8 x i1> %m, i32 %evl)
541  ret <8 x float> %v
542}
543
544define <8 x float> @vfsub_vf_v8f32_unmasked(<8 x float> %va, float %b, i32 zeroext %evl) {
545; CHECK-LABEL: vfsub_vf_v8f32_unmasked:
546; CHECK:       # %bb.0:
547; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma
548; CHECK-NEXT:    vfsub.vf v8, v8, fa0
549; CHECK-NEXT:    ret
550  %elt.head = insertelement <8 x float> poison, float %b, i32 0
551  %vb = shufflevector <8 x float> %elt.head, <8 x float> poison, <8 x i32> zeroinitializer
552  %v = call <8 x float> @llvm.vp.fsub.v8f32(<8 x float> %va, <8 x float> %vb, <8 x i1> splat (i1 true), i32 %evl)
553  ret <8 x float> %v
554}
555
556declare <16 x float> @llvm.vp.fsub.v16f32(<16 x float>, <16 x float>, <16 x i1>, i32)
557
558define <16 x float> @vfsub_vv_v16f32(<16 x float> %va, <16 x float> %b, <16 x i1> %m, i32 zeroext %evl) {
559; CHECK-LABEL: vfsub_vv_v16f32:
560; CHECK:       # %bb.0:
561; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma
562; CHECK-NEXT:    vfsub.vv v8, v8, v12, v0.t
563; CHECK-NEXT:    ret
564  %v = call <16 x float> @llvm.vp.fsub.v16f32(<16 x float> %va, <16 x float> %b, <16 x i1> %m, i32 %evl)
565  ret <16 x float> %v
566}
567
568define <16 x float> @vfsub_vv_v16f32_unmasked(<16 x float> %va, <16 x float> %b, i32 zeroext %evl) {
569; CHECK-LABEL: vfsub_vv_v16f32_unmasked:
570; CHECK:       # %bb.0:
571; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma
572; CHECK-NEXT:    vfsub.vv v8, v8, v12
573; CHECK-NEXT:    ret
574  %v = call <16 x float> @llvm.vp.fsub.v16f32(<16 x float> %va, <16 x float> %b, <16 x i1> splat (i1 true), i32 %evl)
575  ret <16 x float> %v
576}
577
578define <16 x float> @vfsub_vf_v16f32(<16 x float> %va, float %b, <16 x i1> %m, i32 zeroext %evl) {
579; CHECK-LABEL: vfsub_vf_v16f32:
580; CHECK:       # %bb.0:
581; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma
582; CHECK-NEXT:    vfsub.vf v8, v8, fa0, v0.t
583; CHECK-NEXT:    ret
584  %elt.head = insertelement <16 x float> poison, float %b, i32 0
585  %vb = shufflevector <16 x float> %elt.head, <16 x float> poison, <16 x i32> zeroinitializer
586  %v = call <16 x float> @llvm.vp.fsub.v16f32(<16 x float> %va, <16 x float> %vb, <16 x i1> %m, i32 %evl)
587  ret <16 x float> %v
588}
589
590define <16 x float> @vfsub_vf_v16f32_unmasked(<16 x float> %va, float %b, i32 zeroext %evl) {
591; CHECK-LABEL: vfsub_vf_v16f32_unmasked:
592; CHECK:       # %bb.0:
593; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma
594; CHECK-NEXT:    vfsub.vf v8, v8, fa0
595; CHECK-NEXT:    ret
596  %elt.head = insertelement <16 x float> poison, float %b, i32 0
597  %vb = shufflevector <16 x float> %elt.head, <16 x float> poison, <16 x i32> zeroinitializer
598  %v = call <16 x float> @llvm.vp.fsub.v16f32(<16 x float> %va, <16 x float> %vb, <16 x i1> splat (i1 true), i32 %evl)
599  ret <16 x float> %v
600}
601
602declare <2 x double> @llvm.vp.fsub.v2f64(<2 x double>, <2 x double>, <2 x i1>, i32)
603
604define <2 x double> @vfsub_vv_v2f64(<2 x double> %va, <2 x double> %b, <2 x i1> %m, i32 zeroext %evl) {
605; CHECK-LABEL: vfsub_vv_v2f64:
606; CHECK:       # %bb.0:
607; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma
608; CHECK-NEXT:    vfsub.vv v8, v8, v9, v0.t
609; CHECK-NEXT:    ret
610  %v = call <2 x double> @llvm.vp.fsub.v2f64(<2 x double> %va, <2 x double> %b, <2 x i1> %m, i32 %evl)
611  ret <2 x double> %v
612}
613
614define <2 x double> @vfsub_vv_v2f64_unmasked(<2 x double> %va, <2 x double> %b, i32 zeroext %evl) {
615; CHECK-LABEL: vfsub_vv_v2f64_unmasked:
616; CHECK:       # %bb.0:
617; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma
618; CHECK-NEXT:    vfsub.vv v8, v8, v9
619; CHECK-NEXT:    ret
620  %v = call <2 x double> @llvm.vp.fsub.v2f64(<2 x double> %va, <2 x double> %b, <2 x i1> splat (i1 true), i32 %evl)
621  ret <2 x double> %v
622}
623
624define <2 x double> @vfsub_vf_v2f64(<2 x double> %va, double %b, <2 x i1> %m, i32 zeroext %evl) {
625; CHECK-LABEL: vfsub_vf_v2f64:
626; CHECK:       # %bb.0:
627; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma
628; CHECK-NEXT:    vfsub.vf v8, v8, fa0, v0.t
629; CHECK-NEXT:    ret
630  %elt.head = insertelement <2 x double> poison, double %b, i32 0
631  %vb = shufflevector <2 x double> %elt.head, <2 x double> poison, <2 x i32> zeroinitializer
632  %v = call <2 x double> @llvm.vp.fsub.v2f64(<2 x double> %va, <2 x double> %vb, <2 x i1> %m, i32 %evl)
633  ret <2 x double> %v
634}
635
636define <2 x double> @vfsub_vf_v2f64_unmasked(<2 x double> %va, double %b, i32 zeroext %evl) {
637; CHECK-LABEL: vfsub_vf_v2f64_unmasked:
638; CHECK:       # %bb.0:
639; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma
640; CHECK-NEXT:    vfsub.vf v8, v8, fa0
641; CHECK-NEXT:    ret
642  %elt.head = insertelement <2 x double> poison, double %b, i32 0
643  %vb = shufflevector <2 x double> %elt.head, <2 x double> poison, <2 x i32> zeroinitializer
644  %v = call <2 x double> @llvm.vp.fsub.v2f64(<2 x double> %va, <2 x double> %vb, <2 x i1> splat (i1 true), i32 %evl)
645  ret <2 x double> %v
646}
647
648declare <4 x double> @llvm.vp.fsub.v4f64(<4 x double>, <4 x double>, <4 x i1>, i32)
649
650define <4 x double> @vfsub_vv_v4f64(<4 x double> %va, <4 x double> %b, <4 x i1> %m, i32 zeroext %evl) {
651; CHECK-LABEL: vfsub_vv_v4f64:
652; CHECK:       # %bb.0:
653; CHECK-NEXT:    vsetvli zero, a0, e64, m2, ta, ma
654; CHECK-NEXT:    vfsub.vv v8, v8, v10, v0.t
655; CHECK-NEXT:    ret
656  %v = call <4 x double> @llvm.vp.fsub.v4f64(<4 x double> %va, <4 x double> %b, <4 x i1> %m, i32 %evl)
657  ret <4 x double> %v
658}
659
660define <4 x double> @vfsub_vv_v4f64_unmasked(<4 x double> %va, <4 x double> %b, i32 zeroext %evl) {
661; CHECK-LABEL: vfsub_vv_v4f64_unmasked:
662; CHECK:       # %bb.0:
663; CHECK-NEXT:    vsetvli zero, a0, e64, m2, ta, ma
664; CHECK-NEXT:    vfsub.vv v8, v8, v10
665; CHECK-NEXT:    ret
666  %v = call <4 x double> @llvm.vp.fsub.v4f64(<4 x double> %va, <4 x double> %b, <4 x i1> splat (i1 true), i32 %evl)
667  ret <4 x double> %v
668}
669
670define <4 x double> @vfsub_vf_v4f64(<4 x double> %va, double %b, <4 x i1> %m, i32 zeroext %evl) {
671; CHECK-LABEL: vfsub_vf_v4f64:
672; CHECK:       # %bb.0:
673; CHECK-NEXT:    vsetvli zero, a0, e64, m2, ta, ma
674; CHECK-NEXT:    vfsub.vf v8, v8, fa0, v0.t
675; CHECK-NEXT:    ret
676  %elt.head = insertelement <4 x double> poison, double %b, i32 0
677  %vb = shufflevector <4 x double> %elt.head, <4 x double> poison, <4 x i32> zeroinitializer
678  %v = call <4 x double> @llvm.vp.fsub.v4f64(<4 x double> %va, <4 x double> %vb, <4 x i1> %m, i32 %evl)
679  ret <4 x double> %v
680}
681
682define <4 x double> @vfsub_vf_v4f64_unmasked(<4 x double> %va, double %b, i32 zeroext %evl) {
683; CHECK-LABEL: vfsub_vf_v4f64_unmasked:
684; CHECK:       # %bb.0:
685; CHECK-NEXT:    vsetvli zero, a0, e64, m2, ta, ma
686; CHECK-NEXT:    vfsub.vf v8, v8, fa0
687; CHECK-NEXT:    ret
688  %elt.head = insertelement <4 x double> poison, double %b, i32 0
689  %vb = shufflevector <4 x double> %elt.head, <4 x double> poison, <4 x i32> zeroinitializer
690  %v = call <4 x double> @llvm.vp.fsub.v4f64(<4 x double> %va, <4 x double> %vb, <4 x i1> splat (i1 true), i32 %evl)
691  ret <4 x double> %v
692}
693
694declare <8 x double> @llvm.vp.fsub.v8f64(<8 x double>, <8 x double>, <8 x i1>, i32)
695
696define <8 x double> @vfsub_vv_v8f64(<8 x double> %va, <8 x double> %b, <8 x i1> %m, i32 zeroext %evl) {
697; CHECK-LABEL: vfsub_vv_v8f64:
698; CHECK:       # %bb.0:
699; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
700; CHECK-NEXT:    vfsub.vv v8, v8, v12, v0.t
701; CHECK-NEXT:    ret
702  %v = call <8 x double> @llvm.vp.fsub.v8f64(<8 x double> %va, <8 x double> %b, <8 x i1> %m, i32 %evl)
703  ret <8 x double> %v
704}
705
706define <8 x double> @vfsub_vv_v8f64_unmasked(<8 x double> %va, <8 x double> %b, i32 zeroext %evl) {
707; CHECK-LABEL: vfsub_vv_v8f64_unmasked:
708; CHECK:       # %bb.0:
709; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
710; CHECK-NEXT:    vfsub.vv v8, v8, v12
711; CHECK-NEXT:    ret
712  %v = call <8 x double> @llvm.vp.fsub.v8f64(<8 x double> %va, <8 x double> %b, <8 x i1> splat (i1 true), i32 %evl)
713  ret <8 x double> %v
714}
715
716define <8 x double> @vfsub_vf_v8f64(<8 x double> %va, double %b, <8 x i1> %m, i32 zeroext %evl) {
717; CHECK-LABEL: vfsub_vf_v8f64:
718; CHECK:       # %bb.0:
719; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
720; CHECK-NEXT:    vfsub.vf v8, v8, fa0, v0.t
721; CHECK-NEXT:    ret
722  %elt.head = insertelement <8 x double> poison, double %b, i32 0
723  %vb = shufflevector <8 x double> %elt.head, <8 x double> poison, <8 x i32> zeroinitializer
724  %v = call <8 x double> @llvm.vp.fsub.v8f64(<8 x double> %va, <8 x double> %vb, <8 x i1> %m, i32 %evl)
725  ret <8 x double> %v
726}
727
728define <8 x double> @vfsub_vf_v8f64_unmasked(<8 x double> %va, double %b, i32 zeroext %evl) {
729; CHECK-LABEL: vfsub_vf_v8f64_unmasked:
730; CHECK:       # %bb.0:
731; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
732; CHECK-NEXT:    vfsub.vf v8, v8, fa0
733; CHECK-NEXT:    ret
734  %elt.head = insertelement <8 x double> poison, double %b, i32 0
735  %vb = shufflevector <8 x double> %elt.head, <8 x double> poison, <8 x i32> zeroinitializer
736  %v = call <8 x double> @llvm.vp.fsub.v8f64(<8 x double> %va, <8 x double> %vb, <8 x i1> splat (i1 true), i32 %evl)
737  ret <8 x double> %v
738}
739
740declare <16 x double> @llvm.vp.fsub.v16f64(<16 x double>, <16 x double>, <16 x i1>, i32)
741
742define <16 x double> @vfsub_vv_v16f64(<16 x double> %va, <16 x double> %b, <16 x i1> %m, i32 zeroext %evl) {
743; CHECK-LABEL: vfsub_vv_v16f64:
744; CHECK:       # %bb.0:
745; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma
746; CHECK-NEXT:    vfsub.vv v8, v8, v16, v0.t
747; CHECK-NEXT:    ret
748  %v = call <16 x double> @llvm.vp.fsub.v16f64(<16 x double> %va, <16 x double> %b, <16 x i1> %m, i32 %evl)
749  ret <16 x double> %v
750}
751
752define <16 x double> @vfsub_vv_v16f64_unmasked(<16 x double> %va, <16 x double> %b, i32 zeroext %evl) {
753; CHECK-LABEL: vfsub_vv_v16f64_unmasked:
754; CHECK:       # %bb.0:
755; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma
756; CHECK-NEXT:    vfsub.vv v8, v8, v16
757; CHECK-NEXT:    ret
758  %v = call <16 x double> @llvm.vp.fsub.v16f64(<16 x double> %va, <16 x double> %b, <16 x i1> splat (i1 true), i32 %evl)
759  ret <16 x double> %v
760}
761
762define <16 x double> @vfsub_vf_v16f64(<16 x double> %va, double %b, <16 x i1> %m, i32 zeroext %evl) {
763; CHECK-LABEL: vfsub_vf_v16f64:
764; CHECK:       # %bb.0:
765; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma
766; CHECK-NEXT:    vfsub.vf v8, v8, fa0, v0.t
767; CHECK-NEXT:    ret
768  %elt.head = insertelement <16 x double> poison, double %b, i32 0
769  %vb = shufflevector <16 x double> %elt.head, <16 x double> poison, <16 x i32> zeroinitializer
770  %v = call <16 x double> @llvm.vp.fsub.v16f64(<16 x double> %va, <16 x double> %vb, <16 x i1> %m, i32 %evl)
771  ret <16 x double> %v
772}
773
774define <16 x double> @vfsub_vf_v16f64_unmasked(<16 x double> %va, double %b, i32 zeroext %evl) {
775; CHECK-LABEL: vfsub_vf_v16f64_unmasked:
776; CHECK:       # %bb.0:
777; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma
778; CHECK-NEXT:    vfsub.vf v8, v8, fa0
779; CHECK-NEXT:    ret
780  %elt.head = insertelement <16 x double> poison, double %b, i32 0
781  %vb = shufflevector <16 x double> %elt.head, <16 x double> poison, <16 x i32> zeroinitializer
782  %v = call <16 x double> @llvm.vp.fsub.v16f64(<16 x double> %va, <16 x double> %vb, <16 x i1> splat (i1 true), i32 %evl)
783  ret <16 x double> %v
784}
785