xref: /llvm-project/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfadd-vp.ll (revision 8ce81f17a16b8b689895c7c093d0401a75c09882) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=riscv32 -mattr=+d,+zfh,+zvfh,+v -target-abi=ilp32d \
3; RUN:   -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,ZVFH
4; RUN: llc -mtriple=riscv64 -mattr=+d,+zfh,+zvfh,+v -target-abi=lp64d \
5; RUN:   -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,ZVFH
6; RUN: llc -mtriple=riscv32 -mattr=+d,+zfh,+zvfhmin,+v -target-abi=ilp32d \
7; RUN:   -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,ZVFHMIN
8; RUN: llc -mtriple=riscv64 -mattr=+d,+zfh,+zvfhmin,+v -target-abi=lp64d \
9; RUN:   -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,ZVFHMIN
10
11declare <2 x half> @llvm.vp.fadd.v2f16(<2 x half>, <2 x half>, <2 x i1>, i32)
12
13define <2 x half> @vfadd_vv_v2f16(<2 x half> %va, <2 x half> %b, <2 x i1> %m, i32 zeroext %evl) {
14; ZVFH-LABEL: vfadd_vv_v2f16:
15; ZVFH:       # %bb.0:
16; ZVFH-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
17; ZVFH-NEXT:    vfadd.vv v8, v8, v9, v0.t
18; ZVFH-NEXT:    ret
19;
20; ZVFHMIN-LABEL: vfadd_vv_v2f16:
21; ZVFHMIN:       # %bb.0:
22; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
23; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v9, v0.t
24; ZVFHMIN-NEXT:    vfwcvt.f.f.v v9, v8, v0.t
25; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, mf2, ta, ma
26; ZVFHMIN-NEXT:    vfadd.vv v9, v9, v10, v0.t
27; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf4, ta, ma
28; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v9, v0.t
29; ZVFHMIN-NEXT:    ret
30  %v = call <2 x half> @llvm.vp.fadd.v2f16(<2 x half> %va, <2 x half> %b, <2 x i1> %m, i32 %evl)
31  ret <2 x half> %v
32}
33
34define <2 x half> @vfadd_vv_v2f16_unmasked(<2 x half> %va, <2 x half> %b, i32 zeroext %evl) {
35; ZVFH-LABEL: vfadd_vv_v2f16_unmasked:
36; ZVFH:       # %bb.0:
37; ZVFH-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
38; ZVFH-NEXT:    vfadd.vv v8, v8, v9
39; ZVFH-NEXT:    ret
40;
41; ZVFHMIN-LABEL: vfadd_vv_v2f16_unmasked:
42; ZVFHMIN:       # %bb.0:
43; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
44; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v9
45; ZVFHMIN-NEXT:    vfwcvt.f.f.v v9, v8
46; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, mf2, ta, ma
47; ZVFHMIN-NEXT:    vfadd.vv v9, v9, v10
48; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf4, ta, ma
49; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v9
50; ZVFHMIN-NEXT:    ret
51  %v = call <2 x half> @llvm.vp.fadd.v2f16(<2 x half> %va, <2 x half> %b, <2 x i1> splat (i1 true), i32 %evl)
52  ret <2 x half> %v
53}
54
55define <2 x half> @vfadd_vf_v2f16(<2 x half> %va, half %b, <2 x i1> %m, i32 zeroext %evl) {
56; ZVFH-LABEL: vfadd_vf_v2f16:
57; ZVFH:       # %bb.0:
58; ZVFH-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
59; ZVFH-NEXT:    vfadd.vf v8, v8, fa0, v0.t
60; ZVFH-NEXT:    ret
61;
62; ZVFHMIN-LABEL: vfadd_vf_v2f16:
63; ZVFHMIN:       # %bb.0:
64; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
65; ZVFHMIN-NEXT:    vsetivli zero, 2, e16, mf4, ta, ma
66; ZVFHMIN-NEXT:    vmv.v.x v9, a1
67; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
68; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v8, v0.t
69; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v9, v0.t
70; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, mf2, ta, ma
71; ZVFHMIN-NEXT:    vfadd.vv v9, v10, v8, v0.t
72; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf4, ta, ma
73; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v9, v0.t
74; ZVFHMIN-NEXT:    ret
75  %elt.head = insertelement <2 x half> poison, half %b, i32 0
76  %vb = shufflevector <2 x half> %elt.head, <2 x half> poison, <2 x i32> zeroinitializer
77  %v = call <2 x half> @llvm.vp.fadd.v2f16(<2 x half> %va, <2 x half> %vb, <2 x i1> %m, i32 %evl)
78  ret <2 x half> %v
79}
80
81define <2 x half> @vfadd_vf_v2f16_unmasked(<2 x half> %va, half %b, i32 zeroext %evl) {
82; ZVFH-LABEL: vfadd_vf_v2f16_unmasked:
83; ZVFH:       # %bb.0:
84; ZVFH-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
85; ZVFH-NEXT:    vfadd.vf v8, v8, fa0
86; ZVFH-NEXT:    ret
87;
88; ZVFHMIN-LABEL: vfadd_vf_v2f16_unmasked:
89; ZVFHMIN:       # %bb.0:
90; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
91; ZVFHMIN-NEXT:    vsetivli zero, 2, e16, mf4, ta, ma
92; ZVFHMIN-NEXT:    vmv.v.x v9, a1
93; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
94; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v8
95; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v9
96; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, mf2, ta, ma
97; ZVFHMIN-NEXT:    vfadd.vv v9, v10, v8
98; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf4, ta, ma
99; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v9
100; ZVFHMIN-NEXT:    ret
101  %elt.head = insertelement <2 x half> poison, half %b, i32 0
102  %vb = shufflevector <2 x half> %elt.head, <2 x half> poison, <2 x i32> zeroinitializer
103  %v = call <2 x half> @llvm.vp.fadd.v2f16(<2 x half> %va, <2 x half> %vb, <2 x i1> splat (i1 true), i32 %evl)
104  ret <2 x half> %v
105}
106
107declare <3 x half> @llvm.vp.fadd.v3f16(<3 x half>, <3 x half>, <3 x i1>, i32)
108
109define <3 x half> @vfadd_vv_v3f16(<3 x half> %va, <3 x half> %b, <3 x i1> %m, i32 zeroext %evl) {
110; ZVFH-LABEL: vfadd_vv_v3f16:
111; ZVFH:       # %bb.0:
112; ZVFH-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
113; ZVFH-NEXT:    vfadd.vv v8, v8, v9, v0.t
114; ZVFH-NEXT:    ret
115;
116; ZVFHMIN-LABEL: vfadd_vv_v3f16:
117; ZVFHMIN:       # %bb.0:
118; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
119; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v9, v0.t
120; ZVFHMIN-NEXT:    vfwcvt.f.f.v v9, v8, v0.t
121; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m1, ta, ma
122; ZVFHMIN-NEXT:    vfadd.vv v9, v9, v10, v0.t
123; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf2, ta, ma
124; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v9, v0.t
125; ZVFHMIN-NEXT:    ret
126  %v = call <3 x half> @llvm.vp.fadd.v3f16(<3 x half> %va, <3 x half> %b, <3 x i1> %m, i32 %evl)
127  ret <3 x half> %v
128}
129
130declare <4 x half> @llvm.vp.fadd.v4f16(<4 x half>, <4 x half>, <4 x i1>, i32)
131
132define <4 x half> @vfadd_vv_v4f16(<4 x half> %va, <4 x half> %b, <4 x i1> %m, i32 zeroext %evl) {
133; ZVFH-LABEL: vfadd_vv_v4f16:
134; ZVFH:       # %bb.0:
135; ZVFH-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
136; ZVFH-NEXT:    vfadd.vv v8, v8, v9, v0.t
137; ZVFH-NEXT:    ret
138;
139; ZVFHMIN-LABEL: vfadd_vv_v4f16:
140; ZVFHMIN:       # %bb.0:
141; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
142; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v9, v0.t
143; ZVFHMIN-NEXT:    vfwcvt.f.f.v v9, v8, v0.t
144; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m1, ta, ma
145; ZVFHMIN-NEXT:    vfadd.vv v9, v9, v10, v0.t
146; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf2, ta, ma
147; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v9, v0.t
148; ZVFHMIN-NEXT:    ret
149  %v = call <4 x half> @llvm.vp.fadd.v4f16(<4 x half> %va, <4 x half> %b, <4 x i1> %m, i32 %evl)
150  ret <4 x half> %v
151}
152
153define <4 x half> @vfadd_vv_v4f16_unmasked(<4 x half> %va, <4 x half> %b, i32 zeroext %evl) {
154; ZVFH-LABEL: vfadd_vv_v4f16_unmasked:
155; ZVFH:       # %bb.0:
156; ZVFH-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
157; ZVFH-NEXT:    vfadd.vv v8, v8, v9
158; ZVFH-NEXT:    ret
159;
160; ZVFHMIN-LABEL: vfadd_vv_v4f16_unmasked:
161; ZVFHMIN:       # %bb.0:
162; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
163; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v9
164; ZVFHMIN-NEXT:    vfwcvt.f.f.v v9, v8
165; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m1, ta, ma
166; ZVFHMIN-NEXT:    vfadd.vv v9, v9, v10
167; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf2, ta, ma
168; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v9
169; ZVFHMIN-NEXT:    ret
170  %v = call <4 x half> @llvm.vp.fadd.v4f16(<4 x half> %va, <4 x half> %b, <4 x i1> splat (i1 true), i32 %evl)
171  ret <4 x half> %v
172}
173
174define <4 x half> @vfadd_vf_v4f16(<4 x half> %va, half %b, <4 x i1> %m, i32 zeroext %evl) {
175; ZVFH-LABEL: vfadd_vf_v4f16:
176; ZVFH:       # %bb.0:
177; ZVFH-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
178; ZVFH-NEXT:    vfadd.vf v8, v8, fa0, v0.t
179; ZVFH-NEXT:    ret
180;
181; ZVFHMIN-LABEL: vfadd_vf_v4f16:
182; ZVFHMIN:       # %bb.0:
183; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
184; ZVFHMIN-NEXT:    vsetivli zero, 4, e16, mf2, ta, ma
185; ZVFHMIN-NEXT:    vmv.v.x v9, a1
186; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
187; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v8, v0.t
188; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v9, v0.t
189; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m1, ta, ma
190; ZVFHMIN-NEXT:    vfadd.vv v9, v10, v8, v0.t
191; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf2, ta, ma
192; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v9, v0.t
193; ZVFHMIN-NEXT:    ret
194  %elt.head = insertelement <4 x half> poison, half %b, i32 0
195  %vb = shufflevector <4 x half> %elt.head, <4 x half> poison, <4 x i32> zeroinitializer
196  %v = call <4 x half> @llvm.vp.fadd.v4f16(<4 x half> %va, <4 x half> %vb, <4 x i1> %m, i32 %evl)
197  ret <4 x half> %v
198}
199
200define <4 x half> @vfadd_vf_v4f16_unmasked(<4 x half> %va, half %b, i32 zeroext %evl) {
201; ZVFH-LABEL: vfadd_vf_v4f16_unmasked:
202; ZVFH:       # %bb.0:
203; ZVFH-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
204; ZVFH-NEXT:    vfadd.vf v8, v8, fa0
205; ZVFH-NEXT:    ret
206;
207; ZVFHMIN-LABEL: vfadd_vf_v4f16_unmasked:
208; ZVFHMIN:       # %bb.0:
209; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
210; ZVFHMIN-NEXT:    vsetivli zero, 4, e16, mf2, ta, ma
211; ZVFHMIN-NEXT:    vmv.v.x v9, a1
212; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
213; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v8
214; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v9
215; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m1, ta, ma
216; ZVFHMIN-NEXT:    vfadd.vv v9, v10, v8
217; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf2, ta, ma
218; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v9
219; ZVFHMIN-NEXT:    ret
220  %elt.head = insertelement <4 x half> poison, half %b, i32 0
221  %vb = shufflevector <4 x half> %elt.head, <4 x half> poison, <4 x i32> zeroinitializer
222  %v = call <4 x half> @llvm.vp.fadd.v4f16(<4 x half> %va, <4 x half> %vb, <4 x i1> splat (i1 true), i32 %evl)
223  ret <4 x half> %v
224}
225
226declare <8 x half> @llvm.vp.fadd.v8f16(<8 x half>, <8 x half>, <8 x i1>, i32)
227
228define <8 x half> @vfadd_vv_v8f16(<8 x half> %va, <8 x half> %b, <8 x i1> %m, i32 zeroext %evl) {
229; ZVFH-LABEL: vfadd_vv_v8f16:
230; ZVFH:       # %bb.0:
231; ZVFH-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
232; ZVFH-NEXT:    vfadd.vv v8, v8, v9, v0.t
233; ZVFH-NEXT:    ret
234;
235; ZVFHMIN-LABEL: vfadd_vv_v8f16:
236; ZVFHMIN:       # %bb.0:
237; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
238; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v9, v0.t
239; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v8, v0.t
240; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m2, ta, ma
241; ZVFHMIN-NEXT:    vfadd.vv v10, v12, v10, v0.t
242; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m1, ta, ma
243; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v10, v0.t
244; ZVFHMIN-NEXT:    ret
245  %v = call <8 x half> @llvm.vp.fadd.v8f16(<8 x half> %va, <8 x half> %b, <8 x i1> %m, i32 %evl)
246  ret <8 x half> %v
247}
248
249define <8 x half> @vfadd_vv_v8f16_unmasked(<8 x half> %va, <8 x half> %b, i32 zeroext %evl) {
250; ZVFH-LABEL: vfadd_vv_v8f16_unmasked:
251; ZVFH:       # %bb.0:
252; ZVFH-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
253; ZVFH-NEXT:    vfadd.vv v8, v8, v9
254; ZVFH-NEXT:    ret
255;
256; ZVFHMIN-LABEL: vfadd_vv_v8f16_unmasked:
257; ZVFHMIN:       # %bb.0:
258; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
259; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v9
260; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v8
261; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m2, ta, ma
262; ZVFHMIN-NEXT:    vfadd.vv v10, v12, v10
263; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m1, ta, ma
264; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v10
265; ZVFHMIN-NEXT:    ret
266  %v = call <8 x half> @llvm.vp.fadd.v8f16(<8 x half> %va, <8 x half> %b, <8 x i1> splat (i1 true), i32 %evl)
267  ret <8 x half> %v
268}
269
270define <8 x half> @vfadd_vf_v8f16(<8 x half> %va, half %b, <8 x i1> %m, i32 zeroext %evl) {
271; ZVFH-LABEL: vfadd_vf_v8f16:
272; ZVFH:       # %bb.0:
273; ZVFH-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
274; ZVFH-NEXT:    vfadd.vf v8, v8, fa0, v0.t
275; ZVFH-NEXT:    ret
276;
277; ZVFHMIN-LABEL: vfadd_vf_v8f16:
278; ZVFHMIN:       # %bb.0:
279; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
280; ZVFHMIN-NEXT:    vsetivli zero, 8, e16, m1, ta, ma
281; ZVFHMIN-NEXT:    vmv.v.x v9, a1
282; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
283; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v8, v0.t
284; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v9, v0.t
285; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m2, ta, ma
286; ZVFHMIN-NEXT:    vfadd.vv v10, v10, v12, v0.t
287; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m1, ta, ma
288; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v10, v0.t
289; ZVFHMIN-NEXT:    ret
290  %elt.head = insertelement <8 x half> poison, half %b, i32 0
291  %vb = shufflevector <8 x half> %elt.head, <8 x half> poison, <8 x i32> zeroinitializer
292  %v = call <8 x half> @llvm.vp.fadd.v8f16(<8 x half> %va, <8 x half> %vb, <8 x i1> %m, i32 %evl)
293  ret <8 x half> %v
294}
295
296define <8 x half> @vfadd_vf_v8f16_unmasked(<8 x half> %va, half %b, i32 zeroext %evl) {
297; ZVFH-LABEL: vfadd_vf_v8f16_unmasked:
298; ZVFH:       # %bb.0:
299; ZVFH-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
300; ZVFH-NEXT:    vfadd.vf v8, v8, fa0
301; ZVFH-NEXT:    ret
302;
303; ZVFHMIN-LABEL: vfadd_vf_v8f16_unmasked:
304; ZVFHMIN:       # %bb.0:
305; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
306; ZVFHMIN-NEXT:    vsetivli zero, 8, e16, m1, ta, ma
307; ZVFHMIN-NEXT:    vmv.v.x v9, a1
308; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
309; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v8
310; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v9
311; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m2, ta, ma
312; ZVFHMIN-NEXT:    vfadd.vv v10, v10, v12
313; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m1, ta, ma
314; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v10
315; ZVFHMIN-NEXT:    ret
316  %elt.head = insertelement <8 x half> poison, half %b, i32 0
317  %vb = shufflevector <8 x half> %elt.head, <8 x half> poison, <8 x i32> zeroinitializer
318  %v = call <8 x half> @llvm.vp.fadd.v8f16(<8 x half> %va, <8 x half> %vb, <8 x i1> splat (i1 true), i32 %evl)
319  ret <8 x half> %v
320}
321
322declare <16 x half> @llvm.vp.fadd.v16f16(<16 x half>, <16 x half>, <16 x i1>, i32)
323
324define <16 x half> @vfadd_vv_v16f16(<16 x half> %va, <16 x half> %b, <16 x i1> %m, i32 zeroext %evl) {
325; ZVFH-LABEL: vfadd_vv_v16f16:
326; ZVFH:       # %bb.0:
327; ZVFH-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
328; ZVFH-NEXT:    vfadd.vv v8, v8, v10, v0.t
329; ZVFH-NEXT:    ret
330;
331; ZVFHMIN-LABEL: vfadd_vv_v16f16:
332; ZVFHMIN:       # %bb.0:
333; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
334; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v10, v0.t
335; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v8, v0.t
336; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m4, ta, ma
337; ZVFHMIN-NEXT:    vfadd.vv v12, v16, v12, v0.t
338; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m2, ta, ma
339; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v12, v0.t
340; ZVFHMIN-NEXT:    ret
341  %v = call <16 x half> @llvm.vp.fadd.v16f16(<16 x half> %va, <16 x half> %b, <16 x i1> %m, i32 %evl)
342  ret <16 x half> %v
343}
344
345define <16 x half> @vfadd_vv_v16f16_unmasked(<16 x half> %va, <16 x half> %b, i32 zeroext %evl) {
346; ZVFH-LABEL: vfadd_vv_v16f16_unmasked:
347; ZVFH:       # %bb.0:
348; ZVFH-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
349; ZVFH-NEXT:    vfadd.vv v8, v8, v10
350; ZVFH-NEXT:    ret
351;
352; ZVFHMIN-LABEL: vfadd_vv_v16f16_unmasked:
353; ZVFHMIN:       # %bb.0:
354; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
355; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v10
356; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v8
357; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m4, ta, ma
358; ZVFHMIN-NEXT:    vfadd.vv v12, v16, v12
359; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m2, ta, ma
360; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v12
361; ZVFHMIN-NEXT:    ret
362  %v = call <16 x half> @llvm.vp.fadd.v16f16(<16 x half> %va, <16 x half> %b, <16 x i1> splat (i1 true), i32 %evl)
363  ret <16 x half> %v
364}
365
366define <16 x half> @vfadd_vf_v16f16(<16 x half> %va, half %b, <16 x i1> %m, i32 zeroext %evl) {
367; ZVFH-LABEL: vfadd_vf_v16f16:
368; ZVFH:       # %bb.0:
369; ZVFH-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
370; ZVFH-NEXT:    vfadd.vf v8, v8, fa0, v0.t
371; ZVFH-NEXT:    ret
372;
373; ZVFHMIN-LABEL: vfadd_vf_v16f16:
374; ZVFHMIN:       # %bb.0:
375; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
376; ZVFHMIN-NEXT:    vsetivli zero, 16, e16, m2, ta, ma
377; ZVFHMIN-NEXT:    vmv.v.x v10, a1
378; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
379; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v8, v0.t
380; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v10, v0.t
381; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m4, ta, ma
382; ZVFHMIN-NEXT:    vfadd.vv v12, v12, v16, v0.t
383; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m2, ta, ma
384; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v12, v0.t
385; ZVFHMIN-NEXT:    ret
386  %elt.head = insertelement <16 x half> poison, half %b, i32 0
387  %vb = shufflevector <16 x half> %elt.head, <16 x half> poison, <16 x i32> zeroinitializer
388  %v = call <16 x half> @llvm.vp.fadd.v16f16(<16 x half> %va, <16 x half> %vb, <16 x i1> %m, i32 %evl)
389  ret <16 x half> %v
390}
391
392define <16 x half> @vfadd_vf_v16f16_unmasked(<16 x half> %va, half %b, i32 zeroext %evl) {
393; ZVFH-LABEL: vfadd_vf_v16f16_unmasked:
394; ZVFH:       # %bb.0:
395; ZVFH-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
396; ZVFH-NEXT:    vfadd.vf v8, v8, fa0
397; ZVFH-NEXT:    ret
398;
399; ZVFHMIN-LABEL: vfadd_vf_v16f16_unmasked:
400; ZVFHMIN:       # %bb.0:
401; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
402; ZVFHMIN-NEXT:    vsetivli zero, 16, e16, m2, ta, ma
403; ZVFHMIN-NEXT:    vmv.v.x v10, a1
404; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
405; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v8
406; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v10
407; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m4, ta, ma
408; ZVFHMIN-NEXT:    vfadd.vv v12, v12, v16
409; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m2, ta, ma
410; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v12
411; ZVFHMIN-NEXT:    ret
412  %elt.head = insertelement <16 x half> poison, half %b, i32 0
413  %vb = shufflevector <16 x half> %elt.head, <16 x half> poison, <16 x i32> zeroinitializer
414  %v = call <16 x half> @llvm.vp.fadd.v16f16(<16 x half> %va, <16 x half> %vb, <16 x i1> splat (i1 true), i32 %evl)
415  ret <16 x half> %v
416}
417
418declare <2 x float> @llvm.vp.fadd.v2f32(<2 x float>, <2 x float>, <2 x i1>, i32)
419
420define <2 x float> @vfadd_vv_v2f32(<2 x float> %va, <2 x float> %b, <2 x i1> %m, i32 zeroext %evl) {
421; CHECK-LABEL: vfadd_vv_v2f32:
422; CHECK:       # %bb.0:
423; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma
424; CHECK-NEXT:    vfadd.vv v8, v8, v9, v0.t
425; CHECK-NEXT:    ret
426  %v = call <2 x float> @llvm.vp.fadd.v2f32(<2 x float> %va, <2 x float> %b, <2 x i1> %m, i32 %evl)
427  ret <2 x float> %v
428}
429
430define <2 x float> @vfadd_vv_v2f32_unmasked(<2 x float> %va, <2 x float> %b, i32 zeroext %evl) {
431; CHECK-LABEL: vfadd_vv_v2f32_unmasked:
432; CHECK:       # %bb.0:
433; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma
434; CHECK-NEXT:    vfadd.vv v8, v8, v9
435; CHECK-NEXT:    ret
436  %v = call <2 x float> @llvm.vp.fadd.v2f32(<2 x float> %va, <2 x float> %b, <2 x i1> splat (i1 true), i32 %evl)
437  ret <2 x float> %v
438}
439
440define <2 x float> @vfadd_vf_v2f32(<2 x float> %va, float %b, <2 x i1> %m, i32 zeroext %evl) {
441; CHECK-LABEL: vfadd_vf_v2f32:
442; CHECK:       # %bb.0:
443; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma
444; CHECK-NEXT:    vfadd.vf v8, v8, fa0, v0.t
445; CHECK-NEXT:    ret
446  %elt.head = insertelement <2 x float> poison, float %b, i32 0
447  %vb = shufflevector <2 x float> %elt.head, <2 x float> poison, <2 x i32> zeroinitializer
448  %v = call <2 x float> @llvm.vp.fadd.v2f32(<2 x float> %va, <2 x float> %vb, <2 x i1> %m, i32 %evl)
449  ret <2 x float> %v
450}
451
452define <2 x float> @vfadd_vf_v2f32_commute(<2 x float> %va, float %b, <2 x i1> %m, i32 zeroext %evl) {
453; CHECK-LABEL: vfadd_vf_v2f32_commute:
454; CHECK:       # %bb.0:
455; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma
456; CHECK-NEXT:    vfadd.vf v8, v8, fa0, v0.t
457; CHECK-NEXT:    ret
458  %elt.head = insertelement <2 x float> poison, float %b, i32 0
459  %vb = shufflevector <2 x float> %elt.head, <2 x float> poison, <2 x i32> zeroinitializer
460  %v = call <2 x float> @llvm.vp.fadd.v2f32(<2 x float> %vb, <2 x float> %va, <2 x i1> %m, i32 %evl)
461  ret <2 x float> %v
462}
463
464define <2 x float> @vfadd_vf_v2f32_unmasked(<2 x float> %va, float %b, i32 zeroext %evl) {
465; CHECK-LABEL: vfadd_vf_v2f32_unmasked:
466; CHECK:       # %bb.0:
467; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma
468; CHECK-NEXT:    vfadd.vf v8, v8, fa0
469; CHECK-NEXT:    ret
470  %elt.head = insertelement <2 x float> poison, float %b, i32 0
471  %vb = shufflevector <2 x float> %elt.head, <2 x float> poison, <2 x i32> zeroinitializer
472  %v = call <2 x float> @llvm.vp.fadd.v2f32(<2 x float> %va, <2 x float> %vb, <2 x i1> splat (i1 true), i32 %evl)
473  ret <2 x float> %v
474}
475
476define <2 x float> @vfadd_vf_v2f32_unmasked_commute(<2 x float> %va, float %b, i32 zeroext %evl) {
477; CHECK-LABEL: vfadd_vf_v2f32_unmasked_commute:
478; CHECK:       # %bb.0:
479; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma
480; CHECK-NEXT:    vfadd.vf v8, v8, fa0
481; CHECK-NEXT:    ret
482  %elt.head = insertelement <2 x float> poison, float %b, i32 0
483  %vb = shufflevector <2 x float> %elt.head, <2 x float> poison, <2 x i32> zeroinitializer
484  %v = call <2 x float> @llvm.vp.fadd.v2f32(<2 x float> %vb, <2 x float> %va, <2 x i1> splat (i1 true), i32 %evl)
485  ret <2 x float> %v
486}
487
488declare <4 x float> @llvm.vp.fadd.v4f32(<4 x float>, <4 x float>, <4 x i1>, i32)
489
490define <4 x float> @vfadd_vv_v4f32(<4 x float> %va, <4 x float> %b, <4 x i1> %m, i32 zeroext %evl) {
491; CHECK-LABEL: vfadd_vv_v4f32:
492; CHECK:       # %bb.0:
493; CHECK-NEXT:    vsetvli zero, a0, e32, m1, ta, ma
494; CHECK-NEXT:    vfadd.vv v8, v8, v9, v0.t
495; CHECK-NEXT:    ret
496  %v = call <4 x float> @llvm.vp.fadd.v4f32(<4 x float> %va, <4 x float> %b, <4 x i1> %m, i32 %evl)
497  ret <4 x float> %v
498}
499
500define <4 x float> @vfadd_vv_v4f32_unmasked(<4 x float> %va, <4 x float> %b, i32 zeroext %evl) {
501; CHECK-LABEL: vfadd_vv_v4f32_unmasked:
502; CHECK:       # %bb.0:
503; CHECK-NEXT:    vsetvli zero, a0, e32, m1, ta, ma
504; CHECK-NEXT:    vfadd.vv v8, v8, v9
505; CHECK-NEXT:    ret
506  %v = call <4 x float> @llvm.vp.fadd.v4f32(<4 x float> %va, <4 x float> %b, <4 x i1> splat (i1 true), i32 %evl)
507  ret <4 x float> %v
508}
509
510define <4 x float> @vfadd_vf_v4f32(<4 x float> %va, float %b, <4 x i1> %m, i32 zeroext %evl) {
511; CHECK-LABEL: vfadd_vf_v4f32:
512; CHECK:       # %bb.0:
513; CHECK-NEXT:    vsetvli zero, a0, e32, m1, ta, ma
514; CHECK-NEXT:    vfadd.vf v8, v8, fa0, v0.t
515; CHECK-NEXT:    ret
516  %elt.head = insertelement <4 x float> poison, float %b, i32 0
517  %vb = shufflevector <4 x float> %elt.head, <4 x float> poison, <4 x i32> zeroinitializer
518  %v = call <4 x float> @llvm.vp.fadd.v4f32(<4 x float> %va, <4 x float> %vb, <4 x i1> %m, i32 %evl)
519  ret <4 x float> %v
520}
521
522define <4 x float> @vfadd_vf_v4f32_unmasked(<4 x float> %va, float %b, i32 zeroext %evl) {
523; CHECK-LABEL: vfadd_vf_v4f32_unmasked:
524; CHECK:       # %bb.0:
525; CHECK-NEXT:    vsetvli zero, a0, e32, m1, ta, ma
526; CHECK-NEXT:    vfadd.vf v8, v8, fa0
527; CHECK-NEXT:    ret
528  %elt.head = insertelement <4 x float> poison, float %b, i32 0
529  %vb = shufflevector <4 x float> %elt.head, <4 x float> poison, <4 x i32> zeroinitializer
530  %v = call <4 x float> @llvm.vp.fadd.v4f32(<4 x float> %va, <4 x float> %vb, <4 x i1> splat (i1 true), i32 %evl)
531  ret <4 x float> %v
532}
533
534declare <8 x float> @llvm.vp.fadd.v8f32(<8 x float>, <8 x float>, <8 x i1>, i32)
535
536define <8 x float> @vfadd_vv_v8f32(<8 x float> %va, <8 x float> %b, <8 x i1> %m, i32 zeroext %evl) {
537; CHECK-LABEL: vfadd_vv_v8f32:
538; CHECK:       # %bb.0:
539; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma
540; CHECK-NEXT:    vfadd.vv v8, v8, v10, v0.t
541; CHECK-NEXT:    ret
542  %v = call <8 x float> @llvm.vp.fadd.v8f32(<8 x float> %va, <8 x float> %b, <8 x i1> %m, i32 %evl)
543  ret <8 x float> %v
544}
545
546define <8 x float> @vfadd_vv_v8f32_unmasked(<8 x float> %va, <8 x float> %b, i32 zeroext %evl) {
547; CHECK-LABEL: vfadd_vv_v8f32_unmasked:
548; CHECK:       # %bb.0:
549; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma
550; CHECK-NEXT:    vfadd.vv v8, v8, v10
551; CHECK-NEXT:    ret
552  %v = call <8 x float> @llvm.vp.fadd.v8f32(<8 x float> %va, <8 x float> %b, <8 x i1> splat (i1 true), i32 %evl)
553  ret <8 x float> %v
554}
555
556define <8 x float> @vfadd_vf_v8f32(<8 x float> %va, float %b, <8 x i1> %m, i32 zeroext %evl) {
557; CHECK-LABEL: vfadd_vf_v8f32:
558; CHECK:       # %bb.0:
559; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma
560; CHECK-NEXT:    vfadd.vf v8, v8, fa0, v0.t
561; CHECK-NEXT:    ret
562  %elt.head = insertelement <8 x float> poison, float %b, i32 0
563  %vb = shufflevector <8 x float> %elt.head, <8 x float> poison, <8 x i32> zeroinitializer
564  %v = call <8 x float> @llvm.vp.fadd.v8f32(<8 x float> %va, <8 x float> %vb, <8 x i1> %m, i32 %evl)
565  ret <8 x float> %v
566}
567
568define <8 x float> @vfadd_vf_v8f32_unmasked(<8 x float> %va, float %b, i32 zeroext %evl) {
569; CHECK-LABEL: vfadd_vf_v8f32_unmasked:
570; CHECK:       # %bb.0:
571; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma
572; CHECK-NEXT:    vfadd.vf v8, v8, fa0
573; CHECK-NEXT:    ret
574  %elt.head = insertelement <8 x float> poison, float %b, i32 0
575  %vb = shufflevector <8 x float> %elt.head, <8 x float> poison, <8 x i32> zeroinitializer
576  %v = call <8 x float> @llvm.vp.fadd.v8f32(<8 x float> %va, <8 x float> %vb, <8 x i1> splat (i1 true), i32 %evl)
577  ret <8 x float> %v
578}
579
580declare <16 x float> @llvm.vp.fadd.v16f32(<16 x float>, <16 x float>, <16 x i1>, i32)
581
582define <16 x float> @vfadd_vv_v16f32(<16 x float> %va, <16 x float> %b, <16 x i1> %m, i32 zeroext %evl) {
583; CHECK-LABEL: vfadd_vv_v16f32:
584; CHECK:       # %bb.0:
585; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma
586; CHECK-NEXT:    vfadd.vv v8, v8, v12, v0.t
587; CHECK-NEXT:    ret
588  %v = call <16 x float> @llvm.vp.fadd.v16f32(<16 x float> %va, <16 x float> %b, <16 x i1> %m, i32 %evl)
589  ret <16 x float> %v
590}
591
592define <16 x float> @vfadd_vv_v16f32_unmasked(<16 x float> %va, <16 x float> %b, i32 zeroext %evl) {
593; CHECK-LABEL: vfadd_vv_v16f32_unmasked:
594; CHECK:       # %bb.0:
595; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma
596; CHECK-NEXT:    vfadd.vv v8, v8, v12
597; CHECK-NEXT:    ret
598  %v = call <16 x float> @llvm.vp.fadd.v16f32(<16 x float> %va, <16 x float> %b, <16 x i1> splat (i1 true), i32 %evl)
599  ret <16 x float> %v
600}
601
602define <16 x float> @vfadd_vf_v16f32(<16 x float> %va, float %b, <16 x i1> %m, i32 zeroext %evl) {
603; CHECK-LABEL: vfadd_vf_v16f32:
604; CHECK:       # %bb.0:
605; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma
606; CHECK-NEXT:    vfadd.vf v8, v8, fa0, v0.t
607; CHECK-NEXT:    ret
608  %elt.head = insertelement <16 x float> poison, float %b, i32 0
609  %vb = shufflevector <16 x float> %elt.head, <16 x float> poison, <16 x i32> zeroinitializer
610  %v = call <16 x float> @llvm.vp.fadd.v16f32(<16 x float> %va, <16 x float> %vb, <16 x i1> %m, i32 %evl)
611  ret <16 x float> %v
612}
613
614define <16 x float> @vfadd_vf_v16f32_unmasked(<16 x float> %va, float %b, i32 zeroext %evl) {
615; CHECK-LABEL: vfadd_vf_v16f32_unmasked:
616; CHECK:       # %bb.0:
617; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma
618; CHECK-NEXT:    vfadd.vf v8, v8, fa0
619; CHECK-NEXT:    ret
620  %elt.head = insertelement <16 x float> poison, float %b, i32 0
621  %vb = shufflevector <16 x float> %elt.head, <16 x float> poison, <16 x i32> zeroinitializer
622  %v = call <16 x float> @llvm.vp.fadd.v16f32(<16 x float> %va, <16 x float> %vb, <16 x i1> splat (i1 true), i32 %evl)
623  ret <16 x float> %v
624}
625
626declare <2 x double> @llvm.vp.fadd.v2f64(<2 x double>, <2 x double>, <2 x i1>, i32)
627
628define <2 x double> @vfadd_vv_v2f64(<2 x double> %va, <2 x double> %b, <2 x i1> %m, i32 zeroext %evl) {
629; CHECK-LABEL: vfadd_vv_v2f64:
630; CHECK:       # %bb.0:
631; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma
632; CHECK-NEXT:    vfadd.vv v8, v8, v9, v0.t
633; CHECK-NEXT:    ret
634  %v = call <2 x double> @llvm.vp.fadd.v2f64(<2 x double> %va, <2 x double> %b, <2 x i1> %m, i32 %evl)
635  ret <2 x double> %v
636}
637
638define <2 x double> @vfadd_vv_v2f64_unmasked(<2 x double> %va, <2 x double> %b, i32 zeroext %evl) {
639; CHECK-LABEL: vfadd_vv_v2f64_unmasked:
640; CHECK:       # %bb.0:
641; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma
642; CHECK-NEXT:    vfadd.vv v8, v8, v9
643; CHECK-NEXT:    ret
644  %v = call <2 x double> @llvm.vp.fadd.v2f64(<2 x double> %va, <2 x double> %b, <2 x i1> splat (i1 true), i32 %evl)
645  ret <2 x double> %v
646}
647
648define <2 x double> @vfadd_vf_v2f64(<2 x double> %va, double %b, <2 x i1> %m, i32 zeroext %evl) {
649; CHECK-LABEL: vfadd_vf_v2f64:
650; CHECK:       # %bb.0:
651; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma
652; CHECK-NEXT:    vfadd.vf v8, v8, fa0, v0.t
653; CHECK-NEXT:    ret
654  %elt.head = insertelement <2 x double> poison, double %b, i32 0
655  %vb = shufflevector <2 x double> %elt.head, <2 x double> poison, <2 x i32> zeroinitializer
656  %v = call <2 x double> @llvm.vp.fadd.v2f64(<2 x double> %va, <2 x double> %vb, <2 x i1> %m, i32 %evl)
657  ret <2 x double> %v
658}
659
660define <2 x double> @vfadd_vf_v2f64_unmasked(<2 x double> %va, double %b, i32 zeroext %evl) {
661; CHECK-LABEL: vfadd_vf_v2f64_unmasked:
662; CHECK:       # %bb.0:
663; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma
664; CHECK-NEXT:    vfadd.vf v8, v8, fa0
665; CHECK-NEXT:    ret
666  %elt.head = insertelement <2 x double> poison, double %b, i32 0
667  %vb = shufflevector <2 x double> %elt.head, <2 x double> poison, <2 x i32> zeroinitializer
668  %v = call <2 x double> @llvm.vp.fadd.v2f64(<2 x double> %va, <2 x double> %vb, <2 x i1> splat (i1 true), i32 %evl)
669  ret <2 x double> %v
670}
671
672declare <4 x double> @llvm.vp.fadd.v4f64(<4 x double>, <4 x double>, <4 x i1>, i32)
673
674define <4 x double> @vfadd_vv_v4f64(<4 x double> %va, <4 x double> %b, <4 x i1> %m, i32 zeroext %evl) {
675; CHECK-LABEL: vfadd_vv_v4f64:
676; CHECK:       # %bb.0:
677; CHECK-NEXT:    vsetvli zero, a0, e64, m2, ta, ma
678; CHECK-NEXT:    vfadd.vv v8, v8, v10, v0.t
679; CHECK-NEXT:    ret
680  %v = call <4 x double> @llvm.vp.fadd.v4f64(<4 x double> %va, <4 x double> %b, <4 x i1> %m, i32 %evl)
681  ret <4 x double> %v
682}
683
684define <4 x double> @vfadd_vv_v4f64_unmasked(<4 x double> %va, <4 x double> %b, i32 zeroext %evl) {
685; CHECK-LABEL: vfadd_vv_v4f64_unmasked:
686; CHECK:       # %bb.0:
687; CHECK-NEXT:    vsetvli zero, a0, e64, m2, ta, ma
688; CHECK-NEXT:    vfadd.vv v8, v8, v10
689; CHECK-NEXT:    ret
690  %v = call <4 x double> @llvm.vp.fadd.v4f64(<4 x double> %va, <4 x double> %b, <4 x i1> splat (i1 true), i32 %evl)
691  ret <4 x double> %v
692}
693
694define <4 x double> @vfadd_vf_v4f64(<4 x double> %va, double %b, <4 x i1> %m, i32 zeroext %evl) {
695; CHECK-LABEL: vfadd_vf_v4f64:
696; CHECK:       # %bb.0:
697; CHECK-NEXT:    vsetvli zero, a0, e64, m2, ta, ma
698; CHECK-NEXT:    vfadd.vf v8, v8, fa0, v0.t
699; CHECK-NEXT:    ret
700  %elt.head = insertelement <4 x double> poison, double %b, i32 0
701  %vb = shufflevector <4 x double> %elt.head, <4 x double> poison, <4 x i32> zeroinitializer
702  %v = call <4 x double> @llvm.vp.fadd.v4f64(<4 x double> %va, <4 x double> %vb, <4 x i1> %m, i32 %evl)
703  ret <4 x double> %v
704}
705
706define <4 x double> @vfadd_vf_v4f64_unmasked(<4 x double> %va, double %b, i32 zeroext %evl) {
707; CHECK-LABEL: vfadd_vf_v4f64_unmasked:
708; CHECK:       # %bb.0:
709; CHECK-NEXT:    vsetvli zero, a0, e64, m2, ta, ma
710; CHECK-NEXT:    vfadd.vf v8, v8, fa0
711; CHECK-NEXT:    ret
712  %elt.head = insertelement <4 x double> poison, double %b, i32 0
713  %vb = shufflevector <4 x double> %elt.head, <4 x double> poison, <4 x i32> zeroinitializer
714  %v = call <4 x double> @llvm.vp.fadd.v4f64(<4 x double> %va, <4 x double> %vb, <4 x i1> splat (i1 true), i32 %evl)
715  ret <4 x double> %v
716}
717
718declare <8 x double> @llvm.vp.fadd.v8f64(<8 x double>, <8 x double>, <8 x i1>, i32)
719
720define <8 x double> @vfadd_vv_v8f64(<8 x double> %va, <8 x double> %b, <8 x i1> %m, i32 zeroext %evl) {
721; CHECK-LABEL: vfadd_vv_v8f64:
722; CHECK:       # %bb.0:
723; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
724; CHECK-NEXT:    vfadd.vv v8, v8, v12, v0.t
725; CHECK-NEXT:    ret
726  %v = call <8 x double> @llvm.vp.fadd.v8f64(<8 x double> %va, <8 x double> %b, <8 x i1> %m, i32 %evl)
727  ret <8 x double> %v
728}
729
730define <8 x double> @vfadd_vv_v8f64_unmasked(<8 x double> %va, <8 x double> %b, i32 zeroext %evl) {
731; CHECK-LABEL: vfadd_vv_v8f64_unmasked:
732; CHECK:       # %bb.0:
733; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
734; CHECK-NEXT:    vfadd.vv v8, v8, v12
735; CHECK-NEXT:    ret
736  %v = call <8 x double> @llvm.vp.fadd.v8f64(<8 x double> %va, <8 x double> %b, <8 x i1> splat (i1 true), i32 %evl)
737  ret <8 x double> %v
738}
739
740define <8 x double> @vfadd_vf_v8f64(<8 x double> %va, double %b, <8 x i1> %m, i32 zeroext %evl) {
741; CHECK-LABEL: vfadd_vf_v8f64:
742; CHECK:       # %bb.0:
743; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
744; CHECK-NEXT:    vfadd.vf v8, v8, fa0, v0.t
745; CHECK-NEXT:    ret
746  %elt.head = insertelement <8 x double> poison, double %b, i32 0
747  %vb = shufflevector <8 x double> %elt.head, <8 x double> poison, <8 x i32> zeroinitializer
748  %v = call <8 x double> @llvm.vp.fadd.v8f64(<8 x double> %va, <8 x double> %vb, <8 x i1> %m, i32 %evl)
749  ret <8 x double> %v
750}
751
752define <8 x double> @vfadd_vf_v8f64_unmasked(<8 x double> %va, double %b, i32 zeroext %evl) {
753; CHECK-LABEL: vfadd_vf_v8f64_unmasked:
754; CHECK:       # %bb.0:
755; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
756; CHECK-NEXT:    vfadd.vf v8, v8, fa0
757; CHECK-NEXT:    ret
758  %elt.head = insertelement <8 x double> poison, double %b, i32 0
759  %vb = shufflevector <8 x double> %elt.head, <8 x double> poison, <8 x i32> zeroinitializer
760  %v = call <8 x double> @llvm.vp.fadd.v8f64(<8 x double> %va, <8 x double> %vb, <8 x i1> splat (i1 true), i32 %evl)
761  ret <8 x double> %v
762}
763
764declare <16 x double> @llvm.vp.fadd.v16f64(<16 x double>, <16 x double>, <16 x i1>, i32)
765
766define <16 x double> @vfadd_vv_v16f64(<16 x double> %va, <16 x double> %b, <16 x i1> %m, i32 zeroext %evl) {
767; CHECK-LABEL: vfadd_vv_v16f64:
768; CHECK:       # %bb.0:
769; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma
770; CHECK-NEXT:    vfadd.vv v8, v8, v16, v0.t
771; CHECK-NEXT:    ret
772  %v = call <16 x double> @llvm.vp.fadd.v16f64(<16 x double> %va, <16 x double> %b, <16 x i1> %m, i32 %evl)
773  ret <16 x double> %v
774}
775
776define <16 x double> @vfadd_vv_v16f64_unmasked(<16 x double> %va, <16 x double> %b, i32 zeroext %evl) {
777; CHECK-LABEL: vfadd_vv_v16f64_unmasked:
778; CHECK:       # %bb.0:
779; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma
780; CHECK-NEXT:    vfadd.vv v8, v8, v16
781; CHECK-NEXT:    ret
782  %v = call <16 x double> @llvm.vp.fadd.v16f64(<16 x double> %va, <16 x double> %b, <16 x i1> splat (i1 true), i32 %evl)
783  ret <16 x double> %v
784}
785
786define <16 x double> @vfadd_vf_v16f64(<16 x double> %va, double %b, <16 x i1> %m, i32 zeroext %evl) {
787; CHECK-LABEL: vfadd_vf_v16f64:
788; CHECK:       # %bb.0:
789; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma
790; CHECK-NEXT:    vfadd.vf v8, v8, fa0, v0.t
791; CHECK-NEXT:    ret
792  %elt.head = insertelement <16 x double> poison, double %b, i32 0
793  %vb = shufflevector <16 x double> %elt.head, <16 x double> poison, <16 x i32> zeroinitializer
794  %v = call <16 x double> @llvm.vp.fadd.v16f64(<16 x double> %va, <16 x double> %vb, <16 x i1> %m, i32 %evl)
795  ret <16 x double> %v
796}
797
798define <16 x double> @vfadd_vf_v16f64_unmasked(<16 x double> %va, double %b, i32 zeroext %evl) {
799; CHECK-LABEL: vfadd_vf_v16f64_unmasked:
800; CHECK:       # %bb.0:
801; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma
802; CHECK-NEXT:    vfadd.vf v8, v8, fa0
803; CHECK-NEXT:    ret
804  %elt.head = insertelement <16 x double> poison, double %b, i32 0
805  %vb = shufflevector <16 x double> %elt.head, <16 x double> poison, <16 x i32> zeroinitializer
806  %v = call <16 x double> @llvm.vp.fadd.v16f64(<16 x double> %va, <16 x double> %vb, <16 x i1> splat (i1 true), i32 %evl)
807  ret <16 x double> %v
808}
809