1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=riscv32 -mattr=+v,+m,+zfh,+zvfh -target-abi=ilp32d \ 3; RUN: -verify-machineinstrs < %s | FileCheck %s \ 4; RUN: --check-prefixes=CHECK,ZVFH,ZVFH32 5; RUN: llc -mtriple=riscv64 -mattr=+v,+m,+zfh,+zvfh -target-abi=lp64d \ 6; RUN: -verify-machineinstrs < %s | FileCheck %s \ 7; RUN: --check-prefixes=CHECK,ZVFH,ZVFH64 8; RUN: llc -mtriple=riscv32 -mattr=+v,+m,+zfh,+zvfhmin -target-abi=ilp32d \ 9; RUN: -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,ZVFHMIN,ZVFHMIN32 10; RUN: llc -mtriple=riscv64 -mattr=+v,+m,+zfh,+zvfhmin -target-abi=lp64d \ 11; RUN: -verify-machineinstrs < %s | FileCheck %s \ 12; RUN: --check-prefixes=CHECK,ZVFHMIN,ZVFHMIN64 13 14declare <7 x i1> @llvm.vp.fcmp.v7f16(<7 x half>, <7 x half>, metadata, <7 x i1>, i32) 15 16define <7 x i1> @fcmp_oeq_vv_v7f16(<7 x half> %va, <7 x half> %vb, <7 x i1> %m, i32 zeroext %evl) { 17; ZVFH-LABEL: fcmp_oeq_vv_v7f16: 18; ZVFH: # %bb.0: 19; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma 20; ZVFH-NEXT: vmfeq.vv v0, v8, v9, v0.t 21; ZVFH-NEXT: ret 22; 23; ZVFHMIN-LABEL: fcmp_oeq_vv_v7f16: 24; ZVFHMIN: # %bb.0: 25; ZVFHMIN-NEXT: vsetivli zero, 8, e16, m1, ta, ma 26; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v9 27; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v8 28; ZVFHMIN-NEXT: vsetvli zero, a0, e32, m2, ta, ma 29; ZVFHMIN-NEXT: vmfeq.vv v8, v12, v10, v0.t 30; ZVFHMIN-NEXT: vmv1r.v v0, v8 31; ZVFHMIN-NEXT: ret 32 %v = call <7 x i1> @llvm.vp.fcmp.v7f16(<7 x half> %va, <7 x half> %vb, metadata !"oeq", <7 x i1> %m, i32 %evl) 33 ret <7 x i1> %v 34} 35 36declare <8 x i1> @llvm.vp.fcmp.v8f16(<8 x half>, <8 x half>, metadata, <8 x i1>, i32) 37 38define <8 x i1> @fcmp_oeq_vv_v8f16(<8 x half> %va, <8 x half> %vb, <8 x i1> %m, i32 zeroext %evl) { 39; ZVFH-LABEL: fcmp_oeq_vv_v8f16: 40; ZVFH: # %bb.0: 41; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma 42; ZVFH-NEXT: vmfeq.vv v0, v8, v9, v0.t 43; ZVFH-NEXT: ret 44; 45; ZVFHMIN-LABEL: fcmp_oeq_vv_v8f16: 46; ZVFHMIN: # %bb.0: 47; ZVFHMIN-NEXT: vsetivli zero, 8, e16, m1, ta, ma 48; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v9 49; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v8 50; ZVFHMIN-NEXT: vsetvli zero, a0, e32, m2, ta, ma 51; ZVFHMIN-NEXT: vmfeq.vv v8, v12, v10, v0.t 52; ZVFHMIN-NEXT: vmv1r.v v0, v8 53; ZVFHMIN-NEXT: ret 54 %v = call <8 x i1> @llvm.vp.fcmp.v8f16(<8 x half> %va, <8 x half> %vb, metadata !"oeq", <8 x i1> %m, i32 %evl) 55 ret <8 x i1> %v 56} 57 58define <8 x i1> @fcmp_oeq_vf_v8f16(<8 x half> %va, half %b, <8 x i1> %m, i32 zeroext %evl) { 59; ZVFH-LABEL: fcmp_oeq_vf_v8f16: 60; ZVFH: # %bb.0: 61; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma 62; ZVFH-NEXT: vmfeq.vf v0, v8, fa0, v0.t 63; ZVFH-NEXT: ret 64; 65; ZVFHMIN-LABEL: fcmp_oeq_vf_v8f16: 66; ZVFHMIN: # %bb.0: 67; ZVFHMIN-NEXT: fmv.x.h a1, fa0 68; ZVFHMIN-NEXT: vsetivli zero, 8, e16, m1, ta, ma 69; ZVFHMIN-NEXT: vmv.v.x v9, a1 70; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8 71; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v9 72; ZVFHMIN-NEXT: vsetvli zero, a0, e32, m2, ta, ma 73; ZVFHMIN-NEXT: vmfeq.vv v8, v10, v12, v0.t 74; ZVFHMIN-NEXT: vmv1r.v v0, v8 75; ZVFHMIN-NEXT: ret 76 %elt.head = insertelement <8 x half> poison, half %b, i32 0 77 %vb = shufflevector <8 x half> %elt.head, <8 x half> poison, <8 x i32> zeroinitializer 78 %v = call <8 x i1> @llvm.vp.fcmp.v8f16(<8 x half> %va, <8 x half> %vb, metadata !"oeq", <8 x i1> %m, i32 %evl) 79 ret <8 x i1> %v 80} 81 82define <8 x i1> @fcmp_oeq_vf_swap_v8f16(<8 x half> %va, half %b, <8 x i1> %m, i32 zeroext %evl) { 83; ZVFH-LABEL: fcmp_oeq_vf_swap_v8f16: 84; ZVFH: # %bb.0: 85; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma 86; ZVFH-NEXT: vmfeq.vf v0, v8, fa0, v0.t 87; ZVFH-NEXT: ret 88; 89; ZVFHMIN-LABEL: fcmp_oeq_vf_swap_v8f16: 90; ZVFHMIN: # %bb.0: 91; ZVFHMIN-NEXT: fmv.x.h a1, fa0 92; ZVFHMIN-NEXT: vsetivli zero, 8, e16, m1, ta, ma 93; ZVFHMIN-NEXT: vmv.v.x v9, a1 94; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8 95; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v9 96; ZVFHMIN-NEXT: vsetvli zero, a0, e32, m2, ta, ma 97; ZVFHMIN-NEXT: vmfeq.vv v8, v12, v10, v0.t 98; ZVFHMIN-NEXT: vmv1r.v v0, v8 99; ZVFHMIN-NEXT: ret 100 %elt.head = insertelement <8 x half> poison, half %b, i32 0 101 %vb = shufflevector <8 x half> %elt.head, <8 x half> poison, <8 x i32> zeroinitializer 102 %v = call <8 x i1> @llvm.vp.fcmp.v8f16(<8 x half> %vb, <8 x half> %va, metadata !"oeq", <8 x i1> %m, i32 %evl) 103 ret <8 x i1> %v 104} 105 106define <8 x i1> @fcmp_ogt_vv_v8f16(<8 x half> %va, <8 x half> %vb, <8 x i1> %m, i32 zeroext %evl) { 107; ZVFH-LABEL: fcmp_ogt_vv_v8f16: 108; ZVFH: # %bb.0: 109; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma 110; ZVFH-NEXT: vmflt.vv v0, v9, v8, v0.t 111; ZVFH-NEXT: ret 112; 113; ZVFHMIN-LABEL: fcmp_ogt_vv_v8f16: 114; ZVFHMIN: # %bb.0: 115; ZVFHMIN-NEXT: vsetivli zero, 8, e16, m1, ta, ma 116; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8 117; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v9 118; ZVFHMIN-NEXT: vsetvli zero, a0, e32, m2, ta, ma 119; ZVFHMIN-NEXT: vmflt.vv v8, v12, v10, v0.t 120; ZVFHMIN-NEXT: vmv1r.v v0, v8 121; ZVFHMIN-NEXT: ret 122 %v = call <8 x i1> @llvm.vp.fcmp.v8f16(<8 x half> %va, <8 x half> %vb, metadata !"ogt", <8 x i1> %m, i32 %evl) 123 ret <8 x i1> %v 124} 125 126define <8 x i1> @fcmp_ogt_vf_v8f16(<8 x half> %va, half %b, <8 x i1> %m, i32 zeroext %evl) { 127; ZVFH-LABEL: fcmp_ogt_vf_v8f16: 128; ZVFH: # %bb.0: 129; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma 130; ZVFH-NEXT: vmfgt.vf v0, v8, fa0, v0.t 131; ZVFH-NEXT: ret 132; 133; ZVFHMIN-LABEL: fcmp_ogt_vf_v8f16: 134; ZVFHMIN: # %bb.0: 135; ZVFHMIN-NEXT: fmv.x.h a1, fa0 136; ZVFHMIN-NEXT: vsetivli zero, 8, e16, m1, ta, ma 137; ZVFHMIN-NEXT: vmv.v.x v9, a1 138; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8 139; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v9 140; ZVFHMIN-NEXT: vsetvli zero, a0, e32, m2, ta, ma 141; ZVFHMIN-NEXT: vmflt.vv v8, v12, v10, v0.t 142; ZVFHMIN-NEXT: vmv1r.v v0, v8 143; ZVFHMIN-NEXT: ret 144 %elt.head = insertelement <8 x half> poison, half %b, i32 0 145 %vb = shufflevector <8 x half> %elt.head, <8 x half> poison, <8 x i32> zeroinitializer 146 %v = call <8 x i1> @llvm.vp.fcmp.v8f16(<8 x half> %va, <8 x half> %vb, metadata !"ogt", <8 x i1> %m, i32 %evl) 147 ret <8 x i1> %v 148} 149 150define <8 x i1> @fcmp_ogt_vf_swap_v8f16(<8 x half> %va, half %b, <8 x i1> %m, i32 zeroext %evl) { 151; ZVFH-LABEL: fcmp_ogt_vf_swap_v8f16: 152; ZVFH: # %bb.0: 153; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma 154; ZVFH-NEXT: vmflt.vf v0, v8, fa0, v0.t 155; ZVFH-NEXT: ret 156; 157; ZVFHMIN-LABEL: fcmp_ogt_vf_swap_v8f16: 158; ZVFHMIN: # %bb.0: 159; ZVFHMIN-NEXT: fmv.x.h a1, fa0 160; ZVFHMIN-NEXT: vsetivli zero, 8, e16, m1, ta, ma 161; ZVFHMIN-NEXT: vmv.v.x v9, a1 162; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8 163; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v9 164; ZVFHMIN-NEXT: vsetvli zero, a0, e32, m2, ta, ma 165; ZVFHMIN-NEXT: vmflt.vv v8, v10, v12, v0.t 166; ZVFHMIN-NEXT: vmv1r.v v0, v8 167; ZVFHMIN-NEXT: ret 168 %elt.head = insertelement <8 x half> poison, half %b, i32 0 169 %vb = shufflevector <8 x half> %elt.head, <8 x half> poison, <8 x i32> zeroinitializer 170 %v = call <8 x i1> @llvm.vp.fcmp.v8f16(<8 x half> %vb, <8 x half> %va, metadata !"ogt", <8 x i1> %m, i32 %evl) 171 ret <8 x i1> %v 172} 173 174define <8 x i1> @fcmp_oge_vv_v8f16(<8 x half> %va, <8 x half> %vb, <8 x i1> %m, i32 zeroext %evl) { 175; ZVFH-LABEL: fcmp_oge_vv_v8f16: 176; ZVFH: # %bb.0: 177; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma 178; ZVFH-NEXT: vmfle.vv v0, v9, v8, v0.t 179; ZVFH-NEXT: ret 180; 181; ZVFHMIN-LABEL: fcmp_oge_vv_v8f16: 182; ZVFHMIN: # %bb.0: 183; ZVFHMIN-NEXT: vsetivli zero, 8, e16, m1, ta, ma 184; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8 185; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v9 186; ZVFHMIN-NEXT: vsetvli zero, a0, e32, m2, ta, ma 187; ZVFHMIN-NEXT: vmfle.vv v8, v12, v10, v0.t 188; ZVFHMIN-NEXT: vmv1r.v v0, v8 189; ZVFHMIN-NEXT: ret 190 %v = call <8 x i1> @llvm.vp.fcmp.v8f16(<8 x half> %va, <8 x half> %vb, metadata !"oge", <8 x i1> %m, i32 %evl) 191 ret <8 x i1> %v 192} 193 194define <8 x i1> @fcmp_oge_vf_v8f16(<8 x half> %va, half %b, <8 x i1> %m, i32 zeroext %evl) { 195; ZVFH-LABEL: fcmp_oge_vf_v8f16: 196; ZVFH: # %bb.0: 197; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma 198; ZVFH-NEXT: vmfge.vf v0, v8, fa0, v0.t 199; ZVFH-NEXT: ret 200; 201; ZVFHMIN-LABEL: fcmp_oge_vf_v8f16: 202; ZVFHMIN: # %bb.0: 203; ZVFHMIN-NEXT: fmv.x.h a1, fa0 204; ZVFHMIN-NEXT: vsetivli zero, 8, e16, m1, ta, ma 205; ZVFHMIN-NEXT: vmv.v.x v9, a1 206; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8 207; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v9 208; ZVFHMIN-NEXT: vsetvli zero, a0, e32, m2, ta, ma 209; ZVFHMIN-NEXT: vmfle.vv v8, v12, v10, v0.t 210; ZVFHMIN-NEXT: vmv1r.v v0, v8 211; ZVFHMIN-NEXT: ret 212 %elt.head = insertelement <8 x half> poison, half %b, i32 0 213 %vb = shufflevector <8 x half> %elt.head, <8 x half> poison, <8 x i32> zeroinitializer 214 %v = call <8 x i1> @llvm.vp.fcmp.v8f16(<8 x half> %va, <8 x half> %vb, metadata !"oge", <8 x i1> %m, i32 %evl) 215 ret <8 x i1> %v 216} 217 218define <8 x i1> @fcmp_oge_vf_swap_v8f16(<8 x half> %va, half %b, <8 x i1> %m, i32 zeroext %evl) { 219; ZVFH-LABEL: fcmp_oge_vf_swap_v8f16: 220; ZVFH: # %bb.0: 221; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma 222; ZVFH-NEXT: vmfle.vf v0, v8, fa0, v0.t 223; ZVFH-NEXT: ret 224; 225; ZVFHMIN-LABEL: fcmp_oge_vf_swap_v8f16: 226; ZVFHMIN: # %bb.0: 227; ZVFHMIN-NEXT: fmv.x.h a1, fa0 228; ZVFHMIN-NEXT: vsetivli zero, 8, e16, m1, ta, ma 229; ZVFHMIN-NEXT: vmv.v.x v9, a1 230; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8 231; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v9 232; ZVFHMIN-NEXT: vsetvli zero, a0, e32, m2, ta, ma 233; ZVFHMIN-NEXT: vmfle.vv v8, v10, v12, v0.t 234; ZVFHMIN-NEXT: vmv1r.v v0, v8 235; ZVFHMIN-NEXT: ret 236 %elt.head = insertelement <8 x half> poison, half %b, i32 0 237 %vb = shufflevector <8 x half> %elt.head, <8 x half> poison, <8 x i32> zeroinitializer 238 %v = call <8 x i1> @llvm.vp.fcmp.v8f16(<8 x half> %vb, <8 x half> %va, metadata !"oge", <8 x i1> %m, i32 %evl) 239 ret <8 x i1> %v 240} 241 242define <8 x i1> @fcmp_olt_vv_v8f16(<8 x half> %va, <8 x half> %vb, <8 x i1> %m, i32 zeroext %evl) { 243; ZVFH-LABEL: fcmp_olt_vv_v8f16: 244; ZVFH: # %bb.0: 245; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma 246; ZVFH-NEXT: vmflt.vv v0, v8, v9, v0.t 247; ZVFH-NEXT: ret 248; 249; ZVFHMIN-LABEL: fcmp_olt_vv_v8f16: 250; ZVFHMIN: # %bb.0: 251; ZVFHMIN-NEXT: vsetivli zero, 8, e16, m1, ta, ma 252; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v9 253; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v8 254; ZVFHMIN-NEXT: vsetvli zero, a0, e32, m2, ta, ma 255; ZVFHMIN-NEXT: vmflt.vv v8, v12, v10, v0.t 256; ZVFHMIN-NEXT: vmv1r.v v0, v8 257; ZVFHMIN-NEXT: ret 258 %v = call <8 x i1> @llvm.vp.fcmp.v8f16(<8 x half> %va, <8 x half> %vb, metadata !"olt", <8 x i1> %m, i32 %evl) 259 ret <8 x i1> %v 260} 261 262define <8 x i1> @fcmp_olt_vf_v8f16(<8 x half> %va, half %b, <8 x i1> %m, i32 zeroext %evl) { 263; ZVFH-LABEL: fcmp_olt_vf_v8f16: 264; ZVFH: # %bb.0: 265; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma 266; ZVFH-NEXT: vmflt.vf v0, v8, fa0, v0.t 267; ZVFH-NEXT: ret 268; 269; ZVFHMIN-LABEL: fcmp_olt_vf_v8f16: 270; ZVFHMIN: # %bb.0: 271; ZVFHMIN-NEXT: fmv.x.h a1, fa0 272; ZVFHMIN-NEXT: vsetivli zero, 8, e16, m1, ta, ma 273; ZVFHMIN-NEXT: vmv.v.x v9, a1 274; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8 275; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v9 276; ZVFHMIN-NEXT: vsetvli zero, a0, e32, m2, ta, ma 277; ZVFHMIN-NEXT: vmflt.vv v8, v10, v12, v0.t 278; ZVFHMIN-NEXT: vmv1r.v v0, v8 279; ZVFHMIN-NEXT: ret 280 %elt.head = insertelement <8 x half> poison, half %b, i32 0 281 %vb = shufflevector <8 x half> %elt.head, <8 x half> poison, <8 x i32> zeroinitializer 282 %v = call <8 x i1> @llvm.vp.fcmp.v8f16(<8 x half> %va, <8 x half> %vb, metadata !"olt", <8 x i1> %m, i32 %evl) 283 ret <8 x i1> %v 284} 285 286define <8 x i1> @fcmp_olt_vf_swap_v8f16(<8 x half> %va, half %b, <8 x i1> %m, i32 zeroext %evl) { 287; ZVFH-LABEL: fcmp_olt_vf_swap_v8f16: 288; ZVFH: # %bb.0: 289; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma 290; ZVFH-NEXT: vmfgt.vf v0, v8, fa0, v0.t 291; ZVFH-NEXT: ret 292; 293; ZVFHMIN-LABEL: fcmp_olt_vf_swap_v8f16: 294; ZVFHMIN: # %bb.0: 295; ZVFHMIN-NEXT: fmv.x.h a1, fa0 296; ZVFHMIN-NEXT: vsetivli zero, 8, e16, m1, ta, ma 297; ZVFHMIN-NEXT: vmv.v.x v9, a1 298; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8 299; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v9 300; ZVFHMIN-NEXT: vsetvli zero, a0, e32, m2, ta, ma 301; ZVFHMIN-NEXT: vmflt.vv v8, v12, v10, v0.t 302; ZVFHMIN-NEXT: vmv1r.v v0, v8 303; ZVFHMIN-NEXT: ret 304 %elt.head = insertelement <8 x half> poison, half %b, i32 0 305 %vb = shufflevector <8 x half> %elt.head, <8 x half> poison, <8 x i32> zeroinitializer 306 %v = call <8 x i1> @llvm.vp.fcmp.v8f16(<8 x half> %vb, <8 x half> %va, metadata !"olt", <8 x i1> %m, i32 %evl) 307 ret <8 x i1> %v 308} 309 310define <8 x i1> @fcmp_ole_vv_v8f16(<8 x half> %va, <8 x half> %vb, <8 x i1> %m, i32 zeroext %evl) { 311; ZVFH-LABEL: fcmp_ole_vv_v8f16: 312; ZVFH: # %bb.0: 313; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma 314; ZVFH-NEXT: vmfle.vv v0, v8, v9, v0.t 315; ZVFH-NEXT: ret 316; 317; ZVFHMIN-LABEL: fcmp_ole_vv_v8f16: 318; ZVFHMIN: # %bb.0: 319; ZVFHMIN-NEXT: vsetivli zero, 8, e16, m1, ta, ma 320; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v9 321; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v8 322; ZVFHMIN-NEXT: vsetvli zero, a0, e32, m2, ta, ma 323; ZVFHMIN-NEXT: vmfle.vv v8, v12, v10, v0.t 324; ZVFHMIN-NEXT: vmv1r.v v0, v8 325; ZVFHMIN-NEXT: ret 326 %v = call <8 x i1> @llvm.vp.fcmp.v8f16(<8 x half> %va, <8 x half> %vb, metadata !"ole", <8 x i1> %m, i32 %evl) 327 ret <8 x i1> %v 328} 329 330define <8 x i1> @fcmp_ole_vf_v8f16(<8 x half> %va, half %b, <8 x i1> %m, i32 zeroext %evl) { 331; ZVFH-LABEL: fcmp_ole_vf_v8f16: 332; ZVFH: # %bb.0: 333; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma 334; ZVFH-NEXT: vmfle.vf v0, v8, fa0, v0.t 335; ZVFH-NEXT: ret 336; 337; ZVFHMIN-LABEL: fcmp_ole_vf_v8f16: 338; ZVFHMIN: # %bb.0: 339; ZVFHMIN-NEXT: fmv.x.h a1, fa0 340; ZVFHMIN-NEXT: vsetivli zero, 8, e16, m1, ta, ma 341; ZVFHMIN-NEXT: vmv.v.x v9, a1 342; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8 343; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v9 344; ZVFHMIN-NEXT: vsetvli zero, a0, e32, m2, ta, ma 345; ZVFHMIN-NEXT: vmfle.vv v8, v10, v12, v0.t 346; ZVFHMIN-NEXT: vmv1r.v v0, v8 347; ZVFHMIN-NEXT: ret 348 %elt.head = insertelement <8 x half> poison, half %b, i32 0 349 %vb = shufflevector <8 x half> %elt.head, <8 x half> poison, <8 x i32> zeroinitializer 350 %v = call <8 x i1> @llvm.vp.fcmp.v8f16(<8 x half> %va, <8 x half> %vb, metadata !"ole", <8 x i1> %m, i32 %evl) 351 ret <8 x i1> %v 352} 353 354define <8 x i1> @fcmp_ole_vf_swap_v8f16(<8 x half> %va, half %b, <8 x i1> %m, i32 zeroext %evl) { 355; ZVFH-LABEL: fcmp_ole_vf_swap_v8f16: 356; ZVFH: # %bb.0: 357; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma 358; ZVFH-NEXT: vmfge.vf v0, v8, fa0, v0.t 359; ZVFH-NEXT: ret 360; 361; ZVFHMIN-LABEL: fcmp_ole_vf_swap_v8f16: 362; ZVFHMIN: # %bb.0: 363; ZVFHMIN-NEXT: fmv.x.h a1, fa0 364; ZVFHMIN-NEXT: vsetivli zero, 8, e16, m1, ta, ma 365; ZVFHMIN-NEXT: vmv.v.x v9, a1 366; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8 367; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v9 368; ZVFHMIN-NEXT: vsetvli zero, a0, e32, m2, ta, ma 369; ZVFHMIN-NEXT: vmfle.vv v8, v12, v10, v0.t 370; ZVFHMIN-NEXT: vmv1r.v v0, v8 371; ZVFHMIN-NEXT: ret 372 %elt.head = insertelement <8 x half> poison, half %b, i32 0 373 %vb = shufflevector <8 x half> %elt.head, <8 x half> poison, <8 x i32> zeroinitializer 374 %v = call <8 x i1> @llvm.vp.fcmp.v8f16(<8 x half> %vb, <8 x half> %va, metadata !"ole", <8 x i1> %m, i32 %evl) 375 ret <8 x i1> %v 376} 377 378define <8 x i1> @fcmp_one_vv_v8f16(<8 x half> %va, <8 x half> %vb, <8 x i1> %m, i32 zeroext %evl) { 379; ZVFH-LABEL: fcmp_one_vv_v8f16: 380; ZVFH: # %bb.0: 381; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma 382; ZVFH-NEXT: vmflt.vv v10, v8, v9, v0.t 383; ZVFH-NEXT: vmflt.vv v8, v9, v8, v0.t 384; ZVFH-NEXT: vmor.mm v0, v8, v10 385; ZVFH-NEXT: ret 386; 387; ZVFHMIN-LABEL: fcmp_one_vv_v8f16: 388; ZVFHMIN: # %bb.0: 389; ZVFHMIN-NEXT: vsetivli zero, 8, e16, m1, ta, ma 390; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v9 391; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v8 392; ZVFHMIN-NEXT: vsetvli zero, a0, e32, m2, ta, ma 393; ZVFHMIN-NEXT: vmflt.vv v8, v12, v10, v0.t 394; ZVFHMIN-NEXT: vmflt.vv v9, v10, v12, v0.t 395; ZVFHMIN-NEXT: vmor.mm v0, v9, v8 396; ZVFHMIN-NEXT: ret 397 %v = call <8 x i1> @llvm.vp.fcmp.v8f16(<8 x half> %va, <8 x half> %vb, metadata !"one", <8 x i1> %m, i32 %evl) 398 ret <8 x i1> %v 399} 400 401define <8 x i1> @fcmp_one_vf_v8f16(<8 x half> %va, half %b, <8 x i1> %m, i32 zeroext %evl) { 402; ZVFH-LABEL: fcmp_one_vf_v8f16: 403; ZVFH: # %bb.0: 404; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma 405; ZVFH-NEXT: vmflt.vf v9, v8, fa0, v0.t 406; ZVFH-NEXT: vmfgt.vf v8, v8, fa0, v0.t 407; ZVFH-NEXT: vmor.mm v0, v8, v9 408; ZVFH-NEXT: ret 409; 410; ZVFHMIN-LABEL: fcmp_one_vf_v8f16: 411; ZVFHMIN: # %bb.0: 412; ZVFHMIN-NEXT: fmv.x.h a1, fa0 413; ZVFHMIN-NEXT: vsetivli zero, 8, e16, m1, ta, ma 414; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8 415; ZVFHMIN-NEXT: vmv.v.x v8, a1 416; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v8 417; ZVFHMIN-NEXT: vsetvli zero, a0, e32, m2, ta, ma 418; ZVFHMIN-NEXT: vmflt.vv v8, v10, v12, v0.t 419; ZVFHMIN-NEXT: vmflt.vv v9, v12, v10, v0.t 420; ZVFHMIN-NEXT: vmor.mm v0, v9, v8 421; ZVFHMIN-NEXT: ret 422 %elt.head = insertelement <8 x half> poison, half %b, i32 0 423 %vb = shufflevector <8 x half> %elt.head, <8 x half> poison, <8 x i32> zeroinitializer 424 %v = call <8 x i1> @llvm.vp.fcmp.v8f16(<8 x half> %va, <8 x half> %vb, metadata !"one", <8 x i1> %m, i32 %evl) 425 ret <8 x i1> %v 426} 427 428define <8 x i1> @fcmp_one_vf_swap_v8f16(<8 x half> %va, half %b, <8 x i1> %m, i32 zeroext %evl) { 429; ZVFH-LABEL: fcmp_one_vf_swap_v8f16: 430; ZVFH: # %bb.0: 431; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma 432; ZVFH-NEXT: vmfgt.vf v9, v8, fa0, v0.t 433; ZVFH-NEXT: vmflt.vf v8, v8, fa0, v0.t 434; ZVFH-NEXT: vmor.mm v0, v8, v9 435; ZVFH-NEXT: ret 436; 437; ZVFHMIN-LABEL: fcmp_one_vf_swap_v8f16: 438; ZVFHMIN: # %bb.0: 439; ZVFHMIN-NEXT: fmv.x.h a1, fa0 440; ZVFHMIN-NEXT: vsetivli zero, 8, e16, m1, ta, ma 441; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8 442; ZVFHMIN-NEXT: vmv.v.x v8, a1 443; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v8 444; ZVFHMIN-NEXT: vsetvli zero, a0, e32, m2, ta, ma 445; ZVFHMIN-NEXT: vmflt.vv v8, v12, v10, v0.t 446; ZVFHMIN-NEXT: vmflt.vv v9, v10, v12, v0.t 447; ZVFHMIN-NEXT: vmor.mm v0, v9, v8 448; ZVFHMIN-NEXT: ret 449 %elt.head = insertelement <8 x half> poison, half %b, i32 0 450 %vb = shufflevector <8 x half> %elt.head, <8 x half> poison, <8 x i32> zeroinitializer 451 %v = call <8 x i1> @llvm.vp.fcmp.v8f16(<8 x half> %vb, <8 x half> %va, metadata !"one", <8 x i1> %m, i32 %evl) 452 ret <8 x i1> %v 453} 454 455define <8 x i1> @fcmp_ord_vv_v8f16(<8 x half> %va, <8 x half> %vb, <8 x i1> %m, i32 zeroext %evl) { 456; ZVFH-LABEL: fcmp_ord_vv_v8f16: 457; ZVFH: # %bb.0: 458; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma 459; ZVFH-NEXT: vmfeq.vv v9, v9, v9, v0.t 460; ZVFH-NEXT: vmfeq.vv v8, v8, v8, v0.t 461; ZVFH-NEXT: vmand.mm v0, v8, v9 462; ZVFH-NEXT: ret 463; 464; ZVFHMIN-LABEL: fcmp_ord_vv_v8f16: 465; ZVFHMIN: # %bb.0: 466; ZVFHMIN-NEXT: vsetivli zero, 8, e16, m1, ta, ma 467; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v9 468; ZVFHMIN-NEXT: vsetvli zero, a0, e32, m2, ta, ma 469; ZVFHMIN-NEXT: vmfeq.vv v9, v10, v10, v0.t 470; ZVFHMIN-NEXT: vsetivli zero, 8, e16, m1, ta, ma 471; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8 472; ZVFHMIN-NEXT: vsetvli zero, a0, e32, m2, ta, ma 473; ZVFHMIN-NEXT: vmfeq.vv v8, v10, v10, v0.t 474; ZVFHMIN-NEXT: vmand.mm v0, v8, v9 475; ZVFHMIN-NEXT: ret 476 %v = call <8 x i1> @llvm.vp.fcmp.v8f16(<8 x half> %va, <8 x half> %vb, metadata !"ord", <8 x i1> %m, i32 %evl) 477 ret <8 x i1> %v 478} 479 480define <8 x i1> @fcmp_ord_vf_v8f16(<8 x half> %va, half %b, <8 x i1> %m, i32 zeroext %evl) { 481; ZVFH-LABEL: fcmp_ord_vf_v8f16: 482; ZVFH: # %bb.0: 483; ZVFH-NEXT: vsetivli zero, 8, e16, m1, ta, ma 484; ZVFH-NEXT: vfmv.v.f v9, fa0 485; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma 486; ZVFH-NEXT: vmfeq.vf v9, v9, fa0, v0.t 487; ZVFH-NEXT: vmfeq.vv v8, v8, v8, v0.t 488; ZVFH-NEXT: vmand.mm v0, v8, v9 489; ZVFH-NEXT: ret 490; 491; ZVFHMIN-LABEL: fcmp_ord_vf_v8f16: 492; ZVFHMIN: # %bb.0: 493; ZVFHMIN-NEXT: fmv.x.h a1, fa0 494; ZVFHMIN-NEXT: vsetivli zero, 8, e16, m1, ta, ma 495; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8 496; ZVFHMIN-NEXT: vmv.v.x v8, a1 497; ZVFHMIN-NEXT: vsetvli zero, a0, e32, m2, ta, ma 498; ZVFHMIN-NEXT: vmfeq.vv v9, v10, v10, v0.t 499; ZVFHMIN-NEXT: vsetivli zero, 8, e16, m1, ta, ma 500; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8 501; ZVFHMIN-NEXT: vsetvli zero, a0, e32, m2, ta, ma 502; ZVFHMIN-NEXT: vmfeq.vv v8, v10, v10, v0.t 503; ZVFHMIN-NEXT: vmand.mm v0, v9, v8 504; ZVFHMIN-NEXT: ret 505 %elt.head = insertelement <8 x half> poison, half %b, i32 0 506 %vb = shufflevector <8 x half> %elt.head, <8 x half> poison, <8 x i32> zeroinitializer 507 %v = call <8 x i1> @llvm.vp.fcmp.v8f16(<8 x half> %va, <8 x half> %vb, metadata !"ord", <8 x i1> %m, i32 %evl) 508 ret <8 x i1> %v 509} 510 511define <8 x i1> @fcmp_ord_vf_swap_v8f16(<8 x half> %va, half %b, <8 x i1> %m, i32 zeroext %evl) { 512; ZVFH-LABEL: fcmp_ord_vf_swap_v8f16: 513; ZVFH: # %bb.0: 514; ZVFH-NEXT: vsetivli zero, 8, e16, m1, ta, ma 515; ZVFH-NEXT: vfmv.v.f v9, fa0 516; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma 517; ZVFH-NEXT: vmfeq.vf v9, v9, fa0, v0.t 518; ZVFH-NEXT: vmfeq.vv v8, v8, v8, v0.t 519; ZVFH-NEXT: vmand.mm v0, v9, v8 520; ZVFH-NEXT: ret 521; 522; ZVFHMIN-LABEL: fcmp_ord_vf_swap_v8f16: 523; ZVFHMIN: # %bb.0: 524; ZVFHMIN-NEXT: fmv.x.h a1, fa0 525; ZVFHMIN-NEXT: vsetivli zero, 8, e16, m1, ta, ma 526; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8 527; ZVFHMIN-NEXT: vmv.v.x v8, a1 528; ZVFHMIN-NEXT: vsetvli zero, a0, e32, m2, ta, ma 529; ZVFHMIN-NEXT: vmfeq.vv v9, v10, v10, v0.t 530; ZVFHMIN-NEXT: vsetivli zero, 8, e16, m1, ta, ma 531; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8 532; ZVFHMIN-NEXT: vsetvli zero, a0, e32, m2, ta, ma 533; ZVFHMIN-NEXT: vmfeq.vv v8, v10, v10, v0.t 534; ZVFHMIN-NEXT: vmand.mm v0, v8, v9 535; ZVFHMIN-NEXT: ret 536 %elt.head = insertelement <8 x half> poison, half %b, i32 0 537 %vb = shufflevector <8 x half> %elt.head, <8 x half> poison, <8 x i32> zeroinitializer 538 %v = call <8 x i1> @llvm.vp.fcmp.v8f16(<8 x half> %vb, <8 x half> %va, metadata !"ord", <8 x i1> %m, i32 %evl) 539 ret <8 x i1> %v 540} 541 542define <8 x i1> @fcmp_ueq_vv_v8f16(<8 x half> %va, <8 x half> %vb, <8 x i1> %m, i32 zeroext %evl) { 543; ZVFH-LABEL: fcmp_ueq_vv_v8f16: 544; ZVFH: # %bb.0: 545; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma 546; ZVFH-NEXT: vmflt.vv v10, v8, v9, v0.t 547; ZVFH-NEXT: vmflt.vv v8, v9, v8, v0.t 548; ZVFH-NEXT: vmnor.mm v0, v8, v10 549; ZVFH-NEXT: ret 550; 551; ZVFHMIN-LABEL: fcmp_ueq_vv_v8f16: 552; ZVFHMIN: # %bb.0: 553; ZVFHMIN-NEXT: vsetivli zero, 8, e16, m1, ta, ma 554; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v9 555; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v8 556; ZVFHMIN-NEXT: vsetvli zero, a0, e32, m2, ta, ma 557; ZVFHMIN-NEXT: vmflt.vv v8, v12, v10, v0.t 558; ZVFHMIN-NEXT: vmflt.vv v9, v10, v12, v0.t 559; ZVFHMIN-NEXT: vmnor.mm v0, v9, v8 560; ZVFHMIN-NEXT: ret 561 %v = call <8 x i1> @llvm.vp.fcmp.v8f16(<8 x half> %va, <8 x half> %vb, metadata !"ueq", <8 x i1> %m, i32 %evl) 562 ret <8 x i1> %v 563} 564 565define <8 x i1> @fcmp_ueq_vf_v8f16(<8 x half> %va, half %b, <8 x i1> %m, i32 zeroext %evl) { 566; ZVFH-LABEL: fcmp_ueq_vf_v8f16: 567; ZVFH: # %bb.0: 568; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma 569; ZVFH-NEXT: vmflt.vf v9, v8, fa0, v0.t 570; ZVFH-NEXT: vmfgt.vf v8, v8, fa0, v0.t 571; ZVFH-NEXT: vmnor.mm v0, v8, v9 572; ZVFH-NEXT: ret 573; 574; ZVFHMIN-LABEL: fcmp_ueq_vf_v8f16: 575; ZVFHMIN: # %bb.0: 576; ZVFHMIN-NEXT: fmv.x.h a1, fa0 577; ZVFHMIN-NEXT: vsetivli zero, 8, e16, m1, ta, ma 578; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8 579; ZVFHMIN-NEXT: vmv.v.x v8, a1 580; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v8 581; ZVFHMIN-NEXT: vsetvli zero, a0, e32, m2, ta, ma 582; ZVFHMIN-NEXT: vmflt.vv v8, v10, v12, v0.t 583; ZVFHMIN-NEXT: vmflt.vv v9, v12, v10, v0.t 584; ZVFHMIN-NEXT: vmnor.mm v0, v9, v8 585; ZVFHMIN-NEXT: ret 586 %elt.head = insertelement <8 x half> poison, half %b, i32 0 587 %vb = shufflevector <8 x half> %elt.head, <8 x half> poison, <8 x i32> zeroinitializer 588 %v = call <8 x i1> @llvm.vp.fcmp.v8f16(<8 x half> %va, <8 x half> %vb, metadata !"ueq", <8 x i1> %m, i32 %evl) 589 ret <8 x i1> %v 590} 591 592define <8 x i1> @fcmp_ueq_vf_swap_v8f16(<8 x half> %va, half %b, <8 x i1> %m, i32 zeroext %evl) { 593; ZVFH-LABEL: fcmp_ueq_vf_swap_v8f16: 594; ZVFH: # %bb.0: 595; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma 596; ZVFH-NEXT: vmfgt.vf v9, v8, fa0, v0.t 597; ZVFH-NEXT: vmflt.vf v8, v8, fa0, v0.t 598; ZVFH-NEXT: vmnor.mm v0, v8, v9 599; ZVFH-NEXT: ret 600; 601; ZVFHMIN-LABEL: fcmp_ueq_vf_swap_v8f16: 602; ZVFHMIN: # %bb.0: 603; ZVFHMIN-NEXT: fmv.x.h a1, fa0 604; ZVFHMIN-NEXT: vsetivli zero, 8, e16, m1, ta, ma 605; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8 606; ZVFHMIN-NEXT: vmv.v.x v8, a1 607; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v8 608; ZVFHMIN-NEXT: vsetvli zero, a0, e32, m2, ta, ma 609; ZVFHMIN-NEXT: vmflt.vv v8, v12, v10, v0.t 610; ZVFHMIN-NEXT: vmflt.vv v9, v10, v12, v0.t 611; ZVFHMIN-NEXT: vmnor.mm v0, v9, v8 612; ZVFHMIN-NEXT: ret 613 %elt.head = insertelement <8 x half> poison, half %b, i32 0 614 %vb = shufflevector <8 x half> %elt.head, <8 x half> poison, <8 x i32> zeroinitializer 615 %v = call <8 x i1> @llvm.vp.fcmp.v8f16(<8 x half> %vb, <8 x half> %va, metadata !"ueq", <8 x i1> %m, i32 %evl) 616 ret <8 x i1> %v 617} 618 619define <8 x i1> @fcmp_ugt_vv_v8f16(<8 x half> %va, <8 x half> %vb, <8 x i1> %m, i32 zeroext %evl) { 620; ZVFH-LABEL: fcmp_ugt_vv_v8f16: 621; ZVFH: # %bb.0: 622; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma 623; ZVFH-NEXT: vmfle.vv v8, v8, v9, v0.t 624; ZVFH-NEXT: vmnot.m v0, v8 625; ZVFH-NEXT: ret 626; 627; ZVFHMIN-LABEL: fcmp_ugt_vv_v8f16: 628; ZVFHMIN: # %bb.0: 629; ZVFHMIN-NEXT: vsetivli zero, 8, e16, m1, ta, ma 630; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v9 631; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v8 632; ZVFHMIN-NEXT: vsetvli zero, a0, e32, m2, ta, ma 633; ZVFHMIN-NEXT: vmfle.vv v8, v12, v10, v0.t 634; ZVFHMIN-NEXT: vmnot.m v0, v8 635; ZVFHMIN-NEXT: ret 636 %v = call <8 x i1> @llvm.vp.fcmp.v8f16(<8 x half> %va, <8 x half> %vb, metadata !"ugt", <8 x i1> %m, i32 %evl) 637 ret <8 x i1> %v 638} 639 640define <8 x i1> @fcmp_ugt_vf_v8f16(<8 x half> %va, half %b, <8 x i1> %m, i32 zeroext %evl) { 641; ZVFH-LABEL: fcmp_ugt_vf_v8f16: 642; ZVFH: # %bb.0: 643; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma 644; ZVFH-NEXT: vmfle.vf v8, v8, fa0, v0.t 645; ZVFH-NEXT: vmnot.m v0, v8 646; ZVFH-NEXT: ret 647; 648; ZVFHMIN-LABEL: fcmp_ugt_vf_v8f16: 649; ZVFHMIN: # %bb.0: 650; ZVFHMIN-NEXT: fmv.x.h a1, fa0 651; ZVFHMIN-NEXT: vsetivli zero, 8, e16, m1, ta, ma 652; ZVFHMIN-NEXT: vmv.v.x v9, a1 653; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8 654; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v9 655; ZVFHMIN-NEXT: vsetvli zero, a0, e32, m2, ta, ma 656; ZVFHMIN-NEXT: vmfle.vv v8, v10, v12, v0.t 657; ZVFHMIN-NEXT: vmnot.m v0, v8 658; ZVFHMIN-NEXT: ret 659 %elt.head = insertelement <8 x half> poison, half %b, i32 0 660 %vb = shufflevector <8 x half> %elt.head, <8 x half> poison, <8 x i32> zeroinitializer 661 %v = call <8 x i1> @llvm.vp.fcmp.v8f16(<8 x half> %va, <8 x half> %vb, metadata !"ugt", <8 x i1> %m, i32 %evl) 662 ret <8 x i1> %v 663} 664 665define <8 x i1> @fcmp_ugt_vf_swap_v8f16(<8 x half> %va, half %b, <8 x i1> %m, i32 zeroext %evl) { 666; ZVFH-LABEL: fcmp_ugt_vf_swap_v8f16: 667; ZVFH: # %bb.0: 668; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma 669; ZVFH-NEXT: vmfge.vf v8, v8, fa0, v0.t 670; ZVFH-NEXT: vmnot.m v0, v8 671; ZVFH-NEXT: ret 672; 673; ZVFHMIN-LABEL: fcmp_ugt_vf_swap_v8f16: 674; ZVFHMIN: # %bb.0: 675; ZVFHMIN-NEXT: fmv.x.h a1, fa0 676; ZVFHMIN-NEXT: vsetivli zero, 8, e16, m1, ta, ma 677; ZVFHMIN-NEXT: vmv.v.x v9, a1 678; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8 679; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v9 680; ZVFHMIN-NEXT: vsetvli zero, a0, e32, m2, ta, ma 681; ZVFHMIN-NEXT: vmfle.vv v8, v12, v10, v0.t 682; ZVFHMIN-NEXT: vmnot.m v0, v8 683; ZVFHMIN-NEXT: ret 684 %elt.head = insertelement <8 x half> poison, half %b, i32 0 685 %vb = shufflevector <8 x half> %elt.head, <8 x half> poison, <8 x i32> zeroinitializer 686 %v = call <8 x i1> @llvm.vp.fcmp.v8f16(<8 x half> %vb, <8 x half> %va, metadata !"ugt", <8 x i1> %m, i32 %evl) 687 ret <8 x i1> %v 688} 689 690define <8 x i1> @fcmp_uge_vv_v8f16(<8 x half> %va, <8 x half> %vb, <8 x i1> %m, i32 zeroext %evl) { 691; ZVFH-LABEL: fcmp_uge_vv_v8f16: 692; ZVFH: # %bb.0: 693; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma 694; ZVFH-NEXT: vmflt.vv v8, v8, v9, v0.t 695; ZVFH-NEXT: vmnot.m v0, v8 696; ZVFH-NEXT: ret 697; 698; ZVFHMIN-LABEL: fcmp_uge_vv_v8f16: 699; ZVFHMIN: # %bb.0: 700; ZVFHMIN-NEXT: vsetivli zero, 8, e16, m1, ta, ma 701; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v9 702; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v8 703; ZVFHMIN-NEXT: vsetvli zero, a0, e32, m2, ta, ma 704; ZVFHMIN-NEXT: vmflt.vv v8, v12, v10, v0.t 705; ZVFHMIN-NEXT: vmnot.m v0, v8 706; ZVFHMIN-NEXT: ret 707 %v = call <8 x i1> @llvm.vp.fcmp.v8f16(<8 x half> %va, <8 x half> %vb, metadata !"uge", <8 x i1> %m, i32 %evl) 708 ret <8 x i1> %v 709} 710 711define <8 x i1> @fcmp_uge_vf_v8f16(<8 x half> %va, half %b, <8 x i1> %m, i32 zeroext %evl) { 712; ZVFH-LABEL: fcmp_uge_vf_v8f16: 713; ZVFH: # %bb.0: 714; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma 715; ZVFH-NEXT: vmflt.vf v8, v8, fa0, v0.t 716; ZVFH-NEXT: vmnot.m v0, v8 717; ZVFH-NEXT: ret 718; 719; ZVFHMIN-LABEL: fcmp_uge_vf_v8f16: 720; ZVFHMIN: # %bb.0: 721; ZVFHMIN-NEXT: fmv.x.h a1, fa0 722; ZVFHMIN-NEXT: vsetivli zero, 8, e16, m1, ta, ma 723; ZVFHMIN-NEXT: vmv.v.x v9, a1 724; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8 725; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v9 726; ZVFHMIN-NEXT: vsetvli zero, a0, e32, m2, ta, ma 727; ZVFHMIN-NEXT: vmflt.vv v8, v10, v12, v0.t 728; ZVFHMIN-NEXT: vmnot.m v0, v8 729; ZVFHMIN-NEXT: ret 730 %elt.head = insertelement <8 x half> poison, half %b, i32 0 731 %vb = shufflevector <8 x half> %elt.head, <8 x half> poison, <8 x i32> zeroinitializer 732 %v = call <8 x i1> @llvm.vp.fcmp.v8f16(<8 x half> %va, <8 x half> %vb, metadata !"uge", <8 x i1> %m, i32 %evl) 733 ret <8 x i1> %v 734} 735 736define <8 x i1> @fcmp_uge_vf_swap_v8f16(<8 x half> %va, half %b, <8 x i1> %m, i32 zeroext %evl) { 737; ZVFH-LABEL: fcmp_uge_vf_swap_v8f16: 738; ZVFH: # %bb.0: 739; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma 740; ZVFH-NEXT: vmfgt.vf v8, v8, fa0, v0.t 741; ZVFH-NEXT: vmnot.m v0, v8 742; ZVFH-NEXT: ret 743; 744; ZVFHMIN-LABEL: fcmp_uge_vf_swap_v8f16: 745; ZVFHMIN: # %bb.0: 746; ZVFHMIN-NEXT: fmv.x.h a1, fa0 747; ZVFHMIN-NEXT: vsetivli zero, 8, e16, m1, ta, ma 748; ZVFHMIN-NEXT: vmv.v.x v9, a1 749; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8 750; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v9 751; ZVFHMIN-NEXT: vsetvli zero, a0, e32, m2, ta, ma 752; ZVFHMIN-NEXT: vmflt.vv v8, v12, v10, v0.t 753; ZVFHMIN-NEXT: vmnot.m v0, v8 754; ZVFHMIN-NEXT: ret 755 %elt.head = insertelement <8 x half> poison, half %b, i32 0 756 %vb = shufflevector <8 x half> %elt.head, <8 x half> poison, <8 x i32> zeroinitializer 757 %v = call <8 x i1> @llvm.vp.fcmp.v8f16(<8 x half> %vb, <8 x half> %va, metadata !"uge", <8 x i1> %m, i32 %evl) 758 ret <8 x i1> %v 759} 760 761define <8 x i1> @fcmp_ult_vv_v8f16(<8 x half> %va, <8 x half> %vb, <8 x i1> %m, i32 zeroext %evl) { 762; ZVFH-LABEL: fcmp_ult_vv_v8f16: 763; ZVFH: # %bb.0: 764; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma 765; ZVFH-NEXT: vmfle.vv v8, v9, v8, v0.t 766; ZVFH-NEXT: vmnot.m v0, v8 767; ZVFH-NEXT: ret 768; 769; ZVFHMIN-LABEL: fcmp_ult_vv_v8f16: 770; ZVFHMIN: # %bb.0: 771; ZVFHMIN-NEXT: vsetivli zero, 8, e16, m1, ta, ma 772; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8 773; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v9 774; ZVFHMIN-NEXT: vsetvli zero, a0, e32, m2, ta, ma 775; ZVFHMIN-NEXT: vmfle.vv v8, v12, v10, v0.t 776; ZVFHMIN-NEXT: vmnot.m v0, v8 777; ZVFHMIN-NEXT: ret 778 %v = call <8 x i1> @llvm.vp.fcmp.v8f16(<8 x half> %va, <8 x half> %vb, metadata !"ult", <8 x i1> %m, i32 %evl) 779 ret <8 x i1> %v 780} 781 782define <8 x i1> @fcmp_ult_vf_v8f16(<8 x half> %va, half %b, <8 x i1> %m, i32 zeroext %evl) { 783; ZVFH-LABEL: fcmp_ult_vf_v8f16: 784; ZVFH: # %bb.0: 785; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma 786; ZVFH-NEXT: vmfge.vf v8, v8, fa0, v0.t 787; ZVFH-NEXT: vmnot.m v0, v8 788; ZVFH-NEXT: ret 789; 790; ZVFHMIN-LABEL: fcmp_ult_vf_v8f16: 791; ZVFHMIN: # %bb.0: 792; ZVFHMIN-NEXT: fmv.x.h a1, fa0 793; ZVFHMIN-NEXT: vsetivli zero, 8, e16, m1, ta, ma 794; ZVFHMIN-NEXT: vmv.v.x v9, a1 795; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8 796; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v9 797; ZVFHMIN-NEXT: vsetvli zero, a0, e32, m2, ta, ma 798; ZVFHMIN-NEXT: vmfle.vv v8, v12, v10, v0.t 799; ZVFHMIN-NEXT: vmnot.m v0, v8 800; ZVFHMIN-NEXT: ret 801 %elt.head = insertelement <8 x half> poison, half %b, i32 0 802 %vb = shufflevector <8 x half> %elt.head, <8 x half> poison, <8 x i32> zeroinitializer 803 %v = call <8 x i1> @llvm.vp.fcmp.v8f16(<8 x half> %va, <8 x half> %vb, metadata !"ult", <8 x i1> %m, i32 %evl) 804 ret <8 x i1> %v 805} 806 807define <8 x i1> @fcmp_ult_vf_swap_v8f16(<8 x half> %va, half %b, <8 x i1> %m, i32 zeroext %evl) { 808; ZVFH-LABEL: fcmp_ult_vf_swap_v8f16: 809; ZVFH: # %bb.0: 810; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma 811; ZVFH-NEXT: vmfle.vf v8, v8, fa0, v0.t 812; ZVFH-NEXT: vmnot.m v0, v8 813; ZVFH-NEXT: ret 814; 815; ZVFHMIN-LABEL: fcmp_ult_vf_swap_v8f16: 816; ZVFHMIN: # %bb.0: 817; ZVFHMIN-NEXT: fmv.x.h a1, fa0 818; ZVFHMIN-NEXT: vsetivli zero, 8, e16, m1, ta, ma 819; ZVFHMIN-NEXT: vmv.v.x v9, a1 820; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8 821; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v9 822; ZVFHMIN-NEXT: vsetvli zero, a0, e32, m2, ta, ma 823; ZVFHMIN-NEXT: vmfle.vv v8, v10, v12, v0.t 824; ZVFHMIN-NEXT: vmnot.m v0, v8 825; ZVFHMIN-NEXT: ret 826 %elt.head = insertelement <8 x half> poison, half %b, i32 0 827 %vb = shufflevector <8 x half> %elt.head, <8 x half> poison, <8 x i32> zeroinitializer 828 %v = call <8 x i1> @llvm.vp.fcmp.v8f16(<8 x half> %vb, <8 x half> %va, metadata !"ult", <8 x i1> %m, i32 %evl) 829 ret <8 x i1> %v 830} 831 832define <8 x i1> @fcmp_ule_vv_v8f16(<8 x half> %va, <8 x half> %vb, <8 x i1> %m, i32 zeroext %evl) { 833; ZVFH-LABEL: fcmp_ule_vv_v8f16: 834; ZVFH: # %bb.0: 835; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma 836; ZVFH-NEXT: vmflt.vv v8, v9, v8, v0.t 837; ZVFH-NEXT: vmnot.m v0, v8 838; ZVFH-NEXT: ret 839; 840; ZVFHMIN-LABEL: fcmp_ule_vv_v8f16: 841; ZVFHMIN: # %bb.0: 842; ZVFHMIN-NEXT: vsetivli zero, 8, e16, m1, ta, ma 843; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8 844; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v9 845; ZVFHMIN-NEXT: vsetvli zero, a0, e32, m2, ta, ma 846; ZVFHMIN-NEXT: vmflt.vv v8, v12, v10, v0.t 847; ZVFHMIN-NEXT: vmnot.m v0, v8 848; ZVFHMIN-NEXT: ret 849 %v = call <8 x i1> @llvm.vp.fcmp.v8f16(<8 x half> %va, <8 x half> %vb, metadata !"ule", <8 x i1> %m, i32 %evl) 850 ret <8 x i1> %v 851} 852 853define <8 x i1> @fcmp_ule_vf_v8f16(<8 x half> %va, half %b, <8 x i1> %m, i32 zeroext %evl) { 854; ZVFH-LABEL: fcmp_ule_vf_v8f16: 855; ZVFH: # %bb.0: 856; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma 857; ZVFH-NEXT: vmfgt.vf v8, v8, fa0, v0.t 858; ZVFH-NEXT: vmnot.m v0, v8 859; ZVFH-NEXT: ret 860; 861; ZVFHMIN-LABEL: fcmp_ule_vf_v8f16: 862; ZVFHMIN: # %bb.0: 863; ZVFHMIN-NEXT: fmv.x.h a1, fa0 864; ZVFHMIN-NEXT: vsetivli zero, 8, e16, m1, ta, ma 865; ZVFHMIN-NEXT: vmv.v.x v9, a1 866; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8 867; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v9 868; ZVFHMIN-NEXT: vsetvli zero, a0, e32, m2, ta, ma 869; ZVFHMIN-NEXT: vmflt.vv v8, v12, v10, v0.t 870; ZVFHMIN-NEXT: vmnot.m v0, v8 871; ZVFHMIN-NEXT: ret 872 %elt.head = insertelement <8 x half> poison, half %b, i32 0 873 %vb = shufflevector <8 x half> %elt.head, <8 x half> poison, <8 x i32> zeroinitializer 874 %v = call <8 x i1> @llvm.vp.fcmp.v8f16(<8 x half> %va, <8 x half> %vb, metadata !"ule", <8 x i1> %m, i32 %evl) 875 ret <8 x i1> %v 876} 877 878define <8 x i1> @fcmp_ule_vf_swap_v8f16(<8 x half> %va, half %b, <8 x i1> %m, i32 zeroext %evl) { 879; ZVFH-LABEL: fcmp_ule_vf_swap_v8f16: 880; ZVFH: # %bb.0: 881; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma 882; ZVFH-NEXT: vmflt.vf v8, v8, fa0, v0.t 883; ZVFH-NEXT: vmnot.m v0, v8 884; ZVFH-NEXT: ret 885; 886; ZVFHMIN-LABEL: fcmp_ule_vf_swap_v8f16: 887; ZVFHMIN: # %bb.0: 888; ZVFHMIN-NEXT: fmv.x.h a1, fa0 889; ZVFHMIN-NEXT: vsetivli zero, 8, e16, m1, ta, ma 890; ZVFHMIN-NEXT: vmv.v.x v9, a1 891; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8 892; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v9 893; ZVFHMIN-NEXT: vsetvli zero, a0, e32, m2, ta, ma 894; ZVFHMIN-NEXT: vmflt.vv v8, v10, v12, v0.t 895; ZVFHMIN-NEXT: vmnot.m v0, v8 896; ZVFHMIN-NEXT: ret 897 %elt.head = insertelement <8 x half> poison, half %b, i32 0 898 %vb = shufflevector <8 x half> %elt.head, <8 x half> poison, <8 x i32> zeroinitializer 899 %v = call <8 x i1> @llvm.vp.fcmp.v8f16(<8 x half> %vb, <8 x half> %va, metadata !"ule", <8 x i1> %m, i32 %evl) 900 ret <8 x i1> %v 901} 902 903define <8 x i1> @fcmp_une_vv_v8f16(<8 x half> %va, <8 x half> %vb, <8 x i1> %m, i32 zeroext %evl) { 904; ZVFH-LABEL: fcmp_une_vv_v8f16: 905; ZVFH: # %bb.0: 906; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma 907; ZVFH-NEXT: vmfne.vv v0, v8, v9, v0.t 908; ZVFH-NEXT: ret 909; 910; ZVFHMIN-LABEL: fcmp_une_vv_v8f16: 911; ZVFHMIN: # %bb.0: 912; ZVFHMIN-NEXT: vsetivli zero, 8, e16, m1, ta, ma 913; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v9 914; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v8 915; ZVFHMIN-NEXT: vsetvli zero, a0, e32, m2, ta, ma 916; ZVFHMIN-NEXT: vmfne.vv v8, v12, v10, v0.t 917; ZVFHMIN-NEXT: vmv1r.v v0, v8 918; ZVFHMIN-NEXT: ret 919 %v = call <8 x i1> @llvm.vp.fcmp.v8f16(<8 x half> %va, <8 x half> %vb, metadata !"une", <8 x i1> %m, i32 %evl) 920 ret <8 x i1> %v 921} 922 923define <8 x i1> @fcmp_une_vf_v8f16(<8 x half> %va, half %b, <8 x i1> %m, i32 zeroext %evl) { 924; ZVFH-LABEL: fcmp_une_vf_v8f16: 925; ZVFH: # %bb.0: 926; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma 927; ZVFH-NEXT: vmfne.vf v0, v8, fa0, v0.t 928; ZVFH-NEXT: ret 929; 930; ZVFHMIN-LABEL: fcmp_une_vf_v8f16: 931; ZVFHMIN: # %bb.0: 932; ZVFHMIN-NEXT: fmv.x.h a1, fa0 933; ZVFHMIN-NEXT: vsetivli zero, 8, e16, m1, ta, ma 934; ZVFHMIN-NEXT: vmv.v.x v9, a1 935; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8 936; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v9 937; ZVFHMIN-NEXT: vsetvli zero, a0, e32, m2, ta, ma 938; ZVFHMIN-NEXT: vmfne.vv v8, v10, v12, v0.t 939; ZVFHMIN-NEXT: vmv1r.v v0, v8 940; ZVFHMIN-NEXT: ret 941 %elt.head = insertelement <8 x half> poison, half %b, i32 0 942 %vb = shufflevector <8 x half> %elt.head, <8 x half> poison, <8 x i32> zeroinitializer 943 %v = call <8 x i1> @llvm.vp.fcmp.v8f16(<8 x half> %va, <8 x half> %vb, metadata !"une", <8 x i1> %m, i32 %evl) 944 ret <8 x i1> %v 945} 946 947define <8 x i1> @fcmp_une_vf_swap_v8f16(<8 x half> %va, half %b, <8 x i1> %m, i32 zeroext %evl) { 948; ZVFH-LABEL: fcmp_une_vf_swap_v8f16: 949; ZVFH: # %bb.0: 950; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma 951; ZVFH-NEXT: vmfne.vf v0, v8, fa0, v0.t 952; ZVFH-NEXT: ret 953; 954; ZVFHMIN-LABEL: fcmp_une_vf_swap_v8f16: 955; ZVFHMIN: # %bb.0: 956; ZVFHMIN-NEXT: fmv.x.h a1, fa0 957; ZVFHMIN-NEXT: vsetivli zero, 8, e16, m1, ta, ma 958; ZVFHMIN-NEXT: vmv.v.x v9, a1 959; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8 960; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v9 961; ZVFHMIN-NEXT: vsetvli zero, a0, e32, m2, ta, ma 962; ZVFHMIN-NEXT: vmfne.vv v8, v12, v10, v0.t 963; ZVFHMIN-NEXT: vmv1r.v v0, v8 964; ZVFHMIN-NEXT: ret 965 %elt.head = insertelement <8 x half> poison, half %b, i32 0 966 %vb = shufflevector <8 x half> %elt.head, <8 x half> poison, <8 x i32> zeroinitializer 967 %v = call <8 x i1> @llvm.vp.fcmp.v8f16(<8 x half> %vb, <8 x half> %va, metadata !"une", <8 x i1> %m, i32 %evl) 968 ret <8 x i1> %v 969} 970 971define <8 x i1> @fcmp_uno_vv_v8f16(<8 x half> %va, <8 x half> %vb, <8 x i1> %m, i32 zeroext %evl) { 972; ZVFH-LABEL: fcmp_uno_vv_v8f16: 973; ZVFH: # %bb.0: 974; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma 975; ZVFH-NEXT: vmfne.vv v9, v9, v9, v0.t 976; ZVFH-NEXT: vmfne.vv v8, v8, v8, v0.t 977; ZVFH-NEXT: vmor.mm v0, v8, v9 978; ZVFH-NEXT: ret 979; 980; ZVFHMIN-LABEL: fcmp_uno_vv_v8f16: 981; ZVFHMIN: # %bb.0: 982; ZVFHMIN-NEXT: vsetivli zero, 8, e16, m1, ta, ma 983; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v9 984; ZVFHMIN-NEXT: vsetvli zero, a0, e32, m2, ta, ma 985; ZVFHMIN-NEXT: vmfne.vv v9, v10, v10, v0.t 986; ZVFHMIN-NEXT: vsetivli zero, 8, e16, m1, ta, ma 987; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8 988; ZVFHMIN-NEXT: vsetvli zero, a0, e32, m2, ta, ma 989; ZVFHMIN-NEXT: vmfne.vv v8, v10, v10, v0.t 990; ZVFHMIN-NEXT: vmor.mm v0, v8, v9 991; ZVFHMIN-NEXT: ret 992 %v = call <8 x i1> @llvm.vp.fcmp.v8f16(<8 x half> %va, <8 x half> %vb, metadata !"uno", <8 x i1> %m, i32 %evl) 993 ret <8 x i1> %v 994} 995 996define <8 x i1> @fcmp_uno_vf_v8f16(<8 x half> %va, half %b, <8 x i1> %m, i32 zeroext %evl) { 997; ZVFH-LABEL: fcmp_uno_vf_v8f16: 998; ZVFH: # %bb.0: 999; ZVFH-NEXT: vsetivli zero, 8, e16, m1, ta, ma 1000; ZVFH-NEXT: vfmv.v.f v9, fa0 1001; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma 1002; ZVFH-NEXT: vmfne.vf v9, v9, fa0, v0.t 1003; ZVFH-NEXT: vmfne.vv v8, v8, v8, v0.t 1004; ZVFH-NEXT: vmor.mm v0, v8, v9 1005; ZVFH-NEXT: ret 1006; 1007; ZVFHMIN-LABEL: fcmp_uno_vf_v8f16: 1008; ZVFHMIN: # %bb.0: 1009; ZVFHMIN-NEXT: fmv.x.h a1, fa0 1010; ZVFHMIN-NEXT: vsetivli zero, 8, e16, m1, ta, ma 1011; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8 1012; ZVFHMIN-NEXT: vmv.v.x v8, a1 1013; ZVFHMIN-NEXT: vsetvli zero, a0, e32, m2, ta, ma 1014; ZVFHMIN-NEXT: vmfne.vv v9, v10, v10, v0.t 1015; ZVFHMIN-NEXT: vsetivli zero, 8, e16, m1, ta, ma 1016; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8 1017; ZVFHMIN-NEXT: vsetvli zero, a0, e32, m2, ta, ma 1018; ZVFHMIN-NEXT: vmfne.vv v8, v10, v10, v0.t 1019; ZVFHMIN-NEXT: vmor.mm v0, v9, v8 1020; ZVFHMIN-NEXT: ret 1021 %elt.head = insertelement <8 x half> poison, half %b, i32 0 1022 %vb = shufflevector <8 x half> %elt.head, <8 x half> poison, <8 x i32> zeroinitializer 1023 %v = call <8 x i1> @llvm.vp.fcmp.v8f16(<8 x half> %va, <8 x half> %vb, metadata !"uno", <8 x i1> %m, i32 %evl) 1024 ret <8 x i1> %v 1025} 1026 1027define <8 x i1> @fcmp_uno_vf_swap_v8f16(<8 x half> %va, half %b, <8 x i1> %m, i32 zeroext %evl) { 1028; ZVFH-LABEL: fcmp_uno_vf_swap_v8f16: 1029; ZVFH: # %bb.0: 1030; ZVFH-NEXT: vsetivli zero, 8, e16, m1, ta, ma 1031; ZVFH-NEXT: vfmv.v.f v9, fa0 1032; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma 1033; ZVFH-NEXT: vmfne.vf v9, v9, fa0, v0.t 1034; ZVFH-NEXT: vmfne.vv v8, v8, v8, v0.t 1035; ZVFH-NEXT: vmor.mm v0, v9, v8 1036; ZVFH-NEXT: ret 1037; 1038; ZVFHMIN-LABEL: fcmp_uno_vf_swap_v8f16: 1039; ZVFHMIN: # %bb.0: 1040; ZVFHMIN-NEXT: fmv.x.h a1, fa0 1041; ZVFHMIN-NEXT: vsetivli zero, 8, e16, m1, ta, ma 1042; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8 1043; ZVFHMIN-NEXT: vmv.v.x v8, a1 1044; ZVFHMIN-NEXT: vsetvli zero, a0, e32, m2, ta, ma 1045; ZVFHMIN-NEXT: vmfne.vv v9, v10, v10, v0.t 1046; ZVFHMIN-NEXT: vsetivli zero, 8, e16, m1, ta, ma 1047; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8 1048; ZVFHMIN-NEXT: vsetvli zero, a0, e32, m2, ta, ma 1049; ZVFHMIN-NEXT: vmfne.vv v8, v10, v10, v0.t 1050; ZVFHMIN-NEXT: vmor.mm v0, v8, v9 1051; ZVFHMIN-NEXT: ret 1052 %elt.head = insertelement <8 x half> poison, half %b, i32 0 1053 %vb = shufflevector <8 x half> %elt.head, <8 x half> poison, <8 x i32> zeroinitializer 1054 %v = call <8 x i1> @llvm.vp.fcmp.v8f16(<8 x half> %vb, <8 x half> %va, metadata !"uno", <8 x i1> %m, i32 %evl) 1055 ret <8 x i1> %v 1056} 1057 1058declare <128 x i1> @llvm.vp.fcmp.v128f16(<128 x half>, <128 x half>, metadata, <128 x i1>, i32) 1059 1060define <128 x i1> @fcmp_oeq_vv_v128f16(<128 x half> %va, <128 x half> %vb, <128 x i1> %m, i32 zeroext %evl) { 1061; ZVFH-LABEL: fcmp_oeq_vv_v128f16: 1062; ZVFH: # %bb.0: 1063; ZVFH-NEXT: addi sp, sp, -16 1064; ZVFH-NEXT: .cfi_def_cfa_offset 16 1065; ZVFH-NEXT: csrr a1, vlenb 1066; ZVFH-NEXT: slli a1, a1, 4 1067; ZVFH-NEXT: sub sp, sp, a1 1068; ZVFH-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x10, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 16 * vlenb 1069; ZVFH-NEXT: csrr a1, vlenb 1070; ZVFH-NEXT: slli a1, a1, 3 1071; ZVFH-NEXT: add a1, sp, a1 1072; ZVFH-NEXT: addi a1, a1, 16 1073; ZVFH-NEXT: vs8r.v v16, (a1) # Unknown-size Folded Spill 1074; ZVFH-NEXT: addi a1, a0, 128 1075; ZVFH-NEXT: li a3, 64 1076; ZVFH-NEXT: vsetvli zero, a3, e16, m8, ta, ma 1077; ZVFH-NEXT: vle16.v v16, (a1) 1078; ZVFH-NEXT: addi a1, sp, 16 1079; ZVFH-NEXT: vs8r.v v16, (a1) # Unknown-size Folded Spill 1080; ZVFH-NEXT: vle16.v v16, (a0) 1081; ZVFH-NEXT: mv a0, a2 1082; ZVFH-NEXT: vsetivli zero, 8, e8, m1, ta, ma 1083; ZVFH-NEXT: vslidedown.vi v24, v0, 8 1084; ZVFH-NEXT: bltu a2, a3, .LBB43_2 1085; ZVFH-NEXT: # %bb.1: 1086; ZVFH-NEXT: li a0, 64 1087; ZVFH-NEXT: .LBB43_2: 1088; ZVFH-NEXT: vsetvli zero, a0, e16, m8, ta, ma 1089; ZVFH-NEXT: vmfeq.vv v7, v8, v16, v0.t 1090; ZVFH-NEXT: addi a0, a2, -64 1091; ZVFH-NEXT: sltu a1, a2, a0 1092; ZVFH-NEXT: addi a1, a1, -1 1093; ZVFH-NEXT: and a0, a1, a0 1094; ZVFH-NEXT: vmv1r.v v0, v24 1095; ZVFH-NEXT: csrr a1, vlenb 1096; ZVFH-NEXT: slli a1, a1, 3 1097; ZVFH-NEXT: add a1, sp, a1 1098; ZVFH-NEXT: addi a1, a1, 16 1099; ZVFH-NEXT: vl8r.v v16, (a1) # Unknown-size Folded Reload 1100; ZVFH-NEXT: addi a1, sp, 16 1101; ZVFH-NEXT: vl8r.v v24, (a1) # Unknown-size Folded Reload 1102; ZVFH-NEXT: vsetvli zero, a0, e16, m8, ta, ma 1103; ZVFH-NEXT: vmfeq.vv v8, v16, v24, v0.t 1104; ZVFH-NEXT: vsetivli zero, 16, e8, m1, ta, ma 1105; ZVFH-NEXT: vslideup.vi v7, v8, 8 1106; ZVFH-NEXT: vmv.v.v v0, v7 1107; ZVFH-NEXT: csrr a0, vlenb 1108; ZVFH-NEXT: slli a0, a0, 4 1109; ZVFH-NEXT: add sp, sp, a0 1110; ZVFH-NEXT: .cfi_def_cfa sp, 16 1111; ZVFH-NEXT: addi sp, sp, 16 1112; ZVFH-NEXT: .cfi_def_cfa_offset 0 1113; ZVFH-NEXT: ret 1114; 1115; ZVFHMIN32-LABEL: fcmp_oeq_vv_v128f16: 1116; ZVFHMIN32: # %bb.0: 1117; ZVFHMIN32-NEXT: addi sp, sp, -896 1118; ZVFHMIN32-NEXT: .cfi_def_cfa_offset 896 1119; ZVFHMIN32-NEXT: sw ra, 892(sp) # 4-byte Folded Spill 1120; ZVFHMIN32-NEXT: sw s0, 888(sp) # 4-byte Folded Spill 1121; ZVFHMIN32-NEXT: sw s2, 884(sp) # 4-byte Folded Spill 1122; ZVFHMIN32-NEXT: sw s3, 880(sp) # 4-byte Folded Spill 1123; ZVFHMIN32-NEXT: sw s4, 876(sp) # 4-byte Folded Spill 1124; ZVFHMIN32-NEXT: sw s5, 872(sp) # 4-byte Folded Spill 1125; ZVFHMIN32-NEXT: sw s6, 868(sp) # 4-byte Folded Spill 1126; ZVFHMIN32-NEXT: sw s7, 864(sp) # 4-byte Folded Spill 1127; ZVFHMIN32-NEXT: sw s8, 860(sp) # 4-byte Folded Spill 1128; ZVFHMIN32-NEXT: sw s9, 856(sp) # 4-byte Folded Spill 1129; ZVFHMIN32-NEXT: sw s10, 852(sp) # 4-byte Folded Spill 1130; ZVFHMIN32-NEXT: sw s11, 848(sp) # 4-byte Folded Spill 1131; ZVFHMIN32-NEXT: .cfi_offset ra, -4 1132; ZVFHMIN32-NEXT: .cfi_offset s0, -8 1133; ZVFHMIN32-NEXT: .cfi_offset s2, -12 1134; ZVFHMIN32-NEXT: .cfi_offset s3, -16 1135; ZVFHMIN32-NEXT: .cfi_offset s4, -20 1136; ZVFHMIN32-NEXT: .cfi_offset s5, -24 1137; ZVFHMIN32-NEXT: .cfi_offset s6, -28 1138; ZVFHMIN32-NEXT: .cfi_offset s7, -32 1139; ZVFHMIN32-NEXT: .cfi_offset s8, -36 1140; ZVFHMIN32-NEXT: .cfi_offset s9, -40 1141; ZVFHMIN32-NEXT: .cfi_offset s10, -44 1142; ZVFHMIN32-NEXT: .cfi_offset s11, -48 1143; ZVFHMIN32-NEXT: addi s0, sp, 896 1144; ZVFHMIN32-NEXT: .cfi_def_cfa s0, 0 1145; ZVFHMIN32-NEXT: csrr a1, vlenb 1146; ZVFHMIN32-NEXT: li a2, 30 1147; ZVFHMIN32-NEXT: mul a1, a1, a2 1148; ZVFHMIN32-NEXT: sub sp, sp, a1 1149; ZVFHMIN32-NEXT: andi sp, sp, -128 1150; ZVFHMIN32-NEXT: addi a1, a0, 128 1151; ZVFHMIN32-NEXT: li a2, 64 1152; ZVFHMIN32-NEXT: addi a3, sp, 640 1153; ZVFHMIN32-NEXT: addi a4, sp, 384 1154; ZVFHMIN32-NEXT: addi a5, sp, 512 1155; ZVFHMIN32-NEXT: vsetvli zero, a2, e16, m8, ta, ma 1156; ZVFHMIN32-NEXT: vle16.v v0, (a0) 1157; ZVFHMIN32-NEXT: addi a0, sp, 256 1158; ZVFHMIN32-NEXT: vle16.v v24, (a1) 1159; ZVFHMIN32-NEXT: vse16.v v8, (a3) 1160; ZVFHMIN32-NEXT: vse16.v v0, (a4) 1161; ZVFHMIN32-NEXT: vse16.v v16, (a5) 1162; ZVFHMIN32-NEXT: vse16.v v24, (a0) 1163; ZVFHMIN32-NEXT: lh a0, 704(sp) 1164; ZVFHMIN32-NEXT: lh a1, 448(sp) 1165; ZVFHMIN32-NEXT: fmv.h.x fa5, a0 1166; ZVFHMIN32-NEXT: fmv.h.x fa4, a1 1167; ZVFHMIN32-NEXT: feq.h a0, fa5, fa4 1168; ZVFHMIN32-NEXT: sb a0, 160(sp) 1169; ZVFHMIN32-NEXT: lh a0, 702(sp) 1170; ZVFHMIN32-NEXT: lh a1, 446(sp) 1171; ZVFHMIN32-NEXT: fmv.h.x fa5, a0 1172; ZVFHMIN32-NEXT: fmv.h.x fa4, a1 1173; ZVFHMIN32-NEXT: feq.h a0, fa5, fa4 1174; ZVFHMIN32-NEXT: sb a0, 159(sp) 1175; ZVFHMIN32-NEXT: lh a0, 700(sp) 1176; ZVFHMIN32-NEXT: lh a1, 444(sp) 1177; ZVFHMIN32-NEXT: fmv.h.x fa5, a0 1178; ZVFHMIN32-NEXT: fmv.h.x fa4, a1 1179; ZVFHMIN32-NEXT: feq.h a0, fa5, fa4 1180; ZVFHMIN32-NEXT: sb a0, 158(sp) 1181; ZVFHMIN32-NEXT: lh a0, 698(sp) 1182; ZVFHMIN32-NEXT: lh a1, 442(sp) 1183; ZVFHMIN32-NEXT: fmv.h.x fa5, a0 1184; ZVFHMIN32-NEXT: fmv.h.x fa4, a1 1185; ZVFHMIN32-NEXT: feq.h a0, fa5, fa4 1186; ZVFHMIN32-NEXT: sb a0, 157(sp) 1187; ZVFHMIN32-NEXT: lh a0, 696(sp) 1188; ZVFHMIN32-NEXT: lh a1, 440(sp) 1189; ZVFHMIN32-NEXT: fmv.h.x fa5, a0 1190; ZVFHMIN32-NEXT: fmv.h.x fa4, a1 1191; ZVFHMIN32-NEXT: feq.h a0, fa5, fa4 1192; ZVFHMIN32-NEXT: sb a0, 156(sp) 1193; ZVFHMIN32-NEXT: lh a0, 694(sp) 1194; ZVFHMIN32-NEXT: lh a1, 438(sp) 1195; ZVFHMIN32-NEXT: fmv.h.x fa5, a0 1196; ZVFHMIN32-NEXT: fmv.h.x fa4, a1 1197; ZVFHMIN32-NEXT: feq.h a0, fa5, fa4 1198; ZVFHMIN32-NEXT: sb a0, 155(sp) 1199; ZVFHMIN32-NEXT: lh a0, 692(sp) 1200; ZVFHMIN32-NEXT: lh a1, 436(sp) 1201; ZVFHMIN32-NEXT: fmv.h.x fa5, a0 1202; ZVFHMIN32-NEXT: fmv.h.x fa4, a1 1203; ZVFHMIN32-NEXT: feq.h a0, fa5, fa4 1204; ZVFHMIN32-NEXT: sb a0, 154(sp) 1205; ZVFHMIN32-NEXT: lh a0, 690(sp) 1206; ZVFHMIN32-NEXT: lh a1, 434(sp) 1207; ZVFHMIN32-NEXT: fmv.h.x fa5, a0 1208; ZVFHMIN32-NEXT: fmv.h.x fa4, a1 1209; ZVFHMIN32-NEXT: feq.h a0, fa5, fa4 1210; ZVFHMIN32-NEXT: sb a0, 153(sp) 1211; ZVFHMIN32-NEXT: lh a0, 688(sp) 1212; ZVFHMIN32-NEXT: lh a1, 432(sp) 1213; ZVFHMIN32-NEXT: fmv.h.x fa5, a0 1214; ZVFHMIN32-NEXT: fmv.h.x fa4, a1 1215; ZVFHMIN32-NEXT: feq.h a0, fa5, fa4 1216; ZVFHMIN32-NEXT: sb a0, 152(sp) 1217; ZVFHMIN32-NEXT: lh a0, 686(sp) 1218; ZVFHMIN32-NEXT: lh a1, 430(sp) 1219; ZVFHMIN32-NEXT: fmv.h.x fa5, a0 1220; ZVFHMIN32-NEXT: fmv.h.x fa4, a1 1221; ZVFHMIN32-NEXT: feq.h a0, fa5, fa4 1222; ZVFHMIN32-NEXT: sb a0, 151(sp) 1223; ZVFHMIN32-NEXT: lh a0, 684(sp) 1224; ZVFHMIN32-NEXT: lh a1, 428(sp) 1225; ZVFHMIN32-NEXT: fmv.h.x fa5, a0 1226; ZVFHMIN32-NEXT: fmv.h.x fa4, a1 1227; ZVFHMIN32-NEXT: feq.h a0, fa5, fa4 1228; ZVFHMIN32-NEXT: sb a0, 150(sp) 1229; ZVFHMIN32-NEXT: lh a0, 682(sp) 1230; ZVFHMIN32-NEXT: lh a1, 426(sp) 1231; ZVFHMIN32-NEXT: fmv.h.x fa5, a0 1232; ZVFHMIN32-NEXT: fmv.h.x fa4, a1 1233; ZVFHMIN32-NEXT: feq.h a0, fa5, fa4 1234; ZVFHMIN32-NEXT: sb a0, 149(sp) 1235; ZVFHMIN32-NEXT: lh a0, 680(sp) 1236; ZVFHMIN32-NEXT: lh a1, 424(sp) 1237; ZVFHMIN32-NEXT: fmv.h.x fa5, a0 1238; ZVFHMIN32-NEXT: fmv.h.x fa4, a1 1239; ZVFHMIN32-NEXT: feq.h a0, fa5, fa4 1240; ZVFHMIN32-NEXT: sb a0, 148(sp) 1241; ZVFHMIN32-NEXT: lh a0, 678(sp) 1242; ZVFHMIN32-NEXT: lh a1, 422(sp) 1243; ZVFHMIN32-NEXT: fmv.h.x fa5, a0 1244; ZVFHMIN32-NEXT: fmv.h.x fa4, a1 1245; ZVFHMIN32-NEXT: feq.h a0, fa5, fa4 1246; ZVFHMIN32-NEXT: sb a0, 147(sp) 1247; ZVFHMIN32-NEXT: lh a0, 676(sp) 1248; ZVFHMIN32-NEXT: lh a1, 420(sp) 1249; ZVFHMIN32-NEXT: vmv.x.s a2, v8 1250; ZVFHMIN32-NEXT: fmv.h.x fa5, a0 1251; ZVFHMIN32-NEXT: fmv.h.x fa4, a1 1252; ZVFHMIN32-NEXT: feq.h a0, fa5, fa4 1253; ZVFHMIN32-NEXT: sb a0, 146(sp) 1254; ZVFHMIN32-NEXT: lh a0, 674(sp) 1255; ZVFHMIN32-NEXT: lh a1, 418(sp) 1256; ZVFHMIN32-NEXT: fmv.h.x fa5, a2 1257; ZVFHMIN32-NEXT: vmv.x.s a2, v0 1258; ZVFHMIN32-NEXT: fmv.h.x fa4, a0 1259; ZVFHMIN32-NEXT: fmv.h.x fa3, a1 1260; ZVFHMIN32-NEXT: feq.h a0, fa4, fa3 1261; ZVFHMIN32-NEXT: sb a0, 145(sp) 1262; ZVFHMIN32-NEXT: lh a0, 672(sp) 1263; ZVFHMIN32-NEXT: lh a1, 416(sp) 1264; ZVFHMIN32-NEXT: fmv.h.x fa4, a2 1265; ZVFHMIN32-NEXT: feq.h a2, fa5, fa4 1266; ZVFHMIN32-NEXT: fmv.h.x fa5, a0 1267; ZVFHMIN32-NEXT: fmv.h.x fa4, a1 1268; ZVFHMIN32-NEXT: feq.h a0, fa5, fa4 1269; ZVFHMIN32-NEXT: sb a2, 128(sp) 1270; ZVFHMIN32-NEXT: sb a0, 144(sp) 1271; ZVFHMIN32-NEXT: lh a0, 576(sp) 1272; ZVFHMIN32-NEXT: lh a1, 320(sp) 1273; ZVFHMIN32-NEXT: fmv.h.x fa5, a0 1274; ZVFHMIN32-NEXT: fmv.h.x fa4, a1 1275; ZVFHMIN32-NEXT: feq.h a0, fa5, fa4 1276; ZVFHMIN32-NEXT: sb a0, 224(sp) 1277; ZVFHMIN32-NEXT: lh a0, 574(sp) 1278; ZVFHMIN32-NEXT: lh a1, 318(sp) 1279; ZVFHMIN32-NEXT: fmv.h.x fa5, a0 1280; ZVFHMIN32-NEXT: fmv.h.x fa4, a1 1281; ZVFHMIN32-NEXT: feq.h a0, fa5, fa4 1282; ZVFHMIN32-NEXT: sb a0, 223(sp) 1283; ZVFHMIN32-NEXT: lh a0, 572(sp) 1284; ZVFHMIN32-NEXT: lh a1, 316(sp) 1285; ZVFHMIN32-NEXT: fmv.h.x fa5, a0 1286; ZVFHMIN32-NEXT: fmv.h.x fa4, a1 1287; ZVFHMIN32-NEXT: feq.h a0, fa5, fa4 1288; ZVFHMIN32-NEXT: sb a0, 222(sp) 1289; ZVFHMIN32-NEXT: lh a0, 570(sp) 1290; ZVFHMIN32-NEXT: lh a1, 314(sp) 1291; ZVFHMIN32-NEXT: fmv.h.x fa5, a0 1292; ZVFHMIN32-NEXT: fmv.h.x fa4, a1 1293; ZVFHMIN32-NEXT: feq.h a0, fa5, fa4 1294; ZVFHMIN32-NEXT: sb a0, 221(sp) 1295; ZVFHMIN32-NEXT: lh a0, 568(sp) 1296; ZVFHMIN32-NEXT: lh a1, 312(sp) 1297; ZVFHMIN32-NEXT: fmv.h.x fa5, a0 1298; ZVFHMIN32-NEXT: fmv.h.x fa4, a1 1299; ZVFHMIN32-NEXT: feq.h a0, fa5, fa4 1300; ZVFHMIN32-NEXT: sb a0, 220(sp) 1301; ZVFHMIN32-NEXT: lh a0, 566(sp) 1302; ZVFHMIN32-NEXT: lh a1, 310(sp) 1303; ZVFHMIN32-NEXT: fmv.h.x fa5, a0 1304; ZVFHMIN32-NEXT: fmv.h.x fa4, a1 1305; ZVFHMIN32-NEXT: feq.h a0, fa5, fa4 1306; ZVFHMIN32-NEXT: sb a0, 219(sp) 1307; ZVFHMIN32-NEXT: lh a0, 564(sp) 1308; ZVFHMIN32-NEXT: lh a1, 308(sp) 1309; ZVFHMIN32-NEXT: fmv.h.x fa5, a0 1310; ZVFHMIN32-NEXT: fmv.h.x fa4, a1 1311; ZVFHMIN32-NEXT: feq.h a0, fa5, fa4 1312; ZVFHMIN32-NEXT: sb a0, 218(sp) 1313; ZVFHMIN32-NEXT: lh a0, 562(sp) 1314; ZVFHMIN32-NEXT: lh a1, 306(sp) 1315; ZVFHMIN32-NEXT: vsetivli zero, 1, e16, m1, ta, ma 1316; ZVFHMIN32-NEXT: vslidedown.vi v10, v8, 7 1317; ZVFHMIN32-NEXT: csrr a2, vlenb 1318; ZVFHMIN32-NEXT: li a3, 29 1319; ZVFHMIN32-NEXT: mul a2, a2, a3 1320; ZVFHMIN32-NEXT: add a2, sp, a2 1321; ZVFHMIN32-NEXT: addi a2, a2, 848 1322; ZVFHMIN32-NEXT: vs1r.v v10, (a2) # Unknown-size Folded Spill 1323; ZVFHMIN32-NEXT: vslidedown.vi v10, v8, 6 1324; ZVFHMIN32-NEXT: csrr a2, vlenb 1325; ZVFHMIN32-NEXT: li a3, 28 1326; ZVFHMIN32-NEXT: mul a2, a2, a3 1327; ZVFHMIN32-NEXT: add a2, sp, a2 1328; ZVFHMIN32-NEXT: addi a2, a2, 848 1329; ZVFHMIN32-NEXT: vs1r.v v10, (a2) # Unknown-size Folded Spill 1330; ZVFHMIN32-NEXT: vslidedown.vi v10, v8, 5 1331; ZVFHMIN32-NEXT: csrr a2, vlenb 1332; ZVFHMIN32-NEXT: li a3, 27 1333; ZVFHMIN32-NEXT: mul a2, a2, a3 1334; ZVFHMIN32-NEXT: add a2, sp, a2 1335; ZVFHMIN32-NEXT: addi a2, a2, 848 1336; ZVFHMIN32-NEXT: vs1r.v v10, (a2) # Unknown-size Folded Spill 1337; ZVFHMIN32-NEXT: vslidedown.vi v10, v8, 4 1338; ZVFHMIN32-NEXT: csrr a2, vlenb 1339; ZVFHMIN32-NEXT: li a3, 26 1340; ZVFHMIN32-NEXT: mul a2, a2, a3 1341; ZVFHMIN32-NEXT: add a2, sp, a2 1342; ZVFHMIN32-NEXT: addi a2, a2, 848 1343; ZVFHMIN32-NEXT: vs1r.v v10, (a2) # Unknown-size Folded Spill 1344; ZVFHMIN32-NEXT: vslidedown.vi v10, v8, 3 1345; ZVFHMIN32-NEXT: csrr a2, vlenb 1346; ZVFHMIN32-NEXT: li a3, 25 1347; ZVFHMIN32-NEXT: mul a2, a2, a3 1348; ZVFHMIN32-NEXT: add a2, sp, a2 1349; ZVFHMIN32-NEXT: addi a2, a2, 848 1350; ZVFHMIN32-NEXT: vs1r.v v10, (a2) # Unknown-size Folded Spill 1351; ZVFHMIN32-NEXT: vslidedown.vi v10, v8, 2 1352; ZVFHMIN32-NEXT: csrr a2, vlenb 1353; ZVFHMIN32-NEXT: li a3, 24 1354; ZVFHMIN32-NEXT: mul a2, a2, a3 1355; ZVFHMIN32-NEXT: add a2, sp, a2 1356; ZVFHMIN32-NEXT: addi a2, a2, 848 1357; ZVFHMIN32-NEXT: vs1r.v v10, (a2) # Unknown-size Folded Spill 1358; ZVFHMIN32-NEXT: vslidedown.vi v10, v8, 1 1359; ZVFHMIN32-NEXT: csrr a2, vlenb 1360; ZVFHMIN32-NEXT: li a3, 23 1361; ZVFHMIN32-NEXT: mul a2, a2, a3 1362; ZVFHMIN32-NEXT: add a2, sp, a2 1363; ZVFHMIN32-NEXT: addi a2, a2, 848 1364; ZVFHMIN32-NEXT: vs1r.v v10, (a2) # Unknown-size Folded Spill 1365; ZVFHMIN32-NEXT: vsetivli zero, 1, e16, m2, ta, ma 1366; ZVFHMIN32-NEXT: vslidedown.vi v26, v8, 15 1367; ZVFHMIN32-NEXT: vslidedown.vi v20, v8, 14 1368; ZVFHMIN32-NEXT: vslidedown.vi v28, v8, 13 1369; ZVFHMIN32-NEXT: vslidedown.vi v10, v8, 12 1370; ZVFHMIN32-NEXT: csrr a2, vlenb 1371; ZVFHMIN32-NEXT: slli a2, a2, 1 1372; ZVFHMIN32-NEXT: add a2, sp, a2 1373; ZVFHMIN32-NEXT: addi a2, a2, 848 1374; ZVFHMIN32-NEXT: vs2r.v v10, (a2) # Unknown-size Folded Spill 1375; ZVFHMIN32-NEXT: vslidedown.vi v4, v8, 11 1376; ZVFHMIN32-NEXT: vslidedown.vi v2, v8, 10 1377; ZVFHMIN32-NEXT: vslidedown.vi v30, v8, 9 1378; ZVFHMIN32-NEXT: vslidedown.vi v22, v8, 8 1379; ZVFHMIN32-NEXT: vmv.x.s a4, v16 1380; ZVFHMIN32-NEXT: fmv.h.x fa5, a0 1381; ZVFHMIN32-NEXT: fmv.h.x fa4, a1 1382; ZVFHMIN32-NEXT: feq.h a0, fa5, fa4 1383; ZVFHMIN32-NEXT: sb a0, 217(sp) 1384; ZVFHMIN32-NEXT: lh a0, 560(sp) 1385; ZVFHMIN32-NEXT: lh a1, 304(sp) 1386; ZVFHMIN32-NEXT: vsetivli zero, 1, e16, m1, ta, ma 1387; ZVFHMIN32-NEXT: vslidedown.vi v3, v16, 7 1388; ZVFHMIN32-NEXT: vslidedown.vi v31, v16, 6 1389; ZVFHMIN32-NEXT: vslidedown.vi v5, v16, 5 1390; ZVFHMIN32-NEXT: vslidedown.vi v23, v16, 4 1391; ZVFHMIN32-NEXT: vslidedown.vi v8, v16, 3 1392; ZVFHMIN32-NEXT: csrr a2, vlenb 1393; ZVFHMIN32-NEXT: li a3, 21 1394; ZVFHMIN32-NEXT: mul a2, a2, a3 1395; ZVFHMIN32-NEXT: add a2, sp, a2 1396; ZVFHMIN32-NEXT: addi a2, a2, 848 1397; ZVFHMIN32-NEXT: vs1r.v v8, (a2) # Unknown-size Folded Spill 1398; ZVFHMIN32-NEXT: vslidedown.vi v8, v16, 2 1399; ZVFHMIN32-NEXT: csrr a2, vlenb 1400; ZVFHMIN32-NEXT: li a3, 20 1401; ZVFHMIN32-NEXT: mul a2, a2, a3 1402; ZVFHMIN32-NEXT: add a2, sp, a2 1403; ZVFHMIN32-NEXT: addi a2, a2, 848 1404; ZVFHMIN32-NEXT: vs1r.v v8, (a2) # Unknown-size Folded Spill 1405; ZVFHMIN32-NEXT: vslidedown.vi v8, v16, 1 1406; ZVFHMIN32-NEXT: csrr a2, vlenb 1407; ZVFHMIN32-NEXT: li a3, 22 1408; ZVFHMIN32-NEXT: mul a2, a2, a3 1409; ZVFHMIN32-NEXT: add a2, sp, a2 1410; ZVFHMIN32-NEXT: addi a2, a2, 848 1411; ZVFHMIN32-NEXT: vs1r.v v8, (a2) # Unknown-size Folded Spill 1412; ZVFHMIN32-NEXT: vsetivli zero, 1, e16, m2, ta, ma 1413; ZVFHMIN32-NEXT: vslidedown.vi v18, v16, 15 1414; ZVFHMIN32-NEXT: vslidedown.vi v14, v16, 14 1415; ZVFHMIN32-NEXT: vslidedown.vi v8, v16, 13 1416; ZVFHMIN32-NEXT: vslidedown.vi v12, v16, 12 1417; ZVFHMIN32-NEXT: vslidedown.vi v10, v16, 11 1418; ZVFHMIN32-NEXT: vslidedown.vi v6, v16, 10 1419; ZVFHMIN32-NEXT: csrr a2, vlenb 1420; ZVFHMIN32-NEXT: li a3, 18 1421; ZVFHMIN32-NEXT: mul a2, a2, a3 1422; ZVFHMIN32-NEXT: add a2, sp, a2 1423; ZVFHMIN32-NEXT: addi a2, a2, 848 1424; ZVFHMIN32-NEXT: vs2r.v v6, (a2) # Unknown-size Folded Spill 1425; ZVFHMIN32-NEXT: vslidedown.vi v6, v16, 9 1426; ZVFHMIN32-NEXT: csrr a2, vlenb 1427; ZVFHMIN32-NEXT: li a3, 14 1428; ZVFHMIN32-NEXT: mul a2, a2, a3 1429; ZVFHMIN32-NEXT: add a2, sp, a2 1430; ZVFHMIN32-NEXT: addi a2, a2, 848 1431; ZVFHMIN32-NEXT: vs2r.v v6, (a2) # Unknown-size Folded Spill 1432; ZVFHMIN32-NEXT: vslidedown.vi v6, v16, 8 1433; ZVFHMIN32-NEXT: fmv.h.x fa5, a0 1434; ZVFHMIN32-NEXT: fmv.h.x fa4, a1 1435; ZVFHMIN32-NEXT: feq.h a0, fa5, fa4 1436; ZVFHMIN32-NEXT: sb a0, 216(sp) 1437; ZVFHMIN32-NEXT: lh a0, 558(sp) 1438; ZVFHMIN32-NEXT: lh a1, 302(sp) 1439; ZVFHMIN32-NEXT: vsetivli zero, 1, e16, m1, ta, ma 1440; ZVFHMIN32-NEXT: vslidedown.vi v13, v0, 7 1441; ZVFHMIN32-NEXT: vslidedown.vi v29, v0, 6 1442; ZVFHMIN32-NEXT: vslidedown.vi v11, v0, 5 1443; ZVFHMIN32-NEXT: vslidedown.vi v7, v0, 4 1444; ZVFHMIN32-NEXT: vslidedown.vi v9, v0, 3 1445; ZVFHMIN32-NEXT: vslidedown.vi v21, v0, 2 1446; ZVFHMIN32-NEXT: vslidedown.vi v27, v0, 1 1447; ZVFHMIN32-NEXT: vsetivli zero, 1, e16, m2, ta, ma 1448; ZVFHMIN32-NEXT: vslidedown.vi v16, v0, 15 1449; ZVFHMIN32-NEXT: csrr a2, vlenb 1450; ZVFHMIN32-NEXT: slli a2, a2, 2 1451; ZVFHMIN32-NEXT: add a2, sp, a2 1452; ZVFHMIN32-NEXT: addi a2, a2, 848 1453; ZVFHMIN32-NEXT: vs2r.v v16, (a2) # Unknown-size Folded Spill 1454; ZVFHMIN32-NEXT: vslidedown.vi v16, v0, 14 1455; ZVFHMIN32-NEXT: csrr a2, vlenb 1456; ZVFHMIN32-NEXT: slli a2, a2, 3 1457; ZVFHMIN32-NEXT: add a2, sp, a2 1458; ZVFHMIN32-NEXT: addi a2, a2, 848 1459; ZVFHMIN32-NEXT: vs2r.v v16, (a2) # Unknown-size Folded Spill 1460; ZVFHMIN32-NEXT: vslidedown.vi v16, v0, 13 1461; ZVFHMIN32-NEXT: csrr a2, vlenb 1462; ZVFHMIN32-NEXT: li a3, 6 1463; ZVFHMIN32-NEXT: mul a2, a2, a3 1464; ZVFHMIN32-NEXT: add a2, sp, a2 1465; ZVFHMIN32-NEXT: addi a2, a2, 848 1466; ZVFHMIN32-NEXT: vs2r.v v16, (a2) # Unknown-size Folded Spill 1467; ZVFHMIN32-NEXT: vslidedown.vi v16, v0, 12 1468; ZVFHMIN32-NEXT: csrr a2, vlenb 1469; ZVFHMIN32-NEXT: li a3, 12 1470; ZVFHMIN32-NEXT: mul a2, a2, a3 1471; ZVFHMIN32-NEXT: add a2, sp, a2 1472; ZVFHMIN32-NEXT: addi a2, a2, 848 1473; ZVFHMIN32-NEXT: vs2r.v v16, (a2) # Unknown-size Folded Spill 1474; ZVFHMIN32-NEXT: vslidedown.vi v16, v0, 11 1475; ZVFHMIN32-NEXT: csrr a2, vlenb 1476; ZVFHMIN32-NEXT: li a3, 10 1477; ZVFHMIN32-NEXT: mul a2, a2, a3 1478; ZVFHMIN32-NEXT: add a2, sp, a2 1479; ZVFHMIN32-NEXT: addi a2, a2, 848 1480; ZVFHMIN32-NEXT: vs2r.v v16, (a2) # Unknown-size Folded Spill 1481; ZVFHMIN32-NEXT: vslidedown.vi v16, v0, 10 1482; ZVFHMIN32-NEXT: csrr a2, vlenb 1483; ZVFHMIN32-NEXT: slli a2, a2, 4 1484; ZVFHMIN32-NEXT: add a2, sp, a2 1485; ZVFHMIN32-NEXT: addi a2, a2, 848 1486; ZVFHMIN32-NEXT: vs2r.v v16, (a2) # Unknown-size Folded Spill 1487; ZVFHMIN32-NEXT: vslidedown.vi v16, v0, 9 1488; ZVFHMIN32-NEXT: vslidedown.vi v0, v0, 8 1489; ZVFHMIN32-NEXT: addi a2, sp, 848 1490; ZVFHMIN32-NEXT: vs2r.v v0, (a2) # Unknown-size Folded Spill 1491; ZVFHMIN32-NEXT: vmv.x.s t4, v26 1492; ZVFHMIN32-NEXT: fmv.h.x fa5, a0 1493; ZVFHMIN32-NEXT: fmv.h.x fa4, a1 1494; ZVFHMIN32-NEXT: feq.h a0, fa5, fa4 1495; ZVFHMIN32-NEXT: sb a0, 215(sp) 1496; ZVFHMIN32-NEXT: lh a0, 556(sp) 1497; ZVFHMIN32-NEXT: lh a1, 300(sp) 1498; ZVFHMIN32-NEXT: vmv.x.s t3, v20 1499; ZVFHMIN32-NEXT: vmv.x.s t1, v28 1500; ZVFHMIN32-NEXT: fmv.h.x fa5, a0 1501; ZVFHMIN32-NEXT: fmv.h.x fa4, a1 1502; ZVFHMIN32-NEXT: feq.h a0, fa5, fa4 1503; ZVFHMIN32-NEXT: sb a0, 214(sp) 1504; ZVFHMIN32-NEXT: lh a0, 554(sp) 1505; ZVFHMIN32-NEXT: lh a1, 298(sp) 1506; ZVFHMIN32-NEXT: csrr a2, vlenb 1507; ZVFHMIN32-NEXT: slli a2, a2, 1 1508; ZVFHMIN32-NEXT: add a2, sp, a2 1509; ZVFHMIN32-NEXT: addi a2, a2, 848 1510; ZVFHMIN32-NEXT: vl2r.v v0, (a2) # Unknown-size Folded Reload 1511; ZVFHMIN32-NEXT: vmv.x.s t2, v0 1512; ZVFHMIN32-NEXT: vmv.x.s t0, v4 1513; ZVFHMIN32-NEXT: fmv.h.x fa5, a0 1514; ZVFHMIN32-NEXT: fmv.h.x fa4, a1 1515; ZVFHMIN32-NEXT: feq.h a0, fa5, fa4 1516; ZVFHMIN32-NEXT: sb a0, 213(sp) 1517; ZVFHMIN32-NEXT: lh a0, 552(sp) 1518; ZVFHMIN32-NEXT: lh a1, 296(sp) 1519; ZVFHMIN32-NEXT: vmv.x.s a7, v2 1520; ZVFHMIN32-NEXT: vmv.x.s a6, v30 1521; ZVFHMIN32-NEXT: fmv.h.x fa5, a0 1522; ZVFHMIN32-NEXT: fmv.h.x fa4, a1 1523; ZVFHMIN32-NEXT: feq.h a0, fa5, fa4 1524; ZVFHMIN32-NEXT: sb a0, 212(sp) 1525; ZVFHMIN32-NEXT: lh a0, 550(sp) 1526; ZVFHMIN32-NEXT: lh a1, 294(sp) 1527; ZVFHMIN32-NEXT: vmv.x.s a5, v22 1528; ZVFHMIN32-NEXT: vmv.x.s a2, v18 1529; ZVFHMIN32-NEXT: sw a2, 112(sp) # 4-byte Folded Spill 1530; ZVFHMIN32-NEXT: fmv.h.x fa5, a0 1531; ZVFHMIN32-NEXT: fmv.h.x fa4, a1 1532; ZVFHMIN32-NEXT: feq.h a0, fa5, fa4 1533; ZVFHMIN32-NEXT: sb a0, 211(sp) 1534; ZVFHMIN32-NEXT: lh a1, 548(sp) 1535; ZVFHMIN32-NEXT: lh t5, 292(sp) 1536; ZVFHMIN32-NEXT: vmv.x.s a0, v14 1537; ZVFHMIN32-NEXT: sw a0, 116(sp) # 4-byte Folded Spill 1538; ZVFHMIN32-NEXT: vmv.x.s a0, v8 1539; ZVFHMIN32-NEXT: sw a0, 124(sp) # 4-byte Folded Spill 1540; ZVFHMIN32-NEXT: fmv.h.x fa5, a1 1541; ZVFHMIN32-NEXT: fmv.h.x fa4, t5 1542; ZVFHMIN32-NEXT: feq.h a1, fa5, fa4 1543; ZVFHMIN32-NEXT: sb a1, 210(sp) 1544; ZVFHMIN32-NEXT: lh a1, 546(sp) 1545; ZVFHMIN32-NEXT: lh t5, 290(sp) 1546; ZVFHMIN32-NEXT: fmv.h.x fa5, a4 1547; ZVFHMIN32-NEXT: vmv.x.s a4, v24 1548; ZVFHMIN32-NEXT: fmv.h.x fa4, a1 1549; ZVFHMIN32-NEXT: fmv.h.x fa3, t5 1550; ZVFHMIN32-NEXT: feq.h a1, fa4, fa3 1551; ZVFHMIN32-NEXT: sb a1, 209(sp) 1552; ZVFHMIN32-NEXT: lh a1, 544(sp) 1553; ZVFHMIN32-NEXT: lh t5, 288(sp) 1554; ZVFHMIN32-NEXT: fmv.h.x fa4, a4 1555; ZVFHMIN32-NEXT: feq.h a4, fa5, fa4 1556; ZVFHMIN32-NEXT: fmv.h.x fa5, a1 1557; ZVFHMIN32-NEXT: fmv.h.x fa4, t5 1558; ZVFHMIN32-NEXT: feq.h a1, fa5, fa4 1559; ZVFHMIN32-NEXT: sb a4, 192(sp) 1560; ZVFHMIN32-NEXT: sb a1, 208(sp) 1561; ZVFHMIN32-NEXT: lh t5, 738(sp) 1562; ZVFHMIN32-NEXT: lh t6, 482(sp) 1563; ZVFHMIN32-NEXT: vmv.x.s a0, v12 1564; ZVFHMIN32-NEXT: sw a0, 108(sp) # 4-byte Folded Spill 1565; ZVFHMIN32-NEXT: vmv.x.s a0, v10 1566; ZVFHMIN32-NEXT: sw a0, 120(sp) # 4-byte Folded Spill 1567; ZVFHMIN32-NEXT: fmv.h.x fa5, t5 1568; ZVFHMIN32-NEXT: fmv.h.x fa4, t6 1569; ZVFHMIN32-NEXT: feq.h t5, fa5, fa4 1570; ZVFHMIN32-NEXT: sb t5, 177(sp) 1571; ZVFHMIN32-NEXT: lh t5, 736(sp) 1572; ZVFHMIN32-NEXT: lh t6, 480(sp) 1573; ZVFHMIN32-NEXT: csrr a0, vlenb 1574; ZVFHMIN32-NEXT: li a1, 29 1575; ZVFHMIN32-NEXT: mul a0, a0, a1 1576; ZVFHMIN32-NEXT: add a0, sp, a0 1577; ZVFHMIN32-NEXT: lh s5, 848(a0) # 8-byte Folded Reload 1578; ZVFHMIN32-NEXT: csrr a0, vlenb 1579; ZVFHMIN32-NEXT: li a1, 28 1580; ZVFHMIN32-NEXT: mul a0, a0, a1 1581; ZVFHMIN32-NEXT: add a0, sp, a0 1582; ZVFHMIN32-NEXT: lh s6, 848(a0) # 8-byte Folded Reload 1583; ZVFHMIN32-NEXT: fmv.h.x fa5, t5 1584; ZVFHMIN32-NEXT: fmv.h.x fa4, t6 1585; ZVFHMIN32-NEXT: feq.h t5, fa5, fa4 1586; ZVFHMIN32-NEXT: sb t5, 176(sp) 1587; ZVFHMIN32-NEXT: lh t5, 734(sp) 1588; ZVFHMIN32-NEXT: lh t6, 478(sp) 1589; ZVFHMIN32-NEXT: csrr a0, vlenb 1590; ZVFHMIN32-NEXT: li a1, 27 1591; ZVFHMIN32-NEXT: mul a0, a0, a1 1592; ZVFHMIN32-NEXT: add a0, sp, a0 1593; ZVFHMIN32-NEXT: lh s7, 848(a0) # 8-byte Folded Reload 1594; ZVFHMIN32-NEXT: csrr a0, vlenb 1595; ZVFHMIN32-NEXT: li a1, 26 1596; ZVFHMIN32-NEXT: mul a0, a0, a1 1597; ZVFHMIN32-NEXT: add a0, sp, a0 1598; ZVFHMIN32-NEXT: lh s8, 848(a0) # 8-byte Folded Reload 1599; ZVFHMIN32-NEXT: fmv.h.x fa5, t5 1600; ZVFHMIN32-NEXT: fmv.h.x fa4, t6 1601; ZVFHMIN32-NEXT: feq.h t5, fa5, fa4 1602; ZVFHMIN32-NEXT: sb t5, 175(sp) 1603; ZVFHMIN32-NEXT: lh t5, 732(sp) 1604; ZVFHMIN32-NEXT: lh t6, 476(sp) 1605; ZVFHMIN32-NEXT: csrr a0, vlenb 1606; ZVFHMIN32-NEXT: li a1, 25 1607; ZVFHMIN32-NEXT: mul a0, a0, a1 1608; ZVFHMIN32-NEXT: add a0, sp, a0 1609; ZVFHMIN32-NEXT: lh s4, 848(a0) # 8-byte Folded Reload 1610; ZVFHMIN32-NEXT: csrr a0, vlenb 1611; ZVFHMIN32-NEXT: li a1, 24 1612; ZVFHMIN32-NEXT: mul a0, a0, a1 1613; ZVFHMIN32-NEXT: add a0, sp, a0 1614; ZVFHMIN32-NEXT: lh s3, 848(a0) # 8-byte Folded Reload 1615; ZVFHMIN32-NEXT: fmv.h.x fa5, t5 1616; ZVFHMIN32-NEXT: fmv.h.x fa4, t6 1617; ZVFHMIN32-NEXT: feq.h t5, fa5, fa4 1618; ZVFHMIN32-NEXT: sb t5, 174(sp) 1619; ZVFHMIN32-NEXT: lh t6, 730(sp) 1620; ZVFHMIN32-NEXT: lh s9, 474(sp) 1621; ZVFHMIN32-NEXT: csrr a0, vlenb 1622; ZVFHMIN32-NEXT: li a1, 23 1623; ZVFHMIN32-NEXT: mul a0, a0, a1 1624; ZVFHMIN32-NEXT: add a0, sp, a0 1625; ZVFHMIN32-NEXT: lh s2, 848(a0) # 8-byte Folded Reload 1626; ZVFHMIN32-NEXT: vmv.x.s t5, v3 1627; ZVFHMIN32-NEXT: fmv.h.x fa5, t6 1628; ZVFHMIN32-NEXT: fmv.h.x fa4, s9 1629; ZVFHMIN32-NEXT: feq.h t6, fa5, fa4 1630; ZVFHMIN32-NEXT: sb t6, 173(sp) 1631; ZVFHMIN32-NEXT: lh s9, 728(sp) 1632; ZVFHMIN32-NEXT: lh s10, 472(sp) 1633; ZVFHMIN32-NEXT: vmv.x.s t6, v31 1634; ZVFHMIN32-NEXT: vmv.x.s ra, v13 1635; ZVFHMIN32-NEXT: fmv.h.x fa5, s9 1636; ZVFHMIN32-NEXT: fmv.h.x fa4, s10 1637; ZVFHMIN32-NEXT: feq.h s9, fa5, fa4 1638; ZVFHMIN32-NEXT: sb s9, 172(sp) 1639; ZVFHMIN32-NEXT: lh s9, 726(sp) 1640; ZVFHMIN32-NEXT: lh s10, 470(sp) 1641; ZVFHMIN32-NEXT: vmv.x.s a2, v29 1642; ZVFHMIN32-NEXT: vmv.x.s a3, v11 1643; ZVFHMIN32-NEXT: fmv.h.x fa5, s9 1644; ZVFHMIN32-NEXT: fmv.h.x fa4, s10 1645; ZVFHMIN32-NEXT: feq.h s9, fa5, fa4 1646; ZVFHMIN32-NEXT: sb s9, 171(sp) 1647; ZVFHMIN32-NEXT: lh s10, 724(sp) 1648; ZVFHMIN32-NEXT: lh s11, 468(sp) 1649; ZVFHMIN32-NEXT: vmv.x.s a4, v7 1650; ZVFHMIN32-NEXT: vmv.x.s s9, v9 1651; ZVFHMIN32-NEXT: fmv.h.x fa5, s10 1652; ZVFHMIN32-NEXT: fmv.h.x fa4, s11 1653; ZVFHMIN32-NEXT: feq.h s10, fa5, fa4 1654; ZVFHMIN32-NEXT: sb s10, 170(sp) 1655; ZVFHMIN32-NEXT: lh a0, 722(sp) 1656; ZVFHMIN32-NEXT: lh a1, 466(sp) 1657; ZVFHMIN32-NEXT: vmv.x.s s10, v21 1658; ZVFHMIN32-NEXT: vmv.x.s s11, v27 1659; ZVFHMIN32-NEXT: fmv.h.x fa5, a0 1660; ZVFHMIN32-NEXT: fmv.h.x fa4, a1 1661; ZVFHMIN32-NEXT: feq.h a0, fa5, fa4 1662; ZVFHMIN32-NEXT: sb a0, 169(sp) 1663; ZVFHMIN32-NEXT: lh a0, 720(sp) 1664; ZVFHMIN32-NEXT: lh a1, 464(sp) 1665; ZVFHMIN32-NEXT: fmv.h.x fa5, s5 1666; ZVFHMIN32-NEXT: fmv.h.x fa4, s6 1667; ZVFHMIN32-NEXT: fmv.h.x fa3, a0 1668; ZVFHMIN32-NEXT: fmv.h.x fa2, a1 1669; ZVFHMIN32-NEXT: feq.h a0, fa3, fa2 1670; ZVFHMIN32-NEXT: sb a0, 168(sp) 1671; ZVFHMIN32-NEXT: lh a0, 718(sp) 1672; ZVFHMIN32-NEXT: lh a1, 462(sp) 1673; ZVFHMIN32-NEXT: fmv.h.x fa3, s7 1674; ZVFHMIN32-NEXT: fmv.h.x fa2, s8 1675; ZVFHMIN32-NEXT: fmv.h.x fa1, a0 1676; ZVFHMIN32-NEXT: fmv.h.x fa0, a1 1677; ZVFHMIN32-NEXT: feq.h a0, fa1, fa0 1678; ZVFHMIN32-NEXT: fmv.h.x fa1, ra 1679; ZVFHMIN32-NEXT: sb a0, 167(sp) 1680; ZVFHMIN32-NEXT: lh a0, 716(sp) 1681; ZVFHMIN32-NEXT: fmv.h.x fa0, a2 1682; ZVFHMIN32-NEXT: lh a1, 460(sp) 1683; ZVFHMIN32-NEXT: feq.h s5, fa5, fa1 1684; ZVFHMIN32-NEXT: fmv.h.x fa5, a0 1685; ZVFHMIN32-NEXT: feq.h a0, fa4, fa0 1686; ZVFHMIN32-NEXT: fmv.h.x fa4, a1 1687; ZVFHMIN32-NEXT: feq.h a1, fa5, fa4 1688; ZVFHMIN32-NEXT: fmv.h.x fa5, s4 1689; ZVFHMIN32-NEXT: sb a1, 166(sp) 1690; ZVFHMIN32-NEXT: lh a1, 714(sp) 1691; ZVFHMIN32-NEXT: lh a2, 458(sp) 1692; ZVFHMIN32-NEXT: fmv.h.x fa4, a3 1693; ZVFHMIN32-NEXT: feq.h a3, fa3, fa4 1694; ZVFHMIN32-NEXT: fmv.h.x fa4, a1 1695; ZVFHMIN32-NEXT: fmv.h.x fa3, a2 1696; ZVFHMIN32-NEXT: feq.h a1, fa4, fa3 1697; ZVFHMIN32-NEXT: fmv.h.x fa4, s3 1698; ZVFHMIN32-NEXT: sb a1, 165(sp) 1699; ZVFHMIN32-NEXT: lh a1, 712(sp) 1700; ZVFHMIN32-NEXT: lh a2, 456(sp) 1701; ZVFHMIN32-NEXT: fmv.h.x fa3, a4 1702; ZVFHMIN32-NEXT: feq.h a4, fa2, fa3 1703; ZVFHMIN32-NEXT: fmv.h.x fa3, a1 1704; ZVFHMIN32-NEXT: fmv.h.x fa2, a2 1705; ZVFHMIN32-NEXT: feq.h a1, fa3, fa2 1706; ZVFHMIN32-NEXT: fmv.h.x fa3, s2 1707; ZVFHMIN32-NEXT: sb a1, 164(sp) 1708; ZVFHMIN32-NEXT: lh a1, 710(sp) 1709; ZVFHMIN32-NEXT: lh a2, 454(sp) 1710; ZVFHMIN32-NEXT: fmv.h.x fa2, s9 1711; ZVFHMIN32-NEXT: feq.h s2, fa5, fa2 1712; ZVFHMIN32-NEXT: fmv.h.x fa5, a1 1713; ZVFHMIN32-NEXT: fmv.h.x fa2, a2 1714; ZVFHMIN32-NEXT: feq.h a1, fa5, fa2 1715; ZVFHMIN32-NEXT: fmv.h.x fa5, s10 1716; ZVFHMIN32-NEXT: fmv.h.x fa2, s11 1717; ZVFHMIN32-NEXT: sb a1, 163(sp) 1718; ZVFHMIN32-NEXT: lh a1, 708(sp) 1719; ZVFHMIN32-NEXT: lh a2, 452(sp) 1720; ZVFHMIN32-NEXT: feq.h s3, fa4, fa5 1721; ZVFHMIN32-NEXT: feq.h s4, fa3, fa2 1722; ZVFHMIN32-NEXT: fmv.h.x fa5, a1 1723; ZVFHMIN32-NEXT: fmv.h.x fa4, a2 1724; ZVFHMIN32-NEXT: feq.h a1, fa5, fa4 1725; ZVFHMIN32-NEXT: sb a1, 162(sp) 1726; ZVFHMIN32-NEXT: lh a1, 706(sp) 1727; ZVFHMIN32-NEXT: lh a2, 450(sp) 1728; ZVFHMIN32-NEXT: sb s4, 129(sp) 1729; ZVFHMIN32-NEXT: sb s3, 130(sp) 1730; ZVFHMIN32-NEXT: sb s2, 131(sp) 1731; ZVFHMIN32-NEXT: sb a4, 132(sp) 1732; ZVFHMIN32-NEXT: fmv.h.x fa5, a1 1733; ZVFHMIN32-NEXT: fmv.h.x fa4, a2 1734; ZVFHMIN32-NEXT: feq.h a1, fa5, fa4 1735; ZVFHMIN32-NEXT: sb a3, 133(sp) 1736; ZVFHMIN32-NEXT: sb a0, 134(sp) 1737; ZVFHMIN32-NEXT: sb s5, 135(sp) 1738; ZVFHMIN32-NEXT: sb a1, 161(sp) 1739; ZVFHMIN32-NEXT: lh a0, 610(sp) 1740; ZVFHMIN32-NEXT: lh a1, 354(sp) 1741; ZVFHMIN32-NEXT: vmv.x.s s6, v5 1742; ZVFHMIN32-NEXT: vmv.x.s s5, v23 1743; ZVFHMIN32-NEXT: fmv.h.x fa5, a0 1744; ZVFHMIN32-NEXT: fmv.h.x fa4, a1 1745; ZVFHMIN32-NEXT: feq.h a0, fa5, fa4 1746; ZVFHMIN32-NEXT: sb a0, 241(sp) 1747; ZVFHMIN32-NEXT: lh a0, 608(sp) 1748; ZVFHMIN32-NEXT: lh a1, 352(sp) 1749; ZVFHMIN32-NEXT: csrr a2, vlenb 1750; ZVFHMIN32-NEXT: li a3, 21 1751; ZVFHMIN32-NEXT: mul a2, a2, a3 1752; ZVFHMIN32-NEXT: add a2, sp, a2 1753; ZVFHMIN32-NEXT: lh s4, 848(a2) # 8-byte Folded Reload 1754; ZVFHMIN32-NEXT: csrr a2, vlenb 1755; ZVFHMIN32-NEXT: li a3, 20 1756; ZVFHMIN32-NEXT: mul a2, a2, a3 1757; ZVFHMIN32-NEXT: add a2, sp, a2 1758; ZVFHMIN32-NEXT: lh s3, 848(a2) # 8-byte Folded Reload 1759; ZVFHMIN32-NEXT: fmv.h.x fa5, a0 1760; ZVFHMIN32-NEXT: fmv.h.x fa4, a1 1761; ZVFHMIN32-NEXT: feq.h a0, fa5, fa4 1762; ZVFHMIN32-NEXT: sb a0, 240(sp) 1763; ZVFHMIN32-NEXT: lh a0, 606(sp) 1764; ZVFHMIN32-NEXT: lh a1, 350(sp) 1765; ZVFHMIN32-NEXT: csrr a2, vlenb 1766; ZVFHMIN32-NEXT: li a3, 22 1767; ZVFHMIN32-NEXT: mul a2, a2, a3 1768; ZVFHMIN32-NEXT: add a2, sp, a2 1769; ZVFHMIN32-NEXT: lh s2, 848(a2) # 8-byte Folded Reload 1770; ZVFHMIN32-NEXT: fmv.h.x fa5, t5 1771; ZVFHMIN32-NEXT: fmv.h.x fa4, a0 1772; ZVFHMIN32-NEXT: fmv.h.x fa3, a1 1773; ZVFHMIN32-NEXT: feq.h a0, fa4, fa3 1774; ZVFHMIN32-NEXT: sb a0, 239(sp) 1775; ZVFHMIN32-NEXT: lh a0, 604(sp) 1776; ZVFHMIN32-NEXT: lh a1, 348(sp) 1777; ZVFHMIN32-NEXT: fmv.h.x fa4, t6 1778; ZVFHMIN32-NEXT: vsetivli zero, 1, e16, m1, ta, ma 1779; ZVFHMIN32-NEXT: vslidedown.vi v8, v24, 7 1780; ZVFHMIN32-NEXT: fmv.h.x fa3, a0 1781; ZVFHMIN32-NEXT: fmv.h.x fa2, a1 1782; ZVFHMIN32-NEXT: feq.h a0, fa3, fa2 1783; ZVFHMIN32-NEXT: sb a0, 238(sp) 1784; ZVFHMIN32-NEXT: lh a0, 602(sp) 1785; ZVFHMIN32-NEXT: lh a1, 346(sp) 1786; ZVFHMIN32-NEXT: vmv.x.s a2, v8 1787; ZVFHMIN32-NEXT: vslidedown.vi v8, v24, 6 1788; ZVFHMIN32-NEXT: fmv.h.x fa3, a0 1789; ZVFHMIN32-NEXT: fmv.h.x fa2, a1 1790; ZVFHMIN32-NEXT: feq.h a0, fa3, fa2 1791; ZVFHMIN32-NEXT: sb a0, 237(sp) 1792; ZVFHMIN32-NEXT: lh a0, 600(sp) 1793; ZVFHMIN32-NEXT: lh a1, 344(sp) 1794; ZVFHMIN32-NEXT: vmv.x.s a3, v8 1795; ZVFHMIN32-NEXT: vslidedown.vi v8, v24, 5 1796; ZVFHMIN32-NEXT: fmv.h.x fa3, a0 1797; ZVFHMIN32-NEXT: fmv.h.x fa2, a1 1798; ZVFHMIN32-NEXT: feq.h a0, fa3, fa2 1799; ZVFHMIN32-NEXT: sb a0, 236(sp) 1800; ZVFHMIN32-NEXT: lh a0, 598(sp) 1801; ZVFHMIN32-NEXT: lh a1, 342(sp) 1802; ZVFHMIN32-NEXT: vmv.x.s a4, v8 1803; ZVFHMIN32-NEXT: vslidedown.vi v8, v24, 4 1804; ZVFHMIN32-NEXT: fmv.h.x fa3, a0 1805; ZVFHMIN32-NEXT: fmv.h.x fa2, a1 1806; ZVFHMIN32-NEXT: feq.h a0, fa3, fa2 1807; ZVFHMIN32-NEXT: sb a0, 235(sp) 1808; ZVFHMIN32-NEXT: lh a0, 596(sp) 1809; ZVFHMIN32-NEXT: lh a1, 340(sp) 1810; ZVFHMIN32-NEXT: vmv.x.s s8, v8 1811; ZVFHMIN32-NEXT: vslidedown.vi v8, v24, 3 1812; ZVFHMIN32-NEXT: fmv.h.x fa3, a0 1813; ZVFHMIN32-NEXT: fmv.h.x fa2, a1 1814; ZVFHMIN32-NEXT: feq.h a0, fa3, fa2 1815; ZVFHMIN32-NEXT: sb a0, 234(sp) 1816; ZVFHMIN32-NEXT: lh a0, 594(sp) 1817; ZVFHMIN32-NEXT: lh a1, 338(sp) 1818; ZVFHMIN32-NEXT: vmv.x.s s9, v8 1819; ZVFHMIN32-NEXT: vslidedown.vi v8, v24, 2 1820; ZVFHMIN32-NEXT: fmv.h.x fa3, a0 1821; ZVFHMIN32-NEXT: fmv.h.x fa2, a1 1822; ZVFHMIN32-NEXT: feq.h a0, fa3, fa2 1823; ZVFHMIN32-NEXT: sb a0, 233(sp) 1824; ZVFHMIN32-NEXT: lh a0, 592(sp) 1825; ZVFHMIN32-NEXT: vmv.x.s a1, v8 1826; ZVFHMIN32-NEXT: lh t5, 336(sp) 1827; ZVFHMIN32-NEXT: vslidedown.vi v8, v24, 1 1828; ZVFHMIN32-NEXT: fmv.h.x fa3, a0 1829; ZVFHMIN32-NEXT: vmv.x.s s7, v8 1830; ZVFHMIN32-NEXT: fmv.h.x fa2, t5 1831; ZVFHMIN32-NEXT: feq.h a0, fa3, fa2 1832; ZVFHMIN32-NEXT: fmv.h.x fa3, a2 1833; ZVFHMIN32-NEXT: sb a0, 232(sp) 1834; ZVFHMIN32-NEXT: lh a0, 590(sp) 1835; ZVFHMIN32-NEXT: fmv.h.x fa2, a3 1836; ZVFHMIN32-NEXT: lh a2, 334(sp) 1837; ZVFHMIN32-NEXT: feq.h t5, fa5, fa3 1838; ZVFHMIN32-NEXT: fmv.h.x fa5, a0 1839; ZVFHMIN32-NEXT: feq.h t6, fa4, fa2 1840; ZVFHMIN32-NEXT: fmv.h.x fa4, a2 1841; ZVFHMIN32-NEXT: feq.h a0, fa5, fa4 1842; ZVFHMIN32-NEXT: fmv.h.x fa5, s6 1843; ZVFHMIN32-NEXT: sb a0, 231(sp) 1844; ZVFHMIN32-NEXT: lh a0, 588(sp) 1845; ZVFHMIN32-NEXT: lh a2, 332(sp) 1846; ZVFHMIN32-NEXT: fmv.h.x fa4, a4 1847; ZVFHMIN32-NEXT: feq.h a3, fa5, fa4 1848; ZVFHMIN32-NEXT: fmv.h.x fa5, a0 1849; ZVFHMIN32-NEXT: fmv.h.x fa4, a2 1850; ZVFHMIN32-NEXT: feq.h a0, fa5, fa4 1851; ZVFHMIN32-NEXT: fmv.h.x fa5, s5 1852; ZVFHMIN32-NEXT: sb a0, 230(sp) 1853; ZVFHMIN32-NEXT: lh a0, 586(sp) 1854; ZVFHMIN32-NEXT: lh a2, 330(sp) 1855; ZVFHMIN32-NEXT: fmv.h.x fa4, s8 1856; ZVFHMIN32-NEXT: feq.h a4, fa5, fa4 1857; ZVFHMIN32-NEXT: fmv.h.x fa5, a0 1858; ZVFHMIN32-NEXT: fmv.h.x fa4, a2 1859; ZVFHMIN32-NEXT: feq.h a0, fa5, fa4 1860; ZVFHMIN32-NEXT: fmv.h.x fa5, s4 1861; ZVFHMIN32-NEXT: sb a0, 229(sp) 1862; ZVFHMIN32-NEXT: lh a0, 584(sp) 1863; ZVFHMIN32-NEXT: lh a2, 328(sp) 1864; ZVFHMIN32-NEXT: fmv.h.x fa4, s9 1865; ZVFHMIN32-NEXT: feq.h s4, fa5, fa4 1866; ZVFHMIN32-NEXT: fmv.h.x fa5, a0 1867; ZVFHMIN32-NEXT: fmv.h.x fa4, a2 1868; ZVFHMIN32-NEXT: feq.h a0, fa5, fa4 1869; ZVFHMIN32-NEXT: fmv.h.x fa5, s3 1870; ZVFHMIN32-NEXT: sb a0, 228(sp) 1871; ZVFHMIN32-NEXT: lh a0, 582(sp) 1872; ZVFHMIN32-NEXT: lh a2, 326(sp) 1873; ZVFHMIN32-NEXT: fmv.h.x fa4, a1 1874; ZVFHMIN32-NEXT: feq.h a1, fa5, fa4 1875; ZVFHMIN32-NEXT: fmv.h.x fa5, a0 1876; ZVFHMIN32-NEXT: fmv.h.x fa4, a2 1877; ZVFHMIN32-NEXT: feq.h a0, fa5, fa4 1878; ZVFHMIN32-NEXT: fmv.h.x fa5, s2 1879; ZVFHMIN32-NEXT: sb a0, 227(sp) 1880; ZVFHMIN32-NEXT: lh a0, 580(sp) 1881; ZVFHMIN32-NEXT: lh a2, 324(sp) 1882; ZVFHMIN32-NEXT: fmv.h.x fa4, s7 1883; ZVFHMIN32-NEXT: feq.h s2, fa5, fa4 1884; ZVFHMIN32-NEXT: fmv.h.x fa5, a0 1885; ZVFHMIN32-NEXT: fmv.h.x fa4, a2 1886; ZVFHMIN32-NEXT: feq.h a0, fa5, fa4 1887; ZVFHMIN32-NEXT: sb a0, 226(sp) 1888; ZVFHMIN32-NEXT: lh a0, 578(sp) 1889; ZVFHMIN32-NEXT: lh a2, 322(sp) 1890; ZVFHMIN32-NEXT: sb s2, 193(sp) 1891; ZVFHMIN32-NEXT: sb a1, 194(sp) 1892; ZVFHMIN32-NEXT: sb s4, 195(sp) 1893; ZVFHMIN32-NEXT: sb a4, 196(sp) 1894; ZVFHMIN32-NEXT: fmv.h.x fa5, a0 1895; ZVFHMIN32-NEXT: fmv.h.x fa4, a2 1896; ZVFHMIN32-NEXT: feq.h a0, fa5, fa4 1897; ZVFHMIN32-NEXT: sb a3, 197(sp) 1898; ZVFHMIN32-NEXT: sb t6, 198(sp) 1899; ZVFHMIN32-NEXT: sb t5, 199(sp) 1900; ZVFHMIN32-NEXT: sb a0, 225(sp) 1901; ZVFHMIN32-NEXT: lh a0, 766(sp) 1902; ZVFHMIN32-NEXT: lh a1, 510(sp) 1903; ZVFHMIN32-NEXT: csrr a2, vlenb 1904; ZVFHMIN32-NEXT: li a3, 18 1905; ZVFHMIN32-NEXT: mul a2, a2, a3 1906; ZVFHMIN32-NEXT: add a2, sp, a2 1907; ZVFHMIN32-NEXT: addi a2, a2, 848 1908; ZVFHMIN32-NEXT: vl2r.v v8, (a2) # Unknown-size Folded Reload 1909; ZVFHMIN32-NEXT: vmv.x.s s2, v8 1910; ZVFHMIN32-NEXT: csrr a2, vlenb 1911; ZVFHMIN32-NEXT: li a3, 14 1912; ZVFHMIN32-NEXT: mul a2, a2, a3 1913; ZVFHMIN32-NEXT: add a2, sp, a2 1914; ZVFHMIN32-NEXT: addi a2, a2, 848 1915; ZVFHMIN32-NEXT: vl2r.v v8, (a2) # Unknown-size Folded Reload 1916; ZVFHMIN32-NEXT: vmv.x.s t6, v8 1917; ZVFHMIN32-NEXT: fmv.h.x fa5, a0 1918; ZVFHMIN32-NEXT: fmv.h.x fa4, a1 1919; ZVFHMIN32-NEXT: feq.h a0, fa5, fa4 1920; ZVFHMIN32-NEXT: sb a0, 191(sp) 1921; ZVFHMIN32-NEXT: lh a0, 764(sp) 1922; ZVFHMIN32-NEXT: lh a1, 508(sp) 1923; ZVFHMIN32-NEXT: vmv.x.s t5, v6 1924; ZVFHMIN32-NEXT: csrr a2, vlenb 1925; ZVFHMIN32-NEXT: slli a2, a2, 2 1926; ZVFHMIN32-NEXT: add a2, sp, a2 1927; ZVFHMIN32-NEXT: addi a2, a2, 848 1928; ZVFHMIN32-NEXT: vl2r.v v8, (a2) # Unknown-size Folded Reload 1929; ZVFHMIN32-NEXT: vmv.x.s a2, v8 1930; ZVFHMIN32-NEXT: fmv.h.x fa5, a0 1931; ZVFHMIN32-NEXT: fmv.h.x fa4, a1 1932; ZVFHMIN32-NEXT: feq.h a0, fa5, fa4 1933; ZVFHMIN32-NEXT: sb a0, 190(sp) 1934; ZVFHMIN32-NEXT: lh a0, 762(sp) 1935; ZVFHMIN32-NEXT: lh a1, 506(sp) 1936; ZVFHMIN32-NEXT: csrr a3, vlenb 1937; ZVFHMIN32-NEXT: slli a3, a3, 3 1938; ZVFHMIN32-NEXT: add a3, sp, a3 1939; ZVFHMIN32-NEXT: addi a3, a3, 848 1940; ZVFHMIN32-NEXT: vl2r.v v8, (a3) # Unknown-size Folded Reload 1941; ZVFHMIN32-NEXT: vmv.x.s a3, v8 1942; ZVFHMIN32-NEXT: csrr a4, vlenb 1943; ZVFHMIN32-NEXT: li s3, 6 1944; ZVFHMIN32-NEXT: mul a4, a4, s3 1945; ZVFHMIN32-NEXT: add a4, sp, a4 1946; ZVFHMIN32-NEXT: addi a4, a4, 848 1947; ZVFHMIN32-NEXT: vl2r.v v8, (a4) # Unknown-size Folded Reload 1948; ZVFHMIN32-NEXT: vmv.x.s a4, v8 1949; ZVFHMIN32-NEXT: fmv.h.x fa5, a0 1950; ZVFHMIN32-NEXT: fmv.h.x fa4, a1 1951; ZVFHMIN32-NEXT: feq.h a0, fa5, fa4 1952; ZVFHMIN32-NEXT: sb a0, 189(sp) 1953; ZVFHMIN32-NEXT: lh a0, 760(sp) 1954; ZVFHMIN32-NEXT: lh a1, 504(sp) 1955; ZVFHMIN32-NEXT: csrr s3, vlenb 1956; ZVFHMIN32-NEXT: li s4, 12 1957; ZVFHMIN32-NEXT: mul s3, s3, s4 1958; ZVFHMIN32-NEXT: add s3, sp, s3 1959; ZVFHMIN32-NEXT: addi s3, s3, 848 1960; ZVFHMIN32-NEXT: vl2r.v v8, (s3) # Unknown-size Folded Reload 1961; ZVFHMIN32-NEXT: vmv.x.s s6, v8 1962; ZVFHMIN32-NEXT: csrr s3, vlenb 1963; ZVFHMIN32-NEXT: li s4, 10 1964; ZVFHMIN32-NEXT: mul s3, s3, s4 1965; ZVFHMIN32-NEXT: add s3, sp, s3 1966; ZVFHMIN32-NEXT: addi s3, s3, 848 1967; ZVFHMIN32-NEXT: vl2r.v v8, (s3) # Unknown-size Folded Reload 1968; ZVFHMIN32-NEXT: vmv.x.s s4, v8 1969; ZVFHMIN32-NEXT: fmv.h.x fa5, a0 1970; ZVFHMIN32-NEXT: fmv.h.x fa4, a1 1971; ZVFHMIN32-NEXT: feq.h a0, fa5, fa4 1972; ZVFHMIN32-NEXT: sb a0, 188(sp) 1973; ZVFHMIN32-NEXT: lh a0, 758(sp) 1974; ZVFHMIN32-NEXT: lh a1, 502(sp) 1975; ZVFHMIN32-NEXT: csrr s3, vlenb 1976; ZVFHMIN32-NEXT: slli s3, s3, 4 1977; ZVFHMIN32-NEXT: add s3, sp, s3 1978; ZVFHMIN32-NEXT: addi s3, s3, 848 1979; ZVFHMIN32-NEXT: vl2r.v v8, (s3) # Unknown-size Folded Reload 1980; ZVFHMIN32-NEXT: vmv.x.s s5, v8 1981; ZVFHMIN32-NEXT: vmv.x.s s3, v16 1982; ZVFHMIN32-NEXT: fmv.h.x fa5, a0 1983; ZVFHMIN32-NEXT: fmv.h.x fa4, a1 1984; ZVFHMIN32-NEXT: feq.h a0, fa5, fa4 1985; ZVFHMIN32-NEXT: fmv.h.x fa5, t4 1986; ZVFHMIN32-NEXT: sb a0, 187(sp) 1987; ZVFHMIN32-NEXT: lh a0, 756(sp) 1988; ZVFHMIN32-NEXT: lh a1, 500(sp) 1989; ZVFHMIN32-NEXT: fmv.h.x fa4, a2 1990; ZVFHMIN32-NEXT: feq.h t4, fa5, fa4 1991; ZVFHMIN32-NEXT: fmv.h.x fa5, a0 1992; ZVFHMIN32-NEXT: fmv.h.x fa4, a1 1993; ZVFHMIN32-NEXT: feq.h a0, fa5, fa4 1994; ZVFHMIN32-NEXT: fmv.h.x fa5, t3 1995; ZVFHMIN32-NEXT: sb a0, 186(sp) 1996; ZVFHMIN32-NEXT: lh a0, 754(sp) 1997; ZVFHMIN32-NEXT: lh a1, 498(sp) 1998; ZVFHMIN32-NEXT: fmv.h.x fa4, a3 1999; ZVFHMIN32-NEXT: feq.h t3, fa5, fa4 2000; ZVFHMIN32-NEXT: fmv.h.x fa5, a0 2001; ZVFHMIN32-NEXT: fmv.h.x fa4, a1 2002; ZVFHMIN32-NEXT: feq.h a0, fa5, fa4 2003; ZVFHMIN32-NEXT: fmv.h.x fa5, t1 2004; ZVFHMIN32-NEXT: sb a0, 185(sp) 2005; ZVFHMIN32-NEXT: lh a0, 752(sp) 2006; ZVFHMIN32-NEXT: lh a1, 496(sp) 2007; ZVFHMIN32-NEXT: fmv.h.x fa4, a4 2008; ZVFHMIN32-NEXT: feq.h t1, fa5, fa4 2009; ZVFHMIN32-NEXT: fmv.h.x fa5, a0 2010; ZVFHMIN32-NEXT: fmv.h.x fa4, a1 2011; ZVFHMIN32-NEXT: feq.h a0, fa5, fa4 2012; ZVFHMIN32-NEXT: fmv.h.x fa5, t2 2013; ZVFHMIN32-NEXT: sb a0, 184(sp) 2014; ZVFHMIN32-NEXT: lh a0, 750(sp) 2015; ZVFHMIN32-NEXT: lh a1, 494(sp) 2016; ZVFHMIN32-NEXT: fmv.h.x fa4, s6 2017; ZVFHMIN32-NEXT: feq.h a2, fa5, fa4 2018; ZVFHMIN32-NEXT: fmv.h.x fa5, a0 2019; ZVFHMIN32-NEXT: fmv.h.x fa4, a1 2020; ZVFHMIN32-NEXT: feq.h a0, fa5, fa4 2021; ZVFHMIN32-NEXT: fmv.h.x fa5, t0 2022; ZVFHMIN32-NEXT: sb a0, 183(sp) 2023; ZVFHMIN32-NEXT: lh a0, 748(sp) 2024; ZVFHMIN32-NEXT: lh a1, 492(sp) 2025; ZVFHMIN32-NEXT: fmv.h.x fa4, s4 2026; ZVFHMIN32-NEXT: feq.h a3, fa5, fa4 2027; ZVFHMIN32-NEXT: fmv.h.x fa5, a0 2028; ZVFHMIN32-NEXT: fmv.h.x fa4, a1 2029; ZVFHMIN32-NEXT: feq.h a0, fa5, fa4 2030; ZVFHMIN32-NEXT: fmv.h.x fa5, a7 2031; ZVFHMIN32-NEXT: sb a0, 182(sp) 2032; ZVFHMIN32-NEXT: lh a0, 746(sp) 2033; ZVFHMIN32-NEXT: lh a1, 490(sp) 2034; ZVFHMIN32-NEXT: fmv.h.x fa4, s5 2035; ZVFHMIN32-NEXT: feq.h a4, fa5, fa4 2036; ZVFHMIN32-NEXT: fmv.h.x fa5, a0 2037; ZVFHMIN32-NEXT: fmv.h.x fa4, a1 2038; ZVFHMIN32-NEXT: feq.h a0, fa5, fa4 2039; ZVFHMIN32-NEXT: fmv.h.x fa5, a6 2040; ZVFHMIN32-NEXT: sb a0, 181(sp) 2041; ZVFHMIN32-NEXT: lh a0, 744(sp) 2042; ZVFHMIN32-NEXT: lh a1, 488(sp) 2043; ZVFHMIN32-NEXT: fmv.h.x fa4, s3 2044; ZVFHMIN32-NEXT: feq.h a6, fa5, fa4 2045; ZVFHMIN32-NEXT: fmv.h.x fa5, a0 2046; ZVFHMIN32-NEXT: fmv.h.x fa4, a1 2047; ZVFHMIN32-NEXT: feq.h a0, fa5, fa4 2048; ZVFHMIN32-NEXT: fmv.h.x fa5, a5 2049; ZVFHMIN32-NEXT: addi a1, sp, 848 2050; ZVFHMIN32-NEXT: vl2r.v v8, (a1) # Unknown-size Folded Reload 2051; ZVFHMIN32-NEXT: vmv.x.s a1, v8 2052; ZVFHMIN32-NEXT: vsetivli zero, 1, e16, m2, ta, ma 2053; ZVFHMIN32-NEXT: vslidedown.vi v8, v24, 15 2054; ZVFHMIN32-NEXT: vmv.x.s a5, v8 2055; ZVFHMIN32-NEXT: sb a0, 180(sp) 2056; ZVFHMIN32-NEXT: lh a0, 742(sp) 2057; ZVFHMIN32-NEXT: lh a7, 486(sp) 2058; ZVFHMIN32-NEXT: fmv.h.x fa4, a1 2059; ZVFHMIN32-NEXT: feq.h a1, fa5, fa4 2060; ZVFHMIN32-NEXT: fmv.h.x fa5, a0 2061; ZVFHMIN32-NEXT: fmv.h.x fa4, a7 2062; ZVFHMIN32-NEXT: feq.h a0, fa5, fa4 2063; ZVFHMIN32-NEXT: sb a0, 179(sp) 2064; ZVFHMIN32-NEXT: lh a0, 740(sp) 2065; ZVFHMIN32-NEXT: lh a7, 484(sp) 2066; ZVFHMIN32-NEXT: sb a2, 140(sp) 2067; ZVFHMIN32-NEXT: sb t1, 141(sp) 2068; ZVFHMIN32-NEXT: sb t3, 142(sp) 2069; ZVFHMIN32-NEXT: sb t4, 143(sp) 2070; ZVFHMIN32-NEXT: sb a1, 136(sp) 2071; ZVFHMIN32-NEXT: sb a6, 137(sp) 2072; ZVFHMIN32-NEXT: sb a4, 138(sp) 2073; ZVFHMIN32-NEXT: sb a3, 139(sp) 2074; ZVFHMIN32-NEXT: fmv.h.x fa5, a0 2075; ZVFHMIN32-NEXT: fmv.h.x fa4, a7 2076; ZVFHMIN32-NEXT: feq.h a0, fa5, fa4 2077; ZVFHMIN32-NEXT: sb a0, 178(sp) 2078; ZVFHMIN32-NEXT: lh a0, 638(sp) 2079; ZVFHMIN32-NEXT: lh a1, 382(sp) 2080; ZVFHMIN32-NEXT: vslidedown.vi v8, v24, 14 2081; ZVFHMIN32-NEXT: vmv.x.s t3, v8 2082; ZVFHMIN32-NEXT: fmv.h.x fa5, a0 2083; ZVFHMIN32-NEXT: fmv.h.x fa4, a1 2084; ZVFHMIN32-NEXT: feq.h a0, fa5, fa4 2085; ZVFHMIN32-NEXT: sb a0, 255(sp) 2086; ZVFHMIN32-NEXT: lh a0, 636(sp) 2087; ZVFHMIN32-NEXT: lh a1, 380(sp) 2088; ZVFHMIN32-NEXT: vslidedown.vi v8, v24, 13 2089; ZVFHMIN32-NEXT: vmv.x.s t2, v8 2090; ZVFHMIN32-NEXT: fmv.h.x fa5, a0 2091; ZVFHMIN32-NEXT: fmv.h.x fa4, a1 2092; ZVFHMIN32-NEXT: feq.h a0, fa5, fa4 2093; ZVFHMIN32-NEXT: sb a0, 254(sp) 2094; ZVFHMIN32-NEXT: lh a0, 634(sp) 2095; ZVFHMIN32-NEXT: lh a1, 378(sp) 2096; ZVFHMIN32-NEXT: vslidedown.vi v8, v24, 12 2097; ZVFHMIN32-NEXT: vmv.x.s t1, v8 2098; ZVFHMIN32-NEXT: fmv.h.x fa5, a0 2099; ZVFHMIN32-NEXT: fmv.h.x fa4, a1 2100; ZVFHMIN32-NEXT: feq.h a0, fa5, fa4 2101; ZVFHMIN32-NEXT: sb a0, 253(sp) 2102; ZVFHMIN32-NEXT: lh a0, 632(sp) 2103; ZVFHMIN32-NEXT: lh a1, 376(sp) 2104; ZVFHMIN32-NEXT: vslidedown.vi v8, v24, 11 2105; ZVFHMIN32-NEXT: vmv.x.s t0, v8 2106; ZVFHMIN32-NEXT: fmv.h.x fa5, a0 2107; ZVFHMIN32-NEXT: fmv.h.x fa4, a1 2108; ZVFHMIN32-NEXT: feq.h a0, fa5, fa4 2109; ZVFHMIN32-NEXT: sb a0, 252(sp) 2110; ZVFHMIN32-NEXT: lh a0, 630(sp) 2111; ZVFHMIN32-NEXT: lh a1, 374(sp) 2112; ZVFHMIN32-NEXT: vslidedown.vi v8, v24, 10 2113; ZVFHMIN32-NEXT: vmv.x.s a7, v8 2114; ZVFHMIN32-NEXT: fmv.h.x fa5, a0 2115; ZVFHMIN32-NEXT: fmv.h.x fa4, a1 2116; ZVFHMIN32-NEXT: feq.h a0, fa5, fa4 2117; ZVFHMIN32-NEXT: sb a0, 251(sp) 2118; ZVFHMIN32-NEXT: lh a0, 628(sp) 2119; ZVFHMIN32-NEXT: lh a1, 372(sp) 2120; ZVFHMIN32-NEXT: vslidedown.vi v8, v24, 9 2121; ZVFHMIN32-NEXT: vmv.x.s a6, v8 2122; ZVFHMIN32-NEXT: fmv.h.x fa5, a0 2123; ZVFHMIN32-NEXT: fmv.h.x fa4, a1 2124; ZVFHMIN32-NEXT: feq.h a0, fa5, fa4 2125; ZVFHMIN32-NEXT: lw a1, 112(sp) # 4-byte Folded Reload 2126; ZVFHMIN32-NEXT: fmv.h.x fa5, a1 2127; ZVFHMIN32-NEXT: sb a0, 250(sp) 2128; ZVFHMIN32-NEXT: lh a0, 626(sp) 2129; ZVFHMIN32-NEXT: lh a1, 370(sp) 2130; ZVFHMIN32-NEXT: fmv.h.x fa4, a5 2131; ZVFHMIN32-NEXT: feq.h a3, fa5, fa4 2132; ZVFHMIN32-NEXT: fmv.h.x fa5, a0 2133; ZVFHMIN32-NEXT: fmv.h.x fa4, a1 2134; ZVFHMIN32-NEXT: feq.h a0, fa5, fa4 2135; ZVFHMIN32-NEXT: lw a1, 116(sp) # 4-byte Folded Reload 2136; ZVFHMIN32-NEXT: fmv.h.x fa5, a1 2137; ZVFHMIN32-NEXT: sb a0, 249(sp) 2138; ZVFHMIN32-NEXT: lh a0, 624(sp) 2139; ZVFHMIN32-NEXT: lh a1, 368(sp) 2140; ZVFHMIN32-NEXT: fmv.h.x fa4, t3 2141; ZVFHMIN32-NEXT: feq.h a2, fa5, fa4 2142; ZVFHMIN32-NEXT: fmv.h.x fa5, a0 2143; ZVFHMIN32-NEXT: fmv.h.x fa4, a1 2144; ZVFHMIN32-NEXT: feq.h a0, fa5, fa4 2145; ZVFHMIN32-NEXT: lw a1, 124(sp) # 4-byte Folded Reload 2146; ZVFHMIN32-NEXT: fmv.h.x fa5, a1 2147; ZVFHMIN32-NEXT: sb a0, 248(sp) 2148; ZVFHMIN32-NEXT: lh a0, 622(sp) 2149; ZVFHMIN32-NEXT: lh a1, 366(sp) 2150; ZVFHMIN32-NEXT: fmv.h.x fa4, t2 2151; ZVFHMIN32-NEXT: feq.h a4, fa5, fa4 2152; ZVFHMIN32-NEXT: fmv.h.x fa5, a0 2153; ZVFHMIN32-NEXT: fmv.h.x fa4, a1 2154; ZVFHMIN32-NEXT: feq.h a0, fa5, fa4 2155; ZVFHMIN32-NEXT: lw a1, 108(sp) # 4-byte Folded Reload 2156; ZVFHMIN32-NEXT: fmv.h.x fa5, a1 2157; ZVFHMIN32-NEXT: sb a0, 247(sp) 2158; ZVFHMIN32-NEXT: lh a0, 620(sp) 2159; ZVFHMIN32-NEXT: lh a1, 364(sp) 2160; ZVFHMIN32-NEXT: fmv.h.x fa4, t1 2161; ZVFHMIN32-NEXT: feq.h a5, fa5, fa4 2162; ZVFHMIN32-NEXT: fmv.h.x fa5, a0 2163; ZVFHMIN32-NEXT: fmv.h.x fa4, a1 2164; ZVFHMIN32-NEXT: feq.h a0, fa5, fa4 2165; ZVFHMIN32-NEXT: lw a1, 120(sp) # 4-byte Folded Reload 2166; ZVFHMIN32-NEXT: fmv.h.x fa5, a1 2167; ZVFHMIN32-NEXT: sb a0, 246(sp) 2168; ZVFHMIN32-NEXT: lh a0, 618(sp) 2169; ZVFHMIN32-NEXT: lh a1, 362(sp) 2170; ZVFHMIN32-NEXT: fmv.h.x fa4, t0 2171; ZVFHMIN32-NEXT: feq.h t0, fa5, fa4 2172; ZVFHMIN32-NEXT: fmv.h.x fa5, a0 2173; ZVFHMIN32-NEXT: fmv.h.x fa4, a1 2174; ZVFHMIN32-NEXT: feq.h a0, fa5, fa4 2175; ZVFHMIN32-NEXT: fmv.h.x fa5, s2 2176; ZVFHMIN32-NEXT: sb a0, 245(sp) 2177; ZVFHMIN32-NEXT: lh a0, 616(sp) 2178; ZVFHMIN32-NEXT: lh a1, 360(sp) 2179; ZVFHMIN32-NEXT: fmv.h.x fa4, a7 2180; ZVFHMIN32-NEXT: feq.h a7, fa5, fa4 2181; ZVFHMIN32-NEXT: fmv.h.x fa5, a0 2182; ZVFHMIN32-NEXT: fmv.h.x fa4, a1 2183; ZVFHMIN32-NEXT: feq.h a0, fa5, fa4 2184; ZVFHMIN32-NEXT: fmv.h.x fa5, t6 2185; ZVFHMIN32-NEXT: sb a0, 244(sp) 2186; ZVFHMIN32-NEXT: lh a0, 614(sp) 2187; ZVFHMIN32-NEXT: lh a1, 358(sp) 2188; ZVFHMIN32-NEXT: fmv.h.x fa4, a6 2189; ZVFHMIN32-NEXT: feq.h a6, fa5, fa4 2190; ZVFHMIN32-NEXT: fmv.h.x fa5, a0 2191; ZVFHMIN32-NEXT: fmv.h.x fa4, a1 2192; ZVFHMIN32-NEXT: feq.h a0, fa5, fa4 2193; ZVFHMIN32-NEXT: fmv.h.x fa5, t5 2194; ZVFHMIN32-NEXT: vslidedown.vi v8, v24, 8 2195; ZVFHMIN32-NEXT: vmv.x.s a1, v8 2196; ZVFHMIN32-NEXT: fmv.h.x fa4, a1 2197; ZVFHMIN32-NEXT: sb a0, 243(sp) 2198; ZVFHMIN32-NEXT: lh a0, 612(sp) 2199; ZVFHMIN32-NEXT: lh a1, 356(sp) 2200; ZVFHMIN32-NEXT: sb a5, 204(sp) 2201; ZVFHMIN32-NEXT: sb a4, 205(sp) 2202; ZVFHMIN32-NEXT: sb a2, 206(sp) 2203; ZVFHMIN32-NEXT: sb a3, 207(sp) 2204; ZVFHMIN32-NEXT: feq.h a2, fa5, fa4 2205; ZVFHMIN32-NEXT: sb a2, 200(sp) 2206; ZVFHMIN32-NEXT: sb a6, 201(sp) 2207; ZVFHMIN32-NEXT: sb a7, 202(sp) 2208; ZVFHMIN32-NEXT: sb t0, 203(sp) 2209; ZVFHMIN32-NEXT: li a2, 128 2210; ZVFHMIN32-NEXT: fmv.h.x fa5, a0 2211; ZVFHMIN32-NEXT: fmv.h.x fa4, a1 2212; ZVFHMIN32-NEXT: feq.h a0, fa5, fa4 2213; ZVFHMIN32-NEXT: sb a0, 242(sp) 2214; ZVFHMIN32-NEXT: addi a0, sp, 128 2215; ZVFHMIN32-NEXT: vsetvli zero, a2, e8, m8, ta, ma 2216; ZVFHMIN32-NEXT: vle8.v v8, (a0) 2217; ZVFHMIN32-NEXT: vand.vi v8, v8, 1 2218; ZVFHMIN32-NEXT: vmsne.vi v0, v8, 0 2219; ZVFHMIN32-NEXT: addi sp, s0, -896 2220; ZVFHMIN32-NEXT: .cfi_def_cfa sp, 896 2221; ZVFHMIN32-NEXT: lw ra, 892(sp) # 4-byte Folded Reload 2222; ZVFHMIN32-NEXT: lw s0, 888(sp) # 4-byte Folded Reload 2223; ZVFHMIN32-NEXT: lw s2, 884(sp) # 4-byte Folded Reload 2224; ZVFHMIN32-NEXT: lw s3, 880(sp) # 4-byte Folded Reload 2225; ZVFHMIN32-NEXT: lw s4, 876(sp) # 4-byte Folded Reload 2226; ZVFHMIN32-NEXT: lw s5, 872(sp) # 4-byte Folded Reload 2227; ZVFHMIN32-NEXT: lw s6, 868(sp) # 4-byte Folded Reload 2228; ZVFHMIN32-NEXT: lw s7, 864(sp) # 4-byte Folded Reload 2229; ZVFHMIN32-NEXT: lw s8, 860(sp) # 4-byte Folded Reload 2230; ZVFHMIN32-NEXT: lw s9, 856(sp) # 4-byte Folded Reload 2231; ZVFHMIN32-NEXT: lw s10, 852(sp) # 4-byte Folded Reload 2232; ZVFHMIN32-NEXT: lw s11, 848(sp) # 4-byte Folded Reload 2233; ZVFHMIN32-NEXT: .cfi_restore ra 2234; ZVFHMIN32-NEXT: .cfi_restore s0 2235; ZVFHMIN32-NEXT: .cfi_restore s2 2236; ZVFHMIN32-NEXT: .cfi_restore s3 2237; ZVFHMIN32-NEXT: .cfi_restore s4 2238; ZVFHMIN32-NEXT: .cfi_restore s5 2239; ZVFHMIN32-NEXT: .cfi_restore s6 2240; ZVFHMIN32-NEXT: .cfi_restore s7 2241; ZVFHMIN32-NEXT: .cfi_restore s8 2242; ZVFHMIN32-NEXT: .cfi_restore s9 2243; ZVFHMIN32-NEXT: .cfi_restore s10 2244; ZVFHMIN32-NEXT: .cfi_restore s11 2245; ZVFHMIN32-NEXT: addi sp, sp, 896 2246; ZVFHMIN32-NEXT: .cfi_def_cfa_offset 0 2247; ZVFHMIN32-NEXT: ret 2248; 2249; ZVFHMIN64-LABEL: fcmp_oeq_vv_v128f16: 2250; ZVFHMIN64: # %bb.0: 2251; ZVFHMIN64-NEXT: addi sp, sp, -896 2252; ZVFHMIN64-NEXT: .cfi_def_cfa_offset 896 2253; ZVFHMIN64-NEXT: sd ra, 888(sp) # 8-byte Folded Spill 2254; ZVFHMIN64-NEXT: sd s0, 880(sp) # 8-byte Folded Spill 2255; ZVFHMIN64-NEXT: sd s2, 872(sp) # 8-byte Folded Spill 2256; ZVFHMIN64-NEXT: sd s3, 864(sp) # 8-byte Folded Spill 2257; ZVFHMIN64-NEXT: sd s4, 856(sp) # 8-byte Folded Spill 2258; ZVFHMIN64-NEXT: sd s5, 848(sp) # 8-byte Folded Spill 2259; ZVFHMIN64-NEXT: sd s6, 840(sp) # 8-byte Folded Spill 2260; ZVFHMIN64-NEXT: sd s7, 832(sp) # 8-byte Folded Spill 2261; ZVFHMIN64-NEXT: sd s8, 824(sp) # 8-byte Folded Spill 2262; ZVFHMIN64-NEXT: sd s9, 816(sp) # 8-byte Folded Spill 2263; ZVFHMIN64-NEXT: sd s10, 808(sp) # 8-byte Folded Spill 2264; ZVFHMIN64-NEXT: sd s11, 800(sp) # 8-byte Folded Spill 2265; ZVFHMIN64-NEXT: .cfi_offset ra, -8 2266; ZVFHMIN64-NEXT: .cfi_offset s0, -16 2267; ZVFHMIN64-NEXT: .cfi_offset s2, -24 2268; ZVFHMIN64-NEXT: .cfi_offset s3, -32 2269; ZVFHMIN64-NEXT: .cfi_offset s4, -40 2270; ZVFHMIN64-NEXT: .cfi_offset s5, -48 2271; ZVFHMIN64-NEXT: .cfi_offset s6, -56 2272; ZVFHMIN64-NEXT: .cfi_offset s7, -64 2273; ZVFHMIN64-NEXT: .cfi_offset s8, -72 2274; ZVFHMIN64-NEXT: .cfi_offset s9, -80 2275; ZVFHMIN64-NEXT: .cfi_offset s10, -88 2276; ZVFHMIN64-NEXT: .cfi_offset s11, -96 2277; ZVFHMIN64-NEXT: addi s0, sp, 896 2278; ZVFHMIN64-NEXT: .cfi_def_cfa s0, 0 2279; ZVFHMIN64-NEXT: csrr a1, vlenb 2280; ZVFHMIN64-NEXT: li a2, 30 2281; ZVFHMIN64-NEXT: mul a1, a1, a2 2282; ZVFHMIN64-NEXT: sub sp, sp, a1 2283; ZVFHMIN64-NEXT: andi sp, sp, -128 2284; ZVFHMIN64-NEXT: addi a1, a0, 128 2285; ZVFHMIN64-NEXT: li a2, 64 2286; ZVFHMIN64-NEXT: addi a3, sp, 640 2287; ZVFHMIN64-NEXT: addi a4, sp, 384 2288; ZVFHMIN64-NEXT: addi a5, sp, 512 2289; ZVFHMIN64-NEXT: vsetvli zero, a2, e16, m8, ta, ma 2290; ZVFHMIN64-NEXT: vle16.v v0, (a0) 2291; ZVFHMIN64-NEXT: addi a0, sp, 256 2292; ZVFHMIN64-NEXT: vle16.v v24, (a1) 2293; ZVFHMIN64-NEXT: vse16.v v8, (a3) 2294; ZVFHMIN64-NEXT: vse16.v v0, (a4) 2295; ZVFHMIN64-NEXT: vse16.v v16, (a5) 2296; ZVFHMIN64-NEXT: vse16.v v24, (a0) 2297; ZVFHMIN64-NEXT: lh a0, 704(sp) 2298; ZVFHMIN64-NEXT: lh a1, 448(sp) 2299; ZVFHMIN64-NEXT: fmv.h.x fa5, a0 2300; ZVFHMIN64-NEXT: fmv.h.x fa4, a1 2301; ZVFHMIN64-NEXT: feq.h a0, fa5, fa4 2302; ZVFHMIN64-NEXT: sb a0, 160(sp) 2303; ZVFHMIN64-NEXT: lh a0, 702(sp) 2304; ZVFHMIN64-NEXT: lh a1, 446(sp) 2305; ZVFHMIN64-NEXT: fmv.h.x fa5, a0 2306; ZVFHMIN64-NEXT: fmv.h.x fa4, a1 2307; ZVFHMIN64-NEXT: feq.h a0, fa5, fa4 2308; ZVFHMIN64-NEXT: sb a0, 159(sp) 2309; ZVFHMIN64-NEXT: lh a0, 700(sp) 2310; ZVFHMIN64-NEXT: lh a1, 444(sp) 2311; ZVFHMIN64-NEXT: fmv.h.x fa5, a0 2312; ZVFHMIN64-NEXT: fmv.h.x fa4, a1 2313; ZVFHMIN64-NEXT: feq.h a0, fa5, fa4 2314; ZVFHMIN64-NEXT: sb a0, 158(sp) 2315; ZVFHMIN64-NEXT: lh a0, 698(sp) 2316; ZVFHMIN64-NEXT: lh a1, 442(sp) 2317; ZVFHMIN64-NEXT: fmv.h.x fa5, a0 2318; ZVFHMIN64-NEXT: fmv.h.x fa4, a1 2319; ZVFHMIN64-NEXT: feq.h a0, fa5, fa4 2320; ZVFHMIN64-NEXT: sb a0, 157(sp) 2321; ZVFHMIN64-NEXT: lh a0, 696(sp) 2322; ZVFHMIN64-NEXT: lh a1, 440(sp) 2323; ZVFHMIN64-NEXT: fmv.h.x fa5, a0 2324; ZVFHMIN64-NEXT: fmv.h.x fa4, a1 2325; ZVFHMIN64-NEXT: feq.h a0, fa5, fa4 2326; ZVFHMIN64-NEXT: sb a0, 156(sp) 2327; ZVFHMIN64-NEXT: lh a0, 694(sp) 2328; ZVFHMIN64-NEXT: lh a1, 438(sp) 2329; ZVFHMIN64-NEXT: fmv.h.x fa5, a0 2330; ZVFHMIN64-NEXT: fmv.h.x fa4, a1 2331; ZVFHMIN64-NEXT: feq.h a0, fa5, fa4 2332; ZVFHMIN64-NEXT: sb a0, 155(sp) 2333; ZVFHMIN64-NEXT: lh a0, 692(sp) 2334; ZVFHMIN64-NEXT: lh a1, 436(sp) 2335; ZVFHMIN64-NEXT: fmv.h.x fa5, a0 2336; ZVFHMIN64-NEXT: fmv.h.x fa4, a1 2337; ZVFHMIN64-NEXT: feq.h a0, fa5, fa4 2338; ZVFHMIN64-NEXT: sb a0, 154(sp) 2339; ZVFHMIN64-NEXT: lh a0, 690(sp) 2340; ZVFHMIN64-NEXT: lh a1, 434(sp) 2341; ZVFHMIN64-NEXT: fmv.h.x fa5, a0 2342; ZVFHMIN64-NEXT: fmv.h.x fa4, a1 2343; ZVFHMIN64-NEXT: feq.h a0, fa5, fa4 2344; ZVFHMIN64-NEXT: sb a0, 153(sp) 2345; ZVFHMIN64-NEXT: lh a0, 688(sp) 2346; ZVFHMIN64-NEXT: lh a1, 432(sp) 2347; ZVFHMIN64-NEXT: fmv.h.x fa5, a0 2348; ZVFHMIN64-NEXT: fmv.h.x fa4, a1 2349; ZVFHMIN64-NEXT: feq.h a0, fa5, fa4 2350; ZVFHMIN64-NEXT: sb a0, 152(sp) 2351; ZVFHMIN64-NEXT: lh a0, 686(sp) 2352; ZVFHMIN64-NEXT: lh a1, 430(sp) 2353; ZVFHMIN64-NEXT: fmv.h.x fa5, a0 2354; ZVFHMIN64-NEXT: fmv.h.x fa4, a1 2355; ZVFHMIN64-NEXT: feq.h a0, fa5, fa4 2356; ZVFHMIN64-NEXT: sb a0, 151(sp) 2357; ZVFHMIN64-NEXT: lh a0, 684(sp) 2358; ZVFHMIN64-NEXT: lh a1, 428(sp) 2359; ZVFHMIN64-NEXT: fmv.h.x fa5, a0 2360; ZVFHMIN64-NEXT: fmv.h.x fa4, a1 2361; ZVFHMIN64-NEXT: feq.h a0, fa5, fa4 2362; ZVFHMIN64-NEXT: sb a0, 150(sp) 2363; ZVFHMIN64-NEXT: lh a0, 682(sp) 2364; ZVFHMIN64-NEXT: lh a1, 426(sp) 2365; ZVFHMIN64-NEXT: fmv.h.x fa5, a0 2366; ZVFHMIN64-NEXT: fmv.h.x fa4, a1 2367; ZVFHMIN64-NEXT: feq.h a0, fa5, fa4 2368; ZVFHMIN64-NEXT: sb a0, 149(sp) 2369; ZVFHMIN64-NEXT: lh a0, 680(sp) 2370; ZVFHMIN64-NEXT: lh a1, 424(sp) 2371; ZVFHMIN64-NEXT: fmv.h.x fa5, a0 2372; ZVFHMIN64-NEXT: fmv.h.x fa4, a1 2373; ZVFHMIN64-NEXT: feq.h a0, fa5, fa4 2374; ZVFHMIN64-NEXT: sb a0, 148(sp) 2375; ZVFHMIN64-NEXT: lh a0, 678(sp) 2376; ZVFHMIN64-NEXT: lh a1, 422(sp) 2377; ZVFHMIN64-NEXT: fmv.h.x fa5, a0 2378; ZVFHMIN64-NEXT: fmv.h.x fa4, a1 2379; ZVFHMIN64-NEXT: feq.h a0, fa5, fa4 2380; ZVFHMIN64-NEXT: sb a0, 147(sp) 2381; ZVFHMIN64-NEXT: lh a0, 676(sp) 2382; ZVFHMIN64-NEXT: lh a1, 420(sp) 2383; ZVFHMIN64-NEXT: vmv.x.s a2, v8 2384; ZVFHMIN64-NEXT: fmv.h.x fa5, a0 2385; ZVFHMIN64-NEXT: fmv.h.x fa4, a1 2386; ZVFHMIN64-NEXT: feq.h a0, fa5, fa4 2387; ZVFHMIN64-NEXT: sb a0, 146(sp) 2388; ZVFHMIN64-NEXT: lh a0, 674(sp) 2389; ZVFHMIN64-NEXT: lh a1, 418(sp) 2390; ZVFHMIN64-NEXT: fmv.h.x fa5, a2 2391; ZVFHMIN64-NEXT: vmv.x.s a2, v0 2392; ZVFHMIN64-NEXT: fmv.h.x fa4, a0 2393; ZVFHMIN64-NEXT: fmv.h.x fa3, a1 2394; ZVFHMIN64-NEXT: feq.h a0, fa4, fa3 2395; ZVFHMIN64-NEXT: sb a0, 145(sp) 2396; ZVFHMIN64-NEXT: lh a0, 672(sp) 2397; ZVFHMIN64-NEXT: lh a1, 416(sp) 2398; ZVFHMIN64-NEXT: fmv.h.x fa4, a2 2399; ZVFHMIN64-NEXT: feq.h a2, fa5, fa4 2400; ZVFHMIN64-NEXT: fmv.h.x fa5, a0 2401; ZVFHMIN64-NEXT: fmv.h.x fa4, a1 2402; ZVFHMIN64-NEXT: feq.h a0, fa5, fa4 2403; ZVFHMIN64-NEXT: sb a2, 128(sp) 2404; ZVFHMIN64-NEXT: sb a0, 144(sp) 2405; ZVFHMIN64-NEXT: lh a0, 576(sp) 2406; ZVFHMIN64-NEXT: lh a1, 320(sp) 2407; ZVFHMIN64-NEXT: fmv.h.x fa5, a0 2408; ZVFHMIN64-NEXT: fmv.h.x fa4, a1 2409; ZVFHMIN64-NEXT: feq.h a0, fa5, fa4 2410; ZVFHMIN64-NEXT: sb a0, 224(sp) 2411; ZVFHMIN64-NEXT: lh a0, 574(sp) 2412; ZVFHMIN64-NEXT: lh a1, 318(sp) 2413; ZVFHMIN64-NEXT: fmv.h.x fa5, a0 2414; ZVFHMIN64-NEXT: fmv.h.x fa4, a1 2415; ZVFHMIN64-NEXT: feq.h a0, fa5, fa4 2416; ZVFHMIN64-NEXT: sb a0, 223(sp) 2417; ZVFHMIN64-NEXT: lh a0, 572(sp) 2418; ZVFHMIN64-NEXT: lh a1, 316(sp) 2419; ZVFHMIN64-NEXT: fmv.h.x fa5, a0 2420; ZVFHMIN64-NEXT: fmv.h.x fa4, a1 2421; ZVFHMIN64-NEXT: feq.h a0, fa5, fa4 2422; ZVFHMIN64-NEXT: sb a0, 222(sp) 2423; ZVFHMIN64-NEXT: lh a0, 570(sp) 2424; ZVFHMIN64-NEXT: lh a1, 314(sp) 2425; ZVFHMIN64-NEXT: fmv.h.x fa5, a0 2426; ZVFHMIN64-NEXT: fmv.h.x fa4, a1 2427; ZVFHMIN64-NEXT: feq.h a0, fa5, fa4 2428; ZVFHMIN64-NEXT: sb a0, 221(sp) 2429; ZVFHMIN64-NEXT: lh a0, 568(sp) 2430; ZVFHMIN64-NEXT: lh a1, 312(sp) 2431; ZVFHMIN64-NEXT: fmv.h.x fa5, a0 2432; ZVFHMIN64-NEXT: fmv.h.x fa4, a1 2433; ZVFHMIN64-NEXT: feq.h a0, fa5, fa4 2434; ZVFHMIN64-NEXT: sb a0, 220(sp) 2435; ZVFHMIN64-NEXT: lh a0, 566(sp) 2436; ZVFHMIN64-NEXT: lh a1, 310(sp) 2437; ZVFHMIN64-NEXT: fmv.h.x fa5, a0 2438; ZVFHMIN64-NEXT: fmv.h.x fa4, a1 2439; ZVFHMIN64-NEXT: feq.h a0, fa5, fa4 2440; ZVFHMIN64-NEXT: sb a0, 219(sp) 2441; ZVFHMIN64-NEXT: lh a0, 564(sp) 2442; ZVFHMIN64-NEXT: lh a1, 308(sp) 2443; ZVFHMIN64-NEXT: fmv.h.x fa5, a0 2444; ZVFHMIN64-NEXT: fmv.h.x fa4, a1 2445; ZVFHMIN64-NEXT: feq.h a0, fa5, fa4 2446; ZVFHMIN64-NEXT: sb a0, 218(sp) 2447; ZVFHMIN64-NEXT: lh a0, 562(sp) 2448; ZVFHMIN64-NEXT: lh a1, 306(sp) 2449; ZVFHMIN64-NEXT: vsetivli zero, 1, e16, m1, ta, ma 2450; ZVFHMIN64-NEXT: vslidedown.vi v10, v8, 7 2451; ZVFHMIN64-NEXT: csrr a2, vlenb 2452; ZVFHMIN64-NEXT: li a3, 29 2453; ZVFHMIN64-NEXT: mul a2, a2, a3 2454; ZVFHMIN64-NEXT: add a2, sp, a2 2455; ZVFHMIN64-NEXT: addi a2, a2, 800 2456; ZVFHMIN64-NEXT: vs1r.v v10, (a2) # Unknown-size Folded Spill 2457; ZVFHMIN64-NEXT: vslidedown.vi v10, v8, 6 2458; ZVFHMIN64-NEXT: csrr a2, vlenb 2459; ZVFHMIN64-NEXT: li a3, 28 2460; ZVFHMIN64-NEXT: mul a2, a2, a3 2461; ZVFHMIN64-NEXT: add a2, sp, a2 2462; ZVFHMIN64-NEXT: addi a2, a2, 800 2463; ZVFHMIN64-NEXT: vs1r.v v10, (a2) # Unknown-size Folded Spill 2464; ZVFHMIN64-NEXT: vslidedown.vi v10, v8, 5 2465; ZVFHMIN64-NEXT: csrr a2, vlenb 2466; ZVFHMIN64-NEXT: li a3, 27 2467; ZVFHMIN64-NEXT: mul a2, a2, a3 2468; ZVFHMIN64-NEXT: add a2, sp, a2 2469; ZVFHMIN64-NEXT: addi a2, a2, 800 2470; ZVFHMIN64-NEXT: vs1r.v v10, (a2) # Unknown-size Folded Spill 2471; ZVFHMIN64-NEXT: vslidedown.vi v10, v8, 4 2472; ZVFHMIN64-NEXT: csrr a2, vlenb 2473; ZVFHMIN64-NEXT: li a3, 26 2474; ZVFHMIN64-NEXT: mul a2, a2, a3 2475; ZVFHMIN64-NEXT: add a2, sp, a2 2476; ZVFHMIN64-NEXT: addi a2, a2, 800 2477; ZVFHMIN64-NEXT: vs1r.v v10, (a2) # Unknown-size Folded Spill 2478; ZVFHMIN64-NEXT: vslidedown.vi v10, v8, 3 2479; ZVFHMIN64-NEXT: csrr a2, vlenb 2480; ZVFHMIN64-NEXT: li a3, 25 2481; ZVFHMIN64-NEXT: mul a2, a2, a3 2482; ZVFHMIN64-NEXT: add a2, sp, a2 2483; ZVFHMIN64-NEXT: addi a2, a2, 800 2484; ZVFHMIN64-NEXT: vs1r.v v10, (a2) # Unknown-size Folded Spill 2485; ZVFHMIN64-NEXT: vslidedown.vi v10, v8, 2 2486; ZVFHMIN64-NEXT: csrr a2, vlenb 2487; ZVFHMIN64-NEXT: li a3, 24 2488; ZVFHMIN64-NEXT: mul a2, a2, a3 2489; ZVFHMIN64-NEXT: add a2, sp, a2 2490; ZVFHMIN64-NEXT: addi a2, a2, 800 2491; ZVFHMIN64-NEXT: vs1r.v v10, (a2) # Unknown-size Folded Spill 2492; ZVFHMIN64-NEXT: vslidedown.vi v10, v8, 1 2493; ZVFHMIN64-NEXT: csrr a2, vlenb 2494; ZVFHMIN64-NEXT: li a3, 23 2495; ZVFHMIN64-NEXT: mul a2, a2, a3 2496; ZVFHMIN64-NEXT: add a2, sp, a2 2497; ZVFHMIN64-NEXT: addi a2, a2, 800 2498; ZVFHMIN64-NEXT: vs1r.v v10, (a2) # Unknown-size Folded Spill 2499; ZVFHMIN64-NEXT: vsetivli zero, 1, e16, m2, ta, ma 2500; ZVFHMIN64-NEXT: vslidedown.vi v26, v8, 15 2501; ZVFHMIN64-NEXT: vslidedown.vi v20, v8, 14 2502; ZVFHMIN64-NEXT: vslidedown.vi v28, v8, 13 2503; ZVFHMIN64-NEXT: vslidedown.vi v10, v8, 12 2504; ZVFHMIN64-NEXT: csrr a2, vlenb 2505; ZVFHMIN64-NEXT: slli a2, a2, 1 2506; ZVFHMIN64-NEXT: add a2, sp, a2 2507; ZVFHMIN64-NEXT: addi a2, a2, 800 2508; ZVFHMIN64-NEXT: vs2r.v v10, (a2) # Unknown-size Folded Spill 2509; ZVFHMIN64-NEXT: vslidedown.vi v4, v8, 11 2510; ZVFHMIN64-NEXT: vslidedown.vi v2, v8, 10 2511; ZVFHMIN64-NEXT: vslidedown.vi v30, v8, 9 2512; ZVFHMIN64-NEXT: vslidedown.vi v22, v8, 8 2513; ZVFHMIN64-NEXT: vmv.x.s a4, v16 2514; ZVFHMIN64-NEXT: fmv.h.x fa5, a0 2515; ZVFHMIN64-NEXT: fmv.h.x fa4, a1 2516; ZVFHMIN64-NEXT: feq.h a0, fa5, fa4 2517; ZVFHMIN64-NEXT: sb a0, 217(sp) 2518; ZVFHMIN64-NEXT: lh a0, 560(sp) 2519; ZVFHMIN64-NEXT: lh a1, 304(sp) 2520; ZVFHMIN64-NEXT: vsetivli zero, 1, e16, m1, ta, ma 2521; ZVFHMIN64-NEXT: vslidedown.vi v3, v16, 7 2522; ZVFHMIN64-NEXT: vslidedown.vi v31, v16, 6 2523; ZVFHMIN64-NEXT: vslidedown.vi v5, v16, 5 2524; ZVFHMIN64-NEXT: vslidedown.vi v23, v16, 4 2525; ZVFHMIN64-NEXT: vslidedown.vi v8, v16, 3 2526; ZVFHMIN64-NEXT: csrr a2, vlenb 2527; ZVFHMIN64-NEXT: li a3, 21 2528; ZVFHMIN64-NEXT: mul a2, a2, a3 2529; ZVFHMIN64-NEXT: add a2, sp, a2 2530; ZVFHMIN64-NEXT: addi a2, a2, 800 2531; ZVFHMIN64-NEXT: vs1r.v v8, (a2) # Unknown-size Folded Spill 2532; ZVFHMIN64-NEXT: vslidedown.vi v8, v16, 2 2533; ZVFHMIN64-NEXT: csrr a2, vlenb 2534; ZVFHMIN64-NEXT: li a3, 20 2535; ZVFHMIN64-NEXT: mul a2, a2, a3 2536; ZVFHMIN64-NEXT: add a2, sp, a2 2537; ZVFHMIN64-NEXT: addi a2, a2, 800 2538; ZVFHMIN64-NEXT: vs1r.v v8, (a2) # Unknown-size Folded Spill 2539; ZVFHMIN64-NEXT: vslidedown.vi v8, v16, 1 2540; ZVFHMIN64-NEXT: csrr a2, vlenb 2541; ZVFHMIN64-NEXT: li a3, 22 2542; ZVFHMIN64-NEXT: mul a2, a2, a3 2543; ZVFHMIN64-NEXT: add a2, sp, a2 2544; ZVFHMIN64-NEXT: addi a2, a2, 800 2545; ZVFHMIN64-NEXT: vs1r.v v8, (a2) # Unknown-size Folded Spill 2546; ZVFHMIN64-NEXT: vsetivli zero, 1, e16, m2, ta, ma 2547; ZVFHMIN64-NEXT: vslidedown.vi v18, v16, 15 2548; ZVFHMIN64-NEXT: vslidedown.vi v14, v16, 14 2549; ZVFHMIN64-NEXT: vslidedown.vi v8, v16, 13 2550; ZVFHMIN64-NEXT: vslidedown.vi v12, v16, 12 2551; ZVFHMIN64-NEXT: vslidedown.vi v10, v16, 11 2552; ZVFHMIN64-NEXT: vslidedown.vi v6, v16, 10 2553; ZVFHMIN64-NEXT: csrr a2, vlenb 2554; ZVFHMIN64-NEXT: li a3, 18 2555; ZVFHMIN64-NEXT: mul a2, a2, a3 2556; ZVFHMIN64-NEXT: add a2, sp, a2 2557; ZVFHMIN64-NEXT: addi a2, a2, 800 2558; ZVFHMIN64-NEXT: vs2r.v v6, (a2) # Unknown-size Folded Spill 2559; ZVFHMIN64-NEXT: vslidedown.vi v6, v16, 9 2560; ZVFHMIN64-NEXT: csrr a2, vlenb 2561; ZVFHMIN64-NEXT: li a3, 14 2562; ZVFHMIN64-NEXT: mul a2, a2, a3 2563; ZVFHMIN64-NEXT: add a2, sp, a2 2564; ZVFHMIN64-NEXT: addi a2, a2, 800 2565; ZVFHMIN64-NEXT: vs2r.v v6, (a2) # Unknown-size Folded Spill 2566; ZVFHMIN64-NEXT: vslidedown.vi v6, v16, 8 2567; ZVFHMIN64-NEXT: fmv.h.x fa5, a0 2568; ZVFHMIN64-NEXT: fmv.h.x fa4, a1 2569; ZVFHMIN64-NEXT: feq.h a0, fa5, fa4 2570; ZVFHMIN64-NEXT: sb a0, 216(sp) 2571; ZVFHMIN64-NEXT: lh a0, 558(sp) 2572; ZVFHMIN64-NEXT: lh a1, 302(sp) 2573; ZVFHMIN64-NEXT: vsetivli zero, 1, e16, m1, ta, ma 2574; ZVFHMIN64-NEXT: vslidedown.vi v13, v0, 7 2575; ZVFHMIN64-NEXT: vslidedown.vi v29, v0, 6 2576; ZVFHMIN64-NEXT: vslidedown.vi v11, v0, 5 2577; ZVFHMIN64-NEXT: vslidedown.vi v7, v0, 4 2578; ZVFHMIN64-NEXT: vslidedown.vi v9, v0, 3 2579; ZVFHMIN64-NEXT: vslidedown.vi v21, v0, 2 2580; ZVFHMIN64-NEXT: vslidedown.vi v27, v0, 1 2581; ZVFHMIN64-NEXT: vsetivli zero, 1, e16, m2, ta, ma 2582; ZVFHMIN64-NEXT: vslidedown.vi v16, v0, 15 2583; ZVFHMIN64-NEXT: csrr a2, vlenb 2584; ZVFHMIN64-NEXT: slli a2, a2, 2 2585; ZVFHMIN64-NEXT: add a2, sp, a2 2586; ZVFHMIN64-NEXT: addi a2, a2, 800 2587; ZVFHMIN64-NEXT: vs2r.v v16, (a2) # Unknown-size Folded Spill 2588; ZVFHMIN64-NEXT: vslidedown.vi v16, v0, 14 2589; ZVFHMIN64-NEXT: csrr a2, vlenb 2590; ZVFHMIN64-NEXT: slli a2, a2, 3 2591; ZVFHMIN64-NEXT: add a2, sp, a2 2592; ZVFHMIN64-NEXT: addi a2, a2, 800 2593; ZVFHMIN64-NEXT: vs2r.v v16, (a2) # Unknown-size Folded Spill 2594; ZVFHMIN64-NEXT: vslidedown.vi v16, v0, 13 2595; ZVFHMIN64-NEXT: csrr a2, vlenb 2596; ZVFHMIN64-NEXT: li a3, 6 2597; ZVFHMIN64-NEXT: mul a2, a2, a3 2598; ZVFHMIN64-NEXT: add a2, sp, a2 2599; ZVFHMIN64-NEXT: addi a2, a2, 800 2600; ZVFHMIN64-NEXT: vs2r.v v16, (a2) # Unknown-size Folded Spill 2601; ZVFHMIN64-NEXT: vslidedown.vi v16, v0, 12 2602; ZVFHMIN64-NEXT: csrr a2, vlenb 2603; ZVFHMIN64-NEXT: li a3, 12 2604; ZVFHMIN64-NEXT: mul a2, a2, a3 2605; ZVFHMIN64-NEXT: add a2, sp, a2 2606; ZVFHMIN64-NEXT: addi a2, a2, 800 2607; ZVFHMIN64-NEXT: vs2r.v v16, (a2) # Unknown-size Folded Spill 2608; ZVFHMIN64-NEXT: vslidedown.vi v16, v0, 11 2609; ZVFHMIN64-NEXT: csrr a2, vlenb 2610; ZVFHMIN64-NEXT: li a3, 10 2611; ZVFHMIN64-NEXT: mul a2, a2, a3 2612; ZVFHMIN64-NEXT: add a2, sp, a2 2613; ZVFHMIN64-NEXT: addi a2, a2, 800 2614; ZVFHMIN64-NEXT: vs2r.v v16, (a2) # Unknown-size Folded Spill 2615; ZVFHMIN64-NEXT: vslidedown.vi v16, v0, 10 2616; ZVFHMIN64-NEXT: csrr a2, vlenb 2617; ZVFHMIN64-NEXT: slli a2, a2, 4 2618; ZVFHMIN64-NEXT: add a2, sp, a2 2619; ZVFHMIN64-NEXT: addi a2, a2, 800 2620; ZVFHMIN64-NEXT: vs2r.v v16, (a2) # Unknown-size Folded Spill 2621; ZVFHMIN64-NEXT: vslidedown.vi v16, v0, 9 2622; ZVFHMIN64-NEXT: vslidedown.vi v0, v0, 8 2623; ZVFHMIN64-NEXT: addi a2, sp, 800 2624; ZVFHMIN64-NEXT: vs2r.v v0, (a2) # Unknown-size Folded Spill 2625; ZVFHMIN64-NEXT: vmv.x.s t4, v26 2626; ZVFHMIN64-NEXT: fmv.h.x fa5, a0 2627; ZVFHMIN64-NEXT: fmv.h.x fa4, a1 2628; ZVFHMIN64-NEXT: feq.h a0, fa5, fa4 2629; ZVFHMIN64-NEXT: sb a0, 215(sp) 2630; ZVFHMIN64-NEXT: lh a0, 556(sp) 2631; ZVFHMIN64-NEXT: lh a1, 300(sp) 2632; ZVFHMIN64-NEXT: vmv.x.s t3, v20 2633; ZVFHMIN64-NEXT: vmv.x.s t1, v28 2634; ZVFHMIN64-NEXT: fmv.h.x fa5, a0 2635; ZVFHMIN64-NEXT: fmv.h.x fa4, a1 2636; ZVFHMIN64-NEXT: feq.h a0, fa5, fa4 2637; ZVFHMIN64-NEXT: sb a0, 214(sp) 2638; ZVFHMIN64-NEXT: lh a0, 554(sp) 2639; ZVFHMIN64-NEXT: lh a1, 298(sp) 2640; ZVFHMIN64-NEXT: csrr a2, vlenb 2641; ZVFHMIN64-NEXT: slli a2, a2, 1 2642; ZVFHMIN64-NEXT: add a2, sp, a2 2643; ZVFHMIN64-NEXT: addi a2, a2, 800 2644; ZVFHMIN64-NEXT: vl2r.v v0, (a2) # Unknown-size Folded Reload 2645; ZVFHMIN64-NEXT: vmv.x.s t2, v0 2646; ZVFHMIN64-NEXT: vmv.x.s t0, v4 2647; ZVFHMIN64-NEXT: fmv.h.x fa5, a0 2648; ZVFHMIN64-NEXT: fmv.h.x fa4, a1 2649; ZVFHMIN64-NEXT: feq.h a0, fa5, fa4 2650; ZVFHMIN64-NEXT: sb a0, 213(sp) 2651; ZVFHMIN64-NEXT: lh a0, 552(sp) 2652; ZVFHMIN64-NEXT: lh a1, 296(sp) 2653; ZVFHMIN64-NEXT: vmv.x.s a7, v2 2654; ZVFHMIN64-NEXT: vmv.x.s a6, v30 2655; ZVFHMIN64-NEXT: fmv.h.x fa5, a0 2656; ZVFHMIN64-NEXT: fmv.h.x fa4, a1 2657; ZVFHMIN64-NEXT: feq.h a0, fa5, fa4 2658; ZVFHMIN64-NEXT: sb a0, 212(sp) 2659; ZVFHMIN64-NEXT: lh a0, 550(sp) 2660; ZVFHMIN64-NEXT: lh a1, 294(sp) 2661; ZVFHMIN64-NEXT: vmv.x.s a5, v22 2662; ZVFHMIN64-NEXT: vmv.x.s a2, v18 2663; ZVFHMIN64-NEXT: sd a2, 96(sp) # 8-byte Folded Spill 2664; ZVFHMIN64-NEXT: fmv.h.x fa5, a0 2665; ZVFHMIN64-NEXT: fmv.h.x fa4, a1 2666; ZVFHMIN64-NEXT: feq.h a0, fa5, fa4 2667; ZVFHMIN64-NEXT: sb a0, 211(sp) 2668; ZVFHMIN64-NEXT: lh a1, 548(sp) 2669; ZVFHMIN64-NEXT: lh t5, 292(sp) 2670; ZVFHMIN64-NEXT: vmv.x.s a0, v14 2671; ZVFHMIN64-NEXT: sd a0, 104(sp) # 8-byte Folded Spill 2672; ZVFHMIN64-NEXT: vmv.x.s a0, v8 2673; ZVFHMIN64-NEXT: sd a0, 120(sp) # 8-byte Folded Spill 2674; ZVFHMIN64-NEXT: fmv.h.x fa5, a1 2675; ZVFHMIN64-NEXT: fmv.h.x fa4, t5 2676; ZVFHMIN64-NEXT: feq.h a1, fa5, fa4 2677; ZVFHMIN64-NEXT: sb a1, 210(sp) 2678; ZVFHMIN64-NEXT: lh a1, 546(sp) 2679; ZVFHMIN64-NEXT: lh t5, 290(sp) 2680; ZVFHMIN64-NEXT: fmv.h.x fa5, a4 2681; ZVFHMIN64-NEXT: vmv.x.s a4, v24 2682; ZVFHMIN64-NEXT: fmv.h.x fa4, a1 2683; ZVFHMIN64-NEXT: fmv.h.x fa3, t5 2684; ZVFHMIN64-NEXT: feq.h a1, fa4, fa3 2685; ZVFHMIN64-NEXT: sb a1, 209(sp) 2686; ZVFHMIN64-NEXT: lh a1, 544(sp) 2687; ZVFHMIN64-NEXT: lh t5, 288(sp) 2688; ZVFHMIN64-NEXT: fmv.h.x fa4, a4 2689; ZVFHMIN64-NEXT: feq.h a4, fa5, fa4 2690; ZVFHMIN64-NEXT: fmv.h.x fa5, a1 2691; ZVFHMIN64-NEXT: fmv.h.x fa4, t5 2692; ZVFHMIN64-NEXT: feq.h a1, fa5, fa4 2693; ZVFHMIN64-NEXT: sb a4, 192(sp) 2694; ZVFHMIN64-NEXT: sb a1, 208(sp) 2695; ZVFHMIN64-NEXT: lh t5, 738(sp) 2696; ZVFHMIN64-NEXT: lh t6, 482(sp) 2697; ZVFHMIN64-NEXT: vmv.x.s a0, v12 2698; ZVFHMIN64-NEXT: sd a0, 88(sp) # 8-byte Folded Spill 2699; ZVFHMIN64-NEXT: vmv.x.s a0, v10 2700; ZVFHMIN64-NEXT: sd a0, 112(sp) # 8-byte Folded Spill 2701; ZVFHMIN64-NEXT: fmv.h.x fa5, t5 2702; ZVFHMIN64-NEXT: fmv.h.x fa4, t6 2703; ZVFHMIN64-NEXT: feq.h t5, fa5, fa4 2704; ZVFHMIN64-NEXT: sb t5, 177(sp) 2705; ZVFHMIN64-NEXT: lh t5, 736(sp) 2706; ZVFHMIN64-NEXT: lh t6, 480(sp) 2707; ZVFHMIN64-NEXT: csrr a0, vlenb 2708; ZVFHMIN64-NEXT: li a1, 29 2709; ZVFHMIN64-NEXT: mul a0, a0, a1 2710; ZVFHMIN64-NEXT: add a0, sp, a0 2711; ZVFHMIN64-NEXT: lh s5, 800(a0) # 8-byte Folded Reload 2712; ZVFHMIN64-NEXT: csrr a0, vlenb 2713; ZVFHMIN64-NEXT: li a1, 28 2714; ZVFHMIN64-NEXT: mul a0, a0, a1 2715; ZVFHMIN64-NEXT: add a0, sp, a0 2716; ZVFHMIN64-NEXT: lh s6, 800(a0) # 8-byte Folded Reload 2717; ZVFHMIN64-NEXT: fmv.h.x fa5, t5 2718; ZVFHMIN64-NEXT: fmv.h.x fa4, t6 2719; ZVFHMIN64-NEXT: feq.h t5, fa5, fa4 2720; ZVFHMIN64-NEXT: sb t5, 176(sp) 2721; ZVFHMIN64-NEXT: lh t5, 734(sp) 2722; ZVFHMIN64-NEXT: lh t6, 478(sp) 2723; ZVFHMIN64-NEXT: csrr a0, vlenb 2724; ZVFHMIN64-NEXT: li a1, 27 2725; ZVFHMIN64-NEXT: mul a0, a0, a1 2726; ZVFHMIN64-NEXT: add a0, sp, a0 2727; ZVFHMIN64-NEXT: lh s7, 800(a0) # 8-byte Folded Reload 2728; ZVFHMIN64-NEXT: csrr a0, vlenb 2729; ZVFHMIN64-NEXT: li a1, 26 2730; ZVFHMIN64-NEXT: mul a0, a0, a1 2731; ZVFHMIN64-NEXT: add a0, sp, a0 2732; ZVFHMIN64-NEXT: lh s8, 800(a0) # 8-byte Folded Reload 2733; ZVFHMIN64-NEXT: fmv.h.x fa5, t5 2734; ZVFHMIN64-NEXT: fmv.h.x fa4, t6 2735; ZVFHMIN64-NEXT: feq.h t5, fa5, fa4 2736; ZVFHMIN64-NEXT: sb t5, 175(sp) 2737; ZVFHMIN64-NEXT: lh t5, 732(sp) 2738; ZVFHMIN64-NEXT: lh t6, 476(sp) 2739; ZVFHMIN64-NEXT: csrr a0, vlenb 2740; ZVFHMIN64-NEXT: li a1, 25 2741; ZVFHMIN64-NEXT: mul a0, a0, a1 2742; ZVFHMIN64-NEXT: add a0, sp, a0 2743; ZVFHMIN64-NEXT: lh s4, 800(a0) # 8-byte Folded Reload 2744; ZVFHMIN64-NEXT: csrr a0, vlenb 2745; ZVFHMIN64-NEXT: li a1, 24 2746; ZVFHMIN64-NEXT: mul a0, a0, a1 2747; ZVFHMIN64-NEXT: add a0, sp, a0 2748; ZVFHMIN64-NEXT: lh s3, 800(a0) # 8-byte Folded Reload 2749; ZVFHMIN64-NEXT: fmv.h.x fa5, t5 2750; ZVFHMIN64-NEXT: fmv.h.x fa4, t6 2751; ZVFHMIN64-NEXT: feq.h t5, fa5, fa4 2752; ZVFHMIN64-NEXT: sb t5, 174(sp) 2753; ZVFHMIN64-NEXT: lh t6, 730(sp) 2754; ZVFHMIN64-NEXT: lh s9, 474(sp) 2755; ZVFHMIN64-NEXT: csrr a0, vlenb 2756; ZVFHMIN64-NEXT: li a1, 23 2757; ZVFHMIN64-NEXT: mul a0, a0, a1 2758; ZVFHMIN64-NEXT: add a0, sp, a0 2759; ZVFHMIN64-NEXT: lh s2, 800(a0) # 8-byte Folded Reload 2760; ZVFHMIN64-NEXT: vmv.x.s t5, v3 2761; ZVFHMIN64-NEXT: fmv.h.x fa5, t6 2762; ZVFHMIN64-NEXT: fmv.h.x fa4, s9 2763; ZVFHMIN64-NEXT: feq.h t6, fa5, fa4 2764; ZVFHMIN64-NEXT: sb t6, 173(sp) 2765; ZVFHMIN64-NEXT: lh s9, 728(sp) 2766; ZVFHMIN64-NEXT: lh s10, 472(sp) 2767; ZVFHMIN64-NEXT: vmv.x.s t6, v31 2768; ZVFHMIN64-NEXT: vmv.x.s ra, v13 2769; ZVFHMIN64-NEXT: fmv.h.x fa5, s9 2770; ZVFHMIN64-NEXT: fmv.h.x fa4, s10 2771; ZVFHMIN64-NEXT: feq.h s9, fa5, fa4 2772; ZVFHMIN64-NEXT: sb s9, 172(sp) 2773; ZVFHMIN64-NEXT: lh s9, 726(sp) 2774; ZVFHMIN64-NEXT: lh s10, 470(sp) 2775; ZVFHMIN64-NEXT: vmv.x.s a2, v29 2776; ZVFHMIN64-NEXT: vmv.x.s a3, v11 2777; ZVFHMIN64-NEXT: fmv.h.x fa5, s9 2778; ZVFHMIN64-NEXT: fmv.h.x fa4, s10 2779; ZVFHMIN64-NEXT: feq.h s9, fa5, fa4 2780; ZVFHMIN64-NEXT: sb s9, 171(sp) 2781; ZVFHMIN64-NEXT: lh s10, 724(sp) 2782; ZVFHMIN64-NEXT: lh s11, 468(sp) 2783; ZVFHMIN64-NEXT: vmv.x.s a4, v7 2784; ZVFHMIN64-NEXT: vmv.x.s s9, v9 2785; ZVFHMIN64-NEXT: fmv.h.x fa5, s10 2786; ZVFHMIN64-NEXT: fmv.h.x fa4, s11 2787; ZVFHMIN64-NEXT: feq.h s10, fa5, fa4 2788; ZVFHMIN64-NEXT: sb s10, 170(sp) 2789; ZVFHMIN64-NEXT: lh a0, 722(sp) 2790; ZVFHMIN64-NEXT: lh a1, 466(sp) 2791; ZVFHMIN64-NEXT: vmv.x.s s10, v21 2792; ZVFHMIN64-NEXT: vmv.x.s s11, v27 2793; ZVFHMIN64-NEXT: fmv.h.x fa5, a0 2794; ZVFHMIN64-NEXT: fmv.h.x fa4, a1 2795; ZVFHMIN64-NEXT: feq.h a0, fa5, fa4 2796; ZVFHMIN64-NEXT: sb a0, 169(sp) 2797; ZVFHMIN64-NEXT: lh a0, 720(sp) 2798; ZVFHMIN64-NEXT: lh a1, 464(sp) 2799; ZVFHMIN64-NEXT: fmv.h.x fa5, s5 2800; ZVFHMIN64-NEXT: fmv.h.x fa4, s6 2801; ZVFHMIN64-NEXT: fmv.h.x fa3, a0 2802; ZVFHMIN64-NEXT: fmv.h.x fa2, a1 2803; ZVFHMIN64-NEXT: feq.h a0, fa3, fa2 2804; ZVFHMIN64-NEXT: sb a0, 168(sp) 2805; ZVFHMIN64-NEXT: lh a0, 718(sp) 2806; ZVFHMIN64-NEXT: lh a1, 462(sp) 2807; ZVFHMIN64-NEXT: fmv.h.x fa3, s7 2808; ZVFHMIN64-NEXT: fmv.h.x fa2, s8 2809; ZVFHMIN64-NEXT: fmv.h.x fa1, a0 2810; ZVFHMIN64-NEXT: fmv.h.x fa0, a1 2811; ZVFHMIN64-NEXT: feq.h a0, fa1, fa0 2812; ZVFHMIN64-NEXT: fmv.h.x fa1, ra 2813; ZVFHMIN64-NEXT: sb a0, 167(sp) 2814; ZVFHMIN64-NEXT: lh a0, 716(sp) 2815; ZVFHMIN64-NEXT: fmv.h.x fa0, a2 2816; ZVFHMIN64-NEXT: lh a1, 460(sp) 2817; ZVFHMIN64-NEXT: feq.h s5, fa5, fa1 2818; ZVFHMIN64-NEXT: fmv.h.x fa5, a0 2819; ZVFHMIN64-NEXT: feq.h a0, fa4, fa0 2820; ZVFHMIN64-NEXT: fmv.h.x fa4, a1 2821; ZVFHMIN64-NEXT: feq.h a1, fa5, fa4 2822; ZVFHMIN64-NEXT: fmv.h.x fa5, s4 2823; ZVFHMIN64-NEXT: sb a1, 166(sp) 2824; ZVFHMIN64-NEXT: lh a1, 714(sp) 2825; ZVFHMIN64-NEXT: lh a2, 458(sp) 2826; ZVFHMIN64-NEXT: fmv.h.x fa4, a3 2827; ZVFHMIN64-NEXT: feq.h a3, fa3, fa4 2828; ZVFHMIN64-NEXT: fmv.h.x fa4, a1 2829; ZVFHMIN64-NEXT: fmv.h.x fa3, a2 2830; ZVFHMIN64-NEXT: feq.h a1, fa4, fa3 2831; ZVFHMIN64-NEXT: fmv.h.x fa4, s3 2832; ZVFHMIN64-NEXT: sb a1, 165(sp) 2833; ZVFHMIN64-NEXT: lh a1, 712(sp) 2834; ZVFHMIN64-NEXT: lh a2, 456(sp) 2835; ZVFHMIN64-NEXT: fmv.h.x fa3, a4 2836; ZVFHMIN64-NEXT: feq.h a4, fa2, fa3 2837; ZVFHMIN64-NEXT: fmv.h.x fa3, a1 2838; ZVFHMIN64-NEXT: fmv.h.x fa2, a2 2839; ZVFHMIN64-NEXT: feq.h a1, fa3, fa2 2840; ZVFHMIN64-NEXT: fmv.h.x fa3, s2 2841; ZVFHMIN64-NEXT: sb a1, 164(sp) 2842; ZVFHMIN64-NEXT: lh a1, 710(sp) 2843; ZVFHMIN64-NEXT: lh a2, 454(sp) 2844; ZVFHMIN64-NEXT: fmv.h.x fa2, s9 2845; ZVFHMIN64-NEXT: feq.h s2, fa5, fa2 2846; ZVFHMIN64-NEXT: fmv.h.x fa5, a1 2847; ZVFHMIN64-NEXT: fmv.h.x fa2, a2 2848; ZVFHMIN64-NEXT: feq.h a1, fa5, fa2 2849; ZVFHMIN64-NEXT: fmv.h.x fa5, s10 2850; ZVFHMIN64-NEXT: fmv.h.x fa2, s11 2851; ZVFHMIN64-NEXT: sb a1, 163(sp) 2852; ZVFHMIN64-NEXT: lh a1, 708(sp) 2853; ZVFHMIN64-NEXT: lh a2, 452(sp) 2854; ZVFHMIN64-NEXT: feq.h s3, fa4, fa5 2855; ZVFHMIN64-NEXT: feq.h s4, fa3, fa2 2856; ZVFHMIN64-NEXT: fmv.h.x fa5, a1 2857; ZVFHMIN64-NEXT: fmv.h.x fa4, a2 2858; ZVFHMIN64-NEXT: feq.h a1, fa5, fa4 2859; ZVFHMIN64-NEXT: sb a1, 162(sp) 2860; ZVFHMIN64-NEXT: lh a1, 706(sp) 2861; ZVFHMIN64-NEXT: lh a2, 450(sp) 2862; ZVFHMIN64-NEXT: sb s4, 129(sp) 2863; ZVFHMIN64-NEXT: sb s3, 130(sp) 2864; ZVFHMIN64-NEXT: sb s2, 131(sp) 2865; ZVFHMIN64-NEXT: sb a4, 132(sp) 2866; ZVFHMIN64-NEXT: fmv.h.x fa5, a1 2867; ZVFHMIN64-NEXT: fmv.h.x fa4, a2 2868; ZVFHMIN64-NEXT: feq.h a1, fa5, fa4 2869; ZVFHMIN64-NEXT: sb a3, 133(sp) 2870; ZVFHMIN64-NEXT: sb a0, 134(sp) 2871; ZVFHMIN64-NEXT: sb s5, 135(sp) 2872; ZVFHMIN64-NEXT: sb a1, 161(sp) 2873; ZVFHMIN64-NEXT: lh a0, 610(sp) 2874; ZVFHMIN64-NEXT: lh a1, 354(sp) 2875; ZVFHMIN64-NEXT: vmv.x.s s6, v5 2876; ZVFHMIN64-NEXT: vmv.x.s s5, v23 2877; ZVFHMIN64-NEXT: fmv.h.x fa5, a0 2878; ZVFHMIN64-NEXT: fmv.h.x fa4, a1 2879; ZVFHMIN64-NEXT: feq.h a0, fa5, fa4 2880; ZVFHMIN64-NEXT: sb a0, 241(sp) 2881; ZVFHMIN64-NEXT: lh a0, 608(sp) 2882; ZVFHMIN64-NEXT: lh a1, 352(sp) 2883; ZVFHMIN64-NEXT: csrr a2, vlenb 2884; ZVFHMIN64-NEXT: li a3, 21 2885; ZVFHMIN64-NEXT: mul a2, a2, a3 2886; ZVFHMIN64-NEXT: add a2, sp, a2 2887; ZVFHMIN64-NEXT: lh s4, 800(a2) # 8-byte Folded Reload 2888; ZVFHMIN64-NEXT: csrr a2, vlenb 2889; ZVFHMIN64-NEXT: li a3, 20 2890; ZVFHMIN64-NEXT: mul a2, a2, a3 2891; ZVFHMIN64-NEXT: add a2, sp, a2 2892; ZVFHMIN64-NEXT: lh s3, 800(a2) # 8-byte Folded Reload 2893; ZVFHMIN64-NEXT: fmv.h.x fa5, a0 2894; ZVFHMIN64-NEXT: fmv.h.x fa4, a1 2895; ZVFHMIN64-NEXT: feq.h a0, fa5, fa4 2896; ZVFHMIN64-NEXT: sb a0, 240(sp) 2897; ZVFHMIN64-NEXT: lh a0, 606(sp) 2898; ZVFHMIN64-NEXT: lh a1, 350(sp) 2899; ZVFHMIN64-NEXT: csrr a2, vlenb 2900; ZVFHMIN64-NEXT: li a3, 22 2901; ZVFHMIN64-NEXT: mul a2, a2, a3 2902; ZVFHMIN64-NEXT: add a2, sp, a2 2903; ZVFHMIN64-NEXT: lh s2, 800(a2) # 8-byte Folded Reload 2904; ZVFHMIN64-NEXT: fmv.h.x fa5, t5 2905; ZVFHMIN64-NEXT: fmv.h.x fa4, a0 2906; ZVFHMIN64-NEXT: fmv.h.x fa3, a1 2907; ZVFHMIN64-NEXT: feq.h a0, fa4, fa3 2908; ZVFHMIN64-NEXT: sb a0, 239(sp) 2909; ZVFHMIN64-NEXT: lh a0, 604(sp) 2910; ZVFHMIN64-NEXT: lh a1, 348(sp) 2911; ZVFHMIN64-NEXT: fmv.h.x fa4, t6 2912; ZVFHMIN64-NEXT: vsetivli zero, 1, e16, m1, ta, ma 2913; ZVFHMIN64-NEXT: vslidedown.vi v8, v24, 7 2914; ZVFHMIN64-NEXT: fmv.h.x fa3, a0 2915; ZVFHMIN64-NEXT: fmv.h.x fa2, a1 2916; ZVFHMIN64-NEXT: feq.h a0, fa3, fa2 2917; ZVFHMIN64-NEXT: sb a0, 238(sp) 2918; ZVFHMIN64-NEXT: lh a0, 602(sp) 2919; ZVFHMIN64-NEXT: lh a1, 346(sp) 2920; ZVFHMIN64-NEXT: vmv.x.s a2, v8 2921; ZVFHMIN64-NEXT: vslidedown.vi v8, v24, 6 2922; ZVFHMIN64-NEXT: fmv.h.x fa3, a0 2923; ZVFHMIN64-NEXT: fmv.h.x fa2, a1 2924; ZVFHMIN64-NEXT: feq.h a0, fa3, fa2 2925; ZVFHMIN64-NEXT: sb a0, 237(sp) 2926; ZVFHMIN64-NEXT: lh a0, 600(sp) 2927; ZVFHMIN64-NEXT: lh a1, 344(sp) 2928; ZVFHMIN64-NEXT: vmv.x.s a3, v8 2929; ZVFHMIN64-NEXT: vslidedown.vi v8, v24, 5 2930; ZVFHMIN64-NEXT: fmv.h.x fa3, a0 2931; ZVFHMIN64-NEXT: fmv.h.x fa2, a1 2932; ZVFHMIN64-NEXT: feq.h a0, fa3, fa2 2933; ZVFHMIN64-NEXT: sb a0, 236(sp) 2934; ZVFHMIN64-NEXT: lh a0, 598(sp) 2935; ZVFHMIN64-NEXT: lh a1, 342(sp) 2936; ZVFHMIN64-NEXT: vmv.x.s a4, v8 2937; ZVFHMIN64-NEXT: vslidedown.vi v8, v24, 4 2938; ZVFHMIN64-NEXT: fmv.h.x fa3, a0 2939; ZVFHMIN64-NEXT: fmv.h.x fa2, a1 2940; ZVFHMIN64-NEXT: feq.h a0, fa3, fa2 2941; ZVFHMIN64-NEXT: sb a0, 235(sp) 2942; ZVFHMIN64-NEXT: lh a0, 596(sp) 2943; ZVFHMIN64-NEXT: lh a1, 340(sp) 2944; ZVFHMIN64-NEXT: vmv.x.s s8, v8 2945; ZVFHMIN64-NEXT: vslidedown.vi v8, v24, 3 2946; ZVFHMIN64-NEXT: fmv.h.x fa3, a0 2947; ZVFHMIN64-NEXT: fmv.h.x fa2, a1 2948; ZVFHMIN64-NEXT: feq.h a0, fa3, fa2 2949; ZVFHMIN64-NEXT: sb a0, 234(sp) 2950; ZVFHMIN64-NEXT: lh a0, 594(sp) 2951; ZVFHMIN64-NEXT: lh a1, 338(sp) 2952; ZVFHMIN64-NEXT: vmv.x.s s9, v8 2953; ZVFHMIN64-NEXT: vslidedown.vi v8, v24, 2 2954; ZVFHMIN64-NEXT: fmv.h.x fa3, a0 2955; ZVFHMIN64-NEXT: fmv.h.x fa2, a1 2956; ZVFHMIN64-NEXT: feq.h a0, fa3, fa2 2957; ZVFHMIN64-NEXT: sb a0, 233(sp) 2958; ZVFHMIN64-NEXT: lh a0, 592(sp) 2959; ZVFHMIN64-NEXT: vmv.x.s a1, v8 2960; ZVFHMIN64-NEXT: lh t5, 336(sp) 2961; ZVFHMIN64-NEXT: vslidedown.vi v8, v24, 1 2962; ZVFHMIN64-NEXT: fmv.h.x fa3, a0 2963; ZVFHMIN64-NEXT: vmv.x.s s7, v8 2964; ZVFHMIN64-NEXT: fmv.h.x fa2, t5 2965; ZVFHMIN64-NEXT: feq.h a0, fa3, fa2 2966; ZVFHMIN64-NEXT: fmv.h.x fa3, a2 2967; ZVFHMIN64-NEXT: sb a0, 232(sp) 2968; ZVFHMIN64-NEXT: lh a0, 590(sp) 2969; ZVFHMIN64-NEXT: fmv.h.x fa2, a3 2970; ZVFHMIN64-NEXT: lh a2, 334(sp) 2971; ZVFHMIN64-NEXT: feq.h t5, fa5, fa3 2972; ZVFHMIN64-NEXT: fmv.h.x fa5, a0 2973; ZVFHMIN64-NEXT: feq.h t6, fa4, fa2 2974; ZVFHMIN64-NEXT: fmv.h.x fa4, a2 2975; ZVFHMIN64-NEXT: feq.h a0, fa5, fa4 2976; ZVFHMIN64-NEXT: fmv.h.x fa5, s6 2977; ZVFHMIN64-NEXT: sb a0, 231(sp) 2978; ZVFHMIN64-NEXT: lh a0, 588(sp) 2979; ZVFHMIN64-NEXT: lh a2, 332(sp) 2980; ZVFHMIN64-NEXT: fmv.h.x fa4, a4 2981; ZVFHMIN64-NEXT: feq.h a3, fa5, fa4 2982; ZVFHMIN64-NEXT: fmv.h.x fa5, a0 2983; ZVFHMIN64-NEXT: fmv.h.x fa4, a2 2984; ZVFHMIN64-NEXT: feq.h a0, fa5, fa4 2985; ZVFHMIN64-NEXT: fmv.h.x fa5, s5 2986; ZVFHMIN64-NEXT: sb a0, 230(sp) 2987; ZVFHMIN64-NEXT: lh a0, 586(sp) 2988; ZVFHMIN64-NEXT: lh a2, 330(sp) 2989; ZVFHMIN64-NEXT: fmv.h.x fa4, s8 2990; ZVFHMIN64-NEXT: feq.h a4, fa5, fa4 2991; ZVFHMIN64-NEXT: fmv.h.x fa5, a0 2992; ZVFHMIN64-NEXT: fmv.h.x fa4, a2 2993; ZVFHMIN64-NEXT: feq.h a0, fa5, fa4 2994; ZVFHMIN64-NEXT: fmv.h.x fa5, s4 2995; ZVFHMIN64-NEXT: sb a0, 229(sp) 2996; ZVFHMIN64-NEXT: lh a0, 584(sp) 2997; ZVFHMIN64-NEXT: lh a2, 328(sp) 2998; ZVFHMIN64-NEXT: fmv.h.x fa4, s9 2999; ZVFHMIN64-NEXT: feq.h s4, fa5, fa4 3000; ZVFHMIN64-NEXT: fmv.h.x fa5, a0 3001; ZVFHMIN64-NEXT: fmv.h.x fa4, a2 3002; ZVFHMIN64-NEXT: feq.h a0, fa5, fa4 3003; ZVFHMIN64-NEXT: fmv.h.x fa5, s3 3004; ZVFHMIN64-NEXT: sb a0, 228(sp) 3005; ZVFHMIN64-NEXT: lh a0, 582(sp) 3006; ZVFHMIN64-NEXT: lh a2, 326(sp) 3007; ZVFHMIN64-NEXT: fmv.h.x fa4, a1 3008; ZVFHMIN64-NEXT: feq.h a1, fa5, fa4 3009; ZVFHMIN64-NEXT: fmv.h.x fa5, a0 3010; ZVFHMIN64-NEXT: fmv.h.x fa4, a2 3011; ZVFHMIN64-NEXT: feq.h a0, fa5, fa4 3012; ZVFHMIN64-NEXT: fmv.h.x fa5, s2 3013; ZVFHMIN64-NEXT: sb a0, 227(sp) 3014; ZVFHMIN64-NEXT: lh a0, 580(sp) 3015; ZVFHMIN64-NEXT: lh a2, 324(sp) 3016; ZVFHMIN64-NEXT: fmv.h.x fa4, s7 3017; ZVFHMIN64-NEXT: feq.h s2, fa5, fa4 3018; ZVFHMIN64-NEXT: fmv.h.x fa5, a0 3019; ZVFHMIN64-NEXT: fmv.h.x fa4, a2 3020; ZVFHMIN64-NEXT: feq.h a0, fa5, fa4 3021; ZVFHMIN64-NEXT: sb a0, 226(sp) 3022; ZVFHMIN64-NEXT: lh a0, 578(sp) 3023; ZVFHMIN64-NEXT: lh a2, 322(sp) 3024; ZVFHMIN64-NEXT: sb s2, 193(sp) 3025; ZVFHMIN64-NEXT: sb a1, 194(sp) 3026; ZVFHMIN64-NEXT: sb s4, 195(sp) 3027; ZVFHMIN64-NEXT: sb a4, 196(sp) 3028; ZVFHMIN64-NEXT: fmv.h.x fa5, a0 3029; ZVFHMIN64-NEXT: fmv.h.x fa4, a2 3030; ZVFHMIN64-NEXT: feq.h a0, fa5, fa4 3031; ZVFHMIN64-NEXT: sb a3, 197(sp) 3032; ZVFHMIN64-NEXT: sb t6, 198(sp) 3033; ZVFHMIN64-NEXT: sb t5, 199(sp) 3034; ZVFHMIN64-NEXT: sb a0, 225(sp) 3035; ZVFHMIN64-NEXT: lh a0, 766(sp) 3036; ZVFHMIN64-NEXT: lh a1, 510(sp) 3037; ZVFHMIN64-NEXT: csrr a2, vlenb 3038; ZVFHMIN64-NEXT: li a3, 18 3039; ZVFHMIN64-NEXT: mul a2, a2, a3 3040; ZVFHMIN64-NEXT: add a2, sp, a2 3041; ZVFHMIN64-NEXT: addi a2, a2, 800 3042; ZVFHMIN64-NEXT: vl2r.v v8, (a2) # Unknown-size Folded Reload 3043; ZVFHMIN64-NEXT: vmv.x.s s2, v8 3044; ZVFHMIN64-NEXT: csrr a2, vlenb 3045; ZVFHMIN64-NEXT: li a3, 14 3046; ZVFHMIN64-NEXT: mul a2, a2, a3 3047; ZVFHMIN64-NEXT: add a2, sp, a2 3048; ZVFHMIN64-NEXT: addi a2, a2, 800 3049; ZVFHMIN64-NEXT: vl2r.v v8, (a2) # Unknown-size Folded Reload 3050; ZVFHMIN64-NEXT: vmv.x.s t6, v8 3051; ZVFHMIN64-NEXT: fmv.h.x fa5, a0 3052; ZVFHMIN64-NEXT: fmv.h.x fa4, a1 3053; ZVFHMIN64-NEXT: feq.h a0, fa5, fa4 3054; ZVFHMIN64-NEXT: sb a0, 191(sp) 3055; ZVFHMIN64-NEXT: lh a0, 764(sp) 3056; ZVFHMIN64-NEXT: lh a1, 508(sp) 3057; ZVFHMIN64-NEXT: vmv.x.s t5, v6 3058; ZVFHMIN64-NEXT: csrr a2, vlenb 3059; ZVFHMIN64-NEXT: slli a2, a2, 2 3060; ZVFHMIN64-NEXT: add a2, sp, a2 3061; ZVFHMIN64-NEXT: addi a2, a2, 800 3062; ZVFHMIN64-NEXT: vl2r.v v8, (a2) # Unknown-size Folded Reload 3063; ZVFHMIN64-NEXT: vmv.x.s a2, v8 3064; ZVFHMIN64-NEXT: fmv.h.x fa5, a0 3065; ZVFHMIN64-NEXT: fmv.h.x fa4, a1 3066; ZVFHMIN64-NEXT: feq.h a0, fa5, fa4 3067; ZVFHMIN64-NEXT: sb a0, 190(sp) 3068; ZVFHMIN64-NEXT: lh a0, 762(sp) 3069; ZVFHMIN64-NEXT: lh a1, 506(sp) 3070; ZVFHMIN64-NEXT: csrr a3, vlenb 3071; ZVFHMIN64-NEXT: slli a3, a3, 3 3072; ZVFHMIN64-NEXT: add a3, sp, a3 3073; ZVFHMIN64-NEXT: addi a3, a3, 800 3074; ZVFHMIN64-NEXT: vl2r.v v8, (a3) # Unknown-size Folded Reload 3075; ZVFHMIN64-NEXT: vmv.x.s a3, v8 3076; ZVFHMIN64-NEXT: csrr a4, vlenb 3077; ZVFHMIN64-NEXT: li s3, 6 3078; ZVFHMIN64-NEXT: mul a4, a4, s3 3079; ZVFHMIN64-NEXT: add a4, sp, a4 3080; ZVFHMIN64-NEXT: addi a4, a4, 800 3081; ZVFHMIN64-NEXT: vl2r.v v8, (a4) # Unknown-size Folded Reload 3082; ZVFHMIN64-NEXT: vmv.x.s a4, v8 3083; ZVFHMIN64-NEXT: fmv.h.x fa5, a0 3084; ZVFHMIN64-NEXT: fmv.h.x fa4, a1 3085; ZVFHMIN64-NEXT: feq.h a0, fa5, fa4 3086; ZVFHMIN64-NEXT: sb a0, 189(sp) 3087; ZVFHMIN64-NEXT: lh a0, 760(sp) 3088; ZVFHMIN64-NEXT: lh a1, 504(sp) 3089; ZVFHMIN64-NEXT: csrr s3, vlenb 3090; ZVFHMIN64-NEXT: li s4, 12 3091; ZVFHMIN64-NEXT: mul s3, s3, s4 3092; ZVFHMIN64-NEXT: add s3, sp, s3 3093; ZVFHMIN64-NEXT: addi s3, s3, 800 3094; ZVFHMIN64-NEXT: vl2r.v v8, (s3) # Unknown-size Folded Reload 3095; ZVFHMIN64-NEXT: vmv.x.s s6, v8 3096; ZVFHMIN64-NEXT: csrr s3, vlenb 3097; ZVFHMIN64-NEXT: li s4, 10 3098; ZVFHMIN64-NEXT: mul s3, s3, s4 3099; ZVFHMIN64-NEXT: add s3, sp, s3 3100; ZVFHMIN64-NEXT: addi s3, s3, 800 3101; ZVFHMIN64-NEXT: vl2r.v v8, (s3) # Unknown-size Folded Reload 3102; ZVFHMIN64-NEXT: vmv.x.s s4, v8 3103; ZVFHMIN64-NEXT: fmv.h.x fa5, a0 3104; ZVFHMIN64-NEXT: fmv.h.x fa4, a1 3105; ZVFHMIN64-NEXT: feq.h a0, fa5, fa4 3106; ZVFHMIN64-NEXT: sb a0, 188(sp) 3107; ZVFHMIN64-NEXT: lh a0, 758(sp) 3108; ZVFHMIN64-NEXT: lh a1, 502(sp) 3109; ZVFHMIN64-NEXT: csrr s3, vlenb 3110; ZVFHMIN64-NEXT: slli s3, s3, 4 3111; ZVFHMIN64-NEXT: add s3, sp, s3 3112; ZVFHMIN64-NEXT: addi s3, s3, 800 3113; ZVFHMIN64-NEXT: vl2r.v v8, (s3) # Unknown-size Folded Reload 3114; ZVFHMIN64-NEXT: vmv.x.s s5, v8 3115; ZVFHMIN64-NEXT: vmv.x.s s3, v16 3116; ZVFHMIN64-NEXT: fmv.h.x fa5, a0 3117; ZVFHMIN64-NEXT: fmv.h.x fa4, a1 3118; ZVFHMIN64-NEXT: feq.h a0, fa5, fa4 3119; ZVFHMIN64-NEXT: fmv.h.x fa5, t4 3120; ZVFHMIN64-NEXT: sb a0, 187(sp) 3121; ZVFHMIN64-NEXT: lh a0, 756(sp) 3122; ZVFHMIN64-NEXT: lh a1, 500(sp) 3123; ZVFHMIN64-NEXT: fmv.h.x fa4, a2 3124; ZVFHMIN64-NEXT: feq.h t4, fa5, fa4 3125; ZVFHMIN64-NEXT: fmv.h.x fa5, a0 3126; ZVFHMIN64-NEXT: fmv.h.x fa4, a1 3127; ZVFHMIN64-NEXT: feq.h a0, fa5, fa4 3128; ZVFHMIN64-NEXT: fmv.h.x fa5, t3 3129; ZVFHMIN64-NEXT: sb a0, 186(sp) 3130; ZVFHMIN64-NEXT: lh a0, 754(sp) 3131; ZVFHMIN64-NEXT: lh a1, 498(sp) 3132; ZVFHMIN64-NEXT: fmv.h.x fa4, a3 3133; ZVFHMIN64-NEXT: feq.h t3, fa5, fa4 3134; ZVFHMIN64-NEXT: fmv.h.x fa5, a0 3135; ZVFHMIN64-NEXT: fmv.h.x fa4, a1 3136; ZVFHMIN64-NEXT: feq.h a0, fa5, fa4 3137; ZVFHMIN64-NEXT: fmv.h.x fa5, t1 3138; ZVFHMIN64-NEXT: sb a0, 185(sp) 3139; ZVFHMIN64-NEXT: lh a0, 752(sp) 3140; ZVFHMIN64-NEXT: lh a1, 496(sp) 3141; ZVFHMIN64-NEXT: fmv.h.x fa4, a4 3142; ZVFHMIN64-NEXT: feq.h t1, fa5, fa4 3143; ZVFHMIN64-NEXT: fmv.h.x fa5, a0 3144; ZVFHMIN64-NEXT: fmv.h.x fa4, a1 3145; ZVFHMIN64-NEXT: feq.h a0, fa5, fa4 3146; ZVFHMIN64-NEXT: fmv.h.x fa5, t2 3147; ZVFHMIN64-NEXT: sb a0, 184(sp) 3148; ZVFHMIN64-NEXT: lh a0, 750(sp) 3149; ZVFHMIN64-NEXT: lh a1, 494(sp) 3150; ZVFHMIN64-NEXT: fmv.h.x fa4, s6 3151; ZVFHMIN64-NEXT: feq.h a2, fa5, fa4 3152; ZVFHMIN64-NEXT: fmv.h.x fa5, a0 3153; ZVFHMIN64-NEXT: fmv.h.x fa4, a1 3154; ZVFHMIN64-NEXT: feq.h a0, fa5, fa4 3155; ZVFHMIN64-NEXT: fmv.h.x fa5, t0 3156; ZVFHMIN64-NEXT: sb a0, 183(sp) 3157; ZVFHMIN64-NEXT: lh a0, 748(sp) 3158; ZVFHMIN64-NEXT: lh a1, 492(sp) 3159; ZVFHMIN64-NEXT: fmv.h.x fa4, s4 3160; ZVFHMIN64-NEXT: feq.h a3, fa5, fa4 3161; ZVFHMIN64-NEXT: fmv.h.x fa5, a0 3162; ZVFHMIN64-NEXT: fmv.h.x fa4, a1 3163; ZVFHMIN64-NEXT: feq.h a0, fa5, fa4 3164; ZVFHMIN64-NEXT: fmv.h.x fa5, a7 3165; ZVFHMIN64-NEXT: sb a0, 182(sp) 3166; ZVFHMIN64-NEXT: lh a0, 746(sp) 3167; ZVFHMIN64-NEXT: lh a1, 490(sp) 3168; ZVFHMIN64-NEXT: fmv.h.x fa4, s5 3169; ZVFHMIN64-NEXT: feq.h a4, fa5, fa4 3170; ZVFHMIN64-NEXT: fmv.h.x fa5, a0 3171; ZVFHMIN64-NEXT: fmv.h.x fa4, a1 3172; ZVFHMIN64-NEXT: feq.h a0, fa5, fa4 3173; ZVFHMIN64-NEXT: fmv.h.x fa5, a6 3174; ZVFHMIN64-NEXT: sb a0, 181(sp) 3175; ZVFHMIN64-NEXT: lh a0, 744(sp) 3176; ZVFHMIN64-NEXT: lh a1, 488(sp) 3177; ZVFHMIN64-NEXT: fmv.h.x fa4, s3 3178; ZVFHMIN64-NEXT: feq.h a6, fa5, fa4 3179; ZVFHMIN64-NEXT: fmv.h.x fa5, a0 3180; ZVFHMIN64-NEXT: fmv.h.x fa4, a1 3181; ZVFHMIN64-NEXT: feq.h a0, fa5, fa4 3182; ZVFHMIN64-NEXT: fmv.h.x fa5, a5 3183; ZVFHMIN64-NEXT: addi a1, sp, 800 3184; ZVFHMIN64-NEXT: vl2r.v v8, (a1) # Unknown-size Folded Reload 3185; ZVFHMIN64-NEXT: vmv.x.s a1, v8 3186; ZVFHMIN64-NEXT: vsetivli zero, 1, e16, m2, ta, ma 3187; ZVFHMIN64-NEXT: vslidedown.vi v8, v24, 15 3188; ZVFHMIN64-NEXT: vmv.x.s a5, v8 3189; ZVFHMIN64-NEXT: sb a0, 180(sp) 3190; ZVFHMIN64-NEXT: lh a0, 742(sp) 3191; ZVFHMIN64-NEXT: lh a7, 486(sp) 3192; ZVFHMIN64-NEXT: fmv.h.x fa4, a1 3193; ZVFHMIN64-NEXT: feq.h a1, fa5, fa4 3194; ZVFHMIN64-NEXT: fmv.h.x fa5, a0 3195; ZVFHMIN64-NEXT: fmv.h.x fa4, a7 3196; ZVFHMIN64-NEXT: feq.h a0, fa5, fa4 3197; ZVFHMIN64-NEXT: sb a0, 179(sp) 3198; ZVFHMIN64-NEXT: lh a0, 740(sp) 3199; ZVFHMIN64-NEXT: lh a7, 484(sp) 3200; ZVFHMIN64-NEXT: sb a2, 140(sp) 3201; ZVFHMIN64-NEXT: sb t1, 141(sp) 3202; ZVFHMIN64-NEXT: sb t3, 142(sp) 3203; ZVFHMIN64-NEXT: sb t4, 143(sp) 3204; ZVFHMIN64-NEXT: sb a1, 136(sp) 3205; ZVFHMIN64-NEXT: sb a6, 137(sp) 3206; ZVFHMIN64-NEXT: sb a4, 138(sp) 3207; ZVFHMIN64-NEXT: sb a3, 139(sp) 3208; ZVFHMIN64-NEXT: fmv.h.x fa5, a0 3209; ZVFHMIN64-NEXT: fmv.h.x fa4, a7 3210; ZVFHMIN64-NEXT: feq.h a0, fa5, fa4 3211; ZVFHMIN64-NEXT: sb a0, 178(sp) 3212; ZVFHMIN64-NEXT: lh a0, 638(sp) 3213; ZVFHMIN64-NEXT: lh a1, 382(sp) 3214; ZVFHMIN64-NEXT: vslidedown.vi v8, v24, 14 3215; ZVFHMIN64-NEXT: vmv.x.s t3, v8 3216; ZVFHMIN64-NEXT: fmv.h.x fa5, a0 3217; ZVFHMIN64-NEXT: fmv.h.x fa4, a1 3218; ZVFHMIN64-NEXT: feq.h a0, fa5, fa4 3219; ZVFHMIN64-NEXT: sb a0, 255(sp) 3220; ZVFHMIN64-NEXT: lh a0, 636(sp) 3221; ZVFHMIN64-NEXT: lh a1, 380(sp) 3222; ZVFHMIN64-NEXT: vslidedown.vi v8, v24, 13 3223; ZVFHMIN64-NEXT: vmv.x.s t2, v8 3224; ZVFHMIN64-NEXT: fmv.h.x fa5, a0 3225; ZVFHMIN64-NEXT: fmv.h.x fa4, a1 3226; ZVFHMIN64-NEXT: feq.h a0, fa5, fa4 3227; ZVFHMIN64-NEXT: sb a0, 254(sp) 3228; ZVFHMIN64-NEXT: lh a0, 634(sp) 3229; ZVFHMIN64-NEXT: lh a1, 378(sp) 3230; ZVFHMIN64-NEXT: vslidedown.vi v8, v24, 12 3231; ZVFHMIN64-NEXT: vmv.x.s t1, v8 3232; ZVFHMIN64-NEXT: fmv.h.x fa5, a0 3233; ZVFHMIN64-NEXT: fmv.h.x fa4, a1 3234; ZVFHMIN64-NEXT: feq.h a0, fa5, fa4 3235; ZVFHMIN64-NEXT: sb a0, 253(sp) 3236; ZVFHMIN64-NEXT: lh a0, 632(sp) 3237; ZVFHMIN64-NEXT: lh a1, 376(sp) 3238; ZVFHMIN64-NEXT: vslidedown.vi v8, v24, 11 3239; ZVFHMIN64-NEXT: vmv.x.s t0, v8 3240; ZVFHMIN64-NEXT: fmv.h.x fa5, a0 3241; ZVFHMIN64-NEXT: fmv.h.x fa4, a1 3242; ZVFHMIN64-NEXT: feq.h a0, fa5, fa4 3243; ZVFHMIN64-NEXT: sb a0, 252(sp) 3244; ZVFHMIN64-NEXT: lh a0, 630(sp) 3245; ZVFHMIN64-NEXT: lh a1, 374(sp) 3246; ZVFHMIN64-NEXT: vslidedown.vi v8, v24, 10 3247; ZVFHMIN64-NEXT: vmv.x.s a7, v8 3248; ZVFHMIN64-NEXT: fmv.h.x fa5, a0 3249; ZVFHMIN64-NEXT: fmv.h.x fa4, a1 3250; ZVFHMIN64-NEXT: feq.h a0, fa5, fa4 3251; ZVFHMIN64-NEXT: sb a0, 251(sp) 3252; ZVFHMIN64-NEXT: lh a0, 628(sp) 3253; ZVFHMIN64-NEXT: lh a1, 372(sp) 3254; ZVFHMIN64-NEXT: vslidedown.vi v8, v24, 9 3255; ZVFHMIN64-NEXT: vmv.x.s a6, v8 3256; ZVFHMIN64-NEXT: fmv.h.x fa5, a0 3257; ZVFHMIN64-NEXT: fmv.h.x fa4, a1 3258; ZVFHMIN64-NEXT: feq.h a0, fa5, fa4 3259; ZVFHMIN64-NEXT: ld a1, 96(sp) # 8-byte Folded Reload 3260; ZVFHMIN64-NEXT: fmv.h.x fa5, a1 3261; ZVFHMIN64-NEXT: sb a0, 250(sp) 3262; ZVFHMIN64-NEXT: lh a0, 626(sp) 3263; ZVFHMIN64-NEXT: lh a1, 370(sp) 3264; ZVFHMIN64-NEXT: fmv.h.x fa4, a5 3265; ZVFHMIN64-NEXT: feq.h a3, fa5, fa4 3266; ZVFHMIN64-NEXT: fmv.h.x fa5, a0 3267; ZVFHMIN64-NEXT: fmv.h.x fa4, a1 3268; ZVFHMIN64-NEXT: feq.h a0, fa5, fa4 3269; ZVFHMIN64-NEXT: ld a1, 104(sp) # 8-byte Folded Reload 3270; ZVFHMIN64-NEXT: fmv.h.x fa5, a1 3271; ZVFHMIN64-NEXT: sb a0, 249(sp) 3272; ZVFHMIN64-NEXT: lh a0, 624(sp) 3273; ZVFHMIN64-NEXT: lh a1, 368(sp) 3274; ZVFHMIN64-NEXT: fmv.h.x fa4, t3 3275; ZVFHMIN64-NEXT: feq.h a2, fa5, fa4 3276; ZVFHMIN64-NEXT: fmv.h.x fa5, a0 3277; ZVFHMIN64-NEXT: fmv.h.x fa4, a1 3278; ZVFHMIN64-NEXT: feq.h a0, fa5, fa4 3279; ZVFHMIN64-NEXT: ld a1, 120(sp) # 8-byte Folded Reload 3280; ZVFHMIN64-NEXT: fmv.h.x fa5, a1 3281; ZVFHMIN64-NEXT: sb a0, 248(sp) 3282; ZVFHMIN64-NEXT: lh a0, 622(sp) 3283; ZVFHMIN64-NEXT: lh a1, 366(sp) 3284; ZVFHMIN64-NEXT: fmv.h.x fa4, t2 3285; ZVFHMIN64-NEXT: feq.h a4, fa5, fa4 3286; ZVFHMIN64-NEXT: fmv.h.x fa5, a0 3287; ZVFHMIN64-NEXT: fmv.h.x fa4, a1 3288; ZVFHMIN64-NEXT: feq.h a0, fa5, fa4 3289; ZVFHMIN64-NEXT: ld a1, 88(sp) # 8-byte Folded Reload 3290; ZVFHMIN64-NEXT: fmv.h.x fa5, a1 3291; ZVFHMIN64-NEXT: sb a0, 247(sp) 3292; ZVFHMIN64-NEXT: lh a0, 620(sp) 3293; ZVFHMIN64-NEXT: lh a1, 364(sp) 3294; ZVFHMIN64-NEXT: fmv.h.x fa4, t1 3295; ZVFHMIN64-NEXT: feq.h a5, fa5, fa4 3296; ZVFHMIN64-NEXT: fmv.h.x fa5, a0 3297; ZVFHMIN64-NEXT: fmv.h.x fa4, a1 3298; ZVFHMIN64-NEXT: feq.h a0, fa5, fa4 3299; ZVFHMIN64-NEXT: ld a1, 112(sp) # 8-byte Folded Reload 3300; ZVFHMIN64-NEXT: fmv.h.x fa5, a1 3301; ZVFHMIN64-NEXT: sb a0, 246(sp) 3302; ZVFHMIN64-NEXT: lh a0, 618(sp) 3303; ZVFHMIN64-NEXT: lh a1, 362(sp) 3304; ZVFHMIN64-NEXT: fmv.h.x fa4, t0 3305; ZVFHMIN64-NEXT: feq.h t0, fa5, fa4 3306; ZVFHMIN64-NEXT: fmv.h.x fa5, a0 3307; ZVFHMIN64-NEXT: fmv.h.x fa4, a1 3308; ZVFHMIN64-NEXT: feq.h a0, fa5, fa4 3309; ZVFHMIN64-NEXT: fmv.h.x fa5, s2 3310; ZVFHMIN64-NEXT: sb a0, 245(sp) 3311; ZVFHMIN64-NEXT: lh a0, 616(sp) 3312; ZVFHMIN64-NEXT: lh a1, 360(sp) 3313; ZVFHMIN64-NEXT: fmv.h.x fa4, a7 3314; ZVFHMIN64-NEXT: feq.h a7, fa5, fa4 3315; ZVFHMIN64-NEXT: fmv.h.x fa5, a0 3316; ZVFHMIN64-NEXT: fmv.h.x fa4, a1 3317; ZVFHMIN64-NEXT: feq.h a0, fa5, fa4 3318; ZVFHMIN64-NEXT: fmv.h.x fa5, t6 3319; ZVFHMIN64-NEXT: sb a0, 244(sp) 3320; ZVFHMIN64-NEXT: lh a0, 614(sp) 3321; ZVFHMIN64-NEXT: lh a1, 358(sp) 3322; ZVFHMIN64-NEXT: fmv.h.x fa4, a6 3323; ZVFHMIN64-NEXT: feq.h a6, fa5, fa4 3324; ZVFHMIN64-NEXT: fmv.h.x fa5, a0 3325; ZVFHMIN64-NEXT: fmv.h.x fa4, a1 3326; ZVFHMIN64-NEXT: feq.h a0, fa5, fa4 3327; ZVFHMIN64-NEXT: fmv.h.x fa5, t5 3328; ZVFHMIN64-NEXT: vslidedown.vi v8, v24, 8 3329; ZVFHMIN64-NEXT: vmv.x.s a1, v8 3330; ZVFHMIN64-NEXT: fmv.h.x fa4, a1 3331; ZVFHMIN64-NEXT: sb a0, 243(sp) 3332; ZVFHMIN64-NEXT: lh a0, 612(sp) 3333; ZVFHMIN64-NEXT: lh a1, 356(sp) 3334; ZVFHMIN64-NEXT: sb a5, 204(sp) 3335; ZVFHMIN64-NEXT: sb a4, 205(sp) 3336; ZVFHMIN64-NEXT: sb a2, 206(sp) 3337; ZVFHMIN64-NEXT: sb a3, 207(sp) 3338; ZVFHMIN64-NEXT: feq.h a2, fa5, fa4 3339; ZVFHMIN64-NEXT: sb a2, 200(sp) 3340; ZVFHMIN64-NEXT: sb a6, 201(sp) 3341; ZVFHMIN64-NEXT: sb a7, 202(sp) 3342; ZVFHMIN64-NEXT: sb t0, 203(sp) 3343; ZVFHMIN64-NEXT: li a2, 128 3344; ZVFHMIN64-NEXT: fmv.h.x fa5, a0 3345; ZVFHMIN64-NEXT: fmv.h.x fa4, a1 3346; ZVFHMIN64-NEXT: feq.h a0, fa5, fa4 3347; ZVFHMIN64-NEXT: sb a0, 242(sp) 3348; ZVFHMIN64-NEXT: addi a0, sp, 128 3349; ZVFHMIN64-NEXT: vsetvli zero, a2, e8, m8, ta, ma 3350; ZVFHMIN64-NEXT: vle8.v v8, (a0) 3351; ZVFHMIN64-NEXT: vand.vi v8, v8, 1 3352; ZVFHMIN64-NEXT: vmsne.vi v0, v8, 0 3353; ZVFHMIN64-NEXT: addi sp, s0, -896 3354; ZVFHMIN64-NEXT: .cfi_def_cfa sp, 896 3355; ZVFHMIN64-NEXT: ld ra, 888(sp) # 8-byte Folded Reload 3356; ZVFHMIN64-NEXT: ld s0, 880(sp) # 8-byte Folded Reload 3357; ZVFHMIN64-NEXT: ld s2, 872(sp) # 8-byte Folded Reload 3358; ZVFHMIN64-NEXT: ld s3, 864(sp) # 8-byte Folded Reload 3359; ZVFHMIN64-NEXT: ld s4, 856(sp) # 8-byte Folded Reload 3360; ZVFHMIN64-NEXT: ld s5, 848(sp) # 8-byte Folded Reload 3361; ZVFHMIN64-NEXT: ld s6, 840(sp) # 8-byte Folded Reload 3362; ZVFHMIN64-NEXT: ld s7, 832(sp) # 8-byte Folded Reload 3363; ZVFHMIN64-NEXT: ld s8, 824(sp) # 8-byte Folded Reload 3364; ZVFHMIN64-NEXT: ld s9, 816(sp) # 8-byte Folded Reload 3365; ZVFHMIN64-NEXT: ld s10, 808(sp) # 8-byte Folded Reload 3366; ZVFHMIN64-NEXT: ld s11, 800(sp) # 8-byte Folded Reload 3367; ZVFHMIN64-NEXT: .cfi_restore ra 3368; ZVFHMIN64-NEXT: .cfi_restore s0 3369; ZVFHMIN64-NEXT: .cfi_restore s2 3370; ZVFHMIN64-NEXT: .cfi_restore s3 3371; ZVFHMIN64-NEXT: .cfi_restore s4 3372; ZVFHMIN64-NEXT: .cfi_restore s5 3373; ZVFHMIN64-NEXT: .cfi_restore s6 3374; ZVFHMIN64-NEXT: .cfi_restore s7 3375; ZVFHMIN64-NEXT: .cfi_restore s8 3376; ZVFHMIN64-NEXT: .cfi_restore s9 3377; ZVFHMIN64-NEXT: .cfi_restore s10 3378; ZVFHMIN64-NEXT: .cfi_restore s11 3379; ZVFHMIN64-NEXT: addi sp, sp, 896 3380; ZVFHMIN64-NEXT: .cfi_def_cfa_offset 0 3381; ZVFHMIN64-NEXT: ret 3382 %v = call <128 x i1> @llvm.vp.fcmp.v128f16(<128 x half> %va, <128 x half> %vb, metadata !"oeq", <128 x i1> %m, i32 %evl) 3383 ret <128 x i1> %v 3384} 3385 3386declare <7 x i1> @llvm.vp.fcmp.v7f64(<7 x double>, <7 x double>, metadata, <7 x i1>, i32) 3387 3388define <7 x i1> @fcmp_oeq_vv_v7f64(<7 x double> %va, <7 x double> %vb, <7 x i1> %m, i32 zeroext %evl) { 3389; CHECK-LABEL: fcmp_oeq_vv_v7f64: 3390; CHECK: # %bb.0: 3391; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma 3392; CHECK-NEXT: vmfeq.vv v16, v8, v12, v0.t 3393; CHECK-NEXT: vmv1r.v v0, v16 3394; CHECK-NEXT: ret 3395 %v = call <7 x i1> @llvm.vp.fcmp.v7f64(<7 x double> %va, <7 x double> %vb, metadata !"oeq", <7 x i1> %m, i32 %evl) 3396 ret <7 x i1> %v 3397} 3398 3399declare <8 x i1> @llvm.vp.fcmp.v8f64(<8 x double>, <8 x double>, metadata, <8 x i1>, i32) 3400 3401define <8 x i1> @fcmp_oeq_vv_v8f64(<8 x double> %va, <8 x double> %vb, <8 x i1> %m, i32 zeroext %evl) { 3402; CHECK-LABEL: fcmp_oeq_vv_v8f64: 3403; CHECK: # %bb.0: 3404; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma 3405; CHECK-NEXT: vmfeq.vv v16, v8, v12, v0.t 3406; CHECK-NEXT: vmv1r.v v0, v16 3407; CHECK-NEXT: ret 3408 %v = call <8 x i1> @llvm.vp.fcmp.v8f64(<8 x double> %va, <8 x double> %vb, metadata !"oeq", <8 x i1> %m, i32 %evl) 3409 ret <8 x i1> %v 3410} 3411 3412define <8 x i1> @fcmp_oeq_vf_v8f64(<8 x double> %va, double %b, <8 x i1> %m, i32 zeroext %evl) { 3413; CHECK-LABEL: fcmp_oeq_vf_v8f64: 3414; CHECK: # %bb.0: 3415; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma 3416; CHECK-NEXT: vmfeq.vf v12, v8, fa0, v0.t 3417; CHECK-NEXT: vmv1r.v v0, v12 3418; CHECK-NEXT: ret 3419 %elt.head = insertelement <8 x double> poison, double %b, i32 0 3420 %vb = shufflevector <8 x double> %elt.head, <8 x double> poison, <8 x i32> zeroinitializer 3421 %v = call <8 x i1> @llvm.vp.fcmp.v8f64(<8 x double> %va, <8 x double> %vb, metadata !"oeq", <8 x i1> %m, i32 %evl) 3422 ret <8 x i1> %v 3423} 3424 3425define <8 x i1> @fcmp_oeq_vf_swap_v8f64(<8 x double> %va, double %b, <8 x i1> %m, i32 zeroext %evl) { 3426; CHECK-LABEL: fcmp_oeq_vf_swap_v8f64: 3427; CHECK: # %bb.0: 3428; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma 3429; CHECK-NEXT: vmfeq.vf v12, v8, fa0, v0.t 3430; CHECK-NEXT: vmv1r.v v0, v12 3431; CHECK-NEXT: ret 3432 %elt.head = insertelement <8 x double> poison, double %b, i32 0 3433 %vb = shufflevector <8 x double> %elt.head, <8 x double> poison, <8 x i32> zeroinitializer 3434 %v = call <8 x i1> @llvm.vp.fcmp.v8f64(<8 x double> %vb, <8 x double> %va, metadata !"oeq", <8 x i1> %m, i32 %evl) 3435 ret <8 x i1> %v 3436} 3437 3438define <8 x i1> @fcmp_ogt_vv_v8f64(<8 x double> %va, <8 x double> %vb, <8 x i1> %m, i32 zeroext %evl) { 3439; CHECK-LABEL: fcmp_ogt_vv_v8f64: 3440; CHECK: # %bb.0: 3441; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma 3442; CHECK-NEXT: vmflt.vv v16, v12, v8, v0.t 3443; CHECK-NEXT: vmv1r.v v0, v16 3444; CHECK-NEXT: ret 3445 %v = call <8 x i1> @llvm.vp.fcmp.v8f64(<8 x double> %va, <8 x double> %vb, metadata !"ogt", <8 x i1> %m, i32 %evl) 3446 ret <8 x i1> %v 3447} 3448 3449define <8 x i1> @fcmp_ogt_vf_v8f64(<8 x double> %va, double %b, <8 x i1> %m, i32 zeroext %evl) { 3450; CHECK-LABEL: fcmp_ogt_vf_v8f64: 3451; CHECK: # %bb.0: 3452; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma 3453; CHECK-NEXT: vmfgt.vf v12, v8, fa0, v0.t 3454; CHECK-NEXT: vmv1r.v v0, v12 3455; CHECK-NEXT: ret 3456 %elt.head = insertelement <8 x double> poison, double %b, i32 0 3457 %vb = shufflevector <8 x double> %elt.head, <8 x double> poison, <8 x i32> zeroinitializer 3458 %v = call <8 x i1> @llvm.vp.fcmp.v8f64(<8 x double> %va, <8 x double> %vb, metadata !"ogt", <8 x i1> %m, i32 %evl) 3459 ret <8 x i1> %v 3460} 3461 3462define <8 x i1> @fcmp_ogt_vf_swap_v8f64(<8 x double> %va, double %b, <8 x i1> %m, i32 zeroext %evl) { 3463; CHECK-LABEL: fcmp_ogt_vf_swap_v8f64: 3464; CHECK: # %bb.0: 3465; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma 3466; CHECK-NEXT: vmflt.vf v12, v8, fa0, v0.t 3467; CHECK-NEXT: vmv1r.v v0, v12 3468; CHECK-NEXT: ret 3469 %elt.head = insertelement <8 x double> poison, double %b, i32 0 3470 %vb = shufflevector <8 x double> %elt.head, <8 x double> poison, <8 x i32> zeroinitializer 3471 %v = call <8 x i1> @llvm.vp.fcmp.v8f64(<8 x double> %vb, <8 x double> %va, metadata !"ogt", <8 x i1> %m, i32 %evl) 3472 ret <8 x i1> %v 3473} 3474 3475define <8 x i1> @fcmp_oge_vv_v8f64(<8 x double> %va, <8 x double> %vb, <8 x i1> %m, i32 zeroext %evl) { 3476; CHECK-LABEL: fcmp_oge_vv_v8f64: 3477; CHECK: # %bb.0: 3478; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma 3479; CHECK-NEXT: vmfle.vv v16, v12, v8, v0.t 3480; CHECK-NEXT: vmv1r.v v0, v16 3481; CHECK-NEXT: ret 3482 %v = call <8 x i1> @llvm.vp.fcmp.v8f64(<8 x double> %va, <8 x double> %vb, metadata !"oge", <8 x i1> %m, i32 %evl) 3483 ret <8 x i1> %v 3484} 3485 3486define <8 x i1> @fcmp_oge_vf_v8f64(<8 x double> %va, double %b, <8 x i1> %m, i32 zeroext %evl) { 3487; CHECK-LABEL: fcmp_oge_vf_v8f64: 3488; CHECK: # %bb.0: 3489; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma 3490; CHECK-NEXT: vmfge.vf v12, v8, fa0, v0.t 3491; CHECK-NEXT: vmv1r.v v0, v12 3492; CHECK-NEXT: ret 3493 %elt.head = insertelement <8 x double> poison, double %b, i32 0 3494 %vb = shufflevector <8 x double> %elt.head, <8 x double> poison, <8 x i32> zeroinitializer 3495 %v = call <8 x i1> @llvm.vp.fcmp.v8f64(<8 x double> %va, <8 x double> %vb, metadata !"oge", <8 x i1> %m, i32 %evl) 3496 ret <8 x i1> %v 3497} 3498 3499define <8 x i1> @fcmp_oge_vf_swap_v8f64(<8 x double> %va, double %b, <8 x i1> %m, i32 zeroext %evl) { 3500; CHECK-LABEL: fcmp_oge_vf_swap_v8f64: 3501; CHECK: # %bb.0: 3502; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma 3503; CHECK-NEXT: vmfle.vf v12, v8, fa0, v0.t 3504; CHECK-NEXT: vmv1r.v v0, v12 3505; CHECK-NEXT: ret 3506 %elt.head = insertelement <8 x double> poison, double %b, i32 0 3507 %vb = shufflevector <8 x double> %elt.head, <8 x double> poison, <8 x i32> zeroinitializer 3508 %v = call <8 x i1> @llvm.vp.fcmp.v8f64(<8 x double> %vb, <8 x double> %va, metadata !"oge", <8 x i1> %m, i32 %evl) 3509 ret <8 x i1> %v 3510} 3511 3512define <8 x i1> @fcmp_olt_vv_v8f64(<8 x double> %va, <8 x double> %vb, <8 x i1> %m, i32 zeroext %evl) { 3513; CHECK-LABEL: fcmp_olt_vv_v8f64: 3514; CHECK: # %bb.0: 3515; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma 3516; CHECK-NEXT: vmflt.vv v16, v8, v12, v0.t 3517; CHECK-NEXT: vmv1r.v v0, v16 3518; CHECK-NEXT: ret 3519 %v = call <8 x i1> @llvm.vp.fcmp.v8f64(<8 x double> %va, <8 x double> %vb, metadata !"olt", <8 x i1> %m, i32 %evl) 3520 ret <8 x i1> %v 3521} 3522 3523define <8 x i1> @fcmp_olt_vf_v8f64(<8 x double> %va, double %b, <8 x i1> %m, i32 zeroext %evl) { 3524; CHECK-LABEL: fcmp_olt_vf_v8f64: 3525; CHECK: # %bb.0: 3526; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma 3527; CHECK-NEXT: vmflt.vf v12, v8, fa0, v0.t 3528; CHECK-NEXT: vmv1r.v v0, v12 3529; CHECK-NEXT: ret 3530 %elt.head = insertelement <8 x double> poison, double %b, i32 0 3531 %vb = shufflevector <8 x double> %elt.head, <8 x double> poison, <8 x i32> zeroinitializer 3532 %v = call <8 x i1> @llvm.vp.fcmp.v8f64(<8 x double> %va, <8 x double> %vb, metadata !"olt", <8 x i1> %m, i32 %evl) 3533 ret <8 x i1> %v 3534} 3535 3536define <8 x i1> @fcmp_olt_vf_swap_v8f64(<8 x double> %va, double %b, <8 x i1> %m, i32 zeroext %evl) { 3537; CHECK-LABEL: fcmp_olt_vf_swap_v8f64: 3538; CHECK: # %bb.0: 3539; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma 3540; CHECK-NEXT: vmfgt.vf v12, v8, fa0, v0.t 3541; CHECK-NEXT: vmv1r.v v0, v12 3542; CHECK-NEXT: ret 3543 %elt.head = insertelement <8 x double> poison, double %b, i32 0 3544 %vb = shufflevector <8 x double> %elt.head, <8 x double> poison, <8 x i32> zeroinitializer 3545 %v = call <8 x i1> @llvm.vp.fcmp.v8f64(<8 x double> %vb, <8 x double> %va, metadata !"olt", <8 x i1> %m, i32 %evl) 3546 ret <8 x i1> %v 3547} 3548 3549define <8 x i1> @fcmp_ole_vv_v8f64(<8 x double> %va, <8 x double> %vb, <8 x i1> %m, i32 zeroext %evl) { 3550; CHECK-LABEL: fcmp_ole_vv_v8f64: 3551; CHECK: # %bb.0: 3552; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma 3553; CHECK-NEXT: vmfle.vv v16, v8, v12, v0.t 3554; CHECK-NEXT: vmv1r.v v0, v16 3555; CHECK-NEXT: ret 3556 %v = call <8 x i1> @llvm.vp.fcmp.v8f64(<8 x double> %va, <8 x double> %vb, metadata !"ole", <8 x i1> %m, i32 %evl) 3557 ret <8 x i1> %v 3558} 3559 3560define <8 x i1> @fcmp_ole_vf_v8f64(<8 x double> %va, double %b, <8 x i1> %m, i32 zeroext %evl) { 3561; CHECK-LABEL: fcmp_ole_vf_v8f64: 3562; CHECK: # %bb.0: 3563; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma 3564; CHECK-NEXT: vmfle.vf v12, v8, fa0, v0.t 3565; CHECK-NEXT: vmv1r.v v0, v12 3566; CHECK-NEXT: ret 3567 %elt.head = insertelement <8 x double> poison, double %b, i32 0 3568 %vb = shufflevector <8 x double> %elt.head, <8 x double> poison, <8 x i32> zeroinitializer 3569 %v = call <8 x i1> @llvm.vp.fcmp.v8f64(<8 x double> %va, <8 x double> %vb, metadata !"ole", <8 x i1> %m, i32 %evl) 3570 ret <8 x i1> %v 3571} 3572 3573define <8 x i1> @fcmp_ole_vf_swap_v8f64(<8 x double> %va, double %b, <8 x i1> %m, i32 zeroext %evl) { 3574; CHECK-LABEL: fcmp_ole_vf_swap_v8f64: 3575; CHECK: # %bb.0: 3576; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma 3577; CHECK-NEXT: vmfge.vf v12, v8, fa0, v0.t 3578; CHECK-NEXT: vmv1r.v v0, v12 3579; CHECK-NEXT: ret 3580 %elt.head = insertelement <8 x double> poison, double %b, i32 0 3581 %vb = shufflevector <8 x double> %elt.head, <8 x double> poison, <8 x i32> zeroinitializer 3582 %v = call <8 x i1> @llvm.vp.fcmp.v8f64(<8 x double> %vb, <8 x double> %va, metadata !"ole", <8 x i1> %m, i32 %evl) 3583 ret <8 x i1> %v 3584} 3585 3586define <8 x i1> @fcmp_one_vv_v8f64(<8 x double> %va, <8 x double> %vb, <8 x i1> %m, i32 zeroext %evl) { 3587; CHECK-LABEL: fcmp_one_vv_v8f64: 3588; CHECK: # %bb.0: 3589; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma 3590; CHECK-NEXT: vmflt.vv v16, v8, v12, v0.t 3591; CHECK-NEXT: vmflt.vv v17, v12, v8, v0.t 3592; CHECK-NEXT: vmor.mm v0, v17, v16 3593; CHECK-NEXT: ret 3594 %v = call <8 x i1> @llvm.vp.fcmp.v8f64(<8 x double> %va, <8 x double> %vb, metadata !"one", <8 x i1> %m, i32 %evl) 3595 ret <8 x i1> %v 3596} 3597 3598define <8 x i1> @fcmp_one_vf_v8f64(<8 x double> %va, double %b, <8 x i1> %m, i32 zeroext %evl) { 3599; CHECK-LABEL: fcmp_one_vf_v8f64: 3600; CHECK: # %bb.0: 3601; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma 3602; CHECK-NEXT: vmflt.vf v12, v8, fa0, v0.t 3603; CHECK-NEXT: vmfgt.vf v13, v8, fa0, v0.t 3604; CHECK-NEXT: vmor.mm v0, v13, v12 3605; CHECK-NEXT: ret 3606 %elt.head = insertelement <8 x double> poison, double %b, i32 0 3607 %vb = shufflevector <8 x double> %elt.head, <8 x double> poison, <8 x i32> zeroinitializer 3608 %v = call <8 x i1> @llvm.vp.fcmp.v8f64(<8 x double> %va, <8 x double> %vb, metadata !"one", <8 x i1> %m, i32 %evl) 3609 ret <8 x i1> %v 3610} 3611 3612define <8 x i1> @fcmp_one_vf_swap_v8f64(<8 x double> %va, double %b, <8 x i1> %m, i32 zeroext %evl) { 3613; CHECK-LABEL: fcmp_one_vf_swap_v8f64: 3614; CHECK: # %bb.0: 3615; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma 3616; CHECK-NEXT: vmfgt.vf v12, v8, fa0, v0.t 3617; CHECK-NEXT: vmflt.vf v13, v8, fa0, v0.t 3618; CHECK-NEXT: vmor.mm v0, v13, v12 3619; CHECK-NEXT: ret 3620 %elt.head = insertelement <8 x double> poison, double %b, i32 0 3621 %vb = shufflevector <8 x double> %elt.head, <8 x double> poison, <8 x i32> zeroinitializer 3622 %v = call <8 x i1> @llvm.vp.fcmp.v8f64(<8 x double> %vb, <8 x double> %va, metadata !"one", <8 x i1> %m, i32 %evl) 3623 ret <8 x i1> %v 3624} 3625 3626define <8 x i1> @fcmp_ord_vv_v8f64(<8 x double> %va, <8 x double> %vb, <8 x i1> %m, i32 zeroext %evl) { 3627; CHECK-LABEL: fcmp_ord_vv_v8f64: 3628; CHECK: # %bb.0: 3629; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma 3630; CHECK-NEXT: vmfeq.vv v16, v12, v12, v0.t 3631; CHECK-NEXT: vmfeq.vv v12, v8, v8, v0.t 3632; CHECK-NEXT: vmand.mm v0, v12, v16 3633; CHECK-NEXT: ret 3634 %v = call <8 x i1> @llvm.vp.fcmp.v8f64(<8 x double> %va, <8 x double> %vb, metadata !"ord", <8 x i1> %m, i32 %evl) 3635 ret <8 x i1> %v 3636} 3637 3638define <8 x i1> @fcmp_ord_vf_v8f64(<8 x double> %va, double %b, <8 x i1> %m, i32 zeroext %evl) { 3639; CHECK-LABEL: fcmp_ord_vf_v8f64: 3640; CHECK: # %bb.0: 3641; CHECK-NEXT: vsetivli zero, 8, e64, m4, ta, ma 3642; CHECK-NEXT: vfmv.v.f v12, fa0 3643; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma 3644; CHECK-NEXT: vmfeq.vf v16, v12, fa0, v0.t 3645; CHECK-NEXT: vmfeq.vv v12, v8, v8, v0.t 3646; CHECK-NEXT: vmand.mm v0, v12, v16 3647; CHECK-NEXT: ret 3648 %elt.head = insertelement <8 x double> poison, double %b, i32 0 3649 %vb = shufflevector <8 x double> %elt.head, <8 x double> poison, <8 x i32> zeroinitializer 3650 %v = call <8 x i1> @llvm.vp.fcmp.v8f64(<8 x double> %va, <8 x double> %vb, metadata !"ord", <8 x i1> %m, i32 %evl) 3651 ret <8 x i1> %v 3652} 3653 3654define <8 x i1> @fcmp_ord_vf_swap_v8f64(<8 x double> %va, double %b, <8 x i1> %m, i32 zeroext %evl) { 3655; CHECK-LABEL: fcmp_ord_vf_swap_v8f64: 3656; CHECK: # %bb.0: 3657; CHECK-NEXT: vsetivli zero, 8, e64, m4, ta, ma 3658; CHECK-NEXT: vfmv.v.f v12, fa0 3659; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma 3660; CHECK-NEXT: vmfeq.vf v16, v12, fa0, v0.t 3661; CHECK-NEXT: vmfeq.vv v12, v8, v8, v0.t 3662; CHECK-NEXT: vmand.mm v0, v16, v12 3663; CHECK-NEXT: ret 3664 %elt.head = insertelement <8 x double> poison, double %b, i32 0 3665 %vb = shufflevector <8 x double> %elt.head, <8 x double> poison, <8 x i32> zeroinitializer 3666 %v = call <8 x i1> @llvm.vp.fcmp.v8f64(<8 x double> %vb, <8 x double> %va, metadata !"ord", <8 x i1> %m, i32 %evl) 3667 ret <8 x i1> %v 3668} 3669 3670define <8 x i1> @fcmp_ueq_vv_v8f64(<8 x double> %va, <8 x double> %vb, <8 x i1> %m, i32 zeroext %evl) { 3671; CHECK-LABEL: fcmp_ueq_vv_v8f64: 3672; CHECK: # %bb.0: 3673; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma 3674; CHECK-NEXT: vmflt.vv v16, v8, v12, v0.t 3675; CHECK-NEXT: vmflt.vv v17, v12, v8, v0.t 3676; CHECK-NEXT: vmnor.mm v0, v17, v16 3677; CHECK-NEXT: ret 3678 %v = call <8 x i1> @llvm.vp.fcmp.v8f64(<8 x double> %va, <8 x double> %vb, metadata !"ueq", <8 x i1> %m, i32 %evl) 3679 ret <8 x i1> %v 3680} 3681 3682define <8 x i1> @fcmp_ueq_vf_v8f64(<8 x double> %va, double %b, <8 x i1> %m, i32 zeroext %evl) { 3683; CHECK-LABEL: fcmp_ueq_vf_v8f64: 3684; CHECK: # %bb.0: 3685; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma 3686; CHECK-NEXT: vmflt.vf v12, v8, fa0, v0.t 3687; CHECK-NEXT: vmfgt.vf v13, v8, fa0, v0.t 3688; CHECK-NEXT: vmnor.mm v0, v13, v12 3689; CHECK-NEXT: ret 3690 %elt.head = insertelement <8 x double> poison, double %b, i32 0 3691 %vb = shufflevector <8 x double> %elt.head, <8 x double> poison, <8 x i32> zeroinitializer 3692 %v = call <8 x i1> @llvm.vp.fcmp.v8f64(<8 x double> %va, <8 x double> %vb, metadata !"ueq", <8 x i1> %m, i32 %evl) 3693 ret <8 x i1> %v 3694} 3695 3696define <8 x i1> @fcmp_ueq_vf_swap_v8f64(<8 x double> %va, double %b, <8 x i1> %m, i32 zeroext %evl) { 3697; CHECK-LABEL: fcmp_ueq_vf_swap_v8f64: 3698; CHECK: # %bb.0: 3699; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma 3700; CHECK-NEXT: vmfgt.vf v12, v8, fa0, v0.t 3701; CHECK-NEXT: vmflt.vf v13, v8, fa0, v0.t 3702; CHECK-NEXT: vmnor.mm v0, v13, v12 3703; CHECK-NEXT: ret 3704 %elt.head = insertelement <8 x double> poison, double %b, i32 0 3705 %vb = shufflevector <8 x double> %elt.head, <8 x double> poison, <8 x i32> zeroinitializer 3706 %v = call <8 x i1> @llvm.vp.fcmp.v8f64(<8 x double> %vb, <8 x double> %va, metadata !"ueq", <8 x i1> %m, i32 %evl) 3707 ret <8 x i1> %v 3708} 3709 3710define <8 x i1> @fcmp_ugt_vv_v8f64(<8 x double> %va, <8 x double> %vb, <8 x i1> %m, i32 zeroext %evl) { 3711; CHECK-LABEL: fcmp_ugt_vv_v8f64: 3712; CHECK: # %bb.0: 3713; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma 3714; CHECK-NEXT: vmfle.vv v16, v8, v12, v0.t 3715; CHECK-NEXT: vmnot.m v0, v16 3716; CHECK-NEXT: ret 3717 %v = call <8 x i1> @llvm.vp.fcmp.v8f64(<8 x double> %va, <8 x double> %vb, metadata !"ugt", <8 x i1> %m, i32 %evl) 3718 ret <8 x i1> %v 3719} 3720 3721define <8 x i1> @fcmp_ugt_vf_v8f64(<8 x double> %va, double %b, <8 x i1> %m, i32 zeroext %evl) { 3722; CHECK-LABEL: fcmp_ugt_vf_v8f64: 3723; CHECK: # %bb.0: 3724; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma 3725; CHECK-NEXT: vmfle.vf v12, v8, fa0, v0.t 3726; CHECK-NEXT: vmnot.m v0, v12 3727; CHECK-NEXT: ret 3728 %elt.head = insertelement <8 x double> poison, double %b, i32 0 3729 %vb = shufflevector <8 x double> %elt.head, <8 x double> poison, <8 x i32> zeroinitializer 3730 %v = call <8 x i1> @llvm.vp.fcmp.v8f64(<8 x double> %va, <8 x double> %vb, metadata !"ugt", <8 x i1> %m, i32 %evl) 3731 ret <8 x i1> %v 3732} 3733 3734define <8 x i1> @fcmp_ugt_vf_swap_v8f64(<8 x double> %va, double %b, <8 x i1> %m, i32 zeroext %evl) { 3735; CHECK-LABEL: fcmp_ugt_vf_swap_v8f64: 3736; CHECK: # %bb.0: 3737; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma 3738; CHECK-NEXT: vmfge.vf v12, v8, fa0, v0.t 3739; CHECK-NEXT: vmnot.m v0, v12 3740; CHECK-NEXT: ret 3741 %elt.head = insertelement <8 x double> poison, double %b, i32 0 3742 %vb = shufflevector <8 x double> %elt.head, <8 x double> poison, <8 x i32> zeroinitializer 3743 %v = call <8 x i1> @llvm.vp.fcmp.v8f64(<8 x double> %vb, <8 x double> %va, metadata !"ugt", <8 x i1> %m, i32 %evl) 3744 ret <8 x i1> %v 3745} 3746 3747define <8 x i1> @fcmp_uge_vv_v8f64(<8 x double> %va, <8 x double> %vb, <8 x i1> %m, i32 zeroext %evl) { 3748; CHECK-LABEL: fcmp_uge_vv_v8f64: 3749; CHECK: # %bb.0: 3750; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma 3751; CHECK-NEXT: vmflt.vv v16, v8, v12, v0.t 3752; CHECK-NEXT: vmnot.m v0, v16 3753; CHECK-NEXT: ret 3754 %v = call <8 x i1> @llvm.vp.fcmp.v8f64(<8 x double> %va, <8 x double> %vb, metadata !"uge", <8 x i1> %m, i32 %evl) 3755 ret <8 x i1> %v 3756} 3757 3758define <8 x i1> @fcmp_uge_vf_v8f64(<8 x double> %va, double %b, <8 x i1> %m, i32 zeroext %evl) { 3759; CHECK-LABEL: fcmp_uge_vf_v8f64: 3760; CHECK: # %bb.0: 3761; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma 3762; CHECK-NEXT: vmflt.vf v12, v8, fa0, v0.t 3763; CHECK-NEXT: vmnot.m v0, v12 3764; CHECK-NEXT: ret 3765 %elt.head = insertelement <8 x double> poison, double %b, i32 0 3766 %vb = shufflevector <8 x double> %elt.head, <8 x double> poison, <8 x i32> zeroinitializer 3767 %v = call <8 x i1> @llvm.vp.fcmp.v8f64(<8 x double> %va, <8 x double> %vb, metadata !"uge", <8 x i1> %m, i32 %evl) 3768 ret <8 x i1> %v 3769} 3770 3771define <8 x i1> @fcmp_uge_vf_swap_v8f64(<8 x double> %va, double %b, <8 x i1> %m, i32 zeroext %evl) { 3772; CHECK-LABEL: fcmp_uge_vf_swap_v8f64: 3773; CHECK: # %bb.0: 3774; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma 3775; CHECK-NEXT: vmfgt.vf v12, v8, fa0, v0.t 3776; CHECK-NEXT: vmnot.m v0, v12 3777; CHECK-NEXT: ret 3778 %elt.head = insertelement <8 x double> poison, double %b, i32 0 3779 %vb = shufflevector <8 x double> %elt.head, <8 x double> poison, <8 x i32> zeroinitializer 3780 %v = call <8 x i1> @llvm.vp.fcmp.v8f64(<8 x double> %vb, <8 x double> %va, metadata !"uge", <8 x i1> %m, i32 %evl) 3781 ret <8 x i1> %v 3782} 3783 3784define <8 x i1> @fcmp_ult_vv_v8f64(<8 x double> %va, <8 x double> %vb, <8 x i1> %m, i32 zeroext %evl) { 3785; CHECK-LABEL: fcmp_ult_vv_v8f64: 3786; CHECK: # %bb.0: 3787; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma 3788; CHECK-NEXT: vmfle.vv v16, v12, v8, v0.t 3789; CHECK-NEXT: vmnot.m v0, v16 3790; CHECK-NEXT: ret 3791 %v = call <8 x i1> @llvm.vp.fcmp.v8f64(<8 x double> %va, <8 x double> %vb, metadata !"ult", <8 x i1> %m, i32 %evl) 3792 ret <8 x i1> %v 3793} 3794 3795define <8 x i1> @fcmp_ult_vf_v8f64(<8 x double> %va, double %b, <8 x i1> %m, i32 zeroext %evl) { 3796; CHECK-LABEL: fcmp_ult_vf_v8f64: 3797; CHECK: # %bb.0: 3798; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma 3799; CHECK-NEXT: vmfge.vf v12, v8, fa0, v0.t 3800; CHECK-NEXT: vmnot.m v0, v12 3801; CHECK-NEXT: ret 3802 %elt.head = insertelement <8 x double> poison, double %b, i32 0 3803 %vb = shufflevector <8 x double> %elt.head, <8 x double> poison, <8 x i32> zeroinitializer 3804 %v = call <8 x i1> @llvm.vp.fcmp.v8f64(<8 x double> %va, <8 x double> %vb, metadata !"ult", <8 x i1> %m, i32 %evl) 3805 ret <8 x i1> %v 3806} 3807 3808define <8 x i1> @fcmp_ult_vf_swap_v8f64(<8 x double> %va, double %b, <8 x i1> %m, i32 zeroext %evl) { 3809; CHECK-LABEL: fcmp_ult_vf_swap_v8f64: 3810; CHECK: # %bb.0: 3811; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma 3812; CHECK-NEXT: vmfle.vf v12, v8, fa0, v0.t 3813; CHECK-NEXT: vmnot.m v0, v12 3814; CHECK-NEXT: ret 3815 %elt.head = insertelement <8 x double> poison, double %b, i32 0 3816 %vb = shufflevector <8 x double> %elt.head, <8 x double> poison, <8 x i32> zeroinitializer 3817 %v = call <8 x i1> @llvm.vp.fcmp.v8f64(<8 x double> %vb, <8 x double> %va, metadata !"ult", <8 x i1> %m, i32 %evl) 3818 ret <8 x i1> %v 3819} 3820 3821define <8 x i1> @fcmp_ule_vv_v8f64(<8 x double> %va, <8 x double> %vb, <8 x i1> %m, i32 zeroext %evl) { 3822; CHECK-LABEL: fcmp_ule_vv_v8f64: 3823; CHECK: # %bb.0: 3824; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma 3825; CHECK-NEXT: vmflt.vv v16, v12, v8, v0.t 3826; CHECK-NEXT: vmnot.m v0, v16 3827; CHECK-NEXT: ret 3828 %v = call <8 x i1> @llvm.vp.fcmp.v8f64(<8 x double> %va, <8 x double> %vb, metadata !"ule", <8 x i1> %m, i32 %evl) 3829 ret <8 x i1> %v 3830} 3831 3832define <8 x i1> @fcmp_ule_vf_v8f64(<8 x double> %va, double %b, <8 x i1> %m, i32 zeroext %evl) { 3833; CHECK-LABEL: fcmp_ule_vf_v8f64: 3834; CHECK: # %bb.0: 3835; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma 3836; CHECK-NEXT: vmfgt.vf v12, v8, fa0, v0.t 3837; CHECK-NEXT: vmnot.m v0, v12 3838; CHECK-NEXT: ret 3839 %elt.head = insertelement <8 x double> poison, double %b, i32 0 3840 %vb = shufflevector <8 x double> %elt.head, <8 x double> poison, <8 x i32> zeroinitializer 3841 %v = call <8 x i1> @llvm.vp.fcmp.v8f64(<8 x double> %va, <8 x double> %vb, metadata !"ule", <8 x i1> %m, i32 %evl) 3842 ret <8 x i1> %v 3843} 3844 3845define <8 x i1> @fcmp_ule_vf_swap_v8f64(<8 x double> %va, double %b, <8 x i1> %m, i32 zeroext %evl) { 3846; CHECK-LABEL: fcmp_ule_vf_swap_v8f64: 3847; CHECK: # %bb.0: 3848; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma 3849; CHECK-NEXT: vmflt.vf v12, v8, fa0, v0.t 3850; CHECK-NEXT: vmnot.m v0, v12 3851; CHECK-NEXT: ret 3852 %elt.head = insertelement <8 x double> poison, double %b, i32 0 3853 %vb = shufflevector <8 x double> %elt.head, <8 x double> poison, <8 x i32> zeroinitializer 3854 %v = call <8 x i1> @llvm.vp.fcmp.v8f64(<8 x double> %vb, <8 x double> %va, metadata !"ule", <8 x i1> %m, i32 %evl) 3855 ret <8 x i1> %v 3856} 3857 3858define <8 x i1> @fcmp_une_vv_v8f64(<8 x double> %va, <8 x double> %vb, <8 x i1> %m, i32 zeroext %evl) { 3859; CHECK-LABEL: fcmp_une_vv_v8f64: 3860; CHECK: # %bb.0: 3861; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma 3862; CHECK-NEXT: vmfne.vv v16, v8, v12, v0.t 3863; CHECK-NEXT: vmv1r.v v0, v16 3864; CHECK-NEXT: ret 3865 %v = call <8 x i1> @llvm.vp.fcmp.v8f64(<8 x double> %va, <8 x double> %vb, metadata !"une", <8 x i1> %m, i32 %evl) 3866 ret <8 x i1> %v 3867} 3868 3869define <8 x i1> @fcmp_une_vf_v8f64(<8 x double> %va, double %b, <8 x i1> %m, i32 zeroext %evl) { 3870; CHECK-LABEL: fcmp_une_vf_v8f64: 3871; CHECK: # %bb.0: 3872; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma 3873; CHECK-NEXT: vmfne.vf v12, v8, fa0, v0.t 3874; CHECK-NEXT: vmv1r.v v0, v12 3875; CHECK-NEXT: ret 3876 %elt.head = insertelement <8 x double> poison, double %b, i32 0 3877 %vb = shufflevector <8 x double> %elt.head, <8 x double> poison, <8 x i32> zeroinitializer 3878 %v = call <8 x i1> @llvm.vp.fcmp.v8f64(<8 x double> %va, <8 x double> %vb, metadata !"une", <8 x i1> %m, i32 %evl) 3879 ret <8 x i1> %v 3880} 3881 3882define <8 x i1> @fcmp_une_vf_swap_v8f64(<8 x double> %va, double %b, <8 x i1> %m, i32 zeroext %evl) { 3883; CHECK-LABEL: fcmp_une_vf_swap_v8f64: 3884; CHECK: # %bb.0: 3885; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma 3886; CHECK-NEXT: vmfne.vf v12, v8, fa0, v0.t 3887; CHECK-NEXT: vmv1r.v v0, v12 3888; CHECK-NEXT: ret 3889 %elt.head = insertelement <8 x double> poison, double %b, i32 0 3890 %vb = shufflevector <8 x double> %elt.head, <8 x double> poison, <8 x i32> zeroinitializer 3891 %v = call <8 x i1> @llvm.vp.fcmp.v8f64(<8 x double> %vb, <8 x double> %va, metadata !"une", <8 x i1> %m, i32 %evl) 3892 ret <8 x i1> %v 3893} 3894 3895define <8 x i1> @fcmp_uno_vv_v8f64(<8 x double> %va, <8 x double> %vb, <8 x i1> %m, i32 zeroext %evl) { 3896; CHECK-LABEL: fcmp_uno_vv_v8f64: 3897; CHECK: # %bb.0: 3898; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma 3899; CHECK-NEXT: vmfne.vv v16, v12, v12, v0.t 3900; CHECK-NEXT: vmfne.vv v12, v8, v8, v0.t 3901; CHECK-NEXT: vmor.mm v0, v12, v16 3902; CHECK-NEXT: ret 3903 %v = call <8 x i1> @llvm.vp.fcmp.v8f64(<8 x double> %va, <8 x double> %vb, metadata !"uno", <8 x i1> %m, i32 %evl) 3904 ret <8 x i1> %v 3905} 3906 3907define <8 x i1> @fcmp_uno_vf_v8f64(<8 x double> %va, double %b, <8 x i1> %m, i32 zeroext %evl) { 3908; CHECK-LABEL: fcmp_uno_vf_v8f64: 3909; CHECK: # %bb.0: 3910; CHECK-NEXT: vsetivli zero, 8, e64, m4, ta, ma 3911; CHECK-NEXT: vfmv.v.f v12, fa0 3912; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma 3913; CHECK-NEXT: vmfne.vf v16, v12, fa0, v0.t 3914; CHECK-NEXT: vmfne.vv v12, v8, v8, v0.t 3915; CHECK-NEXT: vmor.mm v0, v12, v16 3916; CHECK-NEXT: ret 3917 %elt.head = insertelement <8 x double> poison, double %b, i32 0 3918 %vb = shufflevector <8 x double> %elt.head, <8 x double> poison, <8 x i32> zeroinitializer 3919 %v = call <8 x i1> @llvm.vp.fcmp.v8f64(<8 x double> %va, <8 x double> %vb, metadata !"uno", <8 x i1> %m, i32 %evl) 3920 ret <8 x i1> %v 3921} 3922 3923define <8 x i1> @fcmp_uno_vf_swap_v8f64(<8 x double> %va, double %b, <8 x i1> %m, i32 zeroext %evl) { 3924; CHECK-LABEL: fcmp_uno_vf_swap_v8f64: 3925; CHECK: # %bb.0: 3926; CHECK-NEXT: vsetivli zero, 8, e64, m4, ta, ma 3927; CHECK-NEXT: vfmv.v.f v12, fa0 3928; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma 3929; CHECK-NEXT: vmfne.vf v16, v12, fa0, v0.t 3930; CHECK-NEXT: vmfne.vv v12, v8, v8, v0.t 3931; CHECK-NEXT: vmor.mm v0, v16, v12 3932; CHECK-NEXT: ret 3933 %elt.head = insertelement <8 x double> poison, double %b, i32 0 3934 %vb = shufflevector <8 x double> %elt.head, <8 x double> poison, <8 x i32> zeroinitializer 3935 %v = call <8 x i1> @llvm.vp.fcmp.v8f64(<8 x double> %vb, <8 x double> %va, metadata !"uno", <8 x i1> %m, i32 %evl) 3936 ret <8 x i1> %v 3937} 3938 3939declare <32 x i1> @llvm.vp.fcmp.v32f64(<32 x double>, <32 x double>, metadata, <32 x i1>, i32) 3940 3941define <32 x i1> @fcmp_oeq_vv_v32f64(<32 x double> %va, <32 x double> %vb, <32 x i1> %m, i32 zeroext %evl) { 3942; CHECK-LABEL: fcmp_oeq_vv_v32f64: 3943; CHECK: # %bb.0: 3944; CHECK-NEXT: addi sp, sp, -16 3945; CHECK-NEXT: .cfi_def_cfa_offset 16 3946; CHECK-NEXT: csrr a1, vlenb 3947; CHECK-NEXT: slli a1, a1, 4 3948; CHECK-NEXT: sub sp, sp, a1 3949; CHECK-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x10, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 16 * vlenb 3950; CHECK-NEXT: csrr a1, vlenb 3951; CHECK-NEXT: slli a1, a1, 3 3952; CHECK-NEXT: add a1, sp, a1 3953; CHECK-NEXT: addi a1, a1, 16 3954; CHECK-NEXT: vs8r.v v16, (a1) # Unknown-size Folded Spill 3955; CHECK-NEXT: addi a1, a0, 128 3956; CHECK-NEXT: vsetivli zero, 16, e64, m8, ta, ma 3957; CHECK-NEXT: vle64.v v16, (a1) 3958; CHECK-NEXT: addi a1, sp, 16 3959; CHECK-NEXT: vs8r.v v16, (a1) # Unknown-size Folded Spill 3960; CHECK-NEXT: vle64.v v16, (a0) 3961; CHECK-NEXT: li a1, 16 3962; CHECK-NEXT: mv a0, a2 3963; CHECK-NEXT: vsetivli zero, 2, e8, mf4, ta, ma 3964; CHECK-NEXT: vslidedown.vi v24, v0, 2 3965; CHECK-NEXT: bltu a2, a1, .LBB87_2 3966; CHECK-NEXT: # %bb.1: 3967; CHECK-NEXT: li a0, 16 3968; CHECK-NEXT: .LBB87_2: 3969; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma 3970; CHECK-NEXT: vmfeq.vv v7, v8, v16, v0.t 3971; CHECK-NEXT: addi a0, a2, -16 3972; CHECK-NEXT: sltu a1, a2, a0 3973; CHECK-NEXT: addi a1, a1, -1 3974; CHECK-NEXT: and a0, a1, a0 3975; CHECK-NEXT: vmv1r.v v0, v24 3976; CHECK-NEXT: csrr a1, vlenb 3977; CHECK-NEXT: slli a1, a1, 3 3978; CHECK-NEXT: add a1, sp, a1 3979; CHECK-NEXT: addi a1, a1, 16 3980; CHECK-NEXT: vl8r.v v16, (a1) # Unknown-size Folded Reload 3981; CHECK-NEXT: addi a1, sp, 16 3982; CHECK-NEXT: vl8r.v v24, (a1) # Unknown-size Folded Reload 3983; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma 3984; CHECK-NEXT: vmfeq.vv v8, v16, v24, v0.t 3985; CHECK-NEXT: vsetivli zero, 4, e8, mf4, ta, ma 3986; CHECK-NEXT: vslideup.vi v7, v8, 2 3987; CHECK-NEXT: vmv1r.v v0, v7 3988; CHECK-NEXT: csrr a0, vlenb 3989; CHECK-NEXT: slli a0, a0, 4 3990; CHECK-NEXT: add sp, sp, a0 3991; CHECK-NEXT: .cfi_def_cfa sp, 16 3992; CHECK-NEXT: addi sp, sp, 16 3993; CHECK-NEXT: .cfi_def_cfa_offset 0 3994; CHECK-NEXT: ret 3995 %v = call <32 x i1> @llvm.vp.fcmp.v32f64(<32 x double> %va, <32 x double> %vb, metadata !"oeq", <32 x i1> %m, i32 %evl) 3996 ret <32 x i1> %v 3997} 3998;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line: 3999; ZVFH32: {{.*}} 4000; ZVFH64: {{.*}} 4001