xref: /llvm-project/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-nearbyint-vp.ll (revision b6c0f1bfa79a3a32d841ac5ab1f94c3aee3b5d90) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=riscv32 -mattr=+d,+zvfh,+v -target-abi=ilp32d \
3; RUN:   -verify-machineinstrs < %s | FileCheck %s
4; RUN: llc -mtriple=riscv64 -mattr=+d,+zvfh,+v -target-abi=lp64d \
5; RUN:   -verify-machineinstrs < %s | FileCheck %s
6
7declare <2 x half> @llvm.vp.nearbyint.v2f16(<2 x half>, <2 x i1>, i32)
8
9define <2 x half> @vp_nearbyint_v2f16(<2 x half> %va, <2 x i1> %m, i32 zeroext %evl) {
10; CHECK-LABEL: vp_nearbyint_v2f16:
11; CHECK:       # %bb.0:
12; CHECK-NEXT:    lui a1, %hi(.LCPI0_0)
13; CHECK-NEXT:    flh fa5, %lo(.LCPI0_0)(a1)
14; CHECK-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
15; CHECK-NEXT:    vfabs.v v9, v8, v0.t
16; CHECK-NEXT:    vsetvli zero, zero, e16, mf4, ta, mu
17; CHECK-NEXT:    vmflt.vf v0, v9, fa5, v0.t
18; CHECK-NEXT:    frflags a0
19; CHECK-NEXT:    vsetvli zero, zero, e16, mf4, ta, ma
20; CHECK-NEXT:    vfcvt.x.f.v v9, v8, v0.t
21; CHECK-NEXT:    vfcvt.f.x.v v9, v9, v0.t
22; CHECK-NEXT:    vsetvli zero, zero, e16, mf4, ta, mu
23; CHECK-NEXT:    vfsgnj.vv v8, v9, v8, v0.t
24; CHECK-NEXT:    fsflags a0
25; CHECK-NEXT:    ret
26  %v = call <2 x half> @llvm.vp.nearbyint.v2f16(<2 x half> %va, <2 x i1> %m, i32 %evl)
27  ret <2 x half> %v
28}
29
30define <2 x half> @vp_nearbyint_v2f16_unmasked(<2 x half> %va, i32 zeroext %evl) {
31; CHECK-LABEL: vp_nearbyint_v2f16_unmasked:
32; CHECK:       # %bb.0:
33; CHECK-NEXT:    lui a1, %hi(.LCPI1_0)
34; CHECK-NEXT:    flh fa5, %lo(.LCPI1_0)(a1)
35; CHECK-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
36; CHECK-NEXT:    vfabs.v v9, v8
37; CHECK-NEXT:    vmflt.vf v0, v9, fa5
38; CHECK-NEXT:    frflags a0
39; CHECK-NEXT:    vfcvt.x.f.v v9, v8, v0.t
40; CHECK-NEXT:    vfcvt.f.x.v v9, v9, v0.t
41; CHECK-NEXT:    vsetvli zero, zero, e16, mf4, ta, mu
42; CHECK-NEXT:    vfsgnj.vv v8, v9, v8, v0.t
43; CHECK-NEXT:    fsflags a0
44; CHECK-NEXT:    ret
45  %v = call <2 x half> @llvm.vp.nearbyint.v2f16(<2 x half> %va, <2 x i1> splat (i1 true), i32 %evl)
46  ret <2 x half> %v
47}
48
49declare <4 x half> @llvm.vp.nearbyint.v4f16(<4 x half>, <4 x i1>, i32)
50
51define <4 x half> @vp_nearbyint_v4f16(<4 x half> %va, <4 x i1> %m, i32 zeroext %evl) {
52; CHECK-LABEL: vp_nearbyint_v4f16:
53; CHECK:       # %bb.0:
54; CHECK-NEXT:    lui a1, %hi(.LCPI2_0)
55; CHECK-NEXT:    flh fa5, %lo(.LCPI2_0)(a1)
56; CHECK-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
57; CHECK-NEXT:    vfabs.v v9, v8, v0.t
58; CHECK-NEXT:    vsetvli zero, zero, e16, mf2, ta, mu
59; CHECK-NEXT:    vmflt.vf v0, v9, fa5, v0.t
60; CHECK-NEXT:    frflags a0
61; CHECK-NEXT:    vsetvli zero, zero, e16, mf2, ta, ma
62; CHECK-NEXT:    vfcvt.x.f.v v9, v8, v0.t
63; CHECK-NEXT:    vfcvt.f.x.v v9, v9, v0.t
64; CHECK-NEXT:    vsetvli zero, zero, e16, mf2, ta, mu
65; CHECK-NEXT:    vfsgnj.vv v8, v9, v8, v0.t
66; CHECK-NEXT:    fsflags a0
67; CHECK-NEXT:    ret
68  %v = call <4 x half> @llvm.vp.nearbyint.v4f16(<4 x half> %va, <4 x i1> %m, i32 %evl)
69  ret <4 x half> %v
70}
71
72define <4 x half> @vp_nearbyint_v4f16_unmasked(<4 x half> %va, i32 zeroext %evl) {
73; CHECK-LABEL: vp_nearbyint_v4f16_unmasked:
74; CHECK:       # %bb.0:
75; CHECK-NEXT:    lui a1, %hi(.LCPI3_0)
76; CHECK-NEXT:    flh fa5, %lo(.LCPI3_0)(a1)
77; CHECK-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
78; CHECK-NEXT:    vfabs.v v9, v8
79; CHECK-NEXT:    vmflt.vf v0, v9, fa5
80; CHECK-NEXT:    frflags a0
81; CHECK-NEXT:    vfcvt.x.f.v v9, v8, v0.t
82; CHECK-NEXT:    vfcvt.f.x.v v9, v9, v0.t
83; CHECK-NEXT:    vsetvli zero, zero, e16, mf2, ta, mu
84; CHECK-NEXT:    vfsgnj.vv v8, v9, v8, v0.t
85; CHECK-NEXT:    fsflags a0
86; CHECK-NEXT:    ret
87  %v = call <4 x half> @llvm.vp.nearbyint.v4f16(<4 x half> %va, <4 x i1> splat (i1 true), i32 %evl)
88  ret <4 x half> %v
89}
90
91declare <8 x half> @llvm.vp.nearbyint.v8f16(<8 x half>, <8 x i1>, i32)
92
93define <8 x half> @vp_nearbyint_v8f16(<8 x half> %va, <8 x i1> %m, i32 zeroext %evl) {
94; CHECK-LABEL: vp_nearbyint_v8f16:
95; CHECK:       # %bb.0:
96; CHECK-NEXT:    lui a1, %hi(.LCPI4_0)
97; CHECK-NEXT:    flh fa5, %lo(.LCPI4_0)(a1)
98; CHECK-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
99; CHECK-NEXT:    vfabs.v v9, v8, v0.t
100; CHECK-NEXT:    vsetvli zero, zero, e16, m1, ta, mu
101; CHECK-NEXT:    vmflt.vf v0, v9, fa5, v0.t
102; CHECK-NEXT:    frflags a0
103; CHECK-NEXT:    vsetvli zero, zero, e16, m1, ta, ma
104; CHECK-NEXT:    vfcvt.x.f.v v9, v8, v0.t
105; CHECK-NEXT:    vfcvt.f.x.v v9, v9, v0.t
106; CHECK-NEXT:    vsetvli zero, zero, e16, m1, ta, mu
107; CHECK-NEXT:    vfsgnj.vv v8, v9, v8, v0.t
108; CHECK-NEXT:    fsflags a0
109; CHECK-NEXT:    ret
110  %v = call <8 x half> @llvm.vp.nearbyint.v8f16(<8 x half> %va, <8 x i1> %m, i32 %evl)
111  ret <8 x half> %v
112}
113
114define <8 x half> @vp_nearbyint_v8f16_unmasked(<8 x half> %va, i32 zeroext %evl) {
115; CHECK-LABEL: vp_nearbyint_v8f16_unmasked:
116; CHECK:       # %bb.0:
117; CHECK-NEXT:    lui a1, %hi(.LCPI5_0)
118; CHECK-NEXT:    flh fa5, %lo(.LCPI5_0)(a1)
119; CHECK-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
120; CHECK-NEXT:    vfabs.v v9, v8
121; CHECK-NEXT:    vmflt.vf v0, v9, fa5
122; CHECK-NEXT:    frflags a0
123; CHECK-NEXT:    vfcvt.x.f.v v9, v8, v0.t
124; CHECK-NEXT:    vfcvt.f.x.v v9, v9, v0.t
125; CHECK-NEXT:    vsetvli zero, zero, e16, m1, ta, mu
126; CHECK-NEXT:    vfsgnj.vv v8, v9, v8, v0.t
127; CHECK-NEXT:    fsflags a0
128; CHECK-NEXT:    ret
129  %v = call <8 x half> @llvm.vp.nearbyint.v8f16(<8 x half> %va, <8 x i1> splat (i1 true), i32 %evl)
130  ret <8 x half> %v
131}
132
133declare <16 x half> @llvm.vp.nearbyint.v16f16(<16 x half>, <16 x i1>, i32)
134
135define <16 x half> @vp_nearbyint_v16f16(<16 x half> %va, <16 x i1> %m, i32 zeroext %evl) {
136; CHECK-LABEL: vp_nearbyint_v16f16:
137; CHECK:       # %bb.0:
138; CHECK-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
139; CHECK-NEXT:    vmv1r.v v10, v0
140; CHECK-NEXT:    lui a0, %hi(.LCPI6_0)
141; CHECK-NEXT:    flh fa5, %lo(.LCPI6_0)(a0)
142; CHECK-NEXT:    vfabs.v v12, v8, v0.t
143; CHECK-NEXT:    vsetvli zero, zero, e16, m2, ta, mu
144; CHECK-NEXT:    vmflt.vf v10, v12, fa5, v0.t
145; CHECK-NEXT:    frflags a0
146; CHECK-NEXT:    vmv1r.v v0, v10
147; CHECK-NEXT:    vsetvli zero, zero, e16, m2, ta, ma
148; CHECK-NEXT:    vfcvt.x.f.v v12, v8, v0.t
149; CHECK-NEXT:    vfcvt.f.x.v v12, v12, v0.t
150; CHECK-NEXT:    vsetvli zero, zero, e16, m2, ta, mu
151; CHECK-NEXT:    vfsgnj.vv v8, v12, v8, v0.t
152; CHECK-NEXT:    fsflags a0
153; CHECK-NEXT:    ret
154  %v = call <16 x half> @llvm.vp.nearbyint.v16f16(<16 x half> %va, <16 x i1> %m, i32 %evl)
155  ret <16 x half> %v
156}
157
158define <16 x half> @vp_nearbyint_v16f16_unmasked(<16 x half> %va, i32 zeroext %evl) {
159; CHECK-LABEL: vp_nearbyint_v16f16_unmasked:
160; CHECK:       # %bb.0:
161; CHECK-NEXT:    lui a1, %hi(.LCPI7_0)
162; CHECK-NEXT:    flh fa5, %lo(.LCPI7_0)(a1)
163; CHECK-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
164; CHECK-NEXT:    vfabs.v v10, v8
165; CHECK-NEXT:    vmflt.vf v0, v10, fa5
166; CHECK-NEXT:    frflags a0
167; CHECK-NEXT:    vfcvt.x.f.v v10, v8, v0.t
168; CHECK-NEXT:    vfcvt.f.x.v v10, v10, v0.t
169; CHECK-NEXT:    vsetvli zero, zero, e16, m2, ta, mu
170; CHECK-NEXT:    vfsgnj.vv v8, v10, v8, v0.t
171; CHECK-NEXT:    fsflags a0
172; CHECK-NEXT:    ret
173  %v = call <16 x half> @llvm.vp.nearbyint.v16f16(<16 x half> %va, <16 x i1> splat (i1 true), i32 %evl)
174  ret <16 x half> %v
175}
176
177declare <2 x float> @llvm.vp.nearbyint.v2f32(<2 x float>, <2 x i1>, i32)
178
179define <2 x float> @vp_nearbyint_v2f32(<2 x float> %va, <2 x i1> %m, i32 zeroext %evl) {
180; CHECK-LABEL: vp_nearbyint_v2f32:
181; CHECK:       # %bb.0:
182; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma
183; CHECK-NEXT:    vfabs.v v9, v8, v0.t
184; CHECK-NEXT:    lui a0, 307200
185; CHECK-NEXT:    fmv.w.x fa5, a0
186; CHECK-NEXT:    vsetvli zero, zero, e32, mf2, ta, mu
187; CHECK-NEXT:    vmflt.vf v0, v9, fa5, v0.t
188; CHECK-NEXT:    frflags a0
189; CHECK-NEXT:    vsetvli zero, zero, e32, mf2, ta, ma
190; CHECK-NEXT:    vfcvt.x.f.v v9, v8, v0.t
191; CHECK-NEXT:    vfcvt.f.x.v v9, v9, v0.t
192; CHECK-NEXT:    vsetvli zero, zero, e32, mf2, ta, mu
193; CHECK-NEXT:    vfsgnj.vv v8, v9, v8, v0.t
194; CHECK-NEXT:    fsflags a0
195; CHECK-NEXT:    ret
196  %v = call <2 x float> @llvm.vp.nearbyint.v2f32(<2 x float> %va, <2 x i1> %m, i32 %evl)
197  ret <2 x float> %v
198}
199
200define <2 x float> @vp_nearbyint_v2f32_unmasked(<2 x float> %va, i32 zeroext %evl) {
201; CHECK-LABEL: vp_nearbyint_v2f32_unmasked:
202; CHECK:       # %bb.0:
203; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma
204; CHECK-NEXT:    vfabs.v v9, v8
205; CHECK-NEXT:    lui a0, 307200
206; CHECK-NEXT:    fmv.w.x fa5, a0
207; CHECK-NEXT:    vmflt.vf v0, v9, fa5
208; CHECK-NEXT:    frflags a0
209; CHECK-NEXT:    vfcvt.x.f.v v9, v8, v0.t
210; CHECK-NEXT:    vfcvt.f.x.v v9, v9, v0.t
211; CHECK-NEXT:    vsetvli zero, zero, e32, mf2, ta, mu
212; CHECK-NEXT:    vfsgnj.vv v8, v9, v8, v0.t
213; CHECK-NEXT:    fsflags a0
214; CHECK-NEXT:    ret
215  %v = call <2 x float> @llvm.vp.nearbyint.v2f32(<2 x float> %va, <2 x i1> splat (i1 true), i32 %evl)
216  ret <2 x float> %v
217}
218
219declare <4 x float> @llvm.vp.nearbyint.v4f32(<4 x float>, <4 x i1>, i32)
220
221define <4 x float> @vp_nearbyint_v4f32(<4 x float> %va, <4 x i1> %m, i32 zeroext %evl) {
222; CHECK-LABEL: vp_nearbyint_v4f32:
223; CHECK:       # %bb.0:
224; CHECK-NEXT:    vsetvli zero, a0, e32, m1, ta, ma
225; CHECK-NEXT:    vfabs.v v9, v8, v0.t
226; CHECK-NEXT:    lui a0, 307200
227; CHECK-NEXT:    fmv.w.x fa5, a0
228; CHECK-NEXT:    vsetvli zero, zero, e32, m1, ta, mu
229; CHECK-NEXT:    vmflt.vf v0, v9, fa5, v0.t
230; CHECK-NEXT:    frflags a0
231; CHECK-NEXT:    vsetvli zero, zero, e32, m1, ta, ma
232; CHECK-NEXT:    vfcvt.x.f.v v9, v8, v0.t
233; CHECK-NEXT:    vfcvt.f.x.v v9, v9, v0.t
234; CHECK-NEXT:    vsetvli zero, zero, e32, m1, ta, mu
235; CHECK-NEXT:    vfsgnj.vv v8, v9, v8, v0.t
236; CHECK-NEXT:    fsflags a0
237; CHECK-NEXT:    ret
238  %v = call <4 x float> @llvm.vp.nearbyint.v4f32(<4 x float> %va, <4 x i1> %m, i32 %evl)
239  ret <4 x float> %v
240}
241
242define <4 x float> @vp_nearbyint_v4f32_unmasked(<4 x float> %va, i32 zeroext %evl) {
243; CHECK-LABEL: vp_nearbyint_v4f32_unmasked:
244; CHECK:       # %bb.0:
245; CHECK-NEXT:    vsetvli zero, a0, e32, m1, ta, ma
246; CHECK-NEXT:    vfabs.v v9, v8
247; CHECK-NEXT:    lui a0, 307200
248; CHECK-NEXT:    fmv.w.x fa5, a0
249; CHECK-NEXT:    vmflt.vf v0, v9, fa5
250; CHECK-NEXT:    frflags a0
251; CHECK-NEXT:    vfcvt.x.f.v v9, v8, v0.t
252; CHECK-NEXT:    vfcvt.f.x.v v9, v9, v0.t
253; CHECK-NEXT:    vsetvli zero, zero, e32, m1, ta, mu
254; CHECK-NEXT:    vfsgnj.vv v8, v9, v8, v0.t
255; CHECK-NEXT:    fsflags a0
256; CHECK-NEXT:    ret
257  %v = call <4 x float> @llvm.vp.nearbyint.v4f32(<4 x float> %va, <4 x i1> splat (i1 true), i32 %evl)
258  ret <4 x float> %v
259}
260
261declare <8 x float> @llvm.vp.nearbyint.v8f32(<8 x float>, <8 x i1>, i32)
262
263define <8 x float> @vp_nearbyint_v8f32(<8 x float> %va, <8 x i1> %m, i32 zeroext %evl) {
264; CHECK-LABEL: vp_nearbyint_v8f32:
265; CHECK:       # %bb.0:
266; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma
267; CHECK-NEXT:    vmv1r.v v10, v0
268; CHECK-NEXT:    vfabs.v v12, v8, v0.t
269; CHECK-NEXT:    lui a0, 307200
270; CHECK-NEXT:    fmv.w.x fa5, a0
271; CHECK-NEXT:    vsetvli zero, zero, e32, m2, ta, mu
272; CHECK-NEXT:    vmflt.vf v10, v12, fa5, v0.t
273; CHECK-NEXT:    frflags a0
274; CHECK-NEXT:    vmv1r.v v0, v10
275; CHECK-NEXT:    vsetvli zero, zero, e32, m2, ta, ma
276; CHECK-NEXT:    vfcvt.x.f.v v12, v8, v0.t
277; CHECK-NEXT:    vfcvt.f.x.v v12, v12, v0.t
278; CHECK-NEXT:    vsetvli zero, zero, e32, m2, ta, mu
279; CHECK-NEXT:    vfsgnj.vv v8, v12, v8, v0.t
280; CHECK-NEXT:    fsflags a0
281; CHECK-NEXT:    ret
282  %v = call <8 x float> @llvm.vp.nearbyint.v8f32(<8 x float> %va, <8 x i1> %m, i32 %evl)
283  ret <8 x float> %v
284}
285
286define <8 x float> @vp_nearbyint_v8f32_unmasked(<8 x float> %va, i32 zeroext %evl) {
287; CHECK-LABEL: vp_nearbyint_v8f32_unmasked:
288; CHECK:       # %bb.0:
289; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma
290; CHECK-NEXT:    vfabs.v v10, v8
291; CHECK-NEXT:    lui a0, 307200
292; CHECK-NEXT:    fmv.w.x fa5, a0
293; CHECK-NEXT:    vmflt.vf v0, v10, fa5
294; CHECK-NEXT:    frflags a0
295; CHECK-NEXT:    vfcvt.x.f.v v10, v8, v0.t
296; CHECK-NEXT:    vfcvt.f.x.v v10, v10, v0.t
297; CHECK-NEXT:    vsetvli zero, zero, e32, m2, ta, mu
298; CHECK-NEXT:    vfsgnj.vv v8, v10, v8, v0.t
299; CHECK-NEXT:    fsflags a0
300; CHECK-NEXT:    ret
301  %v = call <8 x float> @llvm.vp.nearbyint.v8f32(<8 x float> %va, <8 x i1> splat (i1 true), i32 %evl)
302  ret <8 x float> %v
303}
304
305declare <16 x float> @llvm.vp.nearbyint.v16f32(<16 x float>, <16 x i1>, i32)
306
307define <16 x float> @vp_nearbyint_v16f32(<16 x float> %va, <16 x i1> %m, i32 zeroext %evl) {
308; CHECK-LABEL: vp_nearbyint_v16f32:
309; CHECK:       # %bb.0:
310; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma
311; CHECK-NEXT:    vmv1r.v v12, v0
312; CHECK-NEXT:    vfabs.v v16, v8, v0.t
313; CHECK-NEXT:    lui a0, 307200
314; CHECK-NEXT:    fmv.w.x fa5, a0
315; CHECK-NEXT:    vsetvli zero, zero, e32, m4, ta, mu
316; CHECK-NEXT:    vmflt.vf v12, v16, fa5, v0.t
317; CHECK-NEXT:    frflags a0
318; CHECK-NEXT:    vmv1r.v v0, v12
319; CHECK-NEXT:    vsetvli zero, zero, e32, m4, ta, ma
320; CHECK-NEXT:    vfcvt.x.f.v v16, v8, v0.t
321; CHECK-NEXT:    vfcvt.f.x.v v16, v16, v0.t
322; CHECK-NEXT:    vsetvli zero, zero, e32, m4, ta, mu
323; CHECK-NEXT:    vfsgnj.vv v8, v16, v8, v0.t
324; CHECK-NEXT:    fsflags a0
325; CHECK-NEXT:    ret
326  %v = call <16 x float> @llvm.vp.nearbyint.v16f32(<16 x float> %va, <16 x i1> %m, i32 %evl)
327  ret <16 x float> %v
328}
329
330define <16 x float> @vp_nearbyint_v16f32_unmasked(<16 x float> %va, i32 zeroext %evl) {
331; CHECK-LABEL: vp_nearbyint_v16f32_unmasked:
332; CHECK:       # %bb.0:
333; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma
334; CHECK-NEXT:    vfabs.v v12, v8
335; CHECK-NEXT:    lui a0, 307200
336; CHECK-NEXT:    fmv.w.x fa5, a0
337; CHECK-NEXT:    vmflt.vf v0, v12, fa5
338; CHECK-NEXT:    frflags a0
339; CHECK-NEXT:    vfcvt.x.f.v v12, v8, v0.t
340; CHECK-NEXT:    vfcvt.f.x.v v12, v12, v0.t
341; CHECK-NEXT:    vsetvli zero, zero, e32, m4, ta, mu
342; CHECK-NEXT:    vfsgnj.vv v8, v12, v8, v0.t
343; CHECK-NEXT:    fsflags a0
344; CHECK-NEXT:    ret
345  %v = call <16 x float> @llvm.vp.nearbyint.v16f32(<16 x float> %va, <16 x i1> splat (i1 true), i32 %evl)
346  ret <16 x float> %v
347}
348
349declare <2 x double> @llvm.vp.nearbyint.v2f64(<2 x double>, <2 x i1>, i32)
350
351define <2 x double> @vp_nearbyint_v2f64(<2 x double> %va, <2 x i1> %m, i32 zeroext %evl) {
352; CHECK-LABEL: vp_nearbyint_v2f64:
353; CHECK:       # %bb.0:
354; CHECK-NEXT:    lui a1, %hi(.LCPI16_0)
355; CHECK-NEXT:    fld fa5, %lo(.LCPI16_0)(a1)
356; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma
357; CHECK-NEXT:    vfabs.v v9, v8, v0.t
358; CHECK-NEXT:    vsetvli zero, zero, e64, m1, ta, mu
359; CHECK-NEXT:    vmflt.vf v0, v9, fa5, v0.t
360; CHECK-NEXT:    frflags a0
361; CHECK-NEXT:    vsetvli zero, zero, e64, m1, ta, ma
362; CHECK-NEXT:    vfcvt.x.f.v v9, v8, v0.t
363; CHECK-NEXT:    vfcvt.f.x.v v9, v9, v0.t
364; CHECK-NEXT:    vsetvli zero, zero, e64, m1, ta, mu
365; CHECK-NEXT:    vfsgnj.vv v8, v9, v8, v0.t
366; CHECK-NEXT:    fsflags a0
367; CHECK-NEXT:    ret
368  %v = call <2 x double> @llvm.vp.nearbyint.v2f64(<2 x double> %va, <2 x i1> %m, i32 %evl)
369  ret <2 x double> %v
370}
371
372define <2 x double> @vp_nearbyint_v2f64_unmasked(<2 x double> %va, i32 zeroext %evl) {
373; CHECK-LABEL: vp_nearbyint_v2f64_unmasked:
374; CHECK:       # %bb.0:
375; CHECK-NEXT:    lui a1, %hi(.LCPI17_0)
376; CHECK-NEXT:    fld fa5, %lo(.LCPI17_0)(a1)
377; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma
378; CHECK-NEXT:    vfabs.v v9, v8
379; CHECK-NEXT:    vmflt.vf v0, v9, fa5
380; CHECK-NEXT:    frflags a0
381; CHECK-NEXT:    vfcvt.x.f.v v9, v8, v0.t
382; CHECK-NEXT:    vfcvt.f.x.v v9, v9, v0.t
383; CHECK-NEXT:    vsetvli zero, zero, e64, m1, ta, mu
384; CHECK-NEXT:    vfsgnj.vv v8, v9, v8, v0.t
385; CHECK-NEXT:    fsflags a0
386; CHECK-NEXT:    ret
387  %v = call <2 x double> @llvm.vp.nearbyint.v2f64(<2 x double> %va, <2 x i1> splat (i1 true), i32 %evl)
388  ret <2 x double> %v
389}
390
391declare <4 x double> @llvm.vp.nearbyint.v4f64(<4 x double>, <4 x i1>, i32)
392
393define <4 x double> @vp_nearbyint_v4f64(<4 x double> %va, <4 x i1> %m, i32 zeroext %evl) {
394; CHECK-LABEL: vp_nearbyint_v4f64:
395; CHECK:       # %bb.0:
396; CHECK-NEXT:    vsetvli zero, a0, e64, m2, ta, ma
397; CHECK-NEXT:    vmv1r.v v10, v0
398; CHECK-NEXT:    lui a0, %hi(.LCPI18_0)
399; CHECK-NEXT:    fld fa5, %lo(.LCPI18_0)(a0)
400; CHECK-NEXT:    vfabs.v v12, v8, v0.t
401; CHECK-NEXT:    vsetvli zero, zero, e64, m2, ta, mu
402; CHECK-NEXT:    vmflt.vf v10, v12, fa5, v0.t
403; CHECK-NEXT:    frflags a0
404; CHECK-NEXT:    vmv1r.v v0, v10
405; CHECK-NEXT:    vsetvli zero, zero, e64, m2, ta, ma
406; CHECK-NEXT:    vfcvt.x.f.v v12, v8, v0.t
407; CHECK-NEXT:    vfcvt.f.x.v v12, v12, v0.t
408; CHECK-NEXT:    vsetvli zero, zero, e64, m2, ta, mu
409; CHECK-NEXT:    vfsgnj.vv v8, v12, v8, v0.t
410; CHECK-NEXT:    fsflags a0
411; CHECK-NEXT:    ret
412  %v = call <4 x double> @llvm.vp.nearbyint.v4f64(<4 x double> %va, <4 x i1> %m, i32 %evl)
413  ret <4 x double> %v
414}
415
416define <4 x double> @vp_nearbyint_v4f64_unmasked(<4 x double> %va, i32 zeroext %evl) {
417; CHECK-LABEL: vp_nearbyint_v4f64_unmasked:
418; CHECK:       # %bb.0:
419; CHECK-NEXT:    lui a1, %hi(.LCPI19_0)
420; CHECK-NEXT:    fld fa5, %lo(.LCPI19_0)(a1)
421; CHECK-NEXT:    vsetvli zero, a0, e64, m2, ta, ma
422; CHECK-NEXT:    vfabs.v v10, v8
423; CHECK-NEXT:    vmflt.vf v0, v10, fa5
424; CHECK-NEXT:    frflags a0
425; CHECK-NEXT:    vfcvt.x.f.v v10, v8, v0.t
426; CHECK-NEXT:    vfcvt.f.x.v v10, v10, v0.t
427; CHECK-NEXT:    vsetvli zero, zero, e64, m2, ta, mu
428; CHECK-NEXT:    vfsgnj.vv v8, v10, v8, v0.t
429; CHECK-NEXT:    fsflags a0
430; CHECK-NEXT:    ret
431  %v = call <4 x double> @llvm.vp.nearbyint.v4f64(<4 x double> %va, <4 x i1> splat (i1 true), i32 %evl)
432  ret <4 x double> %v
433}
434
435declare <8 x double> @llvm.vp.nearbyint.v8f64(<8 x double>, <8 x i1>, i32)
436
437define <8 x double> @vp_nearbyint_v8f64(<8 x double> %va, <8 x i1> %m, i32 zeroext %evl) {
438; CHECK-LABEL: vp_nearbyint_v8f64:
439; CHECK:       # %bb.0:
440; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
441; CHECK-NEXT:    vmv1r.v v12, v0
442; CHECK-NEXT:    lui a0, %hi(.LCPI20_0)
443; CHECK-NEXT:    fld fa5, %lo(.LCPI20_0)(a0)
444; CHECK-NEXT:    vfabs.v v16, v8, v0.t
445; CHECK-NEXT:    vsetvli zero, zero, e64, m4, ta, mu
446; CHECK-NEXT:    vmflt.vf v12, v16, fa5, v0.t
447; CHECK-NEXT:    frflags a0
448; CHECK-NEXT:    vmv1r.v v0, v12
449; CHECK-NEXT:    vsetvli zero, zero, e64, m4, ta, ma
450; CHECK-NEXT:    vfcvt.x.f.v v16, v8, v0.t
451; CHECK-NEXT:    vfcvt.f.x.v v16, v16, v0.t
452; CHECK-NEXT:    vsetvli zero, zero, e64, m4, ta, mu
453; CHECK-NEXT:    vfsgnj.vv v8, v16, v8, v0.t
454; CHECK-NEXT:    fsflags a0
455; CHECK-NEXT:    ret
456  %v = call <8 x double> @llvm.vp.nearbyint.v8f64(<8 x double> %va, <8 x i1> %m, i32 %evl)
457  ret <8 x double> %v
458}
459
460define <8 x double> @vp_nearbyint_v8f64_unmasked(<8 x double> %va, i32 zeroext %evl) {
461; CHECK-LABEL: vp_nearbyint_v8f64_unmasked:
462; CHECK:       # %bb.0:
463; CHECK-NEXT:    lui a1, %hi(.LCPI21_0)
464; CHECK-NEXT:    fld fa5, %lo(.LCPI21_0)(a1)
465; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
466; CHECK-NEXT:    vfabs.v v12, v8
467; CHECK-NEXT:    vmflt.vf v0, v12, fa5
468; CHECK-NEXT:    frflags a0
469; CHECK-NEXT:    vfcvt.x.f.v v12, v8, v0.t
470; CHECK-NEXT:    vfcvt.f.x.v v12, v12, v0.t
471; CHECK-NEXT:    vsetvli zero, zero, e64, m4, ta, mu
472; CHECK-NEXT:    vfsgnj.vv v8, v12, v8, v0.t
473; CHECK-NEXT:    fsflags a0
474; CHECK-NEXT:    ret
475  %v = call <8 x double> @llvm.vp.nearbyint.v8f64(<8 x double> %va, <8 x i1> splat (i1 true), i32 %evl)
476  ret <8 x double> %v
477}
478
479declare <15 x double> @llvm.vp.nearbyint.v15f64(<15 x double>, <15 x i1>, i32)
480
481define <15 x double> @vp_nearbyint_v15f64(<15 x double> %va, <15 x i1> %m, i32 zeroext %evl) {
482; CHECK-LABEL: vp_nearbyint_v15f64:
483; CHECK:       # %bb.0:
484; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma
485; CHECK-NEXT:    vmv1r.v v16, v0
486; CHECK-NEXT:    lui a0, %hi(.LCPI22_0)
487; CHECK-NEXT:    fld fa5, %lo(.LCPI22_0)(a0)
488; CHECK-NEXT:    vfabs.v v24, v8, v0.t
489; CHECK-NEXT:    vsetvli zero, zero, e64, m8, ta, mu
490; CHECK-NEXT:    vmflt.vf v16, v24, fa5, v0.t
491; CHECK-NEXT:    frflags a0
492; CHECK-NEXT:    vmv1r.v v0, v16
493; CHECK-NEXT:    vsetvli zero, zero, e64, m8, ta, ma
494; CHECK-NEXT:    vfcvt.x.f.v v24, v8, v0.t
495; CHECK-NEXT:    vfcvt.f.x.v v24, v24, v0.t
496; CHECK-NEXT:    vsetvli zero, zero, e64, m8, ta, mu
497; CHECK-NEXT:    vfsgnj.vv v8, v24, v8, v0.t
498; CHECK-NEXT:    fsflags a0
499; CHECK-NEXT:    ret
500  %v = call <15 x double> @llvm.vp.nearbyint.v15f64(<15 x double> %va, <15 x i1> %m, i32 %evl)
501  ret <15 x double> %v
502}
503
504define <15 x double> @vp_nearbyint_v15f64_unmasked(<15 x double> %va, i32 zeroext %evl) {
505; CHECK-LABEL: vp_nearbyint_v15f64_unmasked:
506; CHECK:       # %bb.0:
507; CHECK-NEXT:    lui a1, %hi(.LCPI23_0)
508; CHECK-NEXT:    fld fa5, %lo(.LCPI23_0)(a1)
509; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma
510; CHECK-NEXT:    vfabs.v v16, v8
511; CHECK-NEXT:    vmflt.vf v0, v16, fa5
512; CHECK-NEXT:    frflags a0
513; CHECK-NEXT:    vfcvt.x.f.v v16, v8, v0.t
514; CHECK-NEXT:    vfcvt.f.x.v v16, v16, v0.t
515; CHECK-NEXT:    vsetvli zero, zero, e64, m8, ta, mu
516; CHECK-NEXT:    vfsgnj.vv v8, v16, v8, v0.t
517; CHECK-NEXT:    fsflags a0
518; CHECK-NEXT:    ret
519  %v = call <15 x double> @llvm.vp.nearbyint.v15f64(<15 x double> %va, <15 x i1> splat (i1 true), i32 %evl)
520  ret <15 x double> %v
521}
522
523declare <16 x double> @llvm.vp.nearbyint.v16f64(<16 x double>, <16 x i1>, i32)
524
525define <16 x double> @vp_nearbyint_v16f64(<16 x double> %va, <16 x i1> %m, i32 zeroext %evl) {
526; CHECK-LABEL: vp_nearbyint_v16f64:
527; CHECK:       # %bb.0:
528; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma
529; CHECK-NEXT:    vmv1r.v v16, v0
530; CHECK-NEXT:    lui a0, %hi(.LCPI24_0)
531; CHECK-NEXT:    fld fa5, %lo(.LCPI24_0)(a0)
532; CHECK-NEXT:    vfabs.v v24, v8, v0.t
533; CHECK-NEXT:    vsetvli zero, zero, e64, m8, ta, mu
534; CHECK-NEXT:    vmflt.vf v16, v24, fa5, v0.t
535; CHECK-NEXT:    frflags a0
536; CHECK-NEXT:    vmv1r.v v0, v16
537; CHECK-NEXT:    vsetvli zero, zero, e64, m8, ta, ma
538; CHECK-NEXT:    vfcvt.x.f.v v24, v8, v0.t
539; CHECK-NEXT:    vfcvt.f.x.v v24, v24, v0.t
540; CHECK-NEXT:    vsetvli zero, zero, e64, m8, ta, mu
541; CHECK-NEXT:    vfsgnj.vv v8, v24, v8, v0.t
542; CHECK-NEXT:    fsflags a0
543; CHECK-NEXT:    ret
544  %v = call <16 x double> @llvm.vp.nearbyint.v16f64(<16 x double> %va, <16 x i1> %m, i32 %evl)
545  ret <16 x double> %v
546}
547
548define <16 x double> @vp_nearbyint_v16f64_unmasked(<16 x double> %va, i32 zeroext %evl) {
549; CHECK-LABEL: vp_nearbyint_v16f64_unmasked:
550; CHECK:       # %bb.0:
551; CHECK-NEXT:    lui a1, %hi(.LCPI25_0)
552; CHECK-NEXT:    fld fa5, %lo(.LCPI25_0)(a1)
553; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma
554; CHECK-NEXT:    vfabs.v v16, v8
555; CHECK-NEXT:    vmflt.vf v0, v16, fa5
556; CHECK-NEXT:    frflags a0
557; CHECK-NEXT:    vfcvt.x.f.v v16, v8, v0.t
558; CHECK-NEXT:    vfcvt.f.x.v v16, v16, v0.t
559; CHECK-NEXT:    vsetvli zero, zero, e64, m8, ta, mu
560; CHECK-NEXT:    vfsgnj.vv v8, v16, v8, v0.t
561; CHECK-NEXT:    fsflags a0
562; CHECK-NEXT:    ret
563  %v = call <16 x double> @llvm.vp.nearbyint.v16f64(<16 x double> %va, <16 x i1> splat (i1 true), i32 %evl)
564  ret <16 x double> %v
565}
566
567declare <32 x double> @llvm.vp.nearbyint.v32f64(<32 x double>, <32 x i1>, i32)
568
569define <32 x double> @vp_nearbyint_v32f64(<32 x double> %va, <32 x i1> %m, i32 zeroext %evl) {
570; CHECK-LABEL: vp_nearbyint_v32f64:
571; CHECK:       # %bb.0:
572; CHECK-NEXT:    vsetivli zero, 2, e8, mf4, ta, ma
573; CHECK-NEXT:    vmv1r.v v6, v0
574; CHECK-NEXT:    li a2, 16
575; CHECK-NEXT:    vslidedown.vi v7, v0, 2
576; CHECK-NEXT:    mv a1, a0
577; CHECK-NEXT:    bltu a0, a2, .LBB26_2
578; CHECK-NEXT:  # %bb.1:
579; CHECK-NEXT:    li a1, 16
580; CHECK-NEXT:  .LBB26_2:
581; CHECK-NEXT:    addi sp, sp, -16
582; CHECK-NEXT:    .cfi_def_cfa_offset 16
583; CHECK-NEXT:    csrr a2, vlenb
584; CHECK-NEXT:    slli a2, a2, 3
585; CHECK-NEXT:    sub sp, sp, a2
586; CHECK-NEXT:    .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x08, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 8 * vlenb
587; CHECK-NEXT:    vmv1r.v v0, v6
588; CHECK-NEXT:    lui a2, %hi(.LCPI26_0)
589; CHECK-NEXT:    fld fa5, %lo(.LCPI26_0)(a2)
590; CHECK-NEXT:    vsetvli zero, a1, e64, m8, ta, ma
591; CHECK-NEXT:    vfabs.v v24, v8, v0.t
592; CHECK-NEXT:    vsetvli zero, zero, e64, m8, ta, mu
593; CHECK-NEXT:    vmflt.vf v6, v24, fa5, v0.t
594; CHECK-NEXT:    frflags a1
595; CHECK-NEXT:    vmv1r.v v0, v6
596; CHECK-NEXT:    vsetvli zero, zero, e64, m8, ta, ma
597; CHECK-NEXT:    vfcvt.x.f.v v24, v8, v0.t
598; CHECK-NEXT:    addi a2, sp, 16
599; CHECK-NEXT:    vs8r.v v24, (a2) # Unknown-size Folded Spill
600; CHECK-NEXT:    addi a2, a0, -16
601; CHECK-NEXT:    sltu a0, a0, a2
602; CHECK-NEXT:    addi a0, a0, -1
603; CHECK-NEXT:    and a0, a0, a2
604; CHECK-NEXT:    addi a2, sp, 16
605; CHECK-NEXT:    vl8r.v v24, (a2) # Unknown-size Folded Reload
606; CHECK-NEXT:    vfcvt.f.x.v v24, v24, v0.t
607; CHECK-NEXT:    fsflags a1
608; CHECK-NEXT:    vsetvli zero, zero, e64, m8, ta, mu
609; CHECK-NEXT:    vfsgnj.vv v8, v24, v8, v0.t
610; CHECK-NEXT:    vmv1r.v v0, v7
611; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma
612; CHECK-NEXT:    vfabs.v v24, v16, v0.t
613; CHECK-NEXT:    vsetvli zero, zero, e64, m8, ta, mu
614; CHECK-NEXT:    vmflt.vf v7, v24, fa5, v0.t
615; CHECK-NEXT:    frflags a0
616; CHECK-NEXT:    vmv1r.v v0, v7
617; CHECK-NEXT:    vsetvli zero, zero, e64, m8, ta, ma
618; CHECK-NEXT:    vfcvt.x.f.v v24, v16, v0.t
619; CHECK-NEXT:    vfcvt.f.x.v v24, v24, v0.t
620; CHECK-NEXT:    vsetvli zero, zero, e64, m8, ta, mu
621; CHECK-NEXT:    vfsgnj.vv v16, v24, v16, v0.t
622; CHECK-NEXT:    fsflags a0
623; CHECK-NEXT:    csrr a0, vlenb
624; CHECK-NEXT:    slli a0, a0, 3
625; CHECK-NEXT:    add sp, sp, a0
626; CHECK-NEXT:    .cfi_def_cfa sp, 16
627; CHECK-NEXT:    addi sp, sp, 16
628; CHECK-NEXT:    .cfi_def_cfa_offset 0
629; CHECK-NEXT:    ret
630  %v = call <32 x double> @llvm.vp.nearbyint.v32f64(<32 x double> %va, <32 x i1> %m, i32 %evl)
631  ret <32 x double> %v
632}
633
634define <32 x double> @vp_nearbyint_v32f64_unmasked(<32 x double> %va, i32 zeroext %evl) {
635; CHECK-LABEL: vp_nearbyint_v32f64_unmasked:
636; CHECK:       # %bb.0:
637; CHECK-NEXT:    li a2, 16
638; CHECK-NEXT:    mv a1, a0
639; CHECK-NEXT:    bltu a0, a2, .LBB27_2
640; CHECK-NEXT:  # %bb.1:
641; CHECK-NEXT:    li a1, 16
642; CHECK-NEXT:  .LBB27_2:
643; CHECK-NEXT:    vsetvli zero, a1, e64, m8, ta, ma
644; CHECK-NEXT:    vfabs.v v24, v8
645; CHECK-NEXT:    lui a2, %hi(.LCPI27_0)
646; CHECK-NEXT:    fld fa5, %lo(.LCPI27_0)(a2)
647; CHECK-NEXT:    addi a2, a0, -16
648; CHECK-NEXT:    sltu a0, a0, a2
649; CHECK-NEXT:    addi a0, a0, -1
650; CHECK-NEXT:    and a0, a0, a2
651; CHECK-NEXT:    frflags a2
652; CHECK-NEXT:    vmflt.vf v0, v24, fa5
653; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma
654; CHECK-NEXT:    vfabs.v v24, v16
655; CHECK-NEXT:    vmflt.vf v7, v24, fa5
656; CHECK-NEXT:    vsetvli zero, a1, e64, m8, ta, ma
657; CHECK-NEXT:    vfcvt.x.f.v v24, v8, v0.t
658; CHECK-NEXT:    vfcvt.f.x.v v24, v24, v0.t
659; CHECK-NEXT:    fsflags a2
660; CHECK-NEXT:    vsetvli zero, zero, e64, m8, ta, mu
661; CHECK-NEXT:    vfsgnj.vv v8, v24, v8, v0.t
662; CHECK-NEXT:    frflags a1
663; CHECK-NEXT:    vmv1r.v v0, v7
664; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma
665; CHECK-NEXT:    vfcvt.x.f.v v24, v16, v0.t
666; CHECK-NEXT:    vfcvt.f.x.v v24, v24, v0.t
667; CHECK-NEXT:    vsetvli zero, zero, e64, m8, ta, mu
668; CHECK-NEXT:    vfsgnj.vv v16, v24, v16, v0.t
669; CHECK-NEXT:    fsflags a1
670; CHECK-NEXT:    ret
671  %v = call <32 x double> @llvm.vp.nearbyint.v32f64(<32 x double> %va, <32 x i1> splat (i1 true), i32 %evl)
672  ret <32 x double> %v
673}
674