1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=riscv64 -mattr=+m,+v < %s | FileCheck %s 3 4declare <4 x ptr> @llvm.vp.inttoptr.v4p0.v4i32(<4 x i32>, <4 x i1>, i32) 5 6define <4 x ptr> @inttoptr_v4p0_v4i32(<4 x i32> %va, <4 x i1> %m, i32 zeroext %evl) { 7; CHECK-LABEL: inttoptr_v4p0_v4i32: 8; CHECK: # %bb.0: 9; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma 10; CHECK-NEXT: vzext.vf2 v10, v8, v0.t 11; CHECK-NEXT: vmv.v.v v8, v10 12; CHECK-NEXT: ret 13 %v = call <4 x ptr> @llvm.vp.inttoptr.v4p0.v4i32(<4 x i32> %va, <4 x i1> %m, i32 %evl) 14 ret <4 x ptr> %v 15} 16 17declare <4 x ptr> @llvm.vp.inttoptr.v4p0.v4i64(<4 x i64>, <4 x i1>, i32) 18 19define <4 x ptr> @inttoptr_v4p0_v4i64(<4 x i64> %va, <4 x i1> %m, i32 zeroext %evl) { 20; CHECK-LABEL: inttoptr_v4p0_v4i64: 21; CHECK: # %bb.0: 22; CHECK-NEXT: ret 23 %v = call <4 x ptr> @llvm.vp.inttoptr.v4p0.v4i64(<4 x i64> %va, <4 x i1> %m, i32 %evl) 24 ret <4 x ptr> %v 25} 26 27declare <4 x i32> @llvm.vp.ptrtoint.v4i32.v4p0(<4 x ptr>, <4 x i1>, i32) 28 29define <4 x i32> @ptrtoint_v4i32_v4p0(<4 x ptr> %va, <4 x i1> %m, i32 zeroext %evl) { 30; CHECK-LABEL: ptrtoint_v4i32_v4p0: 31; CHECK: # %bb.0: 32; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma 33; CHECK-NEXT: vnsrl.wi v10, v8, 0, v0.t 34; CHECK-NEXT: vmv.v.v v8, v10 35; CHECK-NEXT: ret 36 %v = call <4 x i32> @llvm.vp.ptrtoint.v4i32.v4p0(<4 x ptr> %va, <4 x i1> %m, i32 %evl) 37 ret <4 x i32> %v 38} 39 40declare <4 x i64> @llvm.vp.ptrtoint.v4i64.v4p0(<4 x ptr>, <4 x i1>, i32) 41 42define <4 x i64> @ptrtoint_v4i64_v4p0(<4 x ptr> %va, <4 x i1> %m, i32 zeroext %evl) { 43; CHECK-LABEL: ptrtoint_v4i64_v4p0: 44; CHECK: # %bb.0: 45; CHECK-NEXT: ret 46 %v = call <4 x i64> @llvm.vp.ptrtoint.v4i64.v4p0(<4 x ptr> %va, <4 x i1> %m, i32 %evl) 47 ret <4 x i64> %v 48} 49