xref: /llvm-project/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-exttrunc.ll (revision 92b5a3405de9f04cb31fae21138183c417afc42e)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=riscv32 -mattr=+m,+v -riscv-v-vector-bits-min=128 -riscv-v-fixed-length-vector-lmul-max=8 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,LMULMAX8
3; RUN: llc -mtriple=riscv64 -mattr=+m,+v -riscv-v-vector-bits-min=128 -riscv-v-fixed-length-vector-lmul-max=8 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,LMULMAX8
4; RUN: llc -mtriple=riscv32 -mattr=+m,+v -riscv-v-vector-bits-min=128 -riscv-v-fixed-length-vector-lmul-max=2 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,LMULMAX2
5; RUN: llc -mtriple=riscv64 -mattr=+m,+v -riscv-v-vector-bits-min=128 -riscv-v-fixed-length-vector-lmul-max=2 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,LMULMAX2
6; RUN: llc -mtriple=riscv32 -mattr=+m,+v -riscv-v-vector-bits-min=128 -riscv-v-fixed-length-vector-lmul-max=1 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,LMULMAX1
7; RUN: llc -mtriple=riscv64 -mattr=+m,+v -riscv-v-vector-bits-min=128 -riscv-v-fixed-length-vector-lmul-max=1 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,LMULMAX1
8
9define void @sext_v4i8_v4i32(ptr %x, ptr %z) {
10; CHECK-LABEL: sext_v4i8_v4i32:
11; CHECK:       # %bb.0:
12; CHECK-NEXT:    vsetivli zero, 4, e32, m1, ta, ma
13; CHECK-NEXT:    vle8.v v8, (a0)
14; CHECK-NEXT:    vsext.vf4 v9, v8
15; CHECK-NEXT:    vse32.v v9, (a1)
16; CHECK-NEXT:    ret
17  %a = load <4 x i8>, ptr %x
18  %b = sext <4 x i8> %a to <4 x i32>
19  store <4 x i32> %b, ptr %z
20  ret void
21}
22
23define void @zext_v4i8_v4i32(ptr %x, ptr %z) {
24; CHECK-LABEL: zext_v4i8_v4i32:
25; CHECK:       # %bb.0:
26; CHECK-NEXT:    vsetivli zero, 4, e32, m1, ta, ma
27; CHECK-NEXT:    vle8.v v8, (a0)
28; CHECK-NEXT:    vzext.vf4 v9, v8
29; CHECK-NEXT:    vse32.v v9, (a1)
30; CHECK-NEXT:    ret
31  %a = load <4 x i8>, ptr %x
32  %b = zext <4 x i8> %a to <4 x i32>
33  store <4 x i32> %b, ptr %z
34  ret void
35}
36
37define void @sext_v8i8_v8i32(ptr %x, ptr %z) {
38; LMULMAX8-LABEL: sext_v8i8_v8i32:
39; LMULMAX8:       # %bb.0:
40; LMULMAX8-NEXT:    vsetivli zero, 8, e32, m2, ta, ma
41; LMULMAX8-NEXT:    vle8.v v8, (a0)
42; LMULMAX8-NEXT:    vsext.vf4 v10, v8
43; LMULMAX8-NEXT:    vse32.v v10, (a1)
44; LMULMAX8-NEXT:    ret
45;
46; LMULMAX2-LABEL: sext_v8i8_v8i32:
47; LMULMAX2:       # %bb.0:
48; LMULMAX2-NEXT:    vsetivli zero, 8, e32, m2, ta, ma
49; LMULMAX2-NEXT:    vle8.v v8, (a0)
50; LMULMAX2-NEXT:    vsext.vf4 v10, v8
51; LMULMAX2-NEXT:    vse32.v v10, (a1)
52; LMULMAX2-NEXT:    ret
53;
54; LMULMAX1-LABEL: sext_v8i8_v8i32:
55; LMULMAX1:       # %bb.0:
56; LMULMAX1-NEXT:    vsetivli zero, 8, e8, mf2, ta, ma
57; LMULMAX1-NEXT:    vle8.v v8, (a0)
58; LMULMAX1-NEXT:    vsetivli zero, 4, e32, m1, ta, ma
59; LMULMAX1-NEXT:    vsext.vf4 v9, v8
60; LMULMAX1-NEXT:    vsetivli zero, 4, e8, mf2, ta, ma
61; LMULMAX1-NEXT:    vslidedown.vi v8, v8, 4
62; LMULMAX1-NEXT:    vsetivli zero, 4, e32, m1, ta, ma
63; LMULMAX1-NEXT:    vsext.vf4 v10, v8
64; LMULMAX1-NEXT:    addi a0, a1, 16
65; LMULMAX1-NEXT:    vse32.v v10, (a0)
66; LMULMAX1-NEXT:    vse32.v v9, (a1)
67; LMULMAX1-NEXT:    ret
68  %a = load <8 x i8>, ptr %x
69  %b = sext <8 x i8> %a to <8 x i32>
70  store <8 x i32> %b, ptr %z
71  ret void
72}
73
74define void @sext_v32i8_v32i32(ptr %x, ptr %z) {
75; LMULMAX8-LABEL: sext_v32i8_v32i32:
76; LMULMAX8:       # %bb.0:
77; LMULMAX8-NEXT:    li a2, 32
78; LMULMAX8-NEXT:    vsetvli zero, a2, e32, m8, ta, ma
79; LMULMAX8-NEXT:    vle8.v v8, (a0)
80; LMULMAX8-NEXT:    vsext.vf4 v16, v8
81; LMULMAX8-NEXT:    vse32.v v16, (a1)
82; LMULMAX8-NEXT:    ret
83;
84; LMULMAX2-LABEL: sext_v32i8_v32i32:
85; LMULMAX2:       # %bb.0:
86; LMULMAX2-NEXT:    li a2, 32
87; LMULMAX2-NEXT:    vsetvli zero, a2, e8, m2, ta, ma
88; LMULMAX2-NEXT:    vle8.v v8, (a0)
89; LMULMAX2-NEXT:    vsetivli zero, 8, e8, m1, ta, ma
90; LMULMAX2-NEXT:    vslidedown.vi v10, v8, 8
91; LMULMAX2-NEXT:    vsetivli zero, 8, e32, m2, ta, ma
92; LMULMAX2-NEXT:    vsext.vf4 v12, v10
93; LMULMAX2-NEXT:    vsetivli zero, 16, e8, m2, ta, ma
94; LMULMAX2-NEXT:    vslidedown.vi v10, v8, 16
95; LMULMAX2-NEXT:    vsetivli zero, 8, e8, m1, ta, ma
96; LMULMAX2-NEXT:    vslidedown.vi v9, v10, 8
97; LMULMAX2-NEXT:    vsetivli zero, 8, e32, m2, ta, ma
98; LMULMAX2-NEXT:    vsext.vf4 v14, v9
99; LMULMAX2-NEXT:    vsext.vf4 v16, v8
100; LMULMAX2-NEXT:    vsext.vf4 v8, v10
101; LMULMAX2-NEXT:    addi a0, a1, 64
102; LMULMAX2-NEXT:    vse32.v v8, (a0)
103; LMULMAX2-NEXT:    vse32.v v16, (a1)
104; LMULMAX2-NEXT:    addi a0, a1, 96
105; LMULMAX2-NEXT:    vse32.v v14, (a0)
106; LMULMAX2-NEXT:    addi a0, a1, 32
107; LMULMAX2-NEXT:    vse32.v v12, (a0)
108; LMULMAX2-NEXT:    ret
109;
110; LMULMAX1-LABEL: sext_v32i8_v32i32:
111; LMULMAX1:       # %bb.0:
112; LMULMAX1-NEXT:    vsetivli zero, 16, e8, m1, ta, ma
113; LMULMAX1-NEXT:    addi a2, a0, 16
114; LMULMAX1-NEXT:    vle8.v v8, (a2)
115; LMULMAX1-NEXT:    vle8.v v9, (a0)
116; LMULMAX1-NEXT:    vsetivli zero, 4, e8, mf2, ta, ma
117; LMULMAX1-NEXT:    vslidedown.vi v10, v8, 4
118; LMULMAX1-NEXT:    vsetivli zero, 4, e32, m1, ta, ma
119; LMULMAX1-NEXT:    vsext.vf4 v11, v10
120; LMULMAX1-NEXT:    vsetivli zero, 8, e8, m1, ta, ma
121; LMULMAX1-NEXT:    vslidedown.vi v10, v8, 8
122; LMULMAX1-NEXT:    vsetivli zero, 4, e8, mf2, ta, ma
123; LMULMAX1-NEXT:    vslidedown.vi v12, v10, 4
124; LMULMAX1-NEXT:    vsetivli zero, 4, e32, m1, ta, ma
125; LMULMAX1-NEXT:    vsext.vf4 v13, v12
126; LMULMAX1-NEXT:    vsetivli zero, 4, e8, mf2, ta, ma
127; LMULMAX1-NEXT:    vslidedown.vi v12, v9, 4
128; LMULMAX1-NEXT:    vsetivli zero, 4, e32, m1, ta, ma
129; LMULMAX1-NEXT:    vsext.vf4 v14, v12
130; LMULMAX1-NEXT:    vsetivli zero, 8, e8, m1, ta, ma
131; LMULMAX1-NEXT:    vslidedown.vi v12, v9, 8
132; LMULMAX1-NEXT:    vsetivli zero, 4, e8, mf2, ta, ma
133; LMULMAX1-NEXT:    vslidedown.vi v15, v12, 4
134; LMULMAX1-NEXT:    vsetivli zero, 4, e32, m1, ta, ma
135; LMULMAX1-NEXT:    vsext.vf4 v16, v15
136; LMULMAX1-NEXT:    vsext.vf4 v15, v8
137; LMULMAX1-NEXT:    vsext.vf4 v8, v10
138; LMULMAX1-NEXT:    vsext.vf4 v10, v9
139; LMULMAX1-NEXT:    vsext.vf4 v9, v12
140; LMULMAX1-NEXT:    addi a0, a1, 32
141; LMULMAX1-NEXT:    vse32.v v9, (a0)
142; LMULMAX1-NEXT:    vse32.v v10, (a1)
143; LMULMAX1-NEXT:    addi a0, a1, 96
144; LMULMAX1-NEXT:    vse32.v v8, (a0)
145; LMULMAX1-NEXT:    addi a0, a1, 64
146; LMULMAX1-NEXT:    vse32.v v15, (a0)
147; LMULMAX1-NEXT:    addi a0, a1, 48
148; LMULMAX1-NEXT:    vse32.v v16, (a0)
149; LMULMAX1-NEXT:    addi a0, a1, 16
150; LMULMAX1-NEXT:    vse32.v v14, (a0)
151; LMULMAX1-NEXT:    addi a0, a1, 112
152; LMULMAX1-NEXT:    vse32.v v13, (a0)
153; LMULMAX1-NEXT:    addi a0, a1, 80
154; LMULMAX1-NEXT:    vse32.v v11, (a0)
155; LMULMAX1-NEXT:    ret
156  %a = load <32 x i8>, ptr %x
157  %b = sext <32 x i8> %a to <32 x i32>
158  store <32 x i32> %b, ptr %z
159  ret void
160}
161
162define void @trunc_v4i8_v4i32(ptr %x, ptr %z) {
163; CHECK-LABEL: trunc_v4i8_v4i32:
164; CHECK:       # %bb.0:
165; CHECK-NEXT:    vsetivli zero, 4, e16, mf2, ta, ma
166; CHECK-NEXT:    vle32.v v8, (a0)
167; CHECK-NEXT:    vnsrl.wi v8, v8, 0
168; CHECK-NEXT:    vsetvli zero, zero, e8, mf4, ta, ma
169; CHECK-NEXT:    vnsrl.wi v8, v8, 0
170; CHECK-NEXT:    vse8.v v8, (a1)
171; CHECK-NEXT:    ret
172  %a = load <4 x i32>, ptr %x
173  %b = trunc <4 x i32> %a to <4 x i8>
174  store <4 x i8> %b, ptr %z
175  ret void
176}
177
178define void @trunc_v8i8_v8i32(ptr %x, ptr %z) {
179; LMULMAX8-LABEL: trunc_v8i8_v8i32:
180; LMULMAX8:       # %bb.0:
181; LMULMAX8-NEXT:    vsetivli zero, 8, e16, m1, ta, ma
182; LMULMAX8-NEXT:    vle32.v v8, (a0)
183; LMULMAX8-NEXT:    vnsrl.wi v10, v8, 0
184; LMULMAX8-NEXT:    vsetvli zero, zero, e8, mf2, ta, ma
185; LMULMAX8-NEXT:    vnsrl.wi v8, v10, 0
186; LMULMAX8-NEXT:    vse8.v v8, (a1)
187; LMULMAX8-NEXT:    ret
188;
189; LMULMAX2-LABEL: trunc_v8i8_v8i32:
190; LMULMAX2:       # %bb.0:
191; LMULMAX2-NEXT:    vsetivli zero, 8, e16, m1, ta, ma
192; LMULMAX2-NEXT:    vle32.v v8, (a0)
193; LMULMAX2-NEXT:    vnsrl.wi v10, v8, 0
194; LMULMAX2-NEXT:    vsetvli zero, zero, e8, mf2, ta, ma
195; LMULMAX2-NEXT:    vnsrl.wi v8, v10, 0
196; LMULMAX2-NEXT:    vse8.v v8, (a1)
197; LMULMAX2-NEXT:    ret
198;
199; LMULMAX1-LABEL: trunc_v8i8_v8i32:
200; LMULMAX1:       # %bb.0:
201; LMULMAX1-NEXT:    vsetivli zero, 4, e16, mf2, ta, ma
202; LMULMAX1-NEXT:    vle32.v v8, (a0)
203; LMULMAX1-NEXT:    addi a0, a0, 16
204; LMULMAX1-NEXT:    vle32.v v9, (a0)
205; LMULMAX1-NEXT:    vnsrl.wi v8, v8, 0
206; LMULMAX1-NEXT:    vsetvli zero, zero, e8, mf4, ta, ma
207; LMULMAX1-NEXT:    vnsrl.wi v8, v8, 0
208; LMULMAX1-NEXT:    vsetvli zero, zero, e16, mf2, ta, ma
209; LMULMAX1-NEXT:    vnsrl.wi v9, v9, 0
210; LMULMAX1-NEXT:    vsetvli zero, zero, e8, mf4, ta, ma
211; LMULMAX1-NEXT:    vnsrl.wi v9, v9, 0
212; LMULMAX1-NEXT:    vsetivli zero, 8, e8, mf2, ta, ma
213; LMULMAX1-NEXT:    vslideup.vi v8, v9, 4
214; LMULMAX1-NEXT:    vse8.v v8, (a1)
215; LMULMAX1-NEXT:    ret
216  %a = load <8 x i32>, ptr %x
217  %b = trunc <8 x i32> %a to <8 x i8>
218  store <8 x i8> %b, ptr %z
219  ret void
220}
221