xref: /llvm-project/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fptrunc-vp.ll (revision b6c0f1bfa79a3a32d841ac5ab1f94c3aee3b5d90) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=riscv32 -mattr=+d,+zvfh,+v,+zvfbfmin -verify-machineinstrs < %s | FileCheck %s
3; RUN: llc -mtriple=riscv64 -mattr=+d,+zvfh,+v,+zvfbfmin -verify-machineinstrs < %s | FileCheck %s
4; RUN: llc -mtriple=riscv32 -mattr=+d,+zvfhmin,+v,+zvfbfmin -verify-machineinstrs < %s | FileCheck %s
5; RUN: llc -mtriple=riscv64 -mattr=+d,+zvfhmin,+v,+zvfbfmin -verify-machineinstrs < %s | FileCheck %s
6
7
8declare <2 x half> @llvm.vp.fptrunc.v2f16.v2f32(<2 x float>, <2 x i1>, i32)
9
10define <2 x half> @vfptrunc_v2f16_v2f32(<2 x float> %a, <2 x i1> %m, i32 zeroext %vl) {
11; CHECK-LABEL: vfptrunc_v2f16_v2f32:
12; CHECK:       # %bb.0:
13; CHECK-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
14; CHECK-NEXT:    vfncvt.f.f.w v9, v8, v0.t
15; CHECK-NEXT:    vmv1r.v v8, v9
16; CHECK-NEXT:    ret
17  %v = call <2 x half> @llvm.vp.fptrunc.v2f16.v2f32(<2 x float> %a, <2 x i1> %m, i32 %vl)
18  ret <2 x half> %v
19}
20
21define <2 x half> @vfptrunc_v2f16_v2f32_unmasked(<2 x float> %a, i32 zeroext %vl) {
22; CHECK-LABEL: vfptrunc_v2f16_v2f32_unmasked:
23; CHECK:       # %bb.0:
24; CHECK-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
25; CHECK-NEXT:    vfncvt.f.f.w v9, v8
26; CHECK-NEXT:    vmv1r.v v8, v9
27; CHECK-NEXT:    ret
28  %v = call <2 x half> @llvm.vp.fptrunc.v2f16.v2f32(<2 x float> %a, <2 x i1> splat (i1 true), i32 %vl)
29  ret <2 x half> %v
30}
31
32declare <2 x half> @llvm.vp.fptrunc.v2f16.v2f64(<2 x double>, <2 x i1>, i32)
33
34define <2 x half> @vfptrunc_v2f16_v2f64(<2 x double> %a, <2 x i1> %m, i32 zeroext %vl) {
35; CHECK-LABEL: vfptrunc_v2f16_v2f64:
36; CHECK:       # %bb.0:
37; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma
38; CHECK-NEXT:    vfncvt.rod.f.f.w v9, v8, v0.t
39; CHECK-NEXT:    vsetvli zero, zero, e16, mf4, ta, ma
40; CHECK-NEXT:    vfncvt.f.f.w v8, v9, v0.t
41; CHECK-NEXT:    ret
42  %v = call <2 x half> @llvm.vp.fptrunc.v2f16.v2f64(<2 x double> %a, <2 x i1> %m, i32 %vl)
43  ret <2 x half> %v
44}
45
46define <2 x half> @vfptrunc_v2f16_v2f64_unmasked(<2 x double> %a, i32 zeroext %vl) {
47; CHECK-LABEL: vfptrunc_v2f16_v2f64_unmasked:
48; CHECK:       # %bb.0:
49; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma
50; CHECK-NEXT:    vfncvt.rod.f.f.w v9, v8
51; CHECK-NEXT:    vsetvli zero, zero, e16, mf4, ta, ma
52; CHECK-NEXT:    vfncvt.f.f.w v8, v9
53; CHECK-NEXT:    ret
54  %v = call <2 x half> @llvm.vp.fptrunc.v2f16.v2f64(<2 x double> %a, <2 x i1> splat (i1 true), i32 %vl)
55  ret <2 x half> %v
56}
57
58declare <2 x float> @llvm.vp.fptrunc.v2f64.v2f32(<2 x double>, <2 x i1>, i32)
59
60define <2 x float> @vfptrunc_v2f32_v2f64(<2 x double> %a, <2 x i1> %m, i32 zeroext %vl) {
61; CHECK-LABEL: vfptrunc_v2f32_v2f64:
62; CHECK:       # %bb.0:
63; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma
64; CHECK-NEXT:    vfncvt.f.f.w v9, v8, v0.t
65; CHECK-NEXT:    vmv1r.v v8, v9
66; CHECK-NEXT:    ret
67  %v = call <2 x float> @llvm.vp.fptrunc.v2f64.v2f32(<2 x double> %a, <2 x i1> %m, i32 %vl)
68  ret <2 x float> %v
69}
70
71define <2 x float> @vfptrunc_v2f32_v2f64_unmasked(<2 x double> %a, i32 zeroext %vl) {
72; CHECK-LABEL: vfptrunc_v2f32_v2f64_unmasked:
73; CHECK:       # %bb.0:
74; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma
75; CHECK-NEXT:    vfncvt.f.f.w v9, v8
76; CHECK-NEXT:    vmv1r.v v8, v9
77; CHECK-NEXT:    ret
78  %v = call <2 x float> @llvm.vp.fptrunc.v2f64.v2f32(<2 x double> %a, <2 x i1> splat (i1 true), i32 %vl)
79  ret <2 x float> %v
80}
81
82declare <15 x float> @llvm.vp.fptrunc.v15f64.v15f32(<15 x double>, <15 x i1>, i32)
83
84define <15 x float> @vfptrunc_v15f32_v15f64(<15 x double> %a, <15 x i1> %m, i32 zeroext %vl) {
85; CHECK-LABEL: vfptrunc_v15f32_v15f64:
86; CHECK:       # %bb.0:
87; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma
88; CHECK-NEXT:    vfncvt.f.f.w v16, v8, v0.t
89; CHECK-NEXT:    vmv.v.v v8, v16
90; CHECK-NEXT:    ret
91  %v = call <15 x float> @llvm.vp.fptrunc.v15f64.v15f32(<15 x double> %a, <15 x i1> %m, i32 %vl)
92  ret <15 x float> %v
93}
94
95declare <32 x float> @llvm.vp.fptrunc.v32f64.v32f32(<32 x double>, <32 x i1>, i32)
96
97define <32 x float> @vfptrunc_v32f32_v32f64(<32 x double> %a, <32 x i1> %m, i32 zeroext %vl) {
98; CHECK-LABEL: vfptrunc_v32f32_v32f64:
99; CHECK:       # %bb.0:
100; CHECK-NEXT:    vsetivli zero, 2, e8, mf4, ta, ma
101; CHECK-NEXT:    vmv8r.v v24, v8
102; CHECK-NEXT:    li a2, 16
103; CHECK-NEXT:    vslidedown.vi v12, v0, 2
104; CHECK-NEXT:    mv a1, a0
105; CHECK-NEXT:    bltu a0, a2, .LBB7_2
106; CHECK-NEXT:  # %bb.1:
107; CHECK-NEXT:    li a1, 16
108; CHECK-NEXT:  .LBB7_2:
109; CHECK-NEXT:    vsetvli zero, a1, e32, m4, ta, ma
110; CHECK-NEXT:    vfncvt.f.f.w v8, v24, v0.t
111; CHECK-NEXT:    addi a1, a0, -16
112; CHECK-NEXT:    sltu a0, a0, a1
113; CHECK-NEXT:    addi a0, a0, -1
114; CHECK-NEXT:    and a0, a0, a1
115; CHECK-NEXT:    vmv1r.v v0, v12
116; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma
117; CHECK-NEXT:    vfncvt.f.f.w v24, v16, v0.t
118; CHECK-NEXT:    li a0, 32
119; CHECK-NEXT:    vsetvli zero, a0, e32, m8, ta, ma
120; CHECK-NEXT:    vslideup.vi v8, v24, 16
121; CHECK-NEXT:    ret
122  %v = call <32 x float> @llvm.vp.fptrunc.v32f64.v32f32(<32 x double> %a, <32 x i1> %m, i32 %vl)
123  ret <32 x float> %v
124}
125
126declare <2 x bfloat> @llvm.vp.fptrunc.v2bf16.v2f32(<2 x float>, <2 x i1>, i32)
127
128define <2 x bfloat> @vfptrunc_v2bf16_v2f32(<2 x float> %a, <2 x i1> %m, i32 zeroext %vl) {
129; CHECK-LABEL: vfptrunc_v2bf16_v2f32:
130; CHECK:       # %bb.0:
131; CHECK-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
132; CHECK-NEXT:    vfncvtbf16.f.f.w v9, v8, v0.t
133; CHECK-NEXT:    vmv1r.v v8, v9
134; CHECK-NEXT:    ret
135  %v = call <2 x bfloat> @llvm.vp.fptrunc.v2bf16.v2f32(<2 x float> %a, <2 x i1> %m, i32 %vl)
136  ret <2 x bfloat> %v
137}
138
139define <2 x bfloat> @vfptrunc_v2bf16_v2f32_unmasked(<2 x float> %a, i32 zeroext %vl) {
140; CHECK-LABEL: vfptrunc_v2bf16_v2f32_unmasked:
141; CHECK:       # %bb.0:
142; CHECK-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
143; CHECK-NEXT:    vfncvtbf16.f.f.w v9, v8
144; CHECK-NEXT:    vmv1r.v v8, v9
145; CHECK-NEXT:    ret
146  %v = call <2 x bfloat> @llvm.vp.fptrunc.v2bf16.v2f32(<2 x float> %a, <2 x i1> shufflevector (<2 x i1> insertelement (<2 x i1> undef, i1 true, i32 0), <2 x i1> undef, <2 x i32> zeroinitializer), i32 %vl)
147  ret <2 x bfloat> %v
148}
149
150declare <2 x bfloat> @llvm.vp.fptrunc.v2bf16.v2f64(<2 x double>, <2 x i1>, i32)
151
152define <2 x bfloat> @vfptrunc_v2bf16_v2f64(<2 x double> %a, <2 x i1> %m, i32 zeroext %vl) {
153; CHECK-LABEL: vfptrunc_v2bf16_v2f64:
154; CHECK:       # %bb.0:
155; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma
156; CHECK-NEXT:    vfncvt.rod.f.f.w v9, v8, v0.t
157; CHECK-NEXT:    vsetvli zero, zero, e16, mf4, ta, ma
158; CHECK-NEXT:    vfncvtbf16.f.f.w v8, v9, v0.t
159; CHECK-NEXT:    ret
160  %v = call <2 x bfloat> @llvm.vp.fptrunc.v2bf16.v2f64(<2 x double> %a, <2 x i1> %m, i32 %vl)
161  ret <2 x bfloat> %v
162}
163
164define <2 x bfloat> @vfptrunc_v2bf16_v2f64_unmasked(<2 x double> %a, i32 zeroext %vl) {
165; CHECK-LABEL: vfptrunc_v2bf16_v2f64_unmasked:
166; CHECK:       # %bb.0:
167; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma
168; CHECK-NEXT:    vfncvt.rod.f.f.w v9, v8
169; CHECK-NEXT:    vsetvli zero, zero, e16, mf4, ta, ma
170; CHECK-NEXT:    vfncvtbf16.f.f.w v8, v9
171; CHECK-NEXT:    ret
172  %v = call <2 x bfloat> @llvm.vp.fptrunc.v2bf16.v2f64(<2 x double> %a, <2 x i1> shufflevector (<2 x i1> insertelement (<2 x i1> undef, i1 true, i32 0), <2 x i1> undef, <2 x i32> zeroinitializer), i32 %vl)
173  ret <2 x bfloat> %v
174}
175