xref: /llvm-project/llvm/test/CodeGen/RISCV/rvv/ffloor-sdnode.ll (revision 9122c5235ec85ce0c0ad337e862b006e7b349d84) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=riscv32 -mattr=+d,+zvfh,+zfbfmin,+zvfbfmin,+v \
3; RUN:     -target-abi=ilp32d -verify-machineinstrs < %s | FileCheck %s \
4; RUN:     --check-prefixes=CHECK,ZVFH
5; RUN: llc -mtriple=riscv64 -mattr=+d,+zvfh,+zfbfmin,+zvfbfmin,+v \
6; RUN:     -target-abi=lp64d -verify-machineinstrs < %s | FileCheck %s \
7; RUN:     --check-prefixes=CHECK,ZVFH
8; RUN: llc -mtriple=riscv32 -mattr=+d,+zfhmin,+zvfhmin,+zfbfmin,+zvfbfmin,+v \
9; RUN:     -target-abi=ilp32d -verify-machineinstrs < %s | FileCheck %s \
10; RUN:     --check-prefixes=CHECK,ZVFHMIN
11; RUN: llc -mtriple=riscv64 -mattr=+d,+zfhmin,+zvfhmin,+zfbfmin,+zvfbfmin,+v \
12; RUN:     -target-abi=lp64d -verify-machineinstrs < %s | FileCheck %s \
13; RUN:     --check-prefixes=CHECK,ZVFHMIN
14
15define <vscale x 1 x bfloat> @floor_nxv1bf16(<vscale x 1 x bfloat> %x) {
16; CHECK-LABEL: floor_nxv1bf16:
17; CHECK:       # %bb.0:
18; CHECK-NEXT:    vsetvli a0, zero, e16, mf4, ta, ma
19; CHECK-NEXT:    vfwcvtbf16.f.f.v v9, v8
20; CHECK-NEXT:    lui a0, 307200
21; CHECK-NEXT:    vsetvli zero, zero, e32, mf2, ta, ma
22; CHECK-NEXT:    vfabs.v v8, v9
23; CHECK-NEXT:    fmv.w.x fa5, a0
24; CHECK-NEXT:    vmflt.vf v0, v8, fa5
25; CHECK-NEXT:    fsrmi a0, 2
26; CHECK-NEXT:    vfcvt.x.f.v v8, v9, v0.t
27; CHECK-NEXT:    fsrm a0
28; CHECK-NEXT:    vfcvt.f.x.v v8, v8, v0.t
29; CHECK-NEXT:    vsetvli zero, zero, e32, mf2, ta, mu
30; CHECK-NEXT:    vfsgnj.vv v9, v8, v9, v0.t
31; CHECK-NEXT:    vsetvli zero, zero, e16, mf4, ta, ma
32; CHECK-NEXT:    vfncvtbf16.f.f.w v8, v9
33; CHECK-NEXT:    ret
34  %a = call <vscale x 1 x bfloat> @llvm.floor.nxv1bf16(<vscale x 1 x bfloat> %x)
35  ret <vscale x 1 x bfloat> %a
36}
37declare <vscale x 1 x bfloat> @llvm.floor.nxv1bf16(<vscale x 1 x bfloat>)
38
39define <vscale x 2 x bfloat> @floor_nxv2bf16(<vscale x 2 x bfloat> %x) {
40; CHECK-LABEL: floor_nxv2bf16:
41; CHECK:       # %bb.0:
42; CHECK-NEXT:    vsetvli a0, zero, e16, mf2, ta, ma
43; CHECK-NEXT:    vfwcvtbf16.f.f.v v9, v8
44; CHECK-NEXT:    lui a0, 307200
45; CHECK-NEXT:    vsetvli zero, zero, e32, m1, ta, ma
46; CHECK-NEXT:    vfabs.v v8, v9
47; CHECK-NEXT:    fmv.w.x fa5, a0
48; CHECK-NEXT:    vmflt.vf v0, v8, fa5
49; CHECK-NEXT:    fsrmi a0, 2
50; CHECK-NEXT:    vfcvt.x.f.v v8, v9, v0.t
51; CHECK-NEXT:    fsrm a0
52; CHECK-NEXT:    vfcvt.f.x.v v8, v8, v0.t
53; CHECK-NEXT:    vsetvli zero, zero, e32, m1, ta, mu
54; CHECK-NEXT:    vfsgnj.vv v9, v8, v9, v0.t
55; CHECK-NEXT:    vsetvli zero, zero, e16, mf2, ta, ma
56; CHECK-NEXT:    vfncvtbf16.f.f.w v8, v9
57; CHECK-NEXT:    ret
58  %a = call <vscale x 2 x bfloat> @llvm.floor.nxv2bf16(<vscale x 2 x bfloat> %x)
59  ret <vscale x 2 x bfloat> %a
60}
61declare <vscale x 2 x bfloat> @llvm.floor.nxv2bf16(<vscale x 2 x bfloat>)
62
63define <vscale x 4 x bfloat> @floor_nxv4bf16(<vscale x 4 x bfloat> %x) {
64; CHECK-LABEL: floor_nxv4bf16:
65; CHECK:       # %bb.0:
66; CHECK-NEXT:    vsetvli a0, zero, e16, m1, ta, ma
67; CHECK-NEXT:    vfwcvtbf16.f.f.v v10, v8
68; CHECK-NEXT:    lui a0, 307200
69; CHECK-NEXT:    vsetvli zero, zero, e32, m2, ta, ma
70; CHECK-NEXT:    vfabs.v v8, v10
71; CHECK-NEXT:    fmv.w.x fa5, a0
72; CHECK-NEXT:    vmflt.vf v0, v8, fa5
73; CHECK-NEXT:    fsrmi a0, 2
74; CHECK-NEXT:    vfcvt.x.f.v v8, v10, v0.t
75; CHECK-NEXT:    fsrm a0
76; CHECK-NEXT:    vfcvt.f.x.v v8, v8, v0.t
77; CHECK-NEXT:    vsetvli zero, zero, e32, m2, ta, mu
78; CHECK-NEXT:    vfsgnj.vv v10, v8, v10, v0.t
79; CHECK-NEXT:    vsetvli zero, zero, e16, m1, ta, ma
80; CHECK-NEXT:    vfncvtbf16.f.f.w v8, v10
81; CHECK-NEXT:    ret
82  %a = call <vscale x 4 x bfloat> @llvm.floor.nxv4bf16(<vscale x 4 x bfloat> %x)
83  ret <vscale x 4 x bfloat> %a
84}
85declare <vscale x 4 x bfloat> @llvm.floor.nxv4bf16(<vscale x 4 x bfloat>)
86
87define <vscale x 8 x bfloat> @floor_nxv8bf16(<vscale x 8 x bfloat> %x) {
88; CHECK-LABEL: floor_nxv8bf16:
89; CHECK:       # %bb.0:
90; CHECK-NEXT:    vsetvli a0, zero, e16, m2, ta, ma
91; CHECK-NEXT:    vfwcvtbf16.f.f.v v12, v8
92; CHECK-NEXT:    lui a0, 307200
93; CHECK-NEXT:    vsetvli zero, zero, e32, m4, ta, ma
94; CHECK-NEXT:    vfabs.v v8, v12
95; CHECK-NEXT:    fmv.w.x fa5, a0
96; CHECK-NEXT:    vmflt.vf v0, v8, fa5
97; CHECK-NEXT:    fsrmi a0, 2
98; CHECK-NEXT:    vfcvt.x.f.v v8, v12, v0.t
99; CHECK-NEXT:    fsrm a0
100; CHECK-NEXT:    vfcvt.f.x.v v8, v8, v0.t
101; CHECK-NEXT:    vsetvli zero, zero, e32, m4, ta, mu
102; CHECK-NEXT:    vfsgnj.vv v12, v8, v12, v0.t
103; CHECK-NEXT:    vsetvli zero, zero, e16, m2, ta, ma
104; CHECK-NEXT:    vfncvtbf16.f.f.w v8, v12
105; CHECK-NEXT:    ret
106  %a = call <vscale x 8 x bfloat> @llvm.floor.nxv8bf16(<vscale x 8 x bfloat> %x)
107  ret <vscale x 8 x bfloat> %a
108}
109declare <vscale x 8 x bfloat> @llvm.floor.nxv8bf16(<vscale x 8 x bfloat>)
110
111define <vscale x 16 x bfloat> @floor_nxv16bf16(<vscale x 16 x bfloat> %x) {
112; CHECK-LABEL: floor_nxv16bf16:
113; CHECK:       # %bb.0:
114; CHECK-NEXT:    vsetvli a0, zero, e16, m4, ta, ma
115; CHECK-NEXT:    vfwcvtbf16.f.f.v v16, v8
116; CHECK-NEXT:    lui a0, 307200
117; CHECK-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
118; CHECK-NEXT:    vfabs.v v8, v16
119; CHECK-NEXT:    fmv.w.x fa5, a0
120; CHECK-NEXT:    vmflt.vf v0, v8, fa5
121; CHECK-NEXT:    fsrmi a0, 2
122; CHECK-NEXT:    vfcvt.x.f.v v8, v16, v0.t
123; CHECK-NEXT:    fsrm a0
124; CHECK-NEXT:    vfcvt.f.x.v v8, v8, v0.t
125; CHECK-NEXT:    vsetvli zero, zero, e32, m8, ta, mu
126; CHECK-NEXT:    vfsgnj.vv v16, v8, v16, v0.t
127; CHECK-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
128; CHECK-NEXT:    vfncvtbf16.f.f.w v8, v16
129; CHECK-NEXT:    ret
130  %a = call <vscale x 16 x bfloat> @llvm.floor.nxv16bf16(<vscale x 16 x bfloat> %x)
131  ret <vscale x 16 x bfloat> %a
132}
133declare <vscale x 16 x bfloat> @llvm.floor.nxv16bf16(<vscale x 16 x bfloat>)
134
135define <vscale x 32 x bfloat> @floor_nxv32bf16(<vscale x 32 x bfloat> %x) {
136; CHECK-LABEL: floor_nxv32bf16:
137; CHECK:       # %bb.0:
138; CHECK-NEXT:    vsetvli a0, zero, e16, m4, ta, ma
139; CHECK-NEXT:    vfwcvtbf16.f.f.v v16, v8
140; CHECK-NEXT:    lui a0, 307200
141; CHECK-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
142; CHECK-NEXT:    vfabs.v v24, v16
143; CHECK-NEXT:    fmv.w.x fa5, a0
144; CHECK-NEXT:    vmflt.vf v0, v24, fa5
145; CHECK-NEXT:    fsrmi a0, 2
146; CHECK-NEXT:    vfcvt.x.f.v v24, v16, v0.t
147; CHECK-NEXT:    fsrm a0
148; CHECK-NEXT:    vfcvt.f.x.v v24, v24, v0.t
149; CHECK-NEXT:    vsetvli zero, zero, e32, m8, ta, mu
150; CHECK-NEXT:    vfsgnj.vv v16, v24, v16, v0.t
151; CHECK-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
152; CHECK-NEXT:    vfwcvtbf16.f.f.v v24, v12
153; CHECK-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
154; CHECK-NEXT:    vfabs.v v8, v24
155; CHECK-NEXT:    vmflt.vf v0, v8, fa5
156; CHECK-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
157; CHECK-NEXT:    vfncvtbf16.f.f.w v8, v16
158; CHECK-NEXT:    fsrmi a0, 2
159; CHECK-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
160; CHECK-NEXT:    vfcvt.x.f.v v16, v24, v0.t
161; CHECK-NEXT:    fsrm a0
162; CHECK-NEXT:    vfcvt.f.x.v v16, v16, v0.t
163; CHECK-NEXT:    vsetvli zero, zero, e32, m8, ta, mu
164; CHECK-NEXT:    vfsgnj.vv v24, v16, v24, v0.t
165; CHECK-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
166; CHECK-NEXT:    vfncvtbf16.f.f.w v12, v24
167; CHECK-NEXT:    ret
168  %a = call <vscale x 32 x bfloat> @llvm.floor.nxv32bf16(<vscale x 32 x bfloat> %x)
169  ret <vscale x 32 x bfloat> %a
170}
171declare <vscale x 32 x bfloat> @llvm.floor.nxv32bf16(<vscale x 32 x bfloat>)
172
173define <vscale x 1 x half> @floor_nxv1f16(<vscale x 1 x half> %x) {
174; ZVFH-LABEL: floor_nxv1f16:
175; ZVFH:       # %bb.0:
176; ZVFH-NEXT:    lui a0, %hi(.LCPI6_0)
177; ZVFH-NEXT:    flh fa5, %lo(.LCPI6_0)(a0)
178; ZVFH-NEXT:    vsetvli a0, zero, e16, mf4, ta, ma
179; ZVFH-NEXT:    vfabs.v v9, v8
180; ZVFH-NEXT:    vmflt.vf v0, v9, fa5
181; ZVFH-NEXT:    fsrmi a0, 2
182; ZVFH-NEXT:    vfcvt.x.f.v v9, v8, v0.t
183; ZVFH-NEXT:    fsrm a0
184; ZVFH-NEXT:    vfcvt.f.x.v v9, v9, v0.t
185; ZVFH-NEXT:    vsetvli zero, zero, e16, mf4, ta, mu
186; ZVFH-NEXT:    vfsgnj.vv v8, v9, v8, v0.t
187; ZVFH-NEXT:    ret
188;
189; ZVFHMIN-LABEL: floor_nxv1f16:
190; ZVFHMIN:       # %bb.0:
191; ZVFHMIN-NEXT:    vsetvli a0, zero, e16, mf4, ta, ma
192; ZVFHMIN-NEXT:    vfwcvt.f.f.v v9, v8
193; ZVFHMIN-NEXT:    lui a0, 307200
194; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, mf2, ta, ma
195; ZVFHMIN-NEXT:    vfabs.v v8, v9
196; ZVFHMIN-NEXT:    fmv.w.x fa5, a0
197; ZVFHMIN-NEXT:    vmflt.vf v0, v8, fa5
198; ZVFHMIN-NEXT:    fsrmi a0, 2
199; ZVFHMIN-NEXT:    vfcvt.x.f.v v8, v9, v0.t
200; ZVFHMIN-NEXT:    fsrm a0
201; ZVFHMIN-NEXT:    vfcvt.f.x.v v8, v8, v0.t
202; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, mf2, ta, mu
203; ZVFHMIN-NEXT:    vfsgnj.vv v9, v8, v9, v0.t
204; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf4, ta, ma
205; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v9
206; ZVFHMIN-NEXT:    ret
207  %a = call <vscale x 1 x half> @llvm.floor.nxv1f16(<vscale x 1 x half> %x)
208  ret <vscale x 1 x half> %a
209}
210declare <vscale x 1 x half> @llvm.floor.nxv1f16(<vscale x 1 x half>)
211
212define <vscale x 2 x half> @floor_nxv2f16(<vscale x 2 x half> %x) {
213; ZVFH-LABEL: floor_nxv2f16:
214; ZVFH:       # %bb.0:
215; ZVFH-NEXT:    lui a0, %hi(.LCPI7_0)
216; ZVFH-NEXT:    flh fa5, %lo(.LCPI7_0)(a0)
217; ZVFH-NEXT:    vsetvli a0, zero, e16, mf2, ta, ma
218; ZVFH-NEXT:    vfabs.v v9, v8
219; ZVFH-NEXT:    vmflt.vf v0, v9, fa5
220; ZVFH-NEXT:    fsrmi a0, 2
221; ZVFH-NEXT:    vfcvt.x.f.v v9, v8, v0.t
222; ZVFH-NEXT:    fsrm a0
223; ZVFH-NEXT:    vfcvt.f.x.v v9, v9, v0.t
224; ZVFH-NEXT:    vsetvli zero, zero, e16, mf2, ta, mu
225; ZVFH-NEXT:    vfsgnj.vv v8, v9, v8, v0.t
226; ZVFH-NEXT:    ret
227;
228; ZVFHMIN-LABEL: floor_nxv2f16:
229; ZVFHMIN:       # %bb.0:
230; ZVFHMIN-NEXT:    vsetvli a0, zero, e16, mf2, ta, ma
231; ZVFHMIN-NEXT:    vfwcvt.f.f.v v9, v8
232; ZVFHMIN-NEXT:    lui a0, 307200
233; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m1, ta, ma
234; ZVFHMIN-NEXT:    vfabs.v v8, v9
235; ZVFHMIN-NEXT:    fmv.w.x fa5, a0
236; ZVFHMIN-NEXT:    vmflt.vf v0, v8, fa5
237; ZVFHMIN-NEXT:    fsrmi a0, 2
238; ZVFHMIN-NEXT:    vfcvt.x.f.v v8, v9, v0.t
239; ZVFHMIN-NEXT:    fsrm a0
240; ZVFHMIN-NEXT:    vfcvt.f.x.v v8, v8, v0.t
241; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m1, ta, mu
242; ZVFHMIN-NEXT:    vfsgnj.vv v9, v8, v9, v0.t
243; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf2, ta, ma
244; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v9
245; ZVFHMIN-NEXT:    ret
246  %a = call <vscale x 2 x half> @llvm.floor.nxv2f16(<vscale x 2 x half> %x)
247  ret <vscale x 2 x half> %a
248}
249declare <vscale x 2 x half> @llvm.floor.nxv2f16(<vscale x 2 x half>)
250
251define <vscale x 4 x half> @floor_nxv4f16(<vscale x 4 x half> %x) {
252; ZVFH-LABEL: floor_nxv4f16:
253; ZVFH:       # %bb.0:
254; ZVFH-NEXT:    lui a0, %hi(.LCPI8_0)
255; ZVFH-NEXT:    flh fa5, %lo(.LCPI8_0)(a0)
256; ZVFH-NEXT:    vsetvli a0, zero, e16, m1, ta, ma
257; ZVFH-NEXT:    vfabs.v v9, v8
258; ZVFH-NEXT:    vmflt.vf v0, v9, fa5
259; ZVFH-NEXT:    fsrmi a0, 2
260; ZVFH-NEXT:    vfcvt.x.f.v v9, v8, v0.t
261; ZVFH-NEXT:    fsrm a0
262; ZVFH-NEXT:    vfcvt.f.x.v v9, v9, v0.t
263; ZVFH-NEXT:    vsetvli zero, zero, e16, m1, ta, mu
264; ZVFH-NEXT:    vfsgnj.vv v8, v9, v8, v0.t
265; ZVFH-NEXT:    ret
266;
267; ZVFHMIN-LABEL: floor_nxv4f16:
268; ZVFHMIN:       # %bb.0:
269; ZVFHMIN-NEXT:    vsetvli a0, zero, e16, m1, ta, ma
270; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v8
271; ZVFHMIN-NEXT:    lui a0, 307200
272; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m2, ta, ma
273; ZVFHMIN-NEXT:    vfabs.v v8, v10
274; ZVFHMIN-NEXT:    fmv.w.x fa5, a0
275; ZVFHMIN-NEXT:    vmflt.vf v0, v8, fa5
276; ZVFHMIN-NEXT:    fsrmi a0, 2
277; ZVFHMIN-NEXT:    vfcvt.x.f.v v8, v10, v0.t
278; ZVFHMIN-NEXT:    fsrm a0
279; ZVFHMIN-NEXT:    vfcvt.f.x.v v8, v8, v0.t
280; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m2, ta, mu
281; ZVFHMIN-NEXT:    vfsgnj.vv v10, v8, v10, v0.t
282; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m1, ta, ma
283; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v10
284; ZVFHMIN-NEXT:    ret
285  %a = call <vscale x 4 x half> @llvm.floor.nxv4f16(<vscale x 4 x half> %x)
286  ret <vscale x 4 x half> %a
287}
288declare <vscale x 4 x half> @llvm.floor.nxv4f16(<vscale x 4 x half>)
289
290define <vscale x 8 x half> @floor_nxv8f16(<vscale x 8 x half> %x) {
291; ZVFH-LABEL: floor_nxv8f16:
292; ZVFH:       # %bb.0:
293; ZVFH-NEXT:    lui a0, %hi(.LCPI9_0)
294; ZVFH-NEXT:    flh fa5, %lo(.LCPI9_0)(a0)
295; ZVFH-NEXT:    vsetvli a0, zero, e16, m2, ta, ma
296; ZVFH-NEXT:    vfabs.v v10, v8
297; ZVFH-NEXT:    vmflt.vf v0, v10, fa5
298; ZVFH-NEXT:    fsrmi a0, 2
299; ZVFH-NEXT:    vfcvt.x.f.v v10, v8, v0.t
300; ZVFH-NEXT:    fsrm a0
301; ZVFH-NEXT:    vfcvt.f.x.v v10, v10, v0.t
302; ZVFH-NEXT:    vsetvli zero, zero, e16, m2, ta, mu
303; ZVFH-NEXT:    vfsgnj.vv v8, v10, v8, v0.t
304; ZVFH-NEXT:    ret
305;
306; ZVFHMIN-LABEL: floor_nxv8f16:
307; ZVFHMIN:       # %bb.0:
308; ZVFHMIN-NEXT:    vsetvli a0, zero, e16, m2, ta, ma
309; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v8
310; ZVFHMIN-NEXT:    lui a0, 307200
311; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m4, ta, ma
312; ZVFHMIN-NEXT:    vfabs.v v8, v12
313; ZVFHMIN-NEXT:    fmv.w.x fa5, a0
314; ZVFHMIN-NEXT:    vmflt.vf v0, v8, fa5
315; ZVFHMIN-NEXT:    fsrmi a0, 2
316; ZVFHMIN-NEXT:    vfcvt.x.f.v v8, v12, v0.t
317; ZVFHMIN-NEXT:    fsrm a0
318; ZVFHMIN-NEXT:    vfcvt.f.x.v v8, v8, v0.t
319; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m4, ta, mu
320; ZVFHMIN-NEXT:    vfsgnj.vv v12, v8, v12, v0.t
321; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m2, ta, ma
322; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v12
323; ZVFHMIN-NEXT:    ret
324  %a = call <vscale x 8 x half> @llvm.floor.nxv8f16(<vscale x 8 x half> %x)
325  ret <vscale x 8 x half> %a
326}
327declare <vscale x 8 x half> @llvm.floor.nxv8f16(<vscale x 8 x half>)
328
329define <vscale x 16 x half> @floor_nxv16f16(<vscale x 16 x half> %x) {
330; ZVFH-LABEL: floor_nxv16f16:
331; ZVFH:       # %bb.0:
332; ZVFH-NEXT:    lui a0, %hi(.LCPI10_0)
333; ZVFH-NEXT:    flh fa5, %lo(.LCPI10_0)(a0)
334; ZVFH-NEXT:    vsetvli a0, zero, e16, m4, ta, ma
335; ZVFH-NEXT:    vfabs.v v12, v8
336; ZVFH-NEXT:    vmflt.vf v0, v12, fa5
337; ZVFH-NEXT:    fsrmi a0, 2
338; ZVFH-NEXT:    vfcvt.x.f.v v12, v8, v0.t
339; ZVFH-NEXT:    fsrm a0
340; ZVFH-NEXT:    vfcvt.f.x.v v12, v12, v0.t
341; ZVFH-NEXT:    vsetvli zero, zero, e16, m4, ta, mu
342; ZVFH-NEXT:    vfsgnj.vv v8, v12, v8, v0.t
343; ZVFH-NEXT:    ret
344;
345; ZVFHMIN-LABEL: floor_nxv16f16:
346; ZVFHMIN:       # %bb.0:
347; ZVFHMIN-NEXT:    vsetvli a0, zero, e16, m4, ta, ma
348; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v8
349; ZVFHMIN-NEXT:    lui a0, 307200
350; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
351; ZVFHMIN-NEXT:    vfabs.v v8, v16
352; ZVFHMIN-NEXT:    fmv.w.x fa5, a0
353; ZVFHMIN-NEXT:    vmflt.vf v0, v8, fa5
354; ZVFHMIN-NEXT:    fsrmi a0, 2
355; ZVFHMIN-NEXT:    vfcvt.x.f.v v8, v16, v0.t
356; ZVFHMIN-NEXT:    fsrm a0
357; ZVFHMIN-NEXT:    vfcvt.f.x.v v8, v8, v0.t
358; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, mu
359; ZVFHMIN-NEXT:    vfsgnj.vv v16, v8, v16, v0.t
360; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
361; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v16
362; ZVFHMIN-NEXT:    ret
363  %a = call <vscale x 16 x half> @llvm.floor.nxv16f16(<vscale x 16 x half> %x)
364  ret <vscale x 16 x half> %a
365}
366declare <vscale x 16 x half> @llvm.floor.nxv16f16(<vscale x 16 x half>)
367
368define <vscale x 32 x half> @floor_nxv32f16(<vscale x 32 x half> %x) {
369; ZVFH-LABEL: floor_nxv32f16:
370; ZVFH:       # %bb.0:
371; ZVFH-NEXT:    lui a0, %hi(.LCPI11_0)
372; ZVFH-NEXT:    flh fa5, %lo(.LCPI11_0)(a0)
373; ZVFH-NEXT:    vsetvli a0, zero, e16, m8, ta, ma
374; ZVFH-NEXT:    vfabs.v v16, v8
375; ZVFH-NEXT:    vmflt.vf v0, v16, fa5
376; ZVFH-NEXT:    fsrmi a0, 2
377; ZVFH-NEXT:    vfcvt.x.f.v v16, v8, v0.t
378; ZVFH-NEXT:    fsrm a0
379; ZVFH-NEXT:    vfcvt.f.x.v v16, v16, v0.t
380; ZVFH-NEXT:    vsetvli zero, zero, e16, m8, ta, mu
381; ZVFH-NEXT:    vfsgnj.vv v8, v16, v8, v0.t
382; ZVFH-NEXT:    ret
383;
384; ZVFHMIN-LABEL: floor_nxv32f16:
385; ZVFHMIN:       # %bb.0:
386; ZVFHMIN-NEXT:    vsetvli a0, zero, e16, m4, ta, ma
387; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v8
388; ZVFHMIN-NEXT:    lui a0, 307200
389; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
390; ZVFHMIN-NEXT:    vfabs.v v24, v16
391; ZVFHMIN-NEXT:    fmv.w.x fa5, a0
392; ZVFHMIN-NEXT:    vmflt.vf v0, v24, fa5
393; ZVFHMIN-NEXT:    fsrmi a0, 2
394; ZVFHMIN-NEXT:    vfcvt.x.f.v v24, v16, v0.t
395; ZVFHMIN-NEXT:    fsrm a0
396; ZVFHMIN-NEXT:    vfcvt.f.x.v v24, v24, v0.t
397; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, mu
398; ZVFHMIN-NEXT:    vfsgnj.vv v16, v24, v16, v0.t
399; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
400; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v12
401; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
402; ZVFHMIN-NEXT:    vfabs.v v8, v24
403; ZVFHMIN-NEXT:    vmflt.vf v0, v8, fa5
404; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
405; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v16
406; ZVFHMIN-NEXT:    fsrmi a0, 2
407; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
408; ZVFHMIN-NEXT:    vfcvt.x.f.v v16, v24, v0.t
409; ZVFHMIN-NEXT:    fsrm a0
410; ZVFHMIN-NEXT:    vfcvt.f.x.v v16, v16, v0.t
411; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, mu
412; ZVFHMIN-NEXT:    vfsgnj.vv v24, v16, v24, v0.t
413; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
414; ZVFHMIN-NEXT:    vfncvt.f.f.w v12, v24
415; ZVFHMIN-NEXT:    ret
416  %a = call <vscale x 32 x half> @llvm.floor.nxv32f16(<vscale x 32 x half> %x)
417  ret <vscale x 32 x half> %a
418}
419declare <vscale x 32 x half> @llvm.floor.nxv32f16(<vscale x 32 x half>)
420
421define <vscale x 1 x float> @floor_nxv1f32(<vscale x 1 x float> %x) {
422; CHECK-LABEL: floor_nxv1f32:
423; CHECK:       # %bb.0:
424; CHECK-NEXT:    vsetvli a0, zero, e32, mf2, ta, ma
425; CHECK-NEXT:    vfabs.v v9, v8
426; CHECK-NEXT:    lui a0, 307200
427; CHECK-NEXT:    fmv.w.x fa5, a0
428; CHECK-NEXT:    vmflt.vf v0, v9, fa5
429; CHECK-NEXT:    fsrmi a0, 2
430; CHECK-NEXT:    vfcvt.x.f.v v9, v8, v0.t
431; CHECK-NEXT:    fsrm a0
432; CHECK-NEXT:    vfcvt.f.x.v v9, v9, v0.t
433; CHECK-NEXT:    vsetvli zero, zero, e32, mf2, ta, mu
434; CHECK-NEXT:    vfsgnj.vv v8, v9, v8, v0.t
435; CHECK-NEXT:    ret
436  %a = call <vscale x 1 x float> @llvm.floor.nxv1f32(<vscale x 1 x float> %x)
437  ret <vscale x 1 x float> %a
438}
439declare <vscale x 1 x float> @llvm.floor.nxv1f32(<vscale x 1 x float>)
440
441define <vscale x 2 x float> @floor_nxv2f32(<vscale x 2 x float> %x) {
442; CHECK-LABEL: floor_nxv2f32:
443; CHECK:       # %bb.0:
444; CHECK-NEXT:    vsetvli a0, zero, e32, m1, ta, ma
445; CHECK-NEXT:    vfabs.v v9, v8
446; CHECK-NEXT:    lui a0, 307200
447; CHECK-NEXT:    fmv.w.x fa5, a0
448; CHECK-NEXT:    vmflt.vf v0, v9, fa5
449; CHECK-NEXT:    fsrmi a0, 2
450; CHECK-NEXT:    vfcvt.x.f.v v9, v8, v0.t
451; CHECK-NEXT:    fsrm a0
452; CHECK-NEXT:    vfcvt.f.x.v v9, v9, v0.t
453; CHECK-NEXT:    vsetvli zero, zero, e32, m1, ta, mu
454; CHECK-NEXT:    vfsgnj.vv v8, v9, v8, v0.t
455; CHECK-NEXT:    ret
456  %a = call <vscale x 2 x float> @llvm.floor.nxv2f32(<vscale x 2 x float> %x)
457  ret <vscale x 2 x float> %a
458}
459declare <vscale x 2 x float> @llvm.floor.nxv2f32(<vscale x 2 x float>)
460
461define <vscale x 4 x float> @floor_nxv4f32(<vscale x 4 x float> %x) {
462; CHECK-LABEL: floor_nxv4f32:
463; CHECK:       # %bb.0:
464; CHECK-NEXT:    vsetvli a0, zero, e32, m2, ta, ma
465; CHECK-NEXT:    vfabs.v v10, v8
466; CHECK-NEXT:    lui a0, 307200
467; CHECK-NEXT:    fmv.w.x fa5, a0
468; CHECK-NEXT:    vmflt.vf v0, v10, fa5
469; CHECK-NEXT:    fsrmi a0, 2
470; CHECK-NEXT:    vfcvt.x.f.v v10, v8, v0.t
471; CHECK-NEXT:    fsrm a0
472; CHECK-NEXT:    vfcvt.f.x.v v10, v10, v0.t
473; CHECK-NEXT:    vsetvli zero, zero, e32, m2, ta, mu
474; CHECK-NEXT:    vfsgnj.vv v8, v10, v8, v0.t
475; CHECK-NEXT:    ret
476  %a = call <vscale x 4 x float> @llvm.floor.nxv4f32(<vscale x 4 x float> %x)
477  ret <vscale x 4 x float> %a
478}
479declare <vscale x 4 x float> @llvm.floor.nxv4f32(<vscale x 4 x float>)
480
481define <vscale x 8 x float> @floor_nxv8f32(<vscale x 8 x float> %x) {
482; CHECK-LABEL: floor_nxv8f32:
483; CHECK:       # %bb.0:
484; CHECK-NEXT:    vsetvli a0, zero, e32, m4, ta, ma
485; CHECK-NEXT:    vfabs.v v12, v8
486; CHECK-NEXT:    lui a0, 307200
487; CHECK-NEXT:    fmv.w.x fa5, a0
488; CHECK-NEXT:    vmflt.vf v0, v12, fa5
489; CHECK-NEXT:    fsrmi a0, 2
490; CHECK-NEXT:    vfcvt.x.f.v v12, v8, v0.t
491; CHECK-NEXT:    fsrm a0
492; CHECK-NEXT:    vfcvt.f.x.v v12, v12, v0.t
493; CHECK-NEXT:    vsetvli zero, zero, e32, m4, ta, mu
494; CHECK-NEXT:    vfsgnj.vv v8, v12, v8, v0.t
495; CHECK-NEXT:    ret
496  %a = call <vscale x 8 x float> @llvm.floor.nxv8f32(<vscale x 8 x float> %x)
497  ret <vscale x 8 x float> %a
498}
499declare <vscale x 8 x float> @llvm.floor.nxv8f32(<vscale x 8 x float>)
500
501define <vscale x 16 x float> @floor_nxv16f32(<vscale x 16 x float> %x) {
502; CHECK-LABEL: floor_nxv16f32:
503; CHECK:       # %bb.0:
504; CHECK-NEXT:    vsetvli a0, zero, e32, m8, ta, ma
505; CHECK-NEXT:    vfabs.v v16, v8
506; CHECK-NEXT:    lui a0, 307200
507; CHECK-NEXT:    fmv.w.x fa5, a0
508; CHECK-NEXT:    vmflt.vf v0, v16, fa5
509; CHECK-NEXT:    fsrmi a0, 2
510; CHECK-NEXT:    vfcvt.x.f.v v16, v8, v0.t
511; CHECK-NEXT:    fsrm a0
512; CHECK-NEXT:    vfcvt.f.x.v v16, v16, v0.t
513; CHECK-NEXT:    vsetvli zero, zero, e32, m8, ta, mu
514; CHECK-NEXT:    vfsgnj.vv v8, v16, v8, v0.t
515; CHECK-NEXT:    ret
516  %a = call <vscale x 16 x float> @llvm.floor.nxv16f32(<vscale x 16 x float> %x)
517  ret <vscale x 16 x float> %a
518}
519declare <vscale x 16 x float> @llvm.floor.nxv16f32(<vscale x 16 x float>)
520
521define <vscale x 1 x double> @floor_nxv1f64(<vscale x 1 x double> %x) {
522; CHECK-LABEL: floor_nxv1f64:
523; CHECK:       # %bb.0:
524; CHECK-NEXT:    lui a0, %hi(.LCPI17_0)
525; CHECK-NEXT:    fld fa5, %lo(.LCPI17_0)(a0)
526; CHECK-NEXT:    vsetvli a0, zero, e64, m1, ta, ma
527; CHECK-NEXT:    vfabs.v v9, v8
528; CHECK-NEXT:    vmflt.vf v0, v9, fa5
529; CHECK-NEXT:    fsrmi a0, 2
530; CHECK-NEXT:    vfcvt.x.f.v v9, v8, v0.t
531; CHECK-NEXT:    fsrm a0
532; CHECK-NEXT:    vfcvt.f.x.v v9, v9, v0.t
533; CHECK-NEXT:    vsetvli zero, zero, e64, m1, ta, mu
534; CHECK-NEXT:    vfsgnj.vv v8, v9, v8, v0.t
535; CHECK-NEXT:    ret
536  %a = call <vscale x 1 x double> @llvm.floor.nxv1f64(<vscale x 1 x double> %x)
537  ret <vscale x 1 x double> %a
538}
539declare <vscale x 1 x double> @llvm.floor.nxv1f64(<vscale x 1 x double>)
540
541define <vscale x 2 x double> @floor_nxv2f64(<vscale x 2 x double> %x) {
542; CHECK-LABEL: floor_nxv2f64:
543; CHECK:       # %bb.0:
544; CHECK-NEXT:    lui a0, %hi(.LCPI18_0)
545; CHECK-NEXT:    fld fa5, %lo(.LCPI18_0)(a0)
546; CHECK-NEXT:    vsetvli a0, zero, e64, m2, ta, ma
547; CHECK-NEXT:    vfabs.v v10, v8
548; CHECK-NEXT:    vmflt.vf v0, v10, fa5
549; CHECK-NEXT:    fsrmi a0, 2
550; CHECK-NEXT:    vfcvt.x.f.v v10, v8, v0.t
551; CHECK-NEXT:    fsrm a0
552; CHECK-NEXT:    vfcvt.f.x.v v10, v10, v0.t
553; CHECK-NEXT:    vsetvli zero, zero, e64, m2, ta, mu
554; CHECK-NEXT:    vfsgnj.vv v8, v10, v8, v0.t
555; CHECK-NEXT:    ret
556  %a = call <vscale x 2 x double> @llvm.floor.nxv2f64(<vscale x 2 x double> %x)
557  ret <vscale x 2 x double> %a
558}
559declare <vscale x 2 x double> @llvm.floor.nxv2f64(<vscale x 2 x double>)
560
561define <vscale x 4 x double> @floor_nxv4f64(<vscale x 4 x double> %x) {
562; CHECK-LABEL: floor_nxv4f64:
563; CHECK:       # %bb.0:
564; CHECK-NEXT:    lui a0, %hi(.LCPI19_0)
565; CHECK-NEXT:    fld fa5, %lo(.LCPI19_0)(a0)
566; CHECK-NEXT:    vsetvli a0, zero, e64, m4, ta, ma
567; CHECK-NEXT:    vfabs.v v12, v8
568; CHECK-NEXT:    vmflt.vf v0, v12, fa5
569; CHECK-NEXT:    fsrmi a0, 2
570; CHECK-NEXT:    vfcvt.x.f.v v12, v8, v0.t
571; CHECK-NEXT:    fsrm a0
572; CHECK-NEXT:    vfcvt.f.x.v v12, v12, v0.t
573; CHECK-NEXT:    vsetvli zero, zero, e64, m4, ta, mu
574; CHECK-NEXT:    vfsgnj.vv v8, v12, v8, v0.t
575; CHECK-NEXT:    ret
576  %a = call <vscale x 4 x double> @llvm.floor.nxv4f64(<vscale x 4 x double> %x)
577  ret <vscale x 4 x double> %a
578}
579declare <vscale x 4 x double> @llvm.floor.nxv4f64(<vscale x 4 x double>)
580
581define <vscale x 8 x double> @floor_nxv8f64(<vscale x 8 x double> %x) {
582; CHECK-LABEL: floor_nxv8f64:
583; CHECK:       # %bb.0:
584; CHECK-NEXT:    lui a0, %hi(.LCPI20_0)
585; CHECK-NEXT:    fld fa5, %lo(.LCPI20_0)(a0)
586; CHECK-NEXT:    vsetvli a0, zero, e64, m8, ta, ma
587; CHECK-NEXT:    vfabs.v v16, v8
588; CHECK-NEXT:    vmflt.vf v0, v16, fa5
589; CHECK-NEXT:    fsrmi a0, 2
590; CHECK-NEXT:    vfcvt.x.f.v v16, v8, v0.t
591; CHECK-NEXT:    fsrm a0
592; CHECK-NEXT:    vfcvt.f.x.v v16, v16, v0.t
593; CHECK-NEXT:    vsetvli zero, zero, e64, m8, ta, mu
594; CHECK-NEXT:    vfsgnj.vv v8, v16, v8, v0.t
595; CHECK-NEXT:    ret
596  %a = call <vscale x 8 x double> @llvm.floor.nxv8f64(<vscale x 8 x double> %x)
597  ret <vscale x 8 x double> %a
598}
599declare <vscale x 8 x double> @llvm.floor.nxv8f64(<vscale x 8 x double>)
600