xref: /llvm-project/llvm/test/CodeGen/RISCV/rvv/expandload.ll (revision b6c0f1bfa79a3a32d841ac5ab1f94c3aee3b5d90) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
2; RUN: llc -verify-machineinstrs -mtriple=riscv32 -mattr=+v,+d,+m,+zbb %s -o - \
3; RUN:   | FileCheck %s --check-prefixes=CHECK,CHECK-RV32
4; RUN: llc -verify-machineinstrs -mtriple=riscv64 -mattr=+v,+d,+m,+zbb %s -o - \
5; RUN:   | FileCheck %s --check-prefixes=CHECK,CHECK-RV64
6
7; Load + expand for i8 type
8
9define <1 x i8> @test_expandload_v1i8(ptr %base, <1 x i1> %mask, <1 x i8> %passthru) {
10; CHECK-LABEL: test_expandload_v1i8:
11; CHECK:       # %bb.0:
12; CHECK-NEXT:    vsetivli zero, 1, e8, mf8, ta, ma
13; CHECK-NEXT:    vcpop.m a1, v0
14; CHECK-NEXT:    vsetvli zero, a1, e8, mf8, ta, ma
15; CHECK-NEXT:    vle8.v v9, (a0)
16; CHECK-NEXT:    vsetivli zero, 1, e8, mf8, ta, mu
17; CHECK-NEXT:    viota.m v10, v0
18; CHECK-NEXT:    vrgather.vv v8, v9, v10, v0.t
19; CHECK-NEXT:    ret
20  %res = call <1 x i8> @llvm.masked.expandload.v1i8(ptr align 1 %base, <1 x i1> %mask, <1 x i8> %passthru)
21  ret <1 x i8> %res
22}
23
24define <1 x i8> @test_expandload_v1i8_all_ones(ptr %base, <1 x i8> %passthru) {
25; CHECK-LABEL: test_expandload_v1i8_all_ones:
26; CHECK:       # %bb.0:
27; CHECK-NEXT:    vsetivli zero, 1, e8, mf8, ta, ma
28; CHECK-NEXT:    vle8.v v8, (a0)
29; CHECK-NEXT:    ret
30  %res = call <1 x i8> @llvm.masked.expandload.v1i8(ptr align 1 %base, <1 x i1> splat (i1 true), <1 x i8> %passthru)
31  ret <1 x i8> %res
32}
33
34define <2 x i8> @test_expandload_v2i8(ptr %base, <2 x i1> %mask, <2 x i8> %passthru) {
35; CHECK-LABEL: test_expandload_v2i8:
36; CHECK:       # %bb.0:
37; CHECK-NEXT:    vsetivli zero, 2, e8, mf8, ta, ma
38; CHECK-NEXT:    vcpop.m a1, v0
39; CHECK-NEXT:    vsetvli zero, a1, e8, mf8, ta, ma
40; CHECK-NEXT:    vle8.v v9, (a0)
41; CHECK-NEXT:    vsetivli zero, 2, e8, mf8, ta, mu
42; CHECK-NEXT:    viota.m v10, v0
43; CHECK-NEXT:    vrgather.vv v8, v9, v10, v0.t
44; CHECK-NEXT:    ret
45  %res = call <2 x i8> @llvm.masked.expandload.v2i8(ptr align 1 %base, <2 x i1> %mask, <2 x i8> %passthru)
46  ret <2 x i8> %res
47}
48
49define <2 x i8> @test_expandload_v2i8_all_ones(ptr %base, <2 x i8> %passthru) {
50; CHECK-LABEL: test_expandload_v2i8_all_ones:
51; CHECK:       # %bb.0:
52; CHECK-NEXT:    vsetivli zero, 2, e8, mf8, ta, ma
53; CHECK-NEXT:    vle8.v v8, (a0)
54; CHECK-NEXT:    ret
55  %res = call <2 x i8> @llvm.masked.expandload.v2i8(ptr align 1 %base, <2 x i1> splat (i1 true), <2 x i8> %passthru)
56  ret <2 x i8> %res
57}
58
59define <4 x i8> @test_expandload_v4i8(ptr %base, <4 x i1> %mask, <4 x i8> %passthru) {
60; CHECK-LABEL: test_expandload_v4i8:
61; CHECK:       # %bb.0:
62; CHECK-NEXT:    vsetivli zero, 4, e8, mf4, ta, ma
63; CHECK-NEXT:    vcpop.m a1, v0
64; CHECK-NEXT:    vsetvli zero, a1, e8, mf4, ta, ma
65; CHECK-NEXT:    vle8.v v9, (a0)
66; CHECK-NEXT:    vsetivli zero, 4, e8, mf4, ta, mu
67; CHECK-NEXT:    viota.m v10, v0
68; CHECK-NEXT:    vrgather.vv v8, v9, v10, v0.t
69; CHECK-NEXT:    ret
70  %res = call <4 x i8> @llvm.masked.expandload.v4i8(ptr align 1 %base, <4 x i1> %mask, <4 x i8> %passthru)
71  ret <4 x i8> %res
72}
73
74define <4 x i8> @test_expandload_v4i8_all_ones(ptr %base, <4 x i8> %passthru) {
75; CHECK-LABEL: test_expandload_v4i8_all_ones:
76; CHECK:       # %bb.0:
77; CHECK-NEXT:    vsetivli zero, 4, e8, mf4, ta, ma
78; CHECK-NEXT:    vle8.v v8, (a0)
79; CHECK-NEXT:    ret
80  %res = call <4 x i8> @llvm.masked.expandload.v4i8(ptr align 1 %base, <4 x i1> splat (i1 true), <4 x i8> %passthru)
81  ret <4 x i8> %res
82}
83
84define <8 x i8> @test_expandload_v8i8(ptr %base, <8 x i1> %mask, <8 x i8> %passthru) {
85; CHECK-LABEL: test_expandload_v8i8:
86; CHECK:       # %bb.0:
87; CHECK-NEXT:    vsetivli zero, 8, e8, mf2, ta, ma
88; CHECK-NEXT:    vcpop.m a1, v0
89; CHECK-NEXT:    vsetvli zero, a1, e8, mf2, ta, ma
90; CHECK-NEXT:    vle8.v v9, (a0)
91; CHECK-NEXT:    vsetivli zero, 8, e8, mf2, ta, mu
92; CHECK-NEXT:    viota.m v10, v0
93; CHECK-NEXT:    vrgather.vv v8, v9, v10, v0.t
94; CHECK-NEXT:    ret
95  %res = call <8 x i8> @llvm.masked.expandload.v8i8(ptr align 1 %base, <8 x i1> %mask, <8 x i8> %passthru)
96  ret <8 x i8> %res
97}
98
99define <8 x i8> @test_expandload_v8i8_all_ones(ptr %base, <8 x i8> %passthru) {
100; CHECK-LABEL: test_expandload_v8i8_all_ones:
101; CHECK:       # %bb.0:
102; CHECK-NEXT:    vsetivli zero, 8, e8, mf2, ta, ma
103; CHECK-NEXT:    vle8.v v8, (a0)
104; CHECK-NEXT:    ret
105  %res = call <8 x i8> @llvm.masked.expandload.v8i8(ptr align 1 %base, <8 x i1> splat (i1 true), <8 x i8> %passthru)
106  ret <8 x i8> %res
107}
108
109define <16 x i8> @test_expandload_v16i8(ptr %base, <16 x i1> %mask, <16 x i8> %passthru) {
110; CHECK-LABEL: test_expandload_v16i8:
111; CHECK:       # %bb.0:
112; CHECK-NEXT:    vsetivli zero, 16, e8, m1, ta, ma
113; CHECK-NEXT:    vcpop.m a1, v0
114; CHECK-NEXT:    vsetvli zero, a1, e8, m1, ta, ma
115; CHECK-NEXT:    vle8.v v9, (a0)
116; CHECK-NEXT:    vsetivli zero, 16, e8, m1, ta, mu
117; CHECK-NEXT:    viota.m v10, v0
118; CHECK-NEXT:    vrgather.vv v8, v9, v10, v0.t
119; CHECK-NEXT:    ret
120  %res = call <16 x i8> @llvm.masked.expandload.v16i8(ptr align 1 %base, <16 x i1> %mask, <16 x i8> %passthru)
121  ret <16 x i8> %res
122}
123
124define <16 x i8> @test_expandload_v16i8_all_ones(ptr %base, <16 x i8> %passthru) {
125; CHECK-LABEL: test_expandload_v16i8_all_ones:
126; CHECK:       # %bb.0:
127; CHECK-NEXT:    vsetivli zero, 16, e8, m1, ta, ma
128; CHECK-NEXT:    vle8.v v8, (a0)
129; CHECK-NEXT:    ret
130  %res = call <16 x i8> @llvm.masked.expandload.v16i8(ptr align 1 %base, <16 x i1> splat (i1 true), <16 x i8> %passthru)
131  ret <16 x i8> %res
132}
133
134define <32 x i8> @test_expandload_v32i8(ptr %base, <32 x i1> %mask, <32 x i8> %passthru) {
135; CHECK-LABEL: test_expandload_v32i8:
136; CHECK:       # %bb.0:
137; CHECK-NEXT:    li a1, 32
138; CHECK-NEXT:    vsetvli zero, a1, e8, m2, ta, ma
139; CHECK-NEXT:    vcpop.m a2, v0
140; CHECK-NEXT:    vsetvli zero, a2, e8, m2, ta, ma
141; CHECK-NEXT:    vle8.v v10, (a0)
142; CHECK-NEXT:    vsetvli zero, a1, e8, m2, ta, mu
143; CHECK-NEXT:    viota.m v12, v0
144; CHECK-NEXT:    vrgather.vv v8, v10, v12, v0.t
145; CHECK-NEXT:    ret
146  %res = call <32 x i8> @llvm.masked.expandload.v32i8(ptr align 1 %base, <32 x i1> %mask, <32 x i8> %passthru)
147  ret <32 x i8> %res
148}
149
150define <32 x i8> @test_expandload_v32i8_all_ones(ptr %base, <32 x i8> %passthru) {
151; CHECK-LABEL: test_expandload_v32i8_all_ones:
152; CHECK:       # %bb.0:
153; CHECK-NEXT:    li a1, 32
154; CHECK-NEXT:    vsetvli zero, a1, e8, m2, ta, ma
155; CHECK-NEXT:    vle8.v v8, (a0)
156; CHECK-NEXT:    ret
157  %res = call <32 x i8> @llvm.masked.expandload.v32i8(ptr align 1 %base, <32 x i1> splat (i1 true), <32 x i8> %passthru)
158  ret <32 x i8> %res
159}
160
161define <64 x i8> @test_expandload_v64i8(ptr %base, <64 x i1> %mask, <64 x i8> %passthru) {
162; CHECK-LABEL: test_expandload_v64i8:
163; CHECK:       # %bb.0:
164; CHECK-NEXT:    li a1, 64
165; CHECK-NEXT:    vsetvli zero, a1, e8, m4, ta, ma
166; CHECK-NEXT:    vcpop.m a2, v0
167; CHECK-NEXT:    vsetvli zero, a2, e8, m4, ta, ma
168; CHECK-NEXT:    vle8.v v12, (a0)
169; CHECK-NEXT:    vsetvli zero, a1, e8, m4, ta, mu
170; CHECK-NEXT:    viota.m v16, v0
171; CHECK-NEXT:    vrgather.vv v8, v12, v16, v0.t
172; CHECK-NEXT:    ret
173  %res = call <64 x i8> @llvm.masked.expandload.v64i8(ptr align 1 %base, <64 x i1> %mask, <64 x i8> %passthru)
174  ret <64 x i8> %res
175}
176
177define <64 x i8> @test_expandload_v64i8_all_ones(ptr %base, <64 x i8> %passthru) {
178; CHECK-LABEL: test_expandload_v64i8_all_ones:
179; CHECK:       # %bb.0:
180; CHECK-NEXT:    li a1, 64
181; CHECK-NEXT:    vsetvli zero, a1, e8, m4, ta, ma
182; CHECK-NEXT:    vle8.v v8, (a0)
183; CHECK-NEXT:    ret
184  %res = call <64 x i8> @llvm.masked.expandload.v64i8(ptr align 1 %base, <64 x i1> splat (i1 true), <64 x i8> %passthru)
185  ret <64 x i8> %res
186}
187
188define <128 x i8> @test_expandload_v128i8(ptr %base, <128 x i1> %mask, <128 x i8> %passthru) {
189; CHECK-LABEL: test_expandload_v128i8:
190; CHECK:       # %bb.0:
191; CHECK-NEXT:    li a1, 128
192; CHECK-NEXT:    vsetvli zero, a1, e8, m8, ta, ma
193; CHECK-NEXT:    vcpop.m a2, v0
194; CHECK-NEXT:    vsetvli zero, a2, e8, m8, ta, ma
195; CHECK-NEXT:    vle8.v v16, (a0)
196; CHECK-NEXT:    vsetvli zero, a1, e8, m8, ta, mu
197; CHECK-NEXT:    viota.m v24, v0
198; CHECK-NEXT:    vrgather.vv v8, v16, v24, v0.t
199; CHECK-NEXT:    ret
200  %res = call <128 x i8> @llvm.masked.expandload.v128i8(ptr align 1 %base, <128 x i1> %mask, <128 x i8> %passthru)
201  ret <128 x i8> %res
202}
203
204define <128 x i8> @test_expandload_v128i8_all_ones(ptr %base, <128 x i8> %passthru) {
205; CHECK-LABEL: test_expandload_v128i8_all_ones:
206; CHECK:       # %bb.0:
207; CHECK-NEXT:    li a1, 128
208; CHECK-NEXT:    vsetvli zero, a1, e8, m8, ta, ma
209; CHECK-NEXT:    vle8.v v8, (a0)
210; CHECK-NEXT:    ret
211  %res = call <128 x i8> @llvm.masked.expandload.v128i8(ptr align 1 %base, <128 x i1> splat (i1 true), <128 x i8> %passthru)
212  ret <128 x i8> %res
213}
214
215define <256 x i8> @test_expandload_v256i8(ptr %base, <256 x i1> %mask, <256 x i8> %passthru) {
216; CHECK-RV32-LABEL: test_expandload_v256i8:
217; CHECK-RV32:       # %bb.0:
218; CHECK-RV32-NEXT:    addi sp, sp, -16
219; CHECK-RV32-NEXT:    .cfi_def_cfa_offset 16
220; CHECK-RV32-NEXT:    csrr a2, vlenb
221; CHECK-RV32-NEXT:    slli a2, a2, 5
222; CHECK-RV32-NEXT:    sub sp, sp, a2
223; CHECK-RV32-NEXT:    .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 32 * vlenb
224; CHECK-RV32-NEXT:    csrr a2, vlenb
225; CHECK-RV32-NEXT:    li a3, 24
226; CHECK-RV32-NEXT:    mul a2, a2, a3
227; CHECK-RV32-NEXT:    add a2, sp, a2
228; CHECK-RV32-NEXT:    addi a2, a2, 16
229; CHECK-RV32-NEXT:    vs8r.v v16, (a2) # Unknown-size Folded Spill
230; CHECK-RV32-NEXT:    vsetivli zero, 1, e64, m1, ta, ma
231; CHECK-RV32-NEXT:    vmv1r.v v7, v8
232; CHECK-RV32-NEXT:    li a2, 128
233; CHECK-RV32-NEXT:    vslidedown.vi v9, v0, 1
234; CHECK-RV32-NEXT:    li a3, 32
235; CHECK-RV32-NEXT:    vmv.x.s a4, v0
236; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, ta, ma
237; CHECK-RV32-NEXT:    vle8.v v16, (a1)
238; CHECK-RV32-NEXT:    csrr a1, vlenb
239; CHECK-RV32-NEXT:    slli a1, a1, 3
240; CHECK-RV32-NEXT:    add a1, sp, a1
241; CHECK-RV32-NEXT:    addi a1, a1, 16
242; CHECK-RV32-NEXT:    vs8r.v v16, (a1) # Unknown-size Folded Spill
243; CHECK-RV32-NEXT:    vsetivli zero, 1, e64, m1, ta, ma
244; CHECK-RV32-NEXT:    vsrl.vx v10, v9, a3
245; CHECK-RV32-NEXT:    vsrl.vx v11, v0, a3
246; CHECK-RV32-NEXT:    vmv.x.s a1, v9
247; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, ta, ma
248; CHECK-RV32-NEXT:    vcpop.m a3, v0
249; CHECK-RV32-NEXT:    cpop a4, a4
250; CHECK-RV32-NEXT:    vsetvli zero, a2, e64, m1, ta, ma
251; CHECK-RV32-NEXT:    vmv.x.s a5, v10
252; CHECK-RV32-NEXT:    vmv.x.s a6, v11
253; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, ta, ma
254; CHECK-RV32-NEXT:    vle8.v v8, (a0)
255; CHECK-RV32-NEXT:    csrr a3, vlenb
256; CHECK-RV32-NEXT:    slli a3, a3, 4
257; CHECK-RV32-NEXT:    add a3, sp, a3
258; CHECK-RV32-NEXT:    addi a3, a3, 16
259; CHECK-RV32-NEXT:    vs8r.v v8, (a3) # Unknown-size Folded Spill
260; CHECK-RV32-NEXT:    cpop a1, a1
261; CHECK-RV32-NEXT:    cpop a3, a6
262; CHECK-RV32-NEXT:    cpop a5, a5
263; CHECK-RV32-NEXT:    add a3, a4, a3
264; CHECK-RV32-NEXT:    add a1, a1, a5
265; CHECK-RV32-NEXT:    add a1, a3, a1
266; CHECK-RV32-NEXT:    add a0, a0, a1
267; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, ta, ma
268; CHECK-RV32-NEXT:    vcpop.m a1, v7
269; CHECK-RV32-NEXT:    vsetvli zero, a1, e8, m8, ta, ma
270; CHECK-RV32-NEXT:    vle8.v v8, (a0)
271; CHECK-RV32-NEXT:    addi a0, sp, 16
272; CHECK-RV32-NEXT:    vs8r.v v8, (a0) # Unknown-size Folded Spill
273; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, ta, mu
274; CHECK-RV32-NEXT:    viota.m v24, v0
275; CHECK-RV32-NEXT:    csrr a0, vlenb
276; CHECK-RV32-NEXT:    li a1, 24
277; CHECK-RV32-NEXT:    mul a0, a0, a1
278; CHECK-RV32-NEXT:    add a0, sp, a0
279; CHECK-RV32-NEXT:    addi a0, a0, 16
280; CHECK-RV32-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
281; CHECK-RV32-NEXT:    csrr a0, vlenb
282; CHECK-RV32-NEXT:    slli a0, a0, 4
283; CHECK-RV32-NEXT:    add a0, sp, a0
284; CHECK-RV32-NEXT:    addi a0, a0, 16
285; CHECK-RV32-NEXT:    vl8r.v v16, (a0) # Unknown-size Folded Reload
286; CHECK-RV32-NEXT:    vrgather.vv v8, v16, v24, v0.t
287; CHECK-RV32-NEXT:    csrr a0, vlenb
288; CHECK-RV32-NEXT:    li a1, 24
289; CHECK-RV32-NEXT:    mul a0, a0, a1
290; CHECK-RV32-NEXT:    add a0, sp, a0
291; CHECK-RV32-NEXT:    addi a0, a0, 16
292; CHECK-RV32-NEXT:    vs8r.v v8, (a0) # Unknown-size Folded Spill
293; CHECK-RV32-NEXT:    viota.m v16, v7
294; CHECK-RV32-NEXT:    csrr a0, vlenb
295; CHECK-RV32-NEXT:    slli a0, a0, 4
296; CHECK-RV32-NEXT:    add a0, sp, a0
297; CHECK-RV32-NEXT:    addi a0, a0, 16
298; CHECK-RV32-NEXT:    vs8r.v v16, (a0) # Unknown-size Folded Spill
299; CHECK-RV32-NEXT:    vmv1r.v v0, v7
300; CHECK-RV32-NEXT:    csrr a0, vlenb
301; CHECK-RV32-NEXT:    slli a0, a0, 3
302; CHECK-RV32-NEXT:    add a0, sp, a0
303; CHECK-RV32-NEXT:    addi a0, a0, 16
304; CHECK-RV32-NEXT:    vl8r.v v16, (a0) # Unknown-size Folded Reload
305; CHECK-RV32-NEXT:    addi a0, sp, 16
306; CHECK-RV32-NEXT:    vl8r.v v24, (a0) # Unknown-size Folded Reload
307; CHECK-RV32-NEXT:    csrr a0, vlenb
308; CHECK-RV32-NEXT:    slli a0, a0, 4
309; CHECK-RV32-NEXT:    add a0, sp, a0
310; CHECK-RV32-NEXT:    addi a0, a0, 16
311; CHECK-RV32-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
312; CHECK-RV32-NEXT:    vrgather.vv v16, v24, v8, v0.t
313; CHECK-RV32-NEXT:    csrr a0, vlenb
314; CHECK-RV32-NEXT:    li a1, 24
315; CHECK-RV32-NEXT:    mul a0, a0, a1
316; CHECK-RV32-NEXT:    add a0, sp, a0
317; CHECK-RV32-NEXT:    addi a0, a0, 16
318; CHECK-RV32-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
319; CHECK-RV32-NEXT:    csrr a0, vlenb
320; CHECK-RV32-NEXT:    slli a0, a0, 5
321; CHECK-RV32-NEXT:    add sp, sp, a0
322; CHECK-RV32-NEXT:    .cfi_def_cfa sp, 16
323; CHECK-RV32-NEXT:    addi sp, sp, 16
324; CHECK-RV32-NEXT:    .cfi_def_cfa_offset 0
325; CHECK-RV32-NEXT:    ret
326;
327; CHECK-RV64-LABEL: test_expandload_v256i8:
328; CHECK-RV64:       # %bb.0:
329; CHECK-RV64-NEXT:    addi sp, sp, -16
330; CHECK-RV64-NEXT:    .cfi_def_cfa_offset 16
331; CHECK-RV64-NEXT:    csrr a2, vlenb
332; CHECK-RV64-NEXT:    slli a2, a2, 5
333; CHECK-RV64-NEXT:    sub sp, sp, a2
334; CHECK-RV64-NEXT:    .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 32 * vlenb
335; CHECK-RV64-NEXT:    csrr a2, vlenb
336; CHECK-RV64-NEXT:    li a3, 24
337; CHECK-RV64-NEXT:    mul a2, a2, a3
338; CHECK-RV64-NEXT:    add a2, sp, a2
339; CHECK-RV64-NEXT:    addi a2, a2, 16
340; CHECK-RV64-NEXT:    vs8r.v v16, (a2) # Unknown-size Folded Spill
341; CHECK-RV64-NEXT:    vsetivli zero, 1, e64, m1, ta, ma
342; CHECK-RV64-NEXT:    vmv1r.v v7, v8
343; CHECK-RV64-NEXT:    li a2, 128
344; CHECK-RV64-NEXT:    vslidedown.vi v9, v0, 1
345; CHECK-RV64-NEXT:    vmv.x.s a3, v0
346; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, ta, ma
347; CHECK-RV64-NEXT:    vle8.v v16, (a1)
348; CHECK-RV64-NEXT:    csrr a1, vlenb
349; CHECK-RV64-NEXT:    slli a1, a1, 3
350; CHECK-RV64-NEXT:    add a1, sp, a1
351; CHECK-RV64-NEXT:    addi a1, a1, 16
352; CHECK-RV64-NEXT:    vs8r.v v16, (a1) # Unknown-size Folded Spill
353; CHECK-RV64-NEXT:    vsetvli zero, a2, e64, m1, ta, ma
354; CHECK-RV64-NEXT:    vmv.x.s a1, v9
355; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, ta, ma
356; CHECK-RV64-NEXT:    vcpop.m a4, v0
357; CHECK-RV64-NEXT:    vsetvli zero, a4, e8, m8, ta, ma
358; CHECK-RV64-NEXT:    vle8.v v8, (a0)
359; CHECK-RV64-NEXT:    csrr a4, vlenb
360; CHECK-RV64-NEXT:    slli a4, a4, 4
361; CHECK-RV64-NEXT:    add a4, sp, a4
362; CHECK-RV64-NEXT:    addi a4, a4, 16
363; CHECK-RV64-NEXT:    vs8r.v v8, (a4) # Unknown-size Folded Spill
364; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, ta, ma
365; CHECK-RV64-NEXT:    vcpop.m a4, v7
366; CHECK-RV64-NEXT:    cpop a3, a3
367; CHECK-RV64-NEXT:    cpop a1, a1
368; CHECK-RV64-NEXT:    add a0, a0, a3
369; CHECK-RV64-NEXT:    add a0, a0, a1
370; CHECK-RV64-NEXT:    vsetvli zero, a4, e8, m8, ta, ma
371; CHECK-RV64-NEXT:    vle8.v v8, (a0)
372; CHECK-RV64-NEXT:    addi a0, sp, 16
373; CHECK-RV64-NEXT:    vs8r.v v8, (a0) # Unknown-size Folded Spill
374; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, ta, mu
375; CHECK-RV64-NEXT:    viota.m v24, v0
376; CHECK-RV64-NEXT:    csrr a0, vlenb
377; CHECK-RV64-NEXT:    li a1, 24
378; CHECK-RV64-NEXT:    mul a0, a0, a1
379; CHECK-RV64-NEXT:    add a0, sp, a0
380; CHECK-RV64-NEXT:    addi a0, a0, 16
381; CHECK-RV64-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
382; CHECK-RV64-NEXT:    csrr a0, vlenb
383; CHECK-RV64-NEXT:    slli a0, a0, 4
384; CHECK-RV64-NEXT:    add a0, sp, a0
385; CHECK-RV64-NEXT:    addi a0, a0, 16
386; CHECK-RV64-NEXT:    vl8r.v v16, (a0) # Unknown-size Folded Reload
387; CHECK-RV64-NEXT:    vrgather.vv v8, v16, v24, v0.t
388; CHECK-RV64-NEXT:    csrr a0, vlenb
389; CHECK-RV64-NEXT:    li a1, 24
390; CHECK-RV64-NEXT:    mul a0, a0, a1
391; CHECK-RV64-NEXT:    add a0, sp, a0
392; CHECK-RV64-NEXT:    addi a0, a0, 16
393; CHECK-RV64-NEXT:    vs8r.v v8, (a0) # Unknown-size Folded Spill
394; CHECK-RV64-NEXT:    viota.m v16, v7
395; CHECK-RV64-NEXT:    csrr a0, vlenb
396; CHECK-RV64-NEXT:    slli a0, a0, 4
397; CHECK-RV64-NEXT:    add a0, sp, a0
398; CHECK-RV64-NEXT:    addi a0, a0, 16
399; CHECK-RV64-NEXT:    vs8r.v v16, (a0) # Unknown-size Folded Spill
400; CHECK-RV64-NEXT:    vmv1r.v v0, v7
401; CHECK-RV64-NEXT:    csrr a0, vlenb
402; CHECK-RV64-NEXT:    slli a0, a0, 3
403; CHECK-RV64-NEXT:    add a0, sp, a0
404; CHECK-RV64-NEXT:    addi a0, a0, 16
405; CHECK-RV64-NEXT:    vl8r.v v16, (a0) # Unknown-size Folded Reload
406; CHECK-RV64-NEXT:    addi a0, sp, 16
407; CHECK-RV64-NEXT:    vl8r.v v24, (a0) # Unknown-size Folded Reload
408; CHECK-RV64-NEXT:    csrr a0, vlenb
409; CHECK-RV64-NEXT:    slli a0, a0, 4
410; CHECK-RV64-NEXT:    add a0, sp, a0
411; CHECK-RV64-NEXT:    addi a0, a0, 16
412; CHECK-RV64-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
413; CHECK-RV64-NEXT:    vrgather.vv v16, v24, v8, v0.t
414; CHECK-RV64-NEXT:    csrr a0, vlenb
415; CHECK-RV64-NEXT:    li a1, 24
416; CHECK-RV64-NEXT:    mul a0, a0, a1
417; CHECK-RV64-NEXT:    add a0, sp, a0
418; CHECK-RV64-NEXT:    addi a0, a0, 16
419; CHECK-RV64-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
420; CHECK-RV64-NEXT:    csrr a0, vlenb
421; CHECK-RV64-NEXT:    slli a0, a0, 5
422; CHECK-RV64-NEXT:    add sp, sp, a0
423; CHECK-RV64-NEXT:    .cfi_def_cfa sp, 16
424; CHECK-RV64-NEXT:    addi sp, sp, 16
425; CHECK-RV64-NEXT:    .cfi_def_cfa_offset 0
426; CHECK-RV64-NEXT:    ret
427  %res = call <256 x i8> @llvm.masked.expandload.v256i8(ptr align 1 %base, <256 x i1> %mask, <256 x i8> %passthru)
428  ret <256 x i8> %res
429}
430
431define <256 x i8> @test_expandload_v256i8_all_ones(ptr %base, <256 x i8> %passthru) {
432; CHECK-RV32-LABEL: test_expandload_v256i8_all_ones:
433; CHECK-RV32:       # %bb.0:
434; CHECK-RV32-NEXT:    li a1, 128
435; CHECK-RV32-NEXT:    li a2, 32
436; CHECK-RV32-NEXT:    vsetvli zero, a1, e8, m8, ta, ma
437; CHECK-RV32-NEXT:    vmset.m v8
438; CHECK-RV32-NEXT:    vsetivli zero, 1, e64, m1, ta, ma
439; CHECK-RV32-NEXT:    vsrl.vx v9, v8, a2
440; CHECK-RV32-NEXT:    vmv.x.s a3, v8
441; CHECK-RV32-NEXT:    vslidedown.vi v8, v8, 1
442; CHECK-RV32-NEXT:    vmv.x.s a4, v9
443; CHECK-RV32-NEXT:    cpop a3, a3
444; CHECK-RV32-NEXT:    vsrl.vx v9, v8, a2
445; CHECK-RV32-NEXT:    vmv.x.s a2, v8
446; CHECK-RV32-NEXT:    cpop a4, a4
447; CHECK-RV32-NEXT:    add a3, a3, a4
448; CHECK-RV32-NEXT:    vmv.x.s a4, v9
449; CHECK-RV32-NEXT:    cpop a2, a2
450; CHECK-RV32-NEXT:    cpop a4, a4
451; CHECK-RV32-NEXT:    add a2, a2, a4
452; CHECK-RV32-NEXT:    add a3, a0, a3
453; CHECK-RV32-NEXT:    add a2, a3, a2
454; CHECK-RV32-NEXT:    vsetvli zero, a1, e8, m8, ta, ma
455; CHECK-RV32-NEXT:    vle8.v v16, (a2)
456; CHECK-RV32-NEXT:    vle8.v v8, (a0)
457; CHECK-RV32-NEXT:    ret
458;
459; CHECK-RV64-LABEL: test_expandload_v256i8_all_ones:
460; CHECK-RV64:       # %bb.0:
461; CHECK-RV64-NEXT:    li a1, 128
462; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, ta, ma
463; CHECK-RV64-NEXT:    vle8.v v8, (a0)
464; CHECK-RV64-NEXT:    vmset.m v16
465; CHECK-RV64-NEXT:    vsetvli zero, a1, e64, m1, ta, ma
466; CHECK-RV64-NEXT:    vmv.x.s a2, v16
467; CHECK-RV64-NEXT:    vslidedown.vi v16, v16, 1
468; CHECK-RV64-NEXT:    cpop a2, a2
469; CHECK-RV64-NEXT:    vmv.x.s a3, v16
470; CHECK-RV64-NEXT:    cpop a3, a3
471; CHECK-RV64-NEXT:    add a0, a0, a2
472; CHECK-RV64-NEXT:    add a0, a0, a3
473; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, ta, ma
474; CHECK-RV64-NEXT:    vle8.v v16, (a0)
475; CHECK-RV64-NEXT:    ret
476  %res = call <256 x i8> @llvm.masked.expandload.v256i8(ptr align 1 %base, <256 x i1> splat (i1 true), <256 x i8> %passthru)
477  ret <256 x i8> %res
478}
479
480; Load + expand for i16 type
481
482define <1 x i16> @test_expandload_v1i16(ptr %base, <1 x i1> %mask, <1 x i16> %passthru) {
483; CHECK-LABEL: test_expandload_v1i16:
484; CHECK:       # %bb.0:
485; CHECK-NEXT:    vsetivli zero, 1, e8, mf8, ta, ma
486; CHECK-NEXT:    vcpop.m a1, v0
487; CHECK-NEXT:    vsetvli zero, a1, e16, mf4, ta, ma
488; CHECK-NEXT:    vle16.v v9, (a0)
489; CHECK-NEXT:    vsetivli zero, 1, e16, mf4, ta, mu
490; CHECK-NEXT:    viota.m v10, v0
491; CHECK-NEXT:    vrgather.vv v8, v9, v10, v0.t
492; CHECK-NEXT:    ret
493  %res = call <1 x i16> @llvm.masked.expandload.v1i16(ptr align 2 %base, <1 x i1> %mask, <1 x i16> %passthru)
494  ret <1 x i16> %res
495}
496
497define <1 x i16> @test_expandload_v1i16_all_ones(ptr %base, <1 x i16> %passthru) {
498; CHECK-LABEL: test_expandload_v1i16_all_ones:
499; CHECK:       # %bb.0:
500; CHECK-NEXT:    vsetivli zero, 1, e16, mf4, ta, ma
501; CHECK-NEXT:    vle16.v v8, (a0)
502; CHECK-NEXT:    ret
503  %res = call <1 x i16> @llvm.masked.expandload.v1i16(ptr align 2 %base, <1 x i1> splat (i1 true), <1 x i16> %passthru)
504  ret <1 x i16> %res
505}
506
507define <2 x i16> @test_expandload_v2i16(ptr %base, <2 x i1> %mask, <2 x i16> %passthru) {
508; CHECK-LABEL: test_expandload_v2i16:
509; CHECK:       # %bb.0:
510; CHECK-NEXT:    vsetivli zero, 2, e8, mf8, ta, ma
511; CHECK-NEXT:    vcpop.m a1, v0
512; CHECK-NEXT:    vsetvli zero, a1, e16, mf4, ta, ma
513; CHECK-NEXT:    vle16.v v9, (a0)
514; CHECK-NEXT:    vsetivli zero, 2, e16, mf4, ta, mu
515; CHECK-NEXT:    viota.m v10, v0
516; CHECK-NEXT:    vrgather.vv v8, v9, v10, v0.t
517; CHECK-NEXT:    ret
518  %res = call <2 x i16> @llvm.masked.expandload.v2i16(ptr align 2 %base, <2 x i1> %mask, <2 x i16> %passthru)
519  ret <2 x i16> %res
520}
521
522define <2 x i16> @test_expandload_v2i16_all_ones(ptr %base, <2 x i16> %passthru) {
523; CHECK-LABEL: test_expandload_v2i16_all_ones:
524; CHECK:       # %bb.0:
525; CHECK-NEXT:    vsetivli zero, 2, e16, mf4, ta, ma
526; CHECK-NEXT:    vle16.v v8, (a0)
527; CHECK-NEXT:    ret
528  %res = call <2 x i16> @llvm.masked.expandload.v2i16(ptr align 2 %base, <2 x i1> splat (i1 true), <2 x i16> %passthru)
529  ret <2 x i16> %res
530}
531
532define <4 x i16> @test_expandload_v4i16(ptr %base, <4 x i1> %mask, <4 x i16> %passthru) {
533; CHECK-LABEL: test_expandload_v4i16:
534; CHECK:       # %bb.0:
535; CHECK-NEXT:    vsetivli zero, 4, e8, mf4, ta, ma
536; CHECK-NEXT:    vcpop.m a1, v0
537; CHECK-NEXT:    vsetvli zero, a1, e16, mf2, ta, ma
538; CHECK-NEXT:    vle16.v v9, (a0)
539; CHECK-NEXT:    vsetivli zero, 4, e16, mf2, ta, mu
540; CHECK-NEXT:    viota.m v10, v0
541; CHECK-NEXT:    vrgather.vv v8, v9, v10, v0.t
542; CHECK-NEXT:    ret
543  %res = call <4 x i16> @llvm.masked.expandload.v4i16(ptr align 2 %base, <4 x i1> %mask, <4 x i16> %passthru)
544  ret <4 x i16> %res
545}
546
547define <4 x i16> @test_expandload_v4i16_all_ones(ptr %base, <4 x i16> %passthru) {
548; CHECK-LABEL: test_expandload_v4i16_all_ones:
549; CHECK:       # %bb.0:
550; CHECK-NEXT:    vsetivli zero, 4, e16, mf2, ta, ma
551; CHECK-NEXT:    vle16.v v8, (a0)
552; CHECK-NEXT:    ret
553  %res = call <4 x i16> @llvm.masked.expandload.v4i16(ptr align 2 %base, <4 x i1> splat (i1 true), <4 x i16> %passthru)
554  ret <4 x i16> %res
555}
556
557define <8 x i16> @test_expandload_v8i16(ptr %base, <8 x i1> %mask, <8 x i16> %passthru) {
558; CHECK-LABEL: test_expandload_v8i16:
559; CHECK:       # %bb.0:
560; CHECK-NEXT:    vsetivli zero, 8, e8, mf2, ta, ma
561; CHECK-NEXT:    vcpop.m a1, v0
562; CHECK-NEXT:    vsetvli zero, a1, e16, m1, ta, ma
563; CHECK-NEXT:    vle16.v v9, (a0)
564; CHECK-NEXT:    vsetivli zero, 8, e16, m1, ta, mu
565; CHECK-NEXT:    viota.m v10, v0
566; CHECK-NEXT:    vrgather.vv v8, v9, v10, v0.t
567; CHECK-NEXT:    ret
568  %res = call <8 x i16> @llvm.masked.expandload.v8i16(ptr align 2 %base, <8 x i1> %mask, <8 x i16> %passthru)
569  ret <8 x i16> %res
570}
571
572define <8 x i16> @test_expandload_v8i16_all_ones(ptr %base, <8 x i16> %passthru) {
573; CHECK-LABEL: test_expandload_v8i16_all_ones:
574; CHECK:       # %bb.0:
575; CHECK-NEXT:    vsetivli zero, 8, e16, m1, ta, ma
576; CHECK-NEXT:    vle16.v v8, (a0)
577; CHECK-NEXT:    ret
578  %res = call <8 x i16> @llvm.masked.expandload.v8i16(ptr align 2 %base, <8 x i1> splat (i1 true), <8 x i16> %passthru)
579  ret <8 x i16> %res
580}
581
582define <16 x i16> @test_expandload_v16i16(ptr %base, <16 x i1> %mask, <16 x i16> %passthru) {
583; CHECK-LABEL: test_expandload_v16i16:
584; CHECK:       # %bb.0:
585; CHECK-NEXT:    vsetivli zero, 16, e8, m1, ta, ma
586; CHECK-NEXT:    vcpop.m a1, v0
587; CHECK-NEXT:    vsetvli zero, a1, e16, m2, ta, ma
588; CHECK-NEXT:    vle16.v v10, (a0)
589; CHECK-NEXT:    vsetivli zero, 16, e16, m2, ta, mu
590; CHECK-NEXT:    viota.m v12, v0
591; CHECK-NEXT:    vrgather.vv v8, v10, v12, v0.t
592; CHECK-NEXT:    ret
593  %res = call <16 x i16> @llvm.masked.expandload.v16i16(ptr align 2 %base, <16 x i1> %mask, <16 x i16> %passthru)
594  ret <16 x i16> %res
595}
596
597define <16 x i16> @test_expandload_v16i16_all_ones(ptr %base, <16 x i16> %passthru) {
598; CHECK-LABEL: test_expandload_v16i16_all_ones:
599; CHECK:       # %bb.0:
600; CHECK-NEXT:    vsetivli zero, 16, e16, m2, ta, ma
601; CHECK-NEXT:    vle16.v v8, (a0)
602; CHECK-NEXT:    ret
603  %res = call <16 x i16> @llvm.masked.expandload.v16i16(ptr align 2 %base, <16 x i1> splat (i1 true), <16 x i16> %passthru)
604  ret <16 x i16> %res
605}
606
607define <32 x i16> @test_expandload_v32i16(ptr %base, <32 x i1> %mask, <32 x i16> %passthru) {
608; CHECK-LABEL: test_expandload_v32i16:
609; CHECK:       # %bb.0:
610; CHECK-NEXT:    li a1, 32
611; CHECK-NEXT:    vsetvli zero, a1, e8, m2, ta, ma
612; CHECK-NEXT:    vcpop.m a2, v0
613; CHECK-NEXT:    vsetvli zero, a2, e16, m4, ta, ma
614; CHECK-NEXT:    vle16.v v12, (a0)
615; CHECK-NEXT:    vsetvli zero, a1, e16, m4, ta, mu
616; CHECK-NEXT:    viota.m v16, v0
617; CHECK-NEXT:    vrgather.vv v8, v12, v16, v0.t
618; CHECK-NEXT:    ret
619  %res = call <32 x i16> @llvm.masked.expandload.v32i16(ptr align 2 %base, <32 x i1> %mask, <32 x i16> %passthru)
620  ret <32 x i16> %res
621}
622
623define <32 x i16> @test_expandload_v32i16_all_ones(ptr %base, <32 x i16> %passthru) {
624; CHECK-LABEL: test_expandload_v32i16_all_ones:
625; CHECK:       # %bb.0:
626; CHECK-NEXT:    li a1, 32
627; CHECK-NEXT:    vsetvli zero, a1, e16, m4, ta, ma
628; CHECK-NEXT:    vle16.v v8, (a0)
629; CHECK-NEXT:    ret
630  %res = call <32 x i16> @llvm.masked.expandload.v32i16(ptr align 2 %base, <32 x i1> splat (i1 true), <32 x i16> %passthru)
631  ret <32 x i16> %res
632}
633
634define <64 x i16> @test_expandload_v64i16(ptr %base, <64 x i1> %mask, <64 x i16> %passthru) {
635; CHECK-LABEL: test_expandload_v64i16:
636; CHECK:       # %bb.0:
637; CHECK-NEXT:    li a1, 64
638; CHECK-NEXT:    vsetvli zero, a1, e8, m4, ta, ma
639; CHECK-NEXT:    vcpop.m a2, v0
640; CHECK-NEXT:    vsetvli zero, a2, e16, m8, ta, ma
641; CHECK-NEXT:    vle16.v v16, (a0)
642; CHECK-NEXT:    vsetvli zero, a1, e16, m8, ta, mu
643; CHECK-NEXT:    viota.m v24, v0
644; CHECK-NEXT:    vrgather.vv v8, v16, v24, v0.t
645; CHECK-NEXT:    ret
646  %res = call <64 x i16> @llvm.masked.expandload.v64i16(ptr align 2 %base, <64 x i1> %mask, <64 x i16> %passthru)
647  ret <64 x i16> %res
648}
649
650define <64 x i16> @test_expandload_v64i16_all_ones(ptr %base, <64 x i16> %passthru) {
651; CHECK-LABEL: test_expandload_v64i16_all_ones:
652; CHECK:       # %bb.0:
653; CHECK-NEXT:    li a1, 64
654; CHECK-NEXT:    vsetvli zero, a1, e16, m8, ta, ma
655; CHECK-NEXT:    vle16.v v8, (a0)
656; CHECK-NEXT:    ret
657  %res = call <64 x i16> @llvm.masked.expandload.v64i16(ptr align 2 %base, <64 x i1> splat (i1 true), <64 x i16> %passthru)
658  ret <64 x i16> %res
659}
660
661define <128 x i16> @test_expandload_v128i16(ptr %base, <128 x i1> %mask, <128 x i16> %passthru) {
662; CHECK-RV32-LABEL: test_expandload_v128i16:
663; CHECK-RV32:       # %bb.0:
664; CHECK-RV32-NEXT:    addi sp, sp, -16
665; CHECK-RV32-NEXT:    .cfi_def_cfa_offset 16
666; CHECK-RV32-NEXT:    csrr a1, vlenb
667; CHECK-RV32-NEXT:    slli a1, a1, 5
668; CHECK-RV32-NEXT:    sub sp, sp, a1
669; CHECK-RV32-NEXT:    .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 32 * vlenb
670; CHECK-RV32-NEXT:    csrr a1, vlenb
671; CHECK-RV32-NEXT:    li a2, 24
672; CHECK-RV32-NEXT:    mul a1, a1, a2
673; CHECK-RV32-NEXT:    add a1, sp, a1
674; CHECK-RV32-NEXT:    addi a1, a1, 16
675; CHECK-RV32-NEXT:    vs8r.v v16, (a1) # Unknown-size Folded Spill
676; CHECK-RV32-NEXT:    li a1, 64
677; CHECK-RV32-NEXT:    vsetivli zero, 8, e8, m1, ta, ma
678; CHECK-RV32-NEXT:    vslidedown.vi v7, v0, 8
679; CHECK-RV32-NEXT:    li a2, 32
680; CHECK-RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, ma
681; CHECK-RV32-NEXT:    vmv.x.s a3, v0
682; CHECK-RV32-NEXT:    vsetvli zero, a1, e8, m4, ta, ma
683; CHECK-RV32-NEXT:    vcpop.m a4, v0
684; CHECK-RV32-NEXT:    vsetivli zero, 1, e64, m1, ta, ma
685; CHECK-RV32-NEXT:    vsrl.vx v25, v0, a2
686; CHECK-RV32-NEXT:    vsetvli zero, a1, e8, m4, ta, ma
687; CHECK-RV32-NEXT:    vcpop.m a2, v7
688; CHECK-RV32-NEXT:    vsetvli zero, a4, e16, m8, ta, ma
689; CHECK-RV32-NEXT:    vle16.v v16, (a0)
690; CHECK-RV32-NEXT:    csrr a5, vlenb
691; CHECK-RV32-NEXT:    slli a5, a5, 4
692; CHECK-RV32-NEXT:    add a5, sp, a5
693; CHECK-RV32-NEXT:    addi a5, a5, 16
694; CHECK-RV32-NEXT:    vs8r.v v16, (a5) # Unknown-size Folded Spill
695; CHECK-RV32-NEXT:    vsetvli zero, a4, e64, m1, ta, ma
696; CHECK-RV32-NEXT:    vmv.x.s a4, v25
697; CHECK-RV32-NEXT:    cpop a4, a4
698; CHECK-RV32-NEXT:    cpop a3, a3
699; CHECK-RV32-NEXT:    add a3, a3, a4
700; CHECK-RV32-NEXT:    slli a3, a3, 1
701; CHECK-RV32-NEXT:    add a0, a0, a3
702; CHECK-RV32-NEXT:    vsetvli zero, a2, e16, m8, ta, ma
703; CHECK-RV32-NEXT:    vle16.v v16, (a0)
704; CHECK-RV32-NEXT:    csrr a0, vlenb
705; CHECK-RV32-NEXT:    slli a0, a0, 3
706; CHECK-RV32-NEXT:    add a0, sp, a0
707; CHECK-RV32-NEXT:    addi a0, a0, 16
708; CHECK-RV32-NEXT:    vs8r.v v16, (a0) # Unknown-size Folded Spill
709; CHECK-RV32-NEXT:    vsetvli zero, a1, e16, m8, ta, mu
710; CHECK-RV32-NEXT:    viota.m v16, v0
711; CHECK-RV32-NEXT:    csrr a0, vlenb
712; CHECK-RV32-NEXT:    slli a0, a0, 4
713; CHECK-RV32-NEXT:    add a0, sp, a0
714; CHECK-RV32-NEXT:    addi a0, a0, 16
715; CHECK-RV32-NEXT:    vl8r.v v24, (a0) # Unknown-size Folded Reload
716; CHECK-RV32-NEXT:    vrgather.vv v8, v24, v16, v0.t
717; CHECK-RV32-NEXT:    addi a0, sp, 16
718; CHECK-RV32-NEXT:    vs8r.v v8, (a0) # Unknown-size Folded Spill
719; CHECK-RV32-NEXT:    viota.m v8, v7
720; CHECK-RV32-NEXT:    vmv1r.v v0, v7
721; CHECK-RV32-NEXT:    csrr a0, vlenb
722; CHECK-RV32-NEXT:    li a1, 24
723; CHECK-RV32-NEXT:    mul a0, a0, a1
724; CHECK-RV32-NEXT:    add a0, sp, a0
725; CHECK-RV32-NEXT:    addi a0, a0, 16
726; CHECK-RV32-NEXT:    vl8r.v v16, (a0) # Unknown-size Folded Reload
727; CHECK-RV32-NEXT:    csrr a0, vlenb
728; CHECK-RV32-NEXT:    slli a0, a0, 3
729; CHECK-RV32-NEXT:    add a0, sp, a0
730; CHECK-RV32-NEXT:    addi a0, a0, 16
731; CHECK-RV32-NEXT:    vl8r.v v24, (a0) # Unknown-size Folded Reload
732; CHECK-RV32-NEXT:    vrgather.vv v16, v24, v8, v0.t
733; CHECK-RV32-NEXT:    addi a0, sp, 16
734; CHECK-RV32-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
735; CHECK-RV32-NEXT:    csrr a0, vlenb
736; CHECK-RV32-NEXT:    slli a0, a0, 5
737; CHECK-RV32-NEXT:    add sp, sp, a0
738; CHECK-RV32-NEXT:    .cfi_def_cfa sp, 16
739; CHECK-RV32-NEXT:    addi sp, sp, 16
740; CHECK-RV32-NEXT:    .cfi_def_cfa_offset 0
741; CHECK-RV32-NEXT:    ret
742;
743; CHECK-RV64-LABEL: test_expandload_v128i16:
744; CHECK-RV64:       # %bb.0:
745; CHECK-RV64-NEXT:    addi sp, sp, -16
746; CHECK-RV64-NEXT:    .cfi_def_cfa_offset 16
747; CHECK-RV64-NEXT:    csrr a1, vlenb
748; CHECK-RV64-NEXT:    slli a1, a1, 5
749; CHECK-RV64-NEXT:    sub sp, sp, a1
750; CHECK-RV64-NEXT:    .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 32 * vlenb
751; CHECK-RV64-NEXT:    csrr a1, vlenb
752; CHECK-RV64-NEXT:    slli a1, a1, 3
753; CHECK-RV64-NEXT:    add a1, sp, a1
754; CHECK-RV64-NEXT:    addi a1, a1, 16
755; CHECK-RV64-NEXT:    vs8r.v v16, (a1) # Unknown-size Folded Spill
756; CHECK-RV64-NEXT:    li a1, 64
757; CHECK-RV64-NEXT:    vsetivli zero, 8, e8, m1, ta, ma
758; CHECK-RV64-NEXT:    vslidedown.vi v7, v0, 8
759; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m4, ta, ma
760; CHECK-RV64-NEXT:    vcpop.m a2, v0
761; CHECK-RV64-NEXT:    vcpop.m a3, v7
762; CHECK-RV64-NEXT:    vsetvli zero, a2, e16, m8, ta, ma
763; CHECK-RV64-NEXT:    vle16.v v24, (a0)
764; CHECK-RV64-NEXT:    csrr a4, vlenb
765; CHECK-RV64-NEXT:    slli a4, a4, 4
766; CHECK-RV64-NEXT:    add a4, sp, a4
767; CHECK-RV64-NEXT:    addi a4, a4, 16
768; CHECK-RV64-NEXT:    vs8r.v v24, (a4) # Unknown-size Folded Spill
769; CHECK-RV64-NEXT:    slli a2, a2, 1
770; CHECK-RV64-NEXT:    add a0, a0, a2
771; CHECK-RV64-NEXT:    vsetvli zero, a3, e16, m8, ta, ma
772; CHECK-RV64-NEXT:    vle16.v v24, (a0)
773; CHECK-RV64-NEXT:    csrr a0, vlenb
774; CHECK-RV64-NEXT:    li a2, 24
775; CHECK-RV64-NEXT:    mul a0, a0, a2
776; CHECK-RV64-NEXT:    add a0, sp, a0
777; CHECK-RV64-NEXT:    addi a0, a0, 16
778; CHECK-RV64-NEXT:    vs8r.v v24, (a0) # Unknown-size Folded Spill
779; CHECK-RV64-NEXT:    vsetvli zero, a1, e16, m8, ta, mu
780; CHECK-RV64-NEXT:    viota.m v24, v0
781; CHECK-RV64-NEXT:    csrr a0, vlenb
782; CHECK-RV64-NEXT:    slli a0, a0, 4
783; CHECK-RV64-NEXT:    add a0, sp, a0
784; CHECK-RV64-NEXT:    addi a0, a0, 16
785; CHECK-RV64-NEXT:    vl8r.v v16, (a0) # Unknown-size Folded Reload
786; CHECK-RV64-NEXT:    vrgather.vv v8, v16, v24, v0.t
787; CHECK-RV64-NEXT:    addi a0, sp, 16
788; CHECK-RV64-NEXT:    vs8r.v v8, (a0) # Unknown-size Folded Spill
789; CHECK-RV64-NEXT:    viota.m v16, v7
790; CHECK-RV64-NEXT:    csrr a0, vlenb
791; CHECK-RV64-NEXT:    slli a0, a0, 4
792; CHECK-RV64-NEXT:    add a0, sp, a0
793; CHECK-RV64-NEXT:    addi a0, a0, 16
794; CHECK-RV64-NEXT:    vs8r.v v16, (a0) # Unknown-size Folded Spill
795; CHECK-RV64-NEXT:    vmv1r.v v0, v7
796; CHECK-RV64-NEXT:    csrr a0, vlenb
797; CHECK-RV64-NEXT:    li a1, 24
798; CHECK-RV64-NEXT:    mul a0, a0, a1
799; CHECK-RV64-NEXT:    add a0, sp, a0
800; CHECK-RV64-NEXT:    addi a0, a0, 16
801; CHECK-RV64-NEXT:    vl8r.v v24, (a0) # Unknown-size Folded Reload
802; CHECK-RV64-NEXT:    csrr a0, vlenb
803; CHECK-RV64-NEXT:    slli a0, a0, 3
804; CHECK-RV64-NEXT:    add a0, sp, a0
805; CHECK-RV64-NEXT:    addi a0, a0, 16
806; CHECK-RV64-NEXT:    vl8r.v v16, (a0) # Unknown-size Folded Reload
807; CHECK-RV64-NEXT:    csrr a0, vlenb
808; CHECK-RV64-NEXT:    slli a0, a0, 4
809; CHECK-RV64-NEXT:    add a0, sp, a0
810; CHECK-RV64-NEXT:    addi a0, a0, 16
811; CHECK-RV64-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
812; CHECK-RV64-NEXT:    vrgather.vv v16, v24, v8, v0.t
813; CHECK-RV64-NEXT:    addi a0, sp, 16
814; CHECK-RV64-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
815; CHECK-RV64-NEXT:    csrr a0, vlenb
816; CHECK-RV64-NEXT:    slli a0, a0, 5
817; CHECK-RV64-NEXT:    add sp, sp, a0
818; CHECK-RV64-NEXT:    .cfi_def_cfa sp, 16
819; CHECK-RV64-NEXT:    addi sp, sp, 16
820; CHECK-RV64-NEXT:    .cfi_def_cfa_offset 0
821; CHECK-RV64-NEXT:    ret
822  %res = call <128 x i16> @llvm.masked.expandload.v128i16(ptr align 2 %base, <128 x i1> %mask, <128 x i16> %passthru)
823  ret <128 x i16> %res
824}
825
826define <128 x i16> @test_expandload_v128i16_all_ones(ptr %base, <128 x i16> %passthru) {
827; CHECK-RV32-LABEL: test_expandload_v128i16_all_ones:
828; CHECK-RV32:       # %bb.0:
829; CHECK-RV32-NEXT:    li a1, 64
830; CHECK-RV32-NEXT:    li a2, 32
831; CHECK-RV32-NEXT:    vsetvli zero, a1, e16, m8, ta, ma
832; CHECK-RV32-NEXT:    vle16.v v8, (a0)
833; CHECK-RV32-NEXT:    vmset.m v16
834; CHECK-RV32-NEXT:    vsetivli zero, 1, e64, m1, ta, ma
835; CHECK-RV32-NEXT:    vsrl.vx v17, v16, a2
836; CHECK-RV32-NEXT:    vmv.x.s a2, v16
837; CHECK-RV32-NEXT:    vmv.x.s a3, v17
838; CHECK-RV32-NEXT:    cpop a3, a3
839; CHECK-RV32-NEXT:    cpop a2, a2
840; CHECK-RV32-NEXT:    add a2, a2, a3
841; CHECK-RV32-NEXT:    slli a2, a2, 1
842; CHECK-RV32-NEXT:    add a0, a0, a2
843; CHECK-RV32-NEXT:    vsetvli zero, a1, e16, m8, ta, ma
844; CHECK-RV32-NEXT:    vle16.v v16, (a0)
845; CHECK-RV32-NEXT:    ret
846;
847; CHECK-RV64-LABEL: test_expandload_v128i16_all_ones:
848; CHECK-RV64:       # %bb.0:
849; CHECK-RV64-NEXT:    li a1, 64
850; CHECK-RV64-NEXT:    vsetvli zero, a1, e16, m8, ta, ma
851; CHECK-RV64-NEXT:    vle16.v v8, (a0)
852; CHECK-RV64-NEXT:    vmset.m v16
853; CHECK-RV64-NEXT:    vcpop.m a1, v16
854; CHECK-RV64-NEXT:    slli a1, a1, 1
855; CHECK-RV64-NEXT:    add a0, a0, a1
856; CHECK-RV64-NEXT:    vle16.v v16, (a0)
857; CHECK-RV64-NEXT:    ret
858  %res = call <128 x i16> @llvm.masked.expandload.v128i16(ptr align 2 %base, <128 x i1> splat (i1 true), <128 x i16> %passthru)
859  ret <128 x i16> %res
860}
861
862; Load + expand for i32 type
863
864define <1 x i32> @test_expandload_v1i32(ptr %base, <1 x i1> %mask, <1 x i32> %passthru) {
865; CHECK-LABEL: test_expandload_v1i32:
866; CHECK:       # %bb.0:
867; CHECK-NEXT:    vsetivli zero, 1, e8, mf8, ta, ma
868; CHECK-NEXT:    vcpop.m a1, v0
869; CHECK-NEXT:    vsetvli zero, a1, e32, mf2, ta, ma
870; CHECK-NEXT:    vle32.v v9, (a0)
871; CHECK-NEXT:    vsetivli zero, 1, e32, mf2, ta, mu
872; CHECK-NEXT:    viota.m v10, v0
873; CHECK-NEXT:    vrgather.vv v8, v9, v10, v0.t
874; CHECK-NEXT:    ret
875  %res = call <1 x i32> @llvm.masked.expandload.v1i32(ptr align 4 %base, <1 x i1> %mask, <1 x i32> %passthru)
876  ret <1 x i32> %res
877}
878
879define <1 x i32> @test_expandload_v1i32_all_ones(ptr %base, <1 x i32> %passthru) {
880; CHECK-LABEL: test_expandload_v1i32_all_ones:
881; CHECK:       # %bb.0:
882; CHECK-NEXT:    vsetivli zero, 1, e32, mf2, ta, ma
883; CHECK-NEXT:    vle32.v v8, (a0)
884; CHECK-NEXT:    ret
885  %res = call <1 x i32> @llvm.masked.expandload.v1i32(ptr align 4 %base, <1 x i1> splat (i1 true), <1 x i32> %passthru)
886  ret <1 x i32> %res
887}
888
889define <2 x i32> @test_expandload_v2i32(ptr %base, <2 x i1> %mask, <2 x i32> %passthru) {
890; CHECK-LABEL: test_expandload_v2i32:
891; CHECK:       # %bb.0:
892; CHECK-NEXT:    vsetivli zero, 2, e8, mf8, ta, ma
893; CHECK-NEXT:    vcpop.m a1, v0
894; CHECK-NEXT:    vsetvli zero, a1, e32, mf2, ta, ma
895; CHECK-NEXT:    vle32.v v9, (a0)
896; CHECK-NEXT:    vsetivli zero, 2, e32, mf2, ta, mu
897; CHECK-NEXT:    viota.m v10, v0
898; CHECK-NEXT:    vrgather.vv v8, v9, v10, v0.t
899; CHECK-NEXT:    ret
900  %res = call <2 x i32> @llvm.masked.expandload.v2i32(ptr align 4 %base, <2 x i1> %mask, <2 x i32> %passthru)
901  ret <2 x i32> %res
902}
903
904define <2 x i32> @test_expandload_v2i32_all_ones(ptr %base, <2 x i32> %passthru) {
905; CHECK-LABEL: test_expandload_v2i32_all_ones:
906; CHECK:       # %bb.0:
907; CHECK-NEXT:    vsetivli zero, 2, e32, mf2, ta, ma
908; CHECK-NEXT:    vle32.v v8, (a0)
909; CHECK-NEXT:    ret
910  %res = call <2 x i32> @llvm.masked.expandload.v2i32(ptr align 4 %base, <2 x i1> splat (i1 true), <2 x i32> %passthru)
911  ret <2 x i32> %res
912}
913
914define <4 x i32> @test_expandload_v4i32(ptr %base, <4 x i1> %mask, <4 x i32> %passthru) {
915; CHECK-LABEL: test_expandload_v4i32:
916; CHECK:       # %bb.0:
917; CHECK-NEXT:    vsetivli zero, 4, e8, mf4, ta, ma
918; CHECK-NEXT:    vcpop.m a1, v0
919; CHECK-NEXT:    vsetvli zero, a1, e32, m1, ta, ma
920; CHECK-NEXT:    vle32.v v9, (a0)
921; CHECK-NEXT:    vsetivli zero, 4, e32, m1, ta, mu
922; CHECK-NEXT:    viota.m v10, v0
923; CHECK-NEXT:    vrgather.vv v8, v9, v10, v0.t
924; CHECK-NEXT:    ret
925  %res = call <4 x i32> @llvm.masked.expandload.v4i32(ptr align 4 %base, <4 x i1> %mask, <4 x i32> %passthru)
926  ret <4 x i32> %res
927}
928
929define <4 x i32> @test_expandload_v4i32_all_ones(ptr %base, <4 x i32> %passthru) {
930; CHECK-LABEL: test_expandload_v4i32_all_ones:
931; CHECK:       # %bb.0:
932; CHECK-NEXT:    vsetivli zero, 4, e32, m1, ta, ma
933; CHECK-NEXT:    vle32.v v8, (a0)
934; CHECK-NEXT:    ret
935  %res = call <4 x i32> @llvm.masked.expandload.v4i32(ptr align 4 %base, <4 x i1> splat (i1 true), <4 x i32> %passthru)
936  ret <4 x i32> %res
937}
938
939define <8 x i32> @test_expandload_v8i32(ptr %base, <8 x i1> %mask, <8 x i32> %passthru) {
940; CHECK-LABEL: test_expandload_v8i32:
941; CHECK:       # %bb.0:
942; CHECK-NEXT:    vsetivli zero, 8, e8, mf2, ta, ma
943; CHECK-NEXT:    vcpop.m a1, v0
944; CHECK-NEXT:    vsetvli zero, a1, e32, m2, ta, ma
945; CHECK-NEXT:    vle32.v v10, (a0)
946; CHECK-NEXT:    vsetivli zero, 8, e32, m2, ta, mu
947; CHECK-NEXT:    viota.m v12, v0
948; CHECK-NEXT:    vrgather.vv v8, v10, v12, v0.t
949; CHECK-NEXT:    ret
950  %res = call <8 x i32> @llvm.masked.expandload.v8i32(ptr align 4 %base, <8 x i1> %mask, <8 x i32> %passthru)
951  ret <8 x i32> %res
952}
953
954define <8 x i32> @test_expandload_v8i32_all_ones(ptr %base, <8 x i32> %passthru) {
955; CHECK-LABEL: test_expandload_v8i32_all_ones:
956; CHECK:       # %bb.0:
957; CHECK-NEXT:    vsetivli zero, 8, e32, m2, ta, ma
958; CHECK-NEXT:    vle32.v v8, (a0)
959; CHECK-NEXT:    ret
960  %res = call <8 x i32> @llvm.masked.expandload.v8i32(ptr align 4 %base, <8 x i1> splat (i1 true), <8 x i32> %passthru)
961  ret <8 x i32> %res
962}
963
964define <16 x i32> @test_expandload_v16i32(ptr %base, <16 x i1> %mask, <16 x i32> %passthru) {
965; CHECK-LABEL: test_expandload_v16i32:
966; CHECK:       # %bb.0:
967; CHECK-NEXT:    vsetivli zero, 16, e8, m1, ta, ma
968; CHECK-NEXT:    vcpop.m a1, v0
969; CHECK-NEXT:    vsetvli zero, a1, e32, m4, ta, ma
970; CHECK-NEXT:    vle32.v v12, (a0)
971; CHECK-NEXT:    vsetivli zero, 16, e32, m4, ta, mu
972; CHECK-NEXT:    viota.m v16, v0
973; CHECK-NEXT:    vrgather.vv v8, v12, v16, v0.t
974; CHECK-NEXT:    ret
975  %res = call <16 x i32> @llvm.masked.expandload.v16i32(ptr align 4 %base, <16 x i1> %mask, <16 x i32> %passthru)
976  ret <16 x i32> %res
977}
978
979define <16 x i32> @test_expandload_v16i32_all_ones(ptr %base, <16 x i32> %passthru) {
980; CHECK-LABEL: test_expandload_v16i32_all_ones:
981; CHECK:       # %bb.0:
982; CHECK-NEXT:    vsetivli zero, 16, e32, m4, ta, ma
983; CHECK-NEXT:    vle32.v v8, (a0)
984; CHECK-NEXT:    ret
985  %res = call <16 x i32> @llvm.masked.expandload.v16i32(ptr align 4 %base, <16 x i1> splat (i1 true), <16 x i32> %passthru)
986  ret <16 x i32> %res
987}
988
989define <32 x i32> @test_expandload_v32i32(ptr %base, <32 x i1> %mask, <32 x i32> %passthru) {
990; CHECK-LABEL: test_expandload_v32i32:
991; CHECK:       # %bb.0:
992; CHECK-NEXT:    li a1, 32
993; CHECK-NEXT:    vsetvli zero, a1, e8, m2, ta, ma
994; CHECK-NEXT:    vcpop.m a2, v0
995; CHECK-NEXT:    vsetvli zero, a2, e32, m8, ta, ma
996; CHECK-NEXT:    vle32.v v16, (a0)
997; CHECK-NEXT:    vsetvli zero, a1, e32, m8, ta, mu
998; CHECK-NEXT:    viota.m v24, v0
999; CHECK-NEXT:    vrgather.vv v8, v16, v24, v0.t
1000; CHECK-NEXT:    ret
1001  %res = call <32 x i32> @llvm.masked.expandload.v32i32(ptr align 4 %base, <32 x i1> %mask, <32 x i32> %passthru)
1002  ret <32 x i32> %res
1003}
1004
1005define <32 x i32> @test_expandload_v32i32_all_ones(ptr %base, <32 x i32> %passthru) {
1006; CHECK-LABEL: test_expandload_v32i32_all_ones:
1007; CHECK:       # %bb.0:
1008; CHECK-NEXT:    li a1, 32
1009; CHECK-NEXT:    vsetvli zero, a1, e32, m8, ta, ma
1010; CHECK-NEXT:    vle32.v v8, (a0)
1011; CHECK-NEXT:    ret
1012  %res = call <32 x i32> @llvm.masked.expandload.v32i32(ptr align 4 %base, <32 x i1> splat (i1 true), <32 x i32> %passthru)
1013  ret <32 x i32> %res
1014}
1015
1016define <64 x i32> @test_expandload_v64i32(ptr %base, <64 x i1> %mask, <64 x i32> %passthru) {
1017; CHECK-RV32-LABEL: test_expandload_v64i32:
1018; CHECK-RV32:       # %bb.0:
1019; CHECK-RV32-NEXT:    addi sp, sp, -16
1020; CHECK-RV32-NEXT:    .cfi_def_cfa_offset 16
1021; CHECK-RV32-NEXT:    csrr a1, vlenb
1022; CHECK-RV32-NEXT:    slli a1, a1, 5
1023; CHECK-RV32-NEXT:    sub sp, sp, a1
1024; CHECK-RV32-NEXT:    .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 32 * vlenb
1025; CHECK-RV32-NEXT:    csrr a1, vlenb
1026; CHECK-RV32-NEXT:    slli a1, a1, 3
1027; CHECK-RV32-NEXT:    add a1, sp, a1
1028; CHECK-RV32-NEXT:    addi a1, a1, 16
1029; CHECK-RV32-NEXT:    vs8r.v v16, (a1) # Unknown-size Folded Spill
1030; CHECK-RV32-NEXT:    li a1, 32
1031; CHECK-RV32-NEXT:    vsetivli zero, 4, e8, mf2, ta, ma
1032; CHECK-RV32-NEXT:    vslidedown.vi v7, v0, 4
1033; CHECK-RV32-NEXT:    vsetvli zero, a1, e8, m2, ta, ma
1034; CHECK-RV32-NEXT:    vcpop.m a2, v0
1035; CHECK-RV32-NEXT:    vcpop.m a3, v7
1036; CHECK-RV32-NEXT:    vsetvli zero, a2, e32, m8, ta, ma
1037; CHECK-RV32-NEXT:    vle32.v v24, (a0)
1038; CHECK-RV32-NEXT:    csrr a4, vlenb
1039; CHECK-RV32-NEXT:    slli a4, a4, 4
1040; CHECK-RV32-NEXT:    add a4, sp, a4
1041; CHECK-RV32-NEXT:    addi a4, a4, 16
1042; CHECK-RV32-NEXT:    vs8r.v v24, (a4) # Unknown-size Folded Spill
1043; CHECK-RV32-NEXT:    slli a2, a2, 2
1044; CHECK-RV32-NEXT:    add a0, a0, a2
1045; CHECK-RV32-NEXT:    vsetvli zero, a3, e32, m8, ta, ma
1046; CHECK-RV32-NEXT:    vle32.v v24, (a0)
1047; CHECK-RV32-NEXT:    csrr a0, vlenb
1048; CHECK-RV32-NEXT:    li a2, 24
1049; CHECK-RV32-NEXT:    mul a0, a0, a2
1050; CHECK-RV32-NEXT:    add a0, sp, a0
1051; CHECK-RV32-NEXT:    addi a0, a0, 16
1052; CHECK-RV32-NEXT:    vs8r.v v24, (a0) # Unknown-size Folded Spill
1053; CHECK-RV32-NEXT:    vsetvli zero, a1, e32, m8, ta, mu
1054; CHECK-RV32-NEXT:    viota.m v24, v0
1055; CHECK-RV32-NEXT:    csrr a0, vlenb
1056; CHECK-RV32-NEXT:    slli a0, a0, 4
1057; CHECK-RV32-NEXT:    add a0, sp, a0
1058; CHECK-RV32-NEXT:    addi a0, a0, 16
1059; CHECK-RV32-NEXT:    vl8r.v v16, (a0) # Unknown-size Folded Reload
1060; CHECK-RV32-NEXT:    vrgather.vv v8, v16, v24, v0.t
1061; CHECK-RV32-NEXT:    addi a0, sp, 16
1062; CHECK-RV32-NEXT:    vs8r.v v8, (a0) # Unknown-size Folded Spill
1063; CHECK-RV32-NEXT:    viota.m v16, v7
1064; CHECK-RV32-NEXT:    csrr a0, vlenb
1065; CHECK-RV32-NEXT:    slli a0, a0, 4
1066; CHECK-RV32-NEXT:    add a0, sp, a0
1067; CHECK-RV32-NEXT:    addi a0, a0, 16
1068; CHECK-RV32-NEXT:    vs8r.v v16, (a0) # Unknown-size Folded Spill
1069; CHECK-RV32-NEXT:    vmv1r.v v0, v7
1070; CHECK-RV32-NEXT:    csrr a0, vlenb
1071; CHECK-RV32-NEXT:    li a1, 24
1072; CHECK-RV32-NEXT:    mul a0, a0, a1
1073; CHECK-RV32-NEXT:    add a0, sp, a0
1074; CHECK-RV32-NEXT:    addi a0, a0, 16
1075; CHECK-RV32-NEXT:    vl8r.v v24, (a0) # Unknown-size Folded Reload
1076; CHECK-RV32-NEXT:    csrr a0, vlenb
1077; CHECK-RV32-NEXT:    slli a0, a0, 3
1078; CHECK-RV32-NEXT:    add a0, sp, a0
1079; CHECK-RV32-NEXT:    addi a0, a0, 16
1080; CHECK-RV32-NEXT:    vl8r.v v16, (a0) # Unknown-size Folded Reload
1081; CHECK-RV32-NEXT:    csrr a0, vlenb
1082; CHECK-RV32-NEXT:    slli a0, a0, 4
1083; CHECK-RV32-NEXT:    add a0, sp, a0
1084; CHECK-RV32-NEXT:    addi a0, a0, 16
1085; CHECK-RV32-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
1086; CHECK-RV32-NEXT:    vrgather.vv v16, v24, v8, v0.t
1087; CHECK-RV32-NEXT:    addi a0, sp, 16
1088; CHECK-RV32-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
1089; CHECK-RV32-NEXT:    csrr a0, vlenb
1090; CHECK-RV32-NEXT:    slli a0, a0, 5
1091; CHECK-RV32-NEXT:    add sp, sp, a0
1092; CHECK-RV32-NEXT:    .cfi_def_cfa sp, 16
1093; CHECK-RV32-NEXT:    addi sp, sp, 16
1094; CHECK-RV32-NEXT:    .cfi_def_cfa_offset 0
1095; CHECK-RV32-NEXT:    ret
1096;
1097; CHECK-RV64-LABEL: test_expandload_v64i32:
1098; CHECK-RV64:       # %bb.0:
1099; CHECK-RV64-NEXT:    addi sp, sp, -16
1100; CHECK-RV64-NEXT:    .cfi_def_cfa_offset 16
1101; CHECK-RV64-NEXT:    csrr a1, vlenb
1102; CHECK-RV64-NEXT:    slli a1, a1, 5
1103; CHECK-RV64-NEXT:    sub sp, sp, a1
1104; CHECK-RV64-NEXT:    .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 32 * vlenb
1105; CHECK-RV64-NEXT:    csrr a1, vlenb
1106; CHECK-RV64-NEXT:    slli a1, a1, 4
1107; CHECK-RV64-NEXT:    add a1, sp, a1
1108; CHECK-RV64-NEXT:    addi a1, a1, 16
1109; CHECK-RV64-NEXT:    vs8r.v v16, (a1) # Unknown-size Folded Spill
1110; CHECK-RV64-NEXT:    li a1, 32
1111; CHECK-RV64-NEXT:    vsetivli zero, 4, e8, mf2, ta, ma
1112; CHECK-RV64-NEXT:    vslidedown.vi v7, v0, 4
1113; CHECK-RV64-NEXT:    vsetvli zero, zero, e32, m2, ta, ma
1114; CHECK-RV64-NEXT:    vmv.x.s a2, v0
1115; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m2, ta, ma
1116; CHECK-RV64-NEXT:    vcpop.m a3, v0
1117; CHECK-RV64-NEXT:    vsetvli zero, a3, e32, m8, ta, ma
1118; CHECK-RV64-NEXT:    vle32.v v24, (a0)
1119; CHECK-RV64-NEXT:    csrr a3, vlenb
1120; CHECK-RV64-NEXT:    li a4, 24
1121; CHECK-RV64-NEXT:    mul a3, a3, a4
1122; CHECK-RV64-NEXT:    add a3, sp, a3
1123; CHECK-RV64-NEXT:    addi a3, a3, 16
1124; CHECK-RV64-NEXT:    vs8r.v v24, (a3) # Unknown-size Folded Spill
1125; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m2, ta, ma
1126; CHECK-RV64-NEXT:    vcpop.m a3, v7
1127; CHECK-RV64-NEXT:    cpopw a2, a2
1128; CHECK-RV64-NEXT:    slli a2, a2, 2
1129; CHECK-RV64-NEXT:    add a0, a0, a2
1130; CHECK-RV64-NEXT:    vsetvli zero, a3, e32, m8, ta, ma
1131; CHECK-RV64-NEXT:    vle32.v v16, (a0)
1132; CHECK-RV64-NEXT:    csrr a0, vlenb
1133; CHECK-RV64-NEXT:    slli a0, a0, 3
1134; CHECK-RV64-NEXT:    add a0, sp, a0
1135; CHECK-RV64-NEXT:    addi a0, a0, 16
1136; CHECK-RV64-NEXT:    vs8r.v v16, (a0) # Unknown-size Folded Spill
1137; CHECK-RV64-NEXT:    vsetvli zero, a1, e32, m8, ta, mu
1138; CHECK-RV64-NEXT:    viota.m v24, v0
1139; CHECK-RV64-NEXT:    csrr a0, vlenb
1140; CHECK-RV64-NEXT:    li a1, 24
1141; CHECK-RV64-NEXT:    mul a0, a0, a1
1142; CHECK-RV64-NEXT:    add a0, sp, a0
1143; CHECK-RV64-NEXT:    addi a0, a0, 16
1144; CHECK-RV64-NEXT:    vl8r.v v16, (a0) # Unknown-size Folded Reload
1145; CHECK-RV64-NEXT:    vrgather.vv v8, v16, v24, v0.t
1146; CHECK-RV64-NEXT:    addi a0, sp, 16
1147; CHECK-RV64-NEXT:    vs8r.v v8, (a0) # Unknown-size Folded Spill
1148; CHECK-RV64-NEXT:    viota.m v8, v7
1149; CHECK-RV64-NEXT:    vmv1r.v v0, v7
1150; CHECK-RV64-NEXT:    csrr a0, vlenb
1151; CHECK-RV64-NEXT:    slli a0, a0, 4
1152; CHECK-RV64-NEXT:    add a0, sp, a0
1153; CHECK-RV64-NEXT:    addi a0, a0, 16
1154; CHECK-RV64-NEXT:    vl8r.v v16, (a0) # Unknown-size Folded Reload
1155; CHECK-RV64-NEXT:    csrr a0, vlenb
1156; CHECK-RV64-NEXT:    slli a0, a0, 3
1157; CHECK-RV64-NEXT:    add a0, sp, a0
1158; CHECK-RV64-NEXT:    addi a0, a0, 16
1159; CHECK-RV64-NEXT:    vl8r.v v24, (a0) # Unknown-size Folded Reload
1160; CHECK-RV64-NEXT:    vrgather.vv v16, v24, v8, v0.t
1161; CHECK-RV64-NEXT:    addi a0, sp, 16
1162; CHECK-RV64-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
1163; CHECK-RV64-NEXT:    csrr a0, vlenb
1164; CHECK-RV64-NEXT:    slli a0, a0, 5
1165; CHECK-RV64-NEXT:    add sp, sp, a0
1166; CHECK-RV64-NEXT:    .cfi_def_cfa sp, 16
1167; CHECK-RV64-NEXT:    addi sp, sp, 16
1168; CHECK-RV64-NEXT:    .cfi_def_cfa_offset 0
1169; CHECK-RV64-NEXT:    ret
1170  %res = call <64 x i32> @llvm.masked.expandload.v64i32(ptr align 4 %base, <64 x i1> %mask, <64 x i32> %passthru)
1171  ret <64 x i32> %res
1172}
1173
1174define <64 x i32> @test_expandload_v64i32_all_ones(ptr %base, <64 x i32> %passthru) {
1175; CHECK-RV32-LABEL: test_expandload_v64i32_all_ones:
1176; CHECK-RV32:       # %bb.0:
1177; CHECK-RV32-NEXT:    li a1, 32
1178; CHECK-RV32-NEXT:    vsetvli zero, a1, e32, m8, ta, ma
1179; CHECK-RV32-NEXT:    vle32.v v8, (a0)
1180; CHECK-RV32-NEXT:    vmset.m v16
1181; CHECK-RV32-NEXT:    vcpop.m a1, v16
1182; CHECK-RV32-NEXT:    slli a1, a1, 2
1183; CHECK-RV32-NEXT:    add a0, a0, a1
1184; CHECK-RV32-NEXT:    vle32.v v16, (a0)
1185; CHECK-RV32-NEXT:    ret
1186;
1187; CHECK-RV64-LABEL: test_expandload_v64i32_all_ones:
1188; CHECK-RV64:       # %bb.0:
1189; CHECK-RV64-NEXT:    li a1, 32
1190; CHECK-RV64-NEXT:    vsetvli zero, a1, e32, m8, ta, ma
1191; CHECK-RV64-NEXT:    vle32.v v8, (a0)
1192; CHECK-RV64-NEXT:    addi a0, a0, 128
1193; CHECK-RV64-NEXT:    vle32.v v16, (a0)
1194; CHECK-RV64-NEXT:    ret
1195  %res = call <64 x i32> @llvm.masked.expandload.v64i32(ptr align 4 %base, <64 x i1> splat (i1 true), <64 x i32> %passthru)
1196  ret <64 x i32> %res
1197}
1198
1199; Load + expand for i64 type
1200
1201define <1 x i64> @test_expandload_v1i64(ptr %base, <1 x i1> %mask, <1 x i64> %passthru) {
1202; CHECK-LABEL: test_expandload_v1i64:
1203; CHECK:       # %bb.0:
1204; CHECK-NEXT:    vsetivli zero, 1, e8, mf8, ta, ma
1205; CHECK-NEXT:    vcpop.m a1, v0
1206; CHECK-NEXT:    vsetvli zero, a1, e64, m1, ta, ma
1207; CHECK-NEXT:    vle64.v v9, (a0)
1208; CHECK-NEXT:    vsetivli zero, 1, e64, m1, ta, mu
1209; CHECK-NEXT:    viota.m v10, v0
1210; CHECK-NEXT:    vrgather.vv v8, v9, v10, v0.t
1211; CHECK-NEXT:    ret
1212  %res = call <1 x i64> @llvm.masked.expandload.v1i64(ptr align 8 %base, <1 x i1> %mask, <1 x i64> %passthru)
1213  ret <1 x i64> %res
1214}
1215
1216define <1 x i64> @test_expandload_v1i64_all_ones(ptr %base, <1 x i64> %passthru) {
1217; CHECK-LABEL: test_expandload_v1i64_all_ones:
1218; CHECK:       # %bb.0:
1219; CHECK-NEXT:    vsetivli zero, 1, e64, m1, ta, ma
1220; CHECK-NEXT:    vle64.v v8, (a0)
1221; CHECK-NEXT:    ret
1222  %res = call <1 x i64> @llvm.masked.expandload.v1i64(ptr align 8 %base, <1 x i1> splat (i1 true), <1 x i64> %passthru)
1223  ret <1 x i64> %res
1224}
1225
1226define <2 x i64> @test_expandload_v2i64(ptr %base, <2 x i1> %mask, <2 x i64> %passthru) {
1227; CHECK-LABEL: test_expandload_v2i64:
1228; CHECK:       # %bb.0:
1229; CHECK-NEXT:    vsetivli zero, 2, e8, mf8, ta, ma
1230; CHECK-NEXT:    vcpop.m a1, v0
1231; CHECK-NEXT:    vsetvli zero, a1, e64, m1, ta, ma
1232; CHECK-NEXT:    vle64.v v9, (a0)
1233; CHECK-NEXT:    vsetivli zero, 2, e64, m1, ta, mu
1234; CHECK-NEXT:    viota.m v10, v0
1235; CHECK-NEXT:    vrgather.vv v8, v9, v10, v0.t
1236; CHECK-NEXT:    ret
1237  %res = call <2 x i64> @llvm.masked.expandload.v2i64(ptr align 8 %base, <2 x i1> %mask, <2 x i64> %passthru)
1238  ret <2 x i64> %res
1239}
1240
1241define <2 x i64> @test_expandload_v2i64_all_ones(ptr %base, <2 x i64> %passthru) {
1242; CHECK-LABEL: test_expandload_v2i64_all_ones:
1243; CHECK:       # %bb.0:
1244; CHECK-NEXT:    vsetivli zero, 2, e64, m1, ta, ma
1245; CHECK-NEXT:    vle64.v v8, (a0)
1246; CHECK-NEXT:    ret
1247  %res = call <2 x i64> @llvm.masked.expandload.v2i64(ptr align 8 %base, <2 x i1> splat (i1 true), <2 x i64> %passthru)
1248  ret <2 x i64> %res
1249}
1250
1251define <4 x i64> @test_expandload_v4i64(ptr %base, <4 x i1> %mask, <4 x i64> %passthru) {
1252; CHECK-LABEL: test_expandload_v4i64:
1253; CHECK:       # %bb.0:
1254; CHECK-NEXT:    vsetivli zero, 4, e8, mf4, ta, ma
1255; CHECK-NEXT:    vcpop.m a1, v0
1256; CHECK-NEXT:    vsetvli zero, a1, e64, m2, ta, ma
1257; CHECK-NEXT:    vle64.v v10, (a0)
1258; CHECK-NEXT:    vsetivli zero, 4, e64, m2, ta, mu
1259; CHECK-NEXT:    viota.m v12, v0
1260; CHECK-NEXT:    vrgather.vv v8, v10, v12, v0.t
1261; CHECK-NEXT:    ret
1262  %res = call <4 x i64> @llvm.masked.expandload.v4i64(ptr align 8 %base, <4 x i1> %mask, <4 x i64> %passthru)
1263  ret <4 x i64> %res
1264}
1265
1266define <4 x i64> @test_expandload_v4i64_all_ones(ptr %base, <4 x i64> %passthru) {
1267; CHECK-LABEL: test_expandload_v4i64_all_ones:
1268; CHECK:       # %bb.0:
1269; CHECK-NEXT:    vsetivli zero, 4, e64, m2, ta, ma
1270; CHECK-NEXT:    vle64.v v8, (a0)
1271; CHECK-NEXT:    ret
1272  %res = call <4 x i64> @llvm.masked.expandload.v4i64(ptr align 8 %base, <4 x i1> splat (i1 true), <4 x i64> %passthru)
1273  ret <4 x i64> %res
1274}
1275
1276define <8 x i64> @test_expandload_v8i64(ptr %base, <8 x i1> %mask, <8 x i64> %passthru) {
1277; CHECK-LABEL: test_expandload_v8i64:
1278; CHECK:       # %bb.0:
1279; CHECK-NEXT:    vsetivli zero, 8, e8, mf2, ta, ma
1280; CHECK-NEXT:    vcpop.m a1, v0
1281; CHECK-NEXT:    vsetvli zero, a1, e64, m4, ta, ma
1282; CHECK-NEXT:    vle64.v v12, (a0)
1283; CHECK-NEXT:    vsetivli zero, 8, e64, m4, ta, mu
1284; CHECK-NEXT:    viota.m v16, v0
1285; CHECK-NEXT:    vrgather.vv v8, v12, v16, v0.t
1286; CHECK-NEXT:    ret
1287  %res = call <8 x i64> @llvm.masked.expandload.v8i64(ptr align 8 %base, <8 x i1> %mask, <8 x i64> %passthru)
1288  ret <8 x i64> %res
1289}
1290
1291define <8 x i64> @test_expandload_v8i64_all_ones(ptr %base, <8 x i64> %passthru) {
1292; CHECK-LABEL: test_expandload_v8i64_all_ones:
1293; CHECK:       # %bb.0:
1294; CHECK-NEXT:    vsetivli zero, 8, e64, m4, ta, ma
1295; CHECK-NEXT:    vle64.v v8, (a0)
1296; CHECK-NEXT:    ret
1297  %res = call <8 x i64> @llvm.masked.expandload.v8i64(ptr align 8 %base, <8 x i1> splat (i1 true), <8 x i64> %passthru)
1298  ret <8 x i64> %res
1299}
1300
1301define <16 x i64> @test_expandload_v16i64(ptr %base, <16 x i1> %mask, <16 x i64> %passthru) {
1302; CHECK-LABEL: test_expandload_v16i64:
1303; CHECK:       # %bb.0:
1304; CHECK-NEXT:    vsetivli zero, 16, e8, m1, ta, ma
1305; CHECK-NEXT:    vcpop.m a1, v0
1306; CHECK-NEXT:    vsetvli zero, a1, e64, m8, ta, ma
1307; CHECK-NEXT:    vle64.v v16, (a0)
1308; CHECK-NEXT:    vsetivli zero, 16, e64, m8, ta, mu
1309; CHECK-NEXT:    viota.m v24, v0
1310; CHECK-NEXT:    vrgather.vv v8, v16, v24, v0.t
1311; CHECK-NEXT:    ret
1312  %res = call <16 x i64> @llvm.masked.expandload.v16i64(ptr align 8 %base, <16 x i1> %mask, <16 x i64> %passthru)
1313  ret <16 x i64> %res
1314}
1315
1316define <16 x i64> @test_expandload_v16i64_all_ones(ptr %base, <16 x i64> %passthru) {
1317; CHECK-LABEL: test_expandload_v16i64_all_ones:
1318; CHECK:       # %bb.0:
1319; CHECK-NEXT:    vsetivli zero, 16, e64, m8, ta, ma
1320; CHECK-NEXT:    vle64.v v8, (a0)
1321; CHECK-NEXT:    ret
1322  %res = call <16 x i64> @llvm.masked.expandload.v16i64(ptr align 8 %base, <16 x i1> splat (i1 true), <16 x i64> %passthru)
1323  ret <16 x i64> %res
1324}
1325
1326define <32 x i64> @test_expandload_v32i64(ptr %base, <32 x i1> %mask, <32 x i64> %passthru) {
1327; CHECK-RV32-LABEL: test_expandload_v32i64:
1328; CHECK-RV32:       # %bb.0:
1329; CHECK-RV32-NEXT:    addi sp, sp, -16
1330; CHECK-RV32-NEXT:    .cfi_def_cfa_offset 16
1331; CHECK-RV32-NEXT:    csrr a1, vlenb
1332; CHECK-RV32-NEXT:    slli a1, a1, 5
1333; CHECK-RV32-NEXT:    sub sp, sp, a1
1334; CHECK-RV32-NEXT:    .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 32 * vlenb
1335; CHECK-RV32-NEXT:    csrr a1, vlenb
1336; CHECK-RV32-NEXT:    slli a1, a1, 4
1337; CHECK-RV32-NEXT:    add a1, sp, a1
1338; CHECK-RV32-NEXT:    addi a1, a1, 16
1339; CHECK-RV32-NEXT:    vs8r.v v16, (a1) # Unknown-size Folded Spill
1340; CHECK-RV32-NEXT:    vsetivli zero, 16, e8, m1, ta, ma
1341; CHECK-RV32-NEXT:    vcpop.m a1, v0
1342; CHECK-RV32-NEXT:    vsetvli zero, a1, e16, m2, ta, ma
1343; CHECK-RV32-NEXT:    vle64.v v24, (a0)
1344; CHECK-RV32-NEXT:    csrr a1, vlenb
1345; CHECK-RV32-NEXT:    li a2, 24
1346; CHECK-RV32-NEXT:    mul a1, a1, a2
1347; CHECK-RV32-NEXT:    add a1, sp, a1
1348; CHECK-RV32-NEXT:    addi a1, a1, 16
1349; CHECK-RV32-NEXT:    vs8r.v v24, (a1) # Unknown-size Folded Spill
1350; CHECK-RV32-NEXT:    vmv.x.s a1, v0
1351; CHECK-RV32-NEXT:    vsetivli zero, 2, e8, mf4, ta, ma
1352; CHECK-RV32-NEXT:    vslidedown.vi v7, v0, 2
1353; CHECK-RV32-NEXT:    zext.h a1, a1
1354; CHECK-RV32-NEXT:    cpop a1, a1
1355; CHECK-RV32-NEXT:    slli a1, a1, 3
1356; CHECK-RV32-NEXT:    add a0, a0, a1
1357; CHECK-RV32-NEXT:    vsetivli zero, 16, e8, m1, ta, ma
1358; CHECK-RV32-NEXT:    vcpop.m a1, v7
1359; CHECK-RV32-NEXT:    vsetvli zero, a1, e64, m8, ta, ma
1360; CHECK-RV32-NEXT:    vle64.v v16, (a0)
1361; CHECK-RV32-NEXT:    csrr a0, vlenb
1362; CHECK-RV32-NEXT:    slli a0, a0, 3
1363; CHECK-RV32-NEXT:    add a0, sp, a0
1364; CHECK-RV32-NEXT:    addi a0, a0, 16
1365; CHECK-RV32-NEXT:    vs8r.v v16, (a0) # Unknown-size Folded Spill
1366; CHECK-RV32-NEXT:    vsetivli zero, 16, e64, m8, ta, mu
1367; CHECK-RV32-NEXT:    viota.m v24, v0
1368; CHECK-RV32-NEXT:    csrr a0, vlenb
1369; CHECK-RV32-NEXT:    li a1, 24
1370; CHECK-RV32-NEXT:    mul a0, a0, a1
1371; CHECK-RV32-NEXT:    add a0, sp, a0
1372; CHECK-RV32-NEXT:    addi a0, a0, 16
1373; CHECK-RV32-NEXT:    vl8r.v v16, (a0) # Unknown-size Folded Reload
1374; CHECK-RV32-NEXT:    vrgather.vv v8, v16, v24, v0.t
1375; CHECK-RV32-NEXT:    addi a0, sp, 16
1376; CHECK-RV32-NEXT:    vs8r.v v8, (a0) # Unknown-size Folded Spill
1377; CHECK-RV32-NEXT:    viota.m v8, v7
1378; CHECK-RV32-NEXT:    vmv1r.v v0, v7
1379; CHECK-RV32-NEXT:    csrr a0, vlenb
1380; CHECK-RV32-NEXT:    slli a0, a0, 4
1381; CHECK-RV32-NEXT:    add a0, sp, a0
1382; CHECK-RV32-NEXT:    addi a0, a0, 16
1383; CHECK-RV32-NEXT:    vl8r.v v16, (a0) # Unknown-size Folded Reload
1384; CHECK-RV32-NEXT:    csrr a0, vlenb
1385; CHECK-RV32-NEXT:    slli a0, a0, 3
1386; CHECK-RV32-NEXT:    add a0, sp, a0
1387; CHECK-RV32-NEXT:    addi a0, a0, 16
1388; CHECK-RV32-NEXT:    vl8r.v v24, (a0) # Unknown-size Folded Reload
1389; CHECK-RV32-NEXT:    vrgather.vv v16, v24, v8, v0.t
1390; CHECK-RV32-NEXT:    addi a0, sp, 16
1391; CHECK-RV32-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
1392; CHECK-RV32-NEXT:    csrr a0, vlenb
1393; CHECK-RV32-NEXT:    slli a0, a0, 5
1394; CHECK-RV32-NEXT:    add sp, sp, a0
1395; CHECK-RV32-NEXT:    .cfi_def_cfa sp, 16
1396; CHECK-RV32-NEXT:    addi sp, sp, 16
1397; CHECK-RV32-NEXT:    .cfi_def_cfa_offset 0
1398; CHECK-RV32-NEXT:    ret
1399;
1400; CHECK-RV64-LABEL: test_expandload_v32i64:
1401; CHECK-RV64:       # %bb.0:
1402; CHECK-RV64-NEXT:    addi sp, sp, -16
1403; CHECK-RV64-NEXT:    .cfi_def_cfa_offset 16
1404; CHECK-RV64-NEXT:    csrr a1, vlenb
1405; CHECK-RV64-NEXT:    slli a1, a1, 5
1406; CHECK-RV64-NEXT:    sub sp, sp, a1
1407; CHECK-RV64-NEXT:    .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 32 * vlenb
1408; CHECK-RV64-NEXT:    csrr a1, vlenb
1409; CHECK-RV64-NEXT:    slli a1, a1, 4
1410; CHECK-RV64-NEXT:    add a1, sp, a1
1411; CHECK-RV64-NEXT:    addi a1, a1, 16
1412; CHECK-RV64-NEXT:    vs8r.v v16, (a1) # Unknown-size Folded Spill
1413; CHECK-RV64-NEXT:    vsetivli zero, 16, e8, m1, ta, ma
1414; CHECK-RV64-NEXT:    vcpop.m a1, v0
1415; CHECK-RV64-NEXT:    vsetvli zero, a1, e16, m2, ta, ma
1416; CHECK-RV64-NEXT:    vle64.v v24, (a0)
1417; CHECK-RV64-NEXT:    csrr a1, vlenb
1418; CHECK-RV64-NEXT:    li a2, 24
1419; CHECK-RV64-NEXT:    mul a1, a1, a2
1420; CHECK-RV64-NEXT:    add a1, sp, a1
1421; CHECK-RV64-NEXT:    addi a1, a1, 16
1422; CHECK-RV64-NEXT:    vs8r.v v24, (a1) # Unknown-size Folded Spill
1423; CHECK-RV64-NEXT:    vmv.x.s a1, v0
1424; CHECK-RV64-NEXT:    vsetivli zero, 2, e8, mf4, ta, ma
1425; CHECK-RV64-NEXT:    vslidedown.vi v7, v0, 2
1426; CHECK-RV64-NEXT:    zext.h a1, a1
1427; CHECK-RV64-NEXT:    cpopw a1, a1
1428; CHECK-RV64-NEXT:    slli a1, a1, 3
1429; CHECK-RV64-NEXT:    add a0, a0, a1
1430; CHECK-RV64-NEXT:    vsetivli zero, 16, e8, m1, ta, ma
1431; CHECK-RV64-NEXT:    vcpop.m a1, v7
1432; CHECK-RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma
1433; CHECK-RV64-NEXT:    vle64.v v16, (a0)
1434; CHECK-RV64-NEXT:    csrr a0, vlenb
1435; CHECK-RV64-NEXT:    slli a0, a0, 3
1436; CHECK-RV64-NEXT:    add a0, sp, a0
1437; CHECK-RV64-NEXT:    addi a0, a0, 16
1438; CHECK-RV64-NEXT:    vs8r.v v16, (a0) # Unknown-size Folded Spill
1439; CHECK-RV64-NEXT:    vsetivli zero, 16, e64, m8, ta, mu
1440; CHECK-RV64-NEXT:    viota.m v24, v0
1441; CHECK-RV64-NEXT:    csrr a0, vlenb
1442; CHECK-RV64-NEXT:    li a1, 24
1443; CHECK-RV64-NEXT:    mul a0, a0, a1
1444; CHECK-RV64-NEXT:    add a0, sp, a0
1445; CHECK-RV64-NEXT:    addi a0, a0, 16
1446; CHECK-RV64-NEXT:    vl8r.v v16, (a0) # Unknown-size Folded Reload
1447; CHECK-RV64-NEXT:    vrgather.vv v8, v16, v24, v0.t
1448; CHECK-RV64-NEXT:    addi a0, sp, 16
1449; CHECK-RV64-NEXT:    vs8r.v v8, (a0) # Unknown-size Folded Spill
1450; CHECK-RV64-NEXT:    viota.m v8, v7
1451; CHECK-RV64-NEXT:    vmv1r.v v0, v7
1452; CHECK-RV64-NEXT:    csrr a0, vlenb
1453; CHECK-RV64-NEXT:    slli a0, a0, 4
1454; CHECK-RV64-NEXT:    add a0, sp, a0
1455; CHECK-RV64-NEXT:    addi a0, a0, 16
1456; CHECK-RV64-NEXT:    vl8r.v v16, (a0) # Unknown-size Folded Reload
1457; CHECK-RV64-NEXT:    csrr a0, vlenb
1458; CHECK-RV64-NEXT:    slli a0, a0, 3
1459; CHECK-RV64-NEXT:    add a0, sp, a0
1460; CHECK-RV64-NEXT:    addi a0, a0, 16
1461; CHECK-RV64-NEXT:    vl8r.v v24, (a0) # Unknown-size Folded Reload
1462; CHECK-RV64-NEXT:    vrgather.vv v16, v24, v8, v0.t
1463; CHECK-RV64-NEXT:    addi a0, sp, 16
1464; CHECK-RV64-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
1465; CHECK-RV64-NEXT:    csrr a0, vlenb
1466; CHECK-RV64-NEXT:    slli a0, a0, 5
1467; CHECK-RV64-NEXT:    add sp, sp, a0
1468; CHECK-RV64-NEXT:    .cfi_def_cfa sp, 16
1469; CHECK-RV64-NEXT:    addi sp, sp, 16
1470; CHECK-RV64-NEXT:    .cfi_def_cfa_offset 0
1471; CHECK-RV64-NEXT:    ret
1472  %res = call <32 x i64> @llvm.masked.expandload.v32i64(ptr align 8 %base, <32 x i1> %mask, <32 x i64> %passthru)
1473  ret <32 x i64> %res
1474}
1475
1476define <32 x i64> @test_expandload_v32i64_all_ones(ptr %base, <32 x i64> %passthru) {
1477; CHECK-LABEL: test_expandload_v32i64_all_ones:
1478; CHECK:       # %bb.0:
1479; CHECK-NEXT:    vsetivli zero, 16, e64, m8, ta, ma
1480; CHECK-NEXT:    vle64.v v8, (a0)
1481; CHECK-NEXT:    addi a0, a0, 128
1482; CHECK-NEXT:    vle64.v v16, (a0)
1483; CHECK-NEXT:    ret
1484  %res = call <32 x i64> @llvm.masked.expandload.v32i64(ptr align 8 %base, <32 x i1> splat (i1 true), <32 x i64> %passthru)
1485  ret <32 x i64> %res
1486}
1487
1488; Tests that will exceed the range of i8 index.
1489
1490define <512 x i8> @test_expandload_v512i8(ptr %base, <512 x i1> %mask, <512 x i8> %passthru) vscale_range(16, 1024) {
1491; CHECK-LABEL: test_expandload_v512i8:
1492; CHECK:       # %bb.0:
1493; CHECK-NEXT:    li a1, 512
1494; CHECK-NEXT:    vsetvli zero, a1, e8, m4, ta, ma
1495; CHECK-NEXT:    vcpop.m a2, v0
1496; CHECK-NEXT:    vsetvli zero, a2, e8, m4, ta, ma
1497; CHECK-NEXT:    vle8.v v12, (a0)
1498; CHECK-NEXT:    vsetvli zero, a1, e16, m8, ta, ma
1499; CHECK-NEXT:    viota.m v16, v0
1500; CHECK-NEXT:    vsetvli zero, zero, e8, m4, ta, mu
1501; CHECK-NEXT:    vrgatherei16.vv v8, v12, v16, v0.t
1502; CHECK-NEXT:    ret
1503  %res = call <512 x i8> @llvm.masked.expandload.v512i8(ptr align 1 %base, <512 x i1> %mask, <512 x i8> %passthru)
1504  ret <512 x i8> %res
1505}
1506
1507; FIXME: We can split it in lowering.
1508define <512 x i8> @test_expandload_v512i8_vlen512(ptr %base, <512 x i1> %mask, <512 x i8> %passthru) vscale_range(8, 1024) {
1509; CHECK-RV32-LABEL: test_expandload_v512i8_vlen512:
1510; CHECK-RV32:       # %bb.0:
1511; CHECK-RV32-NEXT:    vsetivli zero, 1, e64, m1, ta, ma
1512; CHECK-RV32-NEXT:    vmv.x.s a3, v0
1513; CHECK-RV32-NEXT:    andi a1, a3, 1
1514; CHECK-RV32-NEXT:    beqz a1, .LBB61_1
1515; CHECK-RV32-NEXT:    j .LBB61_544
1516; CHECK-RV32-NEXT:  .LBB61_1: # %else
1517; CHECK-RV32-NEXT:    andi a1, a3, 2
1518; CHECK-RV32-NEXT:    beqz a1, .LBB61_2
1519; CHECK-RV32-NEXT:    j .LBB61_545
1520; CHECK-RV32-NEXT:  .LBB61_2: # %else2
1521; CHECK-RV32-NEXT:    andi a1, a3, 4
1522; CHECK-RV32-NEXT:    beqz a1, .LBB61_3
1523; CHECK-RV32-NEXT:    j .LBB61_546
1524; CHECK-RV32-NEXT:  .LBB61_3: # %else6
1525; CHECK-RV32-NEXT:    andi a1, a3, 8
1526; CHECK-RV32-NEXT:    beqz a1, .LBB61_4
1527; CHECK-RV32-NEXT:    j .LBB61_547
1528; CHECK-RV32-NEXT:  .LBB61_4: # %else10
1529; CHECK-RV32-NEXT:    andi a1, a3, 16
1530; CHECK-RV32-NEXT:    beqz a1, .LBB61_5
1531; CHECK-RV32-NEXT:    j .LBB61_548
1532; CHECK-RV32-NEXT:  .LBB61_5: # %else14
1533; CHECK-RV32-NEXT:    andi a1, a3, 32
1534; CHECK-RV32-NEXT:    beqz a1, .LBB61_6
1535; CHECK-RV32-NEXT:    j .LBB61_549
1536; CHECK-RV32-NEXT:  .LBB61_6: # %else18
1537; CHECK-RV32-NEXT:    andi a1, a3, 64
1538; CHECK-RV32-NEXT:    beqz a1, .LBB61_7
1539; CHECK-RV32-NEXT:    j .LBB61_550
1540; CHECK-RV32-NEXT:  .LBB61_7: # %else22
1541; CHECK-RV32-NEXT:    andi a1, a3, 128
1542; CHECK-RV32-NEXT:    beqz a1, .LBB61_8
1543; CHECK-RV32-NEXT:    j .LBB61_551
1544; CHECK-RV32-NEXT:  .LBB61_8: # %else26
1545; CHECK-RV32-NEXT:    andi a1, a3, 256
1546; CHECK-RV32-NEXT:    beqz a1, .LBB61_9
1547; CHECK-RV32-NEXT:    j .LBB61_552
1548; CHECK-RV32-NEXT:  .LBB61_9: # %else30
1549; CHECK-RV32-NEXT:    andi a1, a3, 512
1550; CHECK-RV32-NEXT:    beqz a1, .LBB61_10
1551; CHECK-RV32-NEXT:    j .LBB61_553
1552; CHECK-RV32-NEXT:  .LBB61_10: # %else34
1553; CHECK-RV32-NEXT:    andi a1, a3, 1024
1554; CHECK-RV32-NEXT:    beqz a1, .LBB61_11
1555; CHECK-RV32-NEXT:    j .LBB61_554
1556; CHECK-RV32-NEXT:  .LBB61_11: # %else38
1557; CHECK-RV32-NEXT:    slli a1, a3, 20
1558; CHECK-RV32-NEXT:    bgez a1, .LBB61_12
1559; CHECK-RV32-NEXT:    j .LBB61_555
1560; CHECK-RV32-NEXT:  .LBB61_12: # %else42
1561; CHECK-RV32-NEXT:    slli a1, a3, 19
1562; CHECK-RV32-NEXT:    bgez a1, .LBB61_13
1563; CHECK-RV32-NEXT:    j .LBB61_556
1564; CHECK-RV32-NEXT:  .LBB61_13: # %else46
1565; CHECK-RV32-NEXT:    slli a1, a3, 18
1566; CHECK-RV32-NEXT:    bgez a1, .LBB61_14
1567; CHECK-RV32-NEXT:    j .LBB61_557
1568; CHECK-RV32-NEXT:  .LBB61_14: # %else50
1569; CHECK-RV32-NEXT:    slli a1, a3, 17
1570; CHECK-RV32-NEXT:    bgez a1, .LBB61_15
1571; CHECK-RV32-NEXT:    j .LBB61_558
1572; CHECK-RV32-NEXT:  .LBB61_15: # %else54
1573; CHECK-RV32-NEXT:    slli a1, a3, 16
1574; CHECK-RV32-NEXT:    bgez a1, .LBB61_16
1575; CHECK-RV32-NEXT:    j .LBB61_559
1576; CHECK-RV32-NEXT:  .LBB61_16: # %else58
1577; CHECK-RV32-NEXT:    slli a1, a3, 15
1578; CHECK-RV32-NEXT:    bgez a1, .LBB61_17
1579; CHECK-RV32-NEXT:    j .LBB61_560
1580; CHECK-RV32-NEXT:  .LBB61_17: # %else62
1581; CHECK-RV32-NEXT:    slli a1, a3, 14
1582; CHECK-RV32-NEXT:    bgez a1, .LBB61_18
1583; CHECK-RV32-NEXT:    j .LBB61_561
1584; CHECK-RV32-NEXT:  .LBB61_18: # %else66
1585; CHECK-RV32-NEXT:    slli a1, a3, 13
1586; CHECK-RV32-NEXT:    bgez a1, .LBB61_19
1587; CHECK-RV32-NEXT:    j .LBB61_562
1588; CHECK-RV32-NEXT:  .LBB61_19: # %else70
1589; CHECK-RV32-NEXT:    slli a1, a3, 12
1590; CHECK-RV32-NEXT:    bgez a1, .LBB61_20
1591; CHECK-RV32-NEXT:    j .LBB61_563
1592; CHECK-RV32-NEXT:  .LBB61_20: # %else74
1593; CHECK-RV32-NEXT:    slli a1, a3, 11
1594; CHECK-RV32-NEXT:    bgez a1, .LBB61_21
1595; CHECK-RV32-NEXT:    j .LBB61_564
1596; CHECK-RV32-NEXT:  .LBB61_21: # %else78
1597; CHECK-RV32-NEXT:    slli a1, a3, 10
1598; CHECK-RV32-NEXT:    bgez a1, .LBB61_22
1599; CHECK-RV32-NEXT:    j .LBB61_565
1600; CHECK-RV32-NEXT:  .LBB61_22: # %else82
1601; CHECK-RV32-NEXT:    slli a1, a3, 9
1602; CHECK-RV32-NEXT:    bgez a1, .LBB61_23
1603; CHECK-RV32-NEXT:    j .LBB61_566
1604; CHECK-RV32-NEXT:  .LBB61_23: # %else86
1605; CHECK-RV32-NEXT:    slli a1, a3, 8
1606; CHECK-RV32-NEXT:    bgez a1, .LBB61_24
1607; CHECK-RV32-NEXT:    j .LBB61_567
1608; CHECK-RV32-NEXT:  .LBB61_24: # %else90
1609; CHECK-RV32-NEXT:    slli a1, a3, 7
1610; CHECK-RV32-NEXT:    bgez a1, .LBB61_25
1611; CHECK-RV32-NEXT:    j .LBB61_568
1612; CHECK-RV32-NEXT:  .LBB61_25: # %else94
1613; CHECK-RV32-NEXT:    slli a1, a3, 6
1614; CHECK-RV32-NEXT:    bgez a1, .LBB61_26
1615; CHECK-RV32-NEXT:    j .LBB61_569
1616; CHECK-RV32-NEXT:  .LBB61_26: # %else98
1617; CHECK-RV32-NEXT:    slli a1, a3, 5
1618; CHECK-RV32-NEXT:    bgez a1, .LBB61_27
1619; CHECK-RV32-NEXT:    j .LBB61_570
1620; CHECK-RV32-NEXT:  .LBB61_27: # %else102
1621; CHECK-RV32-NEXT:    slli a1, a3, 4
1622; CHECK-RV32-NEXT:    bgez a1, .LBB61_28
1623; CHECK-RV32-NEXT:    j .LBB61_571
1624; CHECK-RV32-NEXT:  .LBB61_28: # %else106
1625; CHECK-RV32-NEXT:    slli a1, a3, 3
1626; CHECK-RV32-NEXT:    bgez a1, .LBB61_30
1627; CHECK-RV32-NEXT:  .LBB61_29: # %cond.load109
1628; CHECK-RV32-NEXT:    lbu a1, 0(a0)
1629; CHECK-RV32-NEXT:    vsetivli zero, 29, e8, m1, tu, ma
1630; CHECK-RV32-NEXT:    vmv8r.v v16, v8
1631; CHECK-RV32-NEXT:    vmv.s.x v9, a1
1632; CHECK-RV32-NEXT:    vslideup.vi v8, v9, 28
1633; CHECK-RV32-NEXT:    addi a0, a0, 1
1634; CHECK-RV32-NEXT:    vmv1r.v v16, v8
1635; CHECK-RV32-NEXT:    vmv8r.v v8, v16
1636; CHECK-RV32-NEXT:  .LBB61_30: # %else110
1637; CHECK-RV32-NEXT:    slli a2, a3, 2
1638; CHECK-RV32-NEXT:    li a1, 32
1639; CHECK-RV32-NEXT:    bgez a2, .LBB61_32
1640; CHECK-RV32-NEXT:  # %bb.31: # %cond.load113
1641; CHECK-RV32-NEXT:    lbu a2, 0(a0)
1642; CHECK-RV32-NEXT:    vsetivli zero, 30, e8, m1, tu, ma
1643; CHECK-RV32-NEXT:    vmv8r.v v16, v8
1644; CHECK-RV32-NEXT:    vmv.s.x v9, a2
1645; CHECK-RV32-NEXT:    vslideup.vi v8, v9, 29
1646; CHECK-RV32-NEXT:    addi a0, a0, 1
1647; CHECK-RV32-NEXT:    vmv1r.v v16, v8
1648; CHECK-RV32-NEXT:    vmv8r.v v8, v16
1649; CHECK-RV32-NEXT:  .LBB61_32: # %else114
1650; CHECK-RV32-NEXT:    slli a2, a3, 1
1651; CHECK-RV32-NEXT:    vsetivli zero, 1, e64, m1, ta, ma
1652; CHECK-RV32-NEXT:    vsrl.vx v16, v0, a1
1653; CHECK-RV32-NEXT:    bgez a2, .LBB61_34
1654; CHECK-RV32-NEXT:  # %bb.33: # %cond.load117
1655; CHECK-RV32-NEXT:    lbu a2, 0(a0)
1656; CHECK-RV32-NEXT:    vmv8r.v v24, v8
1657; CHECK-RV32-NEXT:    vmv.s.x v9, a2
1658; CHECK-RV32-NEXT:    vsetivli zero, 31, e8, m1, tu, ma
1659; CHECK-RV32-NEXT:    vslideup.vi v8, v9, 30
1660; CHECK-RV32-NEXT:    addi a0, a0, 1
1661; CHECK-RV32-NEXT:    vmv1r.v v24, v8
1662; CHECK-RV32-NEXT:    vmv8r.v v8, v24
1663; CHECK-RV32-NEXT:  .LBB61_34: # %else118
1664; CHECK-RV32-NEXT:    vsetivli zero, 1, e64, m1, ta, ma
1665; CHECK-RV32-NEXT:    vmv.x.s a2, v16
1666; CHECK-RV32-NEXT:    bgez a3, .LBB61_35
1667; CHECK-RV32-NEXT:    j .LBB61_572
1668; CHECK-RV32-NEXT:  .LBB61_35: # %else122
1669; CHECK-RV32-NEXT:    andi a3, a2, 1
1670; CHECK-RV32-NEXT:    beqz a3, .LBB61_36
1671; CHECK-RV32-NEXT:    j .LBB61_573
1672; CHECK-RV32-NEXT:  .LBB61_36: # %else126
1673; CHECK-RV32-NEXT:    andi a3, a2, 2
1674; CHECK-RV32-NEXT:    beqz a3, .LBB61_37
1675; CHECK-RV32-NEXT:    j .LBB61_574
1676; CHECK-RV32-NEXT:  .LBB61_37: # %else130
1677; CHECK-RV32-NEXT:    andi a3, a2, 4
1678; CHECK-RV32-NEXT:    beqz a3, .LBB61_38
1679; CHECK-RV32-NEXT:    j .LBB61_575
1680; CHECK-RV32-NEXT:  .LBB61_38: # %else134
1681; CHECK-RV32-NEXT:    andi a3, a2, 8
1682; CHECK-RV32-NEXT:    beqz a3, .LBB61_39
1683; CHECK-RV32-NEXT:    j .LBB61_576
1684; CHECK-RV32-NEXT:  .LBB61_39: # %else138
1685; CHECK-RV32-NEXT:    andi a3, a2, 16
1686; CHECK-RV32-NEXT:    beqz a3, .LBB61_40
1687; CHECK-RV32-NEXT:    j .LBB61_577
1688; CHECK-RV32-NEXT:  .LBB61_40: # %else142
1689; CHECK-RV32-NEXT:    andi a3, a2, 32
1690; CHECK-RV32-NEXT:    beqz a3, .LBB61_41
1691; CHECK-RV32-NEXT:    j .LBB61_578
1692; CHECK-RV32-NEXT:  .LBB61_41: # %else146
1693; CHECK-RV32-NEXT:    andi a3, a2, 64
1694; CHECK-RV32-NEXT:    beqz a3, .LBB61_42
1695; CHECK-RV32-NEXT:    j .LBB61_579
1696; CHECK-RV32-NEXT:  .LBB61_42: # %else150
1697; CHECK-RV32-NEXT:    andi a3, a2, 128
1698; CHECK-RV32-NEXT:    beqz a3, .LBB61_43
1699; CHECK-RV32-NEXT:    j .LBB61_580
1700; CHECK-RV32-NEXT:  .LBB61_43: # %else154
1701; CHECK-RV32-NEXT:    andi a3, a2, 256
1702; CHECK-RV32-NEXT:    beqz a3, .LBB61_44
1703; CHECK-RV32-NEXT:    j .LBB61_581
1704; CHECK-RV32-NEXT:  .LBB61_44: # %else158
1705; CHECK-RV32-NEXT:    andi a3, a2, 512
1706; CHECK-RV32-NEXT:    beqz a3, .LBB61_45
1707; CHECK-RV32-NEXT:    j .LBB61_582
1708; CHECK-RV32-NEXT:  .LBB61_45: # %else162
1709; CHECK-RV32-NEXT:    andi a3, a2, 1024
1710; CHECK-RV32-NEXT:    beqz a3, .LBB61_46
1711; CHECK-RV32-NEXT:    j .LBB61_583
1712; CHECK-RV32-NEXT:  .LBB61_46: # %else166
1713; CHECK-RV32-NEXT:    slli a3, a2, 20
1714; CHECK-RV32-NEXT:    bgez a3, .LBB61_47
1715; CHECK-RV32-NEXT:    j .LBB61_584
1716; CHECK-RV32-NEXT:  .LBB61_47: # %else170
1717; CHECK-RV32-NEXT:    slli a3, a2, 19
1718; CHECK-RV32-NEXT:    bgez a3, .LBB61_48
1719; CHECK-RV32-NEXT:    j .LBB61_585
1720; CHECK-RV32-NEXT:  .LBB61_48: # %else174
1721; CHECK-RV32-NEXT:    slli a3, a2, 18
1722; CHECK-RV32-NEXT:    bgez a3, .LBB61_49
1723; CHECK-RV32-NEXT:    j .LBB61_586
1724; CHECK-RV32-NEXT:  .LBB61_49: # %else178
1725; CHECK-RV32-NEXT:    slli a3, a2, 17
1726; CHECK-RV32-NEXT:    bgez a3, .LBB61_50
1727; CHECK-RV32-NEXT:    j .LBB61_587
1728; CHECK-RV32-NEXT:  .LBB61_50: # %else182
1729; CHECK-RV32-NEXT:    slli a3, a2, 16
1730; CHECK-RV32-NEXT:    bgez a3, .LBB61_51
1731; CHECK-RV32-NEXT:    j .LBB61_588
1732; CHECK-RV32-NEXT:  .LBB61_51: # %else186
1733; CHECK-RV32-NEXT:    slli a3, a2, 15
1734; CHECK-RV32-NEXT:    bgez a3, .LBB61_52
1735; CHECK-RV32-NEXT:    j .LBB61_589
1736; CHECK-RV32-NEXT:  .LBB61_52: # %else190
1737; CHECK-RV32-NEXT:    slli a3, a2, 14
1738; CHECK-RV32-NEXT:    bgez a3, .LBB61_53
1739; CHECK-RV32-NEXT:    j .LBB61_590
1740; CHECK-RV32-NEXT:  .LBB61_53: # %else194
1741; CHECK-RV32-NEXT:    slli a3, a2, 13
1742; CHECK-RV32-NEXT:    bgez a3, .LBB61_54
1743; CHECK-RV32-NEXT:    j .LBB61_591
1744; CHECK-RV32-NEXT:  .LBB61_54: # %else198
1745; CHECK-RV32-NEXT:    slli a3, a2, 12
1746; CHECK-RV32-NEXT:    bgez a3, .LBB61_55
1747; CHECK-RV32-NEXT:    j .LBB61_592
1748; CHECK-RV32-NEXT:  .LBB61_55: # %else202
1749; CHECK-RV32-NEXT:    slli a3, a2, 11
1750; CHECK-RV32-NEXT:    bgez a3, .LBB61_56
1751; CHECK-RV32-NEXT:    j .LBB61_593
1752; CHECK-RV32-NEXT:  .LBB61_56: # %else206
1753; CHECK-RV32-NEXT:    slli a3, a2, 10
1754; CHECK-RV32-NEXT:    bgez a3, .LBB61_57
1755; CHECK-RV32-NEXT:    j .LBB61_594
1756; CHECK-RV32-NEXT:  .LBB61_57: # %else210
1757; CHECK-RV32-NEXT:    slli a3, a2, 9
1758; CHECK-RV32-NEXT:    bgez a3, .LBB61_58
1759; CHECK-RV32-NEXT:    j .LBB61_595
1760; CHECK-RV32-NEXT:  .LBB61_58: # %else214
1761; CHECK-RV32-NEXT:    slli a3, a2, 8
1762; CHECK-RV32-NEXT:    bgez a3, .LBB61_59
1763; CHECK-RV32-NEXT:    j .LBB61_596
1764; CHECK-RV32-NEXT:  .LBB61_59: # %else218
1765; CHECK-RV32-NEXT:    slli a3, a2, 7
1766; CHECK-RV32-NEXT:    bgez a3, .LBB61_60
1767; CHECK-RV32-NEXT:    j .LBB61_597
1768; CHECK-RV32-NEXT:  .LBB61_60: # %else222
1769; CHECK-RV32-NEXT:    slli a3, a2, 6
1770; CHECK-RV32-NEXT:    bgez a3, .LBB61_61
1771; CHECK-RV32-NEXT:    j .LBB61_598
1772; CHECK-RV32-NEXT:  .LBB61_61: # %else226
1773; CHECK-RV32-NEXT:    slli a3, a2, 5
1774; CHECK-RV32-NEXT:    bgez a3, .LBB61_62
1775; CHECK-RV32-NEXT:    j .LBB61_599
1776; CHECK-RV32-NEXT:  .LBB61_62: # %else230
1777; CHECK-RV32-NEXT:    slli a3, a2, 4
1778; CHECK-RV32-NEXT:    bgez a3, .LBB61_63
1779; CHECK-RV32-NEXT:    j .LBB61_600
1780; CHECK-RV32-NEXT:  .LBB61_63: # %else234
1781; CHECK-RV32-NEXT:    slli a3, a2, 3
1782; CHECK-RV32-NEXT:    bgez a3, .LBB61_64
1783; CHECK-RV32-NEXT:    j .LBB61_601
1784; CHECK-RV32-NEXT:  .LBB61_64: # %else238
1785; CHECK-RV32-NEXT:    slli a3, a2, 2
1786; CHECK-RV32-NEXT:    bgez a3, .LBB61_66
1787; CHECK-RV32-NEXT:  .LBB61_65: # %cond.load241
1788; CHECK-RV32-NEXT:    lbu a3, 0(a0)
1789; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
1790; CHECK-RV32-NEXT:    vmv8r.v v16, v8
1791; CHECK-RV32-NEXT:    vmv.s.x v9, a3
1792; CHECK-RV32-NEXT:    li a3, 62
1793; CHECK-RV32-NEXT:    li a4, 61
1794; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m1, tu, ma
1795; CHECK-RV32-NEXT:    vslideup.vx v8, v9, a4
1796; CHECK-RV32-NEXT:    addi a0, a0, 1
1797; CHECK-RV32-NEXT:    vmv1r.v v16, v8
1798; CHECK-RV32-NEXT:    vmv8r.v v8, v16
1799; CHECK-RV32-NEXT:  .LBB61_66: # %else242
1800; CHECK-RV32-NEXT:    slli a3, a2, 1
1801; CHECK-RV32-NEXT:    vsetivli zero, 1, e64, m1, ta, ma
1802; CHECK-RV32-NEXT:    vslidedown.vi v16, v0, 1
1803; CHECK-RV32-NEXT:    bgez a3, .LBB61_68
1804; CHECK-RV32-NEXT:  # %bb.67: # %cond.load245
1805; CHECK-RV32-NEXT:    lbu a3, 0(a0)
1806; CHECK-RV32-NEXT:    vmv8r.v v24, v8
1807; CHECK-RV32-NEXT:    vmv.s.x v9, a3
1808; CHECK-RV32-NEXT:    li a3, 63
1809; CHECK-RV32-NEXT:    li a4, 62
1810; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m1, tu, ma
1811; CHECK-RV32-NEXT:    vslideup.vx v8, v9, a4
1812; CHECK-RV32-NEXT:    addi a0, a0, 1
1813; CHECK-RV32-NEXT:    vmv1r.v v24, v8
1814; CHECK-RV32-NEXT:    vmv8r.v v8, v24
1815; CHECK-RV32-NEXT:  .LBB61_68: # %else246
1816; CHECK-RV32-NEXT:    vsetivli zero, 1, e64, m1, ta, ma
1817; CHECK-RV32-NEXT:    vmv.x.s a3, v16
1818; CHECK-RV32-NEXT:    bgez a2, .LBB61_69
1819; CHECK-RV32-NEXT:    j .LBB61_602
1820; CHECK-RV32-NEXT:  .LBB61_69: # %else250
1821; CHECK-RV32-NEXT:    andi a2, a3, 1
1822; CHECK-RV32-NEXT:    beqz a2, .LBB61_70
1823; CHECK-RV32-NEXT:    j .LBB61_603
1824; CHECK-RV32-NEXT:  .LBB61_70: # %else254
1825; CHECK-RV32-NEXT:    andi a2, a3, 2
1826; CHECK-RV32-NEXT:    beqz a2, .LBB61_71
1827; CHECK-RV32-NEXT:    j .LBB61_604
1828; CHECK-RV32-NEXT:  .LBB61_71: # %else258
1829; CHECK-RV32-NEXT:    andi a2, a3, 4
1830; CHECK-RV32-NEXT:    beqz a2, .LBB61_72
1831; CHECK-RV32-NEXT:    j .LBB61_605
1832; CHECK-RV32-NEXT:  .LBB61_72: # %else262
1833; CHECK-RV32-NEXT:    andi a2, a3, 8
1834; CHECK-RV32-NEXT:    beqz a2, .LBB61_73
1835; CHECK-RV32-NEXT:    j .LBB61_606
1836; CHECK-RV32-NEXT:  .LBB61_73: # %else266
1837; CHECK-RV32-NEXT:    andi a2, a3, 16
1838; CHECK-RV32-NEXT:    beqz a2, .LBB61_74
1839; CHECK-RV32-NEXT:    j .LBB61_607
1840; CHECK-RV32-NEXT:  .LBB61_74: # %else270
1841; CHECK-RV32-NEXT:    andi a2, a3, 32
1842; CHECK-RV32-NEXT:    beqz a2, .LBB61_75
1843; CHECK-RV32-NEXT:    j .LBB61_608
1844; CHECK-RV32-NEXT:  .LBB61_75: # %else274
1845; CHECK-RV32-NEXT:    andi a2, a3, 64
1846; CHECK-RV32-NEXT:    beqz a2, .LBB61_76
1847; CHECK-RV32-NEXT:    j .LBB61_609
1848; CHECK-RV32-NEXT:  .LBB61_76: # %else278
1849; CHECK-RV32-NEXT:    andi a2, a3, 128
1850; CHECK-RV32-NEXT:    beqz a2, .LBB61_77
1851; CHECK-RV32-NEXT:    j .LBB61_610
1852; CHECK-RV32-NEXT:  .LBB61_77: # %else282
1853; CHECK-RV32-NEXT:    andi a2, a3, 256
1854; CHECK-RV32-NEXT:    beqz a2, .LBB61_78
1855; CHECK-RV32-NEXT:    j .LBB61_611
1856; CHECK-RV32-NEXT:  .LBB61_78: # %else286
1857; CHECK-RV32-NEXT:    andi a2, a3, 512
1858; CHECK-RV32-NEXT:    beqz a2, .LBB61_79
1859; CHECK-RV32-NEXT:    j .LBB61_612
1860; CHECK-RV32-NEXT:  .LBB61_79: # %else290
1861; CHECK-RV32-NEXT:    andi a2, a3, 1024
1862; CHECK-RV32-NEXT:    beqz a2, .LBB61_80
1863; CHECK-RV32-NEXT:    j .LBB61_613
1864; CHECK-RV32-NEXT:  .LBB61_80: # %else294
1865; CHECK-RV32-NEXT:    slli a2, a3, 20
1866; CHECK-RV32-NEXT:    bgez a2, .LBB61_81
1867; CHECK-RV32-NEXT:    j .LBB61_614
1868; CHECK-RV32-NEXT:  .LBB61_81: # %else298
1869; CHECK-RV32-NEXT:    slli a2, a3, 19
1870; CHECK-RV32-NEXT:    bgez a2, .LBB61_82
1871; CHECK-RV32-NEXT:    j .LBB61_615
1872; CHECK-RV32-NEXT:  .LBB61_82: # %else302
1873; CHECK-RV32-NEXT:    slli a2, a3, 18
1874; CHECK-RV32-NEXT:    bgez a2, .LBB61_83
1875; CHECK-RV32-NEXT:    j .LBB61_616
1876; CHECK-RV32-NEXT:  .LBB61_83: # %else306
1877; CHECK-RV32-NEXT:    slli a2, a3, 17
1878; CHECK-RV32-NEXT:    bgez a2, .LBB61_84
1879; CHECK-RV32-NEXT:    j .LBB61_617
1880; CHECK-RV32-NEXT:  .LBB61_84: # %else310
1881; CHECK-RV32-NEXT:    slli a2, a3, 16
1882; CHECK-RV32-NEXT:    bgez a2, .LBB61_85
1883; CHECK-RV32-NEXT:    j .LBB61_618
1884; CHECK-RV32-NEXT:  .LBB61_85: # %else314
1885; CHECK-RV32-NEXT:    slli a2, a3, 15
1886; CHECK-RV32-NEXT:    bgez a2, .LBB61_86
1887; CHECK-RV32-NEXT:    j .LBB61_619
1888; CHECK-RV32-NEXT:  .LBB61_86: # %else318
1889; CHECK-RV32-NEXT:    slli a2, a3, 14
1890; CHECK-RV32-NEXT:    bgez a2, .LBB61_87
1891; CHECK-RV32-NEXT:    j .LBB61_620
1892; CHECK-RV32-NEXT:  .LBB61_87: # %else322
1893; CHECK-RV32-NEXT:    slli a2, a3, 13
1894; CHECK-RV32-NEXT:    bgez a2, .LBB61_88
1895; CHECK-RV32-NEXT:    j .LBB61_621
1896; CHECK-RV32-NEXT:  .LBB61_88: # %else326
1897; CHECK-RV32-NEXT:    slli a2, a3, 12
1898; CHECK-RV32-NEXT:    bgez a2, .LBB61_89
1899; CHECK-RV32-NEXT:    j .LBB61_622
1900; CHECK-RV32-NEXT:  .LBB61_89: # %else330
1901; CHECK-RV32-NEXT:    slli a2, a3, 11
1902; CHECK-RV32-NEXT:    bgez a2, .LBB61_90
1903; CHECK-RV32-NEXT:    j .LBB61_623
1904; CHECK-RV32-NEXT:  .LBB61_90: # %else334
1905; CHECK-RV32-NEXT:    slli a2, a3, 10
1906; CHECK-RV32-NEXT:    bgez a2, .LBB61_91
1907; CHECK-RV32-NEXT:    j .LBB61_624
1908; CHECK-RV32-NEXT:  .LBB61_91: # %else338
1909; CHECK-RV32-NEXT:    slli a2, a3, 9
1910; CHECK-RV32-NEXT:    bgez a2, .LBB61_92
1911; CHECK-RV32-NEXT:    j .LBB61_625
1912; CHECK-RV32-NEXT:  .LBB61_92: # %else342
1913; CHECK-RV32-NEXT:    slli a2, a3, 8
1914; CHECK-RV32-NEXT:    bgez a2, .LBB61_93
1915; CHECK-RV32-NEXT:    j .LBB61_626
1916; CHECK-RV32-NEXT:  .LBB61_93: # %else346
1917; CHECK-RV32-NEXT:    slli a2, a3, 7
1918; CHECK-RV32-NEXT:    bgez a2, .LBB61_94
1919; CHECK-RV32-NEXT:    j .LBB61_627
1920; CHECK-RV32-NEXT:  .LBB61_94: # %else350
1921; CHECK-RV32-NEXT:    slli a2, a3, 6
1922; CHECK-RV32-NEXT:    bgez a2, .LBB61_95
1923; CHECK-RV32-NEXT:    j .LBB61_628
1924; CHECK-RV32-NEXT:  .LBB61_95: # %else354
1925; CHECK-RV32-NEXT:    slli a2, a3, 5
1926; CHECK-RV32-NEXT:    bgez a2, .LBB61_96
1927; CHECK-RV32-NEXT:    j .LBB61_629
1928; CHECK-RV32-NEXT:  .LBB61_96: # %else358
1929; CHECK-RV32-NEXT:    slli a2, a3, 4
1930; CHECK-RV32-NEXT:    bgez a2, .LBB61_97
1931; CHECK-RV32-NEXT:    j .LBB61_630
1932; CHECK-RV32-NEXT:  .LBB61_97: # %else362
1933; CHECK-RV32-NEXT:    slli a2, a3, 3
1934; CHECK-RV32-NEXT:    bgez a2, .LBB61_98
1935; CHECK-RV32-NEXT:    j .LBB61_631
1936; CHECK-RV32-NEXT:  .LBB61_98: # %else366
1937; CHECK-RV32-NEXT:    slli a2, a3, 2
1938; CHECK-RV32-NEXT:    bgez a2, .LBB61_100
1939; CHECK-RV32-NEXT:  .LBB61_99: # %cond.load369
1940; CHECK-RV32-NEXT:    lbu a2, 0(a0)
1941; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
1942; CHECK-RV32-NEXT:    vmv8r.v v24, v8
1943; CHECK-RV32-NEXT:    vmv.s.x v10, a2
1944; CHECK-RV32-NEXT:    li a2, 94
1945; CHECK-RV32-NEXT:    li a4, 93
1946; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
1947; CHECK-RV32-NEXT:    vslideup.vx v8, v10, a4
1948; CHECK-RV32-NEXT:    addi a0, a0, 1
1949; CHECK-RV32-NEXT:    vmv2r.v v24, v8
1950; CHECK-RV32-NEXT:    vmv8r.v v8, v24
1951; CHECK-RV32-NEXT:  .LBB61_100: # %else370
1952; CHECK-RV32-NEXT:    slli a2, a3, 1
1953; CHECK-RV32-NEXT:    vsetivli zero, 1, e64, m1, ta, ma
1954; CHECK-RV32-NEXT:    vsrl.vx v16, v16, a1
1955; CHECK-RV32-NEXT:    bgez a2, .LBB61_102
1956; CHECK-RV32-NEXT:  # %bb.101: # %cond.load373
1957; CHECK-RV32-NEXT:    lbu a2, 0(a0)
1958; CHECK-RV32-NEXT:    vmv8r.v v24, v8
1959; CHECK-RV32-NEXT:    vmv.s.x v10, a2
1960; CHECK-RV32-NEXT:    li a2, 95
1961; CHECK-RV32-NEXT:    li a4, 94
1962; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
1963; CHECK-RV32-NEXT:    vslideup.vx v8, v10, a4
1964; CHECK-RV32-NEXT:    addi a0, a0, 1
1965; CHECK-RV32-NEXT:    vmv2r.v v24, v8
1966; CHECK-RV32-NEXT:    vmv8r.v v8, v24
1967; CHECK-RV32-NEXT:  .LBB61_102: # %else374
1968; CHECK-RV32-NEXT:    vsetivli zero, 1, e64, m1, ta, ma
1969; CHECK-RV32-NEXT:    vmv.x.s a2, v16
1970; CHECK-RV32-NEXT:    bgez a3, .LBB61_103
1971; CHECK-RV32-NEXT:    j .LBB61_632
1972; CHECK-RV32-NEXT:  .LBB61_103: # %else378
1973; CHECK-RV32-NEXT:    andi a3, a2, 1
1974; CHECK-RV32-NEXT:    beqz a3, .LBB61_104
1975; CHECK-RV32-NEXT:    j .LBB61_633
1976; CHECK-RV32-NEXT:  .LBB61_104: # %else382
1977; CHECK-RV32-NEXT:    andi a3, a2, 2
1978; CHECK-RV32-NEXT:    beqz a3, .LBB61_105
1979; CHECK-RV32-NEXT:    j .LBB61_634
1980; CHECK-RV32-NEXT:  .LBB61_105: # %else386
1981; CHECK-RV32-NEXT:    andi a3, a2, 4
1982; CHECK-RV32-NEXT:    beqz a3, .LBB61_106
1983; CHECK-RV32-NEXT:    j .LBB61_635
1984; CHECK-RV32-NEXT:  .LBB61_106: # %else390
1985; CHECK-RV32-NEXT:    andi a3, a2, 8
1986; CHECK-RV32-NEXT:    beqz a3, .LBB61_107
1987; CHECK-RV32-NEXT:    j .LBB61_636
1988; CHECK-RV32-NEXT:  .LBB61_107: # %else394
1989; CHECK-RV32-NEXT:    andi a3, a2, 16
1990; CHECK-RV32-NEXT:    beqz a3, .LBB61_108
1991; CHECK-RV32-NEXT:    j .LBB61_637
1992; CHECK-RV32-NEXT:  .LBB61_108: # %else398
1993; CHECK-RV32-NEXT:    andi a3, a2, 32
1994; CHECK-RV32-NEXT:    beqz a3, .LBB61_109
1995; CHECK-RV32-NEXT:    j .LBB61_638
1996; CHECK-RV32-NEXT:  .LBB61_109: # %else402
1997; CHECK-RV32-NEXT:    andi a3, a2, 64
1998; CHECK-RV32-NEXT:    beqz a3, .LBB61_110
1999; CHECK-RV32-NEXT:    j .LBB61_639
2000; CHECK-RV32-NEXT:  .LBB61_110: # %else406
2001; CHECK-RV32-NEXT:    andi a3, a2, 128
2002; CHECK-RV32-NEXT:    beqz a3, .LBB61_111
2003; CHECK-RV32-NEXT:    j .LBB61_640
2004; CHECK-RV32-NEXT:  .LBB61_111: # %else410
2005; CHECK-RV32-NEXT:    andi a3, a2, 256
2006; CHECK-RV32-NEXT:    beqz a3, .LBB61_112
2007; CHECK-RV32-NEXT:    j .LBB61_641
2008; CHECK-RV32-NEXT:  .LBB61_112: # %else414
2009; CHECK-RV32-NEXT:    andi a3, a2, 512
2010; CHECK-RV32-NEXT:    beqz a3, .LBB61_113
2011; CHECK-RV32-NEXT:    j .LBB61_642
2012; CHECK-RV32-NEXT:  .LBB61_113: # %else418
2013; CHECK-RV32-NEXT:    andi a3, a2, 1024
2014; CHECK-RV32-NEXT:    beqz a3, .LBB61_114
2015; CHECK-RV32-NEXT:    j .LBB61_643
2016; CHECK-RV32-NEXT:  .LBB61_114: # %else422
2017; CHECK-RV32-NEXT:    slli a3, a2, 20
2018; CHECK-RV32-NEXT:    bgez a3, .LBB61_115
2019; CHECK-RV32-NEXT:    j .LBB61_644
2020; CHECK-RV32-NEXT:  .LBB61_115: # %else426
2021; CHECK-RV32-NEXT:    slli a3, a2, 19
2022; CHECK-RV32-NEXT:    bgez a3, .LBB61_116
2023; CHECK-RV32-NEXT:    j .LBB61_645
2024; CHECK-RV32-NEXT:  .LBB61_116: # %else430
2025; CHECK-RV32-NEXT:    slli a3, a2, 18
2026; CHECK-RV32-NEXT:    bgez a3, .LBB61_117
2027; CHECK-RV32-NEXT:    j .LBB61_646
2028; CHECK-RV32-NEXT:  .LBB61_117: # %else434
2029; CHECK-RV32-NEXT:    slli a3, a2, 17
2030; CHECK-RV32-NEXT:    bgez a3, .LBB61_118
2031; CHECK-RV32-NEXT:    j .LBB61_647
2032; CHECK-RV32-NEXT:  .LBB61_118: # %else438
2033; CHECK-RV32-NEXT:    slli a3, a2, 16
2034; CHECK-RV32-NEXT:    bgez a3, .LBB61_119
2035; CHECK-RV32-NEXT:    j .LBB61_648
2036; CHECK-RV32-NEXT:  .LBB61_119: # %else442
2037; CHECK-RV32-NEXT:    slli a3, a2, 15
2038; CHECK-RV32-NEXT:    bgez a3, .LBB61_120
2039; CHECK-RV32-NEXT:    j .LBB61_649
2040; CHECK-RV32-NEXT:  .LBB61_120: # %else446
2041; CHECK-RV32-NEXT:    slli a3, a2, 14
2042; CHECK-RV32-NEXT:    bgez a3, .LBB61_121
2043; CHECK-RV32-NEXT:    j .LBB61_650
2044; CHECK-RV32-NEXT:  .LBB61_121: # %else450
2045; CHECK-RV32-NEXT:    slli a3, a2, 13
2046; CHECK-RV32-NEXT:    bgez a3, .LBB61_122
2047; CHECK-RV32-NEXT:    j .LBB61_651
2048; CHECK-RV32-NEXT:  .LBB61_122: # %else454
2049; CHECK-RV32-NEXT:    slli a3, a2, 12
2050; CHECK-RV32-NEXT:    bgez a3, .LBB61_123
2051; CHECK-RV32-NEXT:    j .LBB61_652
2052; CHECK-RV32-NEXT:  .LBB61_123: # %else458
2053; CHECK-RV32-NEXT:    slli a3, a2, 11
2054; CHECK-RV32-NEXT:    bgez a3, .LBB61_124
2055; CHECK-RV32-NEXT:    j .LBB61_653
2056; CHECK-RV32-NEXT:  .LBB61_124: # %else462
2057; CHECK-RV32-NEXT:    slli a3, a2, 10
2058; CHECK-RV32-NEXT:    bgez a3, .LBB61_125
2059; CHECK-RV32-NEXT:    j .LBB61_654
2060; CHECK-RV32-NEXT:  .LBB61_125: # %else466
2061; CHECK-RV32-NEXT:    slli a3, a2, 9
2062; CHECK-RV32-NEXT:    bgez a3, .LBB61_126
2063; CHECK-RV32-NEXT:    j .LBB61_655
2064; CHECK-RV32-NEXT:  .LBB61_126: # %else470
2065; CHECK-RV32-NEXT:    slli a3, a2, 8
2066; CHECK-RV32-NEXT:    bgez a3, .LBB61_127
2067; CHECK-RV32-NEXT:    j .LBB61_656
2068; CHECK-RV32-NEXT:  .LBB61_127: # %else474
2069; CHECK-RV32-NEXT:    slli a3, a2, 7
2070; CHECK-RV32-NEXT:    bgez a3, .LBB61_128
2071; CHECK-RV32-NEXT:    j .LBB61_657
2072; CHECK-RV32-NEXT:  .LBB61_128: # %else478
2073; CHECK-RV32-NEXT:    slli a3, a2, 6
2074; CHECK-RV32-NEXT:    bgez a3, .LBB61_129
2075; CHECK-RV32-NEXT:    j .LBB61_658
2076; CHECK-RV32-NEXT:  .LBB61_129: # %else482
2077; CHECK-RV32-NEXT:    slli a3, a2, 5
2078; CHECK-RV32-NEXT:    bgez a3, .LBB61_130
2079; CHECK-RV32-NEXT:    j .LBB61_659
2080; CHECK-RV32-NEXT:  .LBB61_130: # %else486
2081; CHECK-RV32-NEXT:    slli a3, a2, 4
2082; CHECK-RV32-NEXT:    bgez a3, .LBB61_131
2083; CHECK-RV32-NEXT:    j .LBB61_660
2084; CHECK-RV32-NEXT:  .LBB61_131: # %else490
2085; CHECK-RV32-NEXT:    slli a3, a2, 3
2086; CHECK-RV32-NEXT:    bgez a3, .LBB61_132
2087; CHECK-RV32-NEXT:    j .LBB61_661
2088; CHECK-RV32-NEXT:  .LBB61_132: # %else494
2089; CHECK-RV32-NEXT:    slli a3, a2, 2
2090; CHECK-RV32-NEXT:    bgez a3, .LBB61_134
2091; CHECK-RV32-NEXT:  .LBB61_133: # %cond.load497
2092; CHECK-RV32-NEXT:    lbu a3, 0(a0)
2093; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
2094; CHECK-RV32-NEXT:    vmv8r.v v16, v8
2095; CHECK-RV32-NEXT:    vmv.s.x v10, a3
2096; CHECK-RV32-NEXT:    li a3, 126
2097; CHECK-RV32-NEXT:    li a4, 125
2098; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m2, tu, ma
2099; CHECK-RV32-NEXT:    vslideup.vx v8, v10, a4
2100; CHECK-RV32-NEXT:    addi a0, a0, 1
2101; CHECK-RV32-NEXT:    vmv2r.v v16, v8
2102; CHECK-RV32-NEXT:    vmv8r.v v8, v16
2103; CHECK-RV32-NEXT:  .LBB61_134: # %else498
2104; CHECK-RV32-NEXT:    slli a3, a2, 1
2105; CHECK-RV32-NEXT:    vsetivli zero, 1, e64, m1, ta, ma
2106; CHECK-RV32-NEXT:    vslidedown.vi v16, v0, 2
2107; CHECK-RV32-NEXT:    bgez a3, .LBB61_136
2108; CHECK-RV32-NEXT:  # %bb.135: # %cond.load501
2109; CHECK-RV32-NEXT:    lbu a3, 0(a0)
2110; CHECK-RV32-NEXT:    vmv8r.v v24, v8
2111; CHECK-RV32-NEXT:    vmv.s.x v10, a3
2112; CHECK-RV32-NEXT:    li a3, 127
2113; CHECK-RV32-NEXT:    li a4, 126
2114; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m2, tu, ma
2115; CHECK-RV32-NEXT:    vslideup.vx v8, v10, a4
2116; CHECK-RV32-NEXT:    addi a0, a0, 1
2117; CHECK-RV32-NEXT:    vmv2r.v v24, v8
2118; CHECK-RV32-NEXT:    vmv8r.v v8, v24
2119; CHECK-RV32-NEXT:  .LBB61_136: # %else502
2120; CHECK-RV32-NEXT:    vsetivli zero, 1, e64, m1, ta, ma
2121; CHECK-RV32-NEXT:    vmv.x.s a3, v16
2122; CHECK-RV32-NEXT:    bgez a2, .LBB61_137
2123; CHECK-RV32-NEXT:    j .LBB61_662
2124; CHECK-RV32-NEXT:  .LBB61_137: # %else506
2125; CHECK-RV32-NEXT:    andi a2, a3, 1
2126; CHECK-RV32-NEXT:    beqz a2, .LBB61_138
2127; CHECK-RV32-NEXT:    j .LBB61_663
2128; CHECK-RV32-NEXT:  .LBB61_138: # %else510
2129; CHECK-RV32-NEXT:    andi a2, a3, 2
2130; CHECK-RV32-NEXT:    beqz a2, .LBB61_139
2131; CHECK-RV32-NEXT:    j .LBB61_664
2132; CHECK-RV32-NEXT:  .LBB61_139: # %else514
2133; CHECK-RV32-NEXT:    andi a2, a3, 4
2134; CHECK-RV32-NEXT:    beqz a2, .LBB61_140
2135; CHECK-RV32-NEXT:    j .LBB61_665
2136; CHECK-RV32-NEXT:  .LBB61_140: # %else518
2137; CHECK-RV32-NEXT:    andi a2, a3, 8
2138; CHECK-RV32-NEXT:    beqz a2, .LBB61_141
2139; CHECK-RV32-NEXT:    j .LBB61_666
2140; CHECK-RV32-NEXT:  .LBB61_141: # %else522
2141; CHECK-RV32-NEXT:    andi a2, a3, 16
2142; CHECK-RV32-NEXT:    beqz a2, .LBB61_142
2143; CHECK-RV32-NEXT:    j .LBB61_667
2144; CHECK-RV32-NEXT:  .LBB61_142: # %else526
2145; CHECK-RV32-NEXT:    andi a2, a3, 32
2146; CHECK-RV32-NEXT:    beqz a2, .LBB61_143
2147; CHECK-RV32-NEXT:    j .LBB61_668
2148; CHECK-RV32-NEXT:  .LBB61_143: # %else530
2149; CHECK-RV32-NEXT:    andi a2, a3, 64
2150; CHECK-RV32-NEXT:    beqz a2, .LBB61_144
2151; CHECK-RV32-NEXT:    j .LBB61_669
2152; CHECK-RV32-NEXT:  .LBB61_144: # %else534
2153; CHECK-RV32-NEXT:    andi a2, a3, 128
2154; CHECK-RV32-NEXT:    beqz a2, .LBB61_145
2155; CHECK-RV32-NEXT:    j .LBB61_670
2156; CHECK-RV32-NEXT:  .LBB61_145: # %else538
2157; CHECK-RV32-NEXT:    andi a2, a3, 256
2158; CHECK-RV32-NEXT:    beqz a2, .LBB61_146
2159; CHECK-RV32-NEXT:    j .LBB61_671
2160; CHECK-RV32-NEXT:  .LBB61_146: # %else542
2161; CHECK-RV32-NEXT:    andi a2, a3, 512
2162; CHECK-RV32-NEXT:    beqz a2, .LBB61_147
2163; CHECK-RV32-NEXT:    j .LBB61_672
2164; CHECK-RV32-NEXT:  .LBB61_147: # %else546
2165; CHECK-RV32-NEXT:    andi a2, a3, 1024
2166; CHECK-RV32-NEXT:    beqz a2, .LBB61_148
2167; CHECK-RV32-NEXT:    j .LBB61_673
2168; CHECK-RV32-NEXT:  .LBB61_148: # %else550
2169; CHECK-RV32-NEXT:    slli a2, a3, 20
2170; CHECK-RV32-NEXT:    bgez a2, .LBB61_149
2171; CHECK-RV32-NEXT:    j .LBB61_674
2172; CHECK-RV32-NEXT:  .LBB61_149: # %else554
2173; CHECK-RV32-NEXT:    slli a2, a3, 19
2174; CHECK-RV32-NEXT:    bgez a2, .LBB61_150
2175; CHECK-RV32-NEXT:    j .LBB61_675
2176; CHECK-RV32-NEXT:  .LBB61_150: # %else558
2177; CHECK-RV32-NEXT:    slli a2, a3, 18
2178; CHECK-RV32-NEXT:    bgez a2, .LBB61_151
2179; CHECK-RV32-NEXT:    j .LBB61_676
2180; CHECK-RV32-NEXT:  .LBB61_151: # %else562
2181; CHECK-RV32-NEXT:    slli a2, a3, 17
2182; CHECK-RV32-NEXT:    bgez a2, .LBB61_152
2183; CHECK-RV32-NEXT:    j .LBB61_677
2184; CHECK-RV32-NEXT:  .LBB61_152: # %else566
2185; CHECK-RV32-NEXT:    slli a2, a3, 16
2186; CHECK-RV32-NEXT:    bgez a2, .LBB61_153
2187; CHECK-RV32-NEXT:    j .LBB61_678
2188; CHECK-RV32-NEXT:  .LBB61_153: # %else570
2189; CHECK-RV32-NEXT:    slli a2, a3, 15
2190; CHECK-RV32-NEXT:    bgez a2, .LBB61_154
2191; CHECK-RV32-NEXT:    j .LBB61_679
2192; CHECK-RV32-NEXT:  .LBB61_154: # %else574
2193; CHECK-RV32-NEXT:    slli a2, a3, 14
2194; CHECK-RV32-NEXT:    bgez a2, .LBB61_155
2195; CHECK-RV32-NEXT:    j .LBB61_680
2196; CHECK-RV32-NEXT:  .LBB61_155: # %else578
2197; CHECK-RV32-NEXT:    slli a2, a3, 13
2198; CHECK-RV32-NEXT:    bgez a2, .LBB61_156
2199; CHECK-RV32-NEXT:    j .LBB61_681
2200; CHECK-RV32-NEXT:  .LBB61_156: # %else582
2201; CHECK-RV32-NEXT:    slli a2, a3, 12
2202; CHECK-RV32-NEXT:    bgez a2, .LBB61_157
2203; CHECK-RV32-NEXT:    j .LBB61_682
2204; CHECK-RV32-NEXT:  .LBB61_157: # %else586
2205; CHECK-RV32-NEXT:    slli a2, a3, 11
2206; CHECK-RV32-NEXT:    bgez a2, .LBB61_158
2207; CHECK-RV32-NEXT:    j .LBB61_683
2208; CHECK-RV32-NEXT:  .LBB61_158: # %else590
2209; CHECK-RV32-NEXT:    slli a2, a3, 10
2210; CHECK-RV32-NEXT:    bgez a2, .LBB61_159
2211; CHECK-RV32-NEXT:    j .LBB61_684
2212; CHECK-RV32-NEXT:  .LBB61_159: # %else594
2213; CHECK-RV32-NEXT:    slli a2, a3, 9
2214; CHECK-RV32-NEXT:    bgez a2, .LBB61_160
2215; CHECK-RV32-NEXT:    j .LBB61_685
2216; CHECK-RV32-NEXT:  .LBB61_160: # %else598
2217; CHECK-RV32-NEXT:    slli a2, a3, 8
2218; CHECK-RV32-NEXT:    bgez a2, .LBB61_161
2219; CHECK-RV32-NEXT:    j .LBB61_686
2220; CHECK-RV32-NEXT:  .LBB61_161: # %else602
2221; CHECK-RV32-NEXT:    slli a2, a3, 7
2222; CHECK-RV32-NEXT:    bgez a2, .LBB61_162
2223; CHECK-RV32-NEXT:    j .LBB61_687
2224; CHECK-RV32-NEXT:  .LBB61_162: # %else606
2225; CHECK-RV32-NEXT:    slli a2, a3, 6
2226; CHECK-RV32-NEXT:    bgez a2, .LBB61_163
2227; CHECK-RV32-NEXT:    j .LBB61_688
2228; CHECK-RV32-NEXT:  .LBB61_163: # %else610
2229; CHECK-RV32-NEXT:    slli a2, a3, 5
2230; CHECK-RV32-NEXT:    bgez a2, .LBB61_164
2231; CHECK-RV32-NEXT:    j .LBB61_689
2232; CHECK-RV32-NEXT:  .LBB61_164: # %else614
2233; CHECK-RV32-NEXT:    slli a2, a3, 4
2234; CHECK-RV32-NEXT:    bgez a2, .LBB61_165
2235; CHECK-RV32-NEXT:    j .LBB61_690
2236; CHECK-RV32-NEXT:  .LBB61_165: # %else618
2237; CHECK-RV32-NEXT:    slli a2, a3, 3
2238; CHECK-RV32-NEXT:    bgez a2, .LBB61_166
2239; CHECK-RV32-NEXT:    j .LBB61_691
2240; CHECK-RV32-NEXT:  .LBB61_166: # %else622
2241; CHECK-RV32-NEXT:    slli a2, a3, 2
2242; CHECK-RV32-NEXT:    bgez a2, .LBB61_168
2243; CHECK-RV32-NEXT:  .LBB61_167: # %cond.load625
2244; CHECK-RV32-NEXT:    lbu a2, 0(a0)
2245; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
2246; CHECK-RV32-NEXT:    vmv8r.v v24, v8
2247; CHECK-RV32-NEXT:    vmv.s.x v12, a2
2248; CHECK-RV32-NEXT:    li a2, 158
2249; CHECK-RV32-NEXT:    li a4, 157
2250; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
2251; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
2252; CHECK-RV32-NEXT:    addi a0, a0, 1
2253; CHECK-RV32-NEXT:    vmv4r.v v24, v8
2254; CHECK-RV32-NEXT:    vmv8r.v v8, v24
2255; CHECK-RV32-NEXT:  .LBB61_168: # %else626
2256; CHECK-RV32-NEXT:    slli a2, a3, 1
2257; CHECK-RV32-NEXT:    vsetivli zero, 1, e64, m1, ta, ma
2258; CHECK-RV32-NEXT:    vsrl.vx v16, v16, a1
2259; CHECK-RV32-NEXT:    bgez a2, .LBB61_170
2260; CHECK-RV32-NEXT:  # %bb.169: # %cond.load629
2261; CHECK-RV32-NEXT:    lbu a2, 0(a0)
2262; CHECK-RV32-NEXT:    vmv8r.v v24, v8
2263; CHECK-RV32-NEXT:    vmv.s.x v12, a2
2264; CHECK-RV32-NEXT:    li a2, 159
2265; CHECK-RV32-NEXT:    li a4, 158
2266; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
2267; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
2268; CHECK-RV32-NEXT:    addi a0, a0, 1
2269; CHECK-RV32-NEXT:    vmv4r.v v24, v8
2270; CHECK-RV32-NEXT:    vmv8r.v v8, v24
2271; CHECK-RV32-NEXT:  .LBB61_170: # %else630
2272; CHECK-RV32-NEXT:    vsetivli zero, 1, e64, m1, ta, ma
2273; CHECK-RV32-NEXT:    vmv.x.s a2, v16
2274; CHECK-RV32-NEXT:    bgez a3, .LBB61_171
2275; CHECK-RV32-NEXT:    j .LBB61_692
2276; CHECK-RV32-NEXT:  .LBB61_171: # %else634
2277; CHECK-RV32-NEXT:    andi a3, a2, 1
2278; CHECK-RV32-NEXT:    beqz a3, .LBB61_172
2279; CHECK-RV32-NEXT:    j .LBB61_693
2280; CHECK-RV32-NEXT:  .LBB61_172: # %else638
2281; CHECK-RV32-NEXT:    andi a3, a2, 2
2282; CHECK-RV32-NEXT:    beqz a3, .LBB61_173
2283; CHECK-RV32-NEXT:    j .LBB61_694
2284; CHECK-RV32-NEXT:  .LBB61_173: # %else642
2285; CHECK-RV32-NEXT:    andi a3, a2, 4
2286; CHECK-RV32-NEXT:    beqz a3, .LBB61_174
2287; CHECK-RV32-NEXT:    j .LBB61_695
2288; CHECK-RV32-NEXT:  .LBB61_174: # %else646
2289; CHECK-RV32-NEXT:    andi a3, a2, 8
2290; CHECK-RV32-NEXT:    beqz a3, .LBB61_175
2291; CHECK-RV32-NEXT:    j .LBB61_696
2292; CHECK-RV32-NEXT:  .LBB61_175: # %else650
2293; CHECK-RV32-NEXT:    andi a3, a2, 16
2294; CHECK-RV32-NEXT:    beqz a3, .LBB61_176
2295; CHECK-RV32-NEXT:    j .LBB61_697
2296; CHECK-RV32-NEXT:  .LBB61_176: # %else654
2297; CHECK-RV32-NEXT:    andi a3, a2, 32
2298; CHECK-RV32-NEXT:    beqz a3, .LBB61_177
2299; CHECK-RV32-NEXT:    j .LBB61_698
2300; CHECK-RV32-NEXT:  .LBB61_177: # %else658
2301; CHECK-RV32-NEXT:    andi a3, a2, 64
2302; CHECK-RV32-NEXT:    beqz a3, .LBB61_178
2303; CHECK-RV32-NEXT:    j .LBB61_699
2304; CHECK-RV32-NEXT:  .LBB61_178: # %else662
2305; CHECK-RV32-NEXT:    andi a3, a2, 128
2306; CHECK-RV32-NEXT:    beqz a3, .LBB61_179
2307; CHECK-RV32-NEXT:    j .LBB61_700
2308; CHECK-RV32-NEXT:  .LBB61_179: # %else666
2309; CHECK-RV32-NEXT:    andi a3, a2, 256
2310; CHECK-RV32-NEXT:    beqz a3, .LBB61_180
2311; CHECK-RV32-NEXT:    j .LBB61_701
2312; CHECK-RV32-NEXT:  .LBB61_180: # %else670
2313; CHECK-RV32-NEXT:    andi a3, a2, 512
2314; CHECK-RV32-NEXT:    beqz a3, .LBB61_181
2315; CHECK-RV32-NEXT:    j .LBB61_702
2316; CHECK-RV32-NEXT:  .LBB61_181: # %else674
2317; CHECK-RV32-NEXT:    andi a3, a2, 1024
2318; CHECK-RV32-NEXT:    beqz a3, .LBB61_182
2319; CHECK-RV32-NEXT:    j .LBB61_703
2320; CHECK-RV32-NEXT:  .LBB61_182: # %else678
2321; CHECK-RV32-NEXT:    slli a3, a2, 20
2322; CHECK-RV32-NEXT:    bgez a3, .LBB61_183
2323; CHECK-RV32-NEXT:    j .LBB61_704
2324; CHECK-RV32-NEXT:  .LBB61_183: # %else682
2325; CHECK-RV32-NEXT:    slli a3, a2, 19
2326; CHECK-RV32-NEXT:    bgez a3, .LBB61_184
2327; CHECK-RV32-NEXT:    j .LBB61_705
2328; CHECK-RV32-NEXT:  .LBB61_184: # %else686
2329; CHECK-RV32-NEXT:    slli a3, a2, 18
2330; CHECK-RV32-NEXT:    bgez a3, .LBB61_185
2331; CHECK-RV32-NEXT:    j .LBB61_706
2332; CHECK-RV32-NEXT:  .LBB61_185: # %else690
2333; CHECK-RV32-NEXT:    slli a3, a2, 17
2334; CHECK-RV32-NEXT:    bgez a3, .LBB61_186
2335; CHECK-RV32-NEXT:    j .LBB61_707
2336; CHECK-RV32-NEXT:  .LBB61_186: # %else694
2337; CHECK-RV32-NEXT:    slli a3, a2, 16
2338; CHECK-RV32-NEXT:    bgez a3, .LBB61_187
2339; CHECK-RV32-NEXT:    j .LBB61_708
2340; CHECK-RV32-NEXT:  .LBB61_187: # %else698
2341; CHECK-RV32-NEXT:    slli a3, a2, 15
2342; CHECK-RV32-NEXT:    bgez a3, .LBB61_188
2343; CHECK-RV32-NEXT:    j .LBB61_709
2344; CHECK-RV32-NEXT:  .LBB61_188: # %else702
2345; CHECK-RV32-NEXT:    slli a3, a2, 14
2346; CHECK-RV32-NEXT:    bgez a3, .LBB61_189
2347; CHECK-RV32-NEXT:    j .LBB61_710
2348; CHECK-RV32-NEXT:  .LBB61_189: # %else706
2349; CHECK-RV32-NEXT:    slli a3, a2, 13
2350; CHECK-RV32-NEXT:    bgez a3, .LBB61_190
2351; CHECK-RV32-NEXT:    j .LBB61_711
2352; CHECK-RV32-NEXT:  .LBB61_190: # %else710
2353; CHECK-RV32-NEXT:    slli a3, a2, 12
2354; CHECK-RV32-NEXT:    bgez a3, .LBB61_191
2355; CHECK-RV32-NEXT:    j .LBB61_712
2356; CHECK-RV32-NEXT:  .LBB61_191: # %else714
2357; CHECK-RV32-NEXT:    slli a3, a2, 11
2358; CHECK-RV32-NEXT:    bgez a3, .LBB61_192
2359; CHECK-RV32-NEXT:    j .LBB61_713
2360; CHECK-RV32-NEXT:  .LBB61_192: # %else718
2361; CHECK-RV32-NEXT:    slli a3, a2, 10
2362; CHECK-RV32-NEXT:    bgez a3, .LBB61_193
2363; CHECK-RV32-NEXT:    j .LBB61_714
2364; CHECK-RV32-NEXT:  .LBB61_193: # %else722
2365; CHECK-RV32-NEXT:    slli a3, a2, 9
2366; CHECK-RV32-NEXT:    bgez a3, .LBB61_194
2367; CHECK-RV32-NEXT:    j .LBB61_715
2368; CHECK-RV32-NEXT:  .LBB61_194: # %else726
2369; CHECK-RV32-NEXT:    slli a3, a2, 8
2370; CHECK-RV32-NEXT:    bgez a3, .LBB61_195
2371; CHECK-RV32-NEXT:    j .LBB61_716
2372; CHECK-RV32-NEXT:  .LBB61_195: # %else730
2373; CHECK-RV32-NEXT:    slli a3, a2, 7
2374; CHECK-RV32-NEXT:    bgez a3, .LBB61_196
2375; CHECK-RV32-NEXT:    j .LBB61_717
2376; CHECK-RV32-NEXT:  .LBB61_196: # %else734
2377; CHECK-RV32-NEXT:    slli a3, a2, 6
2378; CHECK-RV32-NEXT:    bgez a3, .LBB61_197
2379; CHECK-RV32-NEXT:    j .LBB61_718
2380; CHECK-RV32-NEXT:  .LBB61_197: # %else738
2381; CHECK-RV32-NEXT:    slli a3, a2, 5
2382; CHECK-RV32-NEXT:    bgez a3, .LBB61_198
2383; CHECK-RV32-NEXT:    j .LBB61_719
2384; CHECK-RV32-NEXT:  .LBB61_198: # %else742
2385; CHECK-RV32-NEXT:    slli a3, a2, 4
2386; CHECK-RV32-NEXT:    bgez a3, .LBB61_199
2387; CHECK-RV32-NEXT:    j .LBB61_720
2388; CHECK-RV32-NEXT:  .LBB61_199: # %else746
2389; CHECK-RV32-NEXT:    slli a3, a2, 3
2390; CHECK-RV32-NEXT:    bgez a3, .LBB61_200
2391; CHECK-RV32-NEXT:    j .LBB61_721
2392; CHECK-RV32-NEXT:  .LBB61_200: # %else750
2393; CHECK-RV32-NEXT:    slli a3, a2, 2
2394; CHECK-RV32-NEXT:    bgez a3, .LBB61_202
2395; CHECK-RV32-NEXT:  .LBB61_201: # %cond.load753
2396; CHECK-RV32-NEXT:    lbu a3, 0(a0)
2397; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
2398; CHECK-RV32-NEXT:    vmv8r.v v16, v8
2399; CHECK-RV32-NEXT:    vmv.s.x v12, a3
2400; CHECK-RV32-NEXT:    li a3, 190
2401; CHECK-RV32-NEXT:    li a4, 189
2402; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m4, tu, ma
2403; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
2404; CHECK-RV32-NEXT:    addi a0, a0, 1
2405; CHECK-RV32-NEXT:    vmv4r.v v16, v8
2406; CHECK-RV32-NEXT:    vmv8r.v v8, v16
2407; CHECK-RV32-NEXT:  .LBB61_202: # %else754
2408; CHECK-RV32-NEXT:    slli a3, a2, 1
2409; CHECK-RV32-NEXT:    vsetivli zero, 1, e64, m1, ta, ma
2410; CHECK-RV32-NEXT:    vslidedown.vi v16, v0, 3
2411; CHECK-RV32-NEXT:    bgez a3, .LBB61_204
2412; CHECK-RV32-NEXT:  # %bb.203: # %cond.load757
2413; CHECK-RV32-NEXT:    lbu a3, 0(a0)
2414; CHECK-RV32-NEXT:    vmv8r.v v24, v8
2415; CHECK-RV32-NEXT:    vmv.s.x v12, a3
2416; CHECK-RV32-NEXT:    li a3, 191
2417; CHECK-RV32-NEXT:    li a4, 190
2418; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m4, tu, ma
2419; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
2420; CHECK-RV32-NEXT:    addi a0, a0, 1
2421; CHECK-RV32-NEXT:    vmv4r.v v24, v8
2422; CHECK-RV32-NEXT:    vmv8r.v v8, v24
2423; CHECK-RV32-NEXT:  .LBB61_204: # %else758
2424; CHECK-RV32-NEXT:    vsetivli zero, 1, e64, m1, ta, ma
2425; CHECK-RV32-NEXT:    vmv.x.s a3, v16
2426; CHECK-RV32-NEXT:    bgez a2, .LBB61_205
2427; CHECK-RV32-NEXT:    j .LBB61_722
2428; CHECK-RV32-NEXT:  .LBB61_205: # %else762
2429; CHECK-RV32-NEXT:    andi a2, a3, 1
2430; CHECK-RV32-NEXT:    beqz a2, .LBB61_206
2431; CHECK-RV32-NEXT:    j .LBB61_723
2432; CHECK-RV32-NEXT:  .LBB61_206: # %else766
2433; CHECK-RV32-NEXT:    andi a2, a3, 2
2434; CHECK-RV32-NEXT:    beqz a2, .LBB61_207
2435; CHECK-RV32-NEXT:    j .LBB61_724
2436; CHECK-RV32-NEXT:  .LBB61_207: # %else770
2437; CHECK-RV32-NEXT:    andi a2, a3, 4
2438; CHECK-RV32-NEXT:    beqz a2, .LBB61_208
2439; CHECK-RV32-NEXT:    j .LBB61_725
2440; CHECK-RV32-NEXT:  .LBB61_208: # %else774
2441; CHECK-RV32-NEXT:    andi a2, a3, 8
2442; CHECK-RV32-NEXT:    beqz a2, .LBB61_209
2443; CHECK-RV32-NEXT:    j .LBB61_726
2444; CHECK-RV32-NEXT:  .LBB61_209: # %else778
2445; CHECK-RV32-NEXT:    andi a2, a3, 16
2446; CHECK-RV32-NEXT:    beqz a2, .LBB61_210
2447; CHECK-RV32-NEXT:    j .LBB61_727
2448; CHECK-RV32-NEXT:  .LBB61_210: # %else782
2449; CHECK-RV32-NEXT:    andi a2, a3, 32
2450; CHECK-RV32-NEXT:    beqz a2, .LBB61_211
2451; CHECK-RV32-NEXT:    j .LBB61_728
2452; CHECK-RV32-NEXT:  .LBB61_211: # %else786
2453; CHECK-RV32-NEXT:    andi a2, a3, 64
2454; CHECK-RV32-NEXT:    beqz a2, .LBB61_212
2455; CHECK-RV32-NEXT:    j .LBB61_729
2456; CHECK-RV32-NEXT:  .LBB61_212: # %else790
2457; CHECK-RV32-NEXT:    andi a2, a3, 128
2458; CHECK-RV32-NEXT:    beqz a2, .LBB61_213
2459; CHECK-RV32-NEXT:    j .LBB61_730
2460; CHECK-RV32-NEXT:  .LBB61_213: # %else794
2461; CHECK-RV32-NEXT:    andi a2, a3, 256
2462; CHECK-RV32-NEXT:    beqz a2, .LBB61_214
2463; CHECK-RV32-NEXT:    j .LBB61_731
2464; CHECK-RV32-NEXT:  .LBB61_214: # %else798
2465; CHECK-RV32-NEXT:    andi a2, a3, 512
2466; CHECK-RV32-NEXT:    beqz a2, .LBB61_215
2467; CHECK-RV32-NEXT:    j .LBB61_732
2468; CHECK-RV32-NEXT:  .LBB61_215: # %else802
2469; CHECK-RV32-NEXT:    andi a2, a3, 1024
2470; CHECK-RV32-NEXT:    beqz a2, .LBB61_216
2471; CHECK-RV32-NEXT:    j .LBB61_733
2472; CHECK-RV32-NEXT:  .LBB61_216: # %else806
2473; CHECK-RV32-NEXT:    slli a2, a3, 20
2474; CHECK-RV32-NEXT:    bgez a2, .LBB61_217
2475; CHECK-RV32-NEXT:    j .LBB61_734
2476; CHECK-RV32-NEXT:  .LBB61_217: # %else810
2477; CHECK-RV32-NEXT:    slli a2, a3, 19
2478; CHECK-RV32-NEXT:    bgez a2, .LBB61_218
2479; CHECK-RV32-NEXT:    j .LBB61_735
2480; CHECK-RV32-NEXT:  .LBB61_218: # %else814
2481; CHECK-RV32-NEXT:    slli a2, a3, 18
2482; CHECK-RV32-NEXT:    bgez a2, .LBB61_219
2483; CHECK-RV32-NEXT:    j .LBB61_736
2484; CHECK-RV32-NEXT:  .LBB61_219: # %else818
2485; CHECK-RV32-NEXT:    slli a2, a3, 17
2486; CHECK-RV32-NEXT:    bgez a2, .LBB61_220
2487; CHECK-RV32-NEXT:    j .LBB61_737
2488; CHECK-RV32-NEXT:  .LBB61_220: # %else822
2489; CHECK-RV32-NEXT:    slli a2, a3, 16
2490; CHECK-RV32-NEXT:    bgez a2, .LBB61_221
2491; CHECK-RV32-NEXT:    j .LBB61_738
2492; CHECK-RV32-NEXT:  .LBB61_221: # %else826
2493; CHECK-RV32-NEXT:    slli a2, a3, 15
2494; CHECK-RV32-NEXT:    bgez a2, .LBB61_222
2495; CHECK-RV32-NEXT:    j .LBB61_739
2496; CHECK-RV32-NEXT:  .LBB61_222: # %else830
2497; CHECK-RV32-NEXT:    slli a2, a3, 14
2498; CHECK-RV32-NEXT:    bgez a2, .LBB61_223
2499; CHECK-RV32-NEXT:    j .LBB61_740
2500; CHECK-RV32-NEXT:  .LBB61_223: # %else834
2501; CHECK-RV32-NEXT:    slli a2, a3, 13
2502; CHECK-RV32-NEXT:    bgez a2, .LBB61_224
2503; CHECK-RV32-NEXT:    j .LBB61_741
2504; CHECK-RV32-NEXT:  .LBB61_224: # %else838
2505; CHECK-RV32-NEXT:    slli a2, a3, 12
2506; CHECK-RV32-NEXT:    bgez a2, .LBB61_225
2507; CHECK-RV32-NEXT:    j .LBB61_742
2508; CHECK-RV32-NEXT:  .LBB61_225: # %else842
2509; CHECK-RV32-NEXT:    slli a2, a3, 11
2510; CHECK-RV32-NEXT:    bgez a2, .LBB61_226
2511; CHECK-RV32-NEXT:    j .LBB61_743
2512; CHECK-RV32-NEXT:  .LBB61_226: # %else846
2513; CHECK-RV32-NEXT:    slli a2, a3, 10
2514; CHECK-RV32-NEXT:    bgez a2, .LBB61_227
2515; CHECK-RV32-NEXT:    j .LBB61_744
2516; CHECK-RV32-NEXT:  .LBB61_227: # %else850
2517; CHECK-RV32-NEXT:    slli a2, a3, 9
2518; CHECK-RV32-NEXT:    bgez a2, .LBB61_228
2519; CHECK-RV32-NEXT:    j .LBB61_745
2520; CHECK-RV32-NEXT:  .LBB61_228: # %else854
2521; CHECK-RV32-NEXT:    slli a2, a3, 8
2522; CHECK-RV32-NEXT:    bgez a2, .LBB61_229
2523; CHECK-RV32-NEXT:    j .LBB61_746
2524; CHECK-RV32-NEXT:  .LBB61_229: # %else858
2525; CHECK-RV32-NEXT:    slli a2, a3, 7
2526; CHECK-RV32-NEXT:    bgez a2, .LBB61_230
2527; CHECK-RV32-NEXT:    j .LBB61_747
2528; CHECK-RV32-NEXT:  .LBB61_230: # %else862
2529; CHECK-RV32-NEXT:    slli a2, a3, 6
2530; CHECK-RV32-NEXT:    bgez a2, .LBB61_231
2531; CHECK-RV32-NEXT:    j .LBB61_748
2532; CHECK-RV32-NEXT:  .LBB61_231: # %else866
2533; CHECK-RV32-NEXT:    slli a2, a3, 5
2534; CHECK-RV32-NEXT:    bgez a2, .LBB61_232
2535; CHECK-RV32-NEXT:    j .LBB61_749
2536; CHECK-RV32-NEXT:  .LBB61_232: # %else870
2537; CHECK-RV32-NEXT:    slli a2, a3, 4
2538; CHECK-RV32-NEXT:    bgez a2, .LBB61_233
2539; CHECK-RV32-NEXT:    j .LBB61_750
2540; CHECK-RV32-NEXT:  .LBB61_233: # %else874
2541; CHECK-RV32-NEXT:    slli a2, a3, 3
2542; CHECK-RV32-NEXT:    bgez a2, .LBB61_234
2543; CHECK-RV32-NEXT:    j .LBB61_751
2544; CHECK-RV32-NEXT:  .LBB61_234: # %else878
2545; CHECK-RV32-NEXT:    slli a2, a3, 2
2546; CHECK-RV32-NEXT:    bgez a2, .LBB61_236
2547; CHECK-RV32-NEXT:  .LBB61_235: # %cond.load881
2548; CHECK-RV32-NEXT:    lbu a2, 0(a0)
2549; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
2550; CHECK-RV32-NEXT:    vmv8r.v v24, v8
2551; CHECK-RV32-NEXT:    vmv.s.x v12, a2
2552; CHECK-RV32-NEXT:    li a2, 222
2553; CHECK-RV32-NEXT:    li a4, 221
2554; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
2555; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
2556; CHECK-RV32-NEXT:    addi a0, a0, 1
2557; CHECK-RV32-NEXT:    vmv4r.v v24, v8
2558; CHECK-RV32-NEXT:    vmv8r.v v8, v24
2559; CHECK-RV32-NEXT:  .LBB61_236: # %else882
2560; CHECK-RV32-NEXT:    slli a2, a3, 1
2561; CHECK-RV32-NEXT:    vsetivli zero, 1, e64, m1, ta, ma
2562; CHECK-RV32-NEXT:    vsrl.vx v16, v16, a1
2563; CHECK-RV32-NEXT:    bgez a2, .LBB61_238
2564; CHECK-RV32-NEXT:  # %bb.237: # %cond.load885
2565; CHECK-RV32-NEXT:    lbu a2, 0(a0)
2566; CHECK-RV32-NEXT:    vmv8r.v v24, v8
2567; CHECK-RV32-NEXT:    vmv.s.x v12, a2
2568; CHECK-RV32-NEXT:    li a2, 223
2569; CHECK-RV32-NEXT:    li a4, 222
2570; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
2571; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
2572; CHECK-RV32-NEXT:    addi a0, a0, 1
2573; CHECK-RV32-NEXT:    vmv4r.v v24, v8
2574; CHECK-RV32-NEXT:    vmv8r.v v8, v24
2575; CHECK-RV32-NEXT:  .LBB61_238: # %else886
2576; CHECK-RV32-NEXT:    vsetivli zero, 1, e64, m1, ta, ma
2577; CHECK-RV32-NEXT:    vmv.x.s a2, v16
2578; CHECK-RV32-NEXT:    bgez a3, .LBB61_239
2579; CHECK-RV32-NEXT:    j .LBB61_752
2580; CHECK-RV32-NEXT:  .LBB61_239: # %else890
2581; CHECK-RV32-NEXT:    andi a3, a2, 1
2582; CHECK-RV32-NEXT:    beqz a3, .LBB61_240
2583; CHECK-RV32-NEXT:    j .LBB61_753
2584; CHECK-RV32-NEXT:  .LBB61_240: # %else894
2585; CHECK-RV32-NEXT:    andi a3, a2, 2
2586; CHECK-RV32-NEXT:    beqz a3, .LBB61_241
2587; CHECK-RV32-NEXT:    j .LBB61_754
2588; CHECK-RV32-NEXT:  .LBB61_241: # %else898
2589; CHECK-RV32-NEXT:    andi a3, a2, 4
2590; CHECK-RV32-NEXT:    beqz a3, .LBB61_242
2591; CHECK-RV32-NEXT:    j .LBB61_755
2592; CHECK-RV32-NEXT:  .LBB61_242: # %else902
2593; CHECK-RV32-NEXT:    andi a3, a2, 8
2594; CHECK-RV32-NEXT:    beqz a3, .LBB61_243
2595; CHECK-RV32-NEXT:    j .LBB61_756
2596; CHECK-RV32-NEXT:  .LBB61_243: # %else906
2597; CHECK-RV32-NEXT:    andi a3, a2, 16
2598; CHECK-RV32-NEXT:    beqz a3, .LBB61_244
2599; CHECK-RV32-NEXT:    j .LBB61_757
2600; CHECK-RV32-NEXT:  .LBB61_244: # %else910
2601; CHECK-RV32-NEXT:    andi a3, a2, 32
2602; CHECK-RV32-NEXT:    beqz a3, .LBB61_245
2603; CHECK-RV32-NEXT:    j .LBB61_758
2604; CHECK-RV32-NEXT:  .LBB61_245: # %else914
2605; CHECK-RV32-NEXT:    andi a3, a2, 64
2606; CHECK-RV32-NEXT:    beqz a3, .LBB61_246
2607; CHECK-RV32-NEXT:    j .LBB61_759
2608; CHECK-RV32-NEXT:  .LBB61_246: # %else918
2609; CHECK-RV32-NEXT:    andi a3, a2, 128
2610; CHECK-RV32-NEXT:    beqz a3, .LBB61_247
2611; CHECK-RV32-NEXT:    j .LBB61_760
2612; CHECK-RV32-NEXT:  .LBB61_247: # %else922
2613; CHECK-RV32-NEXT:    andi a3, a2, 256
2614; CHECK-RV32-NEXT:    beqz a3, .LBB61_248
2615; CHECK-RV32-NEXT:    j .LBB61_761
2616; CHECK-RV32-NEXT:  .LBB61_248: # %else926
2617; CHECK-RV32-NEXT:    andi a3, a2, 512
2618; CHECK-RV32-NEXT:    beqz a3, .LBB61_249
2619; CHECK-RV32-NEXT:    j .LBB61_762
2620; CHECK-RV32-NEXT:  .LBB61_249: # %else930
2621; CHECK-RV32-NEXT:    andi a3, a2, 1024
2622; CHECK-RV32-NEXT:    beqz a3, .LBB61_250
2623; CHECK-RV32-NEXT:    j .LBB61_763
2624; CHECK-RV32-NEXT:  .LBB61_250: # %else934
2625; CHECK-RV32-NEXT:    slli a3, a2, 20
2626; CHECK-RV32-NEXT:    bgez a3, .LBB61_251
2627; CHECK-RV32-NEXT:    j .LBB61_764
2628; CHECK-RV32-NEXT:  .LBB61_251: # %else938
2629; CHECK-RV32-NEXT:    slli a3, a2, 19
2630; CHECK-RV32-NEXT:    bgez a3, .LBB61_252
2631; CHECK-RV32-NEXT:    j .LBB61_765
2632; CHECK-RV32-NEXT:  .LBB61_252: # %else942
2633; CHECK-RV32-NEXT:    slli a3, a2, 18
2634; CHECK-RV32-NEXT:    bgez a3, .LBB61_253
2635; CHECK-RV32-NEXT:    j .LBB61_766
2636; CHECK-RV32-NEXT:  .LBB61_253: # %else946
2637; CHECK-RV32-NEXT:    slli a3, a2, 17
2638; CHECK-RV32-NEXT:    bgez a3, .LBB61_254
2639; CHECK-RV32-NEXT:    j .LBB61_767
2640; CHECK-RV32-NEXT:  .LBB61_254: # %else950
2641; CHECK-RV32-NEXT:    slli a3, a2, 16
2642; CHECK-RV32-NEXT:    bgez a3, .LBB61_255
2643; CHECK-RV32-NEXT:    j .LBB61_768
2644; CHECK-RV32-NEXT:  .LBB61_255: # %else954
2645; CHECK-RV32-NEXT:    slli a3, a2, 15
2646; CHECK-RV32-NEXT:    bgez a3, .LBB61_256
2647; CHECK-RV32-NEXT:    j .LBB61_769
2648; CHECK-RV32-NEXT:  .LBB61_256: # %else958
2649; CHECK-RV32-NEXT:    slli a3, a2, 14
2650; CHECK-RV32-NEXT:    bgez a3, .LBB61_257
2651; CHECK-RV32-NEXT:    j .LBB61_770
2652; CHECK-RV32-NEXT:  .LBB61_257: # %else962
2653; CHECK-RV32-NEXT:    slli a3, a2, 13
2654; CHECK-RV32-NEXT:    bgez a3, .LBB61_258
2655; CHECK-RV32-NEXT:    j .LBB61_771
2656; CHECK-RV32-NEXT:  .LBB61_258: # %else966
2657; CHECK-RV32-NEXT:    slli a3, a2, 12
2658; CHECK-RV32-NEXT:    bgez a3, .LBB61_259
2659; CHECK-RV32-NEXT:    j .LBB61_772
2660; CHECK-RV32-NEXT:  .LBB61_259: # %else970
2661; CHECK-RV32-NEXT:    slli a3, a2, 11
2662; CHECK-RV32-NEXT:    bgez a3, .LBB61_260
2663; CHECK-RV32-NEXT:    j .LBB61_773
2664; CHECK-RV32-NEXT:  .LBB61_260: # %else974
2665; CHECK-RV32-NEXT:    slli a3, a2, 10
2666; CHECK-RV32-NEXT:    bgez a3, .LBB61_261
2667; CHECK-RV32-NEXT:    j .LBB61_774
2668; CHECK-RV32-NEXT:  .LBB61_261: # %else978
2669; CHECK-RV32-NEXT:    slli a3, a2, 9
2670; CHECK-RV32-NEXT:    bgez a3, .LBB61_262
2671; CHECK-RV32-NEXT:    j .LBB61_775
2672; CHECK-RV32-NEXT:  .LBB61_262: # %else982
2673; CHECK-RV32-NEXT:    slli a3, a2, 8
2674; CHECK-RV32-NEXT:    bgez a3, .LBB61_263
2675; CHECK-RV32-NEXT:    j .LBB61_776
2676; CHECK-RV32-NEXT:  .LBB61_263: # %else986
2677; CHECK-RV32-NEXT:    slli a3, a2, 7
2678; CHECK-RV32-NEXT:    bgez a3, .LBB61_264
2679; CHECK-RV32-NEXT:    j .LBB61_777
2680; CHECK-RV32-NEXT:  .LBB61_264: # %else990
2681; CHECK-RV32-NEXT:    slli a3, a2, 6
2682; CHECK-RV32-NEXT:    bgez a3, .LBB61_265
2683; CHECK-RV32-NEXT:    j .LBB61_778
2684; CHECK-RV32-NEXT:  .LBB61_265: # %else994
2685; CHECK-RV32-NEXT:    slli a3, a2, 5
2686; CHECK-RV32-NEXT:    bgez a3, .LBB61_266
2687; CHECK-RV32-NEXT:    j .LBB61_779
2688; CHECK-RV32-NEXT:  .LBB61_266: # %else998
2689; CHECK-RV32-NEXT:    slli a3, a2, 4
2690; CHECK-RV32-NEXT:    bgez a3, .LBB61_267
2691; CHECK-RV32-NEXT:    j .LBB61_780
2692; CHECK-RV32-NEXT:  .LBB61_267: # %else1002
2693; CHECK-RV32-NEXT:    slli a3, a2, 3
2694; CHECK-RV32-NEXT:    bgez a3, .LBB61_268
2695; CHECK-RV32-NEXT:    j .LBB61_781
2696; CHECK-RV32-NEXT:  .LBB61_268: # %else1006
2697; CHECK-RV32-NEXT:    slli a3, a2, 2
2698; CHECK-RV32-NEXT:    bgez a3, .LBB61_270
2699; CHECK-RV32-NEXT:  .LBB61_269: # %cond.load1009
2700; CHECK-RV32-NEXT:    lbu a3, 0(a0)
2701; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
2702; CHECK-RV32-NEXT:    vmv8r.v v16, v8
2703; CHECK-RV32-NEXT:    vmv.s.x v12, a3
2704; CHECK-RV32-NEXT:    li a3, 254
2705; CHECK-RV32-NEXT:    li a4, 253
2706; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m4, tu, ma
2707; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
2708; CHECK-RV32-NEXT:    addi a0, a0, 1
2709; CHECK-RV32-NEXT:    vmv4r.v v16, v8
2710; CHECK-RV32-NEXT:    vmv8r.v v8, v16
2711; CHECK-RV32-NEXT:  .LBB61_270: # %else1010
2712; CHECK-RV32-NEXT:    slli a3, a2, 1
2713; CHECK-RV32-NEXT:    vsetivli zero, 1, e64, m1, ta, ma
2714; CHECK-RV32-NEXT:    vslidedown.vi v16, v0, 4
2715; CHECK-RV32-NEXT:    bgez a3, .LBB61_272
2716; CHECK-RV32-NEXT:  # %bb.271: # %cond.load1013
2717; CHECK-RV32-NEXT:    lbu a3, 0(a0)
2718; CHECK-RV32-NEXT:    vmv8r.v v24, v8
2719; CHECK-RV32-NEXT:    vmv.s.x v12, a3
2720; CHECK-RV32-NEXT:    li a3, 255
2721; CHECK-RV32-NEXT:    li a4, 254
2722; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m4, tu, ma
2723; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
2724; CHECK-RV32-NEXT:    addi a0, a0, 1
2725; CHECK-RV32-NEXT:    vmv4r.v v24, v8
2726; CHECK-RV32-NEXT:    vmv8r.v v8, v24
2727; CHECK-RV32-NEXT:  .LBB61_272: # %else1014
2728; CHECK-RV32-NEXT:    vsetivli zero, 1, e64, m1, ta, ma
2729; CHECK-RV32-NEXT:    vmv.x.s a3, v16
2730; CHECK-RV32-NEXT:    bgez a2, .LBB61_273
2731; CHECK-RV32-NEXT:    j .LBB61_782
2732; CHECK-RV32-NEXT:  .LBB61_273: # %else1018
2733; CHECK-RV32-NEXT:    andi a2, a3, 1
2734; CHECK-RV32-NEXT:    beqz a2, .LBB61_274
2735; CHECK-RV32-NEXT:    j .LBB61_783
2736; CHECK-RV32-NEXT:  .LBB61_274: # %else1022
2737; CHECK-RV32-NEXT:    andi a2, a3, 2
2738; CHECK-RV32-NEXT:    beqz a2, .LBB61_275
2739; CHECK-RV32-NEXT:    j .LBB61_784
2740; CHECK-RV32-NEXT:  .LBB61_275: # %else1026
2741; CHECK-RV32-NEXT:    andi a2, a3, 4
2742; CHECK-RV32-NEXT:    beqz a2, .LBB61_276
2743; CHECK-RV32-NEXT:    j .LBB61_785
2744; CHECK-RV32-NEXT:  .LBB61_276: # %else1030
2745; CHECK-RV32-NEXT:    andi a2, a3, 8
2746; CHECK-RV32-NEXT:    beqz a2, .LBB61_277
2747; CHECK-RV32-NEXT:    j .LBB61_786
2748; CHECK-RV32-NEXT:  .LBB61_277: # %else1034
2749; CHECK-RV32-NEXT:    andi a2, a3, 16
2750; CHECK-RV32-NEXT:    beqz a2, .LBB61_278
2751; CHECK-RV32-NEXT:    j .LBB61_787
2752; CHECK-RV32-NEXT:  .LBB61_278: # %else1038
2753; CHECK-RV32-NEXT:    andi a2, a3, 32
2754; CHECK-RV32-NEXT:    beqz a2, .LBB61_279
2755; CHECK-RV32-NEXT:    j .LBB61_788
2756; CHECK-RV32-NEXT:  .LBB61_279: # %else1042
2757; CHECK-RV32-NEXT:    andi a2, a3, 64
2758; CHECK-RV32-NEXT:    beqz a2, .LBB61_280
2759; CHECK-RV32-NEXT:    j .LBB61_789
2760; CHECK-RV32-NEXT:  .LBB61_280: # %else1046
2761; CHECK-RV32-NEXT:    andi a2, a3, 128
2762; CHECK-RV32-NEXT:    beqz a2, .LBB61_281
2763; CHECK-RV32-NEXT:    j .LBB61_790
2764; CHECK-RV32-NEXT:  .LBB61_281: # %else1050
2765; CHECK-RV32-NEXT:    andi a2, a3, 256
2766; CHECK-RV32-NEXT:    beqz a2, .LBB61_282
2767; CHECK-RV32-NEXT:    j .LBB61_791
2768; CHECK-RV32-NEXT:  .LBB61_282: # %else1054
2769; CHECK-RV32-NEXT:    andi a2, a3, 512
2770; CHECK-RV32-NEXT:    beqz a2, .LBB61_283
2771; CHECK-RV32-NEXT:    j .LBB61_792
2772; CHECK-RV32-NEXT:  .LBB61_283: # %else1058
2773; CHECK-RV32-NEXT:    andi a2, a3, 1024
2774; CHECK-RV32-NEXT:    beqz a2, .LBB61_284
2775; CHECK-RV32-NEXT:    j .LBB61_793
2776; CHECK-RV32-NEXT:  .LBB61_284: # %else1062
2777; CHECK-RV32-NEXT:    slli a2, a3, 20
2778; CHECK-RV32-NEXT:    bgez a2, .LBB61_285
2779; CHECK-RV32-NEXT:    j .LBB61_794
2780; CHECK-RV32-NEXT:  .LBB61_285: # %else1066
2781; CHECK-RV32-NEXT:    slli a2, a3, 19
2782; CHECK-RV32-NEXT:    bgez a2, .LBB61_286
2783; CHECK-RV32-NEXT:    j .LBB61_795
2784; CHECK-RV32-NEXT:  .LBB61_286: # %else1070
2785; CHECK-RV32-NEXT:    slli a2, a3, 18
2786; CHECK-RV32-NEXT:    bgez a2, .LBB61_287
2787; CHECK-RV32-NEXT:    j .LBB61_796
2788; CHECK-RV32-NEXT:  .LBB61_287: # %else1074
2789; CHECK-RV32-NEXT:    slli a2, a3, 17
2790; CHECK-RV32-NEXT:    bgez a2, .LBB61_288
2791; CHECK-RV32-NEXT:    j .LBB61_797
2792; CHECK-RV32-NEXT:  .LBB61_288: # %else1078
2793; CHECK-RV32-NEXT:    slli a2, a3, 16
2794; CHECK-RV32-NEXT:    bgez a2, .LBB61_289
2795; CHECK-RV32-NEXT:    j .LBB61_798
2796; CHECK-RV32-NEXT:  .LBB61_289: # %else1082
2797; CHECK-RV32-NEXT:    slli a2, a3, 15
2798; CHECK-RV32-NEXT:    bgez a2, .LBB61_290
2799; CHECK-RV32-NEXT:    j .LBB61_799
2800; CHECK-RV32-NEXT:  .LBB61_290: # %else1086
2801; CHECK-RV32-NEXT:    slli a2, a3, 14
2802; CHECK-RV32-NEXT:    bgez a2, .LBB61_291
2803; CHECK-RV32-NEXT:    j .LBB61_800
2804; CHECK-RV32-NEXT:  .LBB61_291: # %else1090
2805; CHECK-RV32-NEXT:    slli a2, a3, 13
2806; CHECK-RV32-NEXT:    bgez a2, .LBB61_292
2807; CHECK-RV32-NEXT:    j .LBB61_801
2808; CHECK-RV32-NEXT:  .LBB61_292: # %else1094
2809; CHECK-RV32-NEXT:    slli a2, a3, 12
2810; CHECK-RV32-NEXT:    bgez a2, .LBB61_293
2811; CHECK-RV32-NEXT:    j .LBB61_802
2812; CHECK-RV32-NEXT:  .LBB61_293: # %else1098
2813; CHECK-RV32-NEXT:    slli a2, a3, 11
2814; CHECK-RV32-NEXT:    bgez a2, .LBB61_294
2815; CHECK-RV32-NEXT:    j .LBB61_803
2816; CHECK-RV32-NEXT:  .LBB61_294: # %else1102
2817; CHECK-RV32-NEXT:    slli a2, a3, 10
2818; CHECK-RV32-NEXT:    bgez a2, .LBB61_295
2819; CHECK-RV32-NEXT:    j .LBB61_804
2820; CHECK-RV32-NEXT:  .LBB61_295: # %else1106
2821; CHECK-RV32-NEXT:    slli a2, a3, 9
2822; CHECK-RV32-NEXT:    bgez a2, .LBB61_296
2823; CHECK-RV32-NEXT:    j .LBB61_805
2824; CHECK-RV32-NEXT:  .LBB61_296: # %else1110
2825; CHECK-RV32-NEXT:    slli a2, a3, 8
2826; CHECK-RV32-NEXT:    bgez a2, .LBB61_297
2827; CHECK-RV32-NEXT:    j .LBB61_806
2828; CHECK-RV32-NEXT:  .LBB61_297: # %else1114
2829; CHECK-RV32-NEXT:    slli a2, a3, 7
2830; CHECK-RV32-NEXT:    bgez a2, .LBB61_298
2831; CHECK-RV32-NEXT:    j .LBB61_807
2832; CHECK-RV32-NEXT:  .LBB61_298: # %else1118
2833; CHECK-RV32-NEXT:    slli a2, a3, 6
2834; CHECK-RV32-NEXT:    bgez a2, .LBB61_299
2835; CHECK-RV32-NEXT:    j .LBB61_808
2836; CHECK-RV32-NEXT:  .LBB61_299: # %else1122
2837; CHECK-RV32-NEXT:    slli a2, a3, 5
2838; CHECK-RV32-NEXT:    bgez a2, .LBB61_300
2839; CHECK-RV32-NEXT:    j .LBB61_809
2840; CHECK-RV32-NEXT:  .LBB61_300: # %else1126
2841; CHECK-RV32-NEXT:    slli a2, a3, 4
2842; CHECK-RV32-NEXT:    bgez a2, .LBB61_301
2843; CHECK-RV32-NEXT:    j .LBB61_810
2844; CHECK-RV32-NEXT:  .LBB61_301: # %else1130
2845; CHECK-RV32-NEXT:    slli a2, a3, 3
2846; CHECK-RV32-NEXT:    bgez a2, .LBB61_302
2847; CHECK-RV32-NEXT:    j .LBB61_811
2848; CHECK-RV32-NEXT:  .LBB61_302: # %else1134
2849; CHECK-RV32-NEXT:    slli a2, a3, 2
2850; CHECK-RV32-NEXT:    bgez a2, .LBB61_304
2851; CHECK-RV32-NEXT:  .LBB61_303: # %cond.load1137
2852; CHECK-RV32-NEXT:    lbu a2, 0(a0)
2853; CHECK-RV32-NEXT:    li a4, 512
2854; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
2855; CHECK-RV32-NEXT:    vmv.s.x v24, a2
2856; CHECK-RV32-NEXT:    li a2, 286
2857; CHECK-RV32-NEXT:    li a4, 285
2858; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
2859; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
2860; CHECK-RV32-NEXT:    addi a0, a0, 1
2861; CHECK-RV32-NEXT:  .LBB61_304: # %else1138
2862; CHECK-RV32-NEXT:    slli a2, a3, 1
2863; CHECK-RV32-NEXT:    vsetivli zero, 1, e64, m1, ta, ma
2864; CHECK-RV32-NEXT:    vsrl.vx v16, v16, a1
2865; CHECK-RV32-NEXT:    bgez a2, .LBB61_306
2866; CHECK-RV32-NEXT:  # %bb.305: # %cond.load1141
2867; CHECK-RV32-NEXT:    lbu a2, 0(a0)
2868; CHECK-RV32-NEXT:    vmv.s.x v24, a2
2869; CHECK-RV32-NEXT:    li a2, 287
2870; CHECK-RV32-NEXT:    li a4, 286
2871; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
2872; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
2873; CHECK-RV32-NEXT:    addi a0, a0, 1
2874; CHECK-RV32-NEXT:  .LBB61_306: # %else1142
2875; CHECK-RV32-NEXT:    vsetivli zero, 1, e64, m1, ta, ma
2876; CHECK-RV32-NEXT:    vmv.x.s a2, v16
2877; CHECK-RV32-NEXT:    bgez a3, .LBB61_307
2878; CHECK-RV32-NEXT:    j .LBB61_812
2879; CHECK-RV32-NEXT:  .LBB61_307: # %else1146
2880; CHECK-RV32-NEXT:    andi a3, a2, 1
2881; CHECK-RV32-NEXT:    beqz a3, .LBB61_308
2882; CHECK-RV32-NEXT:    j .LBB61_813
2883; CHECK-RV32-NEXT:  .LBB61_308: # %else1150
2884; CHECK-RV32-NEXT:    andi a3, a2, 2
2885; CHECK-RV32-NEXT:    beqz a3, .LBB61_309
2886; CHECK-RV32-NEXT:    j .LBB61_814
2887; CHECK-RV32-NEXT:  .LBB61_309: # %else1154
2888; CHECK-RV32-NEXT:    andi a3, a2, 4
2889; CHECK-RV32-NEXT:    beqz a3, .LBB61_310
2890; CHECK-RV32-NEXT:    j .LBB61_815
2891; CHECK-RV32-NEXT:  .LBB61_310: # %else1158
2892; CHECK-RV32-NEXT:    andi a3, a2, 8
2893; CHECK-RV32-NEXT:    beqz a3, .LBB61_311
2894; CHECK-RV32-NEXT:    j .LBB61_816
2895; CHECK-RV32-NEXT:  .LBB61_311: # %else1162
2896; CHECK-RV32-NEXT:    andi a3, a2, 16
2897; CHECK-RV32-NEXT:    beqz a3, .LBB61_312
2898; CHECK-RV32-NEXT:    j .LBB61_817
2899; CHECK-RV32-NEXT:  .LBB61_312: # %else1166
2900; CHECK-RV32-NEXT:    andi a3, a2, 32
2901; CHECK-RV32-NEXT:    beqz a3, .LBB61_313
2902; CHECK-RV32-NEXT:    j .LBB61_818
2903; CHECK-RV32-NEXT:  .LBB61_313: # %else1170
2904; CHECK-RV32-NEXT:    andi a3, a2, 64
2905; CHECK-RV32-NEXT:    beqz a3, .LBB61_314
2906; CHECK-RV32-NEXT:    j .LBB61_819
2907; CHECK-RV32-NEXT:  .LBB61_314: # %else1174
2908; CHECK-RV32-NEXT:    andi a3, a2, 128
2909; CHECK-RV32-NEXT:    beqz a3, .LBB61_315
2910; CHECK-RV32-NEXT:    j .LBB61_820
2911; CHECK-RV32-NEXT:  .LBB61_315: # %else1178
2912; CHECK-RV32-NEXT:    andi a3, a2, 256
2913; CHECK-RV32-NEXT:    beqz a3, .LBB61_316
2914; CHECK-RV32-NEXT:    j .LBB61_821
2915; CHECK-RV32-NEXT:  .LBB61_316: # %else1182
2916; CHECK-RV32-NEXT:    andi a3, a2, 512
2917; CHECK-RV32-NEXT:    beqz a3, .LBB61_317
2918; CHECK-RV32-NEXT:    j .LBB61_822
2919; CHECK-RV32-NEXT:  .LBB61_317: # %else1186
2920; CHECK-RV32-NEXT:    andi a3, a2, 1024
2921; CHECK-RV32-NEXT:    beqz a3, .LBB61_318
2922; CHECK-RV32-NEXT:    j .LBB61_823
2923; CHECK-RV32-NEXT:  .LBB61_318: # %else1190
2924; CHECK-RV32-NEXT:    slli a3, a2, 20
2925; CHECK-RV32-NEXT:    bgez a3, .LBB61_319
2926; CHECK-RV32-NEXT:    j .LBB61_824
2927; CHECK-RV32-NEXT:  .LBB61_319: # %else1194
2928; CHECK-RV32-NEXT:    slli a3, a2, 19
2929; CHECK-RV32-NEXT:    bgez a3, .LBB61_320
2930; CHECK-RV32-NEXT:    j .LBB61_825
2931; CHECK-RV32-NEXT:  .LBB61_320: # %else1198
2932; CHECK-RV32-NEXT:    slli a3, a2, 18
2933; CHECK-RV32-NEXT:    bgez a3, .LBB61_321
2934; CHECK-RV32-NEXT:    j .LBB61_826
2935; CHECK-RV32-NEXT:  .LBB61_321: # %else1202
2936; CHECK-RV32-NEXT:    slli a3, a2, 17
2937; CHECK-RV32-NEXT:    bgez a3, .LBB61_322
2938; CHECK-RV32-NEXT:    j .LBB61_827
2939; CHECK-RV32-NEXT:  .LBB61_322: # %else1206
2940; CHECK-RV32-NEXT:    slli a3, a2, 16
2941; CHECK-RV32-NEXT:    bgez a3, .LBB61_323
2942; CHECK-RV32-NEXT:    j .LBB61_828
2943; CHECK-RV32-NEXT:  .LBB61_323: # %else1210
2944; CHECK-RV32-NEXT:    slli a3, a2, 15
2945; CHECK-RV32-NEXT:    bgez a3, .LBB61_324
2946; CHECK-RV32-NEXT:    j .LBB61_829
2947; CHECK-RV32-NEXT:  .LBB61_324: # %else1214
2948; CHECK-RV32-NEXT:    slli a3, a2, 14
2949; CHECK-RV32-NEXT:    bgez a3, .LBB61_325
2950; CHECK-RV32-NEXT:    j .LBB61_830
2951; CHECK-RV32-NEXT:  .LBB61_325: # %else1218
2952; CHECK-RV32-NEXT:    slli a3, a2, 13
2953; CHECK-RV32-NEXT:    bgez a3, .LBB61_326
2954; CHECK-RV32-NEXT:    j .LBB61_831
2955; CHECK-RV32-NEXT:  .LBB61_326: # %else1222
2956; CHECK-RV32-NEXT:    slli a3, a2, 12
2957; CHECK-RV32-NEXT:    bgez a3, .LBB61_327
2958; CHECK-RV32-NEXT:    j .LBB61_832
2959; CHECK-RV32-NEXT:  .LBB61_327: # %else1226
2960; CHECK-RV32-NEXT:    slli a3, a2, 11
2961; CHECK-RV32-NEXT:    bgez a3, .LBB61_328
2962; CHECK-RV32-NEXT:    j .LBB61_833
2963; CHECK-RV32-NEXT:  .LBB61_328: # %else1230
2964; CHECK-RV32-NEXT:    slli a3, a2, 10
2965; CHECK-RV32-NEXT:    bgez a3, .LBB61_329
2966; CHECK-RV32-NEXT:    j .LBB61_834
2967; CHECK-RV32-NEXT:  .LBB61_329: # %else1234
2968; CHECK-RV32-NEXT:    slli a3, a2, 9
2969; CHECK-RV32-NEXT:    bgez a3, .LBB61_330
2970; CHECK-RV32-NEXT:    j .LBB61_835
2971; CHECK-RV32-NEXT:  .LBB61_330: # %else1238
2972; CHECK-RV32-NEXT:    slli a3, a2, 8
2973; CHECK-RV32-NEXT:    bgez a3, .LBB61_331
2974; CHECK-RV32-NEXT:    j .LBB61_836
2975; CHECK-RV32-NEXT:  .LBB61_331: # %else1242
2976; CHECK-RV32-NEXT:    slli a3, a2, 7
2977; CHECK-RV32-NEXT:    bgez a3, .LBB61_332
2978; CHECK-RV32-NEXT:    j .LBB61_837
2979; CHECK-RV32-NEXT:  .LBB61_332: # %else1246
2980; CHECK-RV32-NEXT:    slli a3, a2, 6
2981; CHECK-RV32-NEXT:    bgez a3, .LBB61_333
2982; CHECK-RV32-NEXT:    j .LBB61_838
2983; CHECK-RV32-NEXT:  .LBB61_333: # %else1250
2984; CHECK-RV32-NEXT:    slli a3, a2, 5
2985; CHECK-RV32-NEXT:    bgez a3, .LBB61_334
2986; CHECK-RV32-NEXT:    j .LBB61_839
2987; CHECK-RV32-NEXT:  .LBB61_334: # %else1254
2988; CHECK-RV32-NEXT:    slli a3, a2, 4
2989; CHECK-RV32-NEXT:    bgez a3, .LBB61_335
2990; CHECK-RV32-NEXT:    j .LBB61_840
2991; CHECK-RV32-NEXT:  .LBB61_335: # %else1258
2992; CHECK-RV32-NEXT:    slli a3, a2, 3
2993; CHECK-RV32-NEXT:    bgez a3, .LBB61_336
2994; CHECK-RV32-NEXT:    j .LBB61_841
2995; CHECK-RV32-NEXT:  .LBB61_336: # %else1262
2996; CHECK-RV32-NEXT:    slli a3, a2, 2
2997; CHECK-RV32-NEXT:    bgez a3, .LBB61_338
2998; CHECK-RV32-NEXT:  .LBB61_337: # %cond.load1265
2999; CHECK-RV32-NEXT:    lbu a3, 0(a0)
3000; CHECK-RV32-NEXT:    li a4, 512
3001; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
3002; CHECK-RV32-NEXT:    vmv.s.x v16, a3
3003; CHECK-RV32-NEXT:    li a3, 318
3004; CHECK-RV32-NEXT:    li a4, 317
3005; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
3006; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
3007; CHECK-RV32-NEXT:    addi a0, a0, 1
3008; CHECK-RV32-NEXT:  .LBB61_338: # %else1266
3009; CHECK-RV32-NEXT:    slli a3, a2, 1
3010; CHECK-RV32-NEXT:    vsetivli zero, 1, e64, m1, ta, ma
3011; CHECK-RV32-NEXT:    vslidedown.vi v16, v0, 5
3012; CHECK-RV32-NEXT:    bgez a3, .LBB61_340
3013; CHECK-RV32-NEXT:  # %bb.339: # %cond.load1269
3014; CHECK-RV32-NEXT:    lbu a3, 0(a0)
3015; CHECK-RV32-NEXT:    vmv.s.x v24, a3
3016; CHECK-RV32-NEXT:    li a3, 319
3017; CHECK-RV32-NEXT:    li a4, 318
3018; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
3019; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
3020; CHECK-RV32-NEXT:    addi a0, a0, 1
3021; CHECK-RV32-NEXT:  .LBB61_340: # %else1270
3022; CHECK-RV32-NEXT:    vsetivli zero, 1, e64, m1, ta, ma
3023; CHECK-RV32-NEXT:    vmv.x.s a3, v16
3024; CHECK-RV32-NEXT:    bgez a2, .LBB61_341
3025; CHECK-RV32-NEXT:    j .LBB61_842
3026; CHECK-RV32-NEXT:  .LBB61_341: # %else1274
3027; CHECK-RV32-NEXT:    andi a2, a3, 1
3028; CHECK-RV32-NEXT:    beqz a2, .LBB61_342
3029; CHECK-RV32-NEXT:    j .LBB61_843
3030; CHECK-RV32-NEXT:  .LBB61_342: # %else1278
3031; CHECK-RV32-NEXT:    andi a2, a3, 2
3032; CHECK-RV32-NEXT:    beqz a2, .LBB61_343
3033; CHECK-RV32-NEXT:    j .LBB61_844
3034; CHECK-RV32-NEXT:  .LBB61_343: # %else1282
3035; CHECK-RV32-NEXT:    andi a2, a3, 4
3036; CHECK-RV32-NEXT:    beqz a2, .LBB61_344
3037; CHECK-RV32-NEXT:    j .LBB61_845
3038; CHECK-RV32-NEXT:  .LBB61_344: # %else1286
3039; CHECK-RV32-NEXT:    andi a2, a3, 8
3040; CHECK-RV32-NEXT:    beqz a2, .LBB61_345
3041; CHECK-RV32-NEXT:    j .LBB61_846
3042; CHECK-RV32-NEXT:  .LBB61_345: # %else1290
3043; CHECK-RV32-NEXT:    andi a2, a3, 16
3044; CHECK-RV32-NEXT:    beqz a2, .LBB61_346
3045; CHECK-RV32-NEXT:    j .LBB61_847
3046; CHECK-RV32-NEXT:  .LBB61_346: # %else1294
3047; CHECK-RV32-NEXT:    andi a2, a3, 32
3048; CHECK-RV32-NEXT:    beqz a2, .LBB61_347
3049; CHECK-RV32-NEXT:    j .LBB61_848
3050; CHECK-RV32-NEXT:  .LBB61_347: # %else1298
3051; CHECK-RV32-NEXT:    andi a2, a3, 64
3052; CHECK-RV32-NEXT:    beqz a2, .LBB61_348
3053; CHECK-RV32-NEXT:    j .LBB61_849
3054; CHECK-RV32-NEXT:  .LBB61_348: # %else1302
3055; CHECK-RV32-NEXT:    andi a2, a3, 128
3056; CHECK-RV32-NEXT:    beqz a2, .LBB61_349
3057; CHECK-RV32-NEXT:    j .LBB61_850
3058; CHECK-RV32-NEXT:  .LBB61_349: # %else1306
3059; CHECK-RV32-NEXT:    andi a2, a3, 256
3060; CHECK-RV32-NEXT:    beqz a2, .LBB61_350
3061; CHECK-RV32-NEXT:    j .LBB61_851
3062; CHECK-RV32-NEXT:  .LBB61_350: # %else1310
3063; CHECK-RV32-NEXT:    andi a2, a3, 512
3064; CHECK-RV32-NEXT:    beqz a2, .LBB61_351
3065; CHECK-RV32-NEXT:    j .LBB61_852
3066; CHECK-RV32-NEXT:  .LBB61_351: # %else1314
3067; CHECK-RV32-NEXT:    andi a2, a3, 1024
3068; CHECK-RV32-NEXT:    beqz a2, .LBB61_352
3069; CHECK-RV32-NEXT:    j .LBB61_853
3070; CHECK-RV32-NEXT:  .LBB61_352: # %else1318
3071; CHECK-RV32-NEXT:    slli a2, a3, 20
3072; CHECK-RV32-NEXT:    bgez a2, .LBB61_353
3073; CHECK-RV32-NEXT:    j .LBB61_854
3074; CHECK-RV32-NEXT:  .LBB61_353: # %else1322
3075; CHECK-RV32-NEXT:    slli a2, a3, 19
3076; CHECK-RV32-NEXT:    bgez a2, .LBB61_354
3077; CHECK-RV32-NEXT:    j .LBB61_855
3078; CHECK-RV32-NEXT:  .LBB61_354: # %else1326
3079; CHECK-RV32-NEXT:    slli a2, a3, 18
3080; CHECK-RV32-NEXT:    bgez a2, .LBB61_355
3081; CHECK-RV32-NEXT:    j .LBB61_856
3082; CHECK-RV32-NEXT:  .LBB61_355: # %else1330
3083; CHECK-RV32-NEXT:    slli a2, a3, 17
3084; CHECK-RV32-NEXT:    bgez a2, .LBB61_356
3085; CHECK-RV32-NEXT:    j .LBB61_857
3086; CHECK-RV32-NEXT:  .LBB61_356: # %else1334
3087; CHECK-RV32-NEXT:    slli a2, a3, 16
3088; CHECK-RV32-NEXT:    bgez a2, .LBB61_357
3089; CHECK-RV32-NEXT:    j .LBB61_858
3090; CHECK-RV32-NEXT:  .LBB61_357: # %else1338
3091; CHECK-RV32-NEXT:    slli a2, a3, 15
3092; CHECK-RV32-NEXT:    bgez a2, .LBB61_358
3093; CHECK-RV32-NEXT:    j .LBB61_859
3094; CHECK-RV32-NEXT:  .LBB61_358: # %else1342
3095; CHECK-RV32-NEXT:    slli a2, a3, 14
3096; CHECK-RV32-NEXT:    bgez a2, .LBB61_359
3097; CHECK-RV32-NEXT:    j .LBB61_860
3098; CHECK-RV32-NEXT:  .LBB61_359: # %else1346
3099; CHECK-RV32-NEXT:    slli a2, a3, 13
3100; CHECK-RV32-NEXT:    bgez a2, .LBB61_360
3101; CHECK-RV32-NEXT:    j .LBB61_861
3102; CHECK-RV32-NEXT:  .LBB61_360: # %else1350
3103; CHECK-RV32-NEXT:    slli a2, a3, 12
3104; CHECK-RV32-NEXT:    bgez a2, .LBB61_361
3105; CHECK-RV32-NEXT:    j .LBB61_862
3106; CHECK-RV32-NEXT:  .LBB61_361: # %else1354
3107; CHECK-RV32-NEXT:    slli a2, a3, 11
3108; CHECK-RV32-NEXT:    bgez a2, .LBB61_362
3109; CHECK-RV32-NEXT:    j .LBB61_863
3110; CHECK-RV32-NEXT:  .LBB61_362: # %else1358
3111; CHECK-RV32-NEXT:    slli a2, a3, 10
3112; CHECK-RV32-NEXT:    bgez a2, .LBB61_363
3113; CHECK-RV32-NEXT:    j .LBB61_864
3114; CHECK-RV32-NEXT:  .LBB61_363: # %else1362
3115; CHECK-RV32-NEXT:    slli a2, a3, 9
3116; CHECK-RV32-NEXT:    bgez a2, .LBB61_364
3117; CHECK-RV32-NEXT:    j .LBB61_865
3118; CHECK-RV32-NEXT:  .LBB61_364: # %else1366
3119; CHECK-RV32-NEXT:    slli a2, a3, 8
3120; CHECK-RV32-NEXT:    bgez a2, .LBB61_365
3121; CHECK-RV32-NEXT:    j .LBB61_866
3122; CHECK-RV32-NEXT:  .LBB61_365: # %else1370
3123; CHECK-RV32-NEXT:    slli a2, a3, 7
3124; CHECK-RV32-NEXT:    bgez a2, .LBB61_366
3125; CHECK-RV32-NEXT:    j .LBB61_867
3126; CHECK-RV32-NEXT:  .LBB61_366: # %else1374
3127; CHECK-RV32-NEXT:    slli a2, a3, 6
3128; CHECK-RV32-NEXT:    bgez a2, .LBB61_367
3129; CHECK-RV32-NEXT:    j .LBB61_868
3130; CHECK-RV32-NEXT:  .LBB61_367: # %else1378
3131; CHECK-RV32-NEXT:    slli a2, a3, 5
3132; CHECK-RV32-NEXT:    bgez a2, .LBB61_368
3133; CHECK-RV32-NEXT:    j .LBB61_869
3134; CHECK-RV32-NEXT:  .LBB61_368: # %else1382
3135; CHECK-RV32-NEXT:    slli a2, a3, 4
3136; CHECK-RV32-NEXT:    bgez a2, .LBB61_369
3137; CHECK-RV32-NEXT:    j .LBB61_870
3138; CHECK-RV32-NEXT:  .LBB61_369: # %else1386
3139; CHECK-RV32-NEXT:    slli a2, a3, 3
3140; CHECK-RV32-NEXT:    bgez a2, .LBB61_370
3141; CHECK-RV32-NEXT:    j .LBB61_871
3142; CHECK-RV32-NEXT:  .LBB61_370: # %else1390
3143; CHECK-RV32-NEXT:    slli a2, a3, 2
3144; CHECK-RV32-NEXT:    bgez a2, .LBB61_372
3145; CHECK-RV32-NEXT:  .LBB61_371: # %cond.load1393
3146; CHECK-RV32-NEXT:    lbu a2, 0(a0)
3147; CHECK-RV32-NEXT:    li a4, 512
3148; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
3149; CHECK-RV32-NEXT:    vmv.s.x v24, a2
3150; CHECK-RV32-NEXT:    li a2, 350
3151; CHECK-RV32-NEXT:    li a4, 349
3152; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
3153; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
3154; CHECK-RV32-NEXT:    addi a0, a0, 1
3155; CHECK-RV32-NEXT:  .LBB61_372: # %else1394
3156; CHECK-RV32-NEXT:    slli a2, a3, 1
3157; CHECK-RV32-NEXT:    vsetivli zero, 1, e64, m1, ta, ma
3158; CHECK-RV32-NEXT:    vsrl.vx v16, v16, a1
3159; CHECK-RV32-NEXT:    bgez a2, .LBB61_374
3160; CHECK-RV32-NEXT:  # %bb.373: # %cond.load1397
3161; CHECK-RV32-NEXT:    lbu a2, 0(a0)
3162; CHECK-RV32-NEXT:    vmv.s.x v24, a2
3163; CHECK-RV32-NEXT:    li a2, 351
3164; CHECK-RV32-NEXT:    li a4, 350
3165; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
3166; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
3167; CHECK-RV32-NEXT:    addi a0, a0, 1
3168; CHECK-RV32-NEXT:  .LBB61_374: # %else1398
3169; CHECK-RV32-NEXT:    vsetivli zero, 1, e64, m1, ta, ma
3170; CHECK-RV32-NEXT:    vmv.x.s a2, v16
3171; CHECK-RV32-NEXT:    bgez a3, .LBB61_375
3172; CHECK-RV32-NEXT:    j .LBB61_872
3173; CHECK-RV32-NEXT:  .LBB61_375: # %else1402
3174; CHECK-RV32-NEXT:    andi a3, a2, 1
3175; CHECK-RV32-NEXT:    beqz a3, .LBB61_376
3176; CHECK-RV32-NEXT:    j .LBB61_873
3177; CHECK-RV32-NEXT:  .LBB61_376: # %else1406
3178; CHECK-RV32-NEXT:    andi a3, a2, 2
3179; CHECK-RV32-NEXT:    beqz a3, .LBB61_377
3180; CHECK-RV32-NEXT:    j .LBB61_874
3181; CHECK-RV32-NEXT:  .LBB61_377: # %else1410
3182; CHECK-RV32-NEXT:    andi a3, a2, 4
3183; CHECK-RV32-NEXT:    beqz a3, .LBB61_378
3184; CHECK-RV32-NEXT:    j .LBB61_875
3185; CHECK-RV32-NEXT:  .LBB61_378: # %else1414
3186; CHECK-RV32-NEXT:    andi a3, a2, 8
3187; CHECK-RV32-NEXT:    beqz a3, .LBB61_379
3188; CHECK-RV32-NEXT:    j .LBB61_876
3189; CHECK-RV32-NEXT:  .LBB61_379: # %else1418
3190; CHECK-RV32-NEXT:    andi a3, a2, 16
3191; CHECK-RV32-NEXT:    beqz a3, .LBB61_380
3192; CHECK-RV32-NEXT:    j .LBB61_877
3193; CHECK-RV32-NEXT:  .LBB61_380: # %else1422
3194; CHECK-RV32-NEXT:    andi a3, a2, 32
3195; CHECK-RV32-NEXT:    beqz a3, .LBB61_381
3196; CHECK-RV32-NEXT:    j .LBB61_878
3197; CHECK-RV32-NEXT:  .LBB61_381: # %else1426
3198; CHECK-RV32-NEXT:    andi a3, a2, 64
3199; CHECK-RV32-NEXT:    beqz a3, .LBB61_382
3200; CHECK-RV32-NEXT:    j .LBB61_879
3201; CHECK-RV32-NEXT:  .LBB61_382: # %else1430
3202; CHECK-RV32-NEXT:    andi a3, a2, 128
3203; CHECK-RV32-NEXT:    beqz a3, .LBB61_383
3204; CHECK-RV32-NEXT:    j .LBB61_880
3205; CHECK-RV32-NEXT:  .LBB61_383: # %else1434
3206; CHECK-RV32-NEXT:    andi a3, a2, 256
3207; CHECK-RV32-NEXT:    beqz a3, .LBB61_384
3208; CHECK-RV32-NEXT:    j .LBB61_881
3209; CHECK-RV32-NEXT:  .LBB61_384: # %else1438
3210; CHECK-RV32-NEXT:    andi a3, a2, 512
3211; CHECK-RV32-NEXT:    beqz a3, .LBB61_385
3212; CHECK-RV32-NEXT:    j .LBB61_882
3213; CHECK-RV32-NEXT:  .LBB61_385: # %else1442
3214; CHECK-RV32-NEXT:    andi a3, a2, 1024
3215; CHECK-RV32-NEXT:    beqz a3, .LBB61_386
3216; CHECK-RV32-NEXT:    j .LBB61_883
3217; CHECK-RV32-NEXT:  .LBB61_386: # %else1446
3218; CHECK-RV32-NEXT:    slli a3, a2, 20
3219; CHECK-RV32-NEXT:    bgez a3, .LBB61_387
3220; CHECK-RV32-NEXT:    j .LBB61_884
3221; CHECK-RV32-NEXT:  .LBB61_387: # %else1450
3222; CHECK-RV32-NEXT:    slli a3, a2, 19
3223; CHECK-RV32-NEXT:    bgez a3, .LBB61_388
3224; CHECK-RV32-NEXT:    j .LBB61_885
3225; CHECK-RV32-NEXT:  .LBB61_388: # %else1454
3226; CHECK-RV32-NEXT:    slli a3, a2, 18
3227; CHECK-RV32-NEXT:    bgez a3, .LBB61_389
3228; CHECK-RV32-NEXT:    j .LBB61_886
3229; CHECK-RV32-NEXT:  .LBB61_389: # %else1458
3230; CHECK-RV32-NEXT:    slli a3, a2, 17
3231; CHECK-RV32-NEXT:    bgez a3, .LBB61_390
3232; CHECK-RV32-NEXT:    j .LBB61_887
3233; CHECK-RV32-NEXT:  .LBB61_390: # %else1462
3234; CHECK-RV32-NEXT:    slli a3, a2, 16
3235; CHECK-RV32-NEXT:    bgez a3, .LBB61_391
3236; CHECK-RV32-NEXT:    j .LBB61_888
3237; CHECK-RV32-NEXT:  .LBB61_391: # %else1466
3238; CHECK-RV32-NEXT:    slli a3, a2, 15
3239; CHECK-RV32-NEXT:    bgez a3, .LBB61_392
3240; CHECK-RV32-NEXT:    j .LBB61_889
3241; CHECK-RV32-NEXT:  .LBB61_392: # %else1470
3242; CHECK-RV32-NEXT:    slli a3, a2, 14
3243; CHECK-RV32-NEXT:    bgez a3, .LBB61_393
3244; CHECK-RV32-NEXT:    j .LBB61_890
3245; CHECK-RV32-NEXT:  .LBB61_393: # %else1474
3246; CHECK-RV32-NEXT:    slli a3, a2, 13
3247; CHECK-RV32-NEXT:    bgez a3, .LBB61_394
3248; CHECK-RV32-NEXT:    j .LBB61_891
3249; CHECK-RV32-NEXT:  .LBB61_394: # %else1478
3250; CHECK-RV32-NEXT:    slli a3, a2, 12
3251; CHECK-RV32-NEXT:    bgez a3, .LBB61_395
3252; CHECK-RV32-NEXT:    j .LBB61_892
3253; CHECK-RV32-NEXT:  .LBB61_395: # %else1482
3254; CHECK-RV32-NEXT:    slli a3, a2, 11
3255; CHECK-RV32-NEXT:    bgez a3, .LBB61_396
3256; CHECK-RV32-NEXT:    j .LBB61_893
3257; CHECK-RV32-NEXT:  .LBB61_396: # %else1486
3258; CHECK-RV32-NEXT:    slli a3, a2, 10
3259; CHECK-RV32-NEXT:    bgez a3, .LBB61_397
3260; CHECK-RV32-NEXT:    j .LBB61_894
3261; CHECK-RV32-NEXT:  .LBB61_397: # %else1490
3262; CHECK-RV32-NEXT:    slli a3, a2, 9
3263; CHECK-RV32-NEXT:    bgez a3, .LBB61_398
3264; CHECK-RV32-NEXT:    j .LBB61_895
3265; CHECK-RV32-NEXT:  .LBB61_398: # %else1494
3266; CHECK-RV32-NEXT:    slli a3, a2, 8
3267; CHECK-RV32-NEXT:    bgez a3, .LBB61_399
3268; CHECK-RV32-NEXT:    j .LBB61_896
3269; CHECK-RV32-NEXT:  .LBB61_399: # %else1498
3270; CHECK-RV32-NEXT:    slli a3, a2, 7
3271; CHECK-RV32-NEXT:    bgez a3, .LBB61_400
3272; CHECK-RV32-NEXT:    j .LBB61_897
3273; CHECK-RV32-NEXT:  .LBB61_400: # %else1502
3274; CHECK-RV32-NEXT:    slli a3, a2, 6
3275; CHECK-RV32-NEXT:    bgez a3, .LBB61_401
3276; CHECK-RV32-NEXT:    j .LBB61_898
3277; CHECK-RV32-NEXT:  .LBB61_401: # %else1506
3278; CHECK-RV32-NEXT:    slli a3, a2, 5
3279; CHECK-RV32-NEXT:    bgez a3, .LBB61_402
3280; CHECK-RV32-NEXT:    j .LBB61_899
3281; CHECK-RV32-NEXT:  .LBB61_402: # %else1510
3282; CHECK-RV32-NEXT:    slli a3, a2, 4
3283; CHECK-RV32-NEXT:    bgez a3, .LBB61_403
3284; CHECK-RV32-NEXT:    j .LBB61_900
3285; CHECK-RV32-NEXT:  .LBB61_403: # %else1514
3286; CHECK-RV32-NEXT:    slli a3, a2, 3
3287; CHECK-RV32-NEXT:    bgez a3, .LBB61_404
3288; CHECK-RV32-NEXT:    j .LBB61_901
3289; CHECK-RV32-NEXT:  .LBB61_404: # %else1518
3290; CHECK-RV32-NEXT:    slli a3, a2, 2
3291; CHECK-RV32-NEXT:    bgez a3, .LBB61_406
3292; CHECK-RV32-NEXT:  .LBB61_405: # %cond.load1521
3293; CHECK-RV32-NEXT:    lbu a3, 0(a0)
3294; CHECK-RV32-NEXT:    li a4, 512
3295; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
3296; CHECK-RV32-NEXT:    vmv.s.x v16, a3
3297; CHECK-RV32-NEXT:    li a3, 382
3298; CHECK-RV32-NEXT:    li a4, 381
3299; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
3300; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
3301; CHECK-RV32-NEXT:    addi a0, a0, 1
3302; CHECK-RV32-NEXT:  .LBB61_406: # %else1522
3303; CHECK-RV32-NEXT:    slli a3, a2, 1
3304; CHECK-RV32-NEXT:    vsetivli zero, 1, e64, m1, ta, ma
3305; CHECK-RV32-NEXT:    vslidedown.vi v16, v0, 6
3306; CHECK-RV32-NEXT:    bgez a3, .LBB61_408
3307; CHECK-RV32-NEXT:  # %bb.407: # %cond.load1525
3308; CHECK-RV32-NEXT:    lbu a3, 0(a0)
3309; CHECK-RV32-NEXT:    vmv.s.x v24, a3
3310; CHECK-RV32-NEXT:    li a3, 383
3311; CHECK-RV32-NEXT:    li a4, 382
3312; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
3313; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
3314; CHECK-RV32-NEXT:    addi a0, a0, 1
3315; CHECK-RV32-NEXT:  .LBB61_408: # %else1526
3316; CHECK-RV32-NEXT:    vsetivli zero, 1, e64, m1, ta, ma
3317; CHECK-RV32-NEXT:    vmv.x.s a3, v16
3318; CHECK-RV32-NEXT:    bgez a2, .LBB61_409
3319; CHECK-RV32-NEXT:    j .LBB61_902
3320; CHECK-RV32-NEXT:  .LBB61_409: # %else1530
3321; CHECK-RV32-NEXT:    andi a2, a3, 1
3322; CHECK-RV32-NEXT:    beqz a2, .LBB61_410
3323; CHECK-RV32-NEXT:    j .LBB61_903
3324; CHECK-RV32-NEXT:  .LBB61_410: # %else1534
3325; CHECK-RV32-NEXT:    andi a2, a3, 2
3326; CHECK-RV32-NEXT:    beqz a2, .LBB61_411
3327; CHECK-RV32-NEXT:    j .LBB61_904
3328; CHECK-RV32-NEXT:  .LBB61_411: # %else1538
3329; CHECK-RV32-NEXT:    andi a2, a3, 4
3330; CHECK-RV32-NEXT:    beqz a2, .LBB61_412
3331; CHECK-RV32-NEXT:    j .LBB61_905
3332; CHECK-RV32-NEXT:  .LBB61_412: # %else1542
3333; CHECK-RV32-NEXT:    andi a2, a3, 8
3334; CHECK-RV32-NEXT:    beqz a2, .LBB61_413
3335; CHECK-RV32-NEXT:    j .LBB61_906
3336; CHECK-RV32-NEXT:  .LBB61_413: # %else1546
3337; CHECK-RV32-NEXT:    andi a2, a3, 16
3338; CHECK-RV32-NEXT:    beqz a2, .LBB61_414
3339; CHECK-RV32-NEXT:    j .LBB61_907
3340; CHECK-RV32-NEXT:  .LBB61_414: # %else1550
3341; CHECK-RV32-NEXT:    andi a2, a3, 32
3342; CHECK-RV32-NEXT:    beqz a2, .LBB61_415
3343; CHECK-RV32-NEXT:    j .LBB61_908
3344; CHECK-RV32-NEXT:  .LBB61_415: # %else1554
3345; CHECK-RV32-NEXT:    andi a2, a3, 64
3346; CHECK-RV32-NEXT:    beqz a2, .LBB61_416
3347; CHECK-RV32-NEXT:    j .LBB61_909
3348; CHECK-RV32-NEXT:  .LBB61_416: # %else1558
3349; CHECK-RV32-NEXT:    andi a2, a3, 128
3350; CHECK-RV32-NEXT:    beqz a2, .LBB61_417
3351; CHECK-RV32-NEXT:    j .LBB61_910
3352; CHECK-RV32-NEXT:  .LBB61_417: # %else1562
3353; CHECK-RV32-NEXT:    andi a2, a3, 256
3354; CHECK-RV32-NEXT:    beqz a2, .LBB61_418
3355; CHECK-RV32-NEXT:    j .LBB61_911
3356; CHECK-RV32-NEXT:  .LBB61_418: # %else1566
3357; CHECK-RV32-NEXT:    andi a2, a3, 512
3358; CHECK-RV32-NEXT:    beqz a2, .LBB61_419
3359; CHECK-RV32-NEXT:    j .LBB61_912
3360; CHECK-RV32-NEXT:  .LBB61_419: # %else1570
3361; CHECK-RV32-NEXT:    andi a2, a3, 1024
3362; CHECK-RV32-NEXT:    beqz a2, .LBB61_420
3363; CHECK-RV32-NEXT:    j .LBB61_913
3364; CHECK-RV32-NEXT:  .LBB61_420: # %else1574
3365; CHECK-RV32-NEXT:    slli a2, a3, 20
3366; CHECK-RV32-NEXT:    bgez a2, .LBB61_421
3367; CHECK-RV32-NEXT:    j .LBB61_914
3368; CHECK-RV32-NEXT:  .LBB61_421: # %else1578
3369; CHECK-RV32-NEXT:    slli a2, a3, 19
3370; CHECK-RV32-NEXT:    bgez a2, .LBB61_422
3371; CHECK-RV32-NEXT:    j .LBB61_915
3372; CHECK-RV32-NEXT:  .LBB61_422: # %else1582
3373; CHECK-RV32-NEXT:    slli a2, a3, 18
3374; CHECK-RV32-NEXT:    bgez a2, .LBB61_423
3375; CHECK-RV32-NEXT:    j .LBB61_916
3376; CHECK-RV32-NEXT:  .LBB61_423: # %else1586
3377; CHECK-RV32-NEXT:    slli a2, a3, 17
3378; CHECK-RV32-NEXT:    bgez a2, .LBB61_424
3379; CHECK-RV32-NEXT:    j .LBB61_917
3380; CHECK-RV32-NEXT:  .LBB61_424: # %else1590
3381; CHECK-RV32-NEXT:    slli a2, a3, 16
3382; CHECK-RV32-NEXT:    bgez a2, .LBB61_425
3383; CHECK-RV32-NEXT:    j .LBB61_918
3384; CHECK-RV32-NEXT:  .LBB61_425: # %else1594
3385; CHECK-RV32-NEXT:    slli a2, a3, 15
3386; CHECK-RV32-NEXT:    bgez a2, .LBB61_426
3387; CHECK-RV32-NEXT:    j .LBB61_919
3388; CHECK-RV32-NEXT:  .LBB61_426: # %else1598
3389; CHECK-RV32-NEXT:    slli a2, a3, 14
3390; CHECK-RV32-NEXT:    bgez a2, .LBB61_427
3391; CHECK-RV32-NEXT:    j .LBB61_920
3392; CHECK-RV32-NEXT:  .LBB61_427: # %else1602
3393; CHECK-RV32-NEXT:    slli a2, a3, 13
3394; CHECK-RV32-NEXT:    bgez a2, .LBB61_428
3395; CHECK-RV32-NEXT:    j .LBB61_921
3396; CHECK-RV32-NEXT:  .LBB61_428: # %else1606
3397; CHECK-RV32-NEXT:    slli a2, a3, 12
3398; CHECK-RV32-NEXT:    bgez a2, .LBB61_429
3399; CHECK-RV32-NEXT:    j .LBB61_922
3400; CHECK-RV32-NEXT:  .LBB61_429: # %else1610
3401; CHECK-RV32-NEXT:    slli a2, a3, 11
3402; CHECK-RV32-NEXT:    bgez a2, .LBB61_430
3403; CHECK-RV32-NEXT:    j .LBB61_923
3404; CHECK-RV32-NEXT:  .LBB61_430: # %else1614
3405; CHECK-RV32-NEXT:    slli a2, a3, 10
3406; CHECK-RV32-NEXT:    bgez a2, .LBB61_431
3407; CHECK-RV32-NEXT:    j .LBB61_924
3408; CHECK-RV32-NEXT:  .LBB61_431: # %else1618
3409; CHECK-RV32-NEXT:    slli a2, a3, 9
3410; CHECK-RV32-NEXT:    bgez a2, .LBB61_432
3411; CHECK-RV32-NEXT:    j .LBB61_925
3412; CHECK-RV32-NEXT:  .LBB61_432: # %else1622
3413; CHECK-RV32-NEXT:    slli a2, a3, 8
3414; CHECK-RV32-NEXT:    bgez a2, .LBB61_433
3415; CHECK-RV32-NEXT:    j .LBB61_926
3416; CHECK-RV32-NEXT:  .LBB61_433: # %else1626
3417; CHECK-RV32-NEXT:    slli a2, a3, 7
3418; CHECK-RV32-NEXT:    bgez a2, .LBB61_434
3419; CHECK-RV32-NEXT:    j .LBB61_927
3420; CHECK-RV32-NEXT:  .LBB61_434: # %else1630
3421; CHECK-RV32-NEXT:    slli a2, a3, 6
3422; CHECK-RV32-NEXT:    bgez a2, .LBB61_435
3423; CHECK-RV32-NEXT:    j .LBB61_928
3424; CHECK-RV32-NEXT:  .LBB61_435: # %else1634
3425; CHECK-RV32-NEXT:    slli a2, a3, 5
3426; CHECK-RV32-NEXT:    bgez a2, .LBB61_436
3427; CHECK-RV32-NEXT:    j .LBB61_929
3428; CHECK-RV32-NEXT:  .LBB61_436: # %else1638
3429; CHECK-RV32-NEXT:    slli a2, a3, 4
3430; CHECK-RV32-NEXT:    bgez a2, .LBB61_437
3431; CHECK-RV32-NEXT:    j .LBB61_930
3432; CHECK-RV32-NEXT:  .LBB61_437: # %else1642
3433; CHECK-RV32-NEXT:    slli a2, a3, 3
3434; CHECK-RV32-NEXT:    bgez a2, .LBB61_438
3435; CHECK-RV32-NEXT:    j .LBB61_931
3436; CHECK-RV32-NEXT:  .LBB61_438: # %else1646
3437; CHECK-RV32-NEXT:    slli a2, a3, 2
3438; CHECK-RV32-NEXT:    bgez a2, .LBB61_440
3439; CHECK-RV32-NEXT:  .LBB61_439: # %cond.load1649
3440; CHECK-RV32-NEXT:    lbu a2, 0(a0)
3441; CHECK-RV32-NEXT:    li a4, 512
3442; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
3443; CHECK-RV32-NEXT:    vmv.s.x v24, a2
3444; CHECK-RV32-NEXT:    li a2, 414
3445; CHECK-RV32-NEXT:    li a4, 413
3446; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
3447; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
3448; CHECK-RV32-NEXT:    addi a0, a0, 1
3449; CHECK-RV32-NEXT:  .LBB61_440: # %else1650
3450; CHECK-RV32-NEXT:    slli a2, a3, 1
3451; CHECK-RV32-NEXT:    vsetivli zero, 1, e64, m1, ta, ma
3452; CHECK-RV32-NEXT:    vsrl.vx v16, v16, a1
3453; CHECK-RV32-NEXT:    bgez a2, .LBB61_442
3454; CHECK-RV32-NEXT:  # %bb.441: # %cond.load1653
3455; CHECK-RV32-NEXT:    lbu a2, 0(a0)
3456; CHECK-RV32-NEXT:    vmv.s.x v24, a2
3457; CHECK-RV32-NEXT:    li a2, 415
3458; CHECK-RV32-NEXT:    li a4, 414
3459; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
3460; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
3461; CHECK-RV32-NEXT:    addi a0, a0, 1
3462; CHECK-RV32-NEXT:  .LBB61_442: # %else1654
3463; CHECK-RV32-NEXT:    vsetivli zero, 1, e64, m1, ta, ma
3464; CHECK-RV32-NEXT:    vmv.x.s a2, v16
3465; CHECK-RV32-NEXT:    bgez a3, .LBB61_443
3466; CHECK-RV32-NEXT:    j .LBB61_932
3467; CHECK-RV32-NEXT:  .LBB61_443: # %else1658
3468; CHECK-RV32-NEXT:    andi a3, a2, 1
3469; CHECK-RV32-NEXT:    beqz a3, .LBB61_444
3470; CHECK-RV32-NEXT:    j .LBB61_933
3471; CHECK-RV32-NEXT:  .LBB61_444: # %else1662
3472; CHECK-RV32-NEXT:    andi a3, a2, 2
3473; CHECK-RV32-NEXT:    beqz a3, .LBB61_445
3474; CHECK-RV32-NEXT:    j .LBB61_934
3475; CHECK-RV32-NEXT:  .LBB61_445: # %else1666
3476; CHECK-RV32-NEXT:    andi a3, a2, 4
3477; CHECK-RV32-NEXT:    beqz a3, .LBB61_446
3478; CHECK-RV32-NEXT:    j .LBB61_935
3479; CHECK-RV32-NEXT:  .LBB61_446: # %else1670
3480; CHECK-RV32-NEXT:    andi a3, a2, 8
3481; CHECK-RV32-NEXT:    beqz a3, .LBB61_447
3482; CHECK-RV32-NEXT:    j .LBB61_936
3483; CHECK-RV32-NEXT:  .LBB61_447: # %else1674
3484; CHECK-RV32-NEXT:    andi a3, a2, 16
3485; CHECK-RV32-NEXT:    beqz a3, .LBB61_448
3486; CHECK-RV32-NEXT:    j .LBB61_937
3487; CHECK-RV32-NEXT:  .LBB61_448: # %else1678
3488; CHECK-RV32-NEXT:    andi a3, a2, 32
3489; CHECK-RV32-NEXT:    beqz a3, .LBB61_449
3490; CHECK-RV32-NEXT:    j .LBB61_938
3491; CHECK-RV32-NEXT:  .LBB61_449: # %else1682
3492; CHECK-RV32-NEXT:    andi a3, a2, 64
3493; CHECK-RV32-NEXT:    beqz a3, .LBB61_450
3494; CHECK-RV32-NEXT:    j .LBB61_939
3495; CHECK-RV32-NEXT:  .LBB61_450: # %else1686
3496; CHECK-RV32-NEXT:    andi a3, a2, 128
3497; CHECK-RV32-NEXT:    beqz a3, .LBB61_451
3498; CHECK-RV32-NEXT:    j .LBB61_940
3499; CHECK-RV32-NEXT:  .LBB61_451: # %else1690
3500; CHECK-RV32-NEXT:    andi a3, a2, 256
3501; CHECK-RV32-NEXT:    beqz a3, .LBB61_452
3502; CHECK-RV32-NEXT:    j .LBB61_941
3503; CHECK-RV32-NEXT:  .LBB61_452: # %else1694
3504; CHECK-RV32-NEXT:    andi a3, a2, 512
3505; CHECK-RV32-NEXT:    beqz a3, .LBB61_453
3506; CHECK-RV32-NEXT:    j .LBB61_942
3507; CHECK-RV32-NEXT:  .LBB61_453: # %else1698
3508; CHECK-RV32-NEXT:    andi a3, a2, 1024
3509; CHECK-RV32-NEXT:    beqz a3, .LBB61_454
3510; CHECK-RV32-NEXT:    j .LBB61_943
3511; CHECK-RV32-NEXT:  .LBB61_454: # %else1702
3512; CHECK-RV32-NEXT:    slli a3, a2, 20
3513; CHECK-RV32-NEXT:    bgez a3, .LBB61_455
3514; CHECK-RV32-NEXT:    j .LBB61_944
3515; CHECK-RV32-NEXT:  .LBB61_455: # %else1706
3516; CHECK-RV32-NEXT:    slli a3, a2, 19
3517; CHECK-RV32-NEXT:    bgez a3, .LBB61_456
3518; CHECK-RV32-NEXT:    j .LBB61_945
3519; CHECK-RV32-NEXT:  .LBB61_456: # %else1710
3520; CHECK-RV32-NEXT:    slli a3, a2, 18
3521; CHECK-RV32-NEXT:    bgez a3, .LBB61_457
3522; CHECK-RV32-NEXT:    j .LBB61_946
3523; CHECK-RV32-NEXT:  .LBB61_457: # %else1714
3524; CHECK-RV32-NEXT:    slli a3, a2, 17
3525; CHECK-RV32-NEXT:    bgez a3, .LBB61_458
3526; CHECK-RV32-NEXT:    j .LBB61_947
3527; CHECK-RV32-NEXT:  .LBB61_458: # %else1718
3528; CHECK-RV32-NEXT:    slli a3, a2, 16
3529; CHECK-RV32-NEXT:    bgez a3, .LBB61_459
3530; CHECK-RV32-NEXT:    j .LBB61_948
3531; CHECK-RV32-NEXT:  .LBB61_459: # %else1722
3532; CHECK-RV32-NEXT:    slli a3, a2, 15
3533; CHECK-RV32-NEXT:    bgez a3, .LBB61_460
3534; CHECK-RV32-NEXT:    j .LBB61_949
3535; CHECK-RV32-NEXT:  .LBB61_460: # %else1726
3536; CHECK-RV32-NEXT:    slli a3, a2, 14
3537; CHECK-RV32-NEXT:    bgez a3, .LBB61_461
3538; CHECK-RV32-NEXT:    j .LBB61_950
3539; CHECK-RV32-NEXT:  .LBB61_461: # %else1730
3540; CHECK-RV32-NEXT:    slli a3, a2, 13
3541; CHECK-RV32-NEXT:    bgez a3, .LBB61_462
3542; CHECK-RV32-NEXT:    j .LBB61_951
3543; CHECK-RV32-NEXT:  .LBB61_462: # %else1734
3544; CHECK-RV32-NEXT:    slli a3, a2, 12
3545; CHECK-RV32-NEXT:    bgez a3, .LBB61_463
3546; CHECK-RV32-NEXT:    j .LBB61_952
3547; CHECK-RV32-NEXT:  .LBB61_463: # %else1738
3548; CHECK-RV32-NEXT:    slli a3, a2, 11
3549; CHECK-RV32-NEXT:    bgez a3, .LBB61_464
3550; CHECK-RV32-NEXT:    j .LBB61_953
3551; CHECK-RV32-NEXT:  .LBB61_464: # %else1742
3552; CHECK-RV32-NEXT:    slli a3, a2, 10
3553; CHECK-RV32-NEXT:    bgez a3, .LBB61_465
3554; CHECK-RV32-NEXT:    j .LBB61_954
3555; CHECK-RV32-NEXT:  .LBB61_465: # %else1746
3556; CHECK-RV32-NEXT:    slli a3, a2, 9
3557; CHECK-RV32-NEXT:    bgez a3, .LBB61_466
3558; CHECK-RV32-NEXT:    j .LBB61_955
3559; CHECK-RV32-NEXT:  .LBB61_466: # %else1750
3560; CHECK-RV32-NEXT:    slli a3, a2, 8
3561; CHECK-RV32-NEXT:    bgez a3, .LBB61_467
3562; CHECK-RV32-NEXT:    j .LBB61_956
3563; CHECK-RV32-NEXT:  .LBB61_467: # %else1754
3564; CHECK-RV32-NEXT:    slli a3, a2, 7
3565; CHECK-RV32-NEXT:    bgez a3, .LBB61_468
3566; CHECK-RV32-NEXT:    j .LBB61_957
3567; CHECK-RV32-NEXT:  .LBB61_468: # %else1758
3568; CHECK-RV32-NEXT:    slli a3, a2, 6
3569; CHECK-RV32-NEXT:    bgez a3, .LBB61_469
3570; CHECK-RV32-NEXT:    j .LBB61_958
3571; CHECK-RV32-NEXT:  .LBB61_469: # %else1762
3572; CHECK-RV32-NEXT:    slli a3, a2, 5
3573; CHECK-RV32-NEXT:    bgez a3, .LBB61_470
3574; CHECK-RV32-NEXT:    j .LBB61_959
3575; CHECK-RV32-NEXT:  .LBB61_470: # %else1766
3576; CHECK-RV32-NEXT:    slli a3, a2, 4
3577; CHECK-RV32-NEXT:    bgez a3, .LBB61_471
3578; CHECK-RV32-NEXT:    j .LBB61_960
3579; CHECK-RV32-NEXT:  .LBB61_471: # %else1770
3580; CHECK-RV32-NEXT:    slli a3, a2, 3
3581; CHECK-RV32-NEXT:    bgez a3, .LBB61_472
3582; CHECK-RV32-NEXT:    j .LBB61_961
3583; CHECK-RV32-NEXT:  .LBB61_472: # %else1774
3584; CHECK-RV32-NEXT:    slli a3, a2, 2
3585; CHECK-RV32-NEXT:    bgez a3, .LBB61_474
3586; CHECK-RV32-NEXT:  .LBB61_473: # %cond.load1777
3587; CHECK-RV32-NEXT:    lbu a3, 0(a0)
3588; CHECK-RV32-NEXT:    li a4, 512
3589; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
3590; CHECK-RV32-NEXT:    vmv.s.x v16, a3
3591; CHECK-RV32-NEXT:    li a3, 446
3592; CHECK-RV32-NEXT:    li a4, 445
3593; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
3594; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
3595; CHECK-RV32-NEXT:    addi a0, a0, 1
3596; CHECK-RV32-NEXT:  .LBB61_474: # %else1778
3597; CHECK-RV32-NEXT:    slli a3, a2, 1
3598; CHECK-RV32-NEXT:    vsetivli zero, 1, e64, m1, ta, ma
3599; CHECK-RV32-NEXT:    vslidedown.vi v16, v0, 7
3600; CHECK-RV32-NEXT:    bgez a3, .LBB61_476
3601; CHECK-RV32-NEXT:  # %bb.475: # %cond.load1781
3602; CHECK-RV32-NEXT:    lbu a3, 0(a0)
3603; CHECK-RV32-NEXT:    vmv.s.x v24, a3
3604; CHECK-RV32-NEXT:    li a3, 447
3605; CHECK-RV32-NEXT:    li a4, 446
3606; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
3607; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
3608; CHECK-RV32-NEXT:    addi a0, a0, 1
3609; CHECK-RV32-NEXT:  .LBB61_476: # %else1782
3610; CHECK-RV32-NEXT:    vsetivli zero, 1, e64, m1, ta, ma
3611; CHECK-RV32-NEXT:    vmv.x.s a3, v16
3612; CHECK-RV32-NEXT:    bgez a2, .LBB61_477
3613; CHECK-RV32-NEXT:    j .LBB61_962
3614; CHECK-RV32-NEXT:  .LBB61_477: # %else1786
3615; CHECK-RV32-NEXT:    andi a2, a3, 1
3616; CHECK-RV32-NEXT:    beqz a2, .LBB61_478
3617; CHECK-RV32-NEXT:    j .LBB61_963
3618; CHECK-RV32-NEXT:  .LBB61_478: # %else1790
3619; CHECK-RV32-NEXT:    andi a2, a3, 2
3620; CHECK-RV32-NEXT:    beqz a2, .LBB61_479
3621; CHECK-RV32-NEXT:    j .LBB61_964
3622; CHECK-RV32-NEXT:  .LBB61_479: # %else1794
3623; CHECK-RV32-NEXT:    andi a2, a3, 4
3624; CHECK-RV32-NEXT:    beqz a2, .LBB61_480
3625; CHECK-RV32-NEXT:    j .LBB61_965
3626; CHECK-RV32-NEXT:  .LBB61_480: # %else1798
3627; CHECK-RV32-NEXT:    andi a2, a3, 8
3628; CHECK-RV32-NEXT:    beqz a2, .LBB61_481
3629; CHECK-RV32-NEXT:    j .LBB61_966
3630; CHECK-RV32-NEXT:  .LBB61_481: # %else1802
3631; CHECK-RV32-NEXT:    andi a2, a3, 16
3632; CHECK-RV32-NEXT:    beqz a2, .LBB61_482
3633; CHECK-RV32-NEXT:    j .LBB61_967
3634; CHECK-RV32-NEXT:  .LBB61_482: # %else1806
3635; CHECK-RV32-NEXT:    andi a2, a3, 32
3636; CHECK-RV32-NEXT:    beqz a2, .LBB61_483
3637; CHECK-RV32-NEXT:    j .LBB61_968
3638; CHECK-RV32-NEXT:  .LBB61_483: # %else1810
3639; CHECK-RV32-NEXT:    andi a2, a3, 64
3640; CHECK-RV32-NEXT:    beqz a2, .LBB61_484
3641; CHECK-RV32-NEXT:    j .LBB61_969
3642; CHECK-RV32-NEXT:  .LBB61_484: # %else1814
3643; CHECK-RV32-NEXT:    andi a2, a3, 128
3644; CHECK-RV32-NEXT:    beqz a2, .LBB61_485
3645; CHECK-RV32-NEXT:    j .LBB61_970
3646; CHECK-RV32-NEXT:  .LBB61_485: # %else1818
3647; CHECK-RV32-NEXT:    andi a2, a3, 256
3648; CHECK-RV32-NEXT:    beqz a2, .LBB61_486
3649; CHECK-RV32-NEXT:    j .LBB61_971
3650; CHECK-RV32-NEXT:  .LBB61_486: # %else1822
3651; CHECK-RV32-NEXT:    andi a2, a3, 512
3652; CHECK-RV32-NEXT:    beqz a2, .LBB61_487
3653; CHECK-RV32-NEXT:    j .LBB61_972
3654; CHECK-RV32-NEXT:  .LBB61_487: # %else1826
3655; CHECK-RV32-NEXT:    andi a2, a3, 1024
3656; CHECK-RV32-NEXT:    beqz a2, .LBB61_488
3657; CHECK-RV32-NEXT:    j .LBB61_973
3658; CHECK-RV32-NEXT:  .LBB61_488: # %else1830
3659; CHECK-RV32-NEXT:    slli a2, a3, 20
3660; CHECK-RV32-NEXT:    bgez a2, .LBB61_489
3661; CHECK-RV32-NEXT:    j .LBB61_974
3662; CHECK-RV32-NEXT:  .LBB61_489: # %else1834
3663; CHECK-RV32-NEXT:    slli a2, a3, 19
3664; CHECK-RV32-NEXT:    bgez a2, .LBB61_490
3665; CHECK-RV32-NEXT:    j .LBB61_975
3666; CHECK-RV32-NEXT:  .LBB61_490: # %else1838
3667; CHECK-RV32-NEXT:    slli a2, a3, 18
3668; CHECK-RV32-NEXT:    bgez a2, .LBB61_491
3669; CHECK-RV32-NEXT:    j .LBB61_976
3670; CHECK-RV32-NEXT:  .LBB61_491: # %else1842
3671; CHECK-RV32-NEXT:    slli a2, a3, 17
3672; CHECK-RV32-NEXT:    bgez a2, .LBB61_492
3673; CHECK-RV32-NEXT:    j .LBB61_977
3674; CHECK-RV32-NEXT:  .LBB61_492: # %else1846
3675; CHECK-RV32-NEXT:    slli a2, a3, 16
3676; CHECK-RV32-NEXT:    bgez a2, .LBB61_493
3677; CHECK-RV32-NEXT:    j .LBB61_978
3678; CHECK-RV32-NEXT:  .LBB61_493: # %else1850
3679; CHECK-RV32-NEXT:    slli a2, a3, 15
3680; CHECK-RV32-NEXT:    bgez a2, .LBB61_494
3681; CHECK-RV32-NEXT:    j .LBB61_979
3682; CHECK-RV32-NEXT:  .LBB61_494: # %else1854
3683; CHECK-RV32-NEXT:    slli a2, a3, 14
3684; CHECK-RV32-NEXT:    bgez a2, .LBB61_495
3685; CHECK-RV32-NEXT:    j .LBB61_980
3686; CHECK-RV32-NEXT:  .LBB61_495: # %else1858
3687; CHECK-RV32-NEXT:    slli a2, a3, 13
3688; CHECK-RV32-NEXT:    bgez a2, .LBB61_496
3689; CHECK-RV32-NEXT:    j .LBB61_981
3690; CHECK-RV32-NEXT:  .LBB61_496: # %else1862
3691; CHECK-RV32-NEXT:    slli a2, a3, 12
3692; CHECK-RV32-NEXT:    bgez a2, .LBB61_497
3693; CHECK-RV32-NEXT:    j .LBB61_982
3694; CHECK-RV32-NEXT:  .LBB61_497: # %else1866
3695; CHECK-RV32-NEXT:    slli a2, a3, 11
3696; CHECK-RV32-NEXT:    bgez a2, .LBB61_498
3697; CHECK-RV32-NEXT:    j .LBB61_983
3698; CHECK-RV32-NEXT:  .LBB61_498: # %else1870
3699; CHECK-RV32-NEXT:    slli a2, a3, 10
3700; CHECK-RV32-NEXT:    bgez a2, .LBB61_499
3701; CHECK-RV32-NEXT:    j .LBB61_984
3702; CHECK-RV32-NEXT:  .LBB61_499: # %else1874
3703; CHECK-RV32-NEXT:    slli a2, a3, 9
3704; CHECK-RV32-NEXT:    bgez a2, .LBB61_500
3705; CHECK-RV32-NEXT:    j .LBB61_985
3706; CHECK-RV32-NEXT:  .LBB61_500: # %else1878
3707; CHECK-RV32-NEXT:    slli a2, a3, 8
3708; CHECK-RV32-NEXT:    bgez a2, .LBB61_501
3709; CHECK-RV32-NEXT:    j .LBB61_986
3710; CHECK-RV32-NEXT:  .LBB61_501: # %else1882
3711; CHECK-RV32-NEXT:    slli a2, a3, 7
3712; CHECK-RV32-NEXT:    bgez a2, .LBB61_502
3713; CHECK-RV32-NEXT:    j .LBB61_987
3714; CHECK-RV32-NEXT:  .LBB61_502: # %else1886
3715; CHECK-RV32-NEXT:    slli a2, a3, 6
3716; CHECK-RV32-NEXT:    bgez a2, .LBB61_503
3717; CHECK-RV32-NEXT:    j .LBB61_988
3718; CHECK-RV32-NEXT:  .LBB61_503: # %else1890
3719; CHECK-RV32-NEXT:    slli a2, a3, 5
3720; CHECK-RV32-NEXT:    bgez a2, .LBB61_504
3721; CHECK-RV32-NEXT:    j .LBB61_989
3722; CHECK-RV32-NEXT:  .LBB61_504: # %else1894
3723; CHECK-RV32-NEXT:    slli a2, a3, 4
3724; CHECK-RV32-NEXT:    bgez a2, .LBB61_505
3725; CHECK-RV32-NEXT:    j .LBB61_990
3726; CHECK-RV32-NEXT:  .LBB61_505: # %else1898
3727; CHECK-RV32-NEXT:    slli a2, a3, 3
3728; CHECK-RV32-NEXT:    bgez a2, .LBB61_506
3729; CHECK-RV32-NEXT:    j .LBB61_991
3730; CHECK-RV32-NEXT:  .LBB61_506: # %else1902
3731; CHECK-RV32-NEXT:    slli a2, a3, 2
3732; CHECK-RV32-NEXT:    bgez a2, .LBB61_508
3733; CHECK-RV32-NEXT:  .LBB61_507: # %cond.load1905
3734; CHECK-RV32-NEXT:    lbu a2, 0(a0)
3735; CHECK-RV32-NEXT:    li a4, 512
3736; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
3737; CHECK-RV32-NEXT:    vmv.s.x v24, a2
3738; CHECK-RV32-NEXT:    li a2, 478
3739; CHECK-RV32-NEXT:    li a4, 477
3740; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
3741; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
3742; CHECK-RV32-NEXT:    addi a0, a0, 1
3743; CHECK-RV32-NEXT:  .LBB61_508: # %else1906
3744; CHECK-RV32-NEXT:    slli a2, a3, 1
3745; CHECK-RV32-NEXT:    vsetivli zero, 1, e64, m1, ta, ma
3746; CHECK-RV32-NEXT:    vsrl.vx v16, v16, a1
3747; CHECK-RV32-NEXT:    bgez a2, .LBB61_510
3748; CHECK-RV32-NEXT:  # %bb.509: # %cond.load1909
3749; CHECK-RV32-NEXT:    lbu a1, 0(a0)
3750; CHECK-RV32-NEXT:    vmv.s.x v24, a1
3751; CHECK-RV32-NEXT:    li a1, 479
3752; CHECK-RV32-NEXT:    li a2, 478
3753; CHECK-RV32-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
3754; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a2
3755; CHECK-RV32-NEXT:    addi a0, a0, 1
3756; CHECK-RV32-NEXT:  .LBB61_510: # %else1910
3757; CHECK-RV32-NEXT:    vsetivli zero, 1, e64, m1, ta, ma
3758; CHECK-RV32-NEXT:    vmv.x.s a1, v16
3759; CHECK-RV32-NEXT:    bgez a3, .LBB61_511
3760; CHECK-RV32-NEXT:    j .LBB61_992
3761; CHECK-RV32-NEXT:  .LBB61_511: # %else1914
3762; CHECK-RV32-NEXT:    andi a2, a1, 1
3763; CHECK-RV32-NEXT:    beqz a2, .LBB61_512
3764; CHECK-RV32-NEXT:    j .LBB61_993
3765; CHECK-RV32-NEXT:  .LBB61_512: # %else1918
3766; CHECK-RV32-NEXT:    andi a2, a1, 2
3767; CHECK-RV32-NEXT:    beqz a2, .LBB61_513
3768; CHECK-RV32-NEXT:    j .LBB61_994
3769; CHECK-RV32-NEXT:  .LBB61_513: # %else1922
3770; CHECK-RV32-NEXT:    andi a2, a1, 4
3771; CHECK-RV32-NEXT:    beqz a2, .LBB61_514
3772; CHECK-RV32-NEXT:    j .LBB61_995
3773; CHECK-RV32-NEXT:  .LBB61_514: # %else1926
3774; CHECK-RV32-NEXT:    andi a2, a1, 8
3775; CHECK-RV32-NEXT:    beqz a2, .LBB61_515
3776; CHECK-RV32-NEXT:    j .LBB61_996
3777; CHECK-RV32-NEXT:  .LBB61_515: # %else1930
3778; CHECK-RV32-NEXT:    andi a2, a1, 16
3779; CHECK-RV32-NEXT:    beqz a2, .LBB61_516
3780; CHECK-RV32-NEXT:    j .LBB61_997
3781; CHECK-RV32-NEXT:  .LBB61_516: # %else1934
3782; CHECK-RV32-NEXT:    andi a2, a1, 32
3783; CHECK-RV32-NEXT:    beqz a2, .LBB61_517
3784; CHECK-RV32-NEXT:    j .LBB61_998
3785; CHECK-RV32-NEXT:  .LBB61_517: # %else1938
3786; CHECK-RV32-NEXT:    andi a2, a1, 64
3787; CHECK-RV32-NEXT:    beqz a2, .LBB61_518
3788; CHECK-RV32-NEXT:    j .LBB61_999
3789; CHECK-RV32-NEXT:  .LBB61_518: # %else1942
3790; CHECK-RV32-NEXT:    andi a2, a1, 128
3791; CHECK-RV32-NEXT:    beqz a2, .LBB61_519
3792; CHECK-RV32-NEXT:    j .LBB61_1000
3793; CHECK-RV32-NEXT:  .LBB61_519: # %else1946
3794; CHECK-RV32-NEXT:    andi a2, a1, 256
3795; CHECK-RV32-NEXT:    beqz a2, .LBB61_520
3796; CHECK-RV32-NEXT:    j .LBB61_1001
3797; CHECK-RV32-NEXT:  .LBB61_520: # %else1950
3798; CHECK-RV32-NEXT:    andi a2, a1, 512
3799; CHECK-RV32-NEXT:    beqz a2, .LBB61_521
3800; CHECK-RV32-NEXT:    j .LBB61_1002
3801; CHECK-RV32-NEXT:  .LBB61_521: # %else1954
3802; CHECK-RV32-NEXT:    andi a2, a1, 1024
3803; CHECK-RV32-NEXT:    beqz a2, .LBB61_522
3804; CHECK-RV32-NEXT:    j .LBB61_1003
3805; CHECK-RV32-NEXT:  .LBB61_522: # %else1958
3806; CHECK-RV32-NEXT:    slli a2, a1, 20
3807; CHECK-RV32-NEXT:    bgez a2, .LBB61_523
3808; CHECK-RV32-NEXT:    j .LBB61_1004
3809; CHECK-RV32-NEXT:  .LBB61_523: # %else1962
3810; CHECK-RV32-NEXT:    slli a2, a1, 19
3811; CHECK-RV32-NEXT:    bgez a2, .LBB61_524
3812; CHECK-RV32-NEXT:    j .LBB61_1005
3813; CHECK-RV32-NEXT:  .LBB61_524: # %else1966
3814; CHECK-RV32-NEXT:    slli a2, a1, 18
3815; CHECK-RV32-NEXT:    bgez a2, .LBB61_525
3816; CHECK-RV32-NEXT:    j .LBB61_1006
3817; CHECK-RV32-NEXT:  .LBB61_525: # %else1970
3818; CHECK-RV32-NEXT:    slli a2, a1, 17
3819; CHECK-RV32-NEXT:    bgez a2, .LBB61_526
3820; CHECK-RV32-NEXT:    j .LBB61_1007
3821; CHECK-RV32-NEXT:  .LBB61_526: # %else1974
3822; CHECK-RV32-NEXT:    slli a2, a1, 16
3823; CHECK-RV32-NEXT:    bgez a2, .LBB61_527
3824; CHECK-RV32-NEXT:    j .LBB61_1008
3825; CHECK-RV32-NEXT:  .LBB61_527: # %else1978
3826; CHECK-RV32-NEXT:    slli a2, a1, 15
3827; CHECK-RV32-NEXT:    bgez a2, .LBB61_528
3828; CHECK-RV32-NEXT:    j .LBB61_1009
3829; CHECK-RV32-NEXT:  .LBB61_528: # %else1982
3830; CHECK-RV32-NEXT:    slli a2, a1, 14
3831; CHECK-RV32-NEXT:    bgez a2, .LBB61_529
3832; CHECK-RV32-NEXT:    j .LBB61_1010
3833; CHECK-RV32-NEXT:  .LBB61_529: # %else1986
3834; CHECK-RV32-NEXT:    slli a2, a1, 13
3835; CHECK-RV32-NEXT:    bgez a2, .LBB61_530
3836; CHECK-RV32-NEXT:    j .LBB61_1011
3837; CHECK-RV32-NEXT:  .LBB61_530: # %else1990
3838; CHECK-RV32-NEXT:    slli a2, a1, 12
3839; CHECK-RV32-NEXT:    bgez a2, .LBB61_531
3840; CHECK-RV32-NEXT:    j .LBB61_1012
3841; CHECK-RV32-NEXT:  .LBB61_531: # %else1994
3842; CHECK-RV32-NEXT:    slli a2, a1, 11
3843; CHECK-RV32-NEXT:    bgez a2, .LBB61_532
3844; CHECK-RV32-NEXT:    j .LBB61_1013
3845; CHECK-RV32-NEXT:  .LBB61_532: # %else1998
3846; CHECK-RV32-NEXT:    slli a2, a1, 10
3847; CHECK-RV32-NEXT:    bgez a2, .LBB61_533
3848; CHECK-RV32-NEXT:    j .LBB61_1014
3849; CHECK-RV32-NEXT:  .LBB61_533: # %else2002
3850; CHECK-RV32-NEXT:    slli a2, a1, 9
3851; CHECK-RV32-NEXT:    bgez a2, .LBB61_534
3852; CHECK-RV32-NEXT:    j .LBB61_1015
3853; CHECK-RV32-NEXT:  .LBB61_534: # %else2006
3854; CHECK-RV32-NEXT:    slli a2, a1, 8
3855; CHECK-RV32-NEXT:    bgez a2, .LBB61_535
3856; CHECK-RV32-NEXT:    j .LBB61_1016
3857; CHECK-RV32-NEXT:  .LBB61_535: # %else2010
3858; CHECK-RV32-NEXT:    slli a2, a1, 7
3859; CHECK-RV32-NEXT:    bgez a2, .LBB61_536
3860; CHECK-RV32-NEXT:    j .LBB61_1017
3861; CHECK-RV32-NEXT:  .LBB61_536: # %else2014
3862; CHECK-RV32-NEXT:    slli a2, a1, 6
3863; CHECK-RV32-NEXT:    bgez a2, .LBB61_537
3864; CHECK-RV32-NEXT:    j .LBB61_1018
3865; CHECK-RV32-NEXT:  .LBB61_537: # %else2018
3866; CHECK-RV32-NEXT:    slli a2, a1, 5
3867; CHECK-RV32-NEXT:    bgez a2, .LBB61_538
3868; CHECK-RV32-NEXT:    j .LBB61_1019
3869; CHECK-RV32-NEXT:  .LBB61_538: # %else2022
3870; CHECK-RV32-NEXT:    slli a2, a1, 4
3871; CHECK-RV32-NEXT:    bgez a2, .LBB61_539
3872; CHECK-RV32-NEXT:    j .LBB61_1020
3873; CHECK-RV32-NEXT:  .LBB61_539: # %else2026
3874; CHECK-RV32-NEXT:    slli a2, a1, 3
3875; CHECK-RV32-NEXT:    bgez a2, .LBB61_540
3876; CHECK-RV32-NEXT:    j .LBB61_1021
3877; CHECK-RV32-NEXT:  .LBB61_540: # %else2030
3878; CHECK-RV32-NEXT:    slli a2, a1, 2
3879; CHECK-RV32-NEXT:    bgez a2, .LBB61_541
3880; CHECK-RV32-NEXT:    j .LBB61_1022
3881; CHECK-RV32-NEXT:  .LBB61_541: # %else2034
3882; CHECK-RV32-NEXT:    slli a2, a1, 1
3883; CHECK-RV32-NEXT:    bgez a2, .LBB61_542
3884; CHECK-RV32-NEXT:    j .LBB61_1023
3885; CHECK-RV32-NEXT:  .LBB61_542: # %else2038
3886; CHECK-RV32-NEXT:    bgez a1, .LBB61_543
3887; CHECK-RV32-NEXT:    j .LBB61_1024
3888; CHECK-RV32-NEXT:  .LBB61_543: # %else2042
3889; CHECK-RV32-NEXT:    ret
3890; CHECK-RV32-NEXT:  .LBB61_544: # %cond.load
3891; CHECK-RV32-NEXT:    lbu a1, 0(a0)
3892; CHECK-RV32-NEXT:    vmv8r.v v16, v8
3893; CHECK-RV32-NEXT:    vsetvli zero, zero, e8, mf8, tu, ma
3894; CHECK-RV32-NEXT:    vmv.s.x v8, a1
3895; CHECK-RV32-NEXT:    addi a0, a0, 1
3896; CHECK-RV32-NEXT:    vmv1r.v v16, v8
3897; CHECK-RV32-NEXT:    vmv8r.v v8, v16
3898; CHECK-RV32-NEXT:    andi a1, a3, 2
3899; CHECK-RV32-NEXT:    bnez a1, .LBB61_545
3900; CHECK-RV32-NEXT:    j .LBB61_2
3901; CHECK-RV32-NEXT:  .LBB61_545: # %cond.load1
3902; CHECK-RV32-NEXT:    lbu a1, 0(a0)
3903; CHECK-RV32-NEXT:    vsetivli zero, 2, e8, m1, tu, ma
3904; CHECK-RV32-NEXT:    vmv8r.v v16, v8
3905; CHECK-RV32-NEXT:    vmv.s.x v9, a1
3906; CHECK-RV32-NEXT:    vslideup.vi v8, v9, 1
3907; CHECK-RV32-NEXT:    addi a0, a0, 1
3908; CHECK-RV32-NEXT:    vmv1r.v v16, v8
3909; CHECK-RV32-NEXT:    vmv8r.v v8, v16
3910; CHECK-RV32-NEXT:    andi a1, a3, 4
3911; CHECK-RV32-NEXT:    bnez a1, .LBB61_546
3912; CHECK-RV32-NEXT:    j .LBB61_3
3913; CHECK-RV32-NEXT:  .LBB61_546: # %cond.load5
3914; CHECK-RV32-NEXT:    lbu a1, 0(a0)
3915; CHECK-RV32-NEXT:    vsetivli zero, 3, e8, m1, tu, ma
3916; CHECK-RV32-NEXT:    vmv8r.v v16, v8
3917; CHECK-RV32-NEXT:    vmv.s.x v9, a1
3918; CHECK-RV32-NEXT:    vslideup.vi v8, v9, 2
3919; CHECK-RV32-NEXT:    addi a0, a0, 1
3920; CHECK-RV32-NEXT:    vmv1r.v v16, v8
3921; CHECK-RV32-NEXT:    vmv8r.v v8, v16
3922; CHECK-RV32-NEXT:    andi a1, a3, 8
3923; CHECK-RV32-NEXT:    bnez a1, .LBB61_547
3924; CHECK-RV32-NEXT:    j .LBB61_4
3925; CHECK-RV32-NEXT:  .LBB61_547: # %cond.load9
3926; CHECK-RV32-NEXT:    lbu a1, 0(a0)
3927; CHECK-RV32-NEXT:    vsetivli zero, 4, e8, m1, tu, ma
3928; CHECK-RV32-NEXT:    vmv8r.v v16, v8
3929; CHECK-RV32-NEXT:    vmv.s.x v9, a1
3930; CHECK-RV32-NEXT:    vslideup.vi v8, v9, 3
3931; CHECK-RV32-NEXT:    addi a0, a0, 1
3932; CHECK-RV32-NEXT:    vmv1r.v v16, v8
3933; CHECK-RV32-NEXT:    vmv8r.v v8, v16
3934; CHECK-RV32-NEXT:    andi a1, a3, 16
3935; CHECK-RV32-NEXT:    bnez a1, .LBB61_548
3936; CHECK-RV32-NEXT:    j .LBB61_5
3937; CHECK-RV32-NEXT:  .LBB61_548: # %cond.load13
3938; CHECK-RV32-NEXT:    lbu a1, 0(a0)
3939; CHECK-RV32-NEXT:    vsetivli zero, 5, e8, m1, tu, ma
3940; CHECK-RV32-NEXT:    vmv8r.v v16, v8
3941; CHECK-RV32-NEXT:    vmv.s.x v9, a1
3942; CHECK-RV32-NEXT:    vslideup.vi v8, v9, 4
3943; CHECK-RV32-NEXT:    addi a0, a0, 1
3944; CHECK-RV32-NEXT:    vmv1r.v v16, v8
3945; CHECK-RV32-NEXT:    vmv8r.v v8, v16
3946; CHECK-RV32-NEXT:    andi a1, a3, 32
3947; CHECK-RV32-NEXT:    bnez a1, .LBB61_549
3948; CHECK-RV32-NEXT:    j .LBB61_6
3949; CHECK-RV32-NEXT:  .LBB61_549: # %cond.load17
3950; CHECK-RV32-NEXT:    lbu a1, 0(a0)
3951; CHECK-RV32-NEXT:    vsetivli zero, 6, e8, m1, tu, ma
3952; CHECK-RV32-NEXT:    vmv8r.v v16, v8
3953; CHECK-RV32-NEXT:    vmv.s.x v9, a1
3954; CHECK-RV32-NEXT:    vslideup.vi v8, v9, 5
3955; CHECK-RV32-NEXT:    addi a0, a0, 1
3956; CHECK-RV32-NEXT:    vmv1r.v v16, v8
3957; CHECK-RV32-NEXT:    vmv8r.v v8, v16
3958; CHECK-RV32-NEXT:    andi a1, a3, 64
3959; CHECK-RV32-NEXT:    bnez a1, .LBB61_550
3960; CHECK-RV32-NEXT:    j .LBB61_7
3961; CHECK-RV32-NEXT:  .LBB61_550: # %cond.load21
3962; CHECK-RV32-NEXT:    lbu a1, 0(a0)
3963; CHECK-RV32-NEXT:    vsetivli zero, 7, e8, m1, tu, ma
3964; CHECK-RV32-NEXT:    vmv8r.v v16, v8
3965; CHECK-RV32-NEXT:    vmv.s.x v9, a1
3966; CHECK-RV32-NEXT:    vslideup.vi v8, v9, 6
3967; CHECK-RV32-NEXT:    addi a0, a0, 1
3968; CHECK-RV32-NEXT:    vmv1r.v v16, v8
3969; CHECK-RV32-NEXT:    vmv8r.v v8, v16
3970; CHECK-RV32-NEXT:    andi a1, a3, 128
3971; CHECK-RV32-NEXT:    bnez a1, .LBB61_551
3972; CHECK-RV32-NEXT:    j .LBB61_8
3973; CHECK-RV32-NEXT:  .LBB61_551: # %cond.load25
3974; CHECK-RV32-NEXT:    lbu a1, 0(a0)
3975; CHECK-RV32-NEXT:    vsetivli zero, 8, e8, m1, tu, ma
3976; CHECK-RV32-NEXT:    vmv8r.v v16, v8
3977; CHECK-RV32-NEXT:    vmv.s.x v9, a1
3978; CHECK-RV32-NEXT:    vslideup.vi v8, v9, 7
3979; CHECK-RV32-NEXT:    addi a0, a0, 1
3980; CHECK-RV32-NEXT:    vmv1r.v v16, v8
3981; CHECK-RV32-NEXT:    vmv8r.v v8, v16
3982; CHECK-RV32-NEXT:    andi a1, a3, 256
3983; CHECK-RV32-NEXT:    bnez a1, .LBB61_552
3984; CHECK-RV32-NEXT:    j .LBB61_9
3985; CHECK-RV32-NEXT:  .LBB61_552: # %cond.load29
3986; CHECK-RV32-NEXT:    lbu a1, 0(a0)
3987; CHECK-RV32-NEXT:    vsetivli zero, 9, e8, m1, tu, ma
3988; CHECK-RV32-NEXT:    vmv8r.v v16, v8
3989; CHECK-RV32-NEXT:    vmv.s.x v9, a1
3990; CHECK-RV32-NEXT:    vslideup.vi v8, v9, 8
3991; CHECK-RV32-NEXT:    addi a0, a0, 1
3992; CHECK-RV32-NEXT:    vmv1r.v v16, v8
3993; CHECK-RV32-NEXT:    vmv8r.v v8, v16
3994; CHECK-RV32-NEXT:    andi a1, a3, 512
3995; CHECK-RV32-NEXT:    bnez a1, .LBB61_553
3996; CHECK-RV32-NEXT:    j .LBB61_10
3997; CHECK-RV32-NEXT:  .LBB61_553: # %cond.load33
3998; CHECK-RV32-NEXT:    lbu a1, 0(a0)
3999; CHECK-RV32-NEXT:    vsetivli zero, 10, e8, m1, tu, ma
4000; CHECK-RV32-NEXT:    vmv8r.v v16, v8
4001; CHECK-RV32-NEXT:    vmv.s.x v9, a1
4002; CHECK-RV32-NEXT:    vslideup.vi v8, v9, 9
4003; CHECK-RV32-NEXT:    addi a0, a0, 1
4004; CHECK-RV32-NEXT:    vmv1r.v v16, v8
4005; CHECK-RV32-NEXT:    vmv8r.v v8, v16
4006; CHECK-RV32-NEXT:    andi a1, a3, 1024
4007; CHECK-RV32-NEXT:    bnez a1, .LBB61_554
4008; CHECK-RV32-NEXT:    j .LBB61_11
4009; CHECK-RV32-NEXT:  .LBB61_554: # %cond.load37
4010; CHECK-RV32-NEXT:    lbu a1, 0(a0)
4011; CHECK-RV32-NEXT:    vsetivli zero, 11, e8, m1, tu, ma
4012; CHECK-RV32-NEXT:    vmv8r.v v16, v8
4013; CHECK-RV32-NEXT:    vmv.s.x v9, a1
4014; CHECK-RV32-NEXT:    vslideup.vi v8, v9, 10
4015; CHECK-RV32-NEXT:    addi a0, a0, 1
4016; CHECK-RV32-NEXT:    vmv1r.v v16, v8
4017; CHECK-RV32-NEXT:    vmv8r.v v8, v16
4018; CHECK-RV32-NEXT:    slli a1, a3, 20
4019; CHECK-RV32-NEXT:    bltz a1, .LBB61_555
4020; CHECK-RV32-NEXT:    j .LBB61_12
4021; CHECK-RV32-NEXT:  .LBB61_555: # %cond.load41
4022; CHECK-RV32-NEXT:    lbu a1, 0(a0)
4023; CHECK-RV32-NEXT:    vsetivli zero, 12, e8, m1, tu, ma
4024; CHECK-RV32-NEXT:    vmv8r.v v16, v8
4025; CHECK-RV32-NEXT:    vmv.s.x v9, a1
4026; CHECK-RV32-NEXT:    vslideup.vi v8, v9, 11
4027; CHECK-RV32-NEXT:    addi a0, a0, 1
4028; CHECK-RV32-NEXT:    vmv1r.v v16, v8
4029; CHECK-RV32-NEXT:    vmv8r.v v8, v16
4030; CHECK-RV32-NEXT:    slli a1, a3, 19
4031; CHECK-RV32-NEXT:    bltz a1, .LBB61_556
4032; CHECK-RV32-NEXT:    j .LBB61_13
4033; CHECK-RV32-NEXT:  .LBB61_556: # %cond.load45
4034; CHECK-RV32-NEXT:    lbu a1, 0(a0)
4035; CHECK-RV32-NEXT:    vsetivli zero, 13, e8, m1, tu, ma
4036; CHECK-RV32-NEXT:    vmv8r.v v16, v8
4037; CHECK-RV32-NEXT:    vmv.s.x v9, a1
4038; CHECK-RV32-NEXT:    vslideup.vi v8, v9, 12
4039; CHECK-RV32-NEXT:    addi a0, a0, 1
4040; CHECK-RV32-NEXT:    vmv1r.v v16, v8
4041; CHECK-RV32-NEXT:    vmv8r.v v8, v16
4042; CHECK-RV32-NEXT:    slli a1, a3, 18
4043; CHECK-RV32-NEXT:    bltz a1, .LBB61_557
4044; CHECK-RV32-NEXT:    j .LBB61_14
4045; CHECK-RV32-NEXT:  .LBB61_557: # %cond.load49
4046; CHECK-RV32-NEXT:    lbu a1, 0(a0)
4047; CHECK-RV32-NEXT:    vsetivli zero, 14, e8, m1, tu, ma
4048; CHECK-RV32-NEXT:    vmv8r.v v16, v8
4049; CHECK-RV32-NEXT:    vmv.s.x v9, a1
4050; CHECK-RV32-NEXT:    vslideup.vi v8, v9, 13
4051; CHECK-RV32-NEXT:    addi a0, a0, 1
4052; CHECK-RV32-NEXT:    vmv1r.v v16, v8
4053; CHECK-RV32-NEXT:    vmv8r.v v8, v16
4054; CHECK-RV32-NEXT:    slli a1, a3, 17
4055; CHECK-RV32-NEXT:    bltz a1, .LBB61_558
4056; CHECK-RV32-NEXT:    j .LBB61_15
4057; CHECK-RV32-NEXT:  .LBB61_558: # %cond.load53
4058; CHECK-RV32-NEXT:    lbu a1, 0(a0)
4059; CHECK-RV32-NEXT:    vsetivli zero, 15, e8, m1, tu, ma
4060; CHECK-RV32-NEXT:    vmv8r.v v16, v8
4061; CHECK-RV32-NEXT:    vmv.s.x v9, a1
4062; CHECK-RV32-NEXT:    vslideup.vi v8, v9, 14
4063; CHECK-RV32-NEXT:    addi a0, a0, 1
4064; CHECK-RV32-NEXT:    vmv1r.v v16, v8
4065; CHECK-RV32-NEXT:    vmv8r.v v8, v16
4066; CHECK-RV32-NEXT:    slli a1, a3, 16
4067; CHECK-RV32-NEXT:    bltz a1, .LBB61_559
4068; CHECK-RV32-NEXT:    j .LBB61_16
4069; CHECK-RV32-NEXT:  .LBB61_559: # %cond.load57
4070; CHECK-RV32-NEXT:    lbu a1, 0(a0)
4071; CHECK-RV32-NEXT:    vsetivli zero, 16, e8, m1, tu, ma
4072; CHECK-RV32-NEXT:    vmv8r.v v16, v8
4073; CHECK-RV32-NEXT:    vmv.s.x v9, a1
4074; CHECK-RV32-NEXT:    vslideup.vi v8, v9, 15
4075; CHECK-RV32-NEXT:    addi a0, a0, 1
4076; CHECK-RV32-NEXT:    vmv1r.v v16, v8
4077; CHECK-RV32-NEXT:    vmv8r.v v8, v16
4078; CHECK-RV32-NEXT:    slli a1, a3, 15
4079; CHECK-RV32-NEXT:    bltz a1, .LBB61_560
4080; CHECK-RV32-NEXT:    j .LBB61_17
4081; CHECK-RV32-NEXT:  .LBB61_560: # %cond.load61
4082; CHECK-RV32-NEXT:    lbu a1, 0(a0)
4083; CHECK-RV32-NEXT:    vsetivli zero, 17, e8, m1, tu, ma
4084; CHECK-RV32-NEXT:    vmv8r.v v16, v8
4085; CHECK-RV32-NEXT:    vmv.s.x v9, a1
4086; CHECK-RV32-NEXT:    vslideup.vi v8, v9, 16
4087; CHECK-RV32-NEXT:    addi a0, a0, 1
4088; CHECK-RV32-NEXT:    vmv1r.v v16, v8
4089; CHECK-RV32-NEXT:    vmv8r.v v8, v16
4090; CHECK-RV32-NEXT:    slli a1, a3, 14
4091; CHECK-RV32-NEXT:    bltz a1, .LBB61_561
4092; CHECK-RV32-NEXT:    j .LBB61_18
4093; CHECK-RV32-NEXT:  .LBB61_561: # %cond.load65
4094; CHECK-RV32-NEXT:    lbu a1, 0(a0)
4095; CHECK-RV32-NEXT:    vsetivli zero, 18, e8, m1, tu, ma
4096; CHECK-RV32-NEXT:    vmv8r.v v16, v8
4097; CHECK-RV32-NEXT:    vmv.s.x v9, a1
4098; CHECK-RV32-NEXT:    vslideup.vi v8, v9, 17
4099; CHECK-RV32-NEXT:    addi a0, a0, 1
4100; CHECK-RV32-NEXT:    vmv1r.v v16, v8
4101; CHECK-RV32-NEXT:    vmv8r.v v8, v16
4102; CHECK-RV32-NEXT:    slli a1, a3, 13
4103; CHECK-RV32-NEXT:    bltz a1, .LBB61_562
4104; CHECK-RV32-NEXT:    j .LBB61_19
4105; CHECK-RV32-NEXT:  .LBB61_562: # %cond.load69
4106; CHECK-RV32-NEXT:    lbu a1, 0(a0)
4107; CHECK-RV32-NEXT:    vsetivli zero, 19, e8, m1, tu, ma
4108; CHECK-RV32-NEXT:    vmv8r.v v16, v8
4109; CHECK-RV32-NEXT:    vmv.s.x v9, a1
4110; CHECK-RV32-NEXT:    vslideup.vi v8, v9, 18
4111; CHECK-RV32-NEXT:    addi a0, a0, 1
4112; CHECK-RV32-NEXT:    vmv1r.v v16, v8
4113; CHECK-RV32-NEXT:    vmv8r.v v8, v16
4114; CHECK-RV32-NEXT:    slli a1, a3, 12
4115; CHECK-RV32-NEXT:    bltz a1, .LBB61_563
4116; CHECK-RV32-NEXT:    j .LBB61_20
4117; CHECK-RV32-NEXT:  .LBB61_563: # %cond.load73
4118; CHECK-RV32-NEXT:    lbu a1, 0(a0)
4119; CHECK-RV32-NEXT:    vsetivli zero, 20, e8, m1, tu, ma
4120; CHECK-RV32-NEXT:    vmv8r.v v16, v8
4121; CHECK-RV32-NEXT:    vmv.s.x v9, a1
4122; CHECK-RV32-NEXT:    vslideup.vi v8, v9, 19
4123; CHECK-RV32-NEXT:    addi a0, a0, 1
4124; CHECK-RV32-NEXT:    vmv1r.v v16, v8
4125; CHECK-RV32-NEXT:    vmv8r.v v8, v16
4126; CHECK-RV32-NEXT:    slli a1, a3, 11
4127; CHECK-RV32-NEXT:    bltz a1, .LBB61_564
4128; CHECK-RV32-NEXT:    j .LBB61_21
4129; CHECK-RV32-NEXT:  .LBB61_564: # %cond.load77
4130; CHECK-RV32-NEXT:    lbu a1, 0(a0)
4131; CHECK-RV32-NEXT:    vsetivli zero, 21, e8, m1, tu, ma
4132; CHECK-RV32-NEXT:    vmv8r.v v16, v8
4133; CHECK-RV32-NEXT:    vmv.s.x v9, a1
4134; CHECK-RV32-NEXT:    vslideup.vi v8, v9, 20
4135; CHECK-RV32-NEXT:    addi a0, a0, 1
4136; CHECK-RV32-NEXT:    vmv1r.v v16, v8
4137; CHECK-RV32-NEXT:    vmv8r.v v8, v16
4138; CHECK-RV32-NEXT:    slli a1, a3, 10
4139; CHECK-RV32-NEXT:    bltz a1, .LBB61_565
4140; CHECK-RV32-NEXT:    j .LBB61_22
4141; CHECK-RV32-NEXT:  .LBB61_565: # %cond.load81
4142; CHECK-RV32-NEXT:    lbu a1, 0(a0)
4143; CHECK-RV32-NEXT:    vsetivli zero, 22, e8, m1, tu, ma
4144; CHECK-RV32-NEXT:    vmv8r.v v16, v8
4145; CHECK-RV32-NEXT:    vmv.s.x v9, a1
4146; CHECK-RV32-NEXT:    vslideup.vi v8, v9, 21
4147; CHECK-RV32-NEXT:    addi a0, a0, 1
4148; CHECK-RV32-NEXT:    vmv1r.v v16, v8
4149; CHECK-RV32-NEXT:    vmv8r.v v8, v16
4150; CHECK-RV32-NEXT:    slli a1, a3, 9
4151; CHECK-RV32-NEXT:    bltz a1, .LBB61_566
4152; CHECK-RV32-NEXT:    j .LBB61_23
4153; CHECK-RV32-NEXT:  .LBB61_566: # %cond.load85
4154; CHECK-RV32-NEXT:    lbu a1, 0(a0)
4155; CHECK-RV32-NEXT:    vsetivli zero, 23, e8, m1, tu, ma
4156; CHECK-RV32-NEXT:    vmv8r.v v16, v8
4157; CHECK-RV32-NEXT:    vmv.s.x v9, a1
4158; CHECK-RV32-NEXT:    vslideup.vi v8, v9, 22
4159; CHECK-RV32-NEXT:    addi a0, a0, 1
4160; CHECK-RV32-NEXT:    vmv1r.v v16, v8
4161; CHECK-RV32-NEXT:    vmv8r.v v8, v16
4162; CHECK-RV32-NEXT:    slli a1, a3, 8
4163; CHECK-RV32-NEXT:    bltz a1, .LBB61_567
4164; CHECK-RV32-NEXT:    j .LBB61_24
4165; CHECK-RV32-NEXT:  .LBB61_567: # %cond.load89
4166; CHECK-RV32-NEXT:    lbu a1, 0(a0)
4167; CHECK-RV32-NEXT:    vsetivli zero, 24, e8, m1, tu, ma
4168; CHECK-RV32-NEXT:    vmv8r.v v16, v8
4169; CHECK-RV32-NEXT:    vmv.s.x v9, a1
4170; CHECK-RV32-NEXT:    vslideup.vi v8, v9, 23
4171; CHECK-RV32-NEXT:    addi a0, a0, 1
4172; CHECK-RV32-NEXT:    vmv1r.v v16, v8
4173; CHECK-RV32-NEXT:    vmv8r.v v8, v16
4174; CHECK-RV32-NEXT:    slli a1, a3, 7
4175; CHECK-RV32-NEXT:    bltz a1, .LBB61_568
4176; CHECK-RV32-NEXT:    j .LBB61_25
4177; CHECK-RV32-NEXT:  .LBB61_568: # %cond.load93
4178; CHECK-RV32-NEXT:    lbu a1, 0(a0)
4179; CHECK-RV32-NEXT:    vsetivli zero, 25, e8, m1, tu, ma
4180; CHECK-RV32-NEXT:    vmv8r.v v16, v8
4181; CHECK-RV32-NEXT:    vmv.s.x v9, a1
4182; CHECK-RV32-NEXT:    vslideup.vi v8, v9, 24
4183; CHECK-RV32-NEXT:    addi a0, a0, 1
4184; CHECK-RV32-NEXT:    vmv1r.v v16, v8
4185; CHECK-RV32-NEXT:    vmv8r.v v8, v16
4186; CHECK-RV32-NEXT:    slli a1, a3, 6
4187; CHECK-RV32-NEXT:    bltz a1, .LBB61_569
4188; CHECK-RV32-NEXT:    j .LBB61_26
4189; CHECK-RV32-NEXT:  .LBB61_569: # %cond.load97
4190; CHECK-RV32-NEXT:    lbu a1, 0(a0)
4191; CHECK-RV32-NEXT:    vsetivli zero, 26, e8, m1, tu, ma
4192; CHECK-RV32-NEXT:    vmv8r.v v16, v8
4193; CHECK-RV32-NEXT:    vmv.s.x v9, a1
4194; CHECK-RV32-NEXT:    vslideup.vi v8, v9, 25
4195; CHECK-RV32-NEXT:    addi a0, a0, 1
4196; CHECK-RV32-NEXT:    vmv1r.v v16, v8
4197; CHECK-RV32-NEXT:    vmv8r.v v8, v16
4198; CHECK-RV32-NEXT:    slli a1, a3, 5
4199; CHECK-RV32-NEXT:    bltz a1, .LBB61_570
4200; CHECK-RV32-NEXT:    j .LBB61_27
4201; CHECK-RV32-NEXT:  .LBB61_570: # %cond.load101
4202; CHECK-RV32-NEXT:    lbu a1, 0(a0)
4203; CHECK-RV32-NEXT:    vsetivli zero, 27, e8, m1, tu, ma
4204; CHECK-RV32-NEXT:    vmv8r.v v16, v8
4205; CHECK-RV32-NEXT:    vmv.s.x v9, a1
4206; CHECK-RV32-NEXT:    vslideup.vi v8, v9, 26
4207; CHECK-RV32-NEXT:    addi a0, a0, 1
4208; CHECK-RV32-NEXT:    vmv1r.v v16, v8
4209; CHECK-RV32-NEXT:    vmv8r.v v8, v16
4210; CHECK-RV32-NEXT:    slli a1, a3, 4
4211; CHECK-RV32-NEXT:    bltz a1, .LBB61_571
4212; CHECK-RV32-NEXT:    j .LBB61_28
4213; CHECK-RV32-NEXT:  .LBB61_571: # %cond.load105
4214; CHECK-RV32-NEXT:    lbu a1, 0(a0)
4215; CHECK-RV32-NEXT:    vsetivli zero, 28, e8, m1, tu, ma
4216; CHECK-RV32-NEXT:    vmv8r.v v16, v8
4217; CHECK-RV32-NEXT:    vmv.s.x v9, a1
4218; CHECK-RV32-NEXT:    vslideup.vi v8, v9, 27
4219; CHECK-RV32-NEXT:    addi a0, a0, 1
4220; CHECK-RV32-NEXT:    vmv1r.v v16, v8
4221; CHECK-RV32-NEXT:    vmv8r.v v8, v16
4222; CHECK-RV32-NEXT:    slli a1, a3, 3
4223; CHECK-RV32-NEXT:    bgez a1, .LBB61_1025
4224; CHECK-RV32-NEXT:    j .LBB61_29
4225; CHECK-RV32-NEXT:  .LBB61_1025: # %cond.load105
4226; CHECK-RV32-NEXT:    j .LBB61_30
4227; CHECK-RV32-NEXT:  .LBB61_572: # %cond.load121
4228; CHECK-RV32-NEXT:    lbu a3, 0(a0)
4229; CHECK-RV32-NEXT:    vmv8r.v v16, v8
4230; CHECK-RV32-NEXT:    vmv.s.x v9, a3
4231; CHECK-RV32-NEXT:    li a3, 32
4232; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m1, tu, ma
4233; CHECK-RV32-NEXT:    vslideup.vi v8, v9, 31
4234; CHECK-RV32-NEXT:    addi a0, a0, 1
4235; CHECK-RV32-NEXT:    vmv1r.v v16, v8
4236; CHECK-RV32-NEXT:    vmv8r.v v8, v16
4237; CHECK-RV32-NEXT:    andi a3, a2, 1
4238; CHECK-RV32-NEXT:    bnez a3, .LBB61_573
4239; CHECK-RV32-NEXT:    j .LBB61_36
4240; CHECK-RV32-NEXT:  .LBB61_573: # %cond.load125
4241; CHECK-RV32-NEXT:    lbu a3, 0(a0)
4242; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
4243; CHECK-RV32-NEXT:    vmv8r.v v16, v8
4244; CHECK-RV32-NEXT:    vmv.s.x v9, a3
4245; CHECK-RV32-NEXT:    li a3, 33
4246; CHECK-RV32-NEXT:    li a4, 32
4247; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m1, tu, ma
4248; CHECK-RV32-NEXT:    vslideup.vx v8, v9, a4
4249; CHECK-RV32-NEXT:    addi a0, a0, 1
4250; CHECK-RV32-NEXT:    vmv1r.v v16, v8
4251; CHECK-RV32-NEXT:    vmv8r.v v8, v16
4252; CHECK-RV32-NEXT:    andi a3, a2, 2
4253; CHECK-RV32-NEXT:    bnez a3, .LBB61_574
4254; CHECK-RV32-NEXT:    j .LBB61_37
4255; CHECK-RV32-NEXT:  .LBB61_574: # %cond.load129
4256; CHECK-RV32-NEXT:    lbu a3, 0(a0)
4257; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
4258; CHECK-RV32-NEXT:    vmv8r.v v16, v8
4259; CHECK-RV32-NEXT:    vmv.s.x v9, a3
4260; CHECK-RV32-NEXT:    li a3, 34
4261; CHECK-RV32-NEXT:    li a4, 33
4262; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m1, tu, ma
4263; CHECK-RV32-NEXT:    vslideup.vx v8, v9, a4
4264; CHECK-RV32-NEXT:    addi a0, a0, 1
4265; CHECK-RV32-NEXT:    vmv1r.v v16, v8
4266; CHECK-RV32-NEXT:    vmv8r.v v8, v16
4267; CHECK-RV32-NEXT:    andi a3, a2, 4
4268; CHECK-RV32-NEXT:    bnez a3, .LBB61_575
4269; CHECK-RV32-NEXT:    j .LBB61_38
4270; CHECK-RV32-NEXT:  .LBB61_575: # %cond.load133
4271; CHECK-RV32-NEXT:    lbu a3, 0(a0)
4272; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
4273; CHECK-RV32-NEXT:    vmv8r.v v16, v8
4274; CHECK-RV32-NEXT:    vmv.s.x v9, a3
4275; CHECK-RV32-NEXT:    li a3, 35
4276; CHECK-RV32-NEXT:    li a4, 34
4277; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m1, tu, ma
4278; CHECK-RV32-NEXT:    vslideup.vx v8, v9, a4
4279; CHECK-RV32-NEXT:    addi a0, a0, 1
4280; CHECK-RV32-NEXT:    vmv1r.v v16, v8
4281; CHECK-RV32-NEXT:    vmv8r.v v8, v16
4282; CHECK-RV32-NEXT:    andi a3, a2, 8
4283; CHECK-RV32-NEXT:    bnez a3, .LBB61_576
4284; CHECK-RV32-NEXT:    j .LBB61_39
4285; CHECK-RV32-NEXT:  .LBB61_576: # %cond.load137
4286; CHECK-RV32-NEXT:    lbu a3, 0(a0)
4287; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
4288; CHECK-RV32-NEXT:    vmv8r.v v16, v8
4289; CHECK-RV32-NEXT:    vmv.s.x v9, a3
4290; CHECK-RV32-NEXT:    li a3, 36
4291; CHECK-RV32-NEXT:    li a4, 35
4292; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m1, tu, ma
4293; CHECK-RV32-NEXT:    vslideup.vx v8, v9, a4
4294; CHECK-RV32-NEXT:    addi a0, a0, 1
4295; CHECK-RV32-NEXT:    vmv1r.v v16, v8
4296; CHECK-RV32-NEXT:    vmv8r.v v8, v16
4297; CHECK-RV32-NEXT:    andi a3, a2, 16
4298; CHECK-RV32-NEXT:    bnez a3, .LBB61_577
4299; CHECK-RV32-NEXT:    j .LBB61_40
4300; CHECK-RV32-NEXT:  .LBB61_577: # %cond.load141
4301; CHECK-RV32-NEXT:    lbu a3, 0(a0)
4302; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
4303; CHECK-RV32-NEXT:    vmv8r.v v16, v8
4304; CHECK-RV32-NEXT:    vmv.s.x v9, a3
4305; CHECK-RV32-NEXT:    li a3, 37
4306; CHECK-RV32-NEXT:    li a4, 36
4307; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m1, tu, ma
4308; CHECK-RV32-NEXT:    vslideup.vx v8, v9, a4
4309; CHECK-RV32-NEXT:    addi a0, a0, 1
4310; CHECK-RV32-NEXT:    vmv1r.v v16, v8
4311; CHECK-RV32-NEXT:    vmv8r.v v8, v16
4312; CHECK-RV32-NEXT:    andi a3, a2, 32
4313; CHECK-RV32-NEXT:    bnez a3, .LBB61_578
4314; CHECK-RV32-NEXT:    j .LBB61_41
4315; CHECK-RV32-NEXT:  .LBB61_578: # %cond.load145
4316; CHECK-RV32-NEXT:    lbu a3, 0(a0)
4317; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
4318; CHECK-RV32-NEXT:    vmv8r.v v16, v8
4319; CHECK-RV32-NEXT:    vmv.s.x v9, a3
4320; CHECK-RV32-NEXT:    li a3, 38
4321; CHECK-RV32-NEXT:    li a4, 37
4322; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m1, tu, ma
4323; CHECK-RV32-NEXT:    vslideup.vx v8, v9, a4
4324; CHECK-RV32-NEXT:    addi a0, a0, 1
4325; CHECK-RV32-NEXT:    vmv1r.v v16, v8
4326; CHECK-RV32-NEXT:    vmv8r.v v8, v16
4327; CHECK-RV32-NEXT:    andi a3, a2, 64
4328; CHECK-RV32-NEXT:    bnez a3, .LBB61_579
4329; CHECK-RV32-NEXT:    j .LBB61_42
4330; CHECK-RV32-NEXT:  .LBB61_579: # %cond.load149
4331; CHECK-RV32-NEXT:    lbu a3, 0(a0)
4332; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
4333; CHECK-RV32-NEXT:    vmv8r.v v16, v8
4334; CHECK-RV32-NEXT:    vmv.s.x v9, a3
4335; CHECK-RV32-NEXT:    li a3, 39
4336; CHECK-RV32-NEXT:    li a4, 38
4337; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m1, tu, ma
4338; CHECK-RV32-NEXT:    vslideup.vx v8, v9, a4
4339; CHECK-RV32-NEXT:    addi a0, a0, 1
4340; CHECK-RV32-NEXT:    vmv1r.v v16, v8
4341; CHECK-RV32-NEXT:    vmv8r.v v8, v16
4342; CHECK-RV32-NEXT:    andi a3, a2, 128
4343; CHECK-RV32-NEXT:    bnez a3, .LBB61_580
4344; CHECK-RV32-NEXT:    j .LBB61_43
4345; CHECK-RV32-NEXT:  .LBB61_580: # %cond.load153
4346; CHECK-RV32-NEXT:    lbu a3, 0(a0)
4347; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
4348; CHECK-RV32-NEXT:    vmv8r.v v16, v8
4349; CHECK-RV32-NEXT:    vmv.s.x v9, a3
4350; CHECK-RV32-NEXT:    li a3, 40
4351; CHECK-RV32-NEXT:    li a4, 39
4352; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m1, tu, ma
4353; CHECK-RV32-NEXT:    vslideup.vx v8, v9, a4
4354; CHECK-RV32-NEXT:    addi a0, a0, 1
4355; CHECK-RV32-NEXT:    vmv1r.v v16, v8
4356; CHECK-RV32-NEXT:    vmv8r.v v8, v16
4357; CHECK-RV32-NEXT:    andi a3, a2, 256
4358; CHECK-RV32-NEXT:    bnez a3, .LBB61_581
4359; CHECK-RV32-NEXT:    j .LBB61_44
4360; CHECK-RV32-NEXT:  .LBB61_581: # %cond.load157
4361; CHECK-RV32-NEXT:    lbu a3, 0(a0)
4362; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
4363; CHECK-RV32-NEXT:    vmv8r.v v16, v8
4364; CHECK-RV32-NEXT:    vmv.s.x v9, a3
4365; CHECK-RV32-NEXT:    li a3, 41
4366; CHECK-RV32-NEXT:    li a4, 40
4367; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m1, tu, ma
4368; CHECK-RV32-NEXT:    vslideup.vx v8, v9, a4
4369; CHECK-RV32-NEXT:    addi a0, a0, 1
4370; CHECK-RV32-NEXT:    vmv1r.v v16, v8
4371; CHECK-RV32-NEXT:    vmv8r.v v8, v16
4372; CHECK-RV32-NEXT:    andi a3, a2, 512
4373; CHECK-RV32-NEXT:    bnez a3, .LBB61_582
4374; CHECK-RV32-NEXT:    j .LBB61_45
4375; CHECK-RV32-NEXT:  .LBB61_582: # %cond.load161
4376; CHECK-RV32-NEXT:    lbu a3, 0(a0)
4377; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
4378; CHECK-RV32-NEXT:    vmv8r.v v16, v8
4379; CHECK-RV32-NEXT:    vmv.s.x v9, a3
4380; CHECK-RV32-NEXT:    li a3, 42
4381; CHECK-RV32-NEXT:    li a4, 41
4382; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m1, tu, ma
4383; CHECK-RV32-NEXT:    vslideup.vx v8, v9, a4
4384; CHECK-RV32-NEXT:    addi a0, a0, 1
4385; CHECK-RV32-NEXT:    vmv1r.v v16, v8
4386; CHECK-RV32-NEXT:    vmv8r.v v8, v16
4387; CHECK-RV32-NEXT:    andi a3, a2, 1024
4388; CHECK-RV32-NEXT:    bnez a3, .LBB61_583
4389; CHECK-RV32-NEXT:    j .LBB61_46
4390; CHECK-RV32-NEXT:  .LBB61_583: # %cond.load165
4391; CHECK-RV32-NEXT:    lbu a3, 0(a0)
4392; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
4393; CHECK-RV32-NEXT:    vmv8r.v v16, v8
4394; CHECK-RV32-NEXT:    vmv.s.x v9, a3
4395; CHECK-RV32-NEXT:    li a3, 43
4396; CHECK-RV32-NEXT:    li a4, 42
4397; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m1, tu, ma
4398; CHECK-RV32-NEXT:    vslideup.vx v8, v9, a4
4399; CHECK-RV32-NEXT:    addi a0, a0, 1
4400; CHECK-RV32-NEXT:    vmv1r.v v16, v8
4401; CHECK-RV32-NEXT:    vmv8r.v v8, v16
4402; CHECK-RV32-NEXT:    slli a3, a2, 20
4403; CHECK-RV32-NEXT:    bltz a3, .LBB61_584
4404; CHECK-RV32-NEXT:    j .LBB61_47
4405; CHECK-RV32-NEXT:  .LBB61_584: # %cond.load169
4406; CHECK-RV32-NEXT:    lbu a3, 0(a0)
4407; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
4408; CHECK-RV32-NEXT:    vmv8r.v v16, v8
4409; CHECK-RV32-NEXT:    vmv.s.x v9, a3
4410; CHECK-RV32-NEXT:    li a3, 44
4411; CHECK-RV32-NEXT:    li a4, 43
4412; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m1, tu, ma
4413; CHECK-RV32-NEXT:    vslideup.vx v8, v9, a4
4414; CHECK-RV32-NEXT:    addi a0, a0, 1
4415; CHECK-RV32-NEXT:    vmv1r.v v16, v8
4416; CHECK-RV32-NEXT:    vmv8r.v v8, v16
4417; CHECK-RV32-NEXT:    slli a3, a2, 19
4418; CHECK-RV32-NEXT:    bltz a3, .LBB61_585
4419; CHECK-RV32-NEXT:    j .LBB61_48
4420; CHECK-RV32-NEXT:  .LBB61_585: # %cond.load173
4421; CHECK-RV32-NEXT:    lbu a3, 0(a0)
4422; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
4423; CHECK-RV32-NEXT:    vmv8r.v v16, v8
4424; CHECK-RV32-NEXT:    vmv.s.x v9, a3
4425; CHECK-RV32-NEXT:    li a3, 45
4426; CHECK-RV32-NEXT:    li a4, 44
4427; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m1, tu, ma
4428; CHECK-RV32-NEXT:    vslideup.vx v8, v9, a4
4429; CHECK-RV32-NEXT:    addi a0, a0, 1
4430; CHECK-RV32-NEXT:    vmv1r.v v16, v8
4431; CHECK-RV32-NEXT:    vmv8r.v v8, v16
4432; CHECK-RV32-NEXT:    slli a3, a2, 18
4433; CHECK-RV32-NEXT:    bltz a3, .LBB61_586
4434; CHECK-RV32-NEXT:    j .LBB61_49
4435; CHECK-RV32-NEXT:  .LBB61_586: # %cond.load177
4436; CHECK-RV32-NEXT:    lbu a3, 0(a0)
4437; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
4438; CHECK-RV32-NEXT:    vmv8r.v v16, v8
4439; CHECK-RV32-NEXT:    vmv.s.x v9, a3
4440; CHECK-RV32-NEXT:    li a3, 46
4441; CHECK-RV32-NEXT:    li a4, 45
4442; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m1, tu, ma
4443; CHECK-RV32-NEXT:    vslideup.vx v8, v9, a4
4444; CHECK-RV32-NEXT:    addi a0, a0, 1
4445; CHECK-RV32-NEXT:    vmv1r.v v16, v8
4446; CHECK-RV32-NEXT:    vmv8r.v v8, v16
4447; CHECK-RV32-NEXT:    slli a3, a2, 17
4448; CHECK-RV32-NEXT:    bltz a3, .LBB61_587
4449; CHECK-RV32-NEXT:    j .LBB61_50
4450; CHECK-RV32-NEXT:  .LBB61_587: # %cond.load181
4451; CHECK-RV32-NEXT:    lbu a3, 0(a0)
4452; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
4453; CHECK-RV32-NEXT:    vmv8r.v v16, v8
4454; CHECK-RV32-NEXT:    vmv.s.x v9, a3
4455; CHECK-RV32-NEXT:    li a3, 47
4456; CHECK-RV32-NEXT:    li a4, 46
4457; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m1, tu, ma
4458; CHECK-RV32-NEXT:    vslideup.vx v8, v9, a4
4459; CHECK-RV32-NEXT:    addi a0, a0, 1
4460; CHECK-RV32-NEXT:    vmv1r.v v16, v8
4461; CHECK-RV32-NEXT:    vmv8r.v v8, v16
4462; CHECK-RV32-NEXT:    slli a3, a2, 16
4463; CHECK-RV32-NEXT:    bltz a3, .LBB61_588
4464; CHECK-RV32-NEXT:    j .LBB61_51
4465; CHECK-RV32-NEXT:  .LBB61_588: # %cond.load185
4466; CHECK-RV32-NEXT:    lbu a3, 0(a0)
4467; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
4468; CHECK-RV32-NEXT:    vmv8r.v v16, v8
4469; CHECK-RV32-NEXT:    vmv.s.x v9, a3
4470; CHECK-RV32-NEXT:    li a3, 48
4471; CHECK-RV32-NEXT:    li a4, 47
4472; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m1, tu, ma
4473; CHECK-RV32-NEXT:    vslideup.vx v8, v9, a4
4474; CHECK-RV32-NEXT:    addi a0, a0, 1
4475; CHECK-RV32-NEXT:    vmv1r.v v16, v8
4476; CHECK-RV32-NEXT:    vmv8r.v v8, v16
4477; CHECK-RV32-NEXT:    slli a3, a2, 15
4478; CHECK-RV32-NEXT:    bltz a3, .LBB61_589
4479; CHECK-RV32-NEXT:    j .LBB61_52
4480; CHECK-RV32-NEXT:  .LBB61_589: # %cond.load189
4481; CHECK-RV32-NEXT:    lbu a3, 0(a0)
4482; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
4483; CHECK-RV32-NEXT:    vmv8r.v v16, v8
4484; CHECK-RV32-NEXT:    vmv.s.x v9, a3
4485; CHECK-RV32-NEXT:    li a3, 49
4486; CHECK-RV32-NEXT:    li a4, 48
4487; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m1, tu, ma
4488; CHECK-RV32-NEXT:    vslideup.vx v8, v9, a4
4489; CHECK-RV32-NEXT:    addi a0, a0, 1
4490; CHECK-RV32-NEXT:    vmv1r.v v16, v8
4491; CHECK-RV32-NEXT:    vmv8r.v v8, v16
4492; CHECK-RV32-NEXT:    slli a3, a2, 14
4493; CHECK-RV32-NEXT:    bltz a3, .LBB61_590
4494; CHECK-RV32-NEXT:    j .LBB61_53
4495; CHECK-RV32-NEXT:  .LBB61_590: # %cond.load193
4496; CHECK-RV32-NEXT:    lbu a3, 0(a0)
4497; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
4498; CHECK-RV32-NEXT:    vmv8r.v v16, v8
4499; CHECK-RV32-NEXT:    vmv.s.x v9, a3
4500; CHECK-RV32-NEXT:    li a3, 50
4501; CHECK-RV32-NEXT:    li a4, 49
4502; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m1, tu, ma
4503; CHECK-RV32-NEXT:    vslideup.vx v8, v9, a4
4504; CHECK-RV32-NEXT:    addi a0, a0, 1
4505; CHECK-RV32-NEXT:    vmv1r.v v16, v8
4506; CHECK-RV32-NEXT:    vmv8r.v v8, v16
4507; CHECK-RV32-NEXT:    slli a3, a2, 13
4508; CHECK-RV32-NEXT:    bltz a3, .LBB61_591
4509; CHECK-RV32-NEXT:    j .LBB61_54
4510; CHECK-RV32-NEXT:  .LBB61_591: # %cond.load197
4511; CHECK-RV32-NEXT:    lbu a3, 0(a0)
4512; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
4513; CHECK-RV32-NEXT:    vmv8r.v v16, v8
4514; CHECK-RV32-NEXT:    vmv.s.x v9, a3
4515; CHECK-RV32-NEXT:    li a3, 51
4516; CHECK-RV32-NEXT:    li a4, 50
4517; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m1, tu, ma
4518; CHECK-RV32-NEXT:    vslideup.vx v8, v9, a4
4519; CHECK-RV32-NEXT:    addi a0, a0, 1
4520; CHECK-RV32-NEXT:    vmv1r.v v16, v8
4521; CHECK-RV32-NEXT:    vmv8r.v v8, v16
4522; CHECK-RV32-NEXT:    slli a3, a2, 12
4523; CHECK-RV32-NEXT:    bltz a3, .LBB61_592
4524; CHECK-RV32-NEXT:    j .LBB61_55
4525; CHECK-RV32-NEXT:  .LBB61_592: # %cond.load201
4526; CHECK-RV32-NEXT:    lbu a3, 0(a0)
4527; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
4528; CHECK-RV32-NEXT:    vmv8r.v v16, v8
4529; CHECK-RV32-NEXT:    vmv.s.x v9, a3
4530; CHECK-RV32-NEXT:    li a3, 52
4531; CHECK-RV32-NEXT:    li a4, 51
4532; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m1, tu, ma
4533; CHECK-RV32-NEXT:    vslideup.vx v8, v9, a4
4534; CHECK-RV32-NEXT:    addi a0, a0, 1
4535; CHECK-RV32-NEXT:    vmv1r.v v16, v8
4536; CHECK-RV32-NEXT:    vmv8r.v v8, v16
4537; CHECK-RV32-NEXT:    slli a3, a2, 11
4538; CHECK-RV32-NEXT:    bltz a3, .LBB61_593
4539; CHECK-RV32-NEXT:    j .LBB61_56
4540; CHECK-RV32-NEXT:  .LBB61_593: # %cond.load205
4541; CHECK-RV32-NEXT:    lbu a3, 0(a0)
4542; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
4543; CHECK-RV32-NEXT:    vmv8r.v v16, v8
4544; CHECK-RV32-NEXT:    vmv.s.x v9, a3
4545; CHECK-RV32-NEXT:    li a3, 53
4546; CHECK-RV32-NEXT:    li a4, 52
4547; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m1, tu, ma
4548; CHECK-RV32-NEXT:    vslideup.vx v8, v9, a4
4549; CHECK-RV32-NEXT:    addi a0, a0, 1
4550; CHECK-RV32-NEXT:    vmv1r.v v16, v8
4551; CHECK-RV32-NEXT:    vmv8r.v v8, v16
4552; CHECK-RV32-NEXT:    slli a3, a2, 10
4553; CHECK-RV32-NEXT:    bltz a3, .LBB61_594
4554; CHECK-RV32-NEXT:    j .LBB61_57
4555; CHECK-RV32-NEXT:  .LBB61_594: # %cond.load209
4556; CHECK-RV32-NEXT:    lbu a3, 0(a0)
4557; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
4558; CHECK-RV32-NEXT:    vmv8r.v v16, v8
4559; CHECK-RV32-NEXT:    vmv.s.x v9, a3
4560; CHECK-RV32-NEXT:    li a3, 54
4561; CHECK-RV32-NEXT:    li a4, 53
4562; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m1, tu, ma
4563; CHECK-RV32-NEXT:    vslideup.vx v8, v9, a4
4564; CHECK-RV32-NEXT:    addi a0, a0, 1
4565; CHECK-RV32-NEXT:    vmv1r.v v16, v8
4566; CHECK-RV32-NEXT:    vmv8r.v v8, v16
4567; CHECK-RV32-NEXT:    slli a3, a2, 9
4568; CHECK-RV32-NEXT:    bltz a3, .LBB61_595
4569; CHECK-RV32-NEXT:    j .LBB61_58
4570; CHECK-RV32-NEXT:  .LBB61_595: # %cond.load213
4571; CHECK-RV32-NEXT:    lbu a3, 0(a0)
4572; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
4573; CHECK-RV32-NEXT:    vmv8r.v v16, v8
4574; CHECK-RV32-NEXT:    vmv.s.x v9, a3
4575; CHECK-RV32-NEXT:    li a3, 55
4576; CHECK-RV32-NEXT:    li a4, 54
4577; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m1, tu, ma
4578; CHECK-RV32-NEXT:    vslideup.vx v8, v9, a4
4579; CHECK-RV32-NEXT:    addi a0, a0, 1
4580; CHECK-RV32-NEXT:    vmv1r.v v16, v8
4581; CHECK-RV32-NEXT:    vmv8r.v v8, v16
4582; CHECK-RV32-NEXT:    slli a3, a2, 8
4583; CHECK-RV32-NEXT:    bltz a3, .LBB61_596
4584; CHECK-RV32-NEXT:    j .LBB61_59
4585; CHECK-RV32-NEXT:  .LBB61_596: # %cond.load217
4586; CHECK-RV32-NEXT:    lbu a3, 0(a0)
4587; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
4588; CHECK-RV32-NEXT:    vmv8r.v v16, v8
4589; CHECK-RV32-NEXT:    vmv.s.x v9, a3
4590; CHECK-RV32-NEXT:    li a3, 56
4591; CHECK-RV32-NEXT:    li a4, 55
4592; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m1, tu, ma
4593; CHECK-RV32-NEXT:    vslideup.vx v8, v9, a4
4594; CHECK-RV32-NEXT:    addi a0, a0, 1
4595; CHECK-RV32-NEXT:    vmv1r.v v16, v8
4596; CHECK-RV32-NEXT:    vmv8r.v v8, v16
4597; CHECK-RV32-NEXT:    slli a3, a2, 7
4598; CHECK-RV32-NEXT:    bltz a3, .LBB61_597
4599; CHECK-RV32-NEXT:    j .LBB61_60
4600; CHECK-RV32-NEXT:  .LBB61_597: # %cond.load221
4601; CHECK-RV32-NEXT:    lbu a3, 0(a0)
4602; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
4603; CHECK-RV32-NEXT:    vmv8r.v v16, v8
4604; CHECK-RV32-NEXT:    vmv.s.x v9, a3
4605; CHECK-RV32-NEXT:    li a3, 57
4606; CHECK-RV32-NEXT:    li a4, 56
4607; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m1, tu, ma
4608; CHECK-RV32-NEXT:    vslideup.vx v8, v9, a4
4609; CHECK-RV32-NEXT:    addi a0, a0, 1
4610; CHECK-RV32-NEXT:    vmv1r.v v16, v8
4611; CHECK-RV32-NEXT:    vmv8r.v v8, v16
4612; CHECK-RV32-NEXT:    slli a3, a2, 6
4613; CHECK-RV32-NEXT:    bltz a3, .LBB61_598
4614; CHECK-RV32-NEXT:    j .LBB61_61
4615; CHECK-RV32-NEXT:  .LBB61_598: # %cond.load225
4616; CHECK-RV32-NEXT:    lbu a3, 0(a0)
4617; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
4618; CHECK-RV32-NEXT:    vmv8r.v v16, v8
4619; CHECK-RV32-NEXT:    vmv.s.x v9, a3
4620; CHECK-RV32-NEXT:    li a3, 58
4621; CHECK-RV32-NEXT:    li a4, 57
4622; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m1, tu, ma
4623; CHECK-RV32-NEXT:    vslideup.vx v8, v9, a4
4624; CHECK-RV32-NEXT:    addi a0, a0, 1
4625; CHECK-RV32-NEXT:    vmv1r.v v16, v8
4626; CHECK-RV32-NEXT:    vmv8r.v v8, v16
4627; CHECK-RV32-NEXT:    slli a3, a2, 5
4628; CHECK-RV32-NEXT:    bltz a3, .LBB61_599
4629; CHECK-RV32-NEXT:    j .LBB61_62
4630; CHECK-RV32-NEXT:  .LBB61_599: # %cond.load229
4631; CHECK-RV32-NEXT:    lbu a3, 0(a0)
4632; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
4633; CHECK-RV32-NEXT:    vmv8r.v v16, v8
4634; CHECK-RV32-NEXT:    vmv.s.x v9, a3
4635; CHECK-RV32-NEXT:    li a3, 59
4636; CHECK-RV32-NEXT:    li a4, 58
4637; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m1, tu, ma
4638; CHECK-RV32-NEXT:    vslideup.vx v8, v9, a4
4639; CHECK-RV32-NEXT:    addi a0, a0, 1
4640; CHECK-RV32-NEXT:    vmv1r.v v16, v8
4641; CHECK-RV32-NEXT:    vmv8r.v v8, v16
4642; CHECK-RV32-NEXT:    slli a3, a2, 4
4643; CHECK-RV32-NEXT:    bltz a3, .LBB61_600
4644; CHECK-RV32-NEXT:    j .LBB61_63
4645; CHECK-RV32-NEXT:  .LBB61_600: # %cond.load233
4646; CHECK-RV32-NEXT:    lbu a3, 0(a0)
4647; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
4648; CHECK-RV32-NEXT:    vmv8r.v v16, v8
4649; CHECK-RV32-NEXT:    vmv.s.x v9, a3
4650; CHECK-RV32-NEXT:    li a3, 60
4651; CHECK-RV32-NEXT:    li a4, 59
4652; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m1, tu, ma
4653; CHECK-RV32-NEXT:    vslideup.vx v8, v9, a4
4654; CHECK-RV32-NEXT:    addi a0, a0, 1
4655; CHECK-RV32-NEXT:    vmv1r.v v16, v8
4656; CHECK-RV32-NEXT:    vmv8r.v v8, v16
4657; CHECK-RV32-NEXT:    slli a3, a2, 3
4658; CHECK-RV32-NEXT:    bltz a3, .LBB61_601
4659; CHECK-RV32-NEXT:    j .LBB61_64
4660; CHECK-RV32-NEXT:  .LBB61_601: # %cond.load237
4661; CHECK-RV32-NEXT:    lbu a3, 0(a0)
4662; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
4663; CHECK-RV32-NEXT:    vmv8r.v v16, v8
4664; CHECK-RV32-NEXT:    vmv.s.x v9, a3
4665; CHECK-RV32-NEXT:    li a3, 61
4666; CHECK-RV32-NEXT:    li a4, 60
4667; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m1, tu, ma
4668; CHECK-RV32-NEXT:    vslideup.vx v8, v9, a4
4669; CHECK-RV32-NEXT:    addi a0, a0, 1
4670; CHECK-RV32-NEXT:    vmv1r.v v16, v8
4671; CHECK-RV32-NEXT:    vmv8r.v v8, v16
4672; CHECK-RV32-NEXT:    slli a3, a2, 2
4673; CHECK-RV32-NEXT:    bgez a3, .LBB61_1026
4674; CHECK-RV32-NEXT:    j .LBB61_65
4675; CHECK-RV32-NEXT:  .LBB61_1026: # %cond.load237
4676; CHECK-RV32-NEXT:    j .LBB61_66
4677; CHECK-RV32-NEXT:  .LBB61_602: # %cond.load249
4678; CHECK-RV32-NEXT:    lbu a2, 0(a0)
4679; CHECK-RV32-NEXT:    vmv8r.v v24, v8
4680; CHECK-RV32-NEXT:    vmv.s.x v9, a2
4681; CHECK-RV32-NEXT:    li a2, 64
4682; CHECK-RV32-NEXT:    li a4, 63
4683; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m1, tu, ma
4684; CHECK-RV32-NEXT:    vslideup.vx v8, v9, a4
4685; CHECK-RV32-NEXT:    addi a0, a0, 1
4686; CHECK-RV32-NEXT:    vmv1r.v v24, v8
4687; CHECK-RV32-NEXT:    vmv8r.v v8, v24
4688; CHECK-RV32-NEXT:    andi a2, a3, 1
4689; CHECK-RV32-NEXT:    bnez a2, .LBB61_603
4690; CHECK-RV32-NEXT:    j .LBB61_70
4691; CHECK-RV32-NEXT:  .LBB61_603: # %cond.load253
4692; CHECK-RV32-NEXT:    lbu a2, 0(a0)
4693; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
4694; CHECK-RV32-NEXT:    vmv8r.v v24, v8
4695; CHECK-RV32-NEXT:    vmv.s.x v10, a2
4696; CHECK-RV32-NEXT:    li a2, 65
4697; CHECK-RV32-NEXT:    li a4, 64
4698; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
4699; CHECK-RV32-NEXT:    vslideup.vx v8, v10, a4
4700; CHECK-RV32-NEXT:    addi a0, a0, 1
4701; CHECK-RV32-NEXT:    vmv2r.v v24, v8
4702; CHECK-RV32-NEXT:    vmv8r.v v8, v24
4703; CHECK-RV32-NEXT:    andi a2, a3, 2
4704; CHECK-RV32-NEXT:    bnez a2, .LBB61_604
4705; CHECK-RV32-NEXT:    j .LBB61_71
4706; CHECK-RV32-NEXT:  .LBB61_604: # %cond.load257
4707; CHECK-RV32-NEXT:    lbu a2, 0(a0)
4708; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
4709; CHECK-RV32-NEXT:    vmv8r.v v24, v8
4710; CHECK-RV32-NEXT:    vmv.s.x v10, a2
4711; CHECK-RV32-NEXT:    li a2, 66
4712; CHECK-RV32-NEXT:    li a4, 65
4713; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
4714; CHECK-RV32-NEXT:    vslideup.vx v8, v10, a4
4715; CHECK-RV32-NEXT:    addi a0, a0, 1
4716; CHECK-RV32-NEXT:    vmv2r.v v24, v8
4717; CHECK-RV32-NEXT:    vmv8r.v v8, v24
4718; CHECK-RV32-NEXT:    andi a2, a3, 4
4719; CHECK-RV32-NEXT:    bnez a2, .LBB61_605
4720; CHECK-RV32-NEXT:    j .LBB61_72
4721; CHECK-RV32-NEXT:  .LBB61_605: # %cond.load261
4722; CHECK-RV32-NEXT:    lbu a2, 0(a0)
4723; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
4724; CHECK-RV32-NEXT:    vmv8r.v v24, v8
4725; CHECK-RV32-NEXT:    vmv.s.x v10, a2
4726; CHECK-RV32-NEXT:    li a2, 67
4727; CHECK-RV32-NEXT:    li a4, 66
4728; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
4729; CHECK-RV32-NEXT:    vslideup.vx v8, v10, a4
4730; CHECK-RV32-NEXT:    addi a0, a0, 1
4731; CHECK-RV32-NEXT:    vmv2r.v v24, v8
4732; CHECK-RV32-NEXT:    vmv8r.v v8, v24
4733; CHECK-RV32-NEXT:    andi a2, a3, 8
4734; CHECK-RV32-NEXT:    bnez a2, .LBB61_606
4735; CHECK-RV32-NEXT:    j .LBB61_73
4736; CHECK-RV32-NEXT:  .LBB61_606: # %cond.load265
4737; CHECK-RV32-NEXT:    lbu a2, 0(a0)
4738; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
4739; CHECK-RV32-NEXT:    vmv8r.v v24, v8
4740; CHECK-RV32-NEXT:    vmv.s.x v10, a2
4741; CHECK-RV32-NEXT:    li a2, 68
4742; CHECK-RV32-NEXT:    li a4, 67
4743; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
4744; CHECK-RV32-NEXT:    vslideup.vx v8, v10, a4
4745; CHECK-RV32-NEXT:    addi a0, a0, 1
4746; CHECK-RV32-NEXT:    vmv2r.v v24, v8
4747; CHECK-RV32-NEXT:    vmv8r.v v8, v24
4748; CHECK-RV32-NEXT:    andi a2, a3, 16
4749; CHECK-RV32-NEXT:    bnez a2, .LBB61_607
4750; CHECK-RV32-NEXT:    j .LBB61_74
4751; CHECK-RV32-NEXT:  .LBB61_607: # %cond.load269
4752; CHECK-RV32-NEXT:    lbu a2, 0(a0)
4753; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
4754; CHECK-RV32-NEXT:    vmv8r.v v24, v8
4755; CHECK-RV32-NEXT:    vmv.s.x v10, a2
4756; CHECK-RV32-NEXT:    li a2, 69
4757; CHECK-RV32-NEXT:    li a4, 68
4758; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
4759; CHECK-RV32-NEXT:    vslideup.vx v8, v10, a4
4760; CHECK-RV32-NEXT:    addi a0, a0, 1
4761; CHECK-RV32-NEXT:    vmv2r.v v24, v8
4762; CHECK-RV32-NEXT:    vmv8r.v v8, v24
4763; CHECK-RV32-NEXT:    andi a2, a3, 32
4764; CHECK-RV32-NEXT:    bnez a2, .LBB61_608
4765; CHECK-RV32-NEXT:    j .LBB61_75
4766; CHECK-RV32-NEXT:  .LBB61_608: # %cond.load273
4767; CHECK-RV32-NEXT:    lbu a2, 0(a0)
4768; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
4769; CHECK-RV32-NEXT:    vmv8r.v v24, v8
4770; CHECK-RV32-NEXT:    vmv.s.x v10, a2
4771; CHECK-RV32-NEXT:    li a2, 70
4772; CHECK-RV32-NEXT:    li a4, 69
4773; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
4774; CHECK-RV32-NEXT:    vslideup.vx v8, v10, a4
4775; CHECK-RV32-NEXT:    addi a0, a0, 1
4776; CHECK-RV32-NEXT:    vmv2r.v v24, v8
4777; CHECK-RV32-NEXT:    vmv8r.v v8, v24
4778; CHECK-RV32-NEXT:    andi a2, a3, 64
4779; CHECK-RV32-NEXT:    bnez a2, .LBB61_609
4780; CHECK-RV32-NEXT:    j .LBB61_76
4781; CHECK-RV32-NEXT:  .LBB61_609: # %cond.load277
4782; CHECK-RV32-NEXT:    lbu a2, 0(a0)
4783; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
4784; CHECK-RV32-NEXT:    vmv8r.v v24, v8
4785; CHECK-RV32-NEXT:    vmv.s.x v10, a2
4786; CHECK-RV32-NEXT:    li a2, 71
4787; CHECK-RV32-NEXT:    li a4, 70
4788; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
4789; CHECK-RV32-NEXT:    vslideup.vx v8, v10, a4
4790; CHECK-RV32-NEXT:    addi a0, a0, 1
4791; CHECK-RV32-NEXT:    vmv2r.v v24, v8
4792; CHECK-RV32-NEXT:    vmv8r.v v8, v24
4793; CHECK-RV32-NEXT:    andi a2, a3, 128
4794; CHECK-RV32-NEXT:    bnez a2, .LBB61_610
4795; CHECK-RV32-NEXT:    j .LBB61_77
4796; CHECK-RV32-NEXT:  .LBB61_610: # %cond.load281
4797; CHECK-RV32-NEXT:    lbu a2, 0(a0)
4798; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
4799; CHECK-RV32-NEXT:    vmv8r.v v24, v8
4800; CHECK-RV32-NEXT:    vmv.s.x v10, a2
4801; CHECK-RV32-NEXT:    li a2, 72
4802; CHECK-RV32-NEXT:    li a4, 71
4803; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
4804; CHECK-RV32-NEXT:    vslideup.vx v8, v10, a4
4805; CHECK-RV32-NEXT:    addi a0, a0, 1
4806; CHECK-RV32-NEXT:    vmv2r.v v24, v8
4807; CHECK-RV32-NEXT:    vmv8r.v v8, v24
4808; CHECK-RV32-NEXT:    andi a2, a3, 256
4809; CHECK-RV32-NEXT:    bnez a2, .LBB61_611
4810; CHECK-RV32-NEXT:    j .LBB61_78
4811; CHECK-RV32-NEXT:  .LBB61_611: # %cond.load285
4812; CHECK-RV32-NEXT:    lbu a2, 0(a0)
4813; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
4814; CHECK-RV32-NEXT:    vmv8r.v v24, v8
4815; CHECK-RV32-NEXT:    vmv.s.x v10, a2
4816; CHECK-RV32-NEXT:    li a2, 73
4817; CHECK-RV32-NEXT:    li a4, 72
4818; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
4819; CHECK-RV32-NEXT:    vslideup.vx v8, v10, a4
4820; CHECK-RV32-NEXT:    addi a0, a0, 1
4821; CHECK-RV32-NEXT:    vmv2r.v v24, v8
4822; CHECK-RV32-NEXT:    vmv8r.v v8, v24
4823; CHECK-RV32-NEXT:    andi a2, a3, 512
4824; CHECK-RV32-NEXT:    bnez a2, .LBB61_612
4825; CHECK-RV32-NEXT:    j .LBB61_79
4826; CHECK-RV32-NEXT:  .LBB61_612: # %cond.load289
4827; CHECK-RV32-NEXT:    lbu a2, 0(a0)
4828; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
4829; CHECK-RV32-NEXT:    vmv8r.v v24, v8
4830; CHECK-RV32-NEXT:    vmv.s.x v10, a2
4831; CHECK-RV32-NEXT:    li a2, 74
4832; CHECK-RV32-NEXT:    li a4, 73
4833; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
4834; CHECK-RV32-NEXT:    vslideup.vx v8, v10, a4
4835; CHECK-RV32-NEXT:    addi a0, a0, 1
4836; CHECK-RV32-NEXT:    vmv2r.v v24, v8
4837; CHECK-RV32-NEXT:    vmv8r.v v8, v24
4838; CHECK-RV32-NEXT:    andi a2, a3, 1024
4839; CHECK-RV32-NEXT:    bnez a2, .LBB61_613
4840; CHECK-RV32-NEXT:    j .LBB61_80
4841; CHECK-RV32-NEXT:  .LBB61_613: # %cond.load293
4842; CHECK-RV32-NEXT:    lbu a2, 0(a0)
4843; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
4844; CHECK-RV32-NEXT:    vmv8r.v v24, v8
4845; CHECK-RV32-NEXT:    vmv.s.x v10, a2
4846; CHECK-RV32-NEXT:    li a2, 75
4847; CHECK-RV32-NEXT:    li a4, 74
4848; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
4849; CHECK-RV32-NEXT:    vslideup.vx v8, v10, a4
4850; CHECK-RV32-NEXT:    addi a0, a0, 1
4851; CHECK-RV32-NEXT:    vmv2r.v v24, v8
4852; CHECK-RV32-NEXT:    vmv8r.v v8, v24
4853; CHECK-RV32-NEXT:    slli a2, a3, 20
4854; CHECK-RV32-NEXT:    bltz a2, .LBB61_614
4855; CHECK-RV32-NEXT:    j .LBB61_81
4856; CHECK-RV32-NEXT:  .LBB61_614: # %cond.load297
4857; CHECK-RV32-NEXT:    lbu a2, 0(a0)
4858; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
4859; CHECK-RV32-NEXT:    vmv8r.v v24, v8
4860; CHECK-RV32-NEXT:    vmv.s.x v10, a2
4861; CHECK-RV32-NEXT:    li a2, 76
4862; CHECK-RV32-NEXT:    li a4, 75
4863; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
4864; CHECK-RV32-NEXT:    vslideup.vx v8, v10, a4
4865; CHECK-RV32-NEXT:    addi a0, a0, 1
4866; CHECK-RV32-NEXT:    vmv2r.v v24, v8
4867; CHECK-RV32-NEXT:    vmv8r.v v8, v24
4868; CHECK-RV32-NEXT:    slli a2, a3, 19
4869; CHECK-RV32-NEXT:    bltz a2, .LBB61_615
4870; CHECK-RV32-NEXT:    j .LBB61_82
4871; CHECK-RV32-NEXT:  .LBB61_615: # %cond.load301
4872; CHECK-RV32-NEXT:    lbu a2, 0(a0)
4873; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
4874; CHECK-RV32-NEXT:    vmv8r.v v24, v8
4875; CHECK-RV32-NEXT:    vmv.s.x v10, a2
4876; CHECK-RV32-NEXT:    li a2, 77
4877; CHECK-RV32-NEXT:    li a4, 76
4878; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
4879; CHECK-RV32-NEXT:    vslideup.vx v8, v10, a4
4880; CHECK-RV32-NEXT:    addi a0, a0, 1
4881; CHECK-RV32-NEXT:    vmv2r.v v24, v8
4882; CHECK-RV32-NEXT:    vmv8r.v v8, v24
4883; CHECK-RV32-NEXT:    slli a2, a3, 18
4884; CHECK-RV32-NEXT:    bltz a2, .LBB61_616
4885; CHECK-RV32-NEXT:    j .LBB61_83
4886; CHECK-RV32-NEXT:  .LBB61_616: # %cond.load305
4887; CHECK-RV32-NEXT:    lbu a2, 0(a0)
4888; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
4889; CHECK-RV32-NEXT:    vmv8r.v v24, v8
4890; CHECK-RV32-NEXT:    vmv.s.x v10, a2
4891; CHECK-RV32-NEXT:    li a2, 78
4892; CHECK-RV32-NEXT:    li a4, 77
4893; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
4894; CHECK-RV32-NEXT:    vslideup.vx v8, v10, a4
4895; CHECK-RV32-NEXT:    addi a0, a0, 1
4896; CHECK-RV32-NEXT:    vmv2r.v v24, v8
4897; CHECK-RV32-NEXT:    vmv8r.v v8, v24
4898; CHECK-RV32-NEXT:    slli a2, a3, 17
4899; CHECK-RV32-NEXT:    bltz a2, .LBB61_617
4900; CHECK-RV32-NEXT:    j .LBB61_84
4901; CHECK-RV32-NEXT:  .LBB61_617: # %cond.load309
4902; CHECK-RV32-NEXT:    lbu a2, 0(a0)
4903; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
4904; CHECK-RV32-NEXT:    vmv8r.v v24, v8
4905; CHECK-RV32-NEXT:    vmv.s.x v10, a2
4906; CHECK-RV32-NEXT:    li a2, 79
4907; CHECK-RV32-NEXT:    li a4, 78
4908; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
4909; CHECK-RV32-NEXT:    vslideup.vx v8, v10, a4
4910; CHECK-RV32-NEXT:    addi a0, a0, 1
4911; CHECK-RV32-NEXT:    vmv2r.v v24, v8
4912; CHECK-RV32-NEXT:    vmv8r.v v8, v24
4913; CHECK-RV32-NEXT:    slli a2, a3, 16
4914; CHECK-RV32-NEXT:    bltz a2, .LBB61_618
4915; CHECK-RV32-NEXT:    j .LBB61_85
4916; CHECK-RV32-NEXT:  .LBB61_618: # %cond.load313
4917; CHECK-RV32-NEXT:    lbu a2, 0(a0)
4918; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
4919; CHECK-RV32-NEXT:    vmv8r.v v24, v8
4920; CHECK-RV32-NEXT:    vmv.s.x v10, a2
4921; CHECK-RV32-NEXT:    li a2, 80
4922; CHECK-RV32-NEXT:    li a4, 79
4923; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
4924; CHECK-RV32-NEXT:    vslideup.vx v8, v10, a4
4925; CHECK-RV32-NEXT:    addi a0, a0, 1
4926; CHECK-RV32-NEXT:    vmv2r.v v24, v8
4927; CHECK-RV32-NEXT:    vmv8r.v v8, v24
4928; CHECK-RV32-NEXT:    slli a2, a3, 15
4929; CHECK-RV32-NEXT:    bltz a2, .LBB61_619
4930; CHECK-RV32-NEXT:    j .LBB61_86
4931; CHECK-RV32-NEXT:  .LBB61_619: # %cond.load317
4932; CHECK-RV32-NEXT:    lbu a2, 0(a0)
4933; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
4934; CHECK-RV32-NEXT:    vmv8r.v v24, v8
4935; CHECK-RV32-NEXT:    vmv.s.x v10, a2
4936; CHECK-RV32-NEXT:    li a2, 81
4937; CHECK-RV32-NEXT:    li a4, 80
4938; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
4939; CHECK-RV32-NEXT:    vslideup.vx v8, v10, a4
4940; CHECK-RV32-NEXT:    addi a0, a0, 1
4941; CHECK-RV32-NEXT:    vmv2r.v v24, v8
4942; CHECK-RV32-NEXT:    vmv8r.v v8, v24
4943; CHECK-RV32-NEXT:    slli a2, a3, 14
4944; CHECK-RV32-NEXT:    bltz a2, .LBB61_620
4945; CHECK-RV32-NEXT:    j .LBB61_87
4946; CHECK-RV32-NEXT:  .LBB61_620: # %cond.load321
4947; CHECK-RV32-NEXT:    lbu a2, 0(a0)
4948; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
4949; CHECK-RV32-NEXT:    vmv8r.v v24, v8
4950; CHECK-RV32-NEXT:    vmv.s.x v10, a2
4951; CHECK-RV32-NEXT:    li a2, 82
4952; CHECK-RV32-NEXT:    li a4, 81
4953; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
4954; CHECK-RV32-NEXT:    vslideup.vx v8, v10, a4
4955; CHECK-RV32-NEXT:    addi a0, a0, 1
4956; CHECK-RV32-NEXT:    vmv2r.v v24, v8
4957; CHECK-RV32-NEXT:    vmv8r.v v8, v24
4958; CHECK-RV32-NEXT:    slli a2, a3, 13
4959; CHECK-RV32-NEXT:    bltz a2, .LBB61_621
4960; CHECK-RV32-NEXT:    j .LBB61_88
4961; CHECK-RV32-NEXT:  .LBB61_621: # %cond.load325
4962; CHECK-RV32-NEXT:    lbu a2, 0(a0)
4963; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
4964; CHECK-RV32-NEXT:    vmv8r.v v24, v8
4965; CHECK-RV32-NEXT:    vmv.s.x v10, a2
4966; CHECK-RV32-NEXT:    li a2, 83
4967; CHECK-RV32-NEXT:    li a4, 82
4968; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
4969; CHECK-RV32-NEXT:    vslideup.vx v8, v10, a4
4970; CHECK-RV32-NEXT:    addi a0, a0, 1
4971; CHECK-RV32-NEXT:    vmv2r.v v24, v8
4972; CHECK-RV32-NEXT:    vmv8r.v v8, v24
4973; CHECK-RV32-NEXT:    slli a2, a3, 12
4974; CHECK-RV32-NEXT:    bltz a2, .LBB61_622
4975; CHECK-RV32-NEXT:    j .LBB61_89
4976; CHECK-RV32-NEXT:  .LBB61_622: # %cond.load329
4977; CHECK-RV32-NEXT:    lbu a2, 0(a0)
4978; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
4979; CHECK-RV32-NEXT:    vmv8r.v v24, v8
4980; CHECK-RV32-NEXT:    vmv.s.x v10, a2
4981; CHECK-RV32-NEXT:    li a2, 84
4982; CHECK-RV32-NEXT:    li a4, 83
4983; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
4984; CHECK-RV32-NEXT:    vslideup.vx v8, v10, a4
4985; CHECK-RV32-NEXT:    addi a0, a0, 1
4986; CHECK-RV32-NEXT:    vmv2r.v v24, v8
4987; CHECK-RV32-NEXT:    vmv8r.v v8, v24
4988; CHECK-RV32-NEXT:    slli a2, a3, 11
4989; CHECK-RV32-NEXT:    bltz a2, .LBB61_623
4990; CHECK-RV32-NEXT:    j .LBB61_90
4991; CHECK-RV32-NEXT:  .LBB61_623: # %cond.load333
4992; CHECK-RV32-NEXT:    lbu a2, 0(a0)
4993; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
4994; CHECK-RV32-NEXT:    vmv8r.v v24, v8
4995; CHECK-RV32-NEXT:    vmv.s.x v10, a2
4996; CHECK-RV32-NEXT:    li a2, 85
4997; CHECK-RV32-NEXT:    li a4, 84
4998; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
4999; CHECK-RV32-NEXT:    vslideup.vx v8, v10, a4
5000; CHECK-RV32-NEXT:    addi a0, a0, 1
5001; CHECK-RV32-NEXT:    vmv2r.v v24, v8
5002; CHECK-RV32-NEXT:    vmv8r.v v8, v24
5003; CHECK-RV32-NEXT:    slli a2, a3, 10
5004; CHECK-RV32-NEXT:    bltz a2, .LBB61_624
5005; CHECK-RV32-NEXT:    j .LBB61_91
5006; CHECK-RV32-NEXT:  .LBB61_624: # %cond.load337
5007; CHECK-RV32-NEXT:    lbu a2, 0(a0)
5008; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
5009; CHECK-RV32-NEXT:    vmv8r.v v24, v8
5010; CHECK-RV32-NEXT:    vmv.s.x v10, a2
5011; CHECK-RV32-NEXT:    li a2, 86
5012; CHECK-RV32-NEXT:    li a4, 85
5013; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
5014; CHECK-RV32-NEXT:    vslideup.vx v8, v10, a4
5015; CHECK-RV32-NEXT:    addi a0, a0, 1
5016; CHECK-RV32-NEXT:    vmv2r.v v24, v8
5017; CHECK-RV32-NEXT:    vmv8r.v v8, v24
5018; CHECK-RV32-NEXT:    slli a2, a3, 9
5019; CHECK-RV32-NEXT:    bltz a2, .LBB61_625
5020; CHECK-RV32-NEXT:    j .LBB61_92
5021; CHECK-RV32-NEXT:  .LBB61_625: # %cond.load341
5022; CHECK-RV32-NEXT:    lbu a2, 0(a0)
5023; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
5024; CHECK-RV32-NEXT:    vmv8r.v v24, v8
5025; CHECK-RV32-NEXT:    vmv.s.x v10, a2
5026; CHECK-RV32-NEXT:    li a2, 87
5027; CHECK-RV32-NEXT:    li a4, 86
5028; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
5029; CHECK-RV32-NEXT:    vslideup.vx v8, v10, a4
5030; CHECK-RV32-NEXT:    addi a0, a0, 1
5031; CHECK-RV32-NEXT:    vmv2r.v v24, v8
5032; CHECK-RV32-NEXT:    vmv8r.v v8, v24
5033; CHECK-RV32-NEXT:    slli a2, a3, 8
5034; CHECK-RV32-NEXT:    bltz a2, .LBB61_626
5035; CHECK-RV32-NEXT:    j .LBB61_93
5036; CHECK-RV32-NEXT:  .LBB61_626: # %cond.load345
5037; CHECK-RV32-NEXT:    lbu a2, 0(a0)
5038; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
5039; CHECK-RV32-NEXT:    vmv8r.v v24, v8
5040; CHECK-RV32-NEXT:    vmv.s.x v10, a2
5041; CHECK-RV32-NEXT:    li a2, 88
5042; CHECK-RV32-NEXT:    li a4, 87
5043; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
5044; CHECK-RV32-NEXT:    vslideup.vx v8, v10, a4
5045; CHECK-RV32-NEXT:    addi a0, a0, 1
5046; CHECK-RV32-NEXT:    vmv2r.v v24, v8
5047; CHECK-RV32-NEXT:    vmv8r.v v8, v24
5048; CHECK-RV32-NEXT:    slli a2, a3, 7
5049; CHECK-RV32-NEXT:    bltz a2, .LBB61_627
5050; CHECK-RV32-NEXT:    j .LBB61_94
5051; CHECK-RV32-NEXT:  .LBB61_627: # %cond.load349
5052; CHECK-RV32-NEXT:    lbu a2, 0(a0)
5053; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
5054; CHECK-RV32-NEXT:    vmv8r.v v24, v8
5055; CHECK-RV32-NEXT:    vmv.s.x v10, a2
5056; CHECK-RV32-NEXT:    li a2, 89
5057; CHECK-RV32-NEXT:    li a4, 88
5058; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
5059; CHECK-RV32-NEXT:    vslideup.vx v8, v10, a4
5060; CHECK-RV32-NEXT:    addi a0, a0, 1
5061; CHECK-RV32-NEXT:    vmv2r.v v24, v8
5062; CHECK-RV32-NEXT:    vmv8r.v v8, v24
5063; CHECK-RV32-NEXT:    slli a2, a3, 6
5064; CHECK-RV32-NEXT:    bltz a2, .LBB61_628
5065; CHECK-RV32-NEXT:    j .LBB61_95
5066; CHECK-RV32-NEXT:  .LBB61_628: # %cond.load353
5067; CHECK-RV32-NEXT:    lbu a2, 0(a0)
5068; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
5069; CHECK-RV32-NEXT:    vmv8r.v v24, v8
5070; CHECK-RV32-NEXT:    vmv.s.x v10, a2
5071; CHECK-RV32-NEXT:    li a2, 90
5072; CHECK-RV32-NEXT:    li a4, 89
5073; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
5074; CHECK-RV32-NEXT:    vslideup.vx v8, v10, a4
5075; CHECK-RV32-NEXT:    addi a0, a0, 1
5076; CHECK-RV32-NEXT:    vmv2r.v v24, v8
5077; CHECK-RV32-NEXT:    vmv8r.v v8, v24
5078; CHECK-RV32-NEXT:    slli a2, a3, 5
5079; CHECK-RV32-NEXT:    bltz a2, .LBB61_629
5080; CHECK-RV32-NEXT:    j .LBB61_96
5081; CHECK-RV32-NEXT:  .LBB61_629: # %cond.load357
5082; CHECK-RV32-NEXT:    lbu a2, 0(a0)
5083; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
5084; CHECK-RV32-NEXT:    vmv8r.v v24, v8
5085; CHECK-RV32-NEXT:    vmv.s.x v10, a2
5086; CHECK-RV32-NEXT:    li a2, 91
5087; CHECK-RV32-NEXT:    li a4, 90
5088; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
5089; CHECK-RV32-NEXT:    vslideup.vx v8, v10, a4
5090; CHECK-RV32-NEXT:    addi a0, a0, 1
5091; CHECK-RV32-NEXT:    vmv2r.v v24, v8
5092; CHECK-RV32-NEXT:    vmv8r.v v8, v24
5093; CHECK-RV32-NEXT:    slli a2, a3, 4
5094; CHECK-RV32-NEXT:    bltz a2, .LBB61_630
5095; CHECK-RV32-NEXT:    j .LBB61_97
5096; CHECK-RV32-NEXT:  .LBB61_630: # %cond.load361
5097; CHECK-RV32-NEXT:    lbu a2, 0(a0)
5098; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
5099; CHECK-RV32-NEXT:    vmv8r.v v24, v8
5100; CHECK-RV32-NEXT:    vmv.s.x v10, a2
5101; CHECK-RV32-NEXT:    li a2, 92
5102; CHECK-RV32-NEXT:    li a4, 91
5103; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
5104; CHECK-RV32-NEXT:    vslideup.vx v8, v10, a4
5105; CHECK-RV32-NEXT:    addi a0, a0, 1
5106; CHECK-RV32-NEXT:    vmv2r.v v24, v8
5107; CHECK-RV32-NEXT:    vmv8r.v v8, v24
5108; CHECK-RV32-NEXT:    slli a2, a3, 3
5109; CHECK-RV32-NEXT:    bltz a2, .LBB61_631
5110; CHECK-RV32-NEXT:    j .LBB61_98
5111; CHECK-RV32-NEXT:  .LBB61_631: # %cond.load365
5112; CHECK-RV32-NEXT:    lbu a2, 0(a0)
5113; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
5114; CHECK-RV32-NEXT:    vmv8r.v v24, v8
5115; CHECK-RV32-NEXT:    vmv.s.x v10, a2
5116; CHECK-RV32-NEXT:    li a2, 93
5117; CHECK-RV32-NEXT:    li a4, 92
5118; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
5119; CHECK-RV32-NEXT:    vslideup.vx v8, v10, a4
5120; CHECK-RV32-NEXT:    addi a0, a0, 1
5121; CHECK-RV32-NEXT:    vmv2r.v v24, v8
5122; CHECK-RV32-NEXT:    vmv8r.v v8, v24
5123; CHECK-RV32-NEXT:    slli a2, a3, 2
5124; CHECK-RV32-NEXT:    bgez a2, .LBB61_1027
5125; CHECK-RV32-NEXT:    j .LBB61_99
5126; CHECK-RV32-NEXT:  .LBB61_1027: # %cond.load365
5127; CHECK-RV32-NEXT:    j .LBB61_100
5128; CHECK-RV32-NEXT:  .LBB61_632: # %cond.load377
5129; CHECK-RV32-NEXT:    lbu a3, 0(a0)
5130; CHECK-RV32-NEXT:    vmv8r.v v16, v8
5131; CHECK-RV32-NEXT:    vmv.s.x v10, a3
5132; CHECK-RV32-NEXT:    li a3, 96
5133; CHECK-RV32-NEXT:    li a4, 95
5134; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m2, tu, ma
5135; CHECK-RV32-NEXT:    vslideup.vx v8, v10, a4
5136; CHECK-RV32-NEXT:    addi a0, a0, 1
5137; CHECK-RV32-NEXT:    vmv2r.v v16, v8
5138; CHECK-RV32-NEXT:    vmv8r.v v8, v16
5139; CHECK-RV32-NEXT:    andi a3, a2, 1
5140; CHECK-RV32-NEXT:    bnez a3, .LBB61_633
5141; CHECK-RV32-NEXT:    j .LBB61_104
5142; CHECK-RV32-NEXT:  .LBB61_633: # %cond.load381
5143; CHECK-RV32-NEXT:    lbu a3, 0(a0)
5144; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
5145; CHECK-RV32-NEXT:    vmv8r.v v16, v8
5146; CHECK-RV32-NEXT:    vmv.s.x v10, a3
5147; CHECK-RV32-NEXT:    li a3, 97
5148; CHECK-RV32-NEXT:    li a4, 96
5149; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m2, tu, ma
5150; CHECK-RV32-NEXT:    vslideup.vx v8, v10, a4
5151; CHECK-RV32-NEXT:    addi a0, a0, 1
5152; CHECK-RV32-NEXT:    vmv2r.v v16, v8
5153; CHECK-RV32-NEXT:    vmv8r.v v8, v16
5154; CHECK-RV32-NEXT:    andi a3, a2, 2
5155; CHECK-RV32-NEXT:    bnez a3, .LBB61_634
5156; CHECK-RV32-NEXT:    j .LBB61_105
5157; CHECK-RV32-NEXT:  .LBB61_634: # %cond.load385
5158; CHECK-RV32-NEXT:    lbu a3, 0(a0)
5159; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
5160; CHECK-RV32-NEXT:    vmv8r.v v16, v8
5161; CHECK-RV32-NEXT:    vmv.s.x v10, a3
5162; CHECK-RV32-NEXT:    li a3, 98
5163; CHECK-RV32-NEXT:    li a4, 97
5164; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m2, tu, ma
5165; CHECK-RV32-NEXT:    vslideup.vx v8, v10, a4
5166; CHECK-RV32-NEXT:    addi a0, a0, 1
5167; CHECK-RV32-NEXT:    vmv2r.v v16, v8
5168; CHECK-RV32-NEXT:    vmv8r.v v8, v16
5169; CHECK-RV32-NEXT:    andi a3, a2, 4
5170; CHECK-RV32-NEXT:    bnez a3, .LBB61_635
5171; CHECK-RV32-NEXT:    j .LBB61_106
5172; CHECK-RV32-NEXT:  .LBB61_635: # %cond.load389
5173; CHECK-RV32-NEXT:    lbu a3, 0(a0)
5174; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
5175; CHECK-RV32-NEXT:    vmv8r.v v16, v8
5176; CHECK-RV32-NEXT:    vmv.s.x v10, a3
5177; CHECK-RV32-NEXT:    li a3, 99
5178; CHECK-RV32-NEXT:    li a4, 98
5179; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m2, tu, ma
5180; CHECK-RV32-NEXT:    vslideup.vx v8, v10, a4
5181; CHECK-RV32-NEXT:    addi a0, a0, 1
5182; CHECK-RV32-NEXT:    vmv2r.v v16, v8
5183; CHECK-RV32-NEXT:    vmv8r.v v8, v16
5184; CHECK-RV32-NEXT:    andi a3, a2, 8
5185; CHECK-RV32-NEXT:    bnez a3, .LBB61_636
5186; CHECK-RV32-NEXT:    j .LBB61_107
5187; CHECK-RV32-NEXT:  .LBB61_636: # %cond.load393
5188; CHECK-RV32-NEXT:    lbu a3, 0(a0)
5189; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
5190; CHECK-RV32-NEXT:    vmv8r.v v16, v8
5191; CHECK-RV32-NEXT:    vmv.s.x v10, a3
5192; CHECK-RV32-NEXT:    li a3, 100
5193; CHECK-RV32-NEXT:    li a4, 99
5194; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m2, tu, ma
5195; CHECK-RV32-NEXT:    vslideup.vx v8, v10, a4
5196; CHECK-RV32-NEXT:    addi a0, a0, 1
5197; CHECK-RV32-NEXT:    vmv2r.v v16, v8
5198; CHECK-RV32-NEXT:    vmv8r.v v8, v16
5199; CHECK-RV32-NEXT:    andi a3, a2, 16
5200; CHECK-RV32-NEXT:    bnez a3, .LBB61_637
5201; CHECK-RV32-NEXT:    j .LBB61_108
5202; CHECK-RV32-NEXT:  .LBB61_637: # %cond.load397
5203; CHECK-RV32-NEXT:    lbu a3, 0(a0)
5204; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
5205; CHECK-RV32-NEXT:    vmv8r.v v16, v8
5206; CHECK-RV32-NEXT:    vmv.s.x v10, a3
5207; CHECK-RV32-NEXT:    li a3, 101
5208; CHECK-RV32-NEXT:    li a4, 100
5209; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m2, tu, ma
5210; CHECK-RV32-NEXT:    vslideup.vx v8, v10, a4
5211; CHECK-RV32-NEXT:    addi a0, a0, 1
5212; CHECK-RV32-NEXT:    vmv2r.v v16, v8
5213; CHECK-RV32-NEXT:    vmv8r.v v8, v16
5214; CHECK-RV32-NEXT:    andi a3, a2, 32
5215; CHECK-RV32-NEXT:    bnez a3, .LBB61_638
5216; CHECK-RV32-NEXT:    j .LBB61_109
5217; CHECK-RV32-NEXT:  .LBB61_638: # %cond.load401
5218; CHECK-RV32-NEXT:    lbu a3, 0(a0)
5219; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
5220; CHECK-RV32-NEXT:    vmv8r.v v16, v8
5221; CHECK-RV32-NEXT:    vmv.s.x v10, a3
5222; CHECK-RV32-NEXT:    li a3, 102
5223; CHECK-RV32-NEXT:    li a4, 101
5224; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m2, tu, ma
5225; CHECK-RV32-NEXT:    vslideup.vx v8, v10, a4
5226; CHECK-RV32-NEXT:    addi a0, a0, 1
5227; CHECK-RV32-NEXT:    vmv2r.v v16, v8
5228; CHECK-RV32-NEXT:    vmv8r.v v8, v16
5229; CHECK-RV32-NEXT:    andi a3, a2, 64
5230; CHECK-RV32-NEXT:    bnez a3, .LBB61_639
5231; CHECK-RV32-NEXT:    j .LBB61_110
5232; CHECK-RV32-NEXT:  .LBB61_639: # %cond.load405
5233; CHECK-RV32-NEXT:    lbu a3, 0(a0)
5234; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
5235; CHECK-RV32-NEXT:    vmv8r.v v16, v8
5236; CHECK-RV32-NEXT:    vmv.s.x v10, a3
5237; CHECK-RV32-NEXT:    li a3, 103
5238; CHECK-RV32-NEXT:    li a4, 102
5239; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m2, tu, ma
5240; CHECK-RV32-NEXT:    vslideup.vx v8, v10, a4
5241; CHECK-RV32-NEXT:    addi a0, a0, 1
5242; CHECK-RV32-NEXT:    vmv2r.v v16, v8
5243; CHECK-RV32-NEXT:    vmv8r.v v8, v16
5244; CHECK-RV32-NEXT:    andi a3, a2, 128
5245; CHECK-RV32-NEXT:    bnez a3, .LBB61_640
5246; CHECK-RV32-NEXT:    j .LBB61_111
5247; CHECK-RV32-NEXT:  .LBB61_640: # %cond.load409
5248; CHECK-RV32-NEXT:    lbu a3, 0(a0)
5249; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
5250; CHECK-RV32-NEXT:    vmv8r.v v16, v8
5251; CHECK-RV32-NEXT:    vmv.s.x v10, a3
5252; CHECK-RV32-NEXT:    li a3, 104
5253; CHECK-RV32-NEXT:    li a4, 103
5254; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m2, tu, ma
5255; CHECK-RV32-NEXT:    vslideup.vx v8, v10, a4
5256; CHECK-RV32-NEXT:    addi a0, a0, 1
5257; CHECK-RV32-NEXT:    vmv2r.v v16, v8
5258; CHECK-RV32-NEXT:    vmv8r.v v8, v16
5259; CHECK-RV32-NEXT:    andi a3, a2, 256
5260; CHECK-RV32-NEXT:    bnez a3, .LBB61_641
5261; CHECK-RV32-NEXT:    j .LBB61_112
5262; CHECK-RV32-NEXT:  .LBB61_641: # %cond.load413
5263; CHECK-RV32-NEXT:    lbu a3, 0(a0)
5264; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
5265; CHECK-RV32-NEXT:    vmv8r.v v16, v8
5266; CHECK-RV32-NEXT:    vmv.s.x v10, a3
5267; CHECK-RV32-NEXT:    li a3, 105
5268; CHECK-RV32-NEXT:    li a4, 104
5269; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m2, tu, ma
5270; CHECK-RV32-NEXT:    vslideup.vx v8, v10, a4
5271; CHECK-RV32-NEXT:    addi a0, a0, 1
5272; CHECK-RV32-NEXT:    vmv2r.v v16, v8
5273; CHECK-RV32-NEXT:    vmv8r.v v8, v16
5274; CHECK-RV32-NEXT:    andi a3, a2, 512
5275; CHECK-RV32-NEXT:    bnez a3, .LBB61_642
5276; CHECK-RV32-NEXT:    j .LBB61_113
5277; CHECK-RV32-NEXT:  .LBB61_642: # %cond.load417
5278; CHECK-RV32-NEXT:    lbu a3, 0(a0)
5279; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
5280; CHECK-RV32-NEXT:    vmv8r.v v16, v8
5281; CHECK-RV32-NEXT:    vmv.s.x v10, a3
5282; CHECK-RV32-NEXT:    li a3, 106
5283; CHECK-RV32-NEXT:    li a4, 105
5284; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m2, tu, ma
5285; CHECK-RV32-NEXT:    vslideup.vx v8, v10, a4
5286; CHECK-RV32-NEXT:    addi a0, a0, 1
5287; CHECK-RV32-NEXT:    vmv2r.v v16, v8
5288; CHECK-RV32-NEXT:    vmv8r.v v8, v16
5289; CHECK-RV32-NEXT:    andi a3, a2, 1024
5290; CHECK-RV32-NEXT:    bnez a3, .LBB61_643
5291; CHECK-RV32-NEXT:    j .LBB61_114
5292; CHECK-RV32-NEXT:  .LBB61_643: # %cond.load421
5293; CHECK-RV32-NEXT:    lbu a3, 0(a0)
5294; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
5295; CHECK-RV32-NEXT:    vmv8r.v v16, v8
5296; CHECK-RV32-NEXT:    vmv.s.x v10, a3
5297; CHECK-RV32-NEXT:    li a3, 107
5298; CHECK-RV32-NEXT:    li a4, 106
5299; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m2, tu, ma
5300; CHECK-RV32-NEXT:    vslideup.vx v8, v10, a4
5301; CHECK-RV32-NEXT:    addi a0, a0, 1
5302; CHECK-RV32-NEXT:    vmv2r.v v16, v8
5303; CHECK-RV32-NEXT:    vmv8r.v v8, v16
5304; CHECK-RV32-NEXT:    slli a3, a2, 20
5305; CHECK-RV32-NEXT:    bltz a3, .LBB61_644
5306; CHECK-RV32-NEXT:    j .LBB61_115
5307; CHECK-RV32-NEXT:  .LBB61_644: # %cond.load425
5308; CHECK-RV32-NEXT:    lbu a3, 0(a0)
5309; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
5310; CHECK-RV32-NEXT:    vmv8r.v v16, v8
5311; CHECK-RV32-NEXT:    vmv.s.x v10, a3
5312; CHECK-RV32-NEXT:    li a3, 108
5313; CHECK-RV32-NEXT:    li a4, 107
5314; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m2, tu, ma
5315; CHECK-RV32-NEXT:    vslideup.vx v8, v10, a4
5316; CHECK-RV32-NEXT:    addi a0, a0, 1
5317; CHECK-RV32-NEXT:    vmv2r.v v16, v8
5318; CHECK-RV32-NEXT:    vmv8r.v v8, v16
5319; CHECK-RV32-NEXT:    slli a3, a2, 19
5320; CHECK-RV32-NEXT:    bltz a3, .LBB61_645
5321; CHECK-RV32-NEXT:    j .LBB61_116
5322; CHECK-RV32-NEXT:  .LBB61_645: # %cond.load429
5323; CHECK-RV32-NEXT:    lbu a3, 0(a0)
5324; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
5325; CHECK-RV32-NEXT:    vmv8r.v v16, v8
5326; CHECK-RV32-NEXT:    vmv.s.x v10, a3
5327; CHECK-RV32-NEXT:    li a3, 109
5328; CHECK-RV32-NEXT:    li a4, 108
5329; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m2, tu, ma
5330; CHECK-RV32-NEXT:    vslideup.vx v8, v10, a4
5331; CHECK-RV32-NEXT:    addi a0, a0, 1
5332; CHECK-RV32-NEXT:    vmv2r.v v16, v8
5333; CHECK-RV32-NEXT:    vmv8r.v v8, v16
5334; CHECK-RV32-NEXT:    slli a3, a2, 18
5335; CHECK-RV32-NEXT:    bltz a3, .LBB61_646
5336; CHECK-RV32-NEXT:    j .LBB61_117
5337; CHECK-RV32-NEXT:  .LBB61_646: # %cond.load433
5338; CHECK-RV32-NEXT:    lbu a3, 0(a0)
5339; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
5340; CHECK-RV32-NEXT:    vmv8r.v v16, v8
5341; CHECK-RV32-NEXT:    vmv.s.x v10, a3
5342; CHECK-RV32-NEXT:    li a3, 110
5343; CHECK-RV32-NEXT:    li a4, 109
5344; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m2, tu, ma
5345; CHECK-RV32-NEXT:    vslideup.vx v8, v10, a4
5346; CHECK-RV32-NEXT:    addi a0, a0, 1
5347; CHECK-RV32-NEXT:    vmv2r.v v16, v8
5348; CHECK-RV32-NEXT:    vmv8r.v v8, v16
5349; CHECK-RV32-NEXT:    slli a3, a2, 17
5350; CHECK-RV32-NEXT:    bltz a3, .LBB61_647
5351; CHECK-RV32-NEXT:    j .LBB61_118
5352; CHECK-RV32-NEXT:  .LBB61_647: # %cond.load437
5353; CHECK-RV32-NEXT:    lbu a3, 0(a0)
5354; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
5355; CHECK-RV32-NEXT:    vmv8r.v v16, v8
5356; CHECK-RV32-NEXT:    vmv.s.x v10, a3
5357; CHECK-RV32-NEXT:    li a3, 111
5358; CHECK-RV32-NEXT:    li a4, 110
5359; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m2, tu, ma
5360; CHECK-RV32-NEXT:    vslideup.vx v8, v10, a4
5361; CHECK-RV32-NEXT:    addi a0, a0, 1
5362; CHECK-RV32-NEXT:    vmv2r.v v16, v8
5363; CHECK-RV32-NEXT:    vmv8r.v v8, v16
5364; CHECK-RV32-NEXT:    slli a3, a2, 16
5365; CHECK-RV32-NEXT:    bltz a3, .LBB61_648
5366; CHECK-RV32-NEXT:    j .LBB61_119
5367; CHECK-RV32-NEXT:  .LBB61_648: # %cond.load441
5368; CHECK-RV32-NEXT:    lbu a3, 0(a0)
5369; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
5370; CHECK-RV32-NEXT:    vmv8r.v v16, v8
5371; CHECK-RV32-NEXT:    vmv.s.x v10, a3
5372; CHECK-RV32-NEXT:    li a3, 112
5373; CHECK-RV32-NEXT:    li a4, 111
5374; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m2, tu, ma
5375; CHECK-RV32-NEXT:    vslideup.vx v8, v10, a4
5376; CHECK-RV32-NEXT:    addi a0, a0, 1
5377; CHECK-RV32-NEXT:    vmv2r.v v16, v8
5378; CHECK-RV32-NEXT:    vmv8r.v v8, v16
5379; CHECK-RV32-NEXT:    slli a3, a2, 15
5380; CHECK-RV32-NEXT:    bltz a3, .LBB61_649
5381; CHECK-RV32-NEXT:    j .LBB61_120
5382; CHECK-RV32-NEXT:  .LBB61_649: # %cond.load445
5383; CHECK-RV32-NEXT:    lbu a3, 0(a0)
5384; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
5385; CHECK-RV32-NEXT:    vmv8r.v v16, v8
5386; CHECK-RV32-NEXT:    vmv.s.x v10, a3
5387; CHECK-RV32-NEXT:    li a3, 113
5388; CHECK-RV32-NEXT:    li a4, 112
5389; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m2, tu, ma
5390; CHECK-RV32-NEXT:    vslideup.vx v8, v10, a4
5391; CHECK-RV32-NEXT:    addi a0, a0, 1
5392; CHECK-RV32-NEXT:    vmv2r.v v16, v8
5393; CHECK-RV32-NEXT:    vmv8r.v v8, v16
5394; CHECK-RV32-NEXT:    slli a3, a2, 14
5395; CHECK-RV32-NEXT:    bltz a3, .LBB61_650
5396; CHECK-RV32-NEXT:    j .LBB61_121
5397; CHECK-RV32-NEXT:  .LBB61_650: # %cond.load449
5398; CHECK-RV32-NEXT:    lbu a3, 0(a0)
5399; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
5400; CHECK-RV32-NEXT:    vmv8r.v v16, v8
5401; CHECK-RV32-NEXT:    vmv.s.x v10, a3
5402; CHECK-RV32-NEXT:    li a3, 114
5403; CHECK-RV32-NEXT:    li a4, 113
5404; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m2, tu, ma
5405; CHECK-RV32-NEXT:    vslideup.vx v8, v10, a4
5406; CHECK-RV32-NEXT:    addi a0, a0, 1
5407; CHECK-RV32-NEXT:    vmv2r.v v16, v8
5408; CHECK-RV32-NEXT:    vmv8r.v v8, v16
5409; CHECK-RV32-NEXT:    slli a3, a2, 13
5410; CHECK-RV32-NEXT:    bltz a3, .LBB61_651
5411; CHECK-RV32-NEXT:    j .LBB61_122
5412; CHECK-RV32-NEXT:  .LBB61_651: # %cond.load453
5413; CHECK-RV32-NEXT:    lbu a3, 0(a0)
5414; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
5415; CHECK-RV32-NEXT:    vmv8r.v v16, v8
5416; CHECK-RV32-NEXT:    vmv.s.x v10, a3
5417; CHECK-RV32-NEXT:    li a3, 115
5418; CHECK-RV32-NEXT:    li a4, 114
5419; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m2, tu, ma
5420; CHECK-RV32-NEXT:    vslideup.vx v8, v10, a4
5421; CHECK-RV32-NEXT:    addi a0, a0, 1
5422; CHECK-RV32-NEXT:    vmv2r.v v16, v8
5423; CHECK-RV32-NEXT:    vmv8r.v v8, v16
5424; CHECK-RV32-NEXT:    slli a3, a2, 12
5425; CHECK-RV32-NEXT:    bltz a3, .LBB61_652
5426; CHECK-RV32-NEXT:    j .LBB61_123
5427; CHECK-RV32-NEXT:  .LBB61_652: # %cond.load457
5428; CHECK-RV32-NEXT:    lbu a3, 0(a0)
5429; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
5430; CHECK-RV32-NEXT:    vmv8r.v v16, v8
5431; CHECK-RV32-NEXT:    vmv.s.x v10, a3
5432; CHECK-RV32-NEXT:    li a3, 116
5433; CHECK-RV32-NEXT:    li a4, 115
5434; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m2, tu, ma
5435; CHECK-RV32-NEXT:    vslideup.vx v8, v10, a4
5436; CHECK-RV32-NEXT:    addi a0, a0, 1
5437; CHECK-RV32-NEXT:    vmv2r.v v16, v8
5438; CHECK-RV32-NEXT:    vmv8r.v v8, v16
5439; CHECK-RV32-NEXT:    slli a3, a2, 11
5440; CHECK-RV32-NEXT:    bltz a3, .LBB61_653
5441; CHECK-RV32-NEXT:    j .LBB61_124
5442; CHECK-RV32-NEXT:  .LBB61_653: # %cond.load461
5443; CHECK-RV32-NEXT:    lbu a3, 0(a0)
5444; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
5445; CHECK-RV32-NEXT:    vmv8r.v v16, v8
5446; CHECK-RV32-NEXT:    vmv.s.x v10, a3
5447; CHECK-RV32-NEXT:    li a3, 117
5448; CHECK-RV32-NEXT:    li a4, 116
5449; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m2, tu, ma
5450; CHECK-RV32-NEXT:    vslideup.vx v8, v10, a4
5451; CHECK-RV32-NEXT:    addi a0, a0, 1
5452; CHECK-RV32-NEXT:    vmv2r.v v16, v8
5453; CHECK-RV32-NEXT:    vmv8r.v v8, v16
5454; CHECK-RV32-NEXT:    slli a3, a2, 10
5455; CHECK-RV32-NEXT:    bltz a3, .LBB61_654
5456; CHECK-RV32-NEXT:    j .LBB61_125
5457; CHECK-RV32-NEXT:  .LBB61_654: # %cond.load465
5458; CHECK-RV32-NEXT:    lbu a3, 0(a0)
5459; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
5460; CHECK-RV32-NEXT:    vmv8r.v v16, v8
5461; CHECK-RV32-NEXT:    vmv.s.x v10, a3
5462; CHECK-RV32-NEXT:    li a3, 118
5463; CHECK-RV32-NEXT:    li a4, 117
5464; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m2, tu, ma
5465; CHECK-RV32-NEXT:    vslideup.vx v8, v10, a4
5466; CHECK-RV32-NEXT:    addi a0, a0, 1
5467; CHECK-RV32-NEXT:    vmv2r.v v16, v8
5468; CHECK-RV32-NEXT:    vmv8r.v v8, v16
5469; CHECK-RV32-NEXT:    slli a3, a2, 9
5470; CHECK-RV32-NEXT:    bltz a3, .LBB61_655
5471; CHECK-RV32-NEXT:    j .LBB61_126
5472; CHECK-RV32-NEXT:  .LBB61_655: # %cond.load469
5473; CHECK-RV32-NEXT:    lbu a3, 0(a0)
5474; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
5475; CHECK-RV32-NEXT:    vmv8r.v v16, v8
5476; CHECK-RV32-NEXT:    vmv.s.x v10, a3
5477; CHECK-RV32-NEXT:    li a3, 119
5478; CHECK-RV32-NEXT:    li a4, 118
5479; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m2, tu, ma
5480; CHECK-RV32-NEXT:    vslideup.vx v8, v10, a4
5481; CHECK-RV32-NEXT:    addi a0, a0, 1
5482; CHECK-RV32-NEXT:    vmv2r.v v16, v8
5483; CHECK-RV32-NEXT:    vmv8r.v v8, v16
5484; CHECK-RV32-NEXT:    slli a3, a2, 8
5485; CHECK-RV32-NEXT:    bltz a3, .LBB61_656
5486; CHECK-RV32-NEXT:    j .LBB61_127
5487; CHECK-RV32-NEXT:  .LBB61_656: # %cond.load473
5488; CHECK-RV32-NEXT:    lbu a3, 0(a0)
5489; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
5490; CHECK-RV32-NEXT:    vmv8r.v v16, v8
5491; CHECK-RV32-NEXT:    vmv.s.x v10, a3
5492; CHECK-RV32-NEXT:    li a3, 120
5493; CHECK-RV32-NEXT:    li a4, 119
5494; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m2, tu, ma
5495; CHECK-RV32-NEXT:    vslideup.vx v8, v10, a4
5496; CHECK-RV32-NEXT:    addi a0, a0, 1
5497; CHECK-RV32-NEXT:    vmv2r.v v16, v8
5498; CHECK-RV32-NEXT:    vmv8r.v v8, v16
5499; CHECK-RV32-NEXT:    slli a3, a2, 7
5500; CHECK-RV32-NEXT:    bltz a3, .LBB61_657
5501; CHECK-RV32-NEXT:    j .LBB61_128
5502; CHECK-RV32-NEXT:  .LBB61_657: # %cond.load477
5503; CHECK-RV32-NEXT:    lbu a3, 0(a0)
5504; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
5505; CHECK-RV32-NEXT:    vmv8r.v v16, v8
5506; CHECK-RV32-NEXT:    vmv.s.x v10, a3
5507; CHECK-RV32-NEXT:    li a3, 121
5508; CHECK-RV32-NEXT:    li a4, 120
5509; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m2, tu, ma
5510; CHECK-RV32-NEXT:    vslideup.vx v8, v10, a4
5511; CHECK-RV32-NEXT:    addi a0, a0, 1
5512; CHECK-RV32-NEXT:    vmv2r.v v16, v8
5513; CHECK-RV32-NEXT:    vmv8r.v v8, v16
5514; CHECK-RV32-NEXT:    slli a3, a2, 6
5515; CHECK-RV32-NEXT:    bltz a3, .LBB61_658
5516; CHECK-RV32-NEXT:    j .LBB61_129
5517; CHECK-RV32-NEXT:  .LBB61_658: # %cond.load481
5518; CHECK-RV32-NEXT:    lbu a3, 0(a0)
5519; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
5520; CHECK-RV32-NEXT:    vmv8r.v v16, v8
5521; CHECK-RV32-NEXT:    vmv.s.x v10, a3
5522; CHECK-RV32-NEXT:    li a3, 122
5523; CHECK-RV32-NEXT:    li a4, 121
5524; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m2, tu, ma
5525; CHECK-RV32-NEXT:    vslideup.vx v8, v10, a4
5526; CHECK-RV32-NEXT:    addi a0, a0, 1
5527; CHECK-RV32-NEXT:    vmv2r.v v16, v8
5528; CHECK-RV32-NEXT:    vmv8r.v v8, v16
5529; CHECK-RV32-NEXT:    slli a3, a2, 5
5530; CHECK-RV32-NEXT:    bltz a3, .LBB61_659
5531; CHECK-RV32-NEXT:    j .LBB61_130
5532; CHECK-RV32-NEXT:  .LBB61_659: # %cond.load485
5533; CHECK-RV32-NEXT:    lbu a3, 0(a0)
5534; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
5535; CHECK-RV32-NEXT:    vmv8r.v v16, v8
5536; CHECK-RV32-NEXT:    vmv.s.x v10, a3
5537; CHECK-RV32-NEXT:    li a3, 123
5538; CHECK-RV32-NEXT:    li a4, 122
5539; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m2, tu, ma
5540; CHECK-RV32-NEXT:    vslideup.vx v8, v10, a4
5541; CHECK-RV32-NEXT:    addi a0, a0, 1
5542; CHECK-RV32-NEXT:    vmv2r.v v16, v8
5543; CHECK-RV32-NEXT:    vmv8r.v v8, v16
5544; CHECK-RV32-NEXT:    slli a3, a2, 4
5545; CHECK-RV32-NEXT:    bltz a3, .LBB61_660
5546; CHECK-RV32-NEXT:    j .LBB61_131
5547; CHECK-RV32-NEXT:  .LBB61_660: # %cond.load489
5548; CHECK-RV32-NEXT:    lbu a3, 0(a0)
5549; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
5550; CHECK-RV32-NEXT:    vmv8r.v v16, v8
5551; CHECK-RV32-NEXT:    vmv.s.x v10, a3
5552; CHECK-RV32-NEXT:    li a3, 124
5553; CHECK-RV32-NEXT:    li a4, 123
5554; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m2, tu, ma
5555; CHECK-RV32-NEXT:    vslideup.vx v8, v10, a4
5556; CHECK-RV32-NEXT:    addi a0, a0, 1
5557; CHECK-RV32-NEXT:    vmv2r.v v16, v8
5558; CHECK-RV32-NEXT:    vmv8r.v v8, v16
5559; CHECK-RV32-NEXT:    slli a3, a2, 3
5560; CHECK-RV32-NEXT:    bltz a3, .LBB61_661
5561; CHECK-RV32-NEXT:    j .LBB61_132
5562; CHECK-RV32-NEXT:  .LBB61_661: # %cond.load493
5563; CHECK-RV32-NEXT:    lbu a3, 0(a0)
5564; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
5565; CHECK-RV32-NEXT:    vmv8r.v v16, v8
5566; CHECK-RV32-NEXT:    vmv.s.x v10, a3
5567; CHECK-RV32-NEXT:    li a3, 125
5568; CHECK-RV32-NEXT:    li a4, 124
5569; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m2, tu, ma
5570; CHECK-RV32-NEXT:    vslideup.vx v8, v10, a4
5571; CHECK-RV32-NEXT:    addi a0, a0, 1
5572; CHECK-RV32-NEXT:    vmv2r.v v16, v8
5573; CHECK-RV32-NEXT:    vmv8r.v v8, v16
5574; CHECK-RV32-NEXT:    slli a3, a2, 2
5575; CHECK-RV32-NEXT:    bgez a3, .LBB61_1028
5576; CHECK-RV32-NEXT:    j .LBB61_133
5577; CHECK-RV32-NEXT:  .LBB61_1028: # %cond.load493
5578; CHECK-RV32-NEXT:    j .LBB61_134
5579; CHECK-RV32-NEXT:  .LBB61_662: # %cond.load505
5580; CHECK-RV32-NEXT:    lbu a2, 0(a0)
5581; CHECK-RV32-NEXT:    vmv8r.v v24, v8
5582; CHECK-RV32-NEXT:    vmv.s.x v10, a2
5583; CHECK-RV32-NEXT:    li a2, 128
5584; CHECK-RV32-NEXT:    li a4, 127
5585; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
5586; CHECK-RV32-NEXT:    vslideup.vx v8, v10, a4
5587; CHECK-RV32-NEXT:    addi a0, a0, 1
5588; CHECK-RV32-NEXT:    vmv2r.v v24, v8
5589; CHECK-RV32-NEXT:    vmv8r.v v8, v24
5590; CHECK-RV32-NEXT:    andi a2, a3, 1
5591; CHECK-RV32-NEXT:    bnez a2, .LBB61_663
5592; CHECK-RV32-NEXT:    j .LBB61_138
5593; CHECK-RV32-NEXT:  .LBB61_663: # %cond.load509
5594; CHECK-RV32-NEXT:    lbu a2, 0(a0)
5595; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
5596; CHECK-RV32-NEXT:    vmv8r.v v24, v8
5597; CHECK-RV32-NEXT:    vmv.s.x v12, a2
5598; CHECK-RV32-NEXT:    li a2, 129
5599; CHECK-RV32-NEXT:    li a4, 128
5600; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
5601; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
5602; CHECK-RV32-NEXT:    addi a0, a0, 1
5603; CHECK-RV32-NEXT:    vmv4r.v v24, v8
5604; CHECK-RV32-NEXT:    vmv8r.v v8, v24
5605; CHECK-RV32-NEXT:    andi a2, a3, 2
5606; CHECK-RV32-NEXT:    bnez a2, .LBB61_664
5607; CHECK-RV32-NEXT:    j .LBB61_139
5608; CHECK-RV32-NEXT:  .LBB61_664: # %cond.load513
5609; CHECK-RV32-NEXT:    lbu a2, 0(a0)
5610; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
5611; CHECK-RV32-NEXT:    vmv8r.v v24, v8
5612; CHECK-RV32-NEXT:    vmv.s.x v12, a2
5613; CHECK-RV32-NEXT:    li a2, 130
5614; CHECK-RV32-NEXT:    li a4, 129
5615; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
5616; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
5617; CHECK-RV32-NEXT:    addi a0, a0, 1
5618; CHECK-RV32-NEXT:    vmv4r.v v24, v8
5619; CHECK-RV32-NEXT:    vmv8r.v v8, v24
5620; CHECK-RV32-NEXT:    andi a2, a3, 4
5621; CHECK-RV32-NEXT:    bnez a2, .LBB61_665
5622; CHECK-RV32-NEXT:    j .LBB61_140
5623; CHECK-RV32-NEXT:  .LBB61_665: # %cond.load517
5624; CHECK-RV32-NEXT:    lbu a2, 0(a0)
5625; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
5626; CHECK-RV32-NEXT:    vmv8r.v v24, v8
5627; CHECK-RV32-NEXT:    vmv.s.x v12, a2
5628; CHECK-RV32-NEXT:    li a2, 131
5629; CHECK-RV32-NEXT:    li a4, 130
5630; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
5631; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
5632; CHECK-RV32-NEXT:    addi a0, a0, 1
5633; CHECK-RV32-NEXT:    vmv4r.v v24, v8
5634; CHECK-RV32-NEXT:    vmv8r.v v8, v24
5635; CHECK-RV32-NEXT:    andi a2, a3, 8
5636; CHECK-RV32-NEXT:    bnez a2, .LBB61_666
5637; CHECK-RV32-NEXT:    j .LBB61_141
5638; CHECK-RV32-NEXT:  .LBB61_666: # %cond.load521
5639; CHECK-RV32-NEXT:    lbu a2, 0(a0)
5640; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
5641; CHECK-RV32-NEXT:    vmv8r.v v24, v8
5642; CHECK-RV32-NEXT:    vmv.s.x v12, a2
5643; CHECK-RV32-NEXT:    li a2, 132
5644; CHECK-RV32-NEXT:    li a4, 131
5645; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
5646; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
5647; CHECK-RV32-NEXT:    addi a0, a0, 1
5648; CHECK-RV32-NEXT:    vmv4r.v v24, v8
5649; CHECK-RV32-NEXT:    vmv8r.v v8, v24
5650; CHECK-RV32-NEXT:    andi a2, a3, 16
5651; CHECK-RV32-NEXT:    bnez a2, .LBB61_667
5652; CHECK-RV32-NEXT:    j .LBB61_142
5653; CHECK-RV32-NEXT:  .LBB61_667: # %cond.load525
5654; CHECK-RV32-NEXT:    lbu a2, 0(a0)
5655; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
5656; CHECK-RV32-NEXT:    vmv8r.v v24, v8
5657; CHECK-RV32-NEXT:    vmv.s.x v12, a2
5658; CHECK-RV32-NEXT:    li a2, 133
5659; CHECK-RV32-NEXT:    li a4, 132
5660; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
5661; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
5662; CHECK-RV32-NEXT:    addi a0, a0, 1
5663; CHECK-RV32-NEXT:    vmv4r.v v24, v8
5664; CHECK-RV32-NEXT:    vmv8r.v v8, v24
5665; CHECK-RV32-NEXT:    andi a2, a3, 32
5666; CHECK-RV32-NEXT:    bnez a2, .LBB61_668
5667; CHECK-RV32-NEXT:    j .LBB61_143
5668; CHECK-RV32-NEXT:  .LBB61_668: # %cond.load529
5669; CHECK-RV32-NEXT:    lbu a2, 0(a0)
5670; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
5671; CHECK-RV32-NEXT:    vmv8r.v v24, v8
5672; CHECK-RV32-NEXT:    vmv.s.x v12, a2
5673; CHECK-RV32-NEXT:    li a2, 134
5674; CHECK-RV32-NEXT:    li a4, 133
5675; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
5676; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
5677; CHECK-RV32-NEXT:    addi a0, a0, 1
5678; CHECK-RV32-NEXT:    vmv4r.v v24, v8
5679; CHECK-RV32-NEXT:    vmv8r.v v8, v24
5680; CHECK-RV32-NEXT:    andi a2, a3, 64
5681; CHECK-RV32-NEXT:    bnez a2, .LBB61_669
5682; CHECK-RV32-NEXT:    j .LBB61_144
5683; CHECK-RV32-NEXT:  .LBB61_669: # %cond.load533
5684; CHECK-RV32-NEXT:    lbu a2, 0(a0)
5685; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
5686; CHECK-RV32-NEXT:    vmv8r.v v24, v8
5687; CHECK-RV32-NEXT:    vmv.s.x v12, a2
5688; CHECK-RV32-NEXT:    li a2, 135
5689; CHECK-RV32-NEXT:    li a4, 134
5690; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
5691; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
5692; CHECK-RV32-NEXT:    addi a0, a0, 1
5693; CHECK-RV32-NEXT:    vmv4r.v v24, v8
5694; CHECK-RV32-NEXT:    vmv8r.v v8, v24
5695; CHECK-RV32-NEXT:    andi a2, a3, 128
5696; CHECK-RV32-NEXT:    bnez a2, .LBB61_670
5697; CHECK-RV32-NEXT:    j .LBB61_145
5698; CHECK-RV32-NEXT:  .LBB61_670: # %cond.load537
5699; CHECK-RV32-NEXT:    lbu a2, 0(a0)
5700; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
5701; CHECK-RV32-NEXT:    vmv8r.v v24, v8
5702; CHECK-RV32-NEXT:    vmv.s.x v12, a2
5703; CHECK-RV32-NEXT:    li a2, 136
5704; CHECK-RV32-NEXT:    li a4, 135
5705; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
5706; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
5707; CHECK-RV32-NEXT:    addi a0, a0, 1
5708; CHECK-RV32-NEXT:    vmv4r.v v24, v8
5709; CHECK-RV32-NEXT:    vmv8r.v v8, v24
5710; CHECK-RV32-NEXT:    andi a2, a3, 256
5711; CHECK-RV32-NEXT:    bnez a2, .LBB61_671
5712; CHECK-RV32-NEXT:    j .LBB61_146
5713; CHECK-RV32-NEXT:  .LBB61_671: # %cond.load541
5714; CHECK-RV32-NEXT:    lbu a2, 0(a0)
5715; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
5716; CHECK-RV32-NEXT:    vmv8r.v v24, v8
5717; CHECK-RV32-NEXT:    vmv.s.x v12, a2
5718; CHECK-RV32-NEXT:    li a2, 137
5719; CHECK-RV32-NEXT:    li a4, 136
5720; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
5721; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
5722; CHECK-RV32-NEXT:    addi a0, a0, 1
5723; CHECK-RV32-NEXT:    vmv4r.v v24, v8
5724; CHECK-RV32-NEXT:    vmv8r.v v8, v24
5725; CHECK-RV32-NEXT:    andi a2, a3, 512
5726; CHECK-RV32-NEXT:    bnez a2, .LBB61_672
5727; CHECK-RV32-NEXT:    j .LBB61_147
5728; CHECK-RV32-NEXT:  .LBB61_672: # %cond.load545
5729; CHECK-RV32-NEXT:    lbu a2, 0(a0)
5730; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
5731; CHECK-RV32-NEXT:    vmv8r.v v24, v8
5732; CHECK-RV32-NEXT:    vmv.s.x v12, a2
5733; CHECK-RV32-NEXT:    li a2, 138
5734; CHECK-RV32-NEXT:    li a4, 137
5735; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
5736; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
5737; CHECK-RV32-NEXT:    addi a0, a0, 1
5738; CHECK-RV32-NEXT:    vmv4r.v v24, v8
5739; CHECK-RV32-NEXT:    vmv8r.v v8, v24
5740; CHECK-RV32-NEXT:    andi a2, a3, 1024
5741; CHECK-RV32-NEXT:    bnez a2, .LBB61_673
5742; CHECK-RV32-NEXT:    j .LBB61_148
5743; CHECK-RV32-NEXT:  .LBB61_673: # %cond.load549
5744; CHECK-RV32-NEXT:    lbu a2, 0(a0)
5745; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
5746; CHECK-RV32-NEXT:    vmv8r.v v24, v8
5747; CHECK-RV32-NEXT:    vmv.s.x v12, a2
5748; CHECK-RV32-NEXT:    li a2, 139
5749; CHECK-RV32-NEXT:    li a4, 138
5750; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
5751; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
5752; CHECK-RV32-NEXT:    addi a0, a0, 1
5753; CHECK-RV32-NEXT:    vmv4r.v v24, v8
5754; CHECK-RV32-NEXT:    vmv8r.v v8, v24
5755; CHECK-RV32-NEXT:    slli a2, a3, 20
5756; CHECK-RV32-NEXT:    bltz a2, .LBB61_674
5757; CHECK-RV32-NEXT:    j .LBB61_149
5758; CHECK-RV32-NEXT:  .LBB61_674: # %cond.load553
5759; CHECK-RV32-NEXT:    lbu a2, 0(a0)
5760; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
5761; CHECK-RV32-NEXT:    vmv8r.v v24, v8
5762; CHECK-RV32-NEXT:    vmv.s.x v12, a2
5763; CHECK-RV32-NEXT:    li a2, 140
5764; CHECK-RV32-NEXT:    li a4, 139
5765; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
5766; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
5767; CHECK-RV32-NEXT:    addi a0, a0, 1
5768; CHECK-RV32-NEXT:    vmv4r.v v24, v8
5769; CHECK-RV32-NEXT:    vmv8r.v v8, v24
5770; CHECK-RV32-NEXT:    slli a2, a3, 19
5771; CHECK-RV32-NEXT:    bltz a2, .LBB61_675
5772; CHECK-RV32-NEXT:    j .LBB61_150
5773; CHECK-RV32-NEXT:  .LBB61_675: # %cond.load557
5774; CHECK-RV32-NEXT:    lbu a2, 0(a0)
5775; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
5776; CHECK-RV32-NEXT:    vmv8r.v v24, v8
5777; CHECK-RV32-NEXT:    vmv.s.x v12, a2
5778; CHECK-RV32-NEXT:    li a2, 141
5779; CHECK-RV32-NEXT:    li a4, 140
5780; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
5781; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
5782; CHECK-RV32-NEXT:    addi a0, a0, 1
5783; CHECK-RV32-NEXT:    vmv4r.v v24, v8
5784; CHECK-RV32-NEXT:    vmv8r.v v8, v24
5785; CHECK-RV32-NEXT:    slli a2, a3, 18
5786; CHECK-RV32-NEXT:    bltz a2, .LBB61_676
5787; CHECK-RV32-NEXT:    j .LBB61_151
5788; CHECK-RV32-NEXT:  .LBB61_676: # %cond.load561
5789; CHECK-RV32-NEXT:    lbu a2, 0(a0)
5790; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
5791; CHECK-RV32-NEXT:    vmv8r.v v24, v8
5792; CHECK-RV32-NEXT:    vmv.s.x v12, a2
5793; CHECK-RV32-NEXT:    li a2, 142
5794; CHECK-RV32-NEXT:    li a4, 141
5795; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
5796; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
5797; CHECK-RV32-NEXT:    addi a0, a0, 1
5798; CHECK-RV32-NEXT:    vmv4r.v v24, v8
5799; CHECK-RV32-NEXT:    vmv8r.v v8, v24
5800; CHECK-RV32-NEXT:    slli a2, a3, 17
5801; CHECK-RV32-NEXT:    bltz a2, .LBB61_677
5802; CHECK-RV32-NEXT:    j .LBB61_152
5803; CHECK-RV32-NEXT:  .LBB61_677: # %cond.load565
5804; CHECK-RV32-NEXT:    lbu a2, 0(a0)
5805; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
5806; CHECK-RV32-NEXT:    vmv8r.v v24, v8
5807; CHECK-RV32-NEXT:    vmv.s.x v12, a2
5808; CHECK-RV32-NEXT:    li a2, 143
5809; CHECK-RV32-NEXT:    li a4, 142
5810; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
5811; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
5812; CHECK-RV32-NEXT:    addi a0, a0, 1
5813; CHECK-RV32-NEXT:    vmv4r.v v24, v8
5814; CHECK-RV32-NEXT:    vmv8r.v v8, v24
5815; CHECK-RV32-NEXT:    slli a2, a3, 16
5816; CHECK-RV32-NEXT:    bltz a2, .LBB61_678
5817; CHECK-RV32-NEXT:    j .LBB61_153
5818; CHECK-RV32-NEXT:  .LBB61_678: # %cond.load569
5819; CHECK-RV32-NEXT:    lbu a2, 0(a0)
5820; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
5821; CHECK-RV32-NEXT:    vmv8r.v v24, v8
5822; CHECK-RV32-NEXT:    vmv.s.x v12, a2
5823; CHECK-RV32-NEXT:    li a2, 144
5824; CHECK-RV32-NEXT:    li a4, 143
5825; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
5826; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
5827; CHECK-RV32-NEXT:    addi a0, a0, 1
5828; CHECK-RV32-NEXT:    vmv4r.v v24, v8
5829; CHECK-RV32-NEXT:    vmv8r.v v8, v24
5830; CHECK-RV32-NEXT:    slli a2, a3, 15
5831; CHECK-RV32-NEXT:    bltz a2, .LBB61_679
5832; CHECK-RV32-NEXT:    j .LBB61_154
5833; CHECK-RV32-NEXT:  .LBB61_679: # %cond.load573
5834; CHECK-RV32-NEXT:    lbu a2, 0(a0)
5835; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
5836; CHECK-RV32-NEXT:    vmv8r.v v24, v8
5837; CHECK-RV32-NEXT:    vmv.s.x v12, a2
5838; CHECK-RV32-NEXT:    li a2, 145
5839; CHECK-RV32-NEXT:    li a4, 144
5840; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
5841; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
5842; CHECK-RV32-NEXT:    addi a0, a0, 1
5843; CHECK-RV32-NEXT:    vmv4r.v v24, v8
5844; CHECK-RV32-NEXT:    vmv8r.v v8, v24
5845; CHECK-RV32-NEXT:    slli a2, a3, 14
5846; CHECK-RV32-NEXT:    bltz a2, .LBB61_680
5847; CHECK-RV32-NEXT:    j .LBB61_155
5848; CHECK-RV32-NEXT:  .LBB61_680: # %cond.load577
5849; CHECK-RV32-NEXT:    lbu a2, 0(a0)
5850; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
5851; CHECK-RV32-NEXT:    vmv8r.v v24, v8
5852; CHECK-RV32-NEXT:    vmv.s.x v12, a2
5853; CHECK-RV32-NEXT:    li a2, 146
5854; CHECK-RV32-NEXT:    li a4, 145
5855; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
5856; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
5857; CHECK-RV32-NEXT:    addi a0, a0, 1
5858; CHECK-RV32-NEXT:    vmv4r.v v24, v8
5859; CHECK-RV32-NEXT:    vmv8r.v v8, v24
5860; CHECK-RV32-NEXT:    slli a2, a3, 13
5861; CHECK-RV32-NEXT:    bltz a2, .LBB61_681
5862; CHECK-RV32-NEXT:    j .LBB61_156
5863; CHECK-RV32-NEXT:  .LBB61_681: # %cond.load581
5864; CHECK-RV32-NEXT:    lbu a2, 0(a0)
5865; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
5866; CHECK-RV32-NEXT:    vmv8r.v v24, v8
5867; CHECK-RV32-NEXT:    vmv.s.x v12, a2
5868; CHECK-RV32-NEXT:    li a2, 147
5869; CHECK-RV32-NEXT:    li a4, 146
5870; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
5871; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
5872; CHECK-RV32-NEXT:    addi a0, a0, 1
5873; CHECK-RV32-NEXT:    vmv4r.v v24, v8
5874; CHECK-RV32-NEXT:    vmv8r.v v8, v24
5875; CHECK-RV32-NEXT:    slli a2, a3, 12
5876; CHECK-RV32-NEXT:    bltz a2, .LBB61_682
5877; CHECK-RV32-NEXT:    j .LBB61_157
5878; CHECK-RV32-NEXT:  .LBB61_682: # %cond.load585
5879; CHECK-RV32-NEXT:    lbu a2, 0(a0)
5880; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
5881; CHECK-RV32-NEXT:    vmv8r.v v24, v8
5882; CHECK-RV32-NEXT:    vmv.s.x v12, a2
5883; CHECK-RV32-NEXT:    li a2, 148
5884; CHECK-RV32-NEXT:    li a4, 147
5885; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
5886; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
5887; CHECK-RV32-NEXT:    addi a0, a0, 1
5888; CHECK-RV32-NEXT:    vmv4r.v v24, v8
5889; CHECK-RV32-NEXT:    vmv8r.v v8, v24
5890; CHECK-RV32-NEXT:    slli a2, a3, 11
5891; CHECK-RV32-NEXT:    bltz a2, .LBB61_683
5892; CHECK-RV32-NEXT:    j .LBB61_158
5893; CHECK-RV32-NEXT:  .LBB61_683: # %cond.load589
5894; CHECK-RV32-NEXT:    lbu a2, 0(a0)
5895; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
5896; CHECK-RV32-NEXT:    vmv8r.v v24, v8
5897; CHECK-RV32-NEXT:    vmv.s.x v12, a2
5898; CHECK-RV32-NEXT:    li a2, 149
5899; CHECK-RV32-NEXT:    li a4, 148
5900; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
5901; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
5902; CHECK-RV32-NEXT:    addi a0, a0, 1
5903; CHECK-RV32-NEXT:    vmv4r.v v24, v8
5904; CHECK-RV32-NEXT:    vmv8r.v v8, v24
5905; CHECK-RV32-NEXT:    slli a2, a3, 10
5906; CHECK-RV32-NEXT:    bltz a2, .LBB61_684
5907; CHECK-RV32-NEXT:    j .LBB61_159
5908; CHECK-RV32-NEXT:  .LBB61_684: # %cond.load593
5909; CHECK-RV32-NEXT:    lbu a2, 0(a0)
5910; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
5911; CHECK-RV32-NEXT:    vmv8r.v v24, v8
5912; CHECK-RV32-NEXT:    vmv.s.x v12, a2
5913; CHECK-RV32-NEXT:    li a2, 150
5914; CHECK-RV32-NEXT:    li a4, 149
5915; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
5916; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
5917; CHECK-RV32-NEXT:    addi a0, a0, 1
5918; CHECK-RV32-NEXT:    vmv4r.v v24, v8
5919; CHECK-RV32-NEXT:    vmv8r.v v8, v24
5920; CHECK-RV32-NEXT:    slli a2, a3, 9
5921; CHECK-RV32-NEXT:    bltz a2, .LBB61_685
5922; CHECK-RV32-NEXT:    j .LBB61_160
5923; CHECK-RV32-NEXT:  .LBB61_685: # %cond.load597
5924; CHECK-RV32-NEXT:    lbu a2, 0(a0)
5925; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
5926; CHECK-RV32-NEXT:    vmv8r.v v24, v8
5927; CHECK-RV32-NEXT:    vmv.s.x v12, a2
5928; CHECK-RV32-NEXT:    li a2, 151
5929; CHECK-RV32-NEXT:    li a4, 150
5930; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
5931; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
5932; CHECK-RV32-NEXT:    addi a0, a0, 1
5933; CHECK-RV32-NEXT:    vmv4r.v v24, v8
5934; CHECK-RV32-NEXT:    vmv8r.v v8, v24
5935; CHECK-RV32-NEXT:    slli a2, a3, 8
5936; CHECK-RV32-NEXT:    bltz a2, .LBB61_686
5937; CHECK-RV32-NEXT:    j .LBB61_161
5938; CHECK-RV32-NEXT:  .LBB61_686: # %cond.load601
5939; CHECK-RV32-NEXT:    lbu a2, 0(a0)
5940; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
5941; CHECK-RV32-NEXT:    vmv8r.v v24, v8
5942; CHECK-RV32-NEXT:    vmv.s.x v12, a2
5943; CHECK-RV32-NEXT:    li a2, 152
5944; CHECK-RV32-NEXT:    li a4, 151
5945; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
5946; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
5947; CHECK-RV32-NEXT:    addi a0, a0, 1
5948; CHECK-RV32-NEXT:    vmv4r.v v24, v8
5949; CHECK-RV32-NEXT:    vmv8r.v v8, v24
5950; CHECK-RV32-NEXT:    slli a2, a3, 7
5951; CHECK-RV32-NEXT:    bltz a2, .LBB61_687
5952; CHECK-RV32-NEXT:    j .LBB61_162
5953; CHECK-RV32-NEXT:  .LBB61_687: # %cond.load605
5954; CHECK-RV32-NEXT:    lbu a2, 0(a0)
5955; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
5956; CHECK-RV32-NEXT:    vmv8r.v v24, v8
5957; CHECK-RV32-NEXT:    vmv.s.x v12, a2
5958; CHECK-RV32-NEXT:    li a2, 153
5959; CHECK-RV32-NEXT:    li a4, 152
5960; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
5961; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
5962; CHECK-RV32-NEXT:    addi a0, a0, 1
5963; CHECK-RV32-NEXT:    vmv4r.v v24, v8
5964; CHECK-RV32-NEXT:    vmv8r.v v8, v24
5965; CHECK-RV32-NEXT:    slli a2, a3, 6
5966; CHECK-RV32-NEXT:    bltz a2, .LBB61_688
5967; CHECK-RV32-NEXT:    j .LBB61_163
5968; CHECK-RV32-NEXT:  .LBB61_688: # %cond.load609
5969; CHECK-RV32-NEXT:    lbu a2, 0(a0)
5970; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
5971; CHECK-RV32-NEXT:    vmv8r.v v24, v8
5972; CHECK-RV32-NEXT:    vmv.s.x v12, a2
5973; CHECK-RV32-NEXT:    li a2, 154
5974; CHECK-RV32-NEXT:    li a4, 153
5975; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
5976; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
5977; CHECK-RV32-NEXT:    addi a0, a0, 1
5978; CHECK-RV32-NEXT:    vmv4r.v v24, v8
5979; CHECK-RV32-NEXT:    vmv8r.v v8, v24
5980; CHECK-RV32-NEXT:    slli a2, a3, 5
5981; CHECK-RV32-NEXT:    bltz a2, .LBB61_689
5982; CHECK-RV32-NEXT:    j .LBB61_164
5983; CHECK-RV32-NEXT:  .LBB61_689: # %cond.load613
5984; CHECK-RV32-NEXT:    lbu a2, 0(a0)
5985; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
5986; CHECK-RV32-NEXT:    vmv8r.v v24, v8
5987; CHECK-RV32-NEXT:    vmv.s.x v12, a2
5988; CHECK-RV32-NEXT:    li a2, 155
5989; CHECK-RV32-NEXT:    li a4, 154
5990; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
5991; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
5992; CHECK-RV32-NEXT:    addi a0, a0, 1
5993; CHECK-RV32-NEXT:    vmv4r.v v24, v8
5994; CHECK-RV32-NEXT:    vmv8r.v v8, v24
5995; CHECK-RV32-NEXT:    slli a2, a3, 4
5996; CHECK-RV32-NEXT:    bltz a2, .LBB61_690
5997; CHECK-RV32-NEXT:    j .LBB61_165
5998; CHECK-RV32-NEXT:  .LBB61_690: # %cond.load617
5999; CHECK-RV32-NEXT:    lbu a2, 0(a0)
6000; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
6001; CHECK-RV32-NEXT:    vmv8r.v v24, v8
6002; CHECK-RV32-NEXT:    vmv.s.x v12, a2
6003; CHECK-RV32-NEXT:    li a2, 156
6004; CHECK-RV32-NEXT:    li a4, 155
6005; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
6006; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
6007; CHECK-RV32-NEXT:    addi a0, a0, 1
6008; CHECK-RV32-NEXT:    vmv4r.v v24, v8
6009; CHECK-RV32-NEXT:    vmv8r.v v8, v24
6010; CHECK-RV32-NEXT:    slli a2, a3, 3
6011; CHECK-RV32-NEXT:    bltz a2, .LBB61_691
6012; CHECK-RV32-NEXT:    j .LBB61_166
6013; CHECK-RV32-NEXT:  .LBB61_691: # %cond.load621
6014; CHECK-RV32-NEXT:    lbu a2, 0(a0)
6015; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
6016; CHECK-RV32-NEXT:    vmv8r.v v24, v8
6017; CHECK-RV32-NEXT:    vmv.s.x v12, a2
6018; CHECK-RV32-NEXT:    li a2, 157
6019; CHECK-RV32-NEXT:    li a4, 156
6020; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
6021; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
6022; CHECK-RV32-NEXT:    addi a0, a0, 1
6023; CHECK-RV32-NEXT:    vmv4r.v v24, v8
6024; CHECK-RV32-NEXT:    vmv8r.v v8, v24
6025; CHECK-RV32-NEXT:    slli a2, a3, 2
6026; CHECK-RV32-NEXT:    bgez a2, .LBB61_1029
6027; CHECK-RV32-NEXT:    j .LBB61_167
6028; CHECK-RV32-NEXT:  .LBB61_1029: # %cond.load621
6029; CHECK-RV32-NEXT:    j .LBB61_168
6030; CHECK-RV32-NEXT:  .LBB61_692: # %cond.load633
6031; CHECK-RV32-NEXT:    lbu a3, 0(a0)
6032; CHECK-RV32-NEXT:    vmv8r.v v16, v8
6033; CHECK-RV32-NEXT:    vmv.s.x v12, a3
6034; CHECK-RV32-NEXT:    li a3, 160
6035; CHECK-RV32-NEXT:    li a4, 159
6036; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m4, tu, ma
6037; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
6038; CHECK-RV32-NEXT:    addi a0, a0, 1
6039; CHECK-RV32-NEXT:    vmv4r.v v16, v8
6040; CHECK-RV32-NEXT:    vmv8r.v v8, v16
6041; CHECK-RV32-NEXT:    andi a3, a2, 1
6042; CHECK-RV32-NEXT:    bnez a3, .LBB61_693
6043; CHECK-RV32-NEXT:    j .LBB61_172
6044; CHECK-RV32-NEXT:  .LBB61_693: # %cond.load637
6045; CHECK-RV32-NEXT:    lbu a3, 0(a0)
6046; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
6047; CHECK-RV32-NEXT:    vmv8r.v v16, v8
6048; CHECK-RV32-NEXT:    vmv.s.x v12, a3
6049; CHECK-RV32-NEXT:    li a3, 161
6050; CHECK-RV32-NEXT:    li a4, 160
6051; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m4, tu, ma
6052; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
6053; CHECK-RV32-NEXT:    addi a0, a0, 1
6054; CHECK-RV32-NEXT:    vmv4r.v v16, v8
6055; CHECK-RV32-NEXT:    vmv8r.v v8, v16
6056; CHECK-RV32-NEXT:    andi a3, a2, 2
6057; CHECK-RV32-NEXT:    bnez a3, .LBB61_694
6058; CHECK-RV32-NEXT:    j .LBB61_173
6059; CHECK-RV32-NEXT:  .LBB61_694: # %cond.load641
6060; CHECK-RV32-NEXT:    lbu a3, 0(a0)
6061; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
6062; CHECK-RV32-NEXT:    vmv8r.v v16, v8
6063; CHECK-RV32-NEXT:    vmv.s.x v12, a3
6064; CHECK-RV32-NEXT:    li a3, 162
6065; CHECK-RV32-NEXT:    li a4, 161
6066; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m4, tu, ma
6067; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
6068; CHECK-RV32-NEXT:    addi a0, a0, 1
6069; CHECK-RV32-NEXT:    vmv4r.v v16, v8
6070; CHECK-RV32-NEXT:    vmv8r.v v8, v16
6071; CHECK-RV32-NEXT:    andi a3, a2, 4
6072; CHECK-RV32-NEXT:    bnez a3, .LBB61_695
6073; CHECK-RV32-NEXT:    j .LBB61_174
6074; CHECK-RV32-NEXT:  .LBB61_695: # %cond.load645
6075; CHECK-RV32-NEXT:    lbu a3, 0(a0)
6076; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
6077; CHECK-RV32-NEXT:    vmv8r.v v16, v8
6078; CHECK-RV32-NEXT:    vmv.s.x v12, a3
6079; CHECK-RV32-NEXT:    li a3, 163
6080; CHECK-RV32-NEXT:    li a4, 162
6081; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m4, tu, ma
6082; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
6083; CHECK-RV32-NEXT:    addi a0, a0, 1
6084; CHECK-RV32-NEXT:    vmv4r.v v16, v8
6085; CHECK-RV32-NEXT:    vmv8r.v v8, v16
6086; CHECK-RV32-NEXT:    andi a3, a2, 8
6087; CHECK-RV32-NEXT:    bnez a3, .LBB61_696
6088; CHECK-RV32-NEXT:    j .LBB61_175
6089; CHECK-RV32-NEXT:  .LBB61_696: # %cond.load649
6090; CHECK-RV32-NEXT:    lbu a3, 0(a0)
6091; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
6092; CHECK-RV32-NEXT:    vmv8r.v v16, v8
6093; CHECK-RV32-NEXT:    vmv.s.x v12, a3
6094; CHECK-RV32-NEXT:    li a3, 164
6095; CHECK-RV32-NEXT:    li a4, 163
6096; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m4, tu, ma
6097; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
6098; CHECK-RV32-NEXT:    addi a0, a0, 1
6099; CHECK-RV32-NEXT:    vmv4r.v v16, v8
6100; CHECK-RV32-NEXT:    vmv8r.v v8, v16
6101; CHECK-RV32-NEXT:    andi a3, a2, 16
6102; CHECK-RV32-NEXT:    bnez a3, .LBB61_697
6103; CHECK-RV32-NEXT:    j .LBB61_176
6104; CHECK-RV32-NEXT:  .LBB61_697: # %cond.load653
6105; CHECK-RV32-NEXT:    lbu a3, 0(a0)
6106; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
6107; CHECK-RV32-NEXT:    vmv8r.v v16, v8
6108; CHECK-RV32-NEXT:    vmv.s.x v12, a3
6109; CHECK-RV32-NEXT:    li a3, 165
6110; CHECK-RV32-NEXT:    li a4, 164
6111; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m4, tu, ma
6112; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
6113; CHECK-RV32-NEXT:    addi a0, a0, 1
6114; CHECK-RV32-NEXT:    vmv4r.v v16, v8
6115; CHECK-RV32-NEXT:    vmv8r.v v8, v16
6116; CHECK-RV32-NEXT:    andi a3, a2, 32
6117; CHECK-RV32-NEXT:    bnez a3, .LBB61_698
6118; CHECK-RV32-NEXT:    j .LBB61_177
6119; CHECK-RV32-NEXT:  .LBB61_698: # %cond.load657
6120; CHECK-RV32-NEXT:    lbu a3, 0(a0)
6121; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
6122; CHECK-RV32-NEXT:    vmv8r.v v16, v8
6123; CHECK-RV32-NEXT:    vmv.s.x v12, a3
6124; CHECK-RV32-NEXT:    li a3, 166
6125; CHECK-RV32-NEXT:    li a4, 165
6126; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m4, tu, ma
6127; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
6128; CHECK-RV32-NEXT:    addi a0, a0, 1
6129; CHECK-RV32-NEXT:    vmv4r.v v16, v8
6130; CHECK-RV32-NEXT:    vmv8r.v v8, v16
6131; CHECK-RV32-NEXT:    andi a3, a2, 64
6132; CHECK-RV32-NEXT:    bnez a3, .LBB61_699
6133; CHECK-RV32-NEXT:    j .LBB61_178
6134; CHECK-RV32-NEXT:  .LBB61_699: # %cond.load661
6135; CHECK-RV32-NEXT:    lbu a3, 0(a0)
6136; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
6137; CHECK-RV32-NEXT:    vmv8r.v v16, v8
6138; CHECK-RV32-NEXT:    vmv.s.x v12, a3
6139; CHECK-RV32-NEXT:    li a3, 167
6140; CHECK-RV32-NEXT:    li a4, 166
6141; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m4, tu, ma
6142; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
6143; CHECK-RV32-NEXT:    addi a0, a0, 1
6144; CHECK-RV32-NEXT:    vmv4r.v v16, v8
6145; CHECK-RV32-NEXT:    vmv8r.v v8, v16
6146; CHECK-RV32-NEXT:    andi a3, a2, 128
6147; CHECK-RV32-NEXT:    bnez a3, .LBB61_700
6148; CHECK-RV32-NEXT:    j .LBB61_179
6149; CHECK-RV32-NEXT:  .LBB61_700: # %cond.load665
6150; CHECK-RV32-NEXT:    lbu a3, 0(a0)
6151; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
6152; CHECK-RV32-NEXT:    vmv8r.v v16, v8
6153; CHECK-RV32-NEXT:    vmv.s.x v12, a3
6154; CHECK-RV32-NEXT:    li a3, 168
6155; CHECK-RV32-NEXT:    li a4, 167
6156; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m4, tu, ma
6157; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
6158; CHECK-RV32-NEXT:    addi a0, a0, 1
6159; CHECK-RV32-NEXT:    vmv4r.v v16, v8
6160; CHECK-RV32-NEXT:    vmv8r.v v8, v16
6161; CHECK-RV32-NEXT:    andi a3, a2, 256
6162; CHECK-RV32-NEXT:    bnez a3, .LBB61_701
6163; CHECK-RV32-NEXT:    j .LBB61_180
6164; CHECK-RV32-NEXT:  .LBB61_701: # %cond.load669
6165; CHECK-RV32-NEXT:    lbu a3, 0(a0)
6166; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
6167; CHECK-RV32-NEXT:    vmv8r.v v16, v8
6168; CHECK-RV32-NEXT:    vmv.s.x v12, a3
6169; CHECK-RV32-NEXT:    li a3, 169
6170; CHECK-RV32-NEXT:    li a4, 168
6171; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m4, tu, ma
6172; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
6173; CHECK-RV32-NEXT:    addi a0, a0, 1
6174; CHECK-RV32-NEXT:    vmv4r.v v16, v8
6175; CHECK-RV32-NEXT:    vmv8r.v v8, v16
6176; CHECK-RV32-NEXT:    andi a3, a2, 512
6177; CHECK-RV32-NEXT:    bnez a3, .LBB61_702
6178; CHECK-RV32-NEXT:    j .LBB61_181
6179; CHECK-RV32-NEXT:  .LBB61_702: # %cond.load673
6180; CHECK-RV32-NEXT:    lbu a3, 0(a0)
6181; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
6182; CHECK-RV32-NEXT:    vmv8r.v v16, v8
6183; CHECK-RV32-NEXT:    vmv.s.x v12, a3
6184; CHECK-RV32-NEXT:    li a3, 170
6185; CHECK-RV32-NEXT:    li a4, 169
6186; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m4, tu, ma
6187; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
6188; CHECK-RV32-NEXT:    addi a0, a0, 1
6189; CHECK-RV32-NEXT:    vmv4r.v v16, v8
6190; CHECK-RV32-NEXT:    vmv8r.v v8, v16
6191; CHECK-RV32-NEXT:    andi a3, a2, 1024
6192; CHECK-RV32-NEXT:    bnez a3, .LBB61_703
6193; CHECK-RV32-NEXT:    j .LBB61_182
6194; CHECK-RV32-NEXT:  .LBB61_703: # %cond.load677
6195; CHECK-RV32-NEXT:    lbu a3, 0(a0)
6196; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
6197; CHECK-RV32-NEXT:    vmv8r.v v16, v8
6198; CHECK-RV32-NEXT:    vmv.s.x v12, a3
6199; CHECK-RV32-NEXT:    li a3, 171
6200; CHECK-RV32-NEXT:    li a4, 170
6201; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m4, tu, ma
6202; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
6203; CHECK-RV32-NEXT:    addi a0, a0, 1
6204; CHECK-RV32-NEXT:    vmv4r.v v16, v8
6205; CHECK-RV32-NEXT:    vmv8r.v v8, v16
6206; CHECK-RV32-NEXT:    slli a3, a2, 20
6207; CHECK-RV32-NEXT:    bltz a3, .LBB61_704
6208; CHECK-RV32-NEXT:    j .LBB61_183
6209; CHECK-RV32-NEXT:  .LBB61_704: # %cond.load681
6210; CHECK-RV32-NEXT:    lbu a3, 0(a0)
6211; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
6212; CHECK-RV32-NEXT:    vmv8r.v v16, v8
6213; CHECK-RV32-NEXT:    vmv.s.x v12, a3
6214; CHECK-RV32-NEXT:    li a3, 172
6215; CHECK-RV32-NEXT:    li a4, 171
6216; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m4, tu, ma
6217; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
6218; CHECK-RV32-NEXT:    addi a0, a0, 1
6219; CHECK-RV32-NEXT:    vmv4r.v v16, v8
6220; CHECK-RV32-NEXT:    vmv8r.v v8, v16
6221; CHECK-RV32-NEXT:    slli a3, a2, 19
6222; CHECK-RV32-NEXT:    bltz a3, .LBB61_705
6223; CHECK-RV32-NEXT:    j .LBB61_184
6224; CHECK-RV32-NEXT:  .LBB61_705: # %cond.load685
6225; CHECK-RV32-NEXT:    lbu a3, 0(a0)
6226; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
6227; CHECK-RV32-NEXT:    vmv8r.v v16, v8
6228; CHECK-RV32-NEXT:    vmv.s.x v12, a3
6229; CHECK-RV32-NEXT:    li a3, 173
6230; CHECK-RV32-NEXT:    li a4, 172
6231; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m4, tu, ma
6232; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
6233; CHECK-RV32-NEXT:    addi a0, a0, 1
6234; CHECK-RV32-NEXT:    vmv4r.v v16, v8
6235; CHECK-RV32-NEXT:    vmv8r.v v8, v16
6236; CHECK-RV32-NEXT:    slli a3, a2, 18
6237; CHECK-RV32-NEXT:    bltz a3, .LBB61_706
6238; CHECK-RV32-NEXT:    j .LBB61_185
6239; CHECK-RV32-NEXT:  .LBB61_706: # %cond.load689
6240; CHECK-RV32-NEXT:    lbu a3, 0(a0)
6241; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
6242; CHECK-RV32-NEXT:    vmv8r.v v16, v8
6243; CHECK-RV32-NEXT:    vmv.s.x v12, a3
6244; CHECK-RV32-NEXT:    li a3, 174
6245; CHECK-RV32-NEXT:    li a4, 173
6246; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m4, tu, ma
6247; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
6248; CHECK-RV32-NEXT:    addi a0, a0, 1
6249; CHECK-RV32-NEXT:    vmv4r.v v16, v8
6250; CHECK-RV32-NEXT:    vmv8r.v v8, v16
6251; CHECK-RV32-NEXT:    slli a3, a2, 17
6252; CHECK-RV32-NEXT:    bltz a3, .LBB61_707
6253; CHECK-RV32-NEXT:    j .LBB61_186
6254; CHECK-RV32-NEXT:  .LBB61_707: # %cond.load693
6255; CHECK-RV32-NEXT:    lbu a3, 0(a0)
6256; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
6257; CHECK-RV32-NEXT:    vmv8r.v v16, v8
6258; CHECK-RV32-NEXT:    vmv.s.x v12, a3
6259; CHECK-RV32-NEXT:    li a3, 175
6260; CHECK-RV32-NEXT:    li a4, 174
6261; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m4, tu, ma
6262; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
6263; CHECK-RV32-NEXT:    addi a0, a0, 1
6264; CHECK-RV32-NEXT:    vmv4r.v v16, v8
6265; CHECK-RV32-NEXT:    vmv8r.v v8, v16
6266; CHECK-RV32-NEXT:    slli a3, a2, 16
6267; CHECK-RV32-NEXT:    bltz a3, .LBB61_708
6268; CHECK-RV32-NEXT:    j .LBB61_187
6269; CHECK-RV32-NEXT:  .LBB61_708: # %cond.load697
6270; CHECK-RV32-NEXT:    lbu a3, 0(a0)
6271; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
6272; CHECK-RV32-NEXT:    vmv8r.v v16, v8
6273; CHECK-RV32-NEXT:    vmv.s.x v12, a3
6274; CHECK-RV32-NEXT:    li a3, 176
6275; CHECK-RV32-NEXT:    li a4, 175
6276; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m4, tu, ma
6277; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
6278; CHECK-RV32-NEXT:    addi a0, a0, 1
6279; CHECK-RV32-NEXT:    vmv4r.v v16, v8
6280; CHECK-RV32-NEXT:    vmv8r.v v8, v16
6281; CHECK-RV32-NEXT:    slli a3, a2, 15
6282; CHECK-RV32-NEXT:    bltz a3, .LBB61_709
6283; CHECK-RV32-NEXT:    j .LBB61_188
6284; CHECK-RV32-NEXT:  .LBB61_709: # %cond.load701
6285; CHECK-RV32-NEXT:    lbu a3, 0(a0)
6286; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
6287; CHECK-RV32-NEXT:    vmv8r.v v16, v8
6288; CHECK-RV32-NEXT:    vmv.s.x v12, a3
6289; CHECK-RV32-NEXT:    li a3, 177
6290; CHECK-RV32-NEXT:    li a4, 176
6291; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m4, tu, ma
6292; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
6293; CHECK-RV32-NEXT:    addi a0, a0, 1
6294; CHECK-RV32-NEXT:    vmv4r.v v16, v8
6295; CHECK-RV32-NEXT:    vmv8r.v v8, v16
6296; CHECK-RV32-NEXT:    slli a3, a2, 14
6297; CHECK-RV32-NEXT:    bltz a3, .LBB61_710
6298; CHECK-RV32-NEXT:    j .LBB61_189
6299; CHECK-RV32-NEXT:  .LBB61_710: # %cond.load705
6300; CHECK-RV32-NEXT:    lbu a3, 0(a0)
6301; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
6302; CHECK-RV32-NEXT:    vmv8r.v v16, v8
6303; CHECK-RV32-NEXT:    vmv.s.x v12, a3
6304; CHECK-RV32-NEXT:    li a3, 178
6305; CHECK-RV32-NEXT:    li a4, 177
6306; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m4, tu, ma
6307; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
6308; CHECK-RV32-NEXT:    addi a0, a0, 1
6309; CHECK-RV32-NEXT:    vmv4r.v v16, v8
6310; CHECK-RV32-NEXT:    vmv8r.v v8, v16
6311; CHECK-RV32-NEXT:    slli a3, a2, 13
6312; CHECK-RV32-NEXT:    bltz a3, .LBB61_711
6313; CHECK-RV32-NEXT:    j .LBB61_190
6314; CHECK-RV32-NEXT:  .LBB61_711: # %cond.load709
6315; CHECK-RV32-NEXT:    lbu a3, 0(a0)
6316; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
6317; CHECK-RV32-NEXT:    vmv8r.v v16, v8
6318; CHECK-RV32-NEXT:    vmv.s.x v12, a3
6319; CHECK-RV32-NEXT:    li a3, 179
6320; CHECK-RV32-NEXT:    li a4, 178
6321; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m4, tu, ma
6322; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
6323; CHECK-RV32-NEXT:    addi a0, a0, 1
6324; CHECK-RV32-NEXT:    vmv4r.v v16, v8
6325; CHECK-RV32-NEXT:    vmv8r.v v8, v16
6326; CHECK-RV32-NEXT:    slli a3, a2, 12
6327; CHECK-RV32-NEXT:    bltz a3, .LBB61_712
6328; CHECK-RV32-NEXT:    j .LBB61_191
6329; CHECK-RV32-NEXT:  .LBB61_712: # %cond.load713
6330; CHECK-RV32-NEXT:    lbu a3, 0(a0)
6331; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
6332; CHECK-RV32-NEXT:    vmv8r.v v16, v8
6333; CHECK-RV32-NEXT:    vmv.s.x v12, a3
6334; CHECK-RV32-NEXT:    li a3, 180
6335; CHECK-RV32-NEXT:    li a4, 179
6336; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m4, tu, ma
6337; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
6338; CHECK-RV32-NEXT:    addi a0, a0, 1
6339; CHECK-RV32-NEXT:    vmv4r.v v16, v8
6340; CHECK-RV32-NEXT:    vmv8r.v v8, v16
6341; CHECK-RV32-NEXT:    slli a3, a2, 11
6342; CHECK-RV32-NEXT:    bltz a3, .LBB61_713
6343; CHECK-RV32-NEXT:    j .LBB61_192
6344; CHECK-RV32-NEXT:  .LBB61_713: # %cond.load717
6345; CHECK-RV32-NEXT:    lbu a3, 0(a0)
6346; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
6347; CHECK-RV32-NEXT:    vmv8r.v v16, v8
6348; CHECK-RV32-NEXT:    vmv.s.x v12, a3
6349; CHECK-RV32-NEXT:    li a3, 181
6350; CHECK-RV32-NEXT:    li a4, 180
6351; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m4, tu, ma
6352; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
6353; CHECK-RV32-NEXT:    addi a0, a0, 1
6354; CHECK-RV32-NEXT:    vmv4r.v v16, v8
6355; CHECK-RV32-NEXT:    vmv8r.v v8, v16
6356; CHECK-RV32-NEXT:    slli a3, a2, 10
6357; CHECK-RV32-NEXT:    bltz a3, .LBB61_714
6358; CHECK-RV32-NEXT:    j .LBB61_193
6359; CHECK-RV32-NEXT:  .LBB61_714: # %cond.load721
6360; CHECK-RV32-NEXT:    lbu a3, 0(a0)
6361; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
6362; CHECK-RV32-NEXT:    vmv8r.v v16, v8
6363; CHECK-RV32-NEXT:    vmv.s.x v12, a3
6364; CHECK-RV32-NEXT:    li a3, 182
6365; CHECK-RV32-NEXT:    li a4, 181
6366; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m4, tu, ma
6367; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
6368; CHECK-RV32-NEXT:    addi a0, a0, 1
6369; CHECK-RV32-NEXT:    vmv4r.v v16, v8
6370; CHECK-RV32-NEXT:    vmv8r.v v8, v16
6371; CHECK-RV32-NEXT:    slli a3, a2, 9
6372; CHECK-RV32-NEXT:    bltz a3, .LBB61_715
6373; CHECK-RV32-NEXT:    j .LBB61_194
6374; CHECK-RV32-NEXT:  .LBB61_715: # %cond.load725
6375; CHECK-RV32-NEXT:    lbu a3, 0(a0)
6376; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
6377; CHECK-RV32-NEXT:    vmv8r.v v16, v8
6378; CHECK-RV32-NEXT:    vmv.s.x v12, a3
6379; CHECK-RV32-NEXT:    li a3, 183
6380; CHECK-RV32-NEXT:    li a4, 182
6381; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m4, tu, ma
6382; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
6383; CHECK-RV32-NEXT:    addi a0, a0, 1
6384; CHECK-RV32-NEXT:    vmv4r.v v16, v8
6385; CHECK-RV32-NEXT:    vmv8r.v v8, v16
6386; CHECK-RV32-NEXT:    slli a3, a2, 8
6387; CHECK-RV32-NEXT:    bltz a3, .LBB61_716
6388; CHECK-RV32-NEXT:    j .LBB61_195
6389; CHECK-RV32-NEXT:  .LBB61_716: # %cond.load729
6390; CHECK-RV32-NEXT:    lbu a3, 0(a0)
6391; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
6392; CHECK-RV32-NEXT:    vmv8r.v v16, v8
6393; CHECK-RV32-NEXT:    vmv.s.x v12, a3
6394; CHECK-RV32-NEXT:    li a3, 184
6395; CHECK-RV32-NEXT:    li a4, 183
6396; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m4, tu, ma
6397; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
6398; CHECK-RV32-NEXT:    addi a0, a0, 1
6399; CHECK-RV32-NEXT:    vmv4r.v v16, v8
6400; CHECK-RV32-NEXT:    vmv8r.v v8, v16
6401; CHECK-RV32-NEXT:    slli a3, a2, 7
6402; CHECK-RV32-NEXT:    bltz a3, .LBB61_717
6403; CHECK-RV32-NEXT:    j .LBB61_196
6404; CHECK-RV32-NEXT:  .LBB61_717: # %cond.load733
6405; CHECK-RV32-NEXT:    lbu a3, 0(a0)
6406; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
6407; CHECK-RV32-NEXT:    vmv8r.v v16, v8
6408; CHECK-RV32-NEXT:    vmv.s.x v12, a3
6409; CHECK-RV32-NEXT:    li a3, 185
6410; CHECK-RV32-NEXT:    li a4, 184
6411; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m4, tu, ma
6412; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
6413; CHECK-RV32-NEXT:    addi a0, a0, 1
6414; CHECK-RV32-NEXT:    vmv4r.v v16, v8
6415; CHECK-RV32-NEXT:    vmv8r.v v8, v16
6416; CHECK-RV32-NEXT:    slli a3, a2, 6
6417; CHECK-RV32-NEXT:    bltz a3, .LBB61_718
6418; CHECK-RV32-NEXT:    j .LBB61_197
6419; CHECK-RV32-NEXT:  .LBB61_718: # %cond.load737
6420; CHECK-RV32-NEXT:    lbu a3, 0(a0)
6421; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
6422; CHECK-RV32-NEXT:    vmv8r.v v16, v8
6423; CHECK-RV32-NEXT:    vmv.s.x v12, a3
6424; CHECK-RV32-NEXT:    li a3, 186
6425; CHECK-RV32-NEXT:    li a4, 185
6426; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m4, tu, ma
6427; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
6428; CHECK-RV32-NEXT:    addi a0, a0, 1
6429; CHECK-RV32-NEXT:    vmv4r.v v16, v8
6430; CHECK-RV32-NEXT:    vmv8r.v v8, v16
6431; CHECK-RV32-NEXT:    slli a3, a2, 5
6432; CHECK-RV32-NEXT:    bltz a3, .LBB61_719
6433; CHECK-RV32-NEXT:    j .LBB61_198
6434; CHECK-RV32-NEXT:  .LBB61_719: # %cond.load741
6435; CHECK-RV32-NEXT:    lbu a3, 0(a0)
6436; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
6437; CHECK-RV32-NEXT:    vmv8r.v v16, v8
6438; CHECK-RV32-NEXT:    vmv.s.x v12, a3
6439; CHECK-RV32-NEXT:    li a3, 187
6440; CHECK-RV32-NEXT:    li a4, 186
6441; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m4, tu, ma
6442; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
6443; CHECK-RV32-NEXT:    addi a0, a0, 1
6444; CHECK-RV32-NEXT:    vmv4r.v v16, v8
6445; CHECK-RV32-NEXT:    vmv8r.v v8, v16
6446; CHECK-RV32-NEXT:    slli a3, a2, 4
6447; CHECK-RV32-NEXT:    bltz a3, .LBB61_720
6448; CHECK-RV32-NEXT:    j .LBB61_199
6449; CHECK-RV32-NEXT:  .LBB61_720: # %cond.load745
6450; CHECK-RV32-NEXT:    lbu a3, 0(a0)
6451; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
6452; CHECK-RV32-NEXT:    vmv8r.v v16, v8
6453; CHECK-RV32-NEXT:    vmv.s.x v12, a3
6454; CHECK-RV32-NEXT:    li a3, 188
6455; CHECK-RV32-NEXT:    li a4, 187
6456; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m4, tu, ma
6457; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
6458; CHECK-RV32-NEXT:    addi a0, a0, 1
6459; CHECK-RV32-NEXT:    vmv4r.v v16, v8
6460; CHECK-RV32-NEXT:    vmv8r.v v8, v16
6461; CHECK-RV32-NEXT:    slli a3, a2, 3
6462; CHECK-RV32-NEXT:    bltz a3, .LBB61_721
6463; CHECK-RV32-NEXT:    j .LBB61_200
6464; CHECK-RV32-NEXT:  .LBB61_721: # %cond.load749
6465; CHECK-RV32-NEXT:    lbu a3, 0(a0)
6466; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
6467; CHECK-RV32-NEXT:    vmv8r.v v16, v8
6468; CHECK-RV32-NEXT:    vmv.s.x v12, a3
6469; CHECK-RV32-NEXT:    li a3, 189
6470; CHECK-RV32-NEXT:    li a4, 188
6471; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m4, tu, ma
6472; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
6473; CHECK-RV32-NEXT:    addi a0, a0, 1
6474; CHECK-RV32-NEXT:    vmv4r.v v16, v8
6475; CHECK-RV32-NEXT:    vmv8r.v v8, v16
6476; CHECK-RV32-NEXT:    slli a3, a2, 2
6477; CHECK-RV32-NEXT:    bgez a3, .LBB61_1030
6478; CHECK-RV32-NEXT:    j .LBB61_201
6479; CHECK-RV32-NEXT:  .LBB61_1030: # %cond.load749
6480; CHECK-RV32-NEXT:    j .LBB61_202
6481; CHECK-RV32-NEXT:  .LBB61_722: # %cond.load761
6482; CHECK-RV32-NEXT:    lbu a2, 0(a0)
6483; CHECK-RV32-NEXT:    vmv8r.v v24, v8
6484; CHECK-RV32-NEXT:    vmv.s.x v12, a2
6485; CHECK-RV32-NEXT:    li a2, 192
6486; CHECK-RV32-NEXT:    li a4, 191
6487; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
6488; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
6489; CHECK-RV32-NEXT:    addi a0, a0, 1
6490; CHECK-RV32-NEXT:    vmv4r.v v24, v8
6491; CHECK-RV32-NEXT:    vmv8r.v v8, v24
6492; CHECK-RV32-NEXT:    andi a2, a3, 1
6493; CHECK-RV32-NEXT:    bnez a2, .LBB61_723
6494; CHECK-RV32-NEXT:    j .LBB61_206
6495; CHECK-RV32-NEXT:  .LBB61_723: # %cond.load765
6496; CHECK-RV32-NEXT:    lbu a2, 0(a0)
6497; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
6498; CHECK-RV32-NEXT:    vmv8r.v v24, v8
6499; CHECK-RV32-NEXT:    vmv.s.x v12, a2
6500; CHECK-RV32-NEXT:    li a2, 193
6501; CHECK-RV32-NEXT:    li a4, 192
6502; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
6503; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
6504; CHECK-RV32-NEXT:    addi a0, a0, 1
6505; CHECK-RV32-NEXT:    vmv4r.v v24, v8
6506; CHECK-RV32-NEXT:    vmv8r.v v8, v24
6507; CHECK-RV32-NEXT:    andi a2, a3, 2
6508; CHECK-RV32-NEXT:    bnez a2, .LBB61_724
6509; CHECK-RV32-NEXT:    j .LBB61_207
6510; CHECK-RV32-NEXT:  .LBB61_724: # %cond.load769
6511; CHECK-RV32-NEXT:    lbu a2, 0(a0)
6512; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
6513; CHECK-RV32-NEXT:    vmv8r.v v24, v8
6514; CHECK-RV32-NEXT:    vmv.s.x v12, a2
6515; CHECK-RV32-NEXT:    li a2, 194
6516; CHECK-RV32-NEXT:    li a4, 193
6517; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
6518; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
6519; CHECK-RV32-NEXT:    addi a0, a0, 1
6520; CHECK-RV32-NEXT:    vmv4r.v v24, v8
6521; CHECK-RV32-NEXT:    vmv8r.v v8, v24
6522; CHECK-RV32-NEXT:    andi a2, a3, 4
6523; CHECK-RV32-NEXT:    bnez a2, .LBB61_725
6524; CHECK-RV32-NEXT:    j .LBB61_208
6525; CHECK-RV32-NEXT:  .LBB61_725: # %cond.load773
6526; CHECK-RV32-NEXT:    lbu a2, 0(a0)
6527; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
6528; CHECK-RV32-NEXT:    vmv8r.v v24, v8
6529; CHECK-RV32-NEXT:    vmv.s.x v12, a2
6530; CHECK-RV32-NEXT:    li a2, 195
6531; CHECK-RV32-NEXT:    li a4, 194
6532; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
6533; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
6534; CHECK-RV32-NEXT:    addi a0, a0, 1
6535; CHECK-RV32-NEXT:    vmv4r.v v24, v8
6536; CHECK-RV32-NEXT:    vmv8r.v v8, v24
6537; CHECK-RV32-NEXT:    andi a2, a3, 8
6538; CHECK-RV32-NEXT:    bnez a2, .LBB61_726
6539; CHECK-RV32-NEXT:    j .LBB61_209
6540; CHECK-RV32-NEXT:  .LBB61_726: # %cond.load777
6541; CHECK-RV32-NEXT:    lbu a2, 0(a0)
6542; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
6543; CHECK-RV32-NEXT:    vmv8r.v v24, v8
6544; CHECK-RV32-NEXT:    vmv.s.x v12, a2
6545; CHECK-RV32-NEXT:    li a2, 196
6546; CHECK-RV32-NEXT:    li a4, 195
6547; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
6548; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
6549; CHECK-RV32-NEXT:    addi a0, a0, 1
6550; CHECK-RV32-NEXT:    vmv4r.v v24, v8
6551; CHECK-RV32-NEXT:    vmv8r.v v8, v24
6552; CHECK-RV32-NEXT:    andi a2, a3, 16
6553; CHECK-RV32-NEXT:    bnez a2, .LBB61_727
6554; CHECK-RV32-NEXT:    j .LBB61_210
6555; CHECK-RV32-NEXT:  .LBB61_727: # %cond.load781
6556; CHECK-RV32-NEXT:    lbu a2, 0(a0)
6557; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
6558; CHECK-RV32-NEXT:    vmv8r.v v24, v8
6559; CHECK-RV32-NEXT:    vmv.s.x v12, a2
6560; CHECK-RV32-NEXT:    li a2, 197
6561; CHECK-RV32-NEXT:    li a4, 196
6562; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
6563; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
6564; CHECK-RV32-NEXT:    addi a0, a0, 1
6565; CHECK-RV32-NEXT:    vmv4r.v v24, v8
6566; CHECK-RV32-NEXT:    vmv8r.v v8, v24
6567; CHECK-RV32-NEXT:    andi a2, a3, 32
6568; CHECK-RV32-NEXT:    bnez a2, .LBB61_728
6569; CHECK-RV32-NEXT:    j .LBB61_211
6570; CHECK-RV32-NEXT:  .LBB61_728: # %cond.load785
6571; CHECK-RV32-NEXT:    lbu a2, 0(a0)
6572; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
6573; CHECK-RV32-NEXT:    vmv8r.v v24, v8
6574; CHECK-RV32-NEXT:    vmv.s.x v12, a2
6575; CHECK-RV32-NEXT:    li a2, 198
6576; CHECK-RV32-NEXT:    li a4, 197
6577; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
6578; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
6579; CHECK-RV32-NEXT:    addi a0, a0, 1
6580; CHECK-RV32-NEXT:    vmv4r.v v24, v8
6581; CHECK-RV32-NEXT:    vmv8r.v v8, v24
6582; CHECK-RV32-NEXT:    andi a2, a3, 64
6583; CHECK-RV32-NEXT:    bnez a2, .LBB61_729
6584; CHECK-RV32-NEXT:    j .LBB61_212
6585; CHECK-RV32-NEXT:  .LBB61_729: # %cond.load789
6586; CHECK-RV32-NEXT:    lbu a2, 0(a0)
6587; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
6588; CHECK-RV32-NEXT:    vmv8r.v v24, v8
6589; CHECK-RV32-NEXT:    vmv.s.x v12, a2
6590; CHECK-RV32-NEXT:    li a2, 199
6591; CHECK-RV32-NEXT:    li a4, 198
6592; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
6593; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
6594; CHECK-RV32-NEXT:    addi a0, a0, 1
6595; CHECK-RV32-NEXT:    vmv4r.v v24, v8
6596; CHECK-RV32-NEXT:    vmv8r.v v8, v24
6597; CHECK-RV32-NEXT:    andi a2, a3, 128
6598; CHECK-RV32-NEXT:    bnez a2, .LBB61_730
6599; CHECK-RV32-NEXT:    j .LBB61_213
6600; CHECK-RV32-NEXT:  .LBB61_730: # %cond.load793
6601; CHECK-RV32-NEXT:    lbu a2, 0(a0)
6602; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
6603; CHECK-RV32-NEXT:    vmv8r.v v24, v8
6604; CHECK-RV32-NEXT:    vmv.s.x v12, a2
6605; CHECK-RV32-NEXT:    li a2, 200
6606; CHECK-RV32-NEXT:    li a4, 199
6607; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
6608; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
6609; CHECK-RV32-NEXT:    addi a0, a0, 1
6610; CHECK-RV32-NEXT:    vmv4r.v v24, v8
6611; CHECK-RV32-NEXT:    vmv8r.v v8, v24
6612; CHECK-RV32-NEXT:    andi a2, a3, 256
6613; CHECK-RV32-NEXT:    bnez a2, .LBB61_731
6614; CHECK-RV32-NEXT:    j .LBB61_214
6615; CHECK-RV32-NEXT:  .LBB61_731: # %cond.load797
6616; CHECK-RV32-NEXT:    lbu a2, 0(a0)
6617; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
6618; CHECK-RV32-NEXT:    vmv8r.v v24, v8
6619; CHECK-RV32-NEXT:    vmv.s.x v12, a2
6620; CHECK-RV32-NEXT:    li a2, 201
6621; CHECK-RV32-NEXT:    li a4, 200
6622; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
6623; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
6624; CHECK-RV32-NEXT:    addi a0, a0, 1
6625; CHECK-RV32-NEXT:    vmv4r.v v24, v8
6626; CHECK-RV32-NEXT:    vmv8r.v v8, v24
6627; CHECK-RV32-NEXT:    andi a2, a3, 512
6628; CHECK-RV32-NEXT:    bnez a2, .LBB61_732
6629; CHECK-RV32-NEXT:    j .LBB61_215
6630; CHECK-RV32-NEXT:  .LBB61_732: # %cond.load801
6631; CHECK-RV32-NEXT:    lbu a2, 0(a0)
6632; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
6633; CHECK-RV32-NEXT:    vmv8r.v v24, v8
6634; CHECK-RV32-NEXT:    vmv.s.x v12, a2
6635; CHECK-RV32-NEXT:    li a2, 202
6636; CHECK-RV32-NEXT:    li a4, 201
6637; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
6638; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
6639; CHECK-RV32-NEXT:    addi a0, a0, 1
6640; CHECK-RV32-NEXT:    vmv4r.v v24, v8
6641; CHECK-RV32-NEXT:    vmv8r.v v8, v24
6642; CHECK-RV32-NEXT:    andi a2, a3, 1024
6643; CHECK-RV32-NEXT:    bnez a2, .LBB61_733
6644; CHECK-RV32-NEXT:    j .LBB61_216
6645; CHECK-RV32-NEXT:  .LBB61_733: # %cond.load805
6646; CHECK-RV32-NEXT:    lbu a2, 0(a0)
6647; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
6648; CHECK-RV32-NEXT:    vmv8r.v v24, v8
6649; CHECK-RV32-NEXT:    vmv.s.x v12, a2
6650; CHECK-RV32-NEXT:    li a2, 203
6651; CHECK-RV32-NEXT:    li a4, 202
6652; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
6653; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
6654; CHECK-RV32-NEXT:    addi a0, a0, 1
6655; CHECK-RV32-NEXT:    vmv4r.v v24, v8
6656; CHECK-RV32-NEXT:    vmv8r.v v8, v24
6657; CHECK-RV32-NEXT:    slli a2, a3, 20
6658; CHECK-RV32-NEXT:    bltz a2, .LBB61_734
6659; CHECK-RV32-NEXT:    j .LBB61_217
6660; CHECK-RV32-NEXT:  .LBB61_734: # %cond.load809
6661; CHECK-RV32-NEXT:    lbu a2, 0(a0)
6662; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
6663; CHECK-RV32-NEXT:    vmv8r.v v24, v8
6664; CHECK-RV32-NEXT:    vmv.s.x v12, a2
6665; CHECK-RV32-NEXT:    li a2, 204
6666; CHECK-RV32-NEXT:    li a4, 203
6667; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
6668; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
6669; CHECK-RV32-NEXT:    addi a0, a0, 1
6670; CHECK-RV32-NEXT:    vmv4r.v v24, v8
6671; CHECK-RV32-NEXT:    vmv8r.v v8, v24
6672; CHECK-RV32-NEXT:    slli a2, a3, 19
6673; CHECK-RV32-NEXT:    bltz a2, .LBB61_735
6674; CHECK-RV32-NEXT:    j .LBB61_218
6675; CHECK-RV32-NEXT:  .LBB61_735: # %cond.load813
6676; CHECK-RV32-NEXT:    lbu a2, 0(a0)
6677; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
6678; CHECK-RV32-NEXT:    vmv8r.v v24, v8
6679; CHECK-RV32-NEXT:    vmv.s.x v12, a2
6680; CHECK-RV32-NEXT:    li a2, 205
6681; CHECK-RV32-NEXT:    li a4, 204
6682; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
6683; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
6684; CHECK-RV32-NEXT:    addi a0, a0, 1
6685; CHECK-RV32-NEXT:    vmv4r.v v24, v8
6686; CHECK-RV32-NEXT:    vmv8r.v v8, v24
6687; CHECK-RV32-NEXT:    slli a2, a3, 18
6688; CHECK-RV32-NEXT:    bltz a2, .LBB61_736
6689; CHECK-RV32-NEXT:    j .LBB61_219
6690; CHECK-RV32-NEXT:  .LBB61_736: # %cond.load817
6691; CHECK-RV32-NEXT:    lbu a2, 0(a0)
6692; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
6693; CHECK-RV32-NEXT:    vmv8r.v v24, v8
6694; CHECK-RV32-NEXT:    vmv.s.x v12, a2
6695; CHECK-RV32-NEXT:    li a2, 206
6696; CHECK-RV32-NEXT:    li a4, 205
6697; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
6698; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
6699; CHECK-RV32-NEXT:    addi a0, a0, 1
6700; CHECK-RV32-NEXT:    vmv4r.v v24, v8
6701; CHECK-RV32-NEXT:    vmv8r.v v8, v24
6702; CHECK-RV32-NEXT:    slli a2, a3, 17
6703; CHECK-RV32-NEXT:    bltz a2, .LBB61_737
6704; CHECK-RV32-NEXT:    j .LBB61_220
6705; CHECK-RV32-NEXT:  .LBB61_737: # %cond.load821
6706; CHECK-RV32-NEXT:    lbu a2, 0(a0)
6707; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
6708; CHECK-RV32-NEXT:    vmv8r.v v24, v8
6709; CHECK-RV32-NEXT:    vmv.s.x v12, a2
6710; CHECK-RV32-NEXT:    li a2, 207
6711; CHECK-RV32-NEXT:    li a4, 206
6712; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
6713; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
6714; CHECK-RV32-NEXT:    addi a0, a0, 1
6715; CHECK-RV32-NEXT:    vmv4r.v v24, v8
6716; CHECK-RV32-NEXT:    vmv8r.v v8, v24
6717; CHECK-RV32-NEXT:    slli a2, a3, 16
6718; CHECK-RV32-NEXT:    bltz a2, .LBB61_738
6719; CHECK-RV32-NEXT:    j .LBB61_221
6720; CHECK-RV32-NEXT:  .LBB61_738: # %cond.load825
6721; CHECK-RV32-NEXT:    lbu a2, 0(a0)
6722; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
6723; CHECK-RV32-NEXT:    vmv8r.v v24, v8
6724; CHECK-RV32-NEXT:    vmv.s.x v12, a2
6725; CHECK-RV32-NEXT:    li a2, 208
6726; CHECK-RV32-NEXT:    li a4, 207
6727; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
6728; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
6729; CHECK-RV32-NEXT:    addi a0, a0, 1
6730; CHECK-RV32-NEXT:    vmv4r.v v24, v8
6731; CHECK-RV32-NEXT:    vmv8r.v v8, v24
6732; CHECK-RV32-NEXT:    slli a2, a3, 15
6733; CHECK-RV32-NEXT:    bltz a2, .LBB61_739
6734; CHECK-RV32-NEXT:    j .LBB61_222
6735; CHECK-RV32-NEXT:  .LBB61_739: # %cond.load829
6736; CHECK-RV32-NEXT:    lbu a2, 0(a0)
6737; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
6738; CHECK-RV32-NEXT:    vmv8r.v v24, v8
6739; CHECK-RV32-NEXT:    vmv.s.x v12, a2
6740; CHECK-RV32-NEXT:    li a2, 209
6741; CHECK-RV32-NEXT:    li a4, 208
6742; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
6743; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
6744; CHECK-RV32-NEXT:    addi a0, a0, 1
6745; CHECK-RV32-NEXT:    vmv4r.v v24, v8
6746; CHECK-RV32-NEXT:    vmv8r.v v8, v24
6747; CHECK-RV32-NEXT:    slli a2, a3, 14
6748; CHECK-RV32-NEXT:    bltz a2, .LBB61_740
6749; CHECK-RV32-NEXT:    j .LBB61_223
6750; CHECK-RV32-NEXT:  .LBB61_740: # %cond.load833
6751; CHECK-RV32-NEXT:    lbu a2, 0(a0)
6752; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
6753; CHECK-RV32-NEXT:    vmv8r.v v24, v8
6754; CHECK-RV32-NEXT:    vmv.s.x v12, a2
6755; CHECK-RV32-NEXT:    li a2, 210
6756; CHECK-RV32-NEXT:    li a4, 209
6757; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
6758; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
6759; CHECK-RV32-NEXT:    addi a0, a0, 1
6760; CHECK-RV32-NEXT:    vmv4r.v v24, v8
6761; CHECK-RV32-NEXT:    vmv8r.v v8, v24
6762; CHECK-RV32-NEXT:    slli a2, a3, 13
6763; CHECK-RV32-NEXT:    bltz a2, .LBB61_741
6764; CHECK-RV32-NEXT:    j .LBB61_224
6765; CHECK-RV32-NEXT:  .LBB61_741: # %cond.load837
6766; CHECK-RV32-NEXT:    lbu a2, 0(a0)
6767; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
6768; CHECK-RV32-NEXT:    vmv8r.v v24, v8
6769; CHECK-RV32-NEXT:    vmv.s.x v12, a2
6770; CHECK-RV32-NEXT:    li a2, 211
6771; CHECK-RV32-NEXT:    li a4, 210
6772; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
6773; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
6774; CHECK-RV32-NEXT:    addi a0, a0, 1
6775; CHECK-RV32-NEXT:    vmv4r.v v24, v8
6776; CHECK-RV32-NEXT:    vmv8r.v v8, v24
6777; CHECK-RV32-NEXT:    slli a2, a3, 12
6778; CHECK-RV32-NEXT:    bltz a2, .LBB61_742
6779; CHECK-RV32-NEXT:    j .LBB61_225
6780; CHECK-RV32-NEXT:  .LBB61_742: # %cond.load841
6781; CHECK-RV32-NEXT:    lbu a2, 0(a0)
6782; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
6783; CHECK-RV32-NEXT:    vmv8r.v v24, v8
6784; CHECK-RV32-NEXT:    vmv.s.x v12, a2
6785; CHECK-RV32-NEXT:    li a2, 212
6786; CHECK-RV32-NEXT:    li a4, 211
6787; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
6788; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
6789; CHECK-RV32-NEXT:    addi a0, a0, 1
6790; CHECK-RV32-NEXT:    vmv4r.v v24, v8
6791; CHECK-RV32-NEXT:    vmv8r.v v8, v24
6792; CHECK-RV32-NEXT:    slli a2, a3, 11
6793; CHECK-RV32-NEXT:    bltz a2, .LBB61_743
6794; CHECK-RV32-NEXT:    j .LBB61_226
6795; CHECK-RV32-NEXT:  .LBB61_743: # %cond.load845
6796; CHECK-RV32-NEXT:    lbu a2, 0(a0)
6797; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
6798; CHECK-RV32-NEXT:    vmv8r.v v24, v8
6799; CHECK-RV32-NEXT:    vmv.s.x v12, a2
6800; CHECK-RV32-NEXT:    li a2, 213
6801; CHECK-RV32-NEXT:    li a4, 212
6802; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
6803; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
6804; CHECK-RV32-NEXT:    addi a0, a0, 1
6805; CHECK-RV32-NEXT:    vmv4r.v v24, v8
6806; CHECK-RV32-NEXT:    vmv8r.v v8, v24
6807; CHECK-RV32-NEXT:    slli a2, a3, 10
6808; CHECK-RV32-NEXT:    bltz a2, .LBB61_744
6809; CHECK-RV32-NEXT:    j .LBB61_227
6810; CHECK-RV32-NEXT:  .LBB61_744: # %cond.load849
6811; CHECK-RV32-NEXT:    lbu a2, 0(a0)
6812; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
6813; CHECK-RV32-NEXT:    vmv8r.v v24, v8
6814; CHECK-RV32-NEXT:    vmv.s.x v12, a2
6815; CHECK-RV32-NEXT:    li a2, 214
6816; CHECK-RV32-NEXT:    li a4, 213
6817; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
6818; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
6819; CHECK-RV32-NEXT:    addi a0, a0, 1
6820; CHECK-RV32-NEXT:    vmv4r.v v24, v8
6821; CHECK-RV32-NEXT:    vmv8r.v v8, v24
6822; CHECK-RV32-NEXT:    slli a2, a3, 9
6823; CHECK-RV32-NEXT:    bltz a2, .LBB61_745
6824; CHECK-RV32-NEXT:    j .LBB61_228
6825; CHECK-RV32-NEXT:  .LBB61_745: # %cond.load853
6826; CHECK-RV32-NEXT:    lbu a2, 0(a0)
6827; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
6828; CHECK-RV32-NEXT:    vmv8r.v v24, v8
6829; CHECK-RV32-NEXT:    vmv.s.x v12, a2
6830; CHECK-RV32-NEXT:    li a2, 215
6831; CHECK-RV32-NEXT:    li a4, 214
6832; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
6833; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
6834; CHECK-RV32-NEXT:    addi a0, a0, 1
6835; CHECK-RV32-NEXT:    vmv4r.v v24, v8
6836; CHECK-RV32-NEXT:    vmv8r.v v8, v24
6837; CHECK-RV32-NEXT:    slli a2, a3, 8
6838; CHECK-RV32-NEXT:    bltz a2, .LBB61_746
6839; CHECK-RV32-NEXT:    j .LBB61_229
6840; CHECK-RV32-NEXT:  .LBB61_746: # %cond.load857
6841; CHECK-RV32-NEXT:    lbu a2, 0(a0)
6842; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
6843; CHECK-RV32-NEXT:    vmv8r.v v24, v8
6844; CHECK-RV32-NEXT:    vmv.s.x v12, a2
6845; CHECK-RV32-NEXT:    li a2, 216
6846; CHECK-RV32-NEXT:    li a4, 215
6847; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
6848; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
6849; CHECK-RV32-NEXT:    addi a0, a0, 1
6850; CHECK-RV32-NEXT:    vmv4r.v v24, v8
6851; CHECK-RV32-NEXT:    vmv8r.v v8, v24
6852; CHECK-RV32-NEXT:    slli a2, a3, 7
6853; CHECK-RV32-NEXT:    bltz a2, .LBB61_747
6854; CHECK-RV32-NEXT:    j .LBB61_230
6855; CHECK-RV32-NEXT:  .LBB61_747: # %cond.load861
6856; CHECK-RV32-NEXT:    lbu a2, 0(a0)
6857; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
6858; CHECK-RV32-NEXT:    vmv8r.v v24, v8
6859; CHECK-RV32-NEXT:    vmv.s.x v12, a2
6860; CHECK-RV32-NEXT:    li a2, 217
6861; CHECK-RV32-NEXT:    li a4, 216
6862; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
6863; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
6864; CHECK-RV32-NEXT:    addi a0, a0, 1
6865; CHECK-RV32-NEXT:    vmv4r.v v24, v8
6866; CHECK-RV32-NEXT:    vmv8r.v v8, v24
6867; CHECK-RV32-NEXT:    slli a2, a3, 6
6868; CHECK-RV32-NEXT:    bltz a2, .LBB61_748
6869; CHECK-RV32-NEXT:    j .LBB61_231
6870; CHECK-RV32-NEXT:  .LBB61_748: # %cond.load865
6871; CHECK-RV32-NEXT:    lbu a2, 0(a0)
6872; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
6873; CHECK-RV32-NEXT:    vmv8r.v v24, v8
6874; CHECK-RV32-NEXT:    vmv.s.x v12, a2
6875; CHECK-RV32-NEXT:    li a2, 218
6876; CHECK-RV32-NEXT:    li a4, 217
6877; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
6878; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
6879; CHECK-RV32-NEXT:    addi a0, a0, 1
6880; CHECK-RV32-NEXT:    vmv4r.v v24, v8
6881; CHECK-RV32-NEXT:    vmv8r.v v8, v24
6882; CHECK-RV32-NEXT:    slli a2, a3, 5
6883; CHECK-RV32-NEXT:    bltz a2, .LBB61_749
6884; CHECK-RV32-NEXT:    j .LBB61_232
6885; CHECK-RV32-NEXT:  .LBB61_749: # %cond.load869
6886; CHECK-RV32-NEXT:    lbu a2, 0(a0)
6887; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
6888; CHECK-RV32-NEXT:    vmv8r.v v24, v8
6889; CHECK-RV32-NEXT:    vmv.s.x v12, a2
6890; CHECK-RV32-NEXT:    li a2, 219
6891; CHECK-RV32-NEXT:    li a4, 218
6892; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
6893; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
6894; CHECK-RV32-NEXT:    addi a0, a0, 1
6895; CHECK-RV32-NEXT:    vmv4r.v v24, v8
6896; CHECK-RV32-NEXT:    vmv8r.v v8, v24
6897; CHECK-RV32-NEXT:    slli a2, a3, 4
6898; CHECK-RV32-NEXT:    bltz a2, .LBB61_750
6899; CHECK-RV32-NEXT:    j .LBB61_233
6900; CHECK-RV32-NEXT:  .LBB61_750: # %cond.load873
6901; CHECK-RV32-NEXT:    lbu a2, 0(a0)
6902; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
6903; CHECK-RV32-NEXT:    vmv8r.v v24, v8
6904; CHECK-RV32-NEXT:    vmv.s.x v12, a2
6905; CHECK-RV32-NEXT:    li a2, 220
6906; CHECK-RV32-NEXT:    li a4, 219
6907; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
6908; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
6909; CHECK-RV32-NEXT:    addi a0, a0, 1
6910; CHECK-RV32-NEXT:    vmv4r.v v24, v8
6911; CHECK-RV32-NEXT:    vmv8r.v v8, v24
6912; CHECK-RV32-NEXT:    slli a2, a3, 3
6913; CHECK-RV32-NEXT:    bltz a2, .LBB61_751
6914; CHECK-RV32-NEXT:    j .LBB61_234
6915; CHECK-RV32-NEXT:  .LBB61_751: # %cond.load877
6916; CHECK-RV32-NEXT:    lbu a2, 0(a0)
6917; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
6918; CHECK-RV32-NEXT:    vmv8r.v v24, v8
6919; CHECK-RV32-NEXT:    vmv.s.x v12, a2
6920; CHECK-RV32-NEXT:    li a2, 221
6921; CHECK-RV32-NEXT:    li a4, 220
6922; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
6923; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
6924; CHECK-RV32-NEXT:    addi a0, a0, 1
6925; CHECK-RV32-NEXT:    vmv4r.v v24, v8
6926; CHECK-RV32-NEXT:    vmv8r.v v8, v24
6927; CHECK-RV32-NEXT:    slli a2, a3, 2
6928; CHECK-RV32-NEXT:    bgez a2, .LBB61_1031
6929; CHECK-RV32-NEXT:    j .LBB61_235
6930; CHECK-RV32-NEXT:  .LBB61_1031: # %cond.load877
6931; CHECK-RV32-NEXT:    j .LBB61_236
6932; CHECK-RV32-NEXT:  .LBB61_752: # %cond.load889
6933; CHECK-RV32-NEXT:    lbu a3, 0(a0)
6934; CHECK-RV32-NEXT:    vmv8r.v v16, v8
6935; CHECK-RV32-NEXT:    vmv.s.x v12, a3
6936; CHECK-RV32-NEXT:    li a3, 224
6937; CHECK-RV32-NEXT:    li a4, 223
6938; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m4, tu, ma
6939; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
6940; CHECK-RV32-NEXT:    addi a0, a0, 1
6941; CHECK-RV32-NEXT:    vmv4r.v v16, v8
6942; CHECK-RV32-NEXT:    vmv8r.v v8, v16
6943; CHECK-RV32-NEXT:    andi a3, a2, 1
6944; CHECK-RV32-NEXT:    bnez a3, .LBB61_753
6945; CHECK-RV32-NEXT:    j .LBB61_240
6946; CHECK-RV32-NEXT:  .LBB61_753: # %cond.load893
6947; CHECK-RV32-NEXT:    lbu a3, 0(a0)
6948; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
6949; CHECK-RV32-NEXT:    vmv8r.v v16, v8
6950; CHECK-RV32-NEXT:    vmv.s.x v12, a3
6951; CHECK-RV32-NEXT:    li a3, 225
6952; CHECK-RV32-NEXT:    li a4, 224
6953; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m4, tu, ma
6954; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
6955; CHECK-RV32-NEXT:    addi a0, a0, 1
6956; CHECK-RV32-NEXT:    vmv4r.v v16, v8
6957; CHECK-RV32-NEXT:    vmv8r.v v8, v16
6958; CHECK-RV32-NEXT:    andi a3, a2, 2
6959; CHECK-RV32-NEXT:    bnez a3, .LBB61_754
6960; CHECK-RV32-NEXT:    j .LBB61_241
6961; CHECK-RV32-NEXT:  .LBB61_754: # %cond.load897
6962; CHECK-RV32-NEXT:    lbu a3, 0(a0)
6963; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
6964; CHECK-RV32-NEXT:    vmv8r.v v16, v8
6965; CHECK-RV32-NEXT:    vmv.s.x v12, a3
6966; CHECK-RV32-NEXT:    li a3, 226
6967; CHECK-RV32-NEXT:    li a4, 225
6968; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m4, tu, ma
6969; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
6970; CHECK-RV32-NEXT:    addi a0, a0, 1
6971; CHECK-RV32-NEXT:    vmv4r.v v16, v8
6972; CHECK-RV32-NEXT:    vmv8r.v v8, v16
6973; CHECK-RV32-NEXT:    andi a3, a2, 4
6974; CHECK-RV32-NEXT:    bnez a3, .LBB61_755
6975; CHECK-RV32-NEXT:    j .LBB61_242
6976; CHECK-RV32-NEXT:  .LBB61_755: # %cond.load901
6977; CHECK-RV32-NEXT:    lbu a3, 0(a0)
6978; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
6979; CHECK-RV32-NEXT:    vmv8r.v v16, v8
6980; CHECK-RV32-NEXT:    vmv.s.x v12, a3
6981; CHECK-RV32-NEXT:    li a3, 227
6982; CHECK-RV32-NEXT:    li a4, 226
6983; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m4, tu, ma
6984; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
6985; CHECK-RV32-NEXT:    addi a0, a0, 1
6986; CHECK-RV32-NEXT:    vmv4r.v v16, v8
6987; CHECK-RV32-NEXT:    vmv8r.v v8, v16
6988; CHECK-RV32-NEXT:    andi a3, a2, 8
6989; CHECK-RV32-NEXT:    bnez a3, .LBB61_756
6990; CHECK-RV32-NEXT:    j .LBB61_243
6991; CHECK-RV32-NEXT:  .LBB61_756: # %cond.load905
6992; CHECK-RV32-NEXT:    lbu a3, 0(a0)
6993; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
6994; CHECK-RV32-NEXT:    vmv8r.v v16, v8
6995; CHECK-RV32-NEXT:    vmv.s.x v12, a3
6996; CHECK-RV32-NEXT:    li a3, 228
6997; CHECK-RV32-NEXT:    li a4, 227
6998; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m4, tu, ma
6999; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
7000; CHECK-RV32-NEXT:    addi a0, a0, 1
7001; CHECK-RV32-NEXT:    vmv4r.v v16, v8
7002; CHECK-RV32-NEXT:    vmv8r.v v8, v16
7003; CHECK-RV32-NEXT:    andi a3, a2, 16
7004; CHECK-RV32-NEXT:    bnez a3, .LBB61_757
7005; CHECK-RV32-NEXT:    j .LBB61_244
7006; CHECK-RV32-NEXT:  .LBB61_757: # %cond.load909
7007; CHECK-RV32-NEXT:    lbu a3, 0(a0)
7008; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
7009; CHECK-RV32-NEXT:    vmv8r.v v16, v8
7010; CHECK-RV32-NEXT:    vmv.s.x v12, a3
7011; CHECK-RV32-NEXT:    li a3, 229
7012; CHECK-RV32-NEXT:    li a4, 228
7013; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m4, tu, ma
7014; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
7015; CHECK-RV32-NEXT:    addi a0, a0, 1
7016; CHECK-RV32-NEXT:    vmv4r.v v16, v8
7017; CHECK-RV32-NEXT:    vmv8r.v v8, v16
7018; CHECK-RV32-NEXT:    andi a3, a2, 32
7019; CHECK-RV32-NEXT:    bnez a3, .LBB61_758
7020; CHECK-RV32-NEXT:    j .LBB61_245
7021; CHECK-RV32-NEXT:  .LBB61_758: # %cond.load913
7022; CHECK-RV32-NEXT:    lbu a3, 0(a0)
7023; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
7024; CHECK-RV32-NEXT:    vmv8r.v v16, v8
7025; CHECK-RV32-NEXT:    vmv.s.x v12, a3
7026; CHECK-RV32-NEXT:    li a3, 230
7027; CHECK-RV32-NEXT:    li a4, 229
7028; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m4, tu, ma
7029; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
7030; CHECK-RV32-NEXT:    addi a0, a0, 1
7031; CHECK-RV32-NEXT:    vmv4r.v v16, v8
7032; CHECK-RV32-NEXT:    vmv8r.v v8, v16
7033; CHECK-RV32-NEXT:    andi a3, a2, 64
7034; CHECK-RV32-NEXT:    bnez a3, .LBB61_759
7035; CHECK-RV32-NEXT:    j .LBB61_246
7036; CHECK-RV32-NEXT:  .LBB61_759: # %cond.load917
7037; CHECK-RV32-NEXT:    lbu a3, 0(a0)
7038; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
7039; CHECK-RV32-NEXT:    vmv8r.v v16, v8
7040; CHECK-RV32-NEXT:    vmv.s.x v12, a3
7041; CHECK-RV32-NEXT:    li a3, 231
7042; CHECK-RV32-NEXT:    li a4, 230
7043; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m4, tu, ma
7044; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
7045; CHECK-RV32-NEXT:    addi a0, a0, 1
7046; CHECK-RV32-NEXT:    vmv4r.v v16, v8
7047; CHECK-RV32-NEXT:    vmv8r.v v8, v16
7048; CHECK-RV32-NEXT:    andi a3, a2, 128
7049; CHECK-RV32-NEXT:    bnez a3, .LBB61_760
7050; CHECK-RV32-NEXT:    j .LBB61_247
7051; CHECK-RV32-NEXT:  .LBB61_760: # %cond.load921
7052; CHECK-RV32-NEXT:    lbu a3, 0(a0)
7053; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
7054; CHECK-RV32-NEXT:    vmv8r.v v16, v8
7055; CHECK-RV32-NEXT:    vmv.s.x v12, a3
7056; CHECK-RV32-NEXT:    li a3, 232
7057; CHECK-RV32-NEXT:    li a4, 231
7058; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m4, tu, ma
7059; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
7060; CHECK-RV32-NEXT:    addi a0, a0, 1
7061; CHECK-RV32-NEXT:    vmv4r.v v16, v8
7062; CHECK-RV32-NEXT:    vmv8r.v v8, v16
7063; CHECK-RV32-NEXT:    andi a3, a2, 256
7064; CHECK-RV32-NEXT:    bnez a3, .LBB61_761
7065; CHECK-RV32-NEXT:    j .LBB61_248
7066; CHECK-RV32-NEXT:  .LBB61_761: # %cond.load925
7067; CHECK-RV32-NEXT:    lbu a3, 0(a0)
7068; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
7069; CHECK-RV32-NEXT:    vmv8r.v v16, v8
7070; CHECK-RV32-NEXT:    vmv.s.x v12, a3
7071; CHECK-RV32-NEXT:    li a3, 233
7072; CHECK-RV32-NEXT:    li a4, 232
7073; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m4, tu, ma
7074; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
7075; CHECK-RV32-NEXT:    addi a0, a0, 1
7076; CHECK-RV32-NEXT:    vmv4r.v v16, v8
7077; CHECK-RV32-NEXT:    vmv8r.v v8, v16
7078; CHECK-RV32-NEXT:    andi a3, a2, 512
7079; CHECK-RV32-NEXT:    bnez a3, .LBB61_762
7080; CHECK-RV32-NEXT:    j .LBB61_249
7081; CHECK-RV32-NEXT:  .LBB61_762: # %cond.load929
7082; CHECK-RV32-NEXT:    lbu a3, 0(a0)
7083; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
7084; CHECK-RV32-NEXT:    vmv8r.v v16, v8
7085; CHECK-RV32-NEXT:    vmv.s.x v12, a3
7086; CHECK-RV32-NEXT:    li a3, 234
7087; CHECK-RV32-NEXT:    li a4, 233
7088; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m4, tu, ma
7089; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
7090; CHECK-RV32-NEXT:    addi a0, a0, 1
7091; CHECK-RV32-NEXT:    vmv4r.v v16, v8
7092; CHECK-RV32-NEXT:    vmv8r.v v8, v16
7093; CHECK-RV32-NEXT:    andi a3, a2, 1024
7094; CHECK-RV32-NEXT:    bnez a3, .LBB61_763
7095; CHECK-RV32-NEXT:    j .LBB61_250
7096; CHECK-RV32-NEXT:  .LBB61_763: # %cond.load933
7097; CHECK-RV32-NEXT:    lbu a3, 0(a0)
7098; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
7099; CHECK-RV32-NEXT:    vmv8r.v v16, v8
7100; CHECK-RV32-NEXT:    vmv.s.x v12, a3
7101; CHECK-RV32-NEXT:    li a3, 235
7102; CHECK-RV32-NEXT:    li a4, 234
7103; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m4, tu, ma
7104; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
7105; CHECK-RV32-NEXT:    addi a0, a0, 1
7106; CHECK-RV32-NEXT:    vmv4r.v v16, v8
7107; CHECK-RV32-NEXT:    vmv8r.v v8, v16
7108; CHECK-RV32-NEXT:    slli a3, a2, 20
7109; CHECK-RV32-NEXT:    bltz a3, .LBB61_764
7110; CHECK-RV32-NEXT:    j .LBB61_251
7111; CHECK-RV32-NEXT:  .LBB61_764: # %cond.load937
7112; CHECK-RV32-NEXT:    lbu a3, 0(a0)
7113; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
7114; CHECK-RV32-NEXT:    vmv8r.v v16, v8
7115; CHECK-RV32-NEXT:    vmv.s.x v12, a3
7116; CHECK-RV32-NEXT:    li a3, 236
7117; CHECK-RV32-NEXT:    li a4, 235
7118; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m4, tu, ma
7119; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
7120; CHECK-RV32-NEXT:    addi a0, a0, 1
7121; CHECK-RV32-NEXT:    vmv4r.v v16, v8
7122; CHECK-RV32-NEXT:    vmv8r.v v8, v16
7123; CHECK-RV32-NEXT:    slli a3, a2, 19
7124; CHECK-RV32-NEXT:    bltz a3, .LBB61_765
7125; CHECK-RV32-NEXT:    j .LBB61_252
7126; CHECK-RV32-NEXT:  .LBB61_765: # %cond.load941
7127; CHECK-RV32-NEXT:    lbu a3, 0(a0)
7128; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
7129; CHECK-RV32-NEXT:    vmv8r.v v16, v8
7130; CHECK-RV32-NEXT:    vmv.s.x v12, a3
7131; CHECK-RV32-NEXT:    li a3, 237
7132; CHECK-RV32-NEXT:    li a4, 236
7133; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m4, tu, ma
7134; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
7135; CHECK-RV32-NEXT:    addi a0, a0, 1
7136; CHECK-RV32-NEXT:    vmv4r.v v16, v8
7137; CHECK-RV32-NEXT:    vmv8r.v v8, v16
7138; CHECK-RV32-NEXT:    slli a3, a2, 18
7139; CHECK-RV32-NEXT:    bltz a3, .LBB61_766
7140; CHECK-RV32-NEXT:    j .LBB61_253
7141; CHECK-RV32-NEXT:  .LBB61_766: # %cond.load945
7142; CHECK-RV32-NEXT:    lbu a3, 0(a0)
7143; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
7144; CHECK-RV32-NEXT:    vmv8r.v v16, v8
7145; CHECK-RV32-NEXT:    vmv.s.x v12, a3
7146; CHECK-RV32-NEXT:    li a3, 238
7147; CHECK-RV32-NEXT:    li a4, 237
7148; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m4, tu, ma
7149; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
7150; CHECK-RV32-NEXT:    addi a0, a0, 1
7151; CHECK-RV32-NEXT:    vmv4r.v v16, v8
7152; CHECK-RV32-NEXT:    vmv8r.v v8, v16
7153; CHECK-RV32-NEXT:    slli a3, a2, 17
7154; CHECK-RV32-NEXT:    bltz a3, .LBB61_767
7155; CHECK-RV32-NEXT:    j .LBB61_254
7156; CHECK-RV32-NEXT:  .LBB61_767: # %cond.load949
7157; CHECK-RV32-NEXT:    lbu a3, 0(a0)
7158; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
7159; CHECK-RV32-NEXT:    vmv8r.v v16, v8
7160; CHECK-RV32-NEXT:    vmv.s.x v12, a3
7161; CHECK-RV32-NEXT:    li a3, 239
7162; CHECK-RV32-NEXT:    li a4, 238
7163; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m4, tu, ma
7164; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
7165; CHECK-RV32-NEXT:    addi a0, a0, 1
7166; CHECK-RV32-NEXT:    vmv4r.v v16, v8
7167; CHECK-RV32-NEXT:    vmv8r.v v8, v16
7168; CHECK-RV32-NEXT:    slli a3, a2, 16
7169; CHECK-RV32-NEXT:    bltz a3, .LBB61_768
7170; CHECK-RV32-NEXT:    j .LBB61_255
7171; CHECK-RV32-NEXT:  .LBB61_768: # %cond.load953
7172; CHECK-RV32-NEXT:    lbu a3, 0(a0)
7173; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
7174; CHECK-RV32-NEXT:    vmv8r.v v16, v8
7175; CHECK-RV32-NEXT:    vmv.s.x v12, a3
7176; CHECK-RV32-NEXT:    li a3, 240
7177; CHECK-RV32-NEXT:    li a4, 239
7178; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m4, tu, ma
7179; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
7180; CHECK-RV32-NEXT:    addi a0, a0, 1
7181; CHECK-RV32-NEXT:    vmv4r.v v16, v8
7182; CHECK-RV32-NEXT:    vmv8r.v v8, v16
7183; CHECK-RV32-NEXT:    slli a3, a2, 15
7184; CHECK-RV32-NEXT:    bltz a3, .LBB61_769
7185; CHECK-RV32-NEXT:    j .LBB61_256
7186; CHECK-RV32-NEXT:  .LBB61_769: # %cond.load957
7187; CHECK-RV32-NEXT:    lbu a3, 0(a0)
7188; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
7189; CHECK-RV32-NEXT:    vmv8r.v v16, v8
7190; CHECK-RV32-NEXT:    vmv.s.x v12, a3
7191; CHECK-RV32-NEXT:    li a3, 241
7192; CHECK-RV32-NEXT:    li a4, 240
7193; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m4, tu, ma
7194; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
7195; CHECK-RV32-NEXT:    addi a0, a0, 1
7196; CHECK-RV32-NEXT:    vmv4r.v v16, v8
7197; CHECK-RV32-NEXT:    vmv8r.v v8, v16
7198; CHECK-RV32-NEXT:    slli a3, a2, 14
7199; CHECK-RV32-NEXT:    bltz a3, .LBB61_770
7200; CHECK-RV32-NEXT:    j .LBB61_257
7201; CHECK-RV32-NEXT:  .LBB61_770: # %cond.load961
7202; CHECK-RV32-NEXT:    lbu a3, 0(a0)
7203; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
7204; CHECK-RV32-NEXT:    vmv8r.v v16, v8
7205; CHECK-RV32-NEXT:    vmv.s.x v12, a3
7206; CHECK-RV32-NEXT:    li a3, 242
7207; CHECK-RV32-NEXT:    li a4, 241
7208; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m4, tu, ma
7209; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
7210; CHECK-RV32-NEXT:    addi a0, a0, 1
7211; CHECK-RV32-NEXT:    vmv4r.v v16, v8
7212; CHECK-RV32-NEXT:    vmv8r.v v8, v16
7213; CHECK-RV32-NEXT:    slli a3, a2, 13
7214; CHECK-RV32-NEXT:    bltz a3, .LBB61_771
7215; CHECK-RV32-NEXT:    j .LBB61_258
7216; CHECK-RV32-NEXT:  .LBB61_771: # %cond.load965
7217; CHECK-RV32-NEXT:    lbu a3, 0(a0)
7218; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
7219; CHECK-RV32-NEXT:    vmv8r.v v16, v8
7220; CHECK-RV32-NEXT:    vmv.s.x v12, a3
7221; CHECK-RV32-NEXT:    li a3, 243
7222; CHECK-RV32-NEXT:    li a4, 242
7223; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m4, tu, ma
7224; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
7225; CHECK-RV32-NEXT:    addi a0, a0, 1
7226; CHECK-RV32-NEXT:    vmv4r.v v16, v8
7227; CHECK-RV32-NEXT:    vmv8r.v v8, v16
7228; CHECK-RV32-NEXT:    slli a3, a2, 12
7229; CHECK-RV32-NEXT:    bltz a3, .LBB61_772
7230; CHECK-RV32-NEXT:    j .LBB61_259
7231; CHECK-RV32-NEXT:  .LBB61_772: # %cond.load969
7232; CHECK-RV32-NEXT:    lbu a3, 0(a0)
7233; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
7234; CHECK-RV32-NEXT:    vmv8r.v v16, v8
7235; CHECK-RV32-NEXT:    vmv.s.x v12, a3
7236; CHECK-RV32-NEXT:    li a3, 244
7237; CHECK-RV32-NEXT:    li a4, 243
7238; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m4, tu, ma
7239; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
7240; CHECK-RV32-NEXT:    addi a0, a0, 1
7241; CHECK-RV32-NEXT:    vmv4r.v v16, v8
7242; CHECK-RV32-NEXT:    vmv8r.v v8, v16
7243; CHECK-RV32-NEXT:    slli a3, a2, 11
7244; CHECK-RV32-NEXT:    bltz a3, .LBB61_773
7245; CHECK-RV32-NEXT:    j .LBB61_260
7246; CHECK-RV32-NEXT:  .LBB61_773: # %cond.load973
7247; CHECK-RV32-NEXT:    lbu a3, 0(a0)
7248; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
7249; CHECK-RV32-NEXT:    vmv8r.v v16, v8
7250; CHECK-RV32-NEXT:    vmv.s.x v12, a3
7251; CHECK-RV32-NEXT:    li a3, 245
7252; CHECK-RV32-NEXT:    li a4, 244
7253; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m4, tu, ma
7254; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
7255; CHECK-RV32-NEXT:    addi a0, a0, 1
7256; CHECK-RV32-NEXT:    vmv4r.v v16, v8
7257; CHECK-RV32-NEXT:    vmv8r.v v8, v16
7258; CHECK-RV32-NEXT:    slli a3, a2, 10
7259; CHECK-RV32-NEXT:    bltz a3, .LBB61_774
7260; CHECK-RV32-NEXT:    j .LBB61_261
7261; CHECK-RV32-NEXT:  .LBB61_774: # %cond.load977
7262; CHECK-RV32-NEXT:    lbu a3, 0(a0)
7263; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
7264; CHECK-RV32-NEXT:    vmv8r.v v16, v8
7265; CHECK-RV32-NEXT:    vmv.s.x v12, a3
7266; CHECK-RV32-NEXT:    li a3, 246
7267; CHECK-RV32-NEXT:    li a4, 245
7268; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m4, tu, ma
7269; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
7270; CHECK-RV32-NEXT:    addi a0, a0, 1
7271; CHECK-RV32-NEXT:    vmv4r.v v16, v8
7272; CHECK-RV32-NEXT:    vmv8r.v v8, v16
7273; CHECK-RV32-NEXT:    slli a3, a2, 9
7274; CHECK-RV32-NEXT:    bltz a3, .LBB61_775
7275; CHECK-RV32-NEXT:    j .LBB61_262
7276; CHECK-RV32-NEXT:  .LBB61_775: # %cond.load981
7277; CHECK-RV32-NEXT:    lbu a3, 0(a0)
7278; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
7279; CHECK-RV32-NEXT:    vmv8r.v v16, v8
7280; CHECK-RV32-NEXT:    vmv.s.x v12, a3
7281; CHECK-RV32-NEXT:    li a3, 247
7282; CHECK-RV32-NEXT:    li a4, 246
7283; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m4, tu, ma
7284; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
7285; CHECK-RV32-NEXT:    addi a0, a0, 1
7286; CHECK-RV32-NEXT:    vmv4r.v v16, v8
7287; CHECK-RV32-NEXT:    vmv8r.v v8, v16
7288; CHECK-RV32-NEXT:    slli a3, a2, 8
7289; CHECK-RV32-NEXT:    bltz a3, .LBB61_776
7290; CHECK-RV32-NEXT:    j .LBB61_263
7291; CHECK-RV32-NEXT:  .LBB61_776: # %cond.load985
7292; CHECK-RV32-NEXT:    lbu a3, 0(a0)
7293; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
7294; CHECK-RV32-NEXT:    vmv8r.v v16, v8
7295; CHECK-RV32-NEXT:    vmv.s.x v12, a3
7296; CHECK-RV32-NEXT:    li a3, 248
7297; CHECK-RV32-NEXT:    li a4, 247
7298; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m4, tu, ma
7299; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
7300; CHECK-RV32-NEXT:    addi a0, a0, 1
7301; CHECK-RV32-NEXT:    vmv4r.v v16, v8
7302; CHECK-RV32-NEXT:    vmv8r.v v8, v16
7303; CHECK-RV32-NEXT:    slli a3, a2, 7
7304; CHECK-RV32-NEXT:    bltz a3, .LBB61_777
7305; CHECK-RV32-NEXT:    j .LBB61_264
7306; CHECK-RV32-NEXT:  .LBB61_777: # %cond.load989
7307; CHECK-RV32-NEXT:    lbu a3, 0(a0)
7308; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
7309; CHECK-RV32-NEXT:    vmv8r.v v16, v8
7310; CHECK-RV32-NEXT:    vmv.s.x v12, a3
7311; CHECK-RV32-NEXT:    li a3, 249
7312; CHECK-RV32-NEXT:    li a4, 248
7313; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m4, tu, ma
7314; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
7315; CHECK-RV32-NEXT:    addi a0, a0, 1
7316; CHECK-RV32-NEXT:    vmv4r.v v16, v8
7317; CHECK-RV32-NEXT:    vmv8r.v v8, v16
7318; CHECK-RV32-NEXT:    slli a3, a2, 6
7319; CHECK-RV32-NEXT:    bltz a3, .LBB61_778
7320; CHECK-RV32-NEXT:    j .LBB61_265
7321; CHECK-RV32-NEXT:  .LBB61_778: # %cond.load993
7322; CHECK-RV32-NEXT:    lbu a3, 0(a0)
7323; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
7324; CHECK-RV32-NEXT:    vmv8r.v v16, v8
7325; CHECK-RV32-NEXT:    vmv.s.x v12, a3
7326; CHECK-RV32-NEXT:    li a3, 250
7327; CHECK-RV32-NEXT:    li a4, 249
7328; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m4, tu, ma
7329; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
7330; CHECK-RV32-NEXT:    addi a0, a0, 1
7331; CHECK-RV32-NEXT:    vmv4r.v v16, v8
7332; CHECK-RV32-NEXT:    vmv8r.v v8, v16
7333; CHECK-RV32-NEXT:    slli a3, a2, 5
7334; CHECK-RV32-NEXT:    bltz a3, .LBB61_779
7335; CHECK-RV32-NEXT:    j .LBB61_266
7336; CHECK-RV32-NEXT:  .LBB61_779: # %cond.load997
7337; CHECK-RV32-NEXT:    lbu a3, 0(a0)
7338; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
7339; CHECK-RV32-NEXT:    vmv8r.v v16, v8
7340; CHECK-RV32-NEXT:    vmv.s.x v12, a3
7341; CHECK-RV32-NEXT:    li a3, 251
7342; CHECK-RV32-NEXT:    li a4, 250
7343; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m4, tu, ma
7344; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
7345; CHECK-RV32-NEXT:    addi a0, a0, 1
7346; CHECK-RV32-NEXT:    vmv4r.v v16, v8
7347; CHECK-RV32-NEXT:    vmv8r.v v8, v16
7348; CHECK-RV32-NEXT:    slli a3, a2, 4
7349; CHECK-RV32-NEXT:    bltz a3, .LBB61_780
7350; CHECK-RV32-NEXT:    j .LBB61_267
7351; CHECK-RV32-NEXT:  .LBB61_780: # %cond.load1001
7352; CHECK-RV32-NEXT:    lbu a3, 0(a0)
7353; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
7354; CHECK-RV32-NEXT:    vmv8r.v v16, v8
7355; CHECK-RV32-NEXT:    vmv.s.x v12, a3
7356; CHECK-RV32-NEXT:    li a3, 252
7357; CHECK-RV32-NEXT:    li a4, 251
7358; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m4, tu, ma
7359; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
7360; CHECK-RV32-NEXT:    addi a0, a0, 1
7361; CHECK-RV32-NEXT:    vmv4r.v v16, v8
7362; CHECK-RV32-NEXT:    vmv8r.v v8, v16
7363; CHECK-RV32-NEXT:    slli a3, a2, 3
7364; CHECK-RV32-NEXT:    bltz a3, .LBB61_781
7365; CHECK-RV32-NEXT:    j .LBB61_268
7366; CHECK-RV32-NEXT:  .LBB61_781: # %cond.load1005
7367; CHECK-RV32-NEXT:    lbu a3, 0(a0)
7368; CHECK-RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
7369; CHECK-RV32-NEXT:    vmv8r.v v16, v8
7370; CHECK-RV32-NEXT:    vmv.s.x v12, a3
7371; CHECK-RV32-NEXT:    li a3, 253
7372; CHECK-RV32-NEXT:    li a4, 252
7373; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m4, tu, ma
7374; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
7375; CHECK-RV32-NEXT:    addi a0, a0, 1
7376; CHECK-RV32-NEXT:    vmv4r.v v16, v8
7377; CHECK-RV32-NEXT:    vmv8r.v v8, v16
7378; CHECK-RV32-NEXT:    slli a3, a2, 2
7379; CHECK-RV32-NEXT:    bgez a3, .LBB61_1032
7380; CHECK-RV32-NEXT:    j .LBB61_269
7381; CHECK-RV32-NEXT:  .LBB61_1032: # %cond.load1005
7382; CHECK-RV32-NEXT:    j .LBB61_270
7383; CHECK-RV32-NEXT:  .LBB61_782: # %cond.load1017
7384; CHECK-RV32-NEXT:    lbu a2, 0(a0)
7385; CHECK-RV32-NEXT:    vmv8r.v v24, v8
7386; CHECK-RV32-NEXT:    vmv.s.x v12, a2
7387; CHECK-RV32-NEXT:    li a2, 256
7388; CHECK-RV32-NEXT:    li a4, 255
7389; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
7390; CHECK-RV32-NEXT:    vslideup.vx v8, v12, a4
7391; CHECK-RV32-NEXT:    addi a0, a0, 1
7392; CHECK-RV32-NEXT:    vmv4r.v v24, v8
7393; CHECK-RV32-NEXT:    vmv8r.v v8, v24
7394; CHECK-RV32-NEXT:    andi a2, a3, 1
7395; CHECK-RV32-NEXT:    bnez a2, .LBB61_783
7396; CHECK-RV32-NEXT:    j .LBB61_274
7397; CHECK-RV32-NEXT:  .LBB61_783: # %cond.load1021
7398; CHECK-RV32-NEXT:    lbu a2, 0(a0)
7399; CHECK-RV32-NEXT:    li a4, 512
7400; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
7401; CHECK-RV32-NEXT:    vmv.s.x v24, a2
7402; CHECK-RV32-NEXT:    li a2, 257
7403; CHECK-RV32-NEXT:    li a4, 256
7404; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
7405; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
7406; CHECK-RV32-NEXT:    addi a0, a0, 1
7407; CHECK-RV32-NEXT:    andi a2, a3, 2
7408; CHECK-RV32-NEXT:    bnez a2, .LBB61_784
7409; CHECK-RV32-NEXT:    j .LBB61_275
7410; CHECK-RV32-NEXT:  .LBB61_784: # %cond.load1025
7411; CHECK-RV32-NEXT:    lbu a2, 0(a0)
7412; CHECK-RV32-NEXT:    li a4, 512
7413; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
7414; CHECK-RV32-NEXT:    vmv.s.x v24, a2
7415; CHECK-RV32-NEXT:    li a2, 258
7416; CHECK-RV32-NEXT:    li a4, 257
7417; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
7418; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
7419; CHECK-RV32-NEXT:    addi a0, a0, 1
7420; CHECK-RV32-NEXT:    andi a2, a3, 4
7421; CHECK-RV32-NEXT:    bnez a2, .LBB61_785
7422; CHECK-RV32-NEXT:    j .LBB61_276
7423; CHECK-RV32-NEXT:  .LBB61_785: # %cond.load1029
7424; CHECK-RV32-NEXT:    lbu a2, 0(a0)
7425; CHECK-RV32-NEXT:    li a4, 512
7426; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
7427; CHECK-RV32-NEXT:    vmv.s.x v24, a2
7428; CHECK-RV32-NEXT:    li a2, 259
7429; CHECK-RV32-NEXT:    li a4, 258
7430; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
7431; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
7432; CHECK-RV32-NEXT:    addi a0, a0, 1
7433; CHECK-RV32-NEXT:    andi a2, a3, 8
7434; CHECK-RV32-NEXT:    bnez a2, .LBB61_786
7435; CHECK-RV32-NEXT:    j .LBB61_277
7436; CHECK-RV32-NEXT:  .LBB61_786: # %cond.load1033
7437; CHECK-RV32-NEXT:    lbu a2, 0(a0)
7438; CHECK-RV32-NEXT:    li a4, 512
7439; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
7440; CHECK-RV32-NEXT:    vmv.s.x v24, a2
7441; CHECK-RV32-NEXT:    li a2, 260
7442; CHECK-RV32-NEXT:    li a4, 259
7443; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
7444; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
7445; CHECK-RV32-NEXT:    addi a0, a0, 1
7446; CHECK-RV32-NEXT:    andi a2, a3, 16
7447; CHECK-RV32-NEXT:    bnez a2, .LBB61_787
7448; CHECK-RV32-NEXT:    j .LBB61_278
7449; CHECK-RV32-NEXT:  .LBB61_787: # %cond.load1037
7450; CHECK-RV32-NEXT:    lbu a2, 0(a0)
7451; CHECK-RV32-NEXT:    li a4, 512
7452; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
7453; CHECK-RV32-NEXT:    vmv.s.x v24, a2
7454; CHECK-RV32-NEXT:    li a2, 261
7455; CHECK-RV32-NEXT:    li a4, 260
7456; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
7457; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
7458; CHECK-RV32-NEXT:    addi a0, a0, 1
7459; CHECK-RV32-NEXT:    andi a2, a3, 32
7460; CHECK-RV32-NEXT:    bnez a2, .LBB61_788
7461; CHECK-RV32-NEXT:    j .LBB61_279
7462; CHECK-RV32-NEXT:  .LBB61_788: # %cond.load1041
7463; CHECK-RV32-NEXT:    lbu a2, 0(a0)
7464; CHECK-RV32-NEXT:    li a4, 512
7465; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
7466; CHECK-RV32-NEXT:    vmv.s.x v24, a2
7467; CHECK-RV32-NEXT:    li a2, 262
7468; CHECK-RV32-NEXT:    li a4, 261
7469; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
7470; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
7471; CHECK-RV32-NEXT:    addi a0, a0, 1
7472; CHECK-RV32-NEXT:    andi a2, a3, 64
7473; CHECK-RV32-NEXT:    bnez a2, .LBB61_789
7474; CHECK-RV32-NEXT:    j .LBB61_280
7475; CHECK-RV32-NEXT:  .LBB61_789: # %cond.load1045
7476; CHECK-RV32-NEXT:    lbu a2, 0(a0)
7477; CHECK-RV32-NEXT:    li a4, 512
7478; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
7479; CHECK-RV32-NEXT:    vmv.s.x v24, a2
7480; CHECK-RV32-NEXT:    li a2, 263
7481; CHECK-RV32-NEXT:    li a4, 262
7482; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
7483; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
7484; CHECK-RV32-NEXT:    addi a0, a0, 1
7485; CHECK-RV32-NEXT:    andi a2, a3, 128
7486; CHECK-RV32-NEXT:    bnez a2, .LBB61_790
7487; CHECK-RV32-NEXT:    j .LBB61_281
7488; CHECK-RV32-NEXT:  .LBB61_790: # %cond.load1049
7489; CHECK-RV32-NEXT:    lbu a2, 0(a0)
7490; CHECK-RV32-NEXT:    li a4, 512
7491; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
7492; CHECK-RV32-NEXT:    vmv.s.x v24, a2
7493; CHECK-RV32-NEXT:    li a2, 264
7494; CHECK-RV32-NEXT:    li a4, 263
7495; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
7496; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
7497; CHECK-RV32-NEXT:    addi a0, a0, 1
7498; CHECK-RV32-NEXT:    andi a2, a3, 256
7499; CHECK-RV32-NEXT:    bnez a2, .LBB61_791
7500; CHECK-RV32-NEXT:    j .LBB61_282
7501; CHECK-RV32-NEXT:  .LBB61_791: # %cond.load1053
7502; CHECK-RV32-NEXT:    lbu a2, 0(a0)
7503; CHECK-RV32-NEXT:    li a4, 512
7504; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
7505; CHECK-RV32-NEXT:    vmv.s.x v24, a2
7506; CHECK-RV32-NEXT:    li a2, 265
7507; CHECK-RV32-NEXT:    li a4, 264
7508; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
7509; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
7510; CHECK-RV32-NEXT:    addi a0, a0, 1
7511; CHECK-RV32-NEXT:    andi a2, a3, 512
7512; CHECK-RV32-NEXT:    bnez a2, .LBB61_792
7513; CHECK-RV32-NEXT:    j .LBB61_283
7514; CHECK-RV32-NEXT:  .LBB61_792: # %cond.load1057
7515; CHECK-RV32-NEXT:    lbu a2, 0(a0)
7516; CHECK-RV32-NEXT:    li a4, 512
7517; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
7518; CHECK-RV32-NEXT:    vmv.s.x v24, a2
7519; CHECK-RV32-NEXT:    li a2, 266
7520; CHECK-RV32-NEXT:    li a4, 265
7521; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
7522; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
7523; CHECK-RV32-NEXT:    addi a0, a0, 1
7524; CHECK-RV32-NEXT:    andi a2, a3, 1024
7525; CHECK-RV32-NEXT:    bnez a2, .LBB61_793
7526; CHECK-RV32-NEXT:    j .LBB61_284
7527; CHECK-RV32-NEXT:  .LBB61_793: # %cond.load1061
7528; CHECK-RV32-NEXT:    lbu a2, 0(a0)
7529; CHECK-RV32-NEXT:    li a4, 512
7530; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
7531; CHECK-RV32-NEXT:    vmv.s.x v24, a2
7532; CHECK-RV32-NEXT:    li a2, 267
7533; CHECK-RV32-NEXT:    li a4, 266
7534; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
7535; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
7536; CHECK-RV32-NEXT:    addi a0, a0, 1
7537; CHECK-RV32-NEXT:    slli a2, a3, 20
7538; CHECK-RV32-NEXT:    bltz a2, .LBB61_794
7539; CHECK-RV32-NEXT:    j .LBB61_285
7540; CHECK-RV32-NEXT:  .LBB61_794: # %cond.load1065
7541; CHECK-RV32-NEXT:    lbu a2, 0(a0)
7542; CHECK-RV32-NEXT:    li a4, 512
7543; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
7544; CHECK-RV32-NEXT:    vmv.s.x v24, a2
7545; CHECK-RV32-NEXT:    li a2, 268
7546; CHECK-RV32-NEXT:    li a4, 267
7547; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
7548; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
7549; CHECK-RV32-NEXT:    addi a0, a0, 1
7550; CHECK-RV32-NEXT:    slli a2, a3, 19
7551; CHECK-RV32-NEXT:    bltz a2, .LBB61_795
7552; CHECK-RV32-NEXT:    j .LBB61_286
7553; CHECK-RV32-NEXT:  .LBB61_795: # %cond.load1069
7554; CHECK-RV32-NEXT:    lbu a2, 0(a0)
7555; CHECK-RV32-NEXT:    li a4, 512
7556; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
7557; CHECK-RV32-NEXT:    vmv.s.x v24, a2
7558; CHECK-RV32-NEXT:    li a2, 269
7559; CHECK-RV32-NEXT:    li a4, 268
7560; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
7561; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
7562; CHECK-RV32-NEXT:    addi a0, a0, 1
7563; CHECK-RV32-NEXT:    slli a2, a3, 18
7564; CHECK-RV32-NEXT:    bltz a2, .LBB61_796
7565; CHECK-RV32-NEXT:    j .LBB61_287
7566; CHECK-RV32-NEXT:  .LBB61_796: # %cond.load1073
7567; CHECK-RV32-NEXT:    lbu a2, 0(a0)
7568; CHECK-RV32-NEXT:    li a4, 512
7569; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
7570; CHECK-RV32-NEXT:    vmv.s.x v24, a2
7571; CHECK-RV32-NEXT:    li a2, 270
7572; CHECK-RV32-NEXT:    li a4, 269
7573; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
7574; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
7575; CHECK-RV32-NEXT:    addi a0, a0, 1
7576; CHECK-RV32-NEXT:    slli a2, a3, 17
7577; CHECK-RV32-NEXT:    bltz a2, .LBB61_797
7578; CHECK-RV32-NEXT:    j .LBB61_288
7579; CHECK-RV32-NEXT:  .LBB61_797: # %cond.load1077
7580; CHECK-RV32-NEXT:    lbu a2, 0(a0)
7581; CHECK-RV32-NEXT:    li a4, 512
7582; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
7583; CHECK-RV32-NEXT:    vmv.s.x v24, a2
7584; CHECK-RV32-NEXT:    li a2, 271
7585; CHECK-RV32-NEXT:    li a4, 270
7586; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
7587; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
7588; CHECK-RV32-NEXT:    addi a0, a0, 1
7589; CHECK-RV32-NEXT:    slli a2, a3, 16
7590; CHECK-RV32-NEXT:    bltz a2, .LBB61_798
7591; CHECK-RV32-NEXT:    j .LBB61_289
7592; CHECK-RV32-NEXT:  .LBB61_798: # %cond.load1081
7593; CHECK-RV32-NEXT:    lbu a2, 0(a0)
7594; CHECK-RV32-NEXT:    li a4, 512
7595; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
7596; CHECK-RV32-NEXT:    vmv.s.x v24, a2
7597; CHECK-RV32-NEXT:    li a2, 272
7598; CHECK-RV32-NEXT:    li a4, 271
7599; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
7600; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
7601; CHECK-RV32-NEXT:    addi a0, a0, 1
7602; CHECK-RV32-NEXT:    slli a2, a3, 15
7603; CHECK-RV32-NEXT:    bltz a2, .LBB61_799
7604; CHECK-RV32-NEXT:    j .LBB61_290
7605; CHECK-RV32-NEXT:  .LBB61_799: # %cond.load1085
7606; CHECK-RV32-NEXT:    lbu a2, 0(a0)
7607; CHECK-RV32-NEXT:    li a4, 512
7608; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
7609; CHECK-RV32-NEXT:    vmv.s.x v24, a2
7610; CHECK-RV32-NEXT:    li a2, 273
7611; CHECK-RV32-NEXT:    li a4, 272
7612; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
7613; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
7614; CHECK-RV32-NEXT:    addi a0, a0, 1
7615; CHECK-RV32-NEXT:    slli a2, a3, 14
7616; CHECK-RV32-NEXT:    bltz a2, .LBB61_800
7617; CHECK-RV32-NEXT:    j .LBB61_291
7618; CHECK-RV32-NEXT:  .LBB61_800: # %cond.load1089
7619; CHECK-RV32-NEXT:    lbu a2, 0(a0)
7620; CHECK-RV32-NEXT:    li a4, 512
7621; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
7622; CHECK-RV32-NEXT:    vmv.s.x v24, a2
7623; CHECK-RV32-NEXT:    li a2, 274
7624; CHECK-RV32-NEXT:    li a4, 273
7625; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
7626; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
7627; CHECK-RV32-NEXT:    addi a0, a0, 1
7628; CHECK-RV32-NEXT:    slli a2, a3, 13
7629; CHECK-RV32-NEXT:    bltz a2, .LBB61_801
7630; CHECK-RV32-NEXT:    j .LBB61_292
7631; CHECK-RV32-NEXT:  .LBB61_801: # %cond.load1093
7632; CHECK-RV32-NEXT:    lbu a2, 0(a0)
7633; CHECK-RV32-NEXT:    li a4, 512
7634; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
7635; CHECK-RV32-NEXT:    vmv.s.x v24, a2
7636; CHECK-RV32-NEXT:    li a2, 275
7637; CHECK-RV32-NEXT:    li a4, 274
7638; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
7639; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
7640; CHECK-RV32-NEXT:    addi a0, a0, 1
7641; CHECK-RV32-NEXT:    slli a2, a3, 12
7642; CHECK-RV32-NEXT:    bltz a2, .LBB61_802
7643; CHECK-RV32-NEXT:    j .LBB61_293
7644; CHECK-RV32-NEXT:  .LBB61_802: # %cond.load1097
7645; CHECK-RV32-NEXT:    lbu a2, 0(a0)
7646; CHECK-RV32-NEXT:    li a4, 512
7647; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
7648; CHECK-RV32-NEXT:    vmv.s.x v24, a2
7649; CHECK-RV32-NEXT:    li a2, 276
7650; CHECK-RV32-NEXT:    li a4, 275
7651; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
7652; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
7653; CHECK-RV32-NEXT:    addi a0, a0, 1
7654; CHECK-RV32-NEXT:    slli a2, a3, 11
7655; CHECK-RV32-NEXT:    bltz a2, .LBB61_803
7656; CHECK-RV32-NEXT:    j .LBB61_294
7657; CHECK-RV32-NEXT:  .LBB61_803: # %cond.load1101
7658; CHECK-RV32-NEXT:    lbu a2, 0(a0)
7659; CHECK-RV32-NEXT:    li a4, 512
7660; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
7661; CHECK-RV32-NEXT:    vmv.s.x v24, a2
7662; CHECK-RV32-NEXT:    li a2, 277
7663; CHECK-RV32-NEXT:    li a4, 276
7664; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
7665; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
7666; CHECK-RV32-NEXT:    addi a0, a0, 1
7667; CHECK-RV32-NEXT:    slli a2, a3, 10
7668; CHECK-RV32-NEXT:    bltz a2, .LBB61_804
7669; CHECK-RV32-NEXT:    j .LBB61_295
7670; CHECK-RV32-NEXT:  .LBB61_804: # %cond.load1105
7671; CHECK-RV32-NEXT:    lbu a2, 0(a0)
7672; CHECK-RV32-NEXT:    li a4, 512
7673; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
7674; CHECK-RV32-NEXT:    vmv.s.x v24, a2
7675; CHECK-RV32-NEXT:    li a2, 278
7676; CHECK-RV32-NEXT:    li a4, 277
7677; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
7678; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
7679; CHECK-RV32-NEXT:    addi a0, a0, 1
7680; CHECK-RV32-NEXT:    slli a2, a3, 9
7681; CHECK-RV32-NEXT:    bltz a2, .LBB61_805
7682; CHECK-RV32-NEXT:    j .LBB61_296
7683; CHECK-RV32-NEXT:  .LBB61_805: # %cond.load1109
7684; CHECK-RV32-NEXT:    lbu a2, 0(a0)
7685; CHECK-RV32-NEXT:    li a4, 512
7686; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
7687; CHECK-RV32-NEXT:    vmv.s.x v24, a2
7688; CHECK-RV32-NEXT:    li a2, 279
7689; CHECK-RV32-NEXT:    li a4, 278
7690; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
7691; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
7692; CHECK-RV32-NEXT:    addi a0, a0, 1
7693; CHECK-RV32-NEXT:    slli a2, a3, 8
7694; CHECK-RV32-NEXT:    bltz a2, .LBB61_806
7695; CHECK-RV32-NEXT:    j .LBB61_297
7696; CHECK-RV32-NEXT:  .LBB61_806: # %cond.load1113
7697; CHECK-RV32-NEXT:    lbu a2, 0(a0)
7698; CHECK-RV32-NEXT:    li a4, 512
7699; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
7700; CHECK-RV32-NEXT:    vmv.s.x v24, a2
7701; CHECK-RV32-NEXT:    li a2, 280
7702; CHECK-RV32-NEXT:    li a4, 279
7703; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
7704; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
7705; CHECK-RV32-NEXT:    addi a0, a0, 1
7706; CHECK-RV32-NEXT:    slli a2, a3, 7
7707; CHECK-RV32-NEXT:    bltz a2, .LBB61_807
7708; CHECK-RV32-NEXT:    j .LBB61_298
7709; CHECK-RV32-NEXT:  .LBB61_807: # %cond.load1117
7710; CHECK-RV32-NEXT:    lbu a2, 0(a0)
7711; CHECK-RV32-NEXT:    li a4, 512
7712; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
7713; CHECK-RV32-NEXT:    vmv.s.x v24, a2
7714; CHECK-RV32-NEXT:    li a2, 281
7715; CHECK-RV32-NEXT:    li a4, 280
7716; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
7717; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
7718; CHECK-RV32-NEXT:    addi a0, a0, 1
7719; CHECK-RV32-NEXT:    slli a2, a3, 6
7720; CHECK-RV32-NEXT:    bltz a2, .LBB61_808
7721; CHECK-RV32-NEXT:    j .LBB61_299
7722; CHECK-RV32-NEXT:  .LBB61_808: # %cond.load1121
7723; CHECK-RV32-NEXT:    lbu a2, 0(a0)
7724; CHECK-RV32-NEXT:    li a4, 512
7725; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
7726; CHECK-RV32-NEXT:    vmv.s.x v24, a2
7727; CHECK-RV32-NEXT:    li a2, 282
7728; CHECK-RV32-NEXT:    li a4, 281
7729; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
7730; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
7731; CHECK-RV32-NEXT:    addi a0, a0, 1
7732; CHECK-RV32-NEXT:    slli a2, a3, 5
7733; CHECK-RV32-NEXT:    bltz a2, .LBB61_809
7734; CHECK-RV32-NEXT:    j .LBB61_300
7735; CHECK-RV32-NEXT:  .LBB61_809: # %cond.load1125
7736; CHECK-RV32-NEXT:    lbu a2, 0(a0)
7737; CHECK-RV32-NEXT:    li a4, 512
7738; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
7739; CHECK-RV32-NEXT:    vmv.s.x v24, a2
7740; CHECK-RV32-NEXT:    li a2, 283
7741; CHECK-RV32-NEXT:    li a4, 282
7742; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
7743; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
7744; CHECK-RV32-NEXT:    addi a0, a0, 1
7745; CHECK-RV32-NEXT:    slli a2, a3, 4
7746; CHECK-RV32-NEXT:    bltz a2, .LBB61_810
7747; CHECK-RV32-NEXT:    j .LBB61_301
7748; CHECK-RV32-NEXT:  .LBB61_810: # %cond.load1129
7749; CHECK-RV32-NEXT:    lbu a2, 0(a0)
7750; CHECK-RV32-NEXT:    li a4, 512
7751; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
7752; CHECK-RV32-NEXT:    vmv.s.x v24, a2
7753; CHECK-RV32-NEXT:    li a2, 284
7754; CHECK-RV32-NEXT:    li a4, 283
7755; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
7756; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
7757; CHECK-RV32-NEXT:    addi a0, a0, 1
7758; CHECK-RV32-NEXT:    slli a2, a3, 3
7759; CHECK-RV32-NEXT:    bltz a2, .LBB61_811
7760; CHECK-RV32-NEXT:    j .LBB61_302
7761; CHECK-RV32-NEXT:  .LBB61_811: # %cond.load1133
7762; CHECK-RV32-NEXT:    lbu a2, 0(a0)
7763; CHECK-RV32-NEXT:    li a4, 512
7764; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
7765; CHECK-RV32-NEXT:    vmv.s.x v24, a2
7766; CHECK-RV32-NEXT:    li a2, 285
7767; CHECK-RV32-NEXT:    li a4, 284
7768; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
7769; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
7770; CHECK-RV32-NEXT:    addi a0, a0, 1
7771; CHECK-RV32-NEXT:    slli a2, a3, 2
7772; CHECK-RV32-NEXT:    bgez a2, .LBB61_1033
7773; CHECK-RV32-NEXT:    j .LBB61_303
7774; CHECK-RV32-NEXT:  .LBB61_1033: # %cond.load1133
7775; CHECK-RV32-NEXT:    j .LBB61_304
7776; CHECK-RV32-NEXT:  .LBB61_812: # %cond.load1145
7777; CHECK-RV32-NEXT:    lbu a3, 0(a0)
7778; CHECK-RV32-NEXT:    vmv.s.x v16, a3
7779; CHECK-RV32-NEXT:    li a3, 288
7780; CHECK-RV32-NEXT:    li a4, 287
7781; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
7782; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
7783; CHECK-RV32-NEXT:    addi a0, a0, 1
7784; CHECK-RV32-NEXT:    andi a3, a2, 1
7785; CHECK-RV32-NEXT:    bnez a3, .LBB61_813
7786; CHECK-RV32-NEXT:    j .LBB61_308
7787; CHECK-RV32-NEXT:  .LBB61_813: # %cond.load1149
7788; CHECK-RV32-NEXT:    lbu a3, 0(a0)
7789; CHECK-RV32-NEXT:    li a4, 512
7790; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
7791; CHECK-RV32-NEXT:    vmv.s.x v16, a3
7792; CHECK-RV32-NEXT:    li a3, 289
7793; CHECK-RV32-NEXT:    li a4, 288
7794; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
7795; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
7796; CHECK-RV32-NEXT:    addi a0, a0, 1
7797; CHECK-RV32-NEXT:    andi a3, a2, 2
7798; CHECK-RV32-NEXT:    bnez a3, .LBB61_814
7799; CHECK-RV32-NEXT:    j .LBB61_309
7800; CHECK-RV32-NEXT:  .LBB61_814: # %cond.load1153
7801; CHECK-RV32-NEXT:    lbu a3, 0(a0)
7802; CHECK-RV32-NEXT:    li a4, 512
7803; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
7804; CHECK-RV32-NEXT:    vmv.s.x v16, a3
7805; CHECK-RV32-NEXT:    li a3, 290
7806; CHECK-RV32-NEXT:    li a4, 289
7807; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
7808; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
7809; CHECK-RV32-NEXT:    addi a0, a0, 1
7810; CHECK-RV32-NEXT:    andi a3, a2, 4
7811; CHECK-RV32-NEXT:    bnez a3, .LBB61_815
7812; CHECK-RV32-NEXT:    j .LBB61_310
7813; CHECK-RV32-NEXT:  .LBB61_815: # %cond.load1157
7814; CHECK-RV32-NEXT:    lbu a3, 0(a0)
7815; CHECK-RV32-NEXT:    li a4, 512
7816; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
7817; CHECK-RV32-NEXT:    vmv.s.x v16, a3
7818; CHECK-RV32-NEXT:    li a3, 291
7819; CHECK-RV32-NEXT:    li a4, 290
7820; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
7821; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
7822; CHECK-RV32-NEXT:    addi a0, a0, 1
7823; CHECK-RV32-NEXT:    andi a3, a2, 8
7824; CHECK-RV32-NEXT:    bnez a3, .LBB61_816
7825; CHECK-RV32-NEXT:    j .LBB61_311
7826; CHECK-RV32-NEXT:  .LBB61_816: # %cond.load1161
7827; CHECK-RV32-NEXT:    lbu a3, 0(a0)
7828; CHECK-RV32-NEXT:    li a4, 512
7829; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
7830; CHECK-RV32-NEXT:    vmv.s.x v16, a3
7831; CHECK-RV32-NEXT:    li a3, 292
7832; CHECK-RV32-NEXT:    li a4, 291
7833; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
7834; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
7835; CHECK-RV32-NEXT:    addi a0, a0, 1
7836; CHECK-RV32-NEXT:    andi a3, a2, 16
7837; CHECK-RV32-NEXT:    bnez a3, .LBB61_817
7838; CHECK-RV32-NEXT:    j .LBB61_312
7839; CHECK-RV32-NEXT:  .LBB61_817: # %cond.load1165
7840; CHECK-RV32-NEXT:    lbu a3, 0(a0)
7841; CHECK-RV32-NEXT:    li a4, 512
7842; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
7843; CHECK-RV32-NEXT:    vmv.s.x v16, a3
7844; CHECK-RV32-NEXT:    li a3, 293
7845; CHECK-RV32-NEXT:    li a4, 292
7846; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
7847; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
7848; CHECK-RV32-NEXT:    addi a0, a0, 1
7849; CHECK-RV32-NEXT:    andi a3, a2, 32
7850; CHECK-RV32-NEXT:    bnez a3, .LBB61_818
7851; CHECK-RV32-NEXT:    j .LBB61_313
7852; CHECK-RV32-NEXT:  .LBB61_818: # %cond.load1169
7853; CHECK-RV32-NEXT:    lbu a3, 0(a0)
7854; CHECK-RV32-NEXT:    li a4, 512
7855; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
7856; CHECK-RV32-NEXT:    vmv.s.x v16, a3
7857; CHECK-RV32-NEXT:    li a3, 294
7858; CHECK-RV32-NEXT:    li a4, 293
7859; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
7860; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
7861; CHECK-RV32-NEXT:    addi a0, a0, 1
7862; CHECK-RV32-NEXT:    andi a3, a2, 64
7863; CHECK-RV32-NEXT:    bnez a3, .LBB61_819
7864; CHECK-RV32-NEXT:    j .LBB61_314
7865; CHECK-RV32-NEXT:  .LBB61_819: # %cond.load1173
7866; CHECK-RV32-NEXT:    lbu a3, 0(a0)
7867; CHECK-RV32-NEXT:    li a4, 512
7868; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
7869; CHECK-RV32-NEXT:    vmv.s.x v16, a3
7870; CHECK-RV32-NEXT:    li a3, 295
7871; CHECK-RV32-NEXT:    li a4, 294
7872; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
7873; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
7874; CHECK-RV32-NEXT:    addi a0, a0, 1
7875; CHECK-RV32-NEXT:    andi a3, a2, 128
7876; CHECK-RV32-NEXT:    bnez a3, .LBB61_820
7877; CHECK-RV32-NEXT:    j .LBB61_315
7878; CHECK-RV32-NEXT:  .LBB61_820: # %cond.load1177
7879; CHECK-RV32-NEXT:    lbu a3, 0(a0)
7880; CHECK-RV32-NEXT:    li a4, 512
7881; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
7882; CHECK-RV32-NEXT:    vmv.s.x v16, a3
7883; CHECK-RV32-NEXT:    li a3, 296
7884; CHECK-RV32-NEXT:    li a4, 295
7885; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
7886; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
7887; CHECK-RV32-NEXT:    addi a0, a0, 1
7888; CHECK-RV32-NEXT:    andi a3, a2, 256
7889; CHECK-RV32-NEXT:    bnez a3, .LBB61_821
7890; CHECK-RV32-NEXT:    j .LBB61_316
7891; CHECK-RV32-NEXT:  .LBB61_821: # %cond.load1181
7892; CHECK-RV32-NEXT:    lbu a3, 0(a0)
7893; CHECK-RV32-NEXT:    li a4, 512
7894; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
7895; CHECK-RV32-NEXT:    vmv.s.x v16, a3
7896; CHECK-RV32-NEXT:    li a3, 297
7897; CHECK-RV32-NEXT:    li a4, 296
7898; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
7899; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
7900; CHECK-RV32-NEXT:    addi a0, a0, 1
7901; CHECK-RV32-NEXT:    andi a3, a2, 512
7902; CHECK-RV32-NEXT:    bnez a3, .LBB61_822
7903; CHECK-RV32-NEXT:    j .LBB61_317
7904; CHECK-RV32-NEXT:  .LBB61_822: # %cond.load1185
7905; CHECK-RV32-NEXT:    lbu a3, 0(a0)
7906; CHECK-RV32-NEXT:    li a4, 512
7907; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
7908; CHECK-RV32-NEXT:    vmv.s.x v16, a3
7909; CHECK-RV32-NEXT:    li a3, 298
7910; CHECK-RV32-NEXT:    li a4, 297
7911; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
7912; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
7913; CHECK-RV32-NEXT:    addi a0, a0, 1
7914; CHECK-RV32-NEXT:    andi a3, a2, 1024
7915; CHECK-RV32-NEXT:    bnez a3, .LBB61_823
7916; CHECK-RV32-NEXT:    j .LBB61_318
7917; CHECK-RV32-NEXT:  .LBB61_823: # %cond.load1189
7918; CHECK-RV32-NEXT:    lbu a3, 0(a0)
7919; CHECK-RV32-NEXT:    li a4, 512
7920; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
7921; CHECK-RV32-NEXT:    vmv.s.x v16, a3
7922; CHECK-RV32-NEXT:    li a3, 299
7923; CHECK-RV32-NEXT:    li a4, 298
7924; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
7925; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
7926; CHECK-RV32-NEXT:    addi a0, a0, 1
7927; CHECK-RV32-NEXT:    slli a3, a2, 20
7928; CHECK-RV32-NEXT:    bltz a3, .LBB61_824
7929; CHECK-RV32-NEXT:    j .LBB61_319
7930; CHECK-RV32-NEXT:  .LBB61_824: # %cond.load1193
7931; CHECK-RV32-NEXT:    lbu a3, 0(a0)
7932; CHECK-RV32-NEXT:    li a4, 512
7933; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
7934; CHECK-RV32-NEXT:    vmv.s.x v16, a3
7935; CHECK-RV32-NEXT:    li a3, 300
7936; CHECK-RV32-NEXT:    li a4, 299
7937; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
7938; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
7939; CHECK-RV32-NEXT:    addi a0, a0, 1
7940; CHECK-RV32-NEXT:    slli a3, a2, 19
7941; CHECK-RV32-NEXT:    bltz a3, .LBB61_825
7942; CHECK-RV32-NEXT:    j .LBB61_320
7943; CHECK-RV32-NEXT:  .LBB61_825: # %cond.load1197
7944; CHECK-RV32-NEXT:    lbu a3, 0(a0)
7945; CHECK-RV32-NEXT:    li a4, 512
7946; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
7947; CHECK-RV32-NEXT:    vmv.s.x v16, a3
7948; CHECK-RV32-NEXT:    li a3, 301
7949; CHECK-RV32-NEXT:    li a4, 300
7950; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
7951; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
7952; CHECK-RV32-NEXT:    addi a0, a0, 1
7953; CHECK-RV32-NEXT:    slli a3, a2, 18
7954; CHECK-RV32-NEXT:    bltz a3, .LBB61_826
7955; CHECK-RV32-NEXT:    j .LBB61_321
7956; CHECK-RV32-NEXT:  .LBB61_826: # %cond.load1201
7957; CHECK-RV32-NEXT:    lbu a3, 0(a0)
7958; CHECK-RV32-NEXT:    li a4, 512
7959; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
7960; CHECK-RV32-NEXT:    vmv.s.x v16, a3
7961; CHECK-RV32-NEXT:    li a3, 302
7962; CHECK-RV32-NEXT:    li a4, 301
7963; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
7964; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
7965; CHECK-RV32-NEXT:    addi a0, a0, 1
7966; CHECK-RV32-NEXT:    slli a3, a2, 17
7967; CHECK-RV32-NEXT:    bltz a3, .LBB61_827
7968; CHECK-RV32-NEXT:    j .LBB61_322
7969; CHECK-RV32-NEXT:  .LBB61_827: # %cond.load1205
7970; CHECK-RV32-NEXT:    lbu a3, 0(a0)
7971; CHECK-RV32-NEXT:    li a4, 512
7972; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
7973; CHECK-RV32-NEXT:    vmv.s.x v16, a3
7974; CHECK-RV32-NEXT:    li a3, 303
7975; CHECK-RV32-NEXT:    li a4, 302
7976; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
7977; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
7978; CHECK-RV32-NEXT:    addi a0, a0, 1
7979; CHECK-RV32-NEXT:    slli a3, a2, 16
7980; CHECK-RV32-NEXT:    bltz a3, .LBB61_828
7981; CHECK-RV32-NEXT:    j .LBB61_323
7982; CHECK-RV32-NEXT:  .LBB61_828: # %cond.load1209
7983; CHECK-RV32-NEXT:    lbu a3, 0(a0)
7984; CHECK-RV32-NEXT:    li a4, 512
7985; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
7986; CHECK-RV32-NEXT:    vmv.s.x v16, a3
7987; CHECK-RV32-NEXT:    li a3, 304
7988; CHECK-RV32-NEXT:    li a4, 303
7989; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
7990; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
7991; CHECK-RV32-NEXT:    addi a0, a0, 1
7992; CHECK-RV32-NEXT:    slli a3, a2, 15
7993; CHECK-RV32-NEXT:    bltz a3, .LBB61_829
7994; CHECK-RV32-NEXT:    j .LBB61_324
7995; CHECK-RV32-NEXT:  .LBB61_829: # %cond.load1213
7996; CHECK-RV32-NEXT:    lbu a3, 0(a0)
7997; CHECK-RV32-NEXT:    li a4, 512
7998; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
7999; CHECK-RV32-NEXT:    vmv.s.x v16, a3
8000; CHECK-RV32-NEXT:    li a3, 305
8001; CHECK-RV32-NEXT:    li a4, 304
8002; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
8003; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
8004; CHECK-RV32-NEXT:    addi a0, a0, 1
8005; CHECK-RV32-NEXT:    slli a3, a2, 14
8006; CHECK-RV32-NEXT:    bltz a3, .LBB61_830
8007; CHECK-RV32-NEXT:    j .LBB61_325
8008; CHECK-RV32-NEXT:  .LBB61_830: # %cond.load1217
8009; CHECK-RV32-NEXT:    lbu a3, 0(a0)
8010; CHECK-RV32-NEXT:    li a4, 512
8011; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
8012; CHECK-RV32-NEXT:    vmv.s.x v16, a3
8013; CHECK-RV32-NEXT:    li a3, 306
8014; CHECK-RV32-NEXT:    li a4, 305
8015; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
8016; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
8017; CHECK-RV32-NEXT:    addi a0, a0, 1
8018; CHECK-RV32-NEXT:    slli a3, a2, 13
8019; CHECK-RV32-NEXT:    bltz a3, .LBB61_831
8020; CHECK-RV32-NEXT:    j .LBB61_326
8021; CHECK-RV32-NEXT:  .LBB61_831: # %cond.load1221
8022; CHECK-RV32-NEXT:    lbu a3, 0(a0)
8023; CHECK-RV32-NEXT:    li a4, 512
8024; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
8025; CHECK-RV32-NEXT:    vmv.s.x v16, a3
8026; CHECK-RV32-NEXT:    li a3, 307
8027; CHECK-RV32-NEXT:    li a4, 306
8028; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
8029; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
8030; CHECK-RV32-NEXT:    addi a0, a0, 1
8031; CHECK-RV32-NEXT:    slli a3, a2, 12
8032; CHECK-RV32-NEXT:    bltz a3, .LBB61_832
8033; CHECK-RV32-NEXT:    j .LBB61_327
8034; CHECK-RV32-NEXT:  .LBB61_832: # %cond.load1225
8035; CHECK-RV32-NEXT:    lbu a3, 0(a0)
8036; CHECK-RV32-NEXT:    li a4, 512
8037; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
8038; CHECK-RV32-NEXT:    vmv.s.x v16, a3
8039; CHECK-RV32-NEXT:    li a3, 308
8040; CHECK-RV32-NEXT:    li a4, 307
8041; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
8042; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
8043; CHECK-RV32-NEXT:    addi a0, a0, 1
8044; CHECK-RV32-NEXT:    slli a3, a2, 11
8045; CHECK-RV32-NEXT:    bltz a3, .LBB61_833
8046; CHECK-RV32-NEXT:    j .LBB61_328
8047; CHECK-RV32-NEXT:  .LBB61_833: # %cond.load1229
8048; CHECK-RV32-NEXT:    lbu a3, 0(a0)
8049; CHECK-RV32-NEXT:    li a4, 512
8050; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
8051; CHECK-RV32-NEXT:    vmv.s.x v16, a3
8052; CHECK-RV32-NEXT:    li a3, 309
8053; CHECK-RV32-NEXT:    li a4, 308
8054; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
8055; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
8056; CHECK-RV32-NEXT:    addi a0, a0, 1
8057; CHECK-RV32-NEXT:    slli a3, a2, 10
8058; CHECK-RV32-NEXT:    bltz a3, .LBB61_834
8059; CHECK-RV32-NEXT:    j .LBB61_329
8060; CHECK-RV32-NEXT:  .LBB61_834: # %cond.load1233
8061; CHECK-RV32-NEXT:    lbu a3, 0(a0)
8062; CHECK-RV32-NEXT:    li a4, 512
8063; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
8064; CHECK-RV32-NEXT:    vmv.s.x v16, a3
8065; CHECK-RV32-NEXT:    li a3, 310
8066; CHECK-RV32-NEXT:    li a4, 309
8067; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
8068; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
8069; CHECK-RV32-NEXT:    addi a0, a0, 1
8070; CHECK-RV32-NEXT:    slli a3, a2, 9
8071; CHECK-RV32-NEXT:    bltz a3, .LBB61_835
8072; CHECK-RV32-NEXT:    j .LBB61_330
8073; CHECK-RV32-NEXT:  .LBB61_835: # %cond.load1237
8074; CHECK-RV32-NEXT:    lbu a3, 0(a0)
8075; CHECK-RV32-NEXT:    li a4, 512
8076; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
8077; CHECK-RV32-NEXT:    vmv.s.x v16, a3
8078; CHECK-RV32-NEXT:    li a3, 311
8079; CHECK-RV32-NEXT:    li a4, 310
8080; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
8081; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
8082; CHECK-RV32-NEXT:    addi a0, a0, 1
8083; CHECK-RV32-NEXT:    slli a3, a2, 8
8084; CHECK-RV32-NEXT:    bltz a3, .LBB61_836
8085; CHECK-RV32-NEXT:    j .LBB61_331
8086; CHECK-RV32-NEXT:  .LBB61_836: # %cond.load1241
8087; CHECK-RV32-NEXT:    lbu a3, 0(a0)
8088; CHECK-RV32-NEXT:    li a4, 512
8089; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
8090; CHECK-RV32-NEXT:    vmv.s.x v16, a3
8091; CHECK-RV32-NEXT:    li a3, 312
8092; CHECK-RV32-NEXT:    li a4, 311
8093; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
8094; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
8095; CHECK-RV32-NEXT:    addi a0, a0, 1
8096; CHECK-RV32-NEXT:    slli a3, a2, 7
8097; CHECK-RV32-NEXT:    bltz a3, .LBB61_837
8098; CHECK-RV32-NEXT:    j .LBB61_332
8099; CHECK-RV32-NEXT:  .LBB61_837: # %cond.load1245
8100; CHECK-RV32-NEXT:    lbu a3, 0(a0)
8101; CHECK-RV32-NEXT:    li a4, 512
8102; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
8103; CHECK-RV32-NEXT:    vmv.s.x v16, a3
8104; CHECK-RV32-NEXT:    li a3, 313
8105; CHECK-RV32-NEXT:    li a4, 312
8106; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
8107; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
8108; CHECK-RV32-NEXT:    addi a0, a0, 1
8109; CHECK-RV32-NEXT:    slli a3, a2, 6
8110; CHECK-RV32-NEXT:    bltz a3, .LBB61_838
8111; CHECK-RV32-NEXT:    j .LBB61_333
8112; CHECK-RV32-NEXT:  .LBB61_838: # %cond.load1249
8113; CHECK-RV32-NEXT:    lbu a3, 0(a0)
8114; CHECK-RV32-NEXT:    li a4, 512
8115; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
8116; CHECK-RV32-NEXT:    vmv.s.x v16, a3
8117; CHECK-RV32-NEXT:    li a3, 314
8118; CHECK-RV32-NEXT:    li a4, 313
8119; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
8120; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
8121; CHECK-RV32-NEXT:    addi a0, a0, 1
8122; CHECK-RV32-NEXT:    slli a3, a2, 5
8123; CHECK-RV32-NEXT:    bltz a3, .LBB61_839
8124; CHECK-RV32-NEXT:    j .LBB61_334
8125; CHECK-RV32-NEXT:  .LBB61_839: # %cond.load1253
8126; CHECK-RV32-NEXT:    lbu a3, 0(a0)
8127; CHECK-RV32-NEXT:    li a4, 512
8128; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
8129; CHECK-RV32-NEXT:    vmv.s.x v16, a3
8130; CHECK-RV32-NEXT:    li a3, 315
8131; CHECK-RV32-NEXT:    li a4, 314
8132; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
8133; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
8134; CHECK-RV32-NEXT:    addi a0, a0, 1
8135; CHECK-RV32-NEXT:    slli a3, a2, 4
8136; CHECK-RV32-NEXT:    bltz a3, .LBB61_840
8137; CHECK-RV32-NEXT:    j .LBB61_335
8138; CHECK-RV32-NEXT:  .LBB61_840: # %cond.load1257
8139; CHECK-RV32-NEXT:    lbu a3, 0(a0)
8140; CHECK-RV32-NEXT:    li a4, 512
8141; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
8142; CHECK-RV32-NEXT:    vmv.s.x v16, a3
8143; CHECK-RV32-NEXT:    li a3, 316
8144; CHECK-RV32-NEXT:    li a4, 315
8145; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
8146; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
8147; CHECK-RV32-NEXT:    addi a0, a0, 1
8148; CHECK-RV32-NEXT:    slli a3, a2, 3
8149; CHECK-RV32-NEXT:    bltz a3, .LBB61_841
8150; CHECK-RV32-NEXT:    j .LBB61_336
8151; CHECK-RV32-NEXT:  .LBB61_841: # %cond.load1261
8152; CHECK-RV32-NEXT:    lbu a3, 0(a0)
8153; CHECK-RV32-NEXT:    li a4, 512
8154; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
8155; CHECK-RV32-NEXT:    vmv.s.x v16, a3
8156; CHECK-RV32-NEXT:    li a3, 317
8157; CHECK-RV32-NEXT:    li a4, 316
8158; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
8159; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
8160; CHECK-RV32-NEXT:    addi a0, a0, 1
8161; CHECK-RV32-NEXT:    slli a3, a2, 2
8162; CHECK-RV32-NEXT:    bgez a3, .LBB61_1034
8163; CHECK-RV32-NEXT:    j .LBB61_337
8164; CHECK-RV32-NEXT:  .LBB61_1034: # %cond.load1261
8165; CHECK-RV32-NEXT:    j .LBB61_338
8166; CHECK-RV32-NEXT:  .LBB61_842: # %cond.load1273
8167; CHECK-RV32-NEXT:    lbu a2, 0(a0)
8168; CHECK-RV32-NEXT:    vmv.s.x v24, a2
8169; CHECK-RV32-NEXT:    li a2, 320
8170; CHECK-RV32-NEXT:    li a4, 319
8171; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
8172; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
8173; CHECK-RV32-NEXT:    addi a0, a0, 1
8174; CHECK-RV32-NEXT:    andi a2, a3, 1
8175; CHECK-RV32-NEXT:    bnez a2, .LBB61_843
8176; CHECK-RV32-NEXT:    j .LBB61_342
8177; CHECK-RV32-NEXT:  .LBB61_843: # %cond.load1277
8178; CHECK-RV32-NEXT:    lbu a2, 0(a0)
8179; CHECK-RV32-NEXT:    li a4, 512
8180; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
8181; CHECK-RV32-NEXT:    vmv.s.x v24, a2
8182; CHECK-RV32-NEXT:    li a2, 321
8183; CHECK-RV32-NEXT:    li a4, 320
8184; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
8185; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
8186; CHECK-RV32-NEXT:    addi a0, a0, 1
8187; CHECK-RV32-NEXT:    andi a2, a3, 2
8188; CHECK-RV32-NEXT:    bnez a2, .LBB61_844
8189; CHECK-RV32-NEXT:    j .LBB61_343
8190; CHECK-RV32-NEXT:  .LBB61_844: # %cond.load1281
8191; CHECK-RV32-NEXT:    lbu a2, 0(a0)
8192; CHECK-RV32-NEXT:    li a4, 512
8193; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
8194; CHECK-RV32-NEXT:    vmv.s.x v24, a2
8195; CHECK-RV32-NEXT:    li a2, 322
8196; CHECK-RV32-NEXT:    li a4, 321
8197; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
8198; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
8199; CHECK-RV32-NEXT:    addi a0, a0, 1
8200; CHECK-RV32-NEXT:    andi a2, a3, 4
8201; CHECK-RV32-NEXT:    bnez a2, .LBB61_845
8202; CHECK-RV32-NEXT:    j .LBB61_344
8203; CHECK-RV32-NEXT:  .LBB61_845: # %cond.load1285
8204; CHECK-RV32-NEXT:    lbu a2, 0(a0)
8205; CHECK-RV32-NEXT:    li a4, 512
8206; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
8207; CHECK-RV32-NEXT:    vmv.s.x v24, a2
8208; CHECK-RV32-NEXT:    li a2, 323
8209; CHECK-RV32-NEXT:    li a4, 322
8210; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
8211; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
8212; CHECK-RV32-NEXT:    addi a0, a0, 1
8213; CHECK-RV32-NEXT:    andi a2, a3, 8
8214; CHECK-RV32-NEXT:    bnez a2, .LBB61_846
8215; CHECK-RV32-NEXT:    j .LBB61_345
8216; CHECK-RV32-NEXT:  .LBB61_846: # %cond.load1289
8217; CHECK-RV32-NEXT:    lbu a2, 0(a0)
8218; CHECK-RV32-NEXT:    li a4, 512
8219; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
8220; CHECK-RV32-NEXT:    vmv.s.x v24, a2
8221; CHECK-RV32-NEXT:    li a2, 324
8222; CHECK-RV32-NEXT:    li a4, 323
8223; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
8224; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
8225; CHECK-RV32-NEXT:    addi a0, a0, 1
8226; CHECK-RV32-NEXT:    andi a2, a3, 16
8227; CHECK-RV32-NEXT:    bnez a2, .LBB61_847
8228; CHECK-RV32-NEXT:    j .LBB61_346
8229; CHECK-RV32-NEXT:  .LBB61_847: # %cond.load1293
8230; CHECK-RV32-NEXT:    lbu a2, 0(a0)
8231; CHECK-RV32-NEXT:    li a4, 512
8232; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
8233; CHECK-RV32-NEXT:    vmv.s.x v24, a2
8234; CHECK-RV32-NEXT:    li a2, 325
8235; CHECK-RV32-NEXT:    li a4, 324
8236; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
8237; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
8238; CHECK-RV32-NEXT:    addi a0, a0, 1
8239; CHECK-RV32-NEXT:    andi a2, a3, 32
8240; CHECK-RV32-NEXT:    bnez a2, .LBB61_848
8241; CHECK-RV32-NEXT:    j .LBB61_347
8242; CHECK-RV32-NEXT:  .LBB61_848: # %cond.load1297
8243; CHECK-RV32-NEXT:    lbu a2, 0(a0)
8244; CHECK-RV32-NEXT:    li a4, 512
8245; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
8246; CHECK-RV32-NEXT:    vmv.s.x v24, a2
8247; CHECK-RV32-NEXT:    li a2, 326
8248; CHECK-RV32-NEXT:    li a4, 325
8249; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
8250; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
8251; CHECK-RV32-NEXT:    addi a0, a0, 1
8252; CHECK-RV32-NEXT:    andi a2, a3, 64
8253; CHECK-RV32-NEXT:    bnez a2, .LBB61_849
8254; CHECK-RV32-NEXT:    j .LBB61_348
8255; CHECK-RV32-NEXT:  .LBB61_849: # %cond.load1301
8256; CHECK-RV32-NEXT:    lbu a2, 0(a0)
8257; CHECK-RV32-NEXT:    li a4, 512
8258; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
8259; CHECK-RV32-NEXT:    vmv.s.x v24, a2
8260; CHECK-RV32-NEXT:    li a2, 327
8261; CHECK-RV32-NEXT:    li a4, 326
8262; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
8263; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
8264; CHECK-RV32-NEXT:    addi a0, a0, 1
8265; CHECK-RV32-NEXT:    andi a2, a3, 128
8266; CHECK-RV32-NEXT:    bnez a2, .LBB61_850
8267; CHECK-RV32-NEXT:    j .LBB61_349
8268; CHECK-RV32-NEXT:  .LBB61_850: # %cond.load1305
8269; CHECK-RV32-NEXT:    lbu a2, 0(a0)
8270; CHECK-RV32-NEXT:    li a4, 512
8271; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
8272; CHECK-RV32-NEXT:    vmv.s.x v24, a2
8273; CHECK-RV32-NEXT:    li a2, 328
8274; CHECK-RV32-NEXT:    li a4, 327
8275; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
8276; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
8277; CHECK-RV32-NEXT:    addi a0, a0, 1
8278; CHECK-RV32-NEXT:    andi a2, a3, 256
8279; CHECK-RV32-NEXT:    bnez a2, .LBB61_851
8280; CHECK-RV32-NEXT:    j .LBB61_350
8281; CHECK-RV32-NEXT:  .LBB61_851: # %cond.load1309
8282; CHECK-RV32-NEXT:    lbu a2, 0(a0)
8283; CHECK-RV32-NEXT:    li a4, 512
8284; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
8285; CHECK-RV32-NEXT:    vmv.s.x v24, a2
8286; CHECK-RV32-NEXT:    li a2, 329
8287; CHECK-RV32-NEXT:    li a4, 328
8288; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
8289; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
8290; CHECK-RV32-NEXT:    addi a0, a0, 1
8291; CHECK-RV32-NEXT:    andi a2, a3, 512
8292; CHECK-RV32-NEXT:    bnez a2, .LBB61_852
8293; CHECK-RV32-NEXT:    j .LBB61_351
8294; CHECK-RV32-NEXT:  .LBB61_852: # %cond.load1313
8295; CHECK-RV32-NEXT:    lbu a2, 0(a0)
8296; CHECK-RV32-NEXT:    li a4, 512
8297; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
8298; CHECK-RV32-NEXT:    vmv.s.x v24, a2
8299; CHECK-RV32-NEXT:    li a2, 330
8300; CHECK-RV32-NEXT:    li a4, 329
8301; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
8302; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
8303; CHECK-RV32-NEXT:    addi a0, a0, 1
8304; CHECK-RV32-NEXT:    andi a2, a3, 1024
8305; CHECK-RV32-NEXT:    bnez a2, .LBB61_853
8306; CHECK-RV32-NEXT:    j .LBB61_352
8307; CHECK-RV32-NEXT:  .LBB61_853: # %cond.load1317
8308; CHECK-RV32-NEXT:    lbu a2, 0(a0)
8309; CHECK-RV32-NEXT:    li a4, 512
8310; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
8311; CHECK-RV32-NEXT:    vmv.s.x v24, a2
8312; CHECK-RV32-NEXT:    li a2, 331
8313; CHECK-RV32-NEXT:    li a4, 330
8314; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
8315; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
8316; CHECK-RV32-NEXT:    addi a0, a0, 1
8317; CHECK-RV32-NEXT:    slli a2, a3, 20
8318; CHECK-RV32-NEXT:    bltz a2, .LBB61_854
8319; CHECK-RV32-NEXT:    j .LBB61_353
8320; CHECK-RV32-NEXT:  .LBB61_854: # %cond.load1321
8321; CHECK-RV32-NEXT:    lbu a2, 0(a0)
8322; CHECK-RV32-NEXT:    li a4, 512
8323; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
8324; CHECK-RV32-NEXT:    vmv.s.x v24, a2
8325; CHECK-RV32-NEXT:    li a2, 332
8326; CHECK-RV32-NEXT:    li a4, 331
8327; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
8328; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
8329; CHECK-RV32-NEXT:    addi a0, a0, 1
8330; CHECK-RV32-NEXT:    slli a2, a3, 19
8331; CHECK-RV32-NEXT:    bltz a2, .LBB61_855
8332; CHECK-RV32-NEXT:    j .LBB61_354
8333; CHECK-RV32-NEXT:  .LBB61_855: # %cond.load1325
8334; CHECK-RV32-NEXT:    lbu a2, 0(a0)
8335; CHECK-RV32-NEXT:    li a4, 512
8336; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
8337; CHECK-RV32-NEXT:    vmv.s.x v24, a2
8338; CHECK-RV32-NEXT:    li a2, 333
8339; CHECK-RV32-NEXT:    li a4, 332
8340; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
8341; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
8342; CHECK-RV32-NEXT:    addi a0, a0, 1
8343; CHECK-RV32-NEXT:    slli a2, a3, 18
8344; CHECK-RV32-NEXT:    bltz a2, .LBB61_856
8345; CHECK-RV32-NEXT:    j .LBB61_355
8346; CHECK-RV32-NEXT:  .LBB61_856: # %cond.load1329
8347; CHECK-RV32-NEXT:    lbu a2, 0(a0)
8348; CHECK-RV32-NEXT:    li a4, 512
8349; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
8350; CHECK-RV32-NEXT:    vmv.s.x v24, a2
8351; CHECK-RV32-NEXT:    li a2, 334
8352; CHECK-RV32-NEXT:    li a4, 333
8353; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
8354; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
8355; CHECK-RV32-NEXT:    addi a0, a0, 1
8356; CHECK-RV32-NEXT:    slli a2, a3, 17
8357; CHECK-RV32-NEXT:    bltz a2, .LBB61_857
8358; CHECK-RV32-NEXT:    j .LBB61_356
8359; CHECK-RV32-NEXT:  .LBB61_857: # %cond.load1333
8360; CHECK-RV32-NEXT:    lbu a2, 0(a0)
8361; CHECK-RV32-NEXT:    li a4, 512
8362; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
8363; CHECK-RV32-NEXT:    vmv.s.x v24, a2
8364; CHECK-RV32-NEXT:    li a2, 335
8365; CHECK-RV32-NEXT:    li a4, 334
8366; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
8367; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
8368; CHECK-RV32-NEXT:    addi a0, a0, 1
8369; CHECK-RV32-NEXT:    slli a2, a3, 16
8370; CHECK-RV32-NEXT:    bltz a2, .LBB61_858
8371; CHECK-RV32-NEXT:    j .LBB61_357
8372; CHECK-RV32-NEXT:  .LBB61_858: # %cond.load1337
8373; CHECK-RV32-NEXT:    lbu a2, 0(a0)
8374; CHECK-RV32-NEXT:    li a4, 512
8375; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
8376; CHECK-RV32-NEXT:    vmv.s.x v24, a2
8377; CHECK-RV32-NEXT:    li a2, 336
8378; CHECK-RV32-NEXT:    li a4, 335
8379; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
8380; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
8381; CHECK-RV32-NEXT:    addi a0, a0, 1
8382; CHECK-RV32-NEXT:    slli a2, a3, 15
8383; CHECK-RV32-NEXT:    bltz a2, .LBB61_859
8384; CHECK-RV32-NEXT:    j .LBB61_358
8385; CHECK-RV32-NEXT:  .LBB61_859: # %cond.load1341
8386; CHECK-RV32-NEXT:    lbu a2, 0(a0)
8387; CHECK-RV32-NEXT:    li a4, 512
8388; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
8389; CHECK-RV32-NEXT:    vmv.s.x v24, a2
8390; CHECK-RV32-NEXT:    li a2, 337
8391; CHECK-RV32-NEXT:    li a4, 336
8392; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
8393; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
8394; CHECK-RV32-NEXT:    addi a0, a0, 1
8395; CHECK-RV32-NEXT:    slli a2, a3, 14
8396; CHECK-RV32-NEXT:    bltz a2, .LBB61_860
8397; CHECK-RV32-NEXT:    j .LBB61_359
8398; CHECK-RV32-NEXT:  .LBB61_860: # %cond.load1345
8399; CHECK-RV32-NEXT:    lbu a2, 0(a0)
8400; CHECK-RV32-NEXT:    li a4, 512
8401; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
8402; CHECK-RV32-NEXT:    vmv.s.x v24, a2
8403; CHECK-RV32-NEXT:    li a2, 338
8404; CHECK-RV32-NEXT:    li a4, 337
8405; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
8406; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
8407; CHECK-RV32-NEXT:    addi a0, a0, 1
8408; CHECK-RV32-NEXT:    slli a2, a3, 13
8409; CHECK-RV32-NEXT:    bltz a2, .LBB61_861
8410; CHECK-RV32-NEXT:    j .LBB61_360
8411; CHECK-RV32-NEXT:  .LBB61_861: # %cond.load1349
8412; CHECK-RV32-NEXT:    lbu a2, 0(a0)
8413; CHECK-RV32-NEXT:    li a4, 512
8414; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
8415; CHECK-RV32-NEXT:    vmv.s.x v24, a2
8416; CHECK-RV32-NEXT:    li a2, 339
8417; CHECK-RV32-NEXT:    li a4, 338
8418; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
8419; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
8420; CHECK-RV32-NEXT:    addi a0, a0, 1
8421; CHECK-RV32-NEXT:    slli a2, a3, 12
8422; CHECK-RV32-NEXT:    bltz a2, .LBB61_862
8423; CHECK-RV32-NEXT:    j .LBB61_361
8424; CHECK-RV32-NEXT:  .LBB61_862: # %cond.load1353
8425; CHECK-RV32-NEXT:    lbu a2, 0(a0)
8426; CHECK-RV32-NEXT:    li a4, 512
8427; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
8428; CHECK-RV32-NEXT:    vmv.s.x v24, a2
8429; CHECK-RV32-NEXT:    li a2, 340
8430; CHECK-RV32-NEXT:    li a4, 339
8431; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
8432; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
8433; CHECK-RV32-NEXT:    addi a0, a0, 1
8434; CHECK-RV32-NEXT:    slli a2, a3, 11
8435; CHECK-RV32-NEXT:    bltz a2, .LBB61_863
8436; CHECK-RV32-NEXT:    j .LBB61_362
8437; CHECK-RV32-NEXT:  .LBB61_863: # %cond.load1357
8438; CHECK-RV32-NEXT:    lbu a2, 0(a0)
8439; CHECK-RV32-NEXT:    li a4, 512
8440; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
8441; CHECK-RV32-NEXT:    vmv.s.x v24, a2
8442; CHECK-RV32-NEXT:    li a2, 341
8443; CHECK-RV32-NEXT:    li a4, 340
8444; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
8445; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
8446; CHECK-RV32-NEXT:    addi a0, a0, 1
8447; CHECK-RV32-NEXT:    slli a2, a3, 10
8448; CHECK-RV32-NEXT:    bltz a2, .LBB61_864
8449; CHECK-RV32-NEXT:    j .LBB61_363
8450; CHECK-RV32-NEXT:  .LBB61_864: # %cond.load1361
8451; CHECK-RV32-NEXT:    lbu a2, 0(a0)
8452; CHECK-RV32-NEXT:    li a4, 512
8453; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
8454; CHECK-RV32-NEXT:    vmv.s.x v24, a2
8455; CHECK-RV32-NEXT:    li a2, 342
8456; CHECK-RV32-NEXT:    li a4, 341
8457; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
8458; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
8459; CHECK-RV32-NEXT:    addi a0, a0, 1
8460; CHECK-RV32-NEXT:    slli a2, a3, 9
8461; CHECK-RV32-NEXT:    bltz a2, .LBB61_865
8462; CHECK-RV32-NEXT:    j .LBB61_364
8463; CHECK-RV32-NEXT:  .LBB61_865: # %cond.load1365
8464; CHECK-RV32-NEXT:    lbu a2, 0(a0)
8465; CHECK-RV32-NEXT:    li a4, 512
8466; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
8467; CHECK-RV32-NEXT:    vmv.s.x v24, a2
8468; CHECK-RV32-NEXT:    li a2, 343
8469; CHECK-RV32-NEXT:    li a4, 342
8470; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
8471; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
8472; CHECK-RV32-NEXT:    addi a0, a0, 1
8473; CHECK-RV32-NEXT:    slli a2, a3, 8
8474; CHECK-RV32-NEXT:    bltz a2, .LBB61_866
8475; CHECK-RV32-NEXT:    j .LBB61_365
8476; CHECK-RV32-NEXT:  .LBB61_866: # %cond.load1369
8477; CHECK-RV32-NEXT:    lbu a2, 0(a0)
8478; CHECK-RV32-NEXT:    li a4, 512
8479; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
8480; CHECK-RV32-NEXT:    vmv.s.x v24, a2
8481; CHECK-RV32-NEXT:    li a2, 344
8482; CHECK-RV32-NEXT:    li a4, 343
8483; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
8484; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
8485; CHECK-RV32-NEXT:    addi a0, a0, 1
8486; CHECK-RV32-NEXT:    slli a2, a3, 7
8487; CHECK-RV32-NEXT:    bltz a2, .LBB61_867
8488; CHECK-RV32-NEXT:    j .LBB61_366
8489; CHECK-RV32-NEXT:  .LBB61_867: # %cond.load1373
8490; CHECK-RV32-NEXT:    lbu a2, 0(a0)
8491; CHECK-RV32-NEXT:    li a4, 512
8492; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
8493; CHECK-RV32-NEXT:    vmv.s.x v24, a2
8494; CHECK-RV32-NEXT:    li a2, 345
8495; CHECK-RV32-NEXT:    li a4, 344
8496; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
8497; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
8498; CHECK-RV32-NEXT:    addi a0, a0, 1
8499; CHECK-RV32-NEXT:    slli a2, a3, 6
8500; CHECK-RV32-NEXT:    bltz a2, .LBB61_868
8501; CHECK-RV32-NEXT:    j .LBB61_367
8502; CHECK-RV32-NEXT:  .LBB61_868: # %cond.load1377
8503; CHECK-RV32-NEXT:    lbu a2, 0(a0)
8504; CHECK-RV32-NEXT:    li a4, 512
8505; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
8506; CHECK-RV32-NEXT:    vmv.s.x v24, a2
8507; CHECK-RV32-NEXT:    li a2, 346
8508; CHECK-RV32-NEXT:    li a4, 345
8509; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
8510; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
8511; CHECK-RV32-NEXT:    addi a0, a0, 1
8512; CHECK-RV32-NEXT:    slli a2, a3, 5
8513; CHECK-RV32-NEXT:    bltz a2, .LBB61_869
8514; CHECK-RV32-NEXT:    j .LBB61_368
8515; CHECK-RV32-NEXT:  .LBB61_869: # %cond.load1381
8516; CHECK-RV32-NEXT:    lbu a2, 0(a0)
8517; CHECK-RV32-NEXT:    li a4, 512
8518; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
8519; CHECK-RV32-NEXT:    vmv.s.x v24, a2
8520; CHECK-RV32-NEXT:    li a2, 347
8521; CHECK-RV32-NEXT:    li a4, 346
8522; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
8523; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
8524; CHECK-RV32-NEXT:    addi a0, a0, 1
8525; CHECK-RV32-NEXT:    slli a2, a3, 4
8526; CHECK-RV32-NEXT:    bltz a2, .LBB61_870
8527; CHECK-RV32-NEXT:    j .LBB61_369
8528; CHECK-RV32-NEXT:  .LBB61_870: # %cond.load1385
8529; CHECK-RV32-NEXT:    lbu a2, 0(a0)
8530; CHECK-RV32-NEXT:    li a4, 512
8531; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
8532; CHECK-RV32-NEXT:    vmv.s.x v24, a2
8533; CHECK-RV32-NEXT:    li a2, 348
8534; CHECK-RV32-NEXT:    li a4, 347
8535; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
8536; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
8537; CHECK-RV32-NEXT:    addi a0, a0, 1
8538; CHECK-RV32-NEXT:    slli a2, a3, 3
8539; CHECK-RV32-NEXT:    bltz a2, .LBB61_871
8540; CHECK-RV32-NEXT:    j .LBB61_370
8541; CHECK-RV32-NEXT:  .LBB61_871: # %cond.load1389
8542; CHECK-RV32-NEXT:    lbu a2, 0(a0)
8543; CHECK-RV32-NEXT:    li a4, 512
8544; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
8545; CHECK-RV32-NEXT:    vmv.s.x v24, a2
8546; CHECK-RV32-NEXT:    li a2, 349
8547; CHECK-RV32-NEXT:    li a4, 348
8548; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
8549; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
8550; CHECK-RV32-NEXT:    addi a0, a0, 1
8551; CHECK-RV32-NEXT:    slli a2, a3, 2
8552; CHECK-RV32-NEXT:    bgez a2, .LBB61_1035
8553; CHECK-RV32-NEXT:    j .LBB61_371
8554; CHECK-RV32-NEXT:  .LBB61_1035: # %cond.load1389
8555; CHECK-RV32-NEXT:    j .LBB61_372
8556; CHECK-RV32-NEXT:  .LBB61_872: # %cond.load1401
8557; CHECK-RV32-NEXT:    lbu a3, 0(a0)
8558; CHECK-RV32-NEXT:    vmv.s.x v16, a3
8559; CHECK-RV32-NEXT:    li a3, 352
8560; CHECK-RV32-NEXT:    li a4, 351
8561; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
8562; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
8563; CHECK-RV32-NEXT:    addi a0, a0, 1
8564; CHECK-RV32-NEXT:    andi a3, a2, 1
8565; CHECK-RV32-NEXT:    bnez a3, .LBB61_873
8566; CHECK-RV32-NEXT:    j .LBB61_376
8567; CHECK-RV32-NEXT:  .LBB61_873: # %cond.load1405
8568; CHECK-RV32-NEXT:    lbu a3, 0(a0)
8569; CHECK-RV32-NEXT:    li a4, 512
8570; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
8571; CHECK-RV32-NEXT:    vmv.s.x v16, a3
8572; CHECK-RV32-NEXT:    li a3, 353
8573; CHECK-RV32-NEXT:    li a4, 352
8574; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
8575; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
8576; CHECK-RV32-NEXT:    addi a0, a0, 1
8577; CHECK-RV32-NEXT:    andi a3, a2, 2
8578; CHECK-RV32-NEXT:    bnez a3, .LBB61_874
8579; CHECK-RV32-NEXT:    j .LBB61_377
8580; CHECK-RV32-NEXT:  .LBB61_874: # %cond.load1409
8581; CHECK-RV32-NEXT:    lbu a3, 0(a0)
8582; CHECK-RV32-NEXT:    li a4, 512
8583; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
8584; CHECK-RV32-NEXT:    vmv.s.x v16, a3
8585; CHECK-RV32-NEXT:    li a3, 354
8586; CHECK-RV32-NEXT:    li a4, 353
8587; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
8588; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
8589; CHECK-RV32-NEXT:    addi a0, a0, 1
8590; CHECK-RV32-NEXT:    andi a3, a2, 4
8591; CHECK-RV32-NEXT:    bnez a3, .LBB61_875
8592; CHECK-RV32-NEXT:    j .LBB61_378
8593; CHECK-RV32-NEXT:  .LBB61_875: # %cond.load1413
8594; CHECK-RV32-NEXT:    lbu a3, 0(a0)
8595; CHECK-RV32-NEXT:    li a4, 512
8596; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
8597; CHECK-RV32-NEXT:    vmv.s.x v16, a3
8598; CHECK-RV32-NEXT:    li a3, 355
8599; CHECK-RV32-NEXT:    li a4, 354
8600; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
8601; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
8602; CHECK-RV32-NEXT:    addi a0, a0, 1
8603; CHECK-RV32-NEXT:    andi a3, a2, 8
8604; CHECK-RV32-NEXT:    bnez a3, .LBB61_876
8605; CHECK-RV32-NEXT:    j .LBB61_379
8606; CHECK-RV32-NEXT:  .LBB61_876: # %cond.load1417
8607; CHECK-RV32-NEXT:    lbu a3, 0(a0)
8608; CHECK-RV32-NEXT:    li a4, 512
8609; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
8610; CHECK-RV32-NEXT:    vmv.s.x v16, a3
8611; CHECK-RV32-NEXT:    li a3, 356
8612; CHECK-RV32-NEXT:    li a4, 355
8613; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
8614; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
8615; CHECK-RV32-NEXT:    addi a0, a0, 1
8616; CHECK-RV32-NEXT:    andi a3, a2, 16
8617; CHECK-RV32-NEXT:    bnez a3, .LBB61_877
8618; CHECK-RV32-NEXT:    j .LBB61_380
8619; CHECK-RV32-NEXT:  .LBB61_877: # %cond.load1421
8620; CHECK-RV32-NEXT:    lbu a3, 0(a0)
8621; CHECK-RV32-NEXT:    li a4, 512
8622; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
8623; CHECK-RV32-NEXT:    vmv.s.x v16, a3
8624; CHECK-RV32-NEXT:    li a3, 357
8625; CHECK-RV32-NEXT:    li a4, 356
8626; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
8627; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
8628; CHECK-RV32-NEXT:    addi a0, a0, 1
8629; CHECK-RV32-NEXT:    andi a3, a2, 32
8630; CHECK-RV32-NEXT:    bnez a3, .LBB61_878
8631; CHECK-RV32-NEXT:    j .LBB61_381
8632; CHECK-RV32-NEXT:  .LBB61_878: # %cond.load1425
8633; CHECK-RV32-NEXT:    lbu a3, 0(a0)
8634; CHECK-RV32-NEXT:    li a4, 512
8635; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
8636; CHECK-RV32-NEXT:    vmv.s.x v16, a3
8637; CHECK-RV32-NEXT:    li a3, 358
8638; CHECK-RV32-NEXT:    li a4, 357
8639; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
8640; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
8641; CHECK-RV32-NEXT:    addi a0, a0, 1
8642; CHECK-RV32-NEXT:    andi a3, a2, 64
8643; CHECK-RV32-NEXT:    bnez a3, .LBB61_879
8644; CHECK-RV32-NEXT:    j .LBB61_382
8645; CHECK-RV32-NEXT:  .LBB61_879: # %cond.load1429
8646; CHECK-RV32-NEXT:    lbu a3, 0(a0)
8647; CHECK-RV32-NEXT:    li a4, 512
8648; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
8649; CHECK-RV32-NEXT:    vmv.s.x v16, a3
8650; CHECK-RV32-NEXT:    li a3, 359
8651; CHECK-RV32-NEXT:    li a4, 358
8652; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
8653; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
8654; CHECK-RV32-NEXT:    addi a0, a0, 1
8655; CHECK-RV32-NEXT:    andi a3, a2, 128
8656; CHECK-RV32-NEXT:    bnez a3, .LBB61_880
8657; CHECK-RV32-NEXT:    j .LBB61_383
8658; CHECK-RV32-NEXT:  .LBB61_880: # %cond.load1433
8659; CHECK-RV32-NEXT:    lbu a3, 0(a0)
8660; CHECK-RV32-NEXT:    li a4, 512
8661; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
8662; CHECK-RV32-NEXT:    vmv.s.x v16, a3
8663; CHECK-RV32-NEXT:    li a3, 360
8664; CHECK-RV32-NEXT:    li a4, 359
8665; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
8666; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
8667; CHECK-RV32-NEXT:    addi a0, a0, 1
8668; CHECK-RV32-NEXT:    andi a3, a2, 256
8669; CHECK-RV32-NEXT:    bnez a3, .LBB61_881
8670; CHECK-RV32-NEXT:    j .LBB61_384
8671; CHECK-RV32-NEXT:  .LBB61_881: # %cond.load1437
8672; CHECK-RV32-NEXT:    lbu a3, 0(a0)
8673; CHECK-RV32-NEXT:    li a4, 512
8674; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
8675; CHECK-RV32-NEXT:    vmv.s.x v16, a3
8676; CHECK-RV32-NEXT:    li a3, 361
8677; CHECK-RV32-NEXT:    li a4, 360
8678; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
8679; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
8680; CHECK-RV32-NEXT:    addi a0, a0, 1
8681; CHECK-RV32-NEXT:    andi a3, a2, 512
8682; CHECK-RV32-NEXT:    bnez a3, .LBB61_882
8683; CHECK-RV32-NEXT:    j .LBB61_385
8684; CHECK-RV32-NEXT:  .LBB61_882: # %cond.load1441
8685; CHECK-RV32-NEXT:    lbu a3, 0(a0)
8686; CHECK-RV32-NEXT:    li a4, 512
8687; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
8688; CHECK-RV32-NEXT:    vmv.s.x v16, a3
8689; CHECK-RV32-NEXT:    li a3, 362
8690; CHECK-RV32-NEXT:    li a4, 361
8691; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
8692; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
8693; CHECK-RV32-NEXT:    addi a0, a0, 1
8694; CHECK-RV32-NEXT:    andi a3, a2, 1024
8695; CHECK-RV32-NEXT:    bnez a3, .LBB61_883
8696; CHECK-RV32-NEXT:    j .LBB61_386
8697; CHECK-RV32-NEXT:  .LBB61_883: # %cond.load1445
8698; CHECK-RV32-NEXT:    lbu a3, 0(a0)
8699; CHECK-RV32-NEXT:    li a4, 512
8700; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
8701; CHECK-RV32-NEXT:    vmv.s.x v16, a3
8702; CHECK-RV32-NEXT:    li a3, 363
8703; CHECK-RV32-NEXT:    li a4, 362
8704; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
8705; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
8706; CHECK-RV32-NEXT:    addi a0, a0, 1
8707; CHECK-RV32-NEXT:    slli a3, a2, 20
8708; CHECK-RV32-NEXT:    bltz a3, .LBB61_884
8709; CHECK-RV32-NEXT:    j .LBB61_387
8710; CHECK-RV32-NEXT:  .LBB61_884: # %cond.load1449
8711; CHECK-RV32-NEXT:    lbu a3, 0(a0)
8712; CHECK-RV32-NEXT:    li a4, 512
8713; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
8714; CHECK-RV32-NEXT:    vmv.s.x v16, a3
8715; CHECK-RV32-NEXT:    li a3, 364
8716; CHECK-RV32-NEXT:    li a4, 363
8717; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
8718; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
8719; CHECK-RV32-NEXT:    addi a0, a0, 1
8720; CHECK-RV32-NEXT:    slli a3, a2, 19
8721; CHECK-RV32-NEXT:    bltz a3, .LBB61_885
8722; CHECK-RV32-NEXT:    j .LBB61_388
8723; CHECK-RV32-NEXT:  .LBB61_885: # %cond.load1453
8724; CHECK-RV32-NEXT:    lbu a3, 0(a0)
8725; CHECK-RV32-NEXT:    li a4, 512
8726; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
8727; CHECK-RV32-NEXT:    vmv.s.x v16, a3
8728; CHECK-RV32-NEXT:    li a3, 365
8729; CHECK-RV32-NEXT:    li a4, 364
8730; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
8731; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
8732; CHECK-RV32-NEXT:    addi a0, a0, 1
8733; CHECK-RV32-NEXT:    slli a3, a2, 18
8734; CHECK-RV32-NEXT:    bltz a3, .LBB61_886
8735; CHECK-RV32-NEXT:    j .LBB61_389
8736; CHECK-RV32-NEXT:  .LBB61_886: # %cond.load1457
8737; CHECK-RV32-NEXT:    lbu a3, 0(a0)
8738; CHECK-RV32-NEXT:    li a4, 512
8739; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
8740; CHECK-RV32-NEXT:    vmv.s.x v16, a3
8741; CHECK-RV32-NEXT:    li a3, 366
8742; CHECK-RV32-NEXT:    li a4, 365
8743; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
8744; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
8745; CHECK-RV32-NEXT:    addi a0, a0, 1
8746; CHECK-RV32-NEXT:    slli a3, a2, 17
8747; CHECK-RV32-NEXT:    bltz a3, .LBB61_887
8748; CHECK-RV32-NEXT:    j .LBB61_390
8749; CHECK-RV32-NEXT:  .LBB61_887: # %cond.load1461
8750; CHECK-RV32-NEXT:    lbu a3, 0(a0)
8751; CHECK-RV32-NEXT:    li a4, 512
8752; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
8753; CHECK-RV32-NEXT:    vmv.s.x v16, a3
8754; CHECK-RV32-NEXT:    li a3, 367
8755; CHECK-RV32-NEXT:    li a4, 366
8756; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
8757; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
8758; CHECK-RV32-NEXT:    addi a0, a0, 1
8759; CHECK-RV32-NEXT:    slli a3, a2, 16
8760; CHECK-RV32-NEXT:    bltz a3, .LBB61_888
8761; CHECK-RV32-NEXT:    j .LBB61_391
8762; CHECK-RV32-NEXT:  .LBB61_888: # %cond.load1465
8763; CHECK-RV32-NEXT:    lbu a3, 0(a0)
8764; CHECK-RV32-NEXT:    li a4, 512
8765; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
8766; CHECK-RV32-NEXT:    vmv.s.x v16, a3
8767; CHECK-RV32-NEXT:    li a3, 368
8768; CHECK-RV32-NEXT:    li a4, 367
8769; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
8770; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
8771; CHECK-RV32-NEXT:    addi a0, a0, 1
8772; CHECK-RV32-NEXT:    slli a3, a2, 15
8773; CHECK-RV32-NEXT:    bltz a3, .LBB61_889
8774; CHECK-RV32-NEXT:    j .LBB61_392
8775; CHECK-RV32-NEXT:  .LBB61_889: # %cond.load1469
8776; CHECK-RV32-NEXT:    lbu a3, 0(a0)
8777; CHECK-RV32-NEXT:    li a4, 512
8778; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
8779; CHECK-RV32-NEXT:    vmv.s.x v16, a3
8780; CHECK-RV32-NEXT:    li a3, 369
8781; CHECK-RV32-NEXT:    li a4, 368
8782; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
8783; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
8784; CHECK-RV32-NEXT:    addi a0, a0, 1
8785; CHECK-RV32-NEXT:    slli a3, a2, 14
8786; CHECK-RV32-NEXT:    bltz a3, .LBB61_890
8787; CHECK-RV32-NEXT:    j .LBB61_393
8788; CHECK-RV32-NEXT:  .LBB61_890: # %cond.load1473
8789; CHECK-RV32-NEXT:    lbu a3, 0(a0)
8790; CHECK-RV32-NEXT:    li a4, 512
8791; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
8792; CHECK-RV32-NEXT:    vmv.s.x v16, a3
8793; CHECK-RV32-NEXT:    li a3, 370
8794; CHECK-RV32-NEXT:    li a4, 369
8795; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
8796; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
8797; CHECK-RV32-NEXT:    addi a0, a0, 1
8798; CHECK-RV32-NEXT:    slli a3, a2, 13
8799; CHECK-RV32-NEXT:    bltz a3, .LBB61_891
8800; CHECK-RV32-NEXT:    j .LBB61_394
8801; CHECK-RV32-NEXT:  .LBB61_891: # %cond.load1477
8802; CHECK-RV32-NEXT:    lbu a3, 0(a0)
8803; CHECK-RV32-NEXT:    li a4, 512
8804; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
8805; CHECK-RV32-NEXT:    vmv.s.x v16, a3
8806; CHECK-RV32-NEXT:    li a3, 371
8807; CHECK-RV32-NEXT:    li a4, 370
8808; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
8809; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
8810; CHECK-RV32-NEXT:    addi a0, a0, 1
8811; CHECK-RV32-NEXT:    slli a3, a2, 12
8812; CHECK-RV32-NEXT:    bltz a3, .LBB61_892
8813; CHECK-RV32-NEXT:    j .LBB61_395
8814; CHECK-RV32-NEXT:  .LBB61_892: # %cond.load1481
8815; CHECK-RV32-NEXT:    lbu a3, 0(a0)
8816; CHECK-RV32-NEXT:    li a4, 512
8817; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
8818; CHECK-RV32-NEXT:    vmv.s.x v16, a3
8819; CHECK-RV32-NEXT:    li a3, 372
8820; CHECK-RV32-NEXT:    li a4, 371
8821; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
8822; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
8823; CHECK-RV32-NEXT:    addi a0, a0, 1
8824; CHECK-RV32-NEXT:    slli a3, a2, 11
8825; CHECK-RV32-NEXT:    bltz a3, .LBB61_893
8826; CHECK-RV32-NEXT:    j .LBB61_396
8827; CHECK-RV32-NEXT:  .LBB61_893: # %cond.load1485
8828; CHECK-RV32-NEXT:    lbu a3, 0(a0)
8829; CHECK-RV32-NEXT:    li a4, 512
8830; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
8831; CHECK-RV32-NEXT:    vmv.s.x v16, a3
8832; CHECK-RV32-NEXT:    li a3, 373
8833; CHECK-RV32-NEXT:    li a4, 372
8834; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
8835; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
8836; CHECK-RV32-NEXT:    addi a0, a0, 1
8837; CHECK-RV32-NEXT:    slli a3, a2, 10
8838; CHECK-RV32-NEXT:    bltz a3, .LBB61_894
8839; CHECK-RV32-NEXT:    j .LBB61_397
8840; CHECK-RV32-NEXT:  .LBB61_894: # %cond.load1489
8841; CHECK-RV32-NEXT:    lbu a3, 0(a0)
8842; CHECK-RV32-NEXT:    li a4, 512
8843; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
8844; CHECK-RV32-NEXT:    vmv.s.x v16, a3
8845; CHECK-RV32-NEXT:    li a3, 374
8846; CHECK-RV32-NEXT:    li a4, 373
8847; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
8848; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
8849; CHECK-RV32-NEXT:    addi a0, a0, 1
8850; CHECK-RV32-NEXT:    slli a3, a2, 9
8851; CHECK-RV32-NEXT:    bltz a3, .LBB61_895
8852; CHECK-RV32-NEXT:    j .LBB61_398
8853; CHECK-RV32-NEXT:  .LBB61_895: # %cond.load1493
8854; CHECK-RV32-NEXT:    lbu a3, 0(a0)
8855; CHECK-RV32-NEXT:    li a4, 512
8856; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
8857; CHECK-RV32-NEXT:    vmv.s.x v16, a3
8858; CHECK-RV32-NEXT:    li a3, 375
8859; CHECK-RV32-NEXT:    li a4, 374
8860; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
8861; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
8862; CHECK-RV32-NEXT:    addi a0, a0, 1
8863; CHECK-RV32-NEXT:    slli a3, a2, 8
8864; CHECK-RV32-NEXT:    bltz a3, .LBB61_896
8865; CHECK-RV32-NEXT:    j .LBB61_399
8866; CHECK-RV32-NEXT:  .LBB61_896: # %cond.load1497
8867; CHECK-RV32-NEXT:    lbu a3, 0(a0)
8868; CHECK-RV32-NEXT:    li a4, 512
8869; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
8870; CHECK-RV32-NEXT:    vmv.s.x v16, a3
8871; CHECK-RV32-NEXT:    li a3, 376
8872; CHECK-RV32-NEXT:    li a4, 375
8873; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
8874; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
8875; CHECK-RV32-NEXT:    addi a0, a0, 1
8876; CHECK-RV32-NEXT:    slli a3, a2, 7
8877; CHECK-RV32-NEXT:    bltz a3, .LBB61_897
8878; CHECK-RV32-NEXT:    j .LBB61_400
8879; CHECK-RV32-NEXT:  .LBB61_897: # %cond.load1501
8880; CHECK-RV32-NEXT:    lbu a3, 0(a0)
8881; CHECK-RV32-NEXT:    li a4, 512
8882; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
8883; CHECK-RV32-NEXT:    vmv.s.x v16, a3
8884; CHECK-RV32-NEXT:    li a3, 377
8885; CHECK-RV32-NEXT:    li a4, 376
8886; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
8887; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
8888; CHECK-RV32-NEXT:    addi a0, a0, 1
8889; CHECK-RV32-NEXT:    slli a3, a2, 6
8890; CHECK-RV32-NEXT:    bltz a3, .LBB61_898
8891; CHECK-RV32-NEXT:    j .LBB61_401
8892; CHECK-RV32-NEXT:  .LBB61_898: # %cond.load1505
8893; CHECK-RV32-NEXT:    lbu a3, 0(a0)
8894; CHECK-RV32-NEXT:    li a4, 512
8895; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
8896; CHECK-RV32-NEXT:    vmv.s.x v16, a3
8897; CHECK-RV32-NEXT:    li a3, 378
8898; CHECK-RV32-NEXT:    li a4, 377
8899; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
8900; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
8901; CHECK-RV32-NEXT:    addi a0, a0, 1
8902; CHECK-RV32-NEXT:    slli a3, a2, 5
8903; CHECK-RV32-NEXT:    bltz a3, .LBB61_899
8904; CHECK-RV32-NEXT:    j .LBB61_402
8905; CHECK-RV32-NEXT:  .LBB61_899: # %cond.load1509
8906; CHECK-RV32-NEXT:    lbu a3, 0(a0)
8907; CHECK-RV32-NEXT:    li a4, 512
8908; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
8909; CHECK-RV32-NEXT:    vmv.s.x v16, a3
8910; CHECK-RV32-NEXT:    li a3, 379
8911; CHECK-RV32-NEXT:    li a4, 378
8912; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
8913; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
8914; CHECK-RV32-NEXT:    addi a0, a0, 1
8915; CHECK-RV32-NEXT:    slli a3, a2, 4
8916; CHECK-RV32-NEXT:    bltz a3, .LBB61_900
8917; CHECK-RV32-NEXT:    j .LBB61_403
8918; CHECK-RV32-NEXT:  .LBB61_900: # %cond.load1513
8919; CHECK-RV32-NEXT:    lbu a3, 0(a0)
8920; CHECK-RV32-NEXT:    li a4, 512
8921; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
8922; CHECK-RV32-NEXT:    vmv.s.x v16, a3
8923; CHECK-RV32-NEXT:    li a3, 380
8924; CHECK-RV32-NEXT:    li a4, 379
8925; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
8926; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
8927; CHECK-RV32-NEXT:    addi a0, a0, 1
8928; CHECK-RV32-NEXT:    slli a3, a2, 3
8929; CHECK-RV32-NEXT:    bltz a3, .LBB61_901
8930; CHECK-RV32-NEXT:    j .LBB61_404
8931; CHECK-RV32-NEXT:  .LBB61_901: # %cond.load1517
8932; CHECK-RV32-NEXT:    lbu a3, 0(a0)
8933; CHECK-RV32-NEXT:    li a4, 512
8934; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
8935; CHECK-RV32-NEXT:    vmv.s.x v16, a3
8936; CHECK-RV32-NEXT:    li a3, 381
8937; CHECK-RV32-NEXT:    li a4, 380
8938; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
8939; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
8940; CHECK-RV32-NEXT:    addi a0, a0, 1
8941; CHECK-RV32-NEXT:    slli a3, a2, 2
8942; CHECK-RV32-NEXT:    bgez a3, .LBB61_1036
8943; CHECK-RV32-NEXT:    j .LBB61_405
8944; CHECK-RV32-NEXT:  .LBB61_1036: # %cond.load1517
8945; CHECK-RV32-NEXT:    j .LBB61_406
8946; CHECK-RV32-NEXT:  .LBB61_902: # %cond.load1529
8947; CHECK-RV32-NEXT:    lbu a2, 0(a0)
8948; CHECK-RV32-NEXT:    vmv.s.x v24, a2
8949; CHECK-RV32-NEXT:    li a2, 384
8950; CHECK-RV32-NEXT:    li a4, 383
8951; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
8952; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
8953; CHECK-RV32-NEXT:    addi a0, a0, 1
8954; CHECK-RV32-NEXT:    andi a2, a3, 1
8955; CHECK-RV32-NEXT:    bnez a2, .LBB61_903
8956; CHECK-RV32-NEXT:    j .LBB61_410
8957; CHECK-RV32-NEXT:  .LBB61_903: # %cond.load1533
8958; CHECK-RV32-NEXT:    lbu a2, 0(a0)
8959; CHECK-RV32-NEXT:    li a4, 512
8960; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
8961; CHECK-RV32-NEXT:    vmv.s.x v24, a2
8962; CHECK-RV32-NEXT:    li a2, 385
8963; CHECK-RV32-NEXT:    li a4, 384
8964; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
8965; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
8966; CHECK-RV32-NEXT:    addi a0, a0, 1
8967; CHECK-RV32-NEXT:    andi a2, a3, 2
8968; CHECK-RV32-NEXT:    bnez a2, .LBB61_904
8969; CHECK-RV32-NEXT:    j .LBB61_411
8970; CHECK-RV32-NEXT:  .LBB61_904: # %cond.load1537
8971; CHECK-RV32-NEXT:    lbu a2, 0(a0)
8972; CHECK-RV32-NEXT:    li a4, 512
8973; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
8974; CHECK-RV32-NEXT:    vmv.s.x v24, a2
8975; CHECK-RV32-NEXT:    li a2, 386
8976; CHECK-RV32-NEXT:    li a4, 385
8977; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
8978; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
8979; CHECK-RV32-NEXT:    addi a0, a0, 1
8980; CHECK-RV32-NEXT:    andi a2, a3, 4
8981; CHECK-RV32-NEXT:    bnez a2, .LBB61_905
8982; CHECK-RV32-NEXT:    j .LBB61_412
8983; CHECK-RV32-NEXT:  .LBB61_905: # %cond.load1541
8984; CHECK-RV32-NEXT:    lbu a2, 0(a0)
8985; CHECK-RV32-NEXT:    li a4, 512
8986; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
8987; CHECK-RV32-NEXT:    vmv.s.x v24, a2
8988; CHECK-RV32-NEXT:    li a2, 387
8989; CHECK-RV32-NEXT:    li a4, 386
8990; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
8991; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
8992; CHECK-RV32-NEXT:    addi a0, a0, 1
8993; CHECK-RV32-NEXT:    andi a2, a3, 8
8994; CHECK-RV32-NEXT:    bnez a2, .LBB61_906
8995; CHECK-RV32-NEXT:    j .LBB61_413
8996; CHECK-RV32-NEXT:  .LBB61_906: # %cond.load1545
8997; CHECK-RV32-NEXT:    lbu a2, 0(a0)
8998; CHECK-RV32-NEXT:    li a4, 512
8999; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
9000; CHECK-RV32-NEXT:    vmv.s.x v24, a2
9001; CHECK-RV32-NEXT:    li a2, 388
9002; CHECK-RV32-NEXT:    li a4, 387
9003; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
9004; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
9005; CHECK-RV32-NEXT:    addi a0, a0, 1
9006; CHECK-RV32-NEXT:    andi a2, a3, 16
9007; CHECK-RV32-NEXT:    bnez a2, .LBB61_907
9008; CHECK-RV32-NEXT:    j .LBB61_414
9009; CHECK-RV32-NEXT:  .LBB61_907: # %cond.load1549
9010; CHECK-RV32-NEXT:    lbu a2, 0(a0)
9011; CHECK-RV32-NEXT:    li a4, 512
9012; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
9013; CHECK-RV32-NEXT:    vmv.s.x v24, a2
9014; CHECK-RV32-NEXT:    li a2, 389
9015; CHECK-RV32-NEXT:    li a4, 388
9016; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
9017; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
9018; CHECK-RV32-NEXT:    addi a0, a0, 1
9019; CHECK-RV32-NEXT:    andi a2, a3, 32
9020; CHECK-RV32-NEXT:    bnez a2, .LBB61_908
9021; CHECK-RV32-NEXT:    j .LBB61_415
9022; CHECK-RV32-NEXT:  .LBB61_908: # %cond.load1553
9023; CHECK-RV32-NEXT:    lbu a2, 0(a0)
9024; CHECK-RV32-NEXT:    li a4, 512
9025; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
9026; CHECK-RV32-NEXT:    vmv.s.x v24, a2
9027; CHECK-RV32-NEXT:    li a2, 390
9028; CHECK-RV32-NEXT:    li a4, 389
9029; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
9030; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
9031; CHECK-RV32-NEXT:    addi a0, a0, 1
9032; CHECK-RV32-NEXT:    andi a2, a3, 64
9033; CHECK-RV32-NEXT:    bnez a2, .LBB61_909
9034; CHECK-RV32-NEXT:    j .LBB61_416
9035; CHECK-RV32-NEXT:  .LBB61_909: # %cond.load1557
9036; CHECK-RV32-NEXT:    lbu a2, 0(a0)
9037; CHECK-RV32-NEXT:    li a4, 512
9038; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
9039; CHECK-RV32-NEXT:    vmv.s.x v24, a2
9040; CHECK-RV32-NEXT:    li a2, 391
9041; CHECK-RV32-NEXT:    li a4, 390
9042; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
9043; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
9044; CHECK-RV32-NEXT:    addi a0, a0, 1
9045; CHECK-RV32-NEXT:    andi a2, a3, 128
9046; CHECK-RV32-NEXT:    bnez a2, .LBB61_910
9047; CHECK-RV32-NEXT:    j .LBB61_417
9048; CHECK-RV32-NEXT:  .LBB61_910: # %cond.load1561
9049; CHECK-RV32-NEXT:    lbu a2, 0(a0)
9050; CHECK-RV32-NEXT:    li a4, 512
9051; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
9052; CHECK-RV32-NEXT:    vmv.s.x v24, a2
9053; CHECK-RV32-NEXT:    li a2, 392
9054; CHECK-RV32-NEXT:    li a4, 391
9055; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
9056; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
9057; CHECK-RV32-NEXT:    addi a0, a0, 1
9058; CHECK-RV32-NEXT:    andi a2, a3, 256
9059; CHECK-RV32-NEXT:    bnez a2, .LBB61_911
9060; CHECK-RV32-NEXT:    j .LBB61_418
9061; CHECK-RV32-NEXT:  .LBB61_911: # %cond.load1565
9062; CHECK-RV32-NEXT:    lbu a2, 0(a0)
9063; CHECK-RV32-NEXT:    li a4, 512
9064; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
9065; CHECK-RV32-NEXT:    vmv.s.x v24, a2
9066; CHECK-RV32-NEXT:    li a2, 393
9067; CHECK-RV32-NEXT:    li a4, 392
9068; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
9069; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
9070; CHECK-RV32-NEXT:    addi a0, a0, 1
9071; CHECK-RV32-NEXT:    andi a2, a3, 512
9072; CHECK-RV32-NEXT:    bnez a2, .LBB61_912
9073; CHECK-RV32-NEXT:    j .LBB61_419
9074; CHECK-RV32-NEXT:  .LBB61_912: # %cond.load1569
9075; CHECK-RV32-NEXT:    lbu a2, 0(a0)
9076; CHECK-RV32-NEXT:    li a4, 512
9077; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
9078; CHECK-RV32-NEXT:    vmv.s.x v24, a2
9079; CHECK-RV32-NEXT:    li a2, 394
9080; CHECK-RV32-NEXT:    li a4, 393
9081; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
9082; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
9083; CHECK-RV32-NEXT:    addi a0, a0, 1
9084; CHECK-RV32-NEXT:    andi a2, a3, 1024
9085; CHECK-RV32-NEXT:    bnez a2, .LBB61_913
9086; CHECK-RV32-NEXT:    j .LBB61_420
9087; CHECK-RV32-NEXT:  .LBB61_913: # %cond.load1573
9088; CHECK-RV32-NEXT:    lbu a2, 0(a0)
9089; CHECK-RV32-NEXT:    li a4, 512
9090; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
9091; CHECK-RV32-NEXT:    vmv.s.x v24, a2
9092; CHECK-RV32-NEXT:    li a2, 395
9093; CHECK-RV32-NEXT:    li a4, 394
9094; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
9095; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
9096; CHECK-RV32-NEXT:    addi a0, a0, 1
9097; CHECK-RV32-NEXT:    slli a2, a3, 20
9098; CHECK-RV32-NEXT:    bltz a2, .LBB61_914
9099; CHECK-RV32-NEXT:    j .LBB61_421
9100; CHECK-RV32-NEXT:  .LBB61_914: # %cond.load1577
9101; CHECK-RV32-NEXT:    lbu a2, 0(a0)
9102; CHECK-RV32-NEXT:    li a4, 512
9103; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
9104; CHECK-RV32-NEXT:    vmv.s.x v24, a2
9105; CHECK-RV32-NEXT:    li a2, 396
9106; CHECK-RV32-NEXT:    li a4, 395
9107; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
9108; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
9109; CHECK-RV32-NEXT:    addi a0, a0, 1
9110; CHECK-RV32-NEXT:    slli a2, a3, 19
9111; CHECK-RV32-NEXT:    bltz a2, .LBB61_915
9112; CHECK-RV32-NEXT:    j .LBB61_422
9113; CHECK-RV32-NEXT:  .LBB61_915: # %cond.load1581
9114; CHECK-RV32-NEXT:    lbu a2, 0(a0)
9115; CHECK-RV32-NEXT:    li a4, 512
9116; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
9117; CHECK-RV32-NEXT:    vmv.s.x v24, a2
9118; CHECK-RV32-NEXT:    li a2, 397
9119; CHECK-RV32-NEXT:    li a4, 396
9120; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
9121; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
9122; CHECK-RV32-NEXT:    addi a0, a0, 1
9123; CHECK-RV32-NEXT:    slli a2, a3, 18
9124; CHECK-RV32-NEXT:    bltz a2, .LBB61_916
9125; CHECK-RV32-NEXT:    j .LBB61_423
9126; CHECK-RV32-NEXT:  .LBB61_916: # %cond.load1585
9127; CHECK-RV32-NEXT:    lbu a2, 0(a0)
9128; CHECK-RV32-NEXT:    li a4, 512
9129; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
9130; CHECK-RV32-NEXT:    vmv.s.x v24, a2
9131; CHECK-RV32-NEXT:    li a2, 398
9132; CHECK-RV32-NEXT:    li a4, 397
9133; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
9134; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
9135; CHECK-RV32-NEXT:    addi a0, a0, 1
9136; CHECK-RV32-NEXT:    slli a2, a3, 17
9137; CHECK-RV32-NEXT:    bltz a2, .LBB61_917
9138; CHECK-RV32-NEXT:    j .LBB61_424
9139; CHECK-RV32-NEXT:  .LBB61_917: # %cond.load1589
9140; CHECK-RV32-NEXT:    lbu a2, 0(a0)
9141; CHECK-RV32-NEXT:    li a4, 512
9142; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
9143; CHECK-RV32-NEXT:    vmv.s.x v24, a2
9144; CHECK-RV32-NEXT:    li a2, 399
9145; CHECK-RV32-NEXT:    li a4, 398
9146; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
9147; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
9148; CHECK-RV32-NEXT:    addi a0, a0, 1
9149; CHECK-RV32-NEXT:    slli a2, a3, 16
9150; CHECK-RV32-NEXT:    bltz a2, .LBB61_918
9151; CHECK-RV32-NEXT:    j .LBB61_425
9152; CHECK-RV32-NEXT:  .LBB61_918: # %cond.load1593
9153; CHECK-RV32-NEXT:    lbu a2, 0(a0)
9154; CHECK-RV32-NEXT:    li a4, 512
9155; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
9156; CHECK-RV32-NEXT:    vmv.s.x v24, a2
9157; CHECK-RV32-NEXT:    li a2, 400
9158; CHECK-RV32-NEXT:    li a4, 399
9159; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
9160; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
9161; CHECK-RV32-NEXT:    addi a0, a0, 1
9162; CHECK-RV32-NEXT:    slli a2, a3, 15
9163; CHECK-RV32-NEXT:    bltz a2, .LBB61_919
9164; CHECK-RV32-NEXT:    j .LBB61_426
9165; CHECK-RV32-NEXT:  .LBB61_919: # %cond.load1597
9166; CHECK-RV32-NEXT:    lbu a2, 0(a0)
9167; CHECK-RV32-NEXT:    li a4, 512
9168; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
9169; CHECK-RV32-NEXT:    vmv.s.x v24, a2
9170; CHECK-RV32-NEXT:    li a2, 401
9171; CHECK-RV32-NEXT:    li a4, 400
9172; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
9173; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
9174; CHECK-RV32-NEXT:    addi a0, a0, 1
9175; CHECK-RV32-NEXT:    slli a2, a3, 14
9176; CHECK-RV32-NEXT:    bltz a2, .LBB61_920
9177; CHECK-RV32-NEXT:    j .LBB61_427
9178; CHECK-RV32-NEXT:  .LBB61_920: # %cond.load1601
9179; CHECK-RV32-NEXT:    lbu a2, 0(a0)
9180; CHECK-RV32-NEXT:    li a4, 512
9181; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
9182; CHECK-RV32-NEXT:    vmv.s.x v24, a2
9183; CHECK-RV32-NEXT:    li a2, 402
9184; CHECK-RV32-NEXT:    li a4, 401
9185; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
9186; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
9187; CHECK-RV32-NEXT:    addi a0, a0, 1
9188; CHECK-RV32-NEXT:    slli a2, a3, 13
9189; CHECK-RV32-NEXT:    bltz a2, .LBB61_921
9190; CHECK-RV32-NEXT:    j .LBB61_428
9191; CHECK-RV32-NEXT:  .LBB61_921: # %cond.load1605
9192; CHECK-RV32-NEXT:    lbu a2, 0(a0)
9193; CHECK-RV32-NEXT:    li a4, 512
9194; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
9195; CHECK-RV32-NEXT:    vmv.s.x v24, a2
9196; CHECK-RV32-NEXT:    li a2, 403
9197; CHECK-RV32-NEXT:    li a4, 402
9198; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
9199; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
9200; CHECK-RV32-NEXT:    addi a0, a0, 1
9201; CHECK-RV32-NEXT:    slli a2, a3, 12
9202; CHECK-RV32-NEXT:    bltz a2, .LBB61_922
9203; CHECK-RV32-NEXT:    j .LBB61_429
9204; CHECK-RV32-NEXT:  .LBB61_922: # %cond.load1609
9205; CHECK-RV32-NEXT:    lbu a2, 0(a0)
9206; CHECK-RV32-NEXT:    li a4, 512
9207; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
9208; CHECK-RV32-NEXT:    vmv.s.x v24, a2
9209; CHECK-RV32-NEXT:    li a2, 404
9210; CHECK-RV32-NEXT:    li a4, 403
9211; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
9212; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
9213; CHECK-RV32-NEXT:    addi a0, a0, 1
9214; CHECK-RV32-NEXT:    slli a2, a3, 11
9215; CHECK-RV32-NEXT:    bltz a2, .LBB61_923
9216; CHECK-RV32-NEXT:    j .LBB61_430
9217; CHECK-RV32-NEXT:  .LBB61_923: # %cond.load1613
9218; CHECK-RV32-NEXT:    lbu a2, 0(a0)
9219; CHECK-RV32-NEXT:    li a4, 512
9220; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
9221; CHECK-RV32-NEXT:    vmv.s.x v24, a2
9222; CHECK-RV32-NEXT:    li a2, 405
9223; CHECK-RV32-NEXT:    li a4, 404
9224; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
9225; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
9226; CHECK-RV32-NEXT:    addi a0, a0, 1
9227; CHECK-RV32-NEXT:    slli a2, a3, 10
9228; CHECK-RV32-NEXT:    bltz a2, .LBB61_924
9229; CHECK-RV32-NEXT:    j .LBB61_431
9230; CHECK-RV32-NEXT:  .LBB61_924: # %cond.load1617
9231; CHECK-RV32-NEXT:    lbu a2, 0(a0)
9232; CHECK-RV32-NEXT:    li a4, 512
9233; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
9234; CHECK-RV32-NEXT:    vmv.s.x v24, a2
9235; CHECK-RV32-NEXT:    li a2, 406
9236; CHECK-RV32-NEXT:    li a4, 405
9237; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
9238; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
9239; CHECK-RV32-NEXT:    addi a0, a0, 1
9240; CHECK-RV32-NEXT:    slli a2, a3, 9
9241; CHECK-RV32-NEXT:    bltz a2, .LBB61_925
9242; CHECK-RV32-NEXT:    j .LBB61_432
9243; CHECK-RV32-NEXT:  .LBB61_925: # %cond.load1621
9244; CHECK-RV32-NEXT:    lbu a2, 0(a0)
9245; CHECK-RV32-NEXT:    li a4, 512
9246; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
9247; CHECK-RV32-NEXT:    vmv.s.x v24, a2
9248; CHECK-RV32-NEXT:    li a2, 407
9249; CHECK-RV32-NEXT:    li a4, 406
9250; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
9251; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
9252; CHECK-RV32-NEXT:    addi a0, a0, 1
9253; CHECK-RV32-NEXT:    slli a2, a3, 8
9254; CHECK-RV32-NEXT:    bltz a2, .LBB61_926
9255; CHECK-RV32-NEXT:    j .LBB61_433
9256; CHECK-RV32-NEXT:  .LBB61_926: # %cond.load1625
9257; CHECK-RV32-NEXT:    lbu a2, 0(a0)
9258; CHECK-RV32-NEXT:    li a4, 512
9259; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
9260; CHECK-RV32-NEXT:    vmv.s.x v24, a2
9261; CHECK-RV32-NEXT:    li a2, 408
9262; CHECK-RV32-NEXT:    li a4, 407
9263; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
9264; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
9265; CHECK-RV32-NEXT:    addi a0, a0, 1
9266; CHECK-RV32-NEXT:    slli a2, a3, 7
9267; CHECK-RV32-NEXT:    bltz a2, .LBB61_927
9268; CHECK-RV32-NEXT:    j .LBB61_434
9269; CHECK-RV32-NEXT:  .LBB61_927: # %cond.load1629
9270; CHECK-RV32-NEXT:    lbu a2, 0(a0)
9271; CHECK-RV32-NEXT:    li a4, 512
9272; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
9273; CHECK-RV32-NEXT:    vmv.s.x v24, a2
9274; CHECK-RV32-NEXT:    li a2, 409
9275; CHECK-RV32-NEXT:    li a4, 408
9276; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
9277; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
9278; CHECK-RV32-NEXT:    addi a0, a0, 1
9279; CHECK-RV32-NEXT:    slli a2, a3, 6
9280; CHECK-RV32-NEXT:    bltz a2, .LBB61_928
9281; CHECK-RV32-NEXT:    j .LBB61_435
9282; CHECK-RV32-NEXT:  .LBB61_928: # %cond.load1633
9283; CHECK-RV32-NEXT:    lbu a2, 0(a0)
9284; CHECK-RV32-NEXT:    li a4, 512
9285; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
9286; CHECK-RV32-NEXT:    vmv.s.x v24, a2
9287; CHECK-RV32-NEXT:    li a2, 410
9288; CHECK-RV32-NEXT:    li a4, 409
9289; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
9290; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
9291; CHECK-RV32-NEXT:    addi a0, a0, 1
9292; CHECK-RV32-NEXT:    slli a2, a3, 5
9293; CHECK-RV32-NEXT:    bltz a2, .LBB61_929
9294; CHECK-RV32-NEXT:    j .LBB61_436
9295; CHECK-RV32-NEXT:  .LBB61_929: # %cond.load1637
9296; CHECK-RV32-NEXT:    lbu a2, 0(a0)
9297; CHECK-RV32-NEXT:    li a4, 512
9298; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
9299; CHECK-RV32-NEXT:    vmv.s.x v24, a2
9300; CHECK-RV32-NEXT:    li a2, 411
9301; CHECK-RV32-NEXT:    li a4, 410
9302; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
9303; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
9304; CHECK-RV32-NEXT:    addi a0, a0, 1
9305; CHECK-RV32-NEXT:    slli a2, a3, 4
9306; CHECK-RV32-NEXT:    bltz a2, .LBB61_930
9307; CHECK-RV32-NEXT:    j .LBB61_437
9308; CHECK-RV32-NEXT:  .LBB61_930: # %cond.load1641
9309; CHECK-RV32-NEXT:    lbu a2, 0(a0)
9310; CHECK-RV32-NEXT:    li a4, 512
9311; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
9312; CHECK-RV32-NEXT:    vmv.s.x v24, a2
9313; CHECK-RV32-NEXT:    li a2, 412
9314; CHECK-RV32-NEXT:    li a4, 411
9315; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
9316; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
9317; CHECK-RV32-NEXT:    addi a0, a0, 1
9318; CHECK-RV32-NEXT:    slli a2, a3, 3
9319; CHECK-RV32-NEXT:    bltz a2, .LBB61_931
9320; CHECK-RV32-NEXT:    j .LBB61_438
9321; CHECK-RV32-NEXT:  .LBB61_931: # %cond.load1645
9322; CHECK-RV32-NEXT:    lbu a2, 0(a0)
9323; CHECK-RV32-NEXT:    li a4, 512
9324; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
9325; CHECK-RV32-NEXT:    vmv.s.x v24, a2
9326; CHECK-RV32-NEXT:    li a2, 413
9327; CHECK-RV32-NEXT:    li a4, 412
9328; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
9329; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
9330; CHECK-RV32-NEXT:    addi a0, a0, 1
9331; CHECK-RV32-NEXT:    slli a2, a3, 2
9332; CHECK-RV32-NEXT:    bgez a2, .LBB61_1037
9333; CHECK-RV32-NEXT:    j .LBB61_439
9334; CHECK-RV32-NEXT:  .LBB61_1037: # %cond.load1645
9335; CHECK-RV32-NEXT:    j .LBB61_440
9336; CHECK-RV32-NEXT:  .LBB61_932: # %cond.load1657
9337; CHECK-RV32-NEXT:    lbu a3, 0(a0)
9338; CHECK-RV32-NEXT:    vmv.s.x v16, a3
9339; CHECK-RV32-NEXT:    li a3, 416
9340; CHECK-RV32-NEXT:    li a4, 415
9341; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
9342; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
9343; CHECK-RV32-NEXT:    addi a0, a0, 1
9344; CHECK-RV32-NEXT:    andi a3, a2, 1
9345; CHECK-RV32-NEXT:    bnez a3, .LBB61_933
9346; CHECK-RV32-NEXT:    j .LBB61_444
9347; CHECK-RV32-NEXT:  .LBB61_933: # %cond.load1661
9348; CHECK-RV32-NEXT:    lbu a3, 0(a0)
9349; CHECK-RV32-NEXT:    li a4, 512
9350; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
9351; CHECK-RV32-NEXT:    vmv.s.x v16, a3
9352; CHECK-RV32-NEXT:    li a3, 417
9353; CHECK-RV32-NEXT:    li a4, 416
9354; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
9355; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
9356; CHECK-RV32-NEXT:    addi a0, a0, 1
9357; CHECK-RV32-NEXT:    andi a3, a2, 2
9358; CHECK-RV32-NEXT:    bnez a3, .LBB61_934
9359; CHECK-RV32-NEXT:    j .LBB61_445
9360; CHECK-RV32-NEXT:  .LBB61_934: # %cond.load1665
9361; CHECK-RV32-NEXT:    lbu a3, 0(a0)
9362; CHECK-RV32-NEXT:    li a4, 512
9363; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
9364; CHECK-RV32-NEXT:    vmv.s.x v16, a3
9365; CHECK-RV32-NEXT:    li a3, 418
9366; CHECK-RV32-NEXT:    li a4, 417
9367; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
9368; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
9369; CHECK-RV32-NEXT:    addi a0, a0, 1
9370; CHECK-RV32-NEXT:    andi a3, a2, 4
9371; CHECK-RV32-NEXT:    bnez a3, .LBB61_935
9372; CHECK-RV32-NEXT:    j .LBB61_446
9373; CHECK-RV32-NEXT:  .LBB61_935: # %cond.load1669
9374; CHECK-RV32-NEXT:    lbu a3, 0(a0)
9375; CHECK-RV32-NEXT:    li a4, 512
9376; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
9377; CHECK-RV32-NEXT:    vmv.s.x v16, a3
9378; CHECK-RV32-NEXT:    li a3, 419
9379; CHECK-RV32-NEXT:    li a4, 418
9380; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
9381; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
9382; CHECK-RV32-NEXT:    addi a0, a0, 1
9383; CHECK-RV32-NEXT:    andi a3, a2, 8
9384; CHECK-RV32-NEXT:    bnez a3, .LBB61_936
9385; CHECK-RV32-NEXT:    j .LBB61_447
9386; CHECK-RV32-NEXT:  .LBB61_936: # %cond.load1673
9387; CHECK-RV32-NEXT:    lbu a3, 0(a0)
9388; CHECK-RV32-NEXT:    li a4, 512
9389; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
9390; CHECK-RV32-NEXT:    vmv.s.x v16, a3
9391; CHECK-RV32-NEXT:    li a3, 420
9392; CHECK-RV32-NEXT:    li a4, 419
9393; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
9394; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
9395; CHECK-RV32-NEXT:    addi a0, a0, 1
9396; CHECK-RV32-NEXT:    andi a3, a2, 16
9397; CHECK-RV32-NEXT:    bnez a3, .LBB61_937
9398; CHECK-RV32-NEXT:    j .LBB61_448
9399; CHECK-RV32-NEXT:  .LBB61_937: # %cond.load1677
9400; CHECK-RV32-NEXT:    lbu a3, 0(a0)
9401; CHECK-RV32-NEXT:    li a4, 512
9402; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
9403; CHECK-RV32-NEXT:    vmv.s.x v16, a3
9404; CHECK-RV32-NEXT:    li a3, 421
9405; CHECK-RV32-NEXT:    li a4, 420
9406; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
9407; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
9408; CHECK-RV32-NEXT:    addi a0, a0, 1
9409; CHECK-RV32-NEXT:    andi a3, a2, 32
9410; CHECK-RV32-NEXT:    bnez a3, .LBB61_938
9411; CHECK-RV32-NEXT:    j .LBB61_449
9412; CHECK-RV32-NEXT:  .LBB61_938: # %cond.load1681
9413; CHECK-RV32-NEXT:    lbu a3, 0(a0)
9414; CHECK-RV32-NEXT:    li a4, 512
9415; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
9416; CHECK-RV32-NEXT:    vmv.s.x v16, a3
9417; CHECK-RV32-NEXT:    li a3, 422
9418; CHECK-RV32-NEXT:    li a4, 421
9419; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
9420; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
9421; CHECK-RV32-NEXT:    addi a0, a0, 1
9422; CHECK-RV32-NEXT:    andi a3, a2, 64
9423; CHECK-RV32-NEXT:    bnez a3, .LBB61_939
9424; CHECK-RV32-NEXT:    j .LBB61_450
9425; CHECK-RV32-NEXT:  .LBB61_939: # %cond.load1685
9426; CHECK-RV32-NEXT:    lbu a3, 0(a0)
9427; CHECK-RV32-NEXT:    li a4, 512
9428; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
9429; CHECK-RV32-NEXT:    vmv.s.x v16, a3
9430; CHECK-RV32-NEXT:    li a3, 423
9431; CHECK-RV32-NEXT:    li a4, 422
9432; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
9433; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
9434; CHECK-RV32-NEXT:    addi a0, a0, 1
9435; CHECK-RV32-NEXT:    andi a3, a2, 128
9436; CHECK-RV32-NEXT:    bnez a3, .LBB61_940
9437; CHECK-RV32-NEXT:    j .LBB61_451
9438; CHECK-RV32-NEXT:  .LBB61_940: # %cond.load1689
9439; CHECK-RV32-NEXT:    lbu a3, 0(a0)
9440; CHECK-RV32-NEXT:    li a4, 512
9441; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
9442; CHECK-RV32-NEXT:    vmv.s.x v16, a3
9443; CHECK-RV32-NEXT:    li a3, 424
9444; CHECK-RV32-NEXT:    li a4, 423
9445; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
9446; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
9447; CHECK-RV32-NEXT:    addi a0, a0, 1
9448; CHECK-RV32-NEXT:    andi a3, a2, 256
9449; CHECK-RV32-NEXT:    bnez a3, .LBB61_941
9450; CHECK-RV32-NEXT:    j .LBB61_452
9451; CHECK-RV32-NEXT:  .LBB61_941: # %cond.load1693
9452; CHECK-RV32-NEXT:    lbu a3, 0(a0)
9453; CHECK-RV32-NEXT:    li a4, 512
9454; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
9455; CHECK-RV32-NEXT:    vmv.s.x v16, a3
9456; CHECK-RV32-NEXT:    li a3, 425
9457; CHECK-RV32-NEXT:    li a4, 424
9458; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
9459; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
9460; CHECK-RV32-NEXT:    addi a0, a0, 1
9461; CHECK-RV32-NEXT:    andi a3, a2, 512
9462; CHECK-RV32-NEXT:    bnez a3, .LBB61_942
9463; CHECK-RV32-NEXT:    j .LBB61_453
9464; CHECK-RV32-NEXT:  .LBB61_942: # %cond.load1697
9465; CHECK-RV32-NEXT:    lbu a3, 0(a0)
9466; CHECK-RV32-NEXT:    li a4, 512
9467; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
9468; CHECK-RV32-NEXT:    vmv.s.x v16, a3
9469; CHECK-RV32-NEXT:    li a3, 426
9470; CHECK-RV32-NEXT:    li a4, 425
9471; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
9472; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
9473; CHECK-RV32-NEXT:    addi a0, a0, 1
9474; CHECK-RV32-NEXT:    andi a3, a2, 1024
9475; CHECK-RV32-NEXT:    bnez a3, .LBB61_943
9476; CHECK-RV32-NEXT:    j .LBB61_454
9477; CHECK-RV32-NEXT:  .LBB61_943: # %cond.load1701
9478; CHECK-RV32-NEXT:    lbu a3, 0(a0)
9479; CHECK-RV32-NEXT:    li a4, 512
9480; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
9481; CHECK-RV32-NEXT:    vmv.s.x v16, a3
9482; CHECK-RV32-NEXT:    li a3, 427
9483; CHECK-RV32-NEXT:    li a4, 426
9484; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
9485; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
9486; CHECK-RV32-NEXT:    addi a0, a0, 1
9487; CHECK-RV32-NEXT:    slli a3, a2, 20
9488; CHECK-RV32-NEXT:    bltz a3, .LBB61_944
9489; CHECK-RV32-NEXT:    j .LBB61_455
9490; CHECK-RV32-NEXT:  .LBB61_944: # %cond.load1705
9491; CHECK-RV32-NEXT:    lbu a3, 0(a0)
9492; CHECK-RV32-NEXT:    li a4, 512
9493; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
9494; CHECK-RV32-NEXT:    vmv.s.x v16, a3
9495; CHECK-RV32-NEXT:    li a3, 428
9496; CHECK-RV32-NEXT:    li a4, 427
9497; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
9498; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
9499; CHECK-RV32-NEXT:    addi a0, a0, 1
9500; CHECK-RV32-NEXT:    slli a3, a2, 19
9501; CHECK-RV32-NEXT:    bltz a3, .LBB61_945
9502; CHECK-RV32-NEXT:    j .LBB61_456
9503; CHECK-RV32-NEXT:  .LBB61_945: # %cond.load1709
9504; CHECK-RV32-NEXT:    lbu a3, 0(a0)
9505; CHECK-RV32-NEXT:    li a4, 512
9506; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
9507; CHECK-RV32-NEXT:    vmv.s.x v16, a3
9508; CHECK-RV32-NEXT:    li a3, 429
9509; CHECK-RV32-NEXT:    li a4, 428
9510; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
9511; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
9512; CHECK-RV32-NEXT:    addi a0, a0, 1
9513; CHECK-RV32-NEXT:    slli a3, a2, 18
9514; CHECK-RV32-NEXT:    bltz a3, .LBB61_946
9515; CHECK-RV32-NEXT:    j .LBB61_457
9516; CHECK-RV32-NEXT:  .LBB61_946: # %cond.load1713
9517; CHECK-RV32-NEXT:    lbu a3, 0(a0)
9518; CHECK-RV32-NEXT:    li a4, 512
9519; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
9520; CHECK-RV32-NEXT:    vmv.s.x v16, a3
9521; CHECK-RV32-NEXT:    li a3, 430
9522; CHECK-RV32-NEXT:    li a4, 429
9523; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
9524; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
9525; CHECK-RV32-NEXT:    addi a0, a0, 1
9526; CHECK-RV32-NEXT:    slli a3, a2, 17
9527; CHECK-RV32-NEXT:    bltz a3, .LBB61_947
9528; CHECK-RV32-NEXT:    j .LBB61_458
9529; CHECK-RV32-NEXT:  .LBB61_947: # %cond.load1717
9530; CHECK-RV32-NEXT:    lbu a3, 0(a0)
9531; CHECK-RV32-NEXT:    li a4, 512
9532; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
9533; CHECK-RV32-NEXT:    vmv.s.x v16, a3
9534; CHECK-RV32-NEXT:    li a3, 431
9535; CHECK-RV32-NEXT:    li a4, 430
9536; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
9537; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
9538; CHECK-RV32-NEXT:    addi a0, a0, 1
9539; CHECK-RV32-NEXT:    slli a3, a2, 16
9540; CHECK-RV32-NEXT:    bltz a3, .LBB61_948
9541; CHECK-RV32-NEXT:    j .LBB61_459
9542; CHECK-RV32-NEXT:  .LBB61_948: # %cond.load1721
9543; CHECK-RV32-NEXT:    lbu a3, 0(a0)
9544; CHECK-RV32-NEXT:    li a4, 512
9545; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
9546; CHECK-RV32-NEXT:    vmv.s.x v16, a3
9547; CHECK-RV32-NEXT:    li a3, 432
9548; CHECK-RV32-NEXT:    li a4, 431
9549; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
9550; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
9551; CHECK-RV32-NEXT:    addi a0, a0, 1
9552; CHECK-RV32-NEXT:    slli a3, a2, 15
9553; CHECK-RV32-NEXT:    bltz a3, .LBB61_949
9554; CHECK-RV32-NEXT:    j .LBB61_460
9555; CHECK-RV32-NEXT:  .LBB61_949: # %cond.load1725
9556; CHECK-RV32-NEXT:    lbu a3, 0(a0)
9557; CHECK-RV32-NEXT:    li a4, 512
9558; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
9559; CHECK-RV32-NEXT:    vmv.s.x v16, a3
9560; CHECK-RV32-NEXT:    li a3, 433
9561; CHECK-RV32-NEXT:    li a4, 432
9562; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
9563; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
9564; CHECK-RV32-NEXT:    addi a0, a0, 1
9565; CHECK-RV32-NEXT:    slli a3, a2, 14
9566; CHECK-RV32-NEXT:    bltz a3, .LBB61_950
9567; CHECK-RV32-NEXT:    j .LBB61_461
9568; CHECK-RV32-NEXT:  .LBB61_950: # %cond.load1729
9569; CHECK-RV32-NEXT:    lbu a3, 0(a0)
9570; CHECK-RV32-NEXT:    li a4, 512
9571; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
9572; CHECK-RV32-NEXT:    vmv.s.x v16, a3
9573; CHECK-RV32-NEXT:    li a3, 434
9574; CHECK-RV32-NEXT:    li a4, 433
9575; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
9576; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
9577; CHECK-RV32-NEXT:    addi a0, a0, 1
9578; CHECK-RV32-NEXT:    slli a3, a2, 13
9579; CHECK-RV32-NEXT:    bltz a3, .LBB61_951
9580; CHECK-RV32-NEXT:    j .LBB61_462
9581; CHECK-RV32-NEXT:  .LBB61_951: # %cond.load1733
9582; CHECK-RV32-NEXT:    lbu a3, 0(a0)
9583; CHECK-RV32-NEXT:    li a4, 512
9584; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
9585; CHECK-RV32-NEXT:    vmv.s.x v16, a3
9586; CHECK-RV32-NEXT:    li a3, 435
9587; CHECK-RV32-NEXT:    li a4, 434
9588; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
9589; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
9590; CHECK-RV32-NEXT:    addi a0, a0, 1
9591; CHECK-RV32-NEXT:    slli a3, a2, 12
9592; CHECK-RV32-NEXT:    bltz a3, .LBB61_952
9593; CHECK-RV32-NEXT:    j .LBB61_463
9594; CHECK-RV32-NEXT:  .LBB61_952: # %cond.load1737
9595; CHECK-RV32-NEXT:    lbu a3, 0(a0)
9596; CHECK-RV32-NEXT:    li a4, 512
9597; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
9598; CHECK-RV32-NEXT:    vmv.s.x v16, a3
9599; CHECK-RV32-NEXT:    li a3, 436
9600; CHECK-RV32-NEXT:    li a4, 435
9601; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
9602; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
9603; CHECK-RV32-NEXT:    addi a0, a0, 1
9604; CHECK-RV32-NEXT:    slli a3, a2, 11
9605; CHECK-RV32-NEXT:    bltz a3, .LBB61_953
9606; CHECK-RV32-NEXT:    j .LBB61_464
9607; CHECK-RV32-NEXT:  .LBB61_953: # %cond.load1741
9608; CHECK-RV32-NEXT:    lbu a3, 0(a0)
9609; CHECK-RV32-NEXT:    li a4, 512
9610; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
9611; CHECK-RV32-NEXT:    vmv.s.x v16, a3
9612; CHECK-RV32-NEXT:    li a3, 437
9613; CHECK-RV32-NEXT:    li a4, 436
9614; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
9615; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
9616; CHECK-RV32-NEXT:    addi a0, a0, 1
9617; CHECK-RV32-NEXT:    slli a3, a2, 10
9618; CHECK-RV32-NEXT:    bltz a3, .LBB61_954
9619; CHECK-RV32-NEXT:    j .LBB61_465
9620; CHECK-RV32-NEXT:  .LBB61_954: # %cond.load1745
9621; CHECK-RV32-NEXT:    lbu a3, 0(a0)
9622; CHECK-RV32-NEXT:    li a4, 512
9623; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
9624; CHECK-RV32-NEXT:    vmv.s.x v16, a3
9625; CHECK-RV32-NEXT:    li a3, 438
9626; CHECK-RV32-NEXT:    li a4, 437
9627; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
9628; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
9629; CHECK-RV32-NEXT:    addi a0, a0, 1
9630; CHECK-RV32-NEXT:    slli a3, a2, 9
9631; CHECK-RV32-NEXT:    bltz a3, .LBB61_955
9632; CHECK-RV32-NEXT:    j .LBB61_466
9633; CHECK-RV32-NEXT:  .LBB61_955: # %cond.load1749
9634; CHECK-RV32-NEXT:    lbu a3, 0(a0)
9635; CHECK-RV32-NEXT:    li a4, 512
9636; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
9637; CHECK-RV32-NEXT:    vmv.s.x v16, a3
9638; CHECK-RV32-NEXT:    li a3, 439
9639; CHECK-RV32-NEXT:    li a4, 438
9640; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
9641; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
9642; CHECK-RV32-NEXT:    addi a0, a0, 1
9643; CHECK-RV32-NEXT:    slli a3, a2, 8
9644; CHECK-RV32-NEXT:    bltz a3, .LBB61_956
9645; CHECK-RV32-NEXT:    j .LBB61_467
9646; CHECK-RV32-NEXT:  .LBB61_956: # %cond.load1753
9647; CHECK-RV32-NEXT:    lbu a3, 0(a0)
9648; CHECK-RV32-NEXT:    li a4, 512
9649; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
9650; CHECK-RV32-NEXT:    vmv.s.x v16, a3
9651; CHECK-RV32-NEXT:    li a3, 440
9652; CHECK-RV32-NEXT:    li a4, 439
9653; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
9654; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
9655; CHECK-RV32-NEXT:    addi a0, a0, 1
9656; CHECK-RV32-NEXT:    slli a3, a2, 7
9657; CHECK-RV32-NEXT:    bltz a3, .LBB61_957
9658; CHECK-RV32-NEXT:    j .LBB61_468
9659; CHECK-RV32-NEXT:  .LBB61_957: # %cond.load1757
9660; CHECK-RV32-NEXT:    lbu a3, 0(a0)
9661; CHECK-RV32-NEXT:    li a4, 512
9662; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
9663; CHECK-RV32-NEXT:    vmv.s.x v16, a3
9664; CHECK-RV32-NEXT:    li a3, 441
9665; CHECK-RV32-NEXT:    li a4, 440
9666; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
9667; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
9668; CHECK-RV32-NEXT:    addi a0, a0, 1
9669; CHECK-RV32-NEXT:    slli a3, a2, 6
9670; CHECK-RV32-NEXT:    bltz a3, .LBB61_958
9671; CHECK-RV32-NEXT:    j .LBB61_469
9672; CHECK-RV32-NEXT:  .LBB61_958: # %cond.load1761
9673; CHECK-RV32-NEXT:    lbu a3, 0(a0)
9674; CHECK-RV32-NEXT:    li a4, 512
9675; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
9676; CHECK-RV32-NEXT:    vmv.s.x v16, a3
9677; CHECK-RV32-NEXT:    li a3, 442
9678; CHECK-RV32-NEXT:    li a4, 441
9679; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
9680; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
9681; CHECK-RV32-NEXT:    addi a0, a0, 1
9682; CHECK-RV32-NEXT:    slli a3, a2, 5
9683; CHECK-RV32-NEXT:    bltz a3, .LBB61_959
9684; CHECK-RV32-NEXT:    j .LBB61_470
9685; CHECK-RV32-NEXT:  .LBB61_959: # %cond.load1765
9686; CHECK-RV32-NEXT:    lbu a3, 0(a0)
9687; CHECK-RV32-NEXT:    li a4, 512
9688; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
9689; CHECK-RV32-NEXT:    vmv.s.x v16, a3
9690; CHECK-RV32-NEXT:    li a3, 443
9691; CHECK-RV32-NEXT:    li a4, 442
9692; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
9693; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
9694; CHECK-RV32-NEXT:    addi a0, a0, 1
9695; CHECK-RV32-NEXT:    slli a3, a2, 4
9696; CHECK-RV32-NEXT:    bltz a3, .LBB61_960
9697; CHECK-RV32-NEXT:    j .LBB61_471
9698; CHECK-RV32-NEXT:  .LBB61_960: # %cond.load1769
9699; CHECK-RV32-NEXT:    lbu a3, 0(a0)
9700; CHECK-RV32-NEXT:    li a4, 512
9701; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
9702; CHECK-RV32-NEXT:    vmv.s.x v16, a3
9703; CHECK-RV32-NEXT:    li a3, 444
9704; CHECK-RV32-NEXT:    li a4, 443
9705; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
9706; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
9707; CHECK-RV32-NEXT:    addi a0, a0, 1
9708; CHECK-RV32-NEXT:    slli a3, a2, 3
9709; CHECK-RV32-NEXT:    bltz a3, .LBB61_961
9710; CHECK-RV32-NEXT:    j .LBB61_472
9711; CHECK-RV32-NEXT:  .LBB61_961: # %cond.load1773
9712; CHECK-RV32-NEXT:    lbu a3, 0(a0)
9713; CHECK-RV32-NEXT:    li a4, 512
9714; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
9715; CHECK-RV32-NEXT:    vmv.s.x v16, a3
9716; CHECK-RV32-NEXT:    li a3, 445
9717; CHECK-RV32-NEXT:    li a4, 444
9718; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m8, tu, ma
9719; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a4
9720; CHECK-RV32-NEXT:    addi a0, a0, 1
9721; CHECK-RV32-NEXT:    slli a3, a2, 2
9722; CHECK-RV32-NEXT:    bgez a3, .LBB61_1038
9723; CHECK-RV32-NEXT:    j .LBB61_473
9724; CHECK-RV32-NEXT:  .LBB61_1038: # %cond.load1773
9725; CHECK-RV32-NEXT:    j .LBB61_474
9726; CHECK-RV32-NEXT:  .LBB61_962: # %cond.load1785
9727; CHECK-RV32-NEXT:    lbu a2, 0(a0)
9728; CHECK-RV32-NEXT:    vmv.s.x v24, a2
9729; CHECK-RV32-NEXT:    li a2, 448
9730; CHECK-RV32-NEXT:    li a4, 447
9731; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
9732; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
9733; CHECK-RV32-NEXT:    addi a0, a0, 1
9734; CHECK-RV32-NEXT:    andi a2, a3, 1
9735; CHECK-RV32-NEXT:    bnez a2, .LBB61_963
9736; CHECK-RV32-NEXT:    j .LBB61_478
9737; CHECK-RV32-NEXT:  .LBB61_963: # %cond.load1789
9738; CHECK-RV32-NEXT:    lbu a2, 0(a0)
9739; CHECK-RV32-NEXT:    li a4, 512
9740; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
9741; CHECK-RV32-NEXT:    vmv.s.x v24, a2
9742; CHECK-RV32-NEXT:    li a2, 449
9743; CHECK-RV32-NEXT:    li a4, 448
9744; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
9745; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
9746; CHECK-RV32-NEXT:    addi a0, a0, 1
9747; CHECK-RV32-NEXT:    andi a2, a3, 2
9748; CHECK-RV32-NEXT:    bnez a2, .LBB61_964
9749; CHECK-RV32-NEXT:    j .LBB61_479
9750; CHECK-RV32-NEXT:  .LBB61_964: # %cond.load1793
9751; CHECK-RV32-NEXT:    lbu a2, 0(a0)
9752; CHECK-RV32-NEXT:    li a4, 512
9753; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
9754; CHECK-RV32-NEXT:    vmv.s.x v24, a2
9755; CHECK-RV32-NEXT:    li a2, 450
9756; CHECK-RV32-NEXT:    li a4, 449
9757; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
9758; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
9759; CHECK-RV32-NEXT:    addi a0, a0, 1
9760; CHECK-RV32-NEXT:    andi a2, a3, 4
9761; CHECK-RV32-NEXT:    bnez a2, .LBB61_965
9762; CHECK-RV32-NEXT:    j .LBB61_480
9763; CHECK-RV32-NEXT:  .LBB61_965: # %cond.load1797
9764; CHECK-RV32-NEXT:    lbu a2, 0(a0)
9765; CHECK-RV32-NEXT:    li a4, 512
9766; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
9767; CHECK-RV32-NEXT:    vmv.s.x v24, a2
9768; CHECK-RV32-NEXT:    li a2, 451
9769; CHECK-RV32-NEXT:    li a4, 450
9770; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
9771; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
9772; CHECK-RV32-NEXT:    addi a0, a0, 1
9773; CHECK-RV32-NEXT:    andi a2, a3, 8
9774; CHECK-RV32-NEXT:    bnez a2, .LBB61_966
9775; CHECK-RV32-NEXT:    j .LBB61_481
9776; CHECK-RV32-NEXT:  .LBB61_966: # %cond.load1801
9777; CHECK-RV32-NEXT:    lbu a2, 0(a0)
9778; CHECK-RV32-NEXT:    li a4, 512
9779; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
9780; CHECK-RV32-NEXT:    vmv.s.x v24, a2
9781; CHECK-RV32-NEXT:    li a2, 452
9782; CHECK-RV32-NEXT:    li a4, 451
9783; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
9784; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
9785; CHECK-RV32-NEXT:    addi a0, a0, 1
9786; CHECK-RV32-NEXT:    andi a2, a3, 16
9787; CHECK-RV32-NEXT:    bnez a2, .LBB61_967
9788; CHECK-RV32-NEXT:    j .LBB61_482
9789; CHECK-RV32-NEXT:  .LBB61_967: # %cond.load1805
9790; CHECK-RV32-NEXT:    lbu a2, 0(a0)
9791; CHECK-RV32-NEXT:    li a4, 512
9792; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
9793; CHECK-RV32-NEXT:    vmv.s.x v24, a2
9794; CHECK-RV32-NEXT:    li a2, 453
9795; CHECK-RV32-NEXT:    li a4, 452
9796; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
9797; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
9798; CHECK-RV32-NEXT:    addi a0, a0, 1
9799; CHECK-RV32-NEXT:    andi a2, a3, 32
9800; CHECK-RV32-NEXT:    bnez a2, .LBB61_968
9801; CHECK-RV32-NEXT:    j .LBB61_483
9802; CHECK-RV32-NEXT:  .LBB61_968: # %cond.load1809
9803; CHECK-RV32-NEXT:    lbu a2, 0(a0)
9804; CHECK-RV32-NEXT:    li a4, 512
9805; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
9806; CHECK-RV32-NEXT:    vmv.s.x v24, a2
9807; CHECK-RV32-NEXT:    li a2, 454
9808; CHECK-RV32-NEXT:    li a4, 453
9809; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
9810; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
9811; CHECK-RV32-NEXT:    addi a0, a0, 1
9812; CHECK-RV32-NEXT:    andi a2, a3, 64
9813; CHECK-RV32-NEXT:    bnez a2, .LBB61_969
9814; CHECK-RV32-NEXT:    j .LBB61_484
9815; CHECK-RV32-NEXT:  .LBB61_969: # %cond.load1813
9816; CHECK-RV32-NEXT:    lbu a2, 0(a0)
9817; CHECK-RV32-NEXT:    li a4, 512
9818; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
9819; CHECK-RV32-NEXT:    vmv.s.x v24, a2
9820; CHECK-RV32-NEXT:    li a2, 455
9821; CHECK-RV32-NEXT:    li a4, 454
9822; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
9823; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
9824; CHECK-RV32-NEXT:    addi a0, a0, 1
9825; CHECK-RV32-NEXT:    andi a2, a3, 128
9826; CHECK-RV32-NEXT:    bnez a2, .LBB61_970
9827; CHECK-RV32-NEXT:    j .LBB61_485
9828; CHECK-RV32-NEXT:  .LBB61_970: # %cond.load1817
9829; CHECK-RV32-NEXT:    lbu a2, 0(a0)
9830; CHECK-RV32-NEXT:    li a4, 512
9831; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
9832; CHECK-RV32-NEXT:    vmv.s.x v24, a2
9833; CHECK-RV32-NEXT:    li a2, 456
9834; CHECK-RV32-NEXT:    li a4, 455
9835; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
9836; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
9837; CHECK-RV32-NEXT:    addi a0, a0, 1
9838; CHECK-RV32-NEXT:    andi a2, a3, 256
9839; CHECK-RV32-NEXT:    bnez a2, .LBB61_971
9840; CHECK-RV32-NEXT:    j .LBB61_486
9841; CHECK-RV32-NEXT:  .LBB61_971: # %cond.load1821
9842; CHECK-RV32-NEXT:    lbu a2, 0(a0)
9843; CHECK-RV32-NEXT:    li a4, 512
9844; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
9845; CHECK-RV32-NEXT:    vmv.s.x v24, a2
9846; CHECK-RV32-NEXT:    li a2, 457
9847; CHECK-RV32-NEXT:    li a4, 456
9848; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
9849; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
9850; CHECK-RV32-NEXT:    addi a0, a0, 1
9851; CHECK-RV32-NEXT:    andi a2, a3, 512
9852; CHECK-RV32-NEXT:    bnez a2, .LBB61_972
9853; CHECK-RV32-NEXT:    j .LBB61_487
9854; CHECK-RV32-NEXT:  .LBB61_972: # %cond.load1825
9855; CHECK-RV32-NEXT:    lbu a2, 0(a0)
9856; CHECK-RV32-NEXT:    li a4, 512
9857; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
9858; CHECK-RV32-NEXT:    vmv.s.x v24, a2
9859; CHECK-RV32-NEXT:    li a2, 458
9860; CHECK-RV32-NEXT:    li a4, 457
9861; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
9862; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
9863; CHECK-RV32-NEXT:    addi a0, a0, 1
9864; CHECK-RV32-NEXT:    andi a2, a3, 1024
9865; CHECK-RV32-NEXT:    bnez a2, .LBB61_973
9866; CHECK-RV32-NEXT:    j .LBB61_488
9867; CHECK-RV32-NEXT:  .LBB61_973: # %cond.load1829
9868; CHECK-RV32-NEXT:    lbu a2, 0(a0)
9869; CHECK-RV32-NEXT:    li a4, 512
9870; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
9871; CHECK-RV32-NEXT:    vmv.s.x v24, a2
9872; CHECK-RV32-NEXT:    li a2, 459
9873; CHECK-RV32-NEXT:    li a4, 458
9874; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
9875; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
9876; CHECK-RV32-NEXT:    addi a0, a0, 1
9877; CHECK-RV32-NEXT:    slli a2, a3, 20
9878; CHECK-RV32-NEXT:    bltz a2, .LBB61_974
9879; CHECK-RV32-NEXT:    j .LBB61_489
9880; CHECK-RV32-NEXT:  .LBB61_974: # %cond.load1833
9881; CHECK-RV32-NEXT:    lbu a2, 0(a0)
9882; CHECK-RV32-NEXT:    li a4, 512
9883; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
9884; CHECK-RV32-NEXT:    vmv.s.x v24, a2
9885; CHECK-RV32-NEXT:    li a2, 460
9886; CHECK-RV32-NEXT:    li a4, 459
9887; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
9888; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
9889; CHECK-RV32-NEXT:    addi a0, a0, 1
9890; CHECK-RV32-NEXT:    slli a2, a3, 19
9891; CHECK-RV32-NEXT:    bltz a2, .LBB61_975
9892; CHECK-RV32-NEXT:    j .LBB61_490
9893; CHECK-RV32-NEXT:  .LBB61_975: # %cond.load1837
9894; CHECK-RV32-NEXT:    lbu a2, 0(a0)
9895; CHECK-RV32-NEXT:    li a4, 512
9896; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
9897; CHECK-RV32-NEXT:    vmv.s.x v24, a2
9898; CHECK-RV32-NEXT:    li a2, 461
9899; CHECK-RV32-NEXT:    li a4, 460
9900; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
9901; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
9902; CHECK-RV32-NEXT:    addi a0, a0, 1
9903; CHECK-RV32-NEXT:    slli a2, a3, 18
9904; CHECK-RV32-NEXT:    bltz a2, .LBB61_976
9905; CHECK-RV32-NEXT:    j .LBB61_491
9906; CHECK-RV32-NEXT:  .LBB61_976: # %cond.load1841
9907; CHECK-RV32-NEXT:    lbu a2, 0(a0)
9908; CHECK-RV32-NEXT:    li a4, 512
9909; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
9910; CHECK-RV32-NEXT:    vmv.s.x v24, a2
9911; CHECK-RV32-NEXT:    li a2, 462
9912; CHECK-RV32-NEXT:    li a4, 461
9913; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
9914; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
9915; CHECK-RV32-NEXT:    addi a0, a0, 1
9916; CHECK-RV32-NEXT:    slli a2, a3, 17
9917; CHECK-RV32-NEXT:    bltz a2, .LBB61_977
9918; CHECK-RV32-NEXT:    j .LBB61_492
9919; CHECK-RV32-NEXT:  .LBB61_977: # %cond.load1845
9920; CHECK-RV32-NEXT:    lbu a2, 0(a0)
9921; CHECK-RV32-NEXT:    li a4, 512
9922; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
9923; CHECK-RV32-NEXT:    vmv.s.x v24, a2
9924; CHECK-RV32-NEXT:    li a2, 463
9925; CHECK-RV32-NEXT:    li a4, 462
9926; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
9927; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
9928; CHECK-RV32-NEXT:    addi a0, a0, 1
9929; CHECK-RV32-NEXT:    slli a2, a3, 16
9930; CHECK-RV32-NEXT:    bltz a2, .LBB61_978
9931; CHECK-RV32-NEXT:    j .LBB61_493
9932; CHECK-RV32-NEXT:  .LBB61_978: # %cond.load1849
9933; CHECK-RV32-NEXT:    lbu a2, 0(a0)
9934; CHECK-RV32-NEXT:    li a4, 512
9935; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
9936; CHECK-RV32-NEXT:    vmv.s.x v24, a2
9937; CHECK-RV32-NEXT:    li a2, 464
9938; CHECK-RV32-NEXT:    li a4, 463
9939; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
9940; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
9941; CHECK-RV32-NEXT:    addi a0, a0, 1
9942; CHECK-RV32-NEXT:    slli a2, a3, 15
9943; CHECK-RV32-NEXT:    bltz a2, .LBB61_979
9944; CHECK-RV32-NEXT:    j .LBB61_494
9945; CHECK-RV32-NEXT:  .LBB61_979: # %cond.load1853
9946; CHECK-RV32-NEXT:    lbu a2, 0(a0)
9947; CHECK-RV32-NEXT:    li a4, 512
9948; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
9949; CHECK-RV32-NEXT:    vmv.s.x v24, a2
9950; CHECK-RV32-NEXT:    li a2, 465
9951; CHECK-RV32-NEXT:    li a4, 464
9952; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
9953; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
9954; CHECK-RV32-NEXT:    addi a0, a0, 1
9955; CHECK-RV32-NEXT:    slli a2, a3, 14
9956; CHECK-RV32-NEXT:    bltz a2, .LBB61_980
9957; CHECK-RV32-NEXT:    j .LBB61_495
9958; CHECK-RV32-NEXT:  .LBB61_980: # %cond.load1857
9959; CHECK-RV32-NEXT:    lbu a2, 0(a0)
9960; CHECK-RV32-NEXT:    li a4, 512
9961; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
9962; CHECK-RV32-NEXT:    vmv.s.x v24, a2
9963; CHECK-RV32-NEXT:    li a2, 466
9964; CHECK-RV32-NEXT:    li a4, 465
9965; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
9966; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
9967; CHECK-RV32-NEXT:    addi a0, a0, 1
9968; CHECK-RV32-NEXT:    slli a2, a3, 13
9969; CHECK-RV32-NEXT:    bltz a2, .LBB61_981
9970; CHECK-RV32-NEXT:    j .LBB61_496
9971; CHECK-RV32-NEXT:  .LBB61_981: # %cond.load1861
9972; CHECK-RV32-NEXT:    lbu a2, 0(a0)
9973; CHECK-RV32-NEXT:    li a4, 512
9974; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
9975; CHECK-RV32-NEXT:    vmv.s.x v24, a2
9976; CHECK-RV32-NEXT:    li a2, 467
9977; CHECK-RV32-NEXT:    li a4, 466
9978; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
9979; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
9980; CHECK-RV32-NEXT:    addi a0, a0, 1
9981; CHECK-RV32-NEXT:    slli a2, a3, 12
9982; CHECK-RV32-NEXT:    bltz a2, .LBB61_982
9983; CHECK-RV32-NEXT:    j .LBB61_497
9984; CHECK-RV32-NEXT:  .LBB61_982: # %cond.load1865
9985; CHECK-RV32-NEXT:    lbu a2, 0(a0)
9986; CHECK-RV32-NEXT:    li a4, 512
9987; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
9988; CHECK-RV32-NEXT:    vmv.s.x v24, a2
9989; CHECK-RV32-NEXT:    li a2, 468
9990; CHECK-RV32-NEXT:    li a4, 467
9991; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
9992; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
9993; CHECK-RV32-NEXT:    addi a0, a0, 1
9994; CHECK-RV32-NEXT:    slli a2, a3, 11
9995; CHECK-RV32-NEXT:    bltz a2, .LBB61_983
9996; CHECK-RV32-NEXT:    j .LBB61_498
9997; CHECK-RV32-NEXT:  .LBB61_983: # %cond.load1869
9998; CHECK-RV32-NEXT:    lbu a2, 0(a0)
9999; CHECK-RV32-NEXT:    li a4, 512
10000; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
10001; CHECK-RV32-NEXT:    vmv.s.x v24, a2
10002; CHECK-RV32-NEXT:    li a2, 469
10003; CHECK-RV32-NEXT:    li a4, 468
10004; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
10005; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
10006; CHECK-RV32-NEXT:    addi a0, a0, 1
10007; CHECK-RV32-NEXT:    slli a2, a3, 10
10008; CHECK-RV32-NEXT:    bltz a2, .LBB61_984
10009; CHECK-RV32-NEXT:    j .LBB61_499
10010; CHECK-RV32-NEXT:  .LBB61_984: # %cond.load1873
10011; CHECK-RV32-NEXT:    lbu a2, 0(a0)
10012; CHECK-RV32-NEXT:    li a4, 512
10013; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
10014; CHECK-RV32-NEXT:    vmv.s.x v24, a2
10015; CHECK-RV32-NEXT:    li a2, 470
10016; CHECK-RV32-NEXT:    li a4, 469
10017; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
10018; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
10019; CHECK-RV32-NEXT:    addi a0, a0, 1
10020; CHECK-RV32-NEXT:    slli a2, a3, 9
10021; CHECK-RV32-NEXT:    bltz a2, .LBB61_985
10022; CHECK-RV32-NEXT:    j .LBB61_500
10023; CHECK-RV32-NEXT:  .LBB61_985: # %cond.load1877
10024; CHECK-RV32-NEXT:    lbu a2, 0(a0)
10025; CHECK-RV32-NEXT:    li a4, 512
10026; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
10027; CHECK-RV32-NEXT:    vmv.s.x v24, a2
10028; CHECK-RV32-NEXT:    li a2, 471
10029; CHECK-RV32-NEXT:    li a4, 470
10030; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
10031; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
10032; CHECK-RV32-NEXT:    addi a0, a0, 1
10033; CHECK-RV32-NEXT:    slli a2, a3, 8
10034; CHECK-RV32-NEXT:    bltz a2, .LBB61_986
10035; CHECK-RV32-NEXT:    j .LBB61_501
10036; CHECK-RV32-NEXT:  .LBB61_986: # %cond.load1881
10037; CHECK-RV32-NEXT:    lbu a2, 0(a0)
10038; CHECK-RV32-NEXT:    li a4, 512
10039; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
10040; CHECK-RV32-NEXT:    vmv.s.x v24, a2
10041; CHECK-RV32-NEXT:    li a2, 472
10042; CHECK-RV32-NEXT:    li a4, 471
10043; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
10044; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
10045; CHECK-RV32-NEXT:    addi a0, a0, 1
10046; CHECK-RV32-NEXT:    slli a2, a3, 7
10047; CHECK-RV32-NEXT:    bltz a2, .LBB61_987
10048; CHECK-RV32-NEXT:    j .LBB61_502
10049; CHECK-RV32-NEXT:  .LBB61_987: # %cond.load1885
10050; CHECK-RV32-NEXT:    lbu a2, 0(a0)
10051; CHECK-RV32-NEXT:    li a4, 512
10052; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
10053; CHECK-RV32-NEXT:    vmv.s.x v24, a2
10054; CHECK-RV32-NEXT:    li a2, 473
10055; CHECK-RV32-NEXT:    li a4, 472
10056; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
10057; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
10058; CHECK-RV32-NEXT:    addi a0, a0, 1
10059; CHECK-RV32-NEXT:    slli a2, a3, 6
10060; CHECK-RV32-NEXT:    bltz a2, .LBB61_988
10061; CHECK-RV32-NEXT:    j .LBB61_503
10062; CHECK-RV32-NEXT:  .LBB61_988: # %cond.load1889
10063; CHECK-RV32-NEXT:    lbu a2, 0(a0)
10064; CHECK-RV32-NEXT:    li a4, 512
10065; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
10066; CHECK-RV32-NEXT:    vmv.s.x v24, a2
10067; CHECK-RV32-NEXT:    li a2, 474
10068; CHECK-RV32-NEXT:    li a4, 473
10069; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
10070; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
10071; CHECK-RV32-NEXT:    addi a0, a0, 1
10072; CHECK-RV32-NEXT:    slli a2, a3, 5
10073; CHECK-RV32-NEXT:    bltz a2, .LBB61_989
10074; CHECK-RV32-NEXT:    j .LBB61_504
10075; CHECK-RV32-NEXT:  .LBB61_989: # %cond.load1893
10076; CHECK-RV32-NEXT:    lbu a2, 0(a0)
10077; CHECK-RV32-NEXT:    li a4, 512
10078; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
10079; CHECK-RV32-NEXT:    vmv.s.x v24, a2
10080; CHECK-RV32-NEXT:    li a2, 475
10081; CHECK-RV32-NEXT:    li a4, 474
10082; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
10083; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
10084; CHECK-RV32-NEXT:    addi a0, a0, 1
10085; CHECK-RV32-NEXT:    slli a2, a3, 4
10086; CHECK-RV32-NEXT:    bltz a2, .LBB61_990
10087; CHECK-RV32-NEXT:    j .LBB61_505
10088; CHECK-RV32-NEXT:  .LBB61_990: # %cond.load1897
10089; CHECK-RV32-NEXT:    lbu a2, 0(a0)
10090; CHECK-RV32-NEXT:    li a4, 512
10091; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
10092; CHECK-RV32-NEXT:    vmv.s.x v24, a2
10093; CHECK-RV32-NEXT:    li a2, 476
10094; CHECK-RV32-NEXT:    li a4, 475
10095; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
10096; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
10097; CHECK-RV32-NEXT:    addi a0, a0, 1
10098; CHECK-RV32-NEXT:    slli a2, a3, 3
10099; CHECK-RV32-NEXT:    bltz a2, .LBB61_991
10100; CHECK-RV32-NEXT:    j .LBB61_506
10101; CHECK-RV32-NEXT:  .LBB61_991: # %cond.load1901
10102; CHECK-RV32-NEXT:    lbu a2, 0(a0)
10103; CHECK-RV32-NEXT:    li a4, 512
10104; CHECK-RV32-NEXT:    vsetvli zero, a4, e8, m1, ta, ma
10105; CHECK-RV32-NEXT:    vmv.s.x v24, a2
10106; CHECK-RV32-NEXT:    li a2, 477
10107; CHECK-RV32-NEXT:    li a4, 476
10108; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
10109; CHECK-RV32-NEXT:    vslideup.vx v8, v24, a4
10110; CHECK-RV32-NEXT:    addi a0, a0, 1
10111; CHECK-RV32-NEXT:    slli a2, a3, 2
10112; CHECK-RV32-NEXT:    bgez a2, .LBB61_1039
10113; CHECK-RV32-NEXT:    j .LBB61_507
10114; CHECK-RV32-NEXT:  .LBB61_1039: # %cond.load1901
10115; CHECK-RV32-NEXT:    j .LBB61_508
10116; CHECK-RV32-NEXT:  .LBB61_992: # %cond.load1913
10117; CHECK-RV32-NEXT:    lbu a2, 0(a0)
10118; CHECK-RV32-NEXT:    vmv.s.x v16, a2
10119; CHECK-RV32-NEXT:    li a2, 480
10120; CHECK-RV32-NEXT:    li a3, 479
10121; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
10122; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a3
10123; CHECK-RV32-NEXT:    addi a0, a0, 1
10124; CHECK-RV32-NEXT:    andi a2, a1, 1
10125; CHECK-RV32-NEXT:    bnez a2, .LBB61_993
10126; CHECK-RV32-NEXT:    j .LBB61_512
10127; CHECK-RV32-NEXT:  .LBB61_993: # %cond.load1917
10128; CHECK-RV32-NEXT:    lbu a2, 0(a0)
10129; CHECK-RV32-NEXT:    li a3, 512
10130; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
10131; CHECK-RV32-NEXT:    vmv.s.x v16, a2
10132; CHECK-RV32-NEXT:    li a2, 481
10133; CHECK-RV32-NEXT:    li a3, 480
10134; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
10135; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a3
10136; CHECK-RV32-NEXT:    addi a0, a0, 1
10137; CHECK-RV32-NEXT:    andi a2, a1, 2
10138; CHECK-RV32-NEXT:    bnez a2, .LBB61_994
10139; CHECK-RV32-NEXT:    j .LBB61_513
10140; CHECK-RV32-NEXT:  .LBB61_994: # %cond.load1921
10141; CHECK-RV32-NEXT:    lbu a2, 0(a0)
10142; CHECK-RV32-NEXT:    li a3, 512
10143; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
10144; CHECK-RV32-NEXT:    vmv.s.x v16, a2
10145; CHECK-RV32-NEXT:    li a2, 482
10146; CHECK-RV32-NEXT:    li a3, 481
10147; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
10148; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a3
10149; CHECK-RV32-NEXT:    addi a0, a0, 1
10150; CHECK-RV32-NEXT:    andi a2, a1, 4
10151; CHECK-RV32-NEXT:    bnez a2, .LBB61_995
10152; CHECK-RV32-NEXT:    j .LBB61_514
10153; CHECK-RV32-NEXT:  .LBB61_995: # %cond.load1925
10154; CHECK-RV32-NEXT:    lbu a2, 0(a0)
10155; CHECK-RV32-NEXT:    li a3, 512
10156; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
10157; CHECK-RV32-NEXT:    vmv.s.x v16, a2
10158; CHECK-RV32-NEXT:    li a2, 483
10159; CHECK-RV32-NEXT:    li a3, 482
10160; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
10161; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a3
10162; CHECK-RV32-NEXT:    addi a0, a0, 1
10163; CHECK-RV32-NEXT:    andi a2, a1, 8
10164; CHECK-RV32-NEXT:    bnez a2, .LBB61_996
10165; CHECK-RV32-NEXT:    j .LBB61_515
10166; CHECK-RV32-NEXT:  .LBB61_996: # %cond.load1929
10167; CHECK-RV32-NEXT:    lbu a2, 0(a0)
10168; CHECK-RV32-NEXT:    li a3, 512
10169; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
10170; CHECK-RV32-NEXT:    vmv.s.x v16, a2
10171; CHECK-RV32-NEXT:    li a2, 484
10172; CHECK-RV32-NEXT:    li a3, 483
10173; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
10174; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a3
10175; CHECK-RV32-NEXT:    addi a0, a0, 1
10176; CHECK-RV32-NEXT:    andi a2, a1, 16
10177; CHECK-RV32-NEXT:    bnez a2, .LBB61_997
10178; CHECK-RV32-NEXT:    j .LBB61_516
10179; CHECK-RV32-NEXT:  .LBB61_997: # %cond.load1933
10180; CHECK-RV32-NEXT:    lbu a2, 0(a0)
10181; CHECK-RV32-NEXT:    li a3, 512
10182; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
10183; CHECK-RV32-NEXT:    vmv.s.x v16, a2
10184; CHECK-RV32-NEXT:    li a2, 485
10185; CHECK-RV32-NEXT:    li a3, 484
10186; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
10187; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a3
10188; CHECK-RV32-NEXT:    addi a0, a0, 1
10189; CHECK-RV32-NEXT:    andi a2, a1, 32
10190; CHECK-RV32-NEXT:    bnez a2, .LBB61_998
10191; CHECK-RV32-NEXT:    j .LBB61_517
10192; CHECK-RV32-NEXT:  .LBB61_998: # %cond.load1937
10193; CHECK-RV32-NEXT:    lbu a2, 0(a0)
10194; CHECK-RV32-NEXT:    li a3, 512
10195; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
10196; CHECK-RV32-NEXT:    vmv.s.x v16, a2
10197; CHECK-RV32-NEXT:    li a2, 486
10198; CHECK-RV32-NEXT:    li a3, 485
10199; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
10200; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a3
10201; CHECK-RV32-NEXT:    addi a0, a0, 1
10202; CHECK-RV32-NEXT:    andi a2, a1, 64
10203; CHECK-RV32-NEXT:    bnez a2, .LBB61_999
10204; CHECK-RV32-NEXT:    j .LBB61_518
10205; CHECK-RV32-NEXT:  .LBB61_999: # %cond.load1941
10206; CHECK-RV32-NEXT:    lbu a2, 0(a0)
10207; CHECK-RV32-NEXT:    li a3, 512
10208; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
10209; CHECK-RV32-NEXT:    vmv.s.x v16, a2
10210; CHECK-RV32-NEXT:    li a2, 487
10211; CHECK-RV32-NEXT:    li a3, 486
10212; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
10213; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a3
10214; CHECK-RV32-NEXT:    addi a0, a0, 1
10215; CHECK-RV32-NEXT:    andi a2, a1, 128
10216; CHECK-RV32-NEXT:    bnez a2, .LBB61_1000
10217; CHECK-RV32-NEXT:    j .LBB61_519
10218; CHECK-RV32-NEXT:  .LBB61_1000: # %cond.load1945
10219; CHECK-RV32-NEXT:    lbu a2, 0(a0)
10220; CHECK-RV32-NEXT:    li a3, 512
10221; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
10222; CHECK-RV32-NEXT:    vmv.s.x v16, a2
10223; CHECK-RV32-NEXT:    li a2, 488
10224; CHECK-RV32-NEXT:    li a3, 487
10225; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
10226; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a3
10227; CHECK-RV32-NEXT:    addi a0, a0, 1
10228; CHECK-RV32-NEXT:    andi a2, a1, 256
10229; CHECK-RV32-NEXT:    bnez a2, .LBB61_1001
10230; CHECK-RV32-NEXT:    j .LBB61_520
10231; CHECK-RV32-NEXT:  .LBB61_1001: # %cond.load1949
10232; CHECK-RV32-NEXT:    lbu a2, 0(a0)
10233; CHECK-RV32-NEXT:    li a3, 512
10234; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
10235; CHECK-RV32-NEXT:    vmv.s.x v16, a2
10236; CHECK-RV32-NEXT:    li a2, 489
10237; CHECK-RV32-NEXT:    li a3, 488
10238; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
10239; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a3
10240; CHECK-RV32-NEXT:    addi a0, a0, 1
10241; CHECK-RV32-NEXT:    andi a2, a1, 512
10242; CHECK-RV32-NEXT:    bnez a2, .LBB61_1002
10243; CHECK-RV32-NEXT:    j .LBB61_521
10244; CHECK-RV32-NEXT:  .LBB61_1002: # %cond.load1953
10245; CHECK-RV32-NEXT:    lbu a2, 0(a0)
10246; CHECK-RV32-NEXT:    li a3, 512
10247; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
10248; CHECK-RV32-NEXT:    vmv.s.x v16, a2
10249; CHECK-RV32-NEXT:    li a2, 490
10250; CHECK-RV32-NEXT:    li a3, 489
10251; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
10252; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a3
10253; CHECK-RV32-NEXT:    addi a0, a0, 1
10254; CHECK-RV32-NEXT:    andi a2, a1, 1024
10255; CHECK-RV32-NEXT:    bnez a2, .LBB61_1003
10256; CHECK-RV32-NEXT:    j .LBB61_522
10257; CHECK-RV32-NEXT:  .LBB61_1003: # %cond.load1957
10258; CHECK-RV32-NEXT:    lbu a2, 0(a0)
10259; CHECK-RV32-NEXT:    li a3, 512
10260; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
10261; CHECK-RV32-NEXT:    vmv.s.x v16, a2
10262; CHECK-RV32-NEXT:    li a2, 491
10263; CHECK-RV32-NEXT:    li a3, 490
10264; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
10265; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a3
10266; CHECK-RV32-NEXT:    addi a0, a0, 1
10267; CHECK-RV32-NEXT:    slli a2, a1, 20
10268; CHECK-RV32-NEXT:    bltz a2, .LBB61_1004
10269; CHECK-RV32-NEXT:    j .LBB61_523
10270; CHECK-RV32-NEXT:  .LBB61_1004: # %cond.load1961
10271; CHECK-RV32-NEXT:    lbu a2, 0(a0)
10272; CHECK-RV32-NEXT:    li a3, 512
10273; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
10274; CHECK-RV32-NEXT:    vmv.s.x v16, a2
10275; CHECK-RV32-NEXT:    li a2, 492
10276; CHECK-RV32-NEXT:    li a3, 491
10277; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
10278; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a3
10279; CHECK-RV32-NEXT:    addi a0, a0, 1
10280; CHECK-RV32-NEXT:    slli a2, a1, 19
10281; CHECK-RV32-NEXT:    bltz a2, .LBB61_1005
10282; CHECK-RV32-NEXT:    j .LBB61_524
10283; CHECK-RV32-NEXT:  .LBB61_1005: # %cond.load1965
10284; CHECK-RV32-NEXT:    lbu a2, 0(a0)
10285; CHECK-RV32-NEXT:    li a3, 512
10286; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
10287; CHECK-RV32-NEXT:    vmv.s.x v16, a2
10288; CHECK-RV32-NEXT:    li a2, 493
10289; CHECK-RV32-NEXT:    li a3, 492
10290; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
10291; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a3
10292; CHECK-RV32-NEXT:    addi a0, a0, 1
10293; CHECK-RV32-NEXT:    slli a2, a1, 18
10294; CHECK-RV32-NEXT:    bltz a2, .LBB61_1006
10295; CHECK-RV32-NEXT:    j .LBB61_525
10296; CHECK-RV32-NEXT:  .LBB61_1006: # %cond.load1969
10297; CHECK-RV32-NEXT:    lbu a2, 0(a0)
10298; CHECK-RV32-NEXT:    li a3, 512
10299; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
10300; CHECK-RV32-NEXT:    vmv.s.x v16, a2
10301; CHECK-RV32-NEXT:    li a2, 494
10302; CHECK-RV32-NEXT:    li a3, 493
10303; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
10304; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a3
10305; CHECK-RV32-NEXT:    addi a0, a0, 1
10306; CHECK-RV32-NEXT:    slli a2, a1, 17
10307; CHECK-RV32-NEXT:    bltz a2, .LBB61_1007
10308; CHECK-RV32-NEXT:    j .LBB61_526
10309; CHECK-RV32-NEXT:  .LBB61_1007: # %cond.load1973
10310; CHECK-RV32-NEXT:    lbu a2, 0(a0)
10311; CHECK-RV32-NEXT:    li a3, 512
10312; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
10313; CHECK-RV32-NEXT:    vmv.s.x v16, a2
10314; CHECK-RV32-NEXT:    li a2, 495
10315; CHECK-RV32-NEXT:    li a3, 494
10316; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
10317; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a3
10318; CHECK-RV32-NEXT:    addi a0, a0, 1
10319; CHECK-RV32-NEXT:    slli a2, a1, 16
10320; CHECK-RV32-NEXT:    bltz a2, .LBB61_1008
10321; CHECK-RV32-NEXT:    j .LBB61_527
10322; CHECK-RV32-NEXT:  .LBB61_1008: # %cond.load1977
10323; CHECK-RV32-NEXT:    lbu a2, 0(a0)
10324; CHECK-RV32-NEXT:    li a3, 512
10325; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
10326; CHECK-RV32-NEXT:    vmv.s.x v16, a2
10327; CHECK-RV32-NEXT:    li a2, 496
10328; CHECK-RV32-NEXT:    li a3, 495
10329; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
10330; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a3
10331; CHECK-RV32-NEXT:    addi a0, a0, 1
10332; CHECK-RV32-NEXT:    slli a2, a1, 15
10333; CHECK-RV32-NEXT:    bltz a2, .LBB61_1009
10334; CHECK-RV32-NEXT:    j .LBB61_528
10335; CHECK-RV32-NEXT:  .LBB61_1009: # %cond.load1981
10336; CHECK-RV32-NEXT:    lbu a2, 0(a0)
10337; CHECK-RV32-NEXT:    li a3, 512
10338; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
10339; CHECK-RV32-NEXT:    vmv.s.x v16, a2
10340; CHECK-RV32-NEXT:    li a2, 497
10341; CHECK-RV32-NEXT:    li a3, 496
10342; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
10343; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a3
10344; CHECK-RV32-NEXT:    addi a0, a0, 1
10345; CHECK-RV32-NEXT:    slli a2, a1, 14
10346; CHECK-RV32-NEXT:    bltz a2, .LBB61_1010
10347; CHECK-RV32-NEXT:    j .LBB61_529
10348; CHECK-RV32-NEXT:  .LBB61_1010: # %cond.load1985
10349; CHECK-RV32-NEXT:    lbu a2, 0(a0)
10350; CHECK-RV32-NEXT:    li a3, 512
10351; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
10352; CHECK-RV32-NEXT:    vmv.s.x v16, a2
10353; CHECK-RV32-NEXT:    li a2, 498
10354; CHECK-RV32-NEXT:    li a3, 497
10355; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
10356; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a3
10357; CHECK-RV32-NEXT:    addi a0, a0, 1
10358; CHECK-RV32-NEXT:    slli a2, a1, 13
10359; CHECK-RV32-NEXT:    bltz a2, .LBB61_1011
10360; CHECK-RV32-NEXT:    j .LBB61_530
10361; CHECK-RV32-NEXT:  .LBB61_1011: # %cond.load1989
10362; CHECK-RV32-NEXT:    lbu a2, 0(a0)
10363; CHECK-RV32-NEXT:    li a3, 512
10364; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
10365; CHECK-RV32-NEXT:    vmv.s.x v16, a2
10366; CHECK-RV32-NEXT:    li a2, 499
10367; CHECK-RV32-NEXT:    li a3, 498
10368; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
10369; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a3
10370; CHECK-RV32-NEXT:    addi a0, a0, 1
10371; CHECK-RV32-NEXT:    slli a2, a1, 12
10372; CHECK-RV32-NEXT:    bltz a2, .LBB61_1012
10373; CHECK-RV32-NEXT:    j .LBB61_531
10374; CHECK-RV32-NEXT:  .LBB61_1012: # %cond.load1993
10375; CHECK-RV32-NEXT:    lbu a2, 0(a0)
10376; CHECK-RV32-NEXT:    li a3, 512
10377; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
10378; CHECK-RV32-NEXT:    vmv.s.x v16, a2
10379; CHECK-RV32-NEXT:    li a2, 500
10380; CHECK-RV32-NEXT:    li a3, 499
10381; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
10382; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a3
10383; CHECK-RV32-NEXT:    addi a0, a0, 1
10384; CHECK-RV32-NEXT:    slli a2, a1, 11
10385; CHECK-RV32-NEXT:    bltz a2, .LBB61_1013
10386; CHECK-RV32-NEXT:    j .LBB61_532
10387; CHECK-RV32-NEXT:  .LBB61_1013: # %cond.load1997
10388; CHECK-RV32-NEXT:    lbu a2, 0(a0)
10389; CHECK-RV32-NEXT:    li a3, 512
10390; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
10391; CHECK-RV32-NEXT:    vmv.s.x v16, a2
10392; CHECK-RV32-NEXT:    li a2, 501
10393; CHECK-RV32-NEXT:    li a3, 500
10394; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
10395; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a3
10396; CHECK-RV32-NEXT:    addi a0, a0, 1
10397; CHECK-RV32-NEXT:    slli a2, a1, 10
10398; CHECK-RV32-NEXT:    bltz a2, .LBB61_1014
10399; CHECK-RV32-NEXT:    j .LBB61_533
10400; CHECK-RV32-NEXT:  .LBB61_1014: # %cond.load2001
10401; CHECK-RV32-NEXT:    lbu a2, 0(a0)
10402; CHECK-RV32-NEXT:    li a3, 512
10403; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
10404; CHECK-RV32-NEXT:    vmv.s.x v16, a2
10405; CHECK-RV32-NEXT:    li a2, 502
10406; CHECK-RV32-NEXT:    li a3, 501
10407; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
10408; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a3
10409; CHECK-RV32-NEXT:    addi a0, a0, 1
10410; CHECK-RV32-NEXT:    slli a2, a1, 9
10411; CHECK-RV32-NEXT:    bltz a2, .LBB61_1015
10412; CHECK-RV32-NEXT:    j .LBB61_534
10413; CHECK-RV32-NEXT:  .LBB61_1015: # %cond.load2005
10414; CHECK-RV32-NEXT:    lbu a2, 0(a0)
10415; CHECK-RV32-NEXT:    li a3, 512
10416; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
10417; CHECK-RV32-NEXT:    vmv.s.x v16, a2
10418; CHECK-RV32-NEXT:    li a2, 503
10419; CHECK-RV32-NEXT:    li a3, 502
10420; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
10421; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a3
10422; CHECK-RV32-NEXT:    addi a0, a0, 1
10423; CHECK-RV32-NEXT:    slli a2, a1, 8
10424; CHECK-RV32-NEXT:    bltz a2, .LBB61_1016
10425; CHECK-RV32-NEXT:    j .LBB61_535
10426; CHECK-RV32-NEXT:  .LBB61_1016: # %cond.load2009
10427; CHECK-RV32-NEXT:    lbu a2, 0(a0)
10428; CHECK-RV32-NEXT:    li a3, 512
10429; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
10430; CHECK-RV32-NEXT:    vmv.s.x v16, a2
10431; CHECK-RV32-NEXT:    li a2, 504
10432; CHECK-RV32-NEXT:    li a3, 503
10433; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
10434; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a3
10435; CHECK-RV32-NEXT:    addi a0, a0, 1
10436; CHECK-RV32-NEXT:    slli a2, a1, 7
10437; CHECK-RV32-NEXT:    bltz a2, .LBB61_1017
10438; CHECK-RV32-NEXT:    j .LBB61_536
10439; CHECK-RV32-NEXT:  .LBB61_1017: # %cond.load2013
10440; CHECK-RV32-NEXT:    lbu a2, 0(a0)
10441; CHECK-RV32-NEXT:    li a3, 512
10442; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
10443; CHECK-RV32-NEXT:    vmv.s.x v16, a2
10444; CHECK-RV32-NEXT:    li a2, 505
10445; CHECK-RV32-NEXT:    li a3, 504
10446; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
10447; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a3
10448; CHECK-RV32-NEXT:    addi a0, a0, 1
10449; CHECK-RV32-NEXT:    slli a2, a1, 6
10450; CHECK-RV32-NEXT:    bltz a2, .LBB61_1018
10451; CHECK-RV32-NEXT:    j .LBB61_537
10452; CHECK-RV32-NEXT:  .LBB61_1018: # %cond.load2017
10453; CHECK-RV32-NEXT:    lbu a2, 0(a0)
10454; CHECK-RV32-NEXT:    li a3, 512
10455; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
10456; CHECK-RV32-NEXT:    vmv.s.x v16, a2
10457; CHECK-RV32-NEXT:    li a2, 506
10458; CHECK-RV32-NEXT:    li a3, 505
10459; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
10460; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a3
10461; CHECK-RV32-NEXT:    addi a0, a0, 1
10462; CHECK-RV32-NEXT:    slli a2, a1, 5
10463; CHECK-RV32-NEXT:    bltz a2, .LBB61_1019
10464; CHECK-RV32-NEXT:    j .LBB61_538
10465; CHECK-RV32-NEXT:  .LBB61_1019: # %cond.load2021
10466; CHECK-RV32-NEXT:    lbu a2, 0(a0)
10467; CHECK-RV32-NEXT:    li a3, 512
10468; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
10469; CHECK-RV32-NEXT:    vmv.s.x v16, a2
10470; CHECK-RV32-NEXT:    li a2, 507
10471; CHECK-RV32-NEXT:    li a3, 506
10472; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
10473; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a3
10474; CHECK-RV32-NEXT:    addi a0, a0, 1
10475; CHECK-RV32-NEXT:    slli a2, a1, 4
10476; CHECK-RV32-NEXT:    bltz a2, .LBB61_1020
10477; CHECK-RV32-NEXT:    j .LBB61_539
10478; CHECK-RV32-NEXT:  .LBB61_1020: # %cond.load2025
10479; CHECK-RV32-NEXT:    lbu a2, 0(a0)
10480; CHECK-RV32-NEXT:    li a3, 512
10481; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
10482; CHECK-RV32-NEXT:    vmv.s.x v16, a2
10483; CHECK-RV32-NEXT:    li a2, 508
10484; CHECK-RV32-NEXT:    li a3, 507
10485; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
10486; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a3
10487; CHECK-RV32-NEXT:    addi a0, a0, 1
10488; CHECK-RV32-NEXT:    slli a2, a1, 3
10489; CHECK-RV32-NEXT:    bltz a2, .LBB61_1021
10490; CHECK-RV32-NEXT:    j .LBB61_540
10491; CHECK-RV32-NEXT:  .LBB61_1021: # %cond.load2029
10492; CHECK-RV32-NEXT:    lbu a2, 0(a0)
10493; CHECK-RV32-NEXT:    li a3, 512
10494; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
10495; CHECK-RV32-NEXT:    vmv.s.x v16, a2
10496; CHECK-RV32-NEXT:    li a2, 509
10497; CHECK-RV32-NEXT:    li a3, 508
10498; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
10499; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a3
10500; CHECK-RV32-NEXT:    addi a0, a0, 1
10501; CHECK-RV32-NEXT:    slli a2, a1, 2
10502; CHECK-RV32-NEXT:    bltz a2, .LBB61_1022
10503; CHECK-RV32-NEXT:    j .LBB61_541
10504; CHECK-RV32-NEXT:  .LBB61_1022: # %cond.load2033
10505; CHECK-RV32-NEXT:    lbu a2, 0(a0)
10506; CHECK-RV32-NEXT:    li a3, 512
10507; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
10508; CHECK-RV32-NEXT:    vmv.s.x v16, a2
10509; CHECK-RV32-NEXT:    li a2, 510
10510; CHECK-RV32-NEXT:    li a3, 509
10511; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
10512; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a3
10513; CHECK-RV32-NEXT:    addi a0, a0, 1
10514; CHECK-RV32-NEXT:    slli a2, a1, 1
10515; CHECK-RV32-NEXT:    bltz a2, .LBB61_1023
10516; CHECK-RV32-NEXT:    j .LBB61_542
10517; CHECK-RV32-NEXT:  .LBB61_1023: # %cond.load2037
10518; CHECK-RV32-NEXT:    lbu a2, 0(a0)
10519; CHECK-RV32-NEXT:    li a3, 512
10520; CHECK-RV32-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
10521; CHECK-RV32-NEXT:    vmv.s.x v16, a2
10522; CHECK-RV32-NEXT:    li a2, 511
10523; CHECK-RV32-NEXT:    li a3, 510
10524; CHECK-RV32-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
10525; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a3
10526; CHECK-RV32-NEXT:    addi a0, a0, 1
10527; CHECK-RV32-NEXT:    bltz a1, .LBB61_1024
10528; CHECK-RV32-NEXT:    j .LBB61_543
10529; CHECK-RV32-NEXT:  .LBB61_1024: # %cond.load2041
10530; CHECK-RV32-NEXT:    lbu a0, 0(a0)
10531; CHECK-RV32-NEXT:    li a1, 512
10532; CHECK-RV32-NEXT:    vsetvli zero, a1, e8, m8, ta, ma
10533; CHECK-RV32-NEXT:    vmv.s.x v16, a0
10534; CHECK-RV32-NEXT:    li a0, 511
10535; CHECK-RV32-NEXT:    vslideup.vx v8, v16, a0
10536; CHECK-RV32-NEXT:    ret
10537;
10538; CHECK-RV64-LABEL: test_expandload_v512i8_vlen512:
10539; CHECK-RV64:       # %bb.0:
10540; CHECK-RV64-NEXT:    vsetivli zero, 1, e64, m1, ta, ma
10541; CHECK-RV64-NEXT:    vmv.x.s a2, v0
10542; CHECK-RV64-NEXT:    andi a1, a2, 1
10543; CHECK-RV64-NEXT:    beqz a1, .LBB61_1
10544; CHECK-RV64-NEXT:    j .LBB61_527
10545; CHECK-RV64-NEXT:  .LBB61_1: # %else
10546; CHECK-RV64-NEXT:    andi a1, a2, 2
10547; CHECK-RV64-NEXT:    beqz a1, .LBB61_2
10548; CHECK-RV64-NEXT:    j .LBB61_528
10549; CHECK-RV64-NEXT:  .LBB61_2: # %else2
10550; CHECK-RV64-NEXT:    andi a1, a2, 4
10551; CHECK-RV64-NEXT:    beqz a1, .LBB61_3
10552; CHECK-RV64-NEXT:    j .LBB61_529
10553; CHECK-RV64-NEXT:  .LBB61_3: # %else6
10554; CHECK-RV64-NEXT:    andi a1, a2, 8
10555; CHECK-RV64-NEXT:    beqz a1, .LBB61_4
10556; CHECK-RV64-NEXT:    j .LBB61_530
10557; CHECK-RV64-NEXT:  .LBB61_4: # %else10
10558; CHECK-RV64-NEXT:    andi a1, a2, 16
10559; CHECK-RV64-NEXT:    beqz a1, .LBB61_5
10560; CHECK-RV64-NEXT:    j .LBB61_531
10561; CHECK-RV64-NEXT:  .LBB61_5: # %else14
10562; CHECK-RV64-NEXT:    andi a1, a2, 32
10563; CHECK-RV64-NEXT:    beqz a1, .LBB61_6
10564; CHECK-RV64-NEXT:    j .LBB61_532
10565; CHECK-RV64-NEXT:  .LBB61_6: # %else18
10566; CHECK-RV64-NEXT:    andi a1, a2, 64
10567; CHECK-RV64-NEXT:    beqz a1, .LBB61_7
10568; CHECK-RV64-NEXT:    j .LBB61_533
10569; CHECK-RV64-NEXT:  .LBB61_7: # %else22
10570; CHECK-RV64-NEXT:    andi a1, a2, 128
10571; CHECK-RV64-NEXT:    beqz a1, .LBB61_8
10572; CHECK-RV64-NEXT:    j .LBB61_534
10573; CHECK-RV64-NEXT:  .LBB61_8: # %else26
10574; CHECK-RV64-NEXT:    andi a1, a2, 256
10575; CHECK-RV64-NEXT:    beqz a1, .LBB61_9
10576; CHECK-RV64-NEXT:    j .LBB61_535
10577; CHECK-RV64-NEXT:  .LBB61_9: # %else30
10578; CHECK-RV64-NEXT:    andi a1, a2, 512
10579; CHECK-RV64-NEXT:    beqz a1, .LBB61_10
10580; CHECK-RV64-NEXT:    j .LBB61_536
10581; CHECK-RV64-NEXT:  .LBB61_10: # %else34
10582; CHECK-RV64-NEXT:    andi a1, a2, 1024
10583; CHECK-RV64-NEXT:    beqz a1, .LBB61_11
10584; CHECK-RV64-NEXT:    j .LBB61_537
10585; CHECK-RV64-NEXT:  .LBB61_11: # %else38
10586; CHECK-RV64-NEXT:    slli a1, a2, 52
10587; CHECK-RV64-NEXT:    bgez a1, .LBB61_12
10588; CHECK-RV64-NEXT:    j .LBB61_538
10589; CHECK-RV64-NEXT:  .LBB61_12: # %else42
10590; CHECK-RV64-NEXT:    slli a1, a2, 51
10591; CHECK-RV64-NEXT:    bgez a1, .LBB61_13
10592; CHECK-RV64-NEXT:    j .LBB61_539
10593; CHECK-RV64-NEXT:  .LBB61_13: # %else46
10594; CHECK-RV64-NEXT:    slli a1, a2, 50
10595; CHECK-RV64-NEXT:    bgez a1, .LBB61_14
10596; CHECK-RV64-NEXT:    j .LBB61_540
10597; CHECK-RV64-NEXT:  .LBB61_14: # %else50
10598; CHECK-RV64-NEXT:    slli a1, a2, 49
10599; CHECK-RV64-NEXT:    bgez a1, .LBB61_15
10600; CHECK-RV64-NEXT:    j .LBB61_541
10601; CHECK-RV64-NEXT:  .LBB61_15: # %else54
10602; CHECK-RV64-NEXT:    slli a1, a2, 48
10603; CHECK-RV64-NEXT:    bgez a1, .LBB61_16
10604; CHECK-RV64-NEXT:    j .LBB61_542
10605; CHECK-RV64-NEXT:  .LBB61_16: # %else58
10606; CHECK-RV64-NEXT:    slli a1, a2, 47
10607; CHECK-RV64-NEXT:    bgez a1, .LBB61_17
10608; CHECK-RV64-NEXT:    j .LBB61_543
10609; CHECK-RV64-NEXT:  .LBB61_17: # %else62
10610; CHECK-RV64-NEXT:    slli a1, a2, 46
10611; CHECK-RV64-NEXT:    bgez a1, .LBB61_18
10612; CHECK-RV64-NEXT:    j .LBB61_544
10613; CHECK-RV64-NEXT:  .LBB61_18: # %else66
10614; CHECK-RV64-NEXT:    slli a1, a2, 45
10615; CHECK-RV64-NEXT:    bgez a1, .LBB61_19
10616; CHECK-RV64-NEXT:    j .LBB61_545
10617; CHECK-RV64-NEXT:  .LBB61_19: # %else70
10618; CHECK-RV64-NEXT:    slli a1, a2, 44
10619; CHECK-RV64-NEXT:    bgez a1, .LBB61_20
10620; CHECK-RV64-NEXT:    j .LBB61_546
10621; CHECK-RV64-NEXT:  .LBB61_20: # %else74
10622; CHECK-RV64-NEXT:    slli a1, a2, 43
10623; CHECK-RV64-NEXT:    bgez a1, .LBB61_21
10624; CHECK-RV64-NEXT:    j .LBB61_547
10625; CHECK-RV64-NEXT:  .LBB61_21: # %else78
10626; CHECK-RV64-NEXT:    slli a1, a2, 42
10627; CHECK-RV64-NEXT:    bgez a1, .LBB61_22
10628; CHECK-RV64-NEXT:    j .LBB61_548
10629; CHECK-RV64-NEXT:  .LBB61_22: # %else82
10630; CHECK-RV64-NEXT:    slli a1, a2, 41
10631; CHECK-RV64-NEXT:    bgez a1, .LBB61_23
10632; CHECK-RV64-NEXT:    j .LBB61_549
10633; CHECK-RV64-NEXT:  .LBB61_23: # %else86
10634; CHECK-RV64-NEXT:    slli a1, a2, 40
10635; CHECK-RV64-NEXT:    bgez a1, .LBB61_24
10636; CHECK-RV64-NEXT:    j .LBB61_550
10637; CHECK-RV64-NEXT:  .LBB61_24: # %else90
10638; CHECK-RV64-NEXT:    slli a1, a2, 39
10639; CHECK-RV64-NEXT:    bgez a1, .LBB61_25
10640; CHECK-RV64-NEXT:    j .LBB61_551
10641; CHECK-RV64-NEXT:  .LBB61_25: # %else94
10642; CHECK-RV64-NEXT:    slli a1, a2, 38
10643; CHECK-RV64-NEXT:    bgez a1, .LBB61_26
10644; CHECK-RV64-NEXT:    j .LBB61_552
10645; CHECK-RV64-NEXT:  .LBB61_26: # %else98
10646; CHECK-RV64-NEXT:    slli a1, a2, 37
10647; CHECK-RV64-NEXT:    bgez a1, .LBB61_27
10648; CHECK-RV64-NEXT:    j .LBB61_553
10649; CHECK-RV64-NEXT:  .LBB61_27: # %else102
10650; CHECK-RV64-NEXT:    slli a1, a2, 36
10651; CHECK-RV64-NEXT:    bgez a1, .LBB61_28
10652; CHECK-RV64-NEXT:    j .LBB61_554
10653; CHECK-RV64-NEXT:  .LBB61_28: # %else106
10654; CHECK-RV64-NEXT:    slli a1, a2, 35
10655; CHECK-RV64-NEXT:    bgez a1, .LBB61_29
10656; CHECK-RV64-NEXT:    j .LBB61_555
10657; CHECK-RV64-NEXT:  .LBB61_29: # %else110
10658; CHECK-RV64-NEXT:    slli a1, a2, 34
10659; CHECK-RV64-NEXT:    bgez a1, .LBB61_30
10660; CHECK-RV64-NEXT:    j .LBB61_556
10661; CHECK-RV64-NEXT:  .LBB61_30: # %else114
10662; CHECK-RV64-NEXT:    slli a1, a2, 33
10663; CHECK-RV64-NEXT:    bgez a1, .LBB61_31
10664; CHECK-RV64-NEXT:    j .LBB61_557
10665; CHECK-RV64-NEXT:  .LBB61_31: # %else118
10666; CHECK-RV64-NEXT:    slli a1, a2, 32
10667; CHECK-RV64-NEXT:    bgez a1, .LBB61_32
10668; CHECK-RV64-NEXT:    j .LBB61_558
10669; CHECK-RV64-NEXT:  .LBB61_32: # %else122
10670; CHECK-RV64-NEXT:    slli a1, a2, 31
10671; CHECK-RV64-NEXT:    bgez a1, .LBB61_33
10672; CHECK-RV64-NEXT:    j .LBB61_559
10673; CHECK-RV64-NEXT:  .LBB61_33: # %else126
10674; CHECK-RV64-NEXT:    slli a1, a2, 30
10675; CHECK-RV64-NEXT:    bgez a1, .LBB61_34
10676; CHECK-RV64-NEXT:    j .LBB61_560
10677; CHECK-RV64-NEXT:  .LBB61_34: # %else130
10678; CHECK-RV64-NEXT:    slli a1, a2, 29
10679; CHECK-RV64-NEXT:    bgez a1, .LBB61_35
10680; CHECK-RV64-NEXT:    j .LBB61_561
10681; CHECK-RV64-NEXT:  .LBB61_35: # %else134
10682; CHECK-RV64-NEXT:    slli a1, a2, 28
10683; CHECK-RV64-NEXT:    bgez a1, .LBB61_36
10684; CHECK-RV64-NEXT:    j .LBB61_562
10685; CHECK-RV64-NEXT:  .LBB61_36: # %else138
10686; CHECK-RV64-NEXT:    slli a1, a2, 27
10687; CHECK-RV64-NEXT:    bgez a1, .LBB61_37
10688; CHECK-RV64-NEXT:    j .LBB61_563
10689; CHECK-RV64-NEXT:  .LBB61_37: # %else142
10690; CHECK-RV64-NEXT:    slli a1, a2, 26
10691; CHECK-RV64-NEXT:    bgez a1, .LBB61_38
10692; CHECK-RV64-NEXT:    j .LBB61_564
10693; CHECK-RV64-NEXT:  .LBB61_38: # %else146
10694; CHECK-RV64-NEXT:    slli a1, a2, 25
10695; CHECK-RV64-NEXT:    bgez a1, .LBB61_39
10696; CHECK-RV64-NEXT:    j .LBB61_565
10697; CHECK-RV64-NEXT:  .LBB61_39: # %else150
10698; CHECK-RV64-NEXT:    slli a1, a2, 24
10699; CHECK-RV64-NEXT:    bgez a1, .LBB61_40
10700; CHECK-RV64-NEXT:    j .LBB61_566
10701; CHECK-RV64-NEXT:  .LBB61_40: # %else154
10702; CHECK-RV64-NEXT:    slli a1, a2, 23
10703; CHECK-RV64-NEXT:    bgez a1, .LBB61_41
10704; CHECK-RV64-NEXT:    j .LBB61_567
10705; CHECK-RV64-NEXT:  .LBB61_41: # %else158
10706; CHECK-RV64-NEXT:    slli a1, a2, 22
10707; CHECK-RV64-NEXT:    bgez a1, .LBB61_42
10708; CHECK-RV64-NEXT:    j .LBB61_568
10709; CHECK-RV64-NEXT:  .LBB61_42: # %else162
10710; CHECK-RV64-NEXT:    slli a1, a2, 21
10711; CHECK-RV64-NEXT:    bgez a1, .LBB61_43
10712; CHECK-RV64-NEXT:    j .LBB61_569
10713; CHECK-RV64-NEXT:  .LBB61_43: # %else166
10714; CHECK-RV64-NEXT:    slli a1, a2, 20
10715; CHECK-RV64-NEXT:    bgez a1, .LBB61_44
10716; CHECK-RV64-NEXT:    j .LBB61_570
10717; CHECK-RV64-NEXT:  .LBB61_44: # %else170
10718; CHECK-RV64-NEXT:    slli a1, a2, 19
10719; CHECK-RV64-NEXT:    bgez a1, .LBB61_45
10720; CHECK-RV64-NEXT:    j .LBB61_571
10721; CHECK-RV64-NEXT:  .LBB61_45: # %else174
10722; CHECK-RV64-NEXT:    slli a1, a2, 18
10723; CHECK-RV64-NEXT:    bgez a1, .LBB61_46
10724; CHECK-RV64-NEXT:    j .LBB61_572
10725; CHECK-RV64-NEXT:  .LBB61_46: # %else178
10726; CHECK-RV64-NEXT:    slli a1, a2, 17
10727; CHECK-RV64-NEXT:    bgez a1, .LBB61_47
10728; CHECK-RV64-NEXT:    j .LBB61_573
10729; CHECK-RV64-NEXT:  .LBB61_47: # %else182
10730; CHECK-RV64-NEXT:    slli a1, a2, 16
10731; CHECK-RV64-NEXT:    bgez a1, .LBB61_48
10732; CHECK-RV64-NEXT:    j .LBB61_574
10733; CHECK-RV64-NEXT:  .LBB61_48: # %else186
10734; CHECK-RV64-NEXT:    slli a1, a2, 15
10735; CHECK-RV64-NEXT:    bgez a1, .LBB61_49
10736; CHECK-RV64-NEXT:    j .LBB61_575
10737; CHECK-RV64-NEXT:  .LBB61_49: # %else190
10738; CHECK-RV64-NEXT:    slli a1, a2, 14
10739; CHECK-RV64-NEXT:    bgez a1, .LBB61_50
10740; CHECK-RV64-NEXT:    j .LBB61_576
10741; CHECK-RV64-NEXT:  .LBB61_50: # %else194
10742; CHECK-RV64-NEXT:    slli a1, a2, 13
10743; CHECK-RV64-NEXT:    bgez a1, .LBB61_51
10744; CHECK-RV64-NEXT:    j .LBB61_577
10745; CHECK-RV64-NEXT:  .LBB61_51: # %else198
10746; CHECK-RV64-NEXT:    slli a1, a2, 12
10747; CHECK-RV64-NEXT:    bgez a1, .LBB61_52
10748; CHECK-RV64-NEXT:    j .LBB61_578
10749; CHECK-RV64-NEXT:  .LBB61_52: # %else202
10750; CHECK-RV64-NEXT:    slli a1, a2, 11
10751; CHECK-RV64-NEXT:    bgez a1, .LBB61_53
10752; CHECK-RV64-NEXT:    j .LBB61_579
10753; CHECK-RV64-NEXT:  .LBB61_53: # %else206
10754; CHECK-RV64-NEXT:    slli a1, a2, 10
10755; CHECK-RV64-NEXT:    bgez a1, .LBB61_54
10756; CHECK-RV64-NEXT:    j .LBB61_580
10757; CHECK-RV64-NEXT:  .LBB61_54: # %else210
10758; CHECK-RV64-NEXT:    slli a1, a2, 9
10759; CHECK-RV64-NEXT:    bgez a1, .LBB61_55
10760; CHECK-RV64-NEXT:    j .LBB61_581
10761; CHECK-RV64-NEXT:  .LBB61_55: # %else214
10762; CHECK-RV64-NEXT:    slli a1, a2, 8
10763; CHECK-RV64-NEXT:    bgez a1, .LBB61_56
10764; CHECK-RV64-NEXT:    j .LBB61_582
10765; CHECK-RV64-NEXT:  .LBB61_56: # %else218
10766; CHECK-RV64-NEXT:    slli a1, a2, 7
10767; CHECK-RV64-NEXT:    bgez a1, .LBB61_57
10768; CHECK-RV64-NEXT:    j .LBB61_583
10769; CHECK-RV64-NEXT:  .LBB61_57: # %else222
10770; CHECK-RV64-NEXT:    slli a1, a2, 6
10771; CHECK-RV64-NEXT:    bgez a1, .LBB61_58
10772; CHECK-RV64-NEXT:    j .LBB61_584
10773; CHECK-RV64-NEXT:  .LBB61_58: # %else226
10774; CHECK-RV64-NEXT:    slli a1, a2, 5
10775; CHECK-RV64-NEXT:    bgez a1, .LBB61_59
10776; CHECK-RV64-NEXT:    j .LBB61_585
10777; CHECK-RV64-NEXT:  .LBB61_59: # %else230
10778; CHECK-RV64-NEXT:    slli a1, a2, 4
10779; CHECK-RV64-NEXT:    bgez a1, .LBB61_60
10780; CHECK-RV64-NEXT:    j .LBB61_586
10781; CHECK-RV64-NEXT:  .LBB61_60: # %else234
10782; CHECK-RV64-NEXT:    slli a1, a2, 3
10783; CHECK-RV64-NEXT:    bgez a1, .LBB61_61
10784; CHECK-RV64-NEXT:    j .LBB61_587
10785; CHECK-RV64-NEXT:  .LBB61_61: # %else238
10786; CHECK-RV64-NEXT:    slli a1, a2, 2
10787; CHECK-RV64-NEXT:    bgez a1, .LBB61_63
10788; CHECK-RV64-NEXT:  .LBB61_62: # %cond.load241
10789; CHECK-RV64-NEXT:    lbu a1, 0(a0)
10790; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
10791; CHECK-RV64-NEXT:    vmv8r.v v16, v8
10792; CHECK-RV64-NEXT:    vmv.s.x v9, a1
10793; CHECK-RV64-NEXT:    li a1, 62
10794; CHECK-RV64-NEXT:    li a3, 61
10795; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m1, tu, ma
10796; CHECK-RV64-NEXT:    vslideup.vx v8, v9, a3
10797; CHECK-RV64-NEXT:    addi a0, a0, 1
10798; CHECK-RV64-NEXT:    vmv1r.v v16, v8
10799; CHECK-RV64-NEXT:    vmv8r.v v8, v16
10800; CHECK-RV64-NEXT:  .LBB61_63: # %else242
10801; CHECK-RV64-NEXT:    slli a1, a2, 1
10802; CHECK-RV64-NEXT:    vsetivli zero, 1, e64, m1, ta, ma
10803; CHECK-RV64-NEXT:    vslidedown.vi v16, v0, 1
10804; CHECK-RV64-NEXT:    bgez a1, .LBB61_65
10805; CHECK-RV64-NEXT:  # %bb.64: # %cond.load245
10806; CHECK-RV64-NEXT:    lbu a1, 0(a0)
10807; CHECK-RV64-NEXT:    vmv8r.v v24, v8
10808; CHECK-RV64-NEXT:    vmv.s.x v9, a1
10809; CHECK-RV64-NEXT:    li a1, 63
10810; CHECK-RV64-NEXT:    li a3, 62
10811; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m1, tu, ma
10812; CHECK-RV64-NEXT:    vslideup.vx v8, v9, a3
10813; CHECK-RV64-NEXT:    addi a0, a0, 1
10814; CHECK-RV64-NEXT:    vmv1r.v v24, v8
10815; CHECK-RV64-NEXT:    vmv8r.v v8, v24
10816; CHECK-RV64-NEXT:  .LBB61_65: # %else246
10817; CHECK-RV64-NEXT:    vsetivli zero, 1, e64, m1, ta, ma
10818; CHECK-RV64-NEXT:    vmv.x.s a1, v16
10819; CHECK-RV64-NEXT:    bgez a2, .LBB61_66
10820; CHECK-RV64-NEXT:    j .LBB61_588
10821; CHECK-RV64-NEXT:  .LBB61_66: # %else250
10822; CHECK-RV64-NEXT:    andi a2, a1, 1
10823; CHECK-RV64-NEXT:    beqz a2, .LBB61_67
10824; CHECK-RV64-NEXT:    j .LBB61_589
10825; CHECK-RV64-NEXT:  .LBB61_67: # %else254
10826; CHECK-RV64-NEXT:    andi a2, a1, 2
10827; CHECK-RV64-NEXT:    beqz a2, .LBB61_68
10828; CHECK-RV64-NEXT:    j .LBB61_590
10829; CHECK-RV64-NEXT:  .LBB61_68: # %else258
10830; CHECK-RV64-NEXT:    andi a2, a1, 4
10831; CHECK-RV64-NEXT:    beqz a2, .LBB61_69
10832; CHECK-RV64-NEXT:    j .LBB61_591
10833; CHECK-RV64-NEXT:  .LBB61_69: # %else262
10834; CHECK-RV64-NEXT:    andi a2, a1, 8
10835; CHECK-RV64-NEXT:    beqz a2, .LBB61_70
10836; CHECK-RV64-NEXT:    j .LBB61_592
10837; CHECK-RV64-NEXT:  .LBB61_70: # %else266
10838; CHECK-RV64-NEXT:    andi a2, a1, 16
10839; CHECK-RV64-NEXT:    beqz a2, .LBB61_71
10840; CHECK-RV64-NEXT:    j .LBB61_593
10841; CHECK-RV64-NEXT:  .LBB61_71: # %else270
10842; CHECK-RV64-NEXT:    andi a2, a1, 32
10843; CHECK-RV64-NEXT:    beqz a2, .LBB61_72
10844; CHECK-RV64-NEXT:    j .LBB61_594
10845; CHECK-RV64-NEXT:  .LBB61_72: # %else274
10846; CHECK-RV64-NEXT:    andi a2, a1, 64
10847; CHECK-RV64-NEXT:    beqz a2, .LBB61_73
10848; CHECK-RV64-NEXT:    j .LBB61_595
10849; CHECK-RV64-NEXT:  .LBB61_73: # %else278
10850; CHECK-RV64-NEXT:    andi a2, a1, 128
10851; CHECK-RV64-NEXT:    beqz a2, .LBB61_74
10852; CHECK-RV64-NEXT:    j .LBB61_596
10853; CHECK-RV64-NEXT:  .LBB61_74: # %else282
10854; CHECK-RV64-NEXT:    andi a2, a1, 256
10855; CHECK-RV64-NEXT:    beqz a2, .LBB61_75
10856; CHECK-RV64-NEXT:    j .LBB61_597
10857; CHECK-RV64-NEXT:  .LBB61_75: # %else286
10858; CHECK-RV64-NEXT:    andi a2, a1, 512
10859; CHECK-RV64-NEXT:    beqz a2, .LBB61_76
10860; CHECK-RV64-NEXT:    j .LBB61_598
10861; CHECK-RV64-NEXT:  .LBB61_76: # %else290
10862; CHECK-RV64-NEXT:    andi a2, a1, 1024
10863; CHECK-RV64-NEXT:    beqz a2, .LBB61_77
10864; CHECK-RV64-NEXT:    j .LBB61_599
10865; CHECK-RV64-NEXT:  .LBB61_77: # %else294
10866; CHECK-RV64-NEXT:    slli a2, a1, 52
10867; CHECK-RV64-NEXT:    bgez a2, .LBB61_78
10868; CHECK-RV64-NEXT:    j .LBB61_600
10869; CHECK-RV64-NEXT:  .LBB61_78: # %else298
10870; CHECK-RV64-NEXT:    slli a2, a1, 51
10871; CHECK-RV64-NEXT:    bgez a2, .LBB61_79
10872; CHECK-RV64-NEXT:    j .LBB61_601
10873; CHECK-RV64-NEXT:  .LBB61_79: # %else302
10874; CHECK-RV64-NEXT:    slli a2, a1, 50
10875; CHECK-RV64-NEXT:    bgez a2, .LBB61_80
10876; CHECK-RV64-NEXT:    j .LBB61_602
10877; CHECK-RV64-NEXT:  .LBB61_80: # %else306
10878; CHECK-RV64-NEXT:    slli a2, a1, 49
10879; CHECK-RV64-NEXT:    bgez a2, .LBB61_81
10880; CHECK-RV64-NEXT:    j .LBB61_603
10881; CHECK-RV64-NEXT:  .LBB61_81: # %else310
10882; CHECK-RV64-NEXT:    slli a2, a1, 48
10883; CHECK-RV64-NEXT:    bgez a2, .LBB61_82
10884; CHECK-RV64-NEXT:    j .LBB61_604
10885; CHECK-RV64-NEXT:  .LBB61_82: # %else314
10886; CHECK-RV64-NEXT:    slli a2, a1, 47
10887; CHECK-RV64-NEXT:    bgez a2, .LBB61_83
10888; CHECK-RV64-NEXT:    j .LBB61_605
10889; CHECK-RV64-NEXT:  .LBB61_83: # %else318
10890; CHECK-RV64-NEXT:    slli a2, a1, 46
10891; CHECK-RV64-NEXT:    bgez a2, .LBB61_84
10892; CHECK-RV64-NEXT:    j .LBB61_606
10893; CHECK-RV64-NEXT:  .LBB61_84: # %else322
10894; CHECK-RV64-NEXT:    slli a2, a1, 45
10895; CHECK-RV64-NEXT:    bgez a2, .LBB61_85
10896; CHECK-RV64-NEXT:    j .LBB61_607
10897; CHECK-RV64-NEXT:  .LBB61_85: # %else326
10898; CHECK-RV64-NEXT:    slli a2, a1, 44
10899; CHECK-RV64-NEXT:    bgez a2, .LBB61_86
10900; CHECK-RV64-NEXT:    j .LBB61_608
10901; CHECK-RV64-NEXT:  .LBB61_86: # %else330
10902; CHECK-RV64-NEXT:    slli a2, a1, 43
10903; CHECK-RV64-NEXT:    bgez a2, .LBB61_87
10904; CHECK-RV64-NEXT:    j .LBB61_609
10905; CHECK-RV64-NEXT:  .LBB61_87: # %else334
10906; CHECK-RV64-NEXT:    slli a2, a1, 42
10907; CHECK-RV64-NEXT:    bgez a2, .LBB61_88
10908; CHECK-RV64-NEXT:    j .LBB61_610
10909; CHECK-RV64-NEXT:  .LBB61_88: # %else338
10910; CHECK-RV64-NEXT:    slli a2, a1, 41
10911; CHECK-RV64-NEXT:    bgez a2, .LBB61_89
10912; CHECK-RV64-NEXT:    j .LBB61_611
10913; CHECK-RV64-NEXT:  .LBB61_89: # %else342
10914; CHECK-RV64-NEXT:    slli a2, a1, 40
10915; CHECK-RV64-NEXT:    bgez a2, .LBB61_90
10916; CHECK-RV64-NEXT:    j .LBB61_612
10917; CHECK-RV64-NEXT:  .LBB61_90: # %else346
10918; CHECK-RV64-NEXT:    slli a2, a1, 39
10919; CHECK-RV64-NEXT:    bgez a2, .LBB61_91
10920; CHECK-RV64-NEXT:    j .LBB61_613
10921; CHECK-RV64-NEXT:  .LBB61_91: # %else350
10922; CHECK-RV64-NEXT:    slli a2, a1, 38
10923; CHECK-RV64-NEXT:    bgez a2, .LBB61_92
10924; CHECK-RV64-NEXT:    j .LBB61_614
10925; CHECK-RV64-NEXT:  .LBB61_92: # %else354
10926; CHECK-RV64-NEXT:    slli a2, a1, 37
10927; CHECK-RV64-NEXT:    bgez a2, .LBB61_93
10928; CHECK-RV64-NEXT:    j .LBB61_615
10929; CHECK-RV64-NEXT:  .LBB61_93: # %else358
10930; CHECK-RV64-NEXT:    slli a2, a1, 36
10931; CHECK-RV64-NEXT:    bgez a2, .LBB61_94
10932; CHECK-RV64-NEXT:    j .LBB61_616
10933; CHECK-RV64-NEXT:  .LBB61_94: # %else362
10934; CHECK-RV64-NEXT:    slli a2, a1, 35
10935; CHECK-RV64-NEXT:    bgez a2, .LBB61_95
10936; CHECK-RV64-NEXT:    j .LBB61_617
10937; CHECK-RV64-NEXT:  .LBB61_95: # %else366
10938; CHECK-RV64-NEXT:    slli a2, a1, 34
10939; CHECK-RV64-NEXT:    bgez a2, .LBB61_96
10940; CHECK-RV64-NEXT:    j .LBB61_618
10941; CHECK-RV64-NEXT:  .LBB61_96: # %else370
10942; CHECK-RV64-NEXT:    slli a2, a1, 33
10943; CHECK-RV64-NEXT:    bgez a2, .LBB61_97
10944; CHECK-RV64-NEXT:    j .LBB61_619
10945; CHECK-RV64-NEXT:  .LBB61_97: # %else374
10946; CHECK-RV64-NEXT:    slli a2, a1, 32
10947; CHECK-RV64-NEXT:    bgez a2, .LBB61_98
10948; CHECK-RV64-NEXT:    j .LBB61_620
10949; CHECK-RV64-NEXT:  .LBB61_98: # %else378
10950; CHECK-RV64-NEXT:    slli a2, a1, 31
10951; CHECK-RV64-NEXT:    bgez a2, .LBB61_99
10952; CHECK-RV64-NEXT:    j .LBB61_621
10953; CHECK-RV64-NEXT:  .LBB61_99: # %else382
10954; CHECK-RV64-NEXT:    slli a2, a1, 30
10955; CHECK-RV64-NEXT:    bgez a2, .LBB61_100
10956; CHECK-RV64-NEXT:    j .LBB61_622
10957; CHECK-RV64-NEXT:  .LBB61_100: # %else386
10958; CHECK-RV64-NEXT:    slli a2, a1, 29
10959; CHECK-RV64-NEXT:    bgez a2, .LBB61_101
10960; CHECK-RV64-NEXT:    j .LBB61_623
10961; CHECK-RV64-NEXT:  .LBB61_101: # %else390
10962; CHECK-RV64-NEXT:    slli a2, a1, 28
10963; CHECK-RV64-NEXT:    bgez a2, .LBB61_102
10964; CHECK-RV64-NEXT:    j .LBB61_624
10965; CHECK-RV64-NEXT:  .LBB61_102: # %else394
10966; CHECK-RV64-NEXT:    slli a2, a1, 27
10967; CHECK-RV64-NEXT:    bgez a2, .LBB61_103
10968; CHECK-RV64-NEXT:    j .LBB61_625
10969; CHECK-RV64-NEXT:  .LBB61_103: # %else398
10970; CHECK-RV64-NEXT:    slli a2, a1, 26
10971; CHECK-RV64-NEXT:    bgez a2, .LBB61_104
10972; CHECK-RV64-NEXT:    j .LBB61_626
10973; CHECK-RV64-NEXT:  .LBB61_104: # %else402
10974; CHECK-RV64-NEXT:    slli a2, a1, 25
10975; CHECK-RV64-NEXT:    bgez a2, .LBB61_105
10976; CHECK-RV64-NEXT:    j .LBB61_627
10977; CHECK-RV64-NEXT:  .LBB61_105: # %else406
10978; CHECK-RV64-NEXT:    slli a2, a1, 24
10979; CHECK-RV64-NEXT:    bgez a2, .LBB61_106
10980; CHECK-RV64-NEXT:    j .LBB61_628
10981; CHECK-RV64-NEXT:  .LBB61_106: # %else410
10982; CHECK-RV64-NEXT:    slli a2, a1, 23
10983; CHECK-RV64-NEXT:    bgez a2, .LBB61_107
10984; CHECK-RV64-NEXT:    j .LBB61_629
10985; CHECK-RV64-NEXT:  .LBB61_107: # %else414
10986; CHECK-RV64-NEXT:    slli a2, a1, 22
10987; CHECK-RV64-NEXT:    bgez a2, .LBB61_108
10988; CHECK-RV64-NEXT:    j .LBB61_630
10989; CHECK-RV64-NEXT:  .LBB61_108: # %else418
10990; CHECK-RV64-NEXT:    slli a2, a1, 21
10991; CHECK-RV64-NEXT:    bgez a2, .LBB61_109
10992; CHECK-RV64-NEXT:    j .LBB61_631
10993; CHECK-RV64-NEXT:  .LBB61_109: # %else422
10994; CHECK-RV64-NEXT:    slli a2, a1, 20
10995; CHECK-RV64-NEXT:    bgez a2, .LBB61_110
10996; CHECK-RV64-NEXT:    j .LBB61_632
10997; CHECK-RV64-NEXT:  .LBB61_110: # %else426
10998; CHECK-RV64-NEXT:    slli a2, a1, 19
10999; CHECK-RV64-NEXT:    bgez a2, .LBB61_111
11000; CHECK-RV64-NEXT:    j .LBB61_633
11001; CHECK-RV64-NEXT:  .LBB61_111: # %else430
11002; CHECK-RV64-NEXT:    slli a2, a1, 18
11003; CHECK-RV64-NEXT:    bgez a2, .LBB61_112
11004; CHECK-RV64-NEXT:    j .LBB61_634
11005; CHECK-RV64-NEXT:  .LBB61_112: # %else434
11006; CHECK-RV64-NEXT:    slli a2, a1, 17
11007; CHECK-RV64-NEXT:    bgez a2, .LBB61_113
11008; CHECK-RV64-NEXT:    j .LBB61_635
11009; CHECK-RV64-NEXT:  .LBB61_113: # %else438
11010; CHECK-RV64-NEXT:    slli a2, a1, 16
11011; CHECK-RV64-NEXT:    bgez a2, .LBB61_114
11012; CHECK-RV64-NEXT:    j .LBB61_636
11013; CHECK-RV64-NEXT:  .LBB61_114: # %else442
11014; CHECK-RV64-NEXT:    slli a2, a1, 15
11015; CHECK-RV64-NEXT:    bgez a2, .LBB61_115
11016; CHECK-RV64-NEXT:    j .LBB61_637
11017; CHECK-RV64-NEXT:  .LBB61_115: # %else446
11018; CHECK-RV64-NEXT:    slli a2, a1, 14
11019; CHECK-RV64-NEXT:    bgez a2, .LBB61_116
11020; CHECK-RV64-NEXT:    j .LBB61_638
11021; CHECK-RV64-NEXT:  .LBB61_116: # %else450
11022; CHECK-RV64-NEXT:    slli a2, a1, 13
11023; CHECK-RV64-NEXT:    bgez a2, .LBB61_117
11024; CHECK-RV64-NEXT:    j .LBB61_639
11025; CHECK-RV64-NEXT:  .LBB61_117: # %else454
11026; CHECK-RV64-NEXT:    slli a2, a1, 12
11027; CHECK-RV64-NEXT:    bgez a2, .LBB61_118
11028; CHECK-RV64-NEXT:    j .LBB61_640
11029; CHECK-RV64-NEXT:  .LBB61_118: # %else458
11030; CHECK-RV64-NEXT:    slli a2, a1, 11
11031; CHECK-RV64-NEXT:    bgez a2, .LBB61_119
11032; CHECK-RV64-NEXT:    j .LBB61_641
11033; CHECK-RV64-NEXT:  .LBB61_119: # %else462
11034; CHECK-RV64-NEXT:    slli a2, a1, 10
11035; CHECK-RV64-NEXT:    bgez a2, .LBB61_120
11036; CHECK-RV64-NEXT:    j .LBB61_642
11037; CHECK-RV64-NEXT:  .LBB61_120: # %else466
11038; CHECK-RV64-NEXT:    slli a2, a1, 9
11039; CHECK-RV64-NEXT:    bgez a2, .LBB61_121
11040; CHECK-RV64-NEXT:    j .LBB61_643
11041; CHECK-RV64-NEXT:  .LBB61_121: # %else470
11042; CHECK-RV64-NEXT:    slli a2, a1, 8
11043; CHECK-RV64-NEXT:    bgez a2, .LBB61_122
11044; CHECK-RV64-NEXT:    j .LBB61_644
11045; CHECK-RV64-NEXT:  .LBB61_122: # %else474
11046; CHECK-RV64-NEXT:    slli a2, a1, 7
11047; CHECK-RV64-NEXT:    bgez a2, .LBB61_123
11048; CHECK-RV64-NEXT:    j .LBB61_645
11049; CHECK-RV64-NEXT:  .LBB61_123: # %else478
11050; CHECK-RV64-NEXT:    slli a2, a1, 6
11051; CHECK-RV64-NEXT:    bgez a2, .LBB61_124
11052; CHECK-RV64-NEXT:    j .LBB61_646
11053; CHECK-RV64-NEXT:  .LBB61_124: # %else482
11054; CHECK-RV64-NEXT:    slli a2, a1, 5
11055; CHECK-RV64-NEXT:    bgez a2, .LBB61_125
11056; CHECK-RV64-NEXT:    j .LBB61_647
11057; CHECK-RV64-NEXT:  .LBB61_125: # %else486
11058; CHECK-RV64-NEXT:    slli a2, a1, 4
11059; CHECK-RV64-NEXT:    bgez a2, .LBB61_126
11060; CHECK-RV64-NEXT:    j .LBB61_648
11061; CHECK-RV64-NEXT:  .LBB61_126: # %else490
11062; CHECK-RV64-NEXT:    slli a2, a1, 3
11063; CHECK-RV64-NEXT:    bgez a2, .LBB61_127
11064; CHECK-RV64-NEXT:    j .LBB61_649
11065; CHECK-RV64-NEXT:  .LBB61_127: # %else494
11066; CHECK-RV64-NEXT:    slli a2, a1, 2
11067; CHECK-RV64-NEXT:    bgez a2, .LBB61_129
11068; CHECK-RV64-NEXT:  .LBB61_128: # %cond.load497
11069; CHECK-RV64-NEXT:    lbu a2, 0(a0)
11070; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
11071; CHECK-RV64-NEXT:    vmv8r.v v16, v8
11072; CHECK-RV64-NEXT:    vmv.s.x v10, a2
11073; CHECK-RV64-NEXT:    li a2, 126
11074; CHECK-RV64-NEXT:    li a3, 125
11075; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
11076; CHECK-RV64-NEXT:    vslideup.vx v8, v10, a3
11077; CHECK-RV64-NEXT:    addi a0, a0, 1
11078; CHECK-RV64-NEXT:    vmv2r.v v16, v8
11079; CHECK-RV64-NEXT:    vmv8r.v v8, v16
11080; CHECK-RV64-NEXT:  .LBB61_129: # %else498
11081; CHECK-RV64-NEXT:    slli a2, a1, 1
11082; CHECK-RV64-NEXT:    vsetivli zero, 1, e64, m1, ta, ma
11083; CHECK-RV64-NEXT:    vslidedown.vi v16, v0, 2
11084; CHECK-RV64-NEXT:    bgez a2, .LBB61_131
11085; CHECK-RV64-NEXT:  # %bb.130: # %cond.load501
11086; CHECK-RV64-NEXT:    lbu a2, 0(a0)
11087; CHECK-RV64-NEXT:    vmv8r.v v24, v8
11088; CHECK-RV64-NEXT:    vmv.s.x v10, a2
11089; CHECK-RV64-NEXT:    li a2, 127
11090; CHECK-RV64-NEXT:    li a3, 126
11091; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
11092; CHECK-RV64-NEXT:    vslideup.vx v8, v10, a3
11093; CHECK-RV64-NEXT:    addi a0, a0, 1
11094; CHECK-RV64-NEXT:    vmv2r.v v24, v8
11095; CHECK-RV64-NEXT:    vmv8r.v v8, v24
11096; CHECK-RV64-NEXT:  .LBB61_131: # %else502
11097; CHECK-RV64-NEXT:    vsetivli zero, 1, e64, m1, ta, ma
11098; CHECK-RV64-NEXT:    vmv.x.s a2, v16
11099; CHECK-RV64-NEXT:    bgez a1, .LBB61_132
11100; CHECK-RV64-NEXT:    j .LBB61_650
11101; CHECK-RV64-NEXT:  .LBB61_132: # %else506
11102; CHECK-RV64-NEXT:    andi a1, a2, 1
11103; CHECK-RV64-NEXT:    beqz a1, .LBB61_133
11104; CHECK-RV64-NEXT:    j .LBB61_651
11105; CHECK-RV64-NEXT:  .LBB61_133: # %else510
11106; CHECK-RV64-NEXT:    andi a1, a2, 2
11107; CHECK-RV64-NEXT:    beqz a1, .LBB61_134
11108; CHECK-RV64-NEXT:    j .LBB61_652
11109; CHECK-RV64-NEXT:  .LBB61_134: # %else514
11110; CHECK-RV64-NEXT:    andi a1, a2, 4
11111; CHECK-RV64-NEXT:    beqz a1, .LBB61_135
11112; CHECK-RV64-NEXT:    j .LBB61_653
11113; CHECK-RV64-NEXT:  .LBB61_135: # %else518
11114; CHECK-RV64-NEXT:    andi a1, a2, 8
11115; CHECK-RV64-NEXT:    beqz a1, .LBB61_136
11116; CHECK-RV64-NEXT:    j .LBB61_654
11117; CHECK-RV64-NEXT:  .LBB61_136: # %else522
11118; CHECK-RV64-NEXT:    andi a1, a2, 16
11119; CHECK-RV64-NEXT:    beqz a1, .LBB61_137
11120; CHECK-RV64-NEXT:    j .LBB61_655
11121; CHECK-RV64-NEXT:  .LBB61_137: # %else526
11122; CHECK-RV64-NEXT:    andi a1, a2, 32
11123; CHECK-RV64-NEXT:    beqz a1, .LBB61_138
11124; CHECK-RV64-NEXT:    j .LBB61_656
11125; CHECK-RV64-NEXT:  .LBB61_138: # %else530
11126; CHECK-RV64-NEXT:    andi a1, a2, 64
11127; CHECK-RV64-NEXT:    beqz a1, .LBB61_139
11128; CHECK-RV64-NEXT:    j .LBB61_657
11129; CHECK-RV64-NEXT:  .LBB61_139: # %else534
11130; CHECK-RV64-NEXT:    andi a1, a2, 128
11131; CHECK-RV64-NEXT:    beqz a1, .LBB61_140
11132; CHECK-RV64-NEXT:    j .LBB61_658
11133; CHECK-RV64-NEXT:  .LBB61_140: # %else538
11134; CHECK-RV64-NEXT:    andi a1, a2, 256
11135; CHECK-RV64-NEXT:    beqz a1, .LBB61_141
11136; CHECK-RV64-NEXT:    j .LBB61_659
11137; CHECK-RV64-NEXT:  .LBB61_141: # %else542
11138; CHECK-RV64-NEXT:    andi a1, a2, 512
11139; CHECK-RV64-NEXT:    beqz a1, .LBB61_142
11140; CHECK-RV64-NEXT:    j .LBB61_660
11141; CHECK-RV64-NEXT:  .LBB61_142: # %else546
11142; CHECK-RV64-NEXT:    andi a1, a2, 1024
11143; CHECK-RV64-NEXT:    beqz a1, .LBB61_143
11144; CHECK-RV64-NEXT:    j .LBB61_661
11145; CHECK-RV64-NEXT:  .LBB61_143: # %else550
11146; CHECK-RV64-NEXT:    slli a1, a2, 52
11147; CHECK-RV64-NEXT:    bgez a1, .LBB61_144
11148; CHECK-RV64-NEXT:    j .LBB61_662
11149; CHECK-RV64-NEXT:  .LBB61_144: # %else554
11150; CHECK-RV64-NEXT:    slli a1, a2, 51
11151; CHECK-RV64-NEXT:    bgez a1, .LBB61_145
11152; CHECK-RV64-NEXT:    j .LBB61_663
11153; CHECK-RV64-NEXT:  .LBB61_145: # %else558
11154; CHECK-RV64-NEXT:    slli a1, a2, 50
11155; CHECK-RV64-NEXT:    bgez a1, .LBB61_146
11156; CHECK-RV64-NEXT:    j .LBB61_664
11157; CHECK-RV64-NEXT:  .LBB61_146: # %else562
11158; CHECK-RV64-NEXT:    slli a1, a2, 49
11159; CHECK-RV64-NEXT:    bgez a1, .LBB61_147
11160; CHECK-RV64-NEXT:    j .LBB61_665
11161; CHECK-RV64-NEXT:  .LBB61_147: # %else566
11162; CHECK-RV64-NEXT:    slli a1, a2, 48
11163; CHECK-RV64-NEXT:    bgez a1, .LBB61_148
11164; CHECK-RV64-NEXT:    j .LBB61_666
11165; CHECK-RV64-NEXT:  .LBB61_148: # %else570
11166; CHECK-RV64-NEXT:    slli a1, a2, 47
11167; CHECK-RV64-NEXT:    bgez a1, .LBB61_149
11168; CHECK-RV64-NEXT:    j .LBB61_667
11169; CHECK-RV64-NEXT:  .LBB61_149: # %else574
11170; CHECK-RV64-NEXT:    slli a1, a2, 46
11171; CHECK-RV64-NEXT:    bgez a1, .LBB61_150
11172; CHECK-RV64-NEXT:    j .LBB61_668
11173; CHECK-RV64-NEXT:  .LBB61_150: # %else578
11174; CHECK-RV64-NEXT:    slli a1, a2, 45
11175; CHECK-RV64-NEXT:    bgez a1, .LBB61_151
11176; CHECK-RV64-NEXT:    j .LBB61_669
11177; CHECK-RV64-NEXT:  .LBB61_151: # %else582
11178; CHECK-RV64-NEXT:    slli a1, a2, 44
11179; CHECK-RV64-NEXT:    bgez a1, .LBB61_152
11180; CHECK-RV64-NEXT:    j .LBB61_670
11181; CHECK-RV64-NEXT:  .LBB61_152: # %else586
11182; CHECK-RV64-NEXT:    slli a1, a2, 43
11183; CHECK-RV64-NEXT:    bgez a1, .LBB61_153
11184; CHECK-RV64-NEXT:    j .LBB61_671
11185; CHECK-RV64-NEXT:  .LBB61_153: # %else590
11186; CHECK-RV64-NEXT:    slli a1, a2, 42
11187; CHECK-RV64-NEXT:    bgez a1, .LBB61_154
11188; CHECK-RV64-NEXT:    j .LBB61_672
11189; CHECK-RV64-NEXT:  .LBB61_154: # %else594
11190; CHECK-RV64-NEXT:    slli a1, a2, 41
11191; CHECK-RV64-NEXT:    bgez a1, .LBB61_155
11192; CHECK-RV64-NEXT:    j .LBB61_673
11193; CHECK-RV64-NEXT:  .LBB61_155: # %else598
11194; CHECK-RV64-NEXT:    slli a1, a2, 40
11195; CHECK-RV64-NEXT:    bgez a1, .LBB61_156
11196; CHECK-RV64-NEXT:    j .LBB61_674
11197; CHECK-RV64-NEXT:  .LBB61_156: # %else602
11198; CHECK-RV64-NEXT:    slli a1, a2, 39
11199; CHECK-RV64-NEXT:    bgez a1, .LBB61_157
11200; CHECK-RV64-NEXT:    j .LBB61_675
11201; CHECK-RV64-NEXT:  .LBB61_157: # %else606
11202; CHECK-RV64-NEXT:    slli a1, a2, 38
11203; CHECK-RV64-NEXT:    bgez a1, .LBB61_158
11204; CHECK-RV64-NEXT:    j .LBB61_676
11205; CHECK-RV64-NEXT:  .LBB61_158: # %else610
11206; CHECK-RV64-NEXT:    slli a1, a2, 37
11207; CHECK-RV64-NEXT:    bgez a1, .LBB61_159
11208; CHECK-RV64-NEXT:    j .LBB61_677
11209; CHECK-RV64-NEXT:  .LBB61_159: # %else614
11210; CHECK-RV64-NEXT:    slli a1, a2, 36
11211; CHECK-RV64-NEXT:    bgez a1, .LBB61_160
11212; CHECK-RV64-NEXT:    j .LBB61_678
11213; CHECK-RV64-NEXT:  .LBB61_160: # %else618
11214; CHECK-RV64-NEXT:    slli a1, a2, 35
11215; CHECK-RV64-NEXT:    bgez a1, .LBB61_161
11216; CHECK-RV64-NEXT:    j .LBB61_679
11217; CHECK-RV64-NEXT:  .LBB61_161: # %else622
11218; CHECK-RV64-NEXT:    slli a1, a2, 34
11219; CHECK-RV64-NEXT:    bgez a1, .LBB61_162
11220; CHECK-RV64-NEXT:    j .LBB61_680
11221; CHECK-RV64-NEXT:  .LBB61_162: # %else626
11222; CHECK-RV64-NEXT:    slli a1, a2, 33
11223; CHECK-RV64-NEXT:    bgez a1, .LBB61_163
11224; CHECK-RV64-NEXT:    j .LBB61_681
11225; CHECK-RV64-NEXT:  .LBB61_163: # %else630
11226; CHECK-RV64-NEXT:    slli a1, a2, 32
11227; CHECK-RV64-NEXT:    bgez a1, .LBB61_164
11228; CHECK-RV64-NEXT:    j .LBB61_682
11229; CHECK-RV64-NEXT:  .LBB61_164: # %else634
11230; CHECK-RV64-NEXT:    slli a1, a2, 31
11231; CHECK-RV64-NEXT:    bgez a1, .LBB61_165
11232; CHECK-RV64-NEXT:    j .LBB61_683
11233; CHECK-RV64-NEXT:  .LBB61_165: # %else638
11234; CHECK-RV64-NEXT:    slli a1, a2, 30
11235; CHECK-RV64-NEXT:    bgez a1, .LBB61_166
11236; CHECK-RV64-NEXT:    j .LBB61_684
11237; CHECK-RV64-NEXT:  .LBB61_166: # %else642
11238; CHECK-RV64-NEXT:    slli a1, a2, 29
11239; CHECK-RV64-NEXT:    bgez a1, .LBB61_167
11240; CHECK-RV64-NEXT:    j .LBB61_685
11241; CHECK-RV64-NEXT:  .LBB61_167: # %else646
11242; CHECK-RV64-NEXT:    slli a1, a2, 28
11243; CHECK-RV64-NEXT:    bgez a1, .LBB61_168
11244; CHECK-RV64-NEXT:    j .LBB61_686
11245; CHECK-RV64-NEXT:  .LBB61_168: # %else650
11246; CHECK-RV64-NEXT:    slli a1, a2, 27
11247; CHECK-RV64-NEXT:    bgez a1, .LBB61_169
11248; CHECK-RV64-NEXT:    j .LBB61_687
11249; CHECK-RV64-NEXT:  .LBB61_169: # %else654
11250; CHECK-RV64-NEXT:    slli a1, a2, 26
11251; CHECK-RV64-NEXT:    bgez a1, .LBB61_170
11252; CHECK-RV64-NEXT:    j .LBB61_688
11253; CHECK-RV64-NEXT:  .LBB61_170: # %else658
11254; CHECK-RV64-NEXT:    slli a1, a2, 25
11255; CHECK-RV64-NEXT:    bgez a1, .LBB61_171
11256; CHECK-RV64-NEXT:    j .LBB61_689
11257; CHECK-RV64-NEXT:  .LBB61_171: # %else662
11258; CHECK-RV64-NEXT:    slli a1, a2, 24
11259; CHECK-RV64-NEXT:    bgez a1, .LBB61_172
11260; CHECK-RV64-NEXT:    j .LBB61_690
11261; CHECK-RV64-NEXT:  .LBB61_172: # %else666
11262; CHECK-RV64-NEXT:    slli a1, a2, 23
11263; CHECK-RV64-NEXT:    bgez a1, .LBB61_173
11264; CHECK-RV64-NEXT:    j .LBB61_691
11265; CHECK-RV64-NEXT:  .LBB61_173: # %else670
11266; CHECK-RV64-NEXT:    slli a1, a2, 22
11267; CHECK-RV64-NEXT:    bgez a1, .LBB61_174
11268; CHECK-RV64-NEXT:    j .LBB61_692
11269; CHECK-RV64-NEXT:  .LBB61_174: # %else674
11270; CHECK-RV64-NEXT:    slli a1, a2, 21
11271; CHECK-RV64-NEXT:    bgez a1, .LBB61_175
11272; CHECK-RV64-NEXT:    j .LBB61_693
11273; CHECK-RV64-NEXT:  .LBB61_175: # %else678
11274; CHECK-RV64-NEXT:    slli a1, a2, 20
11275; CHECK-RV64-NEXT:    bgez a1, .LBB61_176
11276; CHECK-RV64-NEXT:    j .LBB61_694
11277; CHECK-RV64-NEXT:  .LBB61_176: # %else682
11278; CHECK-RV64-NEXT:    slli a1, a2, 19
11279; CHECK-RV64-NEXT:    bgez a1, .LBB61_177
11280; CHECK-RV64-NEXT:    j .LBB61_695
11281; CHECK-RV64-NEXT:  .LBB61_177: # %else686
11282; CHECK-RV64-NEXT:    slli a1, a2, 18
11283; CHECK-RV64-NEXT:    bgez a1, .LBB61_178
11284; CHECK-RV64-NEXT:    j .LBB61_696
11285; CHECK-RV64-NEXT:  .LBB61_178: # %else690
11286; CHECK-RV64-NEXT:    slli a1, a2, 17
11287; CHECK-RV64-NEXT:    bgez a1, .LBB61_179
11288; CHECK-RV64-NEXT:    j .LBB61_697
11289; CHECK-RV64-NEXT:  .LBB61_179: # %else694
11290; CHECK-RV64-NEXT:    slli a1, a2, 16
11291; CHECK-RV64-NEXT:    bgez a1, .LBB61_180
11292; CHECK-RV64-NEXT:    j .LBB61_698
11293; CHECK-RV64-NEXT:  .LBB61_180: # %else698
11294; CHECK-RV64-NEXT:    slli a1, a2, 15
11295; CHECK-RV64-NEXT:    bgez a1, .LBB61_181
11296; CHECK-RV64-NEXT:    j .LBB61_699
11297; CHECK-RV64-NEXT:  .LBB61_181: # %else702
11298; CHECK-RV64-NEXT:    slli a1, a2, 14
11299; CHECK-RV64-NEXT:    bgez a1, .LBB61_182
11300; CHECK-RV64-NEXT:    j .LBB61_700
11301; CHECK-RV64-NEXT:  .LBB61_182: # %else706
11302; CHECK-RV64-NEXT:    slli a1, a2, 13
11303; CHECK-RV64-NEXT:    bgez a1, .LBB61_183
11304; CHECK-RV64-NEXT:    j .LBB61_701
11305; CHECK-RV64-NEXT:  .LBB61_183: # %else710
11306; CHECK-RV64-NEXT:    slli a1, a2, 12
11307; CHECK-RV64-NEXT:    bgez a1, .LBB61_184
11308; CHECK-RV64-NEXT:    j .LBB61_702
11309; CHECK-RV64-NEXT:  .LBB61_184: # %else714
11310; CHECK-RV64-NEXT:    slli a1, a2, 11
11311; CHECK-RV64-NEXT:    bgez a1, .LBB61_185
11312; CHECK-RV64-NEXT:    j .LBB61_703
11313; CHECK-RV64-NEXT:  .LBB61_185: # %else718
11314; CHECK-RV64-NEXT:    slli a1, a2, 10
11315; CHECK-RV64-NEXT:    bgez a1, .LBB61_186
11316; CHECK-RV64-NEXT:    j .LBB61_704
11317; CHECK-RV64-NEXT:  .LBB61_186: # %else722
11318; CHECK-RV64-NEXT:    slli a1, a2, 9
11319; CHECK-RV64-NEXT:    bgez a1, .LBB61_187
11320; CHECK-RV64-NEXT:    j .LBB61_705
11321; CHECK-RV64-NEXT:  .LBB61_187: # %else726
11322; CHECK-RV64-NEXT:    slli a1, a2, 8
11323; CHECK-RV64-NEXT:    bgez a1, .LBB61_188
11324; CHECK-RV64-NEXT:    j .LBB61_706
11325; CHECK-RV64-NEXT:  .LBB61_188: # %else730
11326; CHECK-RV64-NEXT:    slli a1, a2, 7
11327; CHECK-RV64-NEXT:    bgez a1, .LBB61_189
11328; CHECK-RV64-NEXT:    j .LBB61_707
11329; CHECK-RV64-NEXT:  .LBB61_189: # %else734
11330; CHECK-RV64-NEXT:    slli a1, a2, 6
11331; CHECK-RV64-NEXT:    bgez a1, .LBB61_190
11332; CHECK-RV64-NEXT:    j .LBB61_708
11333; CHECK-RV64-NEXT:  .LBB61_190: # %else738
11334; CHECK-RV64-NEXT:    slli a1, a2, 5
11335; CHECK-RV64-NEXT:    bgez a1, .LBB61_191
11336; CHECK-RV64-NEXT:    j .LBB61_709
11337; CHECK-RV64-NEXT:  .LBB61_191: # %else742
11338; CHECK-RV64-NEXT:    slli a1, a2, 4
11339; CHECK-RV64-NEXT:    bgez a1, .LBB61_192
11340; CHECK-RV64-NEXT:    j .LBB61_710
11341; CHECK-RV64-NEXT:  .LBB61_192: # %else746
11342; CHECK-RV64-NEXT:    slli a1, a2, 3
11343; CHECK-RV64-NEXT:    bgez a1, .LBB61_193
11344; CHECK-RV64-NEXT:    j .LBB61_711
11345; CHECK-RV64-NEXT:  .LBB61_193: # %else750
11346; CHECK-RV64-NEXT:    slli a1, a2, 2
11347; CHECK-RV64-NEXT:    bgez a1, .LBB61_195
11348; CHECK-RV64-NEXT:  .LBB61_194: # %cond.load753
11349; CHECK-RV64-NEXT:    lbu a1, 0(a0)
11350; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
11351; CHECK-RV64-NEXT:    vmv8r.v v16, v8
11352; CHECK-RV64-NEXT:    vmv.s.x v12, a1
11353; CHECK-RV64-NEXT:    li a1, 190
11354; CHECK-RV64-NEXT:    li a3, 189
11355; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m4, tu, ma
11356; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
11357; CHECK-RV64-NEXT:    addi a0, a0, 1
11358; CHECK-RV64-NEXT:    vmv4r.v v16, v8
11359; CHECK-RV64-NEXT:    vmv8r.v v8, v16
11360; CHECK-RV64-NEXT:  .LBB61_195: # %else754
11361; CHECK-RV64-NEXT:    slli a1, a2, 1
11362; CHECK-RV64-NEXT:    vsetivli zero, 1, e64, m1, ta, ma
11363; CHECK-RV64-NEXT:    vslidedown.vi v16, v0, 3
11364; CHECK-RV64-NEXT:    bgez a1, .LBB61_197
11365; CHECK-RV64-NEXT:  # %bb.196: # %cond.load757
11366; CHECK-RV64-NEXT:    lbu a1, 0(a0)
11367; CHECK-RV64-NEXT:    vmv8r.v v24, v8
11368; CHECK-RV64-NEXT:    vmv.s.x v12, a1
11369; CHECK-RV64-NEXT:    li a1, 191
11370; CHECK-RV64-NEXT:    li a3, 190
11371; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m4, tu, ma
11372; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
11373; CHECK-RV64-NEXT:    addi a0, a0, 1
11374; CHECK-RV64-NEXT:    vmv4r.v v24, v8
11375; CHECK-RV64-NEXT:    vmv8r.v v8, v24
11376; CHECK-RV64-NEXT:  .LBB61_197: # %else758
11377; CHECK-RV64-NEXT:    vsetivli zero, 1, e64, m1, ta, ma
11378; CHECK-RV64-NEXT:    vmv.x.s a1, v16
11379; CHECK-RV64-NEXT:    bgez a2, .LBB61_198
11380; CHECK-RV64-NEXT:    j .LBB61_712
11381; CHECK-RV64-NEXT:  .LBB61_198: # %else762
11382; CHECK-RV64-NEXT:    andi a2, a1, 1
11383; CHECK-RV64-NEXT:    beqz a2, .LBB61_199
11384; CHECK-RV64-NEXT:    j .LBB61_713
11385; CHECK-RV64-NEXT:  .LBB61_199: # %else766
11386; CHECK-RV64-NEXT:    andi a2, a1, 2
11387; CHECK-RV64-NEXT:    beqz a2, .LBB61_200
11388; CHECK-RV64-NEXT:    j .LBB61_714
11389; CHECK-RV64-NEXT:  .LBB61_200: # %else770
11390; CHECK-RV64-NEXT:    andi a2, a1, 4
11391; CHECK-RV64-NEXT:    beqz a2, .LBB61_201
11392; CHECK-RV64-NEXT:    j .LBB61_715
11393; CHECK-RV64-NEXT:  .LBB61_201: # %else774
11394; CHECK-RV64-NEXT:    andi a2, a1, 8
11395; CHECK-RV64-NEXT:    beqz a2, .LBB61_202
11396; CHECK-RV64-NEXT:    j .LBB61_716
11397; CHECK-RV64-NEXT:  .LBB61_202: # %else778
11398; CHECK-RV64-NEXT:    andi a2, a1, 16
11399; CHECK-RV64-NEXT:    beqz a2, .LBB61_203
11400; CHECK-RV64-NEXT:    j .LBB61_717
11401; CHECK-RV64-NEXT:  .LBB61_203: # %else782
11402; CHECK-RV64-NEXT:    andi a2, a1, 32
11403; CHECK-RV64-NEXT:    beqz a2, .LBB61_204
11404; CHECK-RV64-NEXT:    j .LBB61_718
11405; CHECK-RV64-NEXT:  .LBB61_204: # %else786
11406; CHECK-RV64-NEXT:    andi a2, a1, 64
11407; CHECK-RV64-NEXT:    beqz a2, .LBB61_205
11408; CHECK-RV64-NEXT:    j .LBB61_719
11409; CHECK-RV64-NEXT:  .LBB61_205: # %else790
11410; CHECK-RV64-NEXT:    andi a2, a1, 128
11411; CHECK-RV64-NEXT:    beqz a2, .LBB61_206
11412; CHECK-RV64-NEXT:    j .LBB61_720
11413; CHECK-RV64-NEXT:  .LBB61_206: # %else794
11414; CHECK-RV64-NEXT:    andi a2, a1, 256
11415; CHECK-RV64-NEXT:    beqz a2, .LBB61_207
11416; CHECK-RV64-NEXT:    j .LBB61_721
11417; CHECK-RV64-NEXT:  .LBB61_207: # %else798
11418; CHECK-RV64-NEXT:    andi a2, a1, 512
11419; CHECK-RV64-NEXT:    beqz a2, .LBB61_208
11420; CHECK-RV64-NEXT:    j .LBB61_722
11421; CHECK-RV64-NEXT:  .LBB61_208: # %else802
11422; CHECK-RV64-NEXT:    andi a2, a1, 1024
11423; CHECK-RV64-NEXT:    beqz a2, .LBB61_209
11424; CHECK-RV64-NEXT:    j .LBB61_723
11425; CHECK-RV64-NEXT:  .LBB61_209: # %else806
11426; CHECK-RV64-NEXT:    slli a2, a1, 52
11427; CHECK-RV64-NEXT:    bgez a2, .LBB61_210
11428; CHECK-RV64-NEXT:    j .LBB61_724
11429; CHECK-RV64-NEXT:  .LBB61_210: # %else810
11430; CHECK-RV64-NEXT:    slli a2, a1, 51
11431; CHECK-RV64-NEXT:    bgez a2, .LBB61_211
11432; CHECK-RV64-NEXT:    j .LBB61_725
11433; CHECK-RV64-NEXT:  .LBB61_211: # %else814
11434; CHECK-RV64-NEXT:    slli a2, a1, 50
11435; CHECK-RV64-NEXT:    bgez a2, .LBB61_212
11436; CHECK-RV64-NEXT:    j .LBB61_726
11437; CHECK-RV64-NEXT:  .LBB61_212: # %else818
11438; CHECK-RV64-NEXT:    slli a2, a1, 49
11439; CHECK-RV64-NEXT:    bgez a2, .LBB61_213
11440; CHECK-RV64-NEXT:    j .LBB61_727
11441; CHECK-RV64-NEXT:  .LBB61_213: # %else822
11442; CHECK-RV64-NEXT:    slli a2, a1, 48
11443; CHECK-RV64-NEXT:    bgez a2, .LBB61_214
11444; CHECK-RV64-NEXT:    j .LBB61_728
11445; CHECK-RV64-NEXT:  .LBB61_214: # %else826
11446; CHECK-RV64-NEXT:    slli a2, a1, 47
11447; CHECK-RV64-NEXT:    bgez a2, .LBB61_215
11448; CHECK-RV64-NEXT:    j .LBB61_729
11449; CHECK-RV64-NEXT:  .LBB61_215: # %else830
11450; CHECK-RV64-NEXT:    slli a2, a1, 46
11451; CHECK-RV64-NEXT:    bgez a2, .LBB61_216
11452; CHECK-RV64-NEXT:    j .LBB61_730
11453; CHECK-RV64-NEXT:  .LBB61_216: # %else834
11454; CHECK-RV64-NEXT:    slli a2, a1, 45
11455; CHECK-RV64-NEXT:    bgez a2, .LBB61_217
11456; CHECK-RV64-NEXT:    j .LBB61_731
11457; CHECK-RV64-NEXT:  .LBB61_217: # %else838
11458; CHECK-RV64-NEXT:    slli a2, a1, 44
11459; CHECK-RV64-NEXT:    bgez a2, .LBB61_218
11460; CHECK-RV64-NEXT:    j .LBB61_732
11461; CHECK-RV64-NEXT:  .LBB61_218: # %else842
11462; CHECK-RV64-NEXT:    slli a2, a1, 43
11463; CHECK-RV64-NEXT:    bgez a2, .LBB61_219
11464; CHECK-RV64-NEXT:    j .LBB61_733
11465; CHECK-RV64-NEXT:  .LBB61_219: # %else846
11466; CHECK-RV64-NEXT:    slli a2, a1, 42
11467; CHECK-RV64-NEXT:    bgez a2, .LBB61_220
11468; CHECK-RV64-NEXT:    j .LBB61_734
11469; CHECK-RV64-NEXT:  .LBB61_220: # %else850
11470; CHECK-RV64-NEXT:    slli a2, a1, 41
11471; CHECK-RV64-NEXT:    bgez a2, .LBB61_221
11472; CHECK-RV64-NEXT:    j .LBB61_735
11473; CHECK-RV64-NEXT:  .LBB61_221: # %else854
11474; CHECK-RV64-NEXT:    slli a2, a1, 40
11475; CHECK-RV64-NEXT:    bgez a2, .LBB61_222
11476; CHECK-RV64-NEXT:    j .LBB61_736
11477; CHECK-RV64-NEXT:  .LBB61_222: # %else858
11478; CHECK-RV64-NEXT:    slli a2, a1, 39
11479; CHECK-RV64-NEXT:    bgez a2, .LBB61_223
11480; CHECK-RV64-NEXT:    j .LBB61_737
11481; CHECK-RV64-NEXT:  .LBB61_223: # %else862
11482; CHECK-RV64-NEXT:    slli a2, a1, 38
11483; CHECK-RV64-NEXT:    bgez a2, .LBB61_224
11484; CHECK-RV64-NEXT:    j .LBB61_738
11485; CHECK-RV64-NEXT:  .LBB61_224: # %else866
11486; CHECK-RV64-NEXT:    slli a2, a1, 37
11487; CHECK-RV64-NEXT:    bgez a2, .LBB61_225
11488; CHECK-RV64-NEXT:    j .LBB61_739
11489; CHECK-RV64-NEXT:  .LBB61_225: # %else870
11490; CHECK-RV64-NEXT:    slli a2, a1, 36
11491; CHECK-RV64-NEXT:    bgez a2, .LBB61_226
11492; CHECK-RV64-NEXT:    j .LBB61_740
11493; CHECK-RV64-NEXT:  .LBB61_226: # %else874
11494; CHECK-RV64-NEXT:    slli a2, a1, 35
11495; CHECK-RV64-NEXT:    bgez a2, .LBB61_227
11496; CHECK-RV64-NEXT:    j .LBB61_741
11497; CHECK-RV64-NEXT:  .LBB61_227: # %else878
11498; CHECK-RV64-NEXT:    slli a2, a1, 34
11499; CHECK-RV64-NEXT:    bgez a2, .LBB61_228
11500; CHECK-RV64-NEXT:    j .LBB61_742
11501; CHECK-RV64-NEXT:  .LBB61_228: # %else882
11502; CHECK-RV64-NEXT:    slli a2, a1, 33
11503; CHECK-RV64-NEXT:    bgez a2, .LBB61_229
11504; CHECK-RV64-NEXT:    j .LBB61_743
11505; CHECK-RV64-NEXT:  .LBB61_229: # %else886
11506; CHECK-RV64-NEXT:    slli a2, a1, 32
11507; CHECK-RV64-NEXT:    bgez a2, .LBB61_230
11508; CHECK-RV64-NEXT:    j .LBB61_744
11509; CHECK-RV64-NEXT:  .LBB61_230: # %else890
11510; CHECK-RV64-NEXT:    slli a2, a1, 31
11511; CHECK-RV64-NEXT:    bgez a2, .LBB61_231
11512; CHECK-RV64-NEXT:    j .LBB61_745
11513; CHECK-RV64-NEXT:  .LBB61_231: # %else894
11514; CHECK-RV64-NEXT:    slli a2, a1, 30
11515; CHECK-RV64-NEXT:    bgez a2, .LBB61_232
11516; CHECK-RV64-NEXT:    j .LBB61_746
11517; CHECK-RV64-NEXT:  .LBB61_232: # %else898
11518; CHECK-RV64-NEXT:    slli a2, a1, 29
11519; CHECK-RV64-NEXT:    bgez a2, .LBB61_233
11520; CHECK-RV64-NEXT:    j .LBB61_747
11521; CHECK-RV64-NEXT:  .LBB61_233: # %else902
11522; CHECK-RV64-NEXT:    slli a2, a1, 28
11523; CHECK-RV64-NEXT:    bgez a2, .LBB61_234
11524; CHECK-RV64-NEXT:    j .LBB61_748
11525; CHECK-RV64-NEXT:  .LBB61_234: # %else906
11526; CHECK-RV64-NEXT:    slli a2, a1, 27
11527; CHECK-RV64-NEXT:    bgez a2, .LBB61_235
11528; CHECK-RV64-NEXT:    j .LBB61_749
11529; CHECK-RV64-NEXT:  .LBB61_235: # %else910
11530; CHECK-RV64-NEXT:    slli a2, a1, 26
11531; CHECK-RV64-NEXT:    bgez a2, .LBB61_236
11532; CHECK-RV64-NEXT:    j .LBB61_750
11533; CHECK-RV64-NEXT:  .LBB61_236: # %else914
11534; CHECK-RV64-NEXT:    slli a2, a1, 25
11535; CHECK-RV64-NEXT:    bgez a2, .LBB61_237
11536; CHECK-RV64-NEXT:    j .LBB61_751
11537; CHECK-RV64-NEXT:  .LBB61_237: # %else918
11538; CHECK-RV64-NEXT:    slli a2, a1, 24
11539; CHECK-RV64-NEXT:    bgez a2, .LBB61_238
11540; CHECK-RV64-NEXT:    j .LBB61_752
11541; CHECK-RV64-NEXT:  .LBB61_238: # %else922
11542; CHECK-RV64-NEXT:    slli a2, a1, 23
11543; CHECK-RV64-NEXT:    bgez a2, .LBB61_239
11544; CHECK-RV64-NEXT:    j .LBB61_753
11545; CHECK-RV64-NEXT:  .LBB61_239: # %else926
11546; CHECK-RV64-NEXT:    slli a2, a1, 22
11547; CHECK-RV64-NEXT:    bgez a2, .LBB61_240
11548; CHECK-RV64-NEXT:    j .LBB61_754
11549; CHECK-RV64-NEXT:  .LBB61_240: # %else930
11550; CHECK-RV64-NEXT:    slli a2, a1, 21
11551; CHECK-RV64-NEXT:    bgez a2, .LBB61_241
11552; CHECK-RV64-NEXT:    j .LBB61_755
11553; CHECK-RV64-NEXT:  .LBB61_241: # %else934
11554; CHECK-RV64-NEXT:    slli a2, a1, 20
11555; CHECK-RV64-NEXT:    bgez a2, .LBB61_242
11556; CHECK-RV64-NEXT:    j .LBB61_756
11557; CHECK-RV64-NEXT:  .LBB61_242: # %else938
11558; CHECK-RV64-NEXT:    slli a2, a1, 19
11559; CHECK-RV64-NEXT:    bgez a2, .LBB61_243
11560; CHECK-RV64-NEXT:    j .LBB61_757
11561; CHECK-RV64-NEXT:  .LBB61_243: # %else942
11562; CHECK-RV64-NEXT:    slli a2, a1, 18
11563; CHECK-RV64-NEXT:    bgez a2, .LBB61_244
11564; CHECK-RV64-NEXT:    j .LBB61_758
11565; CHECK-RV64-NEXT:  .LBB61_244: # %else946
11566; CHECK-RV64-NEXT:    slli a2, a1, 17
11567; CHECK-RV64-NEXT:    bgez a2, .LBB61_245
11568; CHECK-RV64-NEXT:    j .LBB61_759
11569; CHECK-RV64-NEXT:  .LBB61_245: # %else950
11570; CHECK-RV64-NEXT:    slli a2, a1, 16
11571; CHECK-RV64-NEXT:    bgez a2, .LBB61_246
11572; CHECK-RV64-NEXT:    j .LBB61_760
11573; CHECK-RV64-NEXT:  .LBB61_246: # %else954
11574; CHECK-RV64-NEXT:    slli a2, a1, 15
11575; CHECK-RV64-NEXT:    bgez a2, .LBB61_247
11576; CHECK-RV64-NEXT:    j .LBB61_761
11577; CHECK-RV64-NEXT:  .LBB61_247: # %else958
11578; CHECK-RV64-NEXT:    slli a2, a1, 14
11579; CHECK-RV64-NEXT:    bgez a2, .LBB61_248
11580; CHECK-RV64-NEXT:    j .LBB61_762
11581; CHECK-RV64-NEXT:  .LBB61_248: # %else962
11582; CHECK-RV64-NEXT:    slli a2, a1, 13
11583; CHECK-RV64-NEXT:    bgez a2, .LBB61_249
11584; CHECK-RV64-NEXT:    j .LBB61_763
11585; CHECK-RV64-NEXT:  .LBB61_249: # %else966
11586; CHECK-RV64-NEXT:    slli a2, a1, 12
11587; CHECK-RV64-NEXT:    bgez a2, .LBB61_250
11588; CHECK-RV64-NEXT:    j .LBB61_764
11589; CHECK-RV64-NEXT:  .LBB61_250: # %else970
11590; CHECK-RV64-NEXT:    slli a2, a1, 11
11591; CHECK-RV64-NEXT:    bgez a2, .LBB61_251
11592; CHECK-RV64-NEXT:    j .LBB61_765
11593; CHECK-RV64-NEXT:  .LBB61_251: # %else974
11594; CHECK-RV64-NEXT:    slli a2, a1, 10
11595; CHECK-RV64-NEXT:    bgez a2, .LBB61_252
11596; CHECK-RV64-NEXT:    j .LBB61_766
11597; CHECK-RV64-NEXT:  .LBB61_252: # %else978
11598; CHECK-RV64-NEXT:    slli a2, a1, 9
11599; CHECK-RV64-NEXT:    bgez a2, .LBB61_253
11600; CHECK-RV64-NEXT:    j .LBB61_767
11601; CHECK-RV64-NEXT:  .LBB61_253: # %else982
11602; CHECK-RV64-NEXT:    slli a2, a1, 8
11603; CHECK-RV64-NEXT:    bgez a2, .LBB61_254
11604; CHECK-RV64-NEXT:    j .LBB61_768
11605; CHECK-RV64-NEXT:  .LBB61_254: # %else986
11606; CHECK-RV64-NEXT:    slli a2, a1, 7
11607; CHECK-RV64-NEXT:    bgez a2, .LBB61_255
11608; CHECK-RV64-NEXT:    j .LBB61_769
11609; CHECK-RV64-NEXT:  .LBB61_255: # %else990
11610; CHECK-RV64-NEXT:    slli a2, a1, 6
11611; CHECK-RV64-NEXT:    bgez a2, .LBB61_256
11612; CHECK-RV64-NEXT:    j .LBB61_770
11613; CHECK-RV64-NEXT:  .LBB61_256: # %else994
11614; CHECK-RV64-NEXT:    slli a2, a1, 5
11615; CHECK-RV64-NEXT:    bgez a2, .LBB61_257
11616; CHECK-RV64-NEXT:    j .LBB61_771
11617; CHECK-RV64-NEXT:  .LBB61_257: # %else998
11618; CHECK-RV64-NEXT:    slli a2, a1, 4
11619; CHECK-RV64-NEXT:    bgez a2, .LBB61_258
11620; CHECK-RV64-NEXT:    j .LBB61_772
11621; CHECK-RV64-NEXT:  .LBB61_258: # %else1002
11622; CHECK-RV64-NEXT:    slli a2, a1, 3
11623; CHECK-RV64-NEXT:    bgez a2, .LBB61_259
11624; CHECK-RV64-NEXT:    j .LBB61_773
11625; CHECK-RV64-NEXT:  .LBB61_259: # %else1006
11626; CHECK-RV64-NEXT:    slli a2, a1, 2
11627; CHECK-RV64-NEXT:    bgez a2, .LBB61_261
11628; CHECK-RV64-NEXT:  .LBB61_260: # %cond.load1009
11629; CHECK-RV64-NEXT:    lbu a2, 0(a0)
11630; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
11631; CHECK-RV64-NEXT:    vmv8r.v v16, v8
11632; CHECK-RV64-NEXT:    vmv.s.x v12, a2
11633; CHECK-RV64-NEXT:    li a2, 254
11634; CHECK-RV64-NEXT:    li a3, 253
11635; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
11636; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
11637; CHECK-RV64-NEXT:    addi a0, a0, 1
11638; CHECK-RV64-NEXT:    vmv4r.v v16, v8
11639; CHECK-RV64-NEXT:    vmv8r.v v8, v16
11640; CHECK-RV64-NEXT:  .LBB61_261: # %else1010
11641; CHECK-RV64-NEXT:    slli a2, a1, 1
11642; CHECK-RV64-NEXT:    vsetivli zero, 1, e64, m1, ta, ma
11643; CHECK-RV64-NEXT:    vslidedown.vi v16, v0, 4
11644; CHECK-RV64-NEXT:    bgez a2, .LBB61_263
11645; CHECK-RV64-NEXT:  # %bb.262: # %cond.load1013
11646; CHECK-RV64-NEXT:    lbu a2, 0(a0)
11647; CHECK-RV64-NEXT:    vmv8r.v v24, v8
11648; CHECK-RV64-NEXT:    vmv.s.x v12, a2
11649; CHECK-RV64-NEXT:    li a2, 255
11650; CHECK-RV64-NEXT:    li a3, 254
11651; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
11652; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
11653; CHECK-RV64-NEXT:    addi a0, a0, 1
11654; CHECK-RV64-NEXT:    vmv4r.v v24, v8
11655; CHECK-RV64-NEXT:    vmv8r.v v8, v24
11656; CHECK-RV64-NEXT:  .LBB61_263: # %else1014
11657; CHECK-RV64-NEXT:    vsetivli zero, 1, e64, m1, ta, ma
11658; CHECK-RV64-NEXT:    vmv.x.s a2, v16
11659; CHECK-RV64-NEXT:    bgez a1, .LBB61_264
11660; CHECK-RV64-NEXT:    j .LBB61_774
11661; CHECK-RV64-NEXT:  .LBB61_264: # %else1018
11662; CHECK-RV64-NEXT:    andi a1, a2, 1
11663; CHECK-RV64-NEXT:    beqz a1, .LBB61_265
11664; CHECK-RV64-NEXT:    j .LBB61_775
11665; CHECK-RV64-NEXT:  .LBB61_265: # %else1022
11666; CHECK-RV64-NEXT:    andi a1, a2, 2
11667; CHECK-RV64-NEXT:    beqz a1, .LBB61_266
11668; CHECK-RV64-NEXT:    j .LBB61_776
11669; CHECK-RV64-NEXT:  .LBB61_266: # %else1026
11670; CHECK-RV64-NEXT:    andi a1, a2, 4
11671; CHECK-RV64-NEXT:    beqz a1, .LBB61_267
11672; CHECK-RV64-NEXT:    j .LBB61_777
11673; CHECK-RV64-NEXT:  .LBB61_267: # %else1030
11674; CHECK-RV64-NEXT:    andi a1, a2, 8
11675; CHECK-RV64-NEXT:    beqz a1, .LBB61_268
11676; CHECK-RV64-NEXT:    j .LBB61_778
11677; CHECK-RV64-NEXT:  .LBB61_268: # %else1034
11678; CHECK-RV64-NEXT:    andi a1, a2, 16
11679; CHECK-RV64-NEXT:    beqz a1, .LBB61_269
11680; CHECK-RV64-NEXT:    j .LBB61_779
11681; CHECK-RV64-NEXT:  .LBB61_269: # %else1038
11682; CHECK-RV64-NEXT:    andi a1, a2, 32
11683; CHECK-RV64-NEXT:    beqz a1, .LBB61_270
11684; CHECK-RV64-NEXT:    j .LBB61_780
11685; CHECK-RV64-NEXT:  .LBB61_270: # %else1042
11686; CHECK-RV64-NEXT:    andi a1, a2, 64
11687; CHECK-RV64-NEXT:    beqz a1, .LBB61_271
11688; CHECK-RV64-NEXT:    j .LBB61_781
11689; CHECK-RV64-NEXT:  .LBB61_271: # %else1046
11690; CHECK-RV64-NEXT:    andi a1, a2, 128
11691; CHECK-RV64-NEXT:    beqz a1, .LBB61_272
11692; CHECK-RV64-NEXT:    j .LBB61_782
11693; CHECK-RV64-NEXT:  .LBB61_272: # %else1050
11694; CHECK-RV64-NEXT:    andi a1, a2, 256
11695; CHECK-RV64-NEXT:    beqz a1, .LBB61_273
11696; CHECK-RV64-NEXT:    j .LBB61_783
11697; CHECK-RV64-NEXT:  .LBB61_273: # %else1054
11698; CHECK-RV64-NEXT:    andi a1, a2, 512
11699; CHECK-RV64-NEXT:    beqz a1, .LBB61_274
11700; CHECK-RV64-NEXT:    j .LBB61_784
11701; CHECK-RV64-NEXT:  .LBB61_274: # %else1058
11702; CHECK-RV64-NEXT:    andi a1, a2, 1024
11703; CHECK-RV64-NEXT:    beqz a1, .LBB61_275
11704; CHECK-RV64-NEXT:    j .LBB61_785
11705; CHECK-RV64-NEXT:  .LBB61_275: # %else1062
11706; CHECK-RV64-NEXT:    slli a1, a2, 52
11707; CHECK-RV64-NEXT:    bgez a1, .LBB61_276
11708; CHECK-RV64-NEXT:    j .LBB61_786
11709; CHECK-RV64-NEXT:  .LBB61_276: # %else1066
11710; CHECK-RV64-NEXT:    slli a1, a2, 51
11711; CHECK-RV64-NEXT:    bgez a1, .LBB61_277
11712; CHECK-RV64-NEXT:    j .LBB61_787
11713; CHECK-RV64-NEXT:  .LBB61_277: # %else1070
11714; CHECK-RV64-NEXT:    slli a1, a2, 50
11715; CHECK-RV64-NEXT:    bgez a1, .LBB61_278
11716; CHECK-RV64-NEXT:    j .LBB61_788
11717; CHECK-RV64-NEXT:  .LBB61_278: # %else1074
11718; CHECK-RV64-NEXT:    slli a1, a2, 49
11719; CHECK-RV64-NEXT:    bgez a1, .LBB61_279
11720; CHECK-RV64-NEXT:    j .LBB61_789
11721; CHECK-RV64-NEXT:  .LBB61_279: # %else1078
11722; CHECK-RV64-NEXT:    slli a1, a2, 48
11723; CHECK-RV64-NEXT:    bgez a1, .LBB61_280
11724; CHECK-RV64-NEXT:    j .LBB61_790
11725; CHECK-RV64-NEXT:  .LBB61_280: # %else1082
11726; CHECK-RV64-NEXT:    slli a1, a2, 47
11727; CHECK-RV64-NEXT:    bgez a1, .LBB61_281
11728; CHECK-RV64-NEXT:    j .LBB61_791
11729; CHECK-RV64-NEXT:  .LBB61_281: # %else1086
11730; CHECK-RV64-NEXT:    slli a1, a2, 46
11731; CHECK-RV64-NEXT:    bgez a1, .LBB61_282
11732; CHECK-RV64-NEXT:    j .LBB61_792
11733; CHECK-RV64-NEXT:  .LBB61_282: # %else1090
11734; CHECK-RV64-NEXT:    slli a1, a2, 45
11735; CHECK-RV64-NEXT:    bgez a1, .LBB61_283
11736; CHECK-RV64-NEXT:    j .LBB61_793
11737; CHECK-RV64-NEXT:  .LBB61_283: # %else1094
11738; CHECK-RV64-NEXT:    slli a1, a2, 44
11739; CHECK-RV64-NEXT:    bgez a1, .LBB61_284
11740; CHECK-RV64-NEXT:    j .LBB61_794
11741; CHECK-RV64-NEXT:  .LBB61_284: # %else1098
11742; CHECK-RV64-NEXT:    slli a1, a2, 43
11743; CHECK-RV64-NEXT:    bgez a1, .LBB61_285
11744; CHECK-RV64-NEXT:    j .LBB61_795
11745; CHECK-RV64-NEXT:  .LBB61_285: # %else1102
11746; CHECK-RV64-NEXT:    slli a1, a2, 42
11747; CHECK-RV64-NEXT:    bgez a1, .LBB61_286
11748; CHECK-RV64-NEXT:    j .LBB61_796
11749; CHECK-RV64-NEXT:  .LBB61_286: # %else1106
11750; CHECK-RV64-NEXT:    slli a1, a2, 41
11751; CHECK-RV64-NEXT:    bgez a1, .LBB61_287
11752; CHECK-RV64-NEXT:    j .LBB61_797
11753; CHECK-RV64-NEXT:  .LBB61_287: # %else1110
11754; CHECK-RV64-NEXT:    slli a1, a2, 40
11755; CHECK-RV64-NEXT:    bgez a1, .LBB61_288
11756; CHECK-RV64-NEXT:    j .LBB61_798
11757; CHECK-RV64-NEXT:  .LBB61_288: # %else1114
11758; CHECK-RV64-NEXT:    slli a1, a2, 39
11759; CHECK-RV64-NEXT:    bgez a1, .LBB61_289
11760; CHECK-RV64-NEXT:    j .LBB61_799
11761; CHECK-RV64-NEXT:  .LBB61_289: # %else1118
11762; CHECK-RV64-NEXT:    slli a1, a2, 38
11763; CHECK-RV64-NEXT:    bgez a1, .LBB61_290
11764; CHECK-RV64-NEXT:    j .LBB61_800
11765; CHECK-RV64-NEXT:  .LBB61_290: # %else1122
11766; CHECK-RV64-NEXT:    slli a1, a2, 37
11767; CHECK-RV64-NEXT:    bgez a1, .LBB61_291
11768; CHECK-RV64-NEXT:    j .LBB61_801
11769; CHECK-RV64-NEXT:  .LBB61_291: # %else1126
11770; CHECK-RV64-NEXT:    slli a1, a2, 36
11771; CHECK-RV64-NEXT:    bgez a1, .LBB61_292
11772; CHECK-RV64-NEXT:    j .LBB61_802
11773; CHECK-RV64-NEXT:  .LBB61_292: # %else1130
11774; CHECK-RV64-NEXT:    slli a1, a2, 35
11775; CHECK-RV64-NEXT:    bgez a1, .LBB61_293
11776; CHECK-RV64-NEXT:    j .LBB61_803
11777; CHECK-RV64-NEXT:  .LBB61_293: # %else1134
11778; CHECK-RV64-NEXT:    slli a1, a2, 34
11779; CHECK-RV64-NEXT:    bgez a1, .LBB61_294
11780; CHECK-RV64-NEXT:    j .LBB61_804
11781; CHECK-RV64-NEXT:  .LBB61_294: # %else1138
11782; CHECK-RV64-NEXT:    slli a1, a2, 33
11783; CHECK-RV64-NEXT:    bgez a1, .LBB61_295
11784; CHECK-RV64-NEXT:    j .LBB61_805
11785; CHECK-RV64-NEXT:  .LBB61_295: # %else1142
11786; CHECK-RV64-NEXT:    slli a1, a2, 32
11787; CHECK-RV64-NEXT:    bgez a1, .LBB61_296
11788; CHECK-RV64-NEXT:    j .LBB61_806
11789; CHECK-RV64-NEXT:  .LBB61_296: # %else1146
11790; CHECK-RV64-NEXT:    slli a1, a2, 31
11791; CHECK-RV64-NEXT:    bgez a1, .LBB61_297
11792; CHECK-RV64-NEXT:    j .LBB61_807
11793; CHECK-RV64-NEXT:  .LBB61_297: # %else1150
11794; CHECK-RV64-NEXT:    slli a1, a2, 30
11795; CHECK-RV64-NEXT:    bgez a1, .LBB61_298
11796; CHECK-RV64-NEXT:    j .LBB61_808
11797; CHECK-RV64-NEXT:  .LBB61_298: # %else1154
11798; CHECK-RV64-NEXT:    slli a1, a2, 29
11799; CHECK-RV64-NEXT:    bgez a1, .LBB61_299
11800; CHECK-RV64-NEXT:    j .LBB61_809
11801; CHECK-RV64-NEXT:  .LBB61_299: # %else1158
11802; CHECK-RV64-NEXT:    slli a1, a2, 28
11803; CHECK-RV64-NEXT:    bgez a1, .LBB61_300
11804; CHECK-RV64-NEXT:    j .LBB61_810
11805; CHECK-RV64-NEXT:  .LBB61_300: # %else1162
11806; CHECK-RV64-NEXT:    slli a1, a2, 27
11807; CHECK-RV64-NEXT:    bgez a1, .LBB61_301
11808; CHECK-RV64-NEXT:    j .LBB61_811
11809; CHECK-RV64-NEXT:  .LBB61_301: # %else1166
11810; CHECK-RV64-NEXT:    slli a1, a2, 26
11811; CHECK-RV64-NEXT:    bgez a1, .LBB61_302
11812; CHECK-RV64-NEXT:    j .LBB61_812
11813; CHECK-RV64-NEXT:  .LBB61_302: # %else1170
11814; CHECK-RV64-NEXT:    slli a1, a2, 25
11815; CHECK-RV64-NEXT:    bgez a1, .LBB61_303
11816; CHECK-RV64-NEXT:    j .LBB61_813
11817; CHECK-RV64-NEXT:  .LBB61_303: # %else1174
11818; CHECK-RV64-NEXT:    slli a1, a2, 24
11819; CHECK-RV64-NEXT:    bgez a1, .LBB61_304
11820; CHECK-RV64-NEXT:    j .LBB61_814
11821; CHECK-RV64-NEXT:  .LBB61_304: # %else1178
11822; CHECK-RV64-NEXT:    slli a1, a2, 23
11823; CHECK-RV64-NEXT:    bgez a1, .LBB61_305
11824; CHECK-RV64-NEXT:    j .LBB61_815
11825; CHECK-RV64-NEXT:  .LBB61_305: # %else1182
11826; CHECK-RV64-NEXT:    slli a1, a2, 22
11827; CHECK-RV64-NEXT:    bgez a1, .LBB61_306
11828; CHECK-RV64-NEXT:    j .LBB61_816
11829; CHECK-RV64-NEXT:  .LBB61_306: # %else1186
11830; CHECK-RV64-NEXT:    slli a1, a2, 21
11831; CHECK-RV64-NEXT:    bgez a1, .LBB61_307
11832; CHECK-RV64-NEXT:    j .LBB61_817
11833; CHECK-RV64-NEXT:  .LBB61_307: # %else1190
11834; CHECK-RV64-NEXT:    slli a1, a2, 20
11835; CHECK-RV64-NEXT:    bgez a1, .LBB61_308
11836; CHECK-RV64-NEXT:    j .LBB61_818
11837; CHECK-RV64-NEXT:  .LBB61_308: # %else1194
11838; CHECK-RV64-NEXT:    slli a1, a2, 19
11839; CHECK-RV64-NEXT:    bgez a1, .LBB61_309
11840; CHECK-RV64-NEXT:    j .LBB61_819
11841; CHECK-RV64-NEXT:  .LBB61_309: # %else1198
11842; CHECK-RV64-NEXT:    slli a1, a2, 18
11843; CHECK-RV64-NEXT:    bgez a1, .LBB61_310
11844; CHECK-RV64-NEXT:    j .LBB61_820
11845; CHECK-RV64-NEXT:  .LBB61_310: # %else1202
11846; CHECK-RV64-NEXT:    slli a1, a2, 17
11847; CHECK-RV64-NEXT:    bgez a1, .LBB61_311
11848; CHECK-RV64-NEXT:    j .LBB61_821
11849; CHECK-RV64-NEXT:  .LBB61_311: # %else1206
11850; CHECK-RV64-NEXT:    slli a1, a2, 16
11851; CHECK-RV64-NEXT:    bgez a1, .LBB61_312
11852; CHECK-RV64-NEXT:    j .LBB61_822
11853; CHECK-RV64-NEXT:  .LBB61_312: # %else1210
11854; CHECK-RV64-NEXT:    slli a1, a2, 15
11855; CHECK-RV64-NEXT:    bgez a1, .LBB61_313
11856; CHECK-RV64-NEXT:    j .LBB61_823
11857; CHECK-RV64-NEXT:  .LBB61_313: # %else1214
11858; CHECK-RV64-NEXT:    slli a1, a2, 14
11859; CHECK-RV64-NEXT:    bgez a1, .LBB61_314
11860; CHECK-RV64-NEXT:    j .LBB61_824
11861; CHECK-RV64-NEXT:  .LBB61_314: # %else1218
11862; CHECK-RV64-NEXT:    slli a1, a2, 13
11863; CHECK-RV64-NEXT:    bgez a1, .LBB61_315
11864; CHECK-RV64-NEXT:    j .LBB61_825
11865; CHECK-RV64-NEXT:  .LBB61_315: # %else1222
11866; CHECK-RV64-NEXT:    slli a1, a2, 12
11867; CHECK-RV64-NEXT:    bgez a1, .LBB61_316
11868; CHECK-RV64-NEXT:    j .LBB61_826
11869; CHECK-RV64-NEXT:  .LBB61_316: # %else1226
11870; CHECK-RV64-NEXT:    slli a1, a2, 11
11871; CHECK-RV64-NEXT:    bgez a1, .LBB61_317
11872; CHECK-RV64-NEXT:    j .LBB61_827
11873; CHECK-RV64-NEXT:  .LBB61_317: # %else1230
11874; CHECK-RV64-NEXT:    slli a1, a2, 10
11875; CHECK-RV64-NEXT:    bgez a1, .LBB61_318
11876; CHECK-RV64-NEXT:    j .LBB61_828
11877; CHECK-RV64-NEXT:  .LBB61_318: # %else1234
11878; CHECK-RV64-NEXT:    slli a1, a2, 9
11879; CHECK-RV64-NEXT:    bgez a1, .LBB61_319
11880; CHECK-RV64-NEXT:    j .LBB61_829
11881; CHECK-RV64-NEXT:  .LBB61_319: # %else1238
11882; CHECK-RV64-NEXT:    slli a1, a2, 8
11883; CHECK-RV64-NEXT:    bgez a1, .LBB61_320
11884; CHECK-RV64-NEXT:    j .LBB61_830
11885; CHECK-RV64-NEXT:  .LBB61_320: # %else1242
11886; CHECK-RV64-NEXT:    slli a1, a2, 7
11887; CHECK-RV64-NEXT:    bgez a1, .LBB61_321
11888; CHECK-RV64-NEXT:    j .LBB61_831
11889; CHECK-RV64-NEXT:  .LBB61_321: # %else1246
11890; CHECK-RV64-NEXT:    slli a1, a2, 6
11891; CHECK-RV64-NEXT:    bgez a1, .LBB61_322
11892; CHECK-RV64-NEXT:    j .LBB61_832
11893; CHECK-RV64-NEXT:  .LBB61_322: # %else1250
11894; CHECK-RV64-NEXT:    slli a1, a2, 5
11895; CHECK-RV64-NEXT:    bgez a1, .LBB61_323
11896; CHECK-RV64-NEXT:    j .LBB61_833
11897; CHECK-RV64-NEXT:  .LBB61_323: # %else1254
11898; CHECK-RV64-NEXT:    slli a1, a2, 4
11899; CHECK-RV64-NEXT:    bgez a1, .LBB61_324
11900; CHECK-RV64-NEXT:    j .LBB61_834
11901; CHECK-RV64-NEXT:  .LBB61_324: # %else1258
11902; CHECK-RV64-NEXT:    slli a1, a2, 3
11903; CHECK-RV64-NEXT:    bgez a1, .LBB61_325
11904; CHECK-RV64-NEXT:    j .LBB61_835
11905; CHECK-RV64-NEXT:  .LBB61_325: # %else1262
11906; CHECK-RV64-NEXT:    slli a1, a2, 2
11907; CHECK-RV64-NEXT:    bgez a1, .LBB61_327
11908; CHECK-RV64-NEXT:  .LBB61_326: # %cond.load1265
11909; CHECK-RV64-NEXT:    lbu a1, 0(a0)
11910; CHECK-RV64-NEXT:    li a3, 512
11911; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
11912; CHECK-RV64-NEXT:    vmv.s.x v16, a1
11913; CHECK-RV64-NEXT:    li a1, 318
11914; CHECK-RV64-NEXT:    li a3, 317
11915; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
11916; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
11917; CHECK-RV64-NEXT:    addi a0, a0, 1
11918; CHECK-RV64-NEXT:  .LBB61_327: # %else1266
11919; CHECK-RV64-NEXT:    slli a1, a2, 1
11920; CHECK-RV64-NEXT:    vsetivli zero, 1, e64, m1, ta, ma
11921; CHECK-RV64-NEXT:    vslidedown.vi v16, v0, 5
11922; CHECK-RV64-NEXT:    bgez a1, .LBB61_329
11923; CHECK-RV64-NEXT:  # %bb.328: # %cond.load1269
11924; CHECK-RV64-NEXT:    lbu a1, 0(a0)
11925; CHECK-RV64-NEXT:    vmv.s.x v24, a1
11926; CHECK-RV64-NEXT:    li a1, 319
11927; CHECK-RV64-NEXT:    li a3, 318
11928; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
11929; CHECK-RV64-NEXT:    vslideup.vx v8, v24, a3
11930; CHECK-RV64-NEXT:    addi a0, a0, 1
11931; CHECK-RV64-NEXT:  .LBB61_329: # %else1270
11932; CHECK-RV64-NEXT:    vsetivli zero, 1, e64, m1, ta, ma
11933; CHECK-RV64-NEXT:    vmv.x.s a1, v16
11934; CHECK-RV64-NEXT:    bgez a2, .LBB61_330
11935; CHECK-RV64-NEXT:    j .LBB61_836
11936; CHECK-RV64-NEXT:  .LBB61_330: # %else1274
11937; CHECK-RV64-NEXT:    andi a2, a1, 1
11938; CHECK-RV64-NEXT:    beqz a2, .LBB61_331
11939; CHECK-RV64-NEXT:    j .LBB61_837
11940; CHECK-RV64-NEXT:  .LBB61_331: # %else1278
11941; CHECK-RV64-NEXT:    andi a2, a1, 2
11942; CHECK-RV64-NEXT:    beqz a2, .LBB61_332
11943; CHECK-RV64-NEXT:    j .LBB61_838
11944; CHECK-RV64-NEXT:  .LBB61_332: # %else1282
11945; CHECK-RV64-NEXT:    andi a2, a1, 4
11946; CHECK-RV64-NEXT:    beqz a2, .LBB61_333
11947; CHECK-RV64-NEXT:    j .LBB61_839
11948; CHECK-RV64-NEXT:  .LBB61_333: # %else1286
11949; CHECK-RV64-NEXT:    andi a2, a1, 8
11950; CHECK-RV64-NEXT:    beqz a2, .LBB61_334
11951; CHECK-RV64-NEXT:    j .LBB61_840
11952; CHECK-RV64-NEXT:  .LBB61_334: # %else1290
11953; CHECK-RV64-NEXT:    andi a2, a1, 16
11954; CHECK-RV64-NEXT:    beqz a2, .LBB61_335
11955; CHECK-RV64-NEXT:    j .LBB61_841
11956; CHECK-RV64-NEXT:  .LBB61_335: # %else1294
11957; CHECK-RV64-NEXT:    andi a2, a1, 32
11958; CHECK-RV64-NEXT:    beqz a2, .LBB61_336
11959; CHECK-RV64-NEXT:    j .LBB61_842
11960; CHECK-RV64-NEXT:  .LBB61_336: # %else1298
11961; CHECK-RV64-NEXT:    andi a2, a1, 64
11962; CHECK-RV64-NEXT:    beqz a2, .LBB61_337
11963; CHECK-RV64-NEXT:    j .LBB61_843
11964; CHECK-RV64-NEXT:  .LBB61_337: # %else1302
11965; CHECK-RV64-NEXT:    andi a2, a1, 128
11966; CHECK-RV64-NEXT:    beqz a2, .LBB61_338
11967; CHECK-RV64-NEXT:    j .LBB61_844
11968; CHECK-RV64-NEXT:  .LBB61_338: # %else1306
11969; CHECK-RV64-NEXT:    andi a2, a1, 256
11970; CHECK-RV64-NEXT:    beqz a2, .LBB61_339
11971; CHECK-RV64-NEXT:    j .LBB61_845
11972; CHECK-RV64-NEXT:  .LBB61_339: # %else1310
11973; CHECK-RV64-NEXT:    andi a2, a1, 512
11974; CHECK-RV64-NEXT:    beqz a2, .LBB61_340
11975; CHECK-RV64-NEXT:    j .LBB61_846
11976; CHECK-RV64-NEXT:  .LBB61_340: # %else1314
11977; CHECK-RV64-NEXT:    andi a2, a1, 1024
11978; CHECK-RV64-NEXT:    beqz a2, .LBB61_341
11979; CHECK-RV64-NEXT:    j .LBB61_847
11980; CHECK-RV64-NEXT:  .LBB61_341: # %else1318
11981; CHECK-RV64-NEXT:    slli a2, a1, 52
11982; CHECK-RV64-NEXT:    bgez a2, .LBB61_342
11983; CHECK-RV64-NEXT:    j .LBB61_848
11984; CHECK-RV64-NEXT:  .LBB61_342: # %else1322
11985; CHECK-RV64-NEXT:    slli a2, a1, 51
11986; CHECK-RV64-NEXT:    bgez a2, .LBB61_343
11987; CHECK-RV64-NEXT:    j .LBB61_849
11988; CHECK-RV64-NEXT:  .LBB61_343: # %else1326
11989; CHECK-RV64-NEXT:    slli a2, a1, 50
11990; CHECK-RV64-NEXT:    bgez a2, .LBB61_344
11991; CHECK-RV64-NEXT:    j .LBB61_850
11992; CHECK-RV64-NEXT:  .LBB61_344: # %else1330
11993; CHECK-RV64-NEXT:    slli a2, a1, 49
11994; CHECK-RV64-NEXT:    bgez a2, .LBB61_345
11995; CHECK-RV64-NEXT:    j .LBB61_851
11996; CHECK-RV64-NEXT:  .LBB61_345: # %else1334
11997; CHECK-RV64-NEXT:    slli a2, a1, 48
11998; CHECK-RV64-NEXT:    bgez a2, .LBB61_346
11999; CHECK-RV64-NEXT:    j .LBB61_852
12000; CHECK-RV64-NEXT:  .LBB61_346: # %else1338
12001; CHECK-RV64-NEXT:    slli a2, a1, 47
12002; CHECK-RV64-NEXT:    bgez a2, .LBB61_347
12003; CHECK-RV64-NEXT:    j .LBB61_853
12004; CHECK-RV64-NEXT:  .LBB61_347: # %else1342
12005; CHECK-RV64-NEXT:    slli a2, a1, 46
12006; CHECK-RV64-NEXT:    bgez a2, .LBB61_348
12007; CHECK-RV64-NEXT:    j .LBB61_854
12008; CHECK-RV64-NEXT:  .LBB61_348: # %else1346
12009; CHECK-RV64-NEXT:    slli a2, a1, 45
12010; CHECK-RV64-NEXT:    bgez a2, .LBB61_349
12011; CHECK-RV64-NEXT:    j .LBB61_855
12012; CHECK-RV64-NEXT:  .LBB61_349: # %else1350
12013; CHECK-RV64-NEXT:    slli a2, a1, 44
12014; CHECK-RV64-NEXT:    bgez a2, .LBB61_350
12015; CHECK-RV64-NEXT:    j .LBB61_856
12016; CHECK-RV64-NEXT:  .LBB61_350: # %else1354
12017; CHECK-RV64-NEXT:    slli a2, a1, 43
12018; CHECK-RV64-NEXT:    bgez a2, .LBB61_351
12019; CHECK-RV64-NEXT:    j .LBB61_857
12020; CHECK-RV64-NEXT:  .LBB61_351: # %else1358
12021; CHECK-RV64-NEXT:    slli a2, a1, 42
12022; CHECK-RV64-NEXT:    bgez a2, .LBB61_352
12023; CHECK-RV64-NEXT:    j .LBB61_858
12024; CHECK-RV64-NEXT:  .LBB61_352: # %else1362
12025; CHECK-RV64-NEXT:    slli a2, a1, 41
12026; CHECK-RV64-NEXT:    bgez a2, .LBB61_353
12027; CHECK-RV64-NEXT:    j .LBB61_859
12028; CHECK-RV64-NEXT:  .LBB61_353: # %else1366
12029; CHECK-RV64-NEXT:    slli a2, a1, 40
12030; CHECK-RV64-NEXT:    bgez a2, .LBB61_354
12031; CHECK-RV64-NEXT:    j .LBB61_860
12032; CHECK-RV64-NEXT:  .LBB61_354: # %else1370
12033; CHECK-RV64-NEXT:    slli a2, a1, 39
12034; CHECK-RV64-NEXT:    bgez a2, .LBB61_355
12035; CHECK-RV64-NEXT:    j .LBB61_861
12036; CHECK-RV64-NEXT:  .LBB61_355: # %else1374
12037; CHECK-RV64-NEXT:    slli a2, a1, 38
12038; CHECK-RV64-NEXT:    bgez a2, .LBB61_356
12039; CHECK-RV64-NEXT:    j .LBB61_862
12040; CHECK-RV64-NEXT:  .LBB61_356: # %else1378
12041; CHECK-RV64-NEXT:    slli a2, a1, 37
12042; CHECK-RV64-NEXT:    bgez a2, .LBB61_357
12043; CHECK-RV64-NEXT:    j .LBB61_863
12044; CHECK-RV64-NEXT:  .LBB61_357: # %else1382
12045; CHECK-RV64-NEXT:    slli a2, a1, 36
12046; CHECK-RV64-NEXT:    bgez a2, .LBB61_358
12047; CHECK-RV64-NEXT:    j .LBB61_864
12048; CHECK-RV64-NEXT:  .LBB61_358: # %else1386
12049; CHECK-RV64-NEXT:    slli a2, a1, 35
12050; CHECK-RV64-NEXT:    bgez a2, .LBB61_359
12051; CHECK-RV64-NEXT:    j .LBB61_865
12052; CHECK-RV64-NEXT:  .LBB61_359: # %else1390
12053; CHECK-RV64-NEXT:    slli a2, a1, 34
12054; CHECK-RV64-NEXT:    bgez a2, .LBB61_360
12055; CHECK-RV64-NEXT:    j .LBB61_866
12056; CHECK-RV64-NEXT:  .LBB61_360: # %else1394
12057; CHECK-RV64-NEXT:    slli a2, a1, 33
12058; CHECK-RV64-NEXT:    bgez a2, .LBB61_361
12059; CHECK-RV64-NEXT:    j .LBB61_867
12060; CHECK-RV64-NEXT:  .LBB61_361: # %else1398
12061; CHECK-RV64-NEXT:    slli a2, a1, 32
12062; CHECK-RV64-NEXT:    bgez a2, .LBB61_362
12063; CHECK-RV64-NEXT:    j .LBB61_868
12064; CHECK-RV64-NEXT:  .LBB61_362: # %else1402
12065; CHECK-RV64-NEXT:    slli a2, a1, 31
12066; CHECK-RV64-NEXT:    bgez a2, .LBB61_363
12067; CHECK-RV64-NEXT:    j .LBB61_869
12068; CHECK-RV64-NEXT:  .LBB61_363: # %else1406
12069; CHECK-RV64-NEXT:    slli a2, a1, 30
12070; CHECK-RV64-NEXT:    bgez a2, .LBB61_364
12071; CHECK-RV64-NEXT:    j .LBB61_870
12072; CHECK-RV64-NEXT:  .LBB61_364: # %else1410
12073; CHECK-RV64-NEXT:    slli a2, a1, 29
12074; CHECK-RV64-NEXT:    bgez a2, .LBB61_365
12075; CHECK-RV64-NEXT:    j .LBB61_871
12076; CHECK-RV64-NEXT:  .LBB61_365: # %else1414
12077; CHECK-RV64-NEXT:    slli a2, a1, 28
12078; CHECK-RV64-NEXT:    bgez a2, .LBB61_366
12079; CHECK-RV64-NEXT:    j .LBB61_872
12080; CHECK-RV64-NEXT:  .LBB61_366: # %else1418
12081; CHECK-RV64-NEXT:    slli a2, a1, 27
12082; CHECK-RV64-NEXT:    bgez a2, .LBB61_367
12083; CHECK-RV64-NEXT:    j .LBB61_873
12084; CHECK-RV64-NEXT:  .LBB61_367: # %else1422
12085; CHECK-RV64-NEXT:    slli a2, a1, 26
12086; CHECK-RV64-NEXT:    bgez a2, .LBB61_368
12087; CHECK-RV64-NEXT:    j .LBB61_874
12088; CHECK-RV64-NEXT:  .LBB61_368: # %else1426
12089; CHECK-RV64-NEXT:    slli a2, a1, 25
12090; CHECK-RV64-NEXT:    bgez a2, .LBB61_369
12091; CHECK-RV64-NEXT:    j .LBB61_875
12092; CHECK-RV64-NEXT:  .LBB61_369: # %else1430
12093; CHECK-RV64-NEXT:    slli a2, a1, 24
12094; CHECK-RV64-NEXT:    bgez a2, .LBB61_370
12095; CHECK-RV64-NEXT:    j .LBB61_876
12096; CHECK-RV64-NEXT:  .LBB61_370: # %else1434
12097; CHECK-RV64-NEXT:    slli a2, a1, 23
12098; CHECK-RV64-NEXT:    bgez a2, .LBB61_371
12099; CHECK-RV64-NEXT:    j .LBB61_877
12100; CHECK-RV64-NEXT:  .LBB61_371: # %else1438
12101; CHECK-RV64-NEXT:    slli a2, a1, 22
12102; CHECK-RV64-NEXT:    bgez a2, .LBB61_372
12103; CHECK-RV64-NEXT:    j .LBB61_878
12104; CHECK-RV64-NEXT:  .LBB61_372: # %else1442
12105; CHECK-RV64-NEXT:    slli a2, a1, 21
12106; CHECK-RV64-NEXT:    bgez a2, .LBB61_373
12107; CHECK-RV64-NEXT:    j .LBB61_879
12108; CHECK-RV64-NEXT:  .LBB61_373: # %else1446
12109; CHECK-RV64-NEXT:    slli a2, a1, 20
12110; CHECK-RV64-NEXT:    bgez a2, .LBB61_374
12111; CHECK-RV64-NEXT:    j .LBB61_880
12112; CHECK-RV64-NEXT:  .LBB61_374: # %else1450
12113; CHECK-RV64-NEXT:    slli a2, a1, 19
12114; CHECK-RV64-NEXT:    bgez a2, .LBB61_375
12115; CHECK-RV64-NEXT:    j .LBB61_881
12116; CHECK-RV64-NEXT:  .LBB61_375: # %else1454
12117; CHECK-RV64-NEXT:    slli a2, a1, 18
12118; CHECK-RV64-NEXT:    bgez a2, .LBB61_376
12119; CHECK-RV64-NEXT:    j .LBB61_882
12120; CHECK-RV64-NEXT:  .LBB61_376: # %else1458
12121; CHECK-RV64-NEXT:    slli a2, a1, 17
12122; CHECK-RV64-NEXT:    bgez a2, .LBB61_377
12123; CHECK-RV64-NEXT:    j .LBB61_883
12124; CHECK-RV64-NEXT:  .LBB61_377: # %else1462
12125; CHECK-RV64-NEXT:    slli a2, a1, 16
12126; CHECK-RV64-NEXT:    bgez a2, .LBB61_378
12127; CHECK-RV64-NEXT:    j .LBB61_884
12128; CHECK-RV64-NEXT:  .LBB61_378: # %else1466
12129; CHECK-RV64-NEXT:    slli a2, a1, 15
12130; CHECK-RV64-NEXT:    bgez a2, .LBB61_379
12131; CHECK-RV64-NEXT:    j .LBB61_885
12132; CHECK-RV64-NEXT:  .LBB61_379: # %else1470
12133; CHECK-RV64-NEXT:    slli a2, a1, 14
12134; CHECK-RV64-NEXT:    bgez a2, .LBB61_380
12135; CHECK-RV64-NEXT:    j .LBB61_886
12136; CHECK-RV64-NEXT:  .LBB61_380: # %else1474
12137; CHECK-RV64-NEXT:    slli a2, a1, 13
12138; CHECK-RV64-NEXT:    bgez a2, .LBB61_381
12139; CHECK-RV64-NEXT:    j .LBB61_887
12140; CHECK-RV64-NEXT:  .LBB61_381: # %else1478
12141; CHECK-RV64-NEXT:    slli a2, a1, 12
12142; CHECK-RV64-NEXT:    bgez a2, .LBB61_382
12143; CHECK-RV64-NEXT:    j .LBB61_888
12144; CHECK-RV64-NEXT:  .LBB61_382: # %else1482
12145; CHECK-RV64-NEXT:    slli a2, a1, 11
12146; CHECK-RV64-NEXT:    bgez a2, .LBB61_383
12147; CHECK-RV64-NEXT:    j .LBB61_889
12148; CHECK-RV64-NEXT:  .LBB61_383: # %else1486
12149; CHECK-RV64-NEXT:    slli a2, a1, 10
12150; CHECK-RV64-NEXT:    bgez a2, .LBB61_384
12151; CHECK-RV64-NEXT:    j .LBB61_890
12152; CHECK-RV64-NEXT:  .LBB61_384: # %else1490
12153; CHECK-RV64-NEXT:    slli a2, a1, 9
12154; CHECK-RV64-NEXT:    bgez a2, .LBB61_385
12155; CHECK-RV64-NEXT:    j .LBB61_891
12156; CHECK-RV64-NEXT:  .LBB61_385: # %else1494
12157; CHECK-RV64-NEXT:    slli a2, a1, 8
12158; CHECK-RV64-NEXT:    bgez a2, .LBB61_386
12159; CHECK-RV64-NEXT:    j .LBB61_892
12160; CHECK-RV64-NEXT:  .LBB61_386: # %else1498
12161; CHECK-RV64-NEXT:    slli a2, a1, 7
12162; CHECK-RV64-NEXT:    bgez a2, .LBB61_387
12163; CHECK-RV64-NEXT:    j .LBB61_893
12164; CHECK-RV64-NEXT:  .LBB61_387: # %else1502
12165; CHECK-RV64-NEXT:    slli a2, a1, 6
12166; CHECK-RV64-NEXT:    bgez a2, .LBB61_388
12167; CHECK-RV64-NEXT:    j .LBB61_894
12168; CHECK-RV64-NEXT:  .LBB61_388: # %else1506
12169; CHECK-RV64-NEXT:    slli a2, a1, 5
12170; CHECK-RV64-NEXT:    bgez a2, .LBB61_389
12171; CHECK-RV64-NEXT:    j .LBB61_895
12172; CHECK-RV64-NEXT:  .LBB61_389: # %else1510
12173; CHECK-RV64-NEXT:    slli a2, a1, 4
12174; CHECK-RV64-NEXT:    bgez a2, .LBB61_390
12175; CHECK-RV64-NEXT:    j .LBB61_896
12176; CHECK-RV64-NEXT:  .LBB61_390: # %else1514
12177; CHECK-RV64-NEXT:    slli a2, a1, 3
12178; CHECK-RV64-NEXT:    bgez a2, .LBB61_391
12179; CHECK-RV64-NEXT:    j .LBB61_897
12180; CHECK-RV64-NEXT:  .LBB61_391: # %else1518
12181; CHECK-RV64-NEXT:    slli a2, a1, 2
12182; CHECK-RV64-NEXT:    bgez a2, .LBB61_393
12183; CHECK-RV64-NEXT:  .LBB61_392: # %cond.load1521
12184; CHECK-RV64-NEXT:    lbu a2, 0(a0)
12185; CHECK-RV64-NEXT:    li a3, 512
12186; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
12187; CHECK-RV64-NEXT:    vmv.s.x v16, a2
12188; CHECK-RV64-NEXT:    li a2, 382
12189; CHECK-RV64-NEXT:    li a3, 381
12190; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
12191; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
12192; CHECK-RV64-NEXT:    addi a0, a0, 1
12193; CHECK-RV64-NEXT:  .LBB61_393: # %else1522
12194; CHECK-RV64-NEXT:    slli a2, a1, 1
12195; CHECK-RV64-NEXT:    vsetivli zero, 1, e64, m1, ta, ma
12196; CHECK-RV64-NEXT:    vslidedown.vi v16, v0, 6
12197; CHECK-RV64-NEXT:    bgez a2, .LBB61_395
12198; CHECK-RV64-NEXT:  # %bb.394: # %cond.load1525
12199; CHECK-RV64-NEXT:    lbu a2, 0(a0)
12200; CHECK-RV64-NEXT:    vmv.s.x v24, a2
12201; CHECK-RV64-NEXT:    li a2, 383
12202; CHECK-RV64-NEXT:    li a3, 382
12203; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
12204; CHECK-RV64-NEXT:    vslideup.vx v8, v24, a3
12205; CHECK-RV64-NEXT:    addi a0, a0, 1
12206; CHECK-RV64-NEXT:  .LBB61_395: # %else1526
12207; CHECK-RV64-NEXT:    vsetivli zero, 1, e64, m1, ta, ma
12208; CHECK-RV64-NEXT:    vmv.x.s a2, v16
12209; CHECK-RV64-NEXT:    bgez a1, .LBB61_396
12210; CHECK-RV64-NEXT:    j .LBB61_898
12211; CHECK-RV64-NEXT:  .LBB61_396: # %else1530
12212; CHECK-RV64-NEXT:    andi a1, a2, 1
12213; CHECK-RV64-NEXT:    beqz a1, .LBB61_397
12214; CHECK-RV64-NEXT:    j .LBB61_899
12215; CHECK-RV64-NEXT:  .LBB61_397: # %else1534
12216; CHECK-RV64-NEXT:    andi a1, a2, 2
12217; CHECK-RV64-NEXT:    beqz a1, .LBB61_398
12218; CHECK-RV64-NEXT:    j .LBB61_900
12219; CHECK-RV64-NEXT:  .LBB61_398: # %else1538
12220; CHECK-RV64-NEXT:    andi a1, a2, 4
12221; CHECK-RV64-NEXT:    beqz a1, .LBB61_399
12222; CHECK-RV64-NEXT:    j .LBB61_901
12223; CHECK-RV64-NEXT:  .LBB61_399: # %else1542
12224; CHECK-RV64-NEXT:    andi a1, a2, 8
12225; CHECK-RV64-NEXT:    beqz a1, .LBB61_400
12226; CHECK-RV64-NEXT:    j .LBB61_902
12227; CHECK-RV64-NEXT:  .LBB61_400: # %else1546
12228; CHECK-RV64-NEXT:    andi a1, a2, 16
12229; CHECK-RV64-NEXT:    beqz a1, .LBB61_401
12230; CHECK-RV64-NEXT:    j .LBB61_903
12231; CHECK-RV64-NEXT:  .LBB61_401: # %else1550
12232; CHECK-RV64-NEXT:    andi a1, a2, 32
12233; CHECK-RV64-NEXT:    beqz a1, .LBB61_402
12234; CHECK-RV64-NEXT:    j .LBB61_904
12235; CHECK-RV64-NEXT:  .LBB61_402: # %else1554
12236; CHECK-RV64-NEXT:    andi a1, a2, 64
12237; CHECK-RV64-NEXT:    beqz a1, .LBB61_403
12238; CHECK-RV64-NEXT:    j .LBB61_905
12239; CHECK-RV64-NEXT:  .LBB61_403: # %else1558
12240; CHECK-RV64-NEXT:    andi a1, a2, 128
12241; CHECK-RV64-NEXT:    beqz a1, .LBB61_404
12242; CHECK-RV64-NEXT:    j .LBB61_906
12243; CHECK-RV64-NEXT:  .LBB61_404: # %else1562
12244; CHECK-RV64-NEXT:    andi a1, a2, 256
12245; CHECK-RV64-NEXT:    beqz a1, .LBB61_405
12246; CHECK-RV64-NEXT:    j .LBB61_907
12247; CHECK-RV64-NEXT:  .LBB61_405: # %else1566
12248; CHECK-RV64-NEXT:    andi a1, a2, 512
12249; CHECK-RV64-NEXT:    beqz a1, .LBB61_406
12250; CHECK-RV64-NEXT:    j .LBB61_908
12251; CHECK-RV64-NEXT:  .LBB61_406: # %else1570
12252; CHECK-RV64-NEXT:    andi a1, a2, 1024
12253; CHECK-RV64-NEXT:    beqz a1, .LBB61_407
12254; CHECK-RV64-NEXT:    j .LBB61_909
12255; CHECK-RV64-NEXT:  .LBB61_407: # %else1574
12256; CHECK-RV64-NEXT:    slli a1, a2, 52
12257; CHECK-RV64-NEXT:    bgez a1, .LBB61_408
12258; CHECK-RV64-NEXT:    j .LBB61_910
12259; CHECK-RV64-NEXT:  .LBB61_408: # %else1578
12260; CHECK-RV64-NEXT:    slli a1, a2, 51
12261; CHECK-RV64-NEXT:    bgez a1, .LBB61_409
12262; CHECK-RV64-NEXT:    j .LBB61_911
12263; CHECK-RV64-NEXT:  .LBB61_409: # %else1582
12264; CHECK-RV64-NEXT:    slli a1, a2, 50
12265; CHECK-RV64-NEXT:    bgez a1, .LBB61_410
12266; CHECK-RV64-NEXT:    j .LBB61_912
12267; CHECK-RV64-NEXT:  .LBB61_410: # %else1586
12268; CHECK-RV64-NEXT:    slli a1, a2, 49
12269; CHECK-RV64-NEXT:    bgez a1, .LBB61_411
12270; CHECK-RV64-NEXT:    j .LBB61_913
12271; CHECK-RV64-NEXT:  .LBB61_411: # %else1590
12272; CHECK-RV64-NEXT:    slli a1, a2, 48
12273; CHECK-RV64-NEXT:    bgez a1, .LBB61_412
12274; CHECK-RV64-NEXT:    j .LBB61_914
12275; CHECK-RV64-NEXT:  .LBB61_412: # %else1594
12276; CHECK-RV64-NEXT:    slli a1, a2, 47
12277; CHECK-RV64-NEXT:    bgez a1, .LBB61_413
12278; CHECK-RV64-NEXT:    j .LBB61_915
12279; CHECK-RV64-NEXT:  .LBB61_413: # %else1598
12280; CHECK-RV64-NEXT:    slli a1, a2, 46
12281; CHECK-RV64-NEXT:    bgez a1, .LBB61_414
12282; CHECK-RV64-NEXT:    j .LBB61_916
12283; CHECK-RV64-NEXT:  .LBB61_414: # %else1602
12284; CHECK-RV64-NEXT:    slli a1, a2, 45
12285; CHECK-RV64-NEXT:    bgez a1, .LBB61_415
12286; CHECK-RV64-NEXT:    j .LBB61_917
12287; CHECK-RV64-NEXT:  .LBB61_415: # %else1606
12288; CHECK-RV64-NEXT:    slli a1, a2, 44
12289; CHECK-RV64-NEXT:    bgez a1, .LBB61_416
12290; CHECK-RV64-NEXT:    j .LBB61_918
12291; CHECK-RV64-NEXT:  .LBB61_416: # %else1610
12292; CHECK-RV64-NEXT:    slli a1, a2, 43
12293; CHECK-RV64-NEXT:    bgez a1, .LBB61_417
12294; CHECK-RV64-NEXT:    j .LBB61_919
12295; CHECK-RV64-NEXT:  .LBB61_417: # %else1614
12296; CHECK-RV64-NEXT:    slli a1, a2, 42
12297; CHECK-RV64-NEXT:    bgez a1, .LBB61_418
12298; CHECK-RV64-NEXT:    j .LBB61_920
12299; CHECK-RV64-NEXT:  .LBB61_418: # %else1618
12300; CHECK-RV64-NEXT:    slli a1, a2, 41
12301; CHECK-RV64-NEXT:    bgez a1, .LBB61_419
12302; CHECK-RV64-NEXT:    j .LBB61_921
12303; CHECK-RV64-NEXT:  .LBB61_419: # %else1622
12304; CHECK-RV64-NEXT:    slli a1, a2, 40
12305; CHECK-RV64-NEXT:    bgez a1, .LBB61_420
12306; CHECK-RV64-NEXT:    j .LBB61_922
12307; CHECK-RV64-NEXT:  .LBB61_420: # %else1626
12308; CHECK-RV64-NEXT:    slli a1, a2, 39
12309; CHECK-RV64-NEXT:    bgez a1, .LBB61_421
12310; CHECK-RV64-NEXT:    j .LBB61_923
12311; CHECK-RV64-NEXT:  .LBB61_421: # %else1630
12312; CHECK-RV64-NEXT:    slli a1, a2, 38
12313; CHECK-RV64-NEXT:    bgez a1, .LBB61_422
12314; CHECK-RV64-NEXT:    j .LBB61_924
12315; CHECK-RV64-NEXT:  .LBB61_422: # %else1634
12316; CHECK-RV64-NEXT:    slli a1, a2, 37
12317; CHECK-RV64-NEXT:    bgez a1, .LBB61_423
12318; CHECK-RV64-NEXT:    j .LBB61_925
12319; CHECK-RV64-NEXT:  .LBB61_423: # %else1638
12320; CHECK-RV64-NEXT:    slli a1, a2, 36
12321; CHECK-RV64-NEXT:    bgez a1, .LBB61_424
12322; CHECK-RV64-NEXT:    j .LBB61_926
12323; CHECK-RV64-NEXT:  .LBB61_424: # %else1642
12324; CHECK-RV64-NEXT:    slli a1, a2, 35
12325; CHECK-RV64-NEXT:    bgez a1, .LBB61_425
12326; CHECK-RV64-NEXT:    j .LBB61_927
12327; CHECK-RV64-NEXT:  .LBB61_425: # %else1646
12328; CHECK-RV64-NEXT:    slli a1, a2, 34
12329; CHECK-RV64-NEXT:    bgez a1, .LBB61_426
12330; CHECK-RV64-NEXT:    j .LBB61_928
12331; CHECK-RV64-NEXT:  .LBB61_426: # %else1650
12332; CHECK-RV64-NEXT:    slli a1, a2, 33
12333; CHECK-RV64-NEXT:    bgez a1, .LBB61_427
12334; CHECK-RV64-NEXT:    j .LBB61_929
12335; CHECK-RV64-NEXT:  .LBB61_427: # %else1654
12336; CHECK-RV64-NEXT:    slli a1, a2, 32
12337; CHECK-RV64-NEXT:    bgez a1, .LBB61_428
12338; CHECK-RV64-NEXT:    j .LBB61_930
12339; CHECK-RV64-NEXT:  .LBB61_428: # %else1658
12340; CHECK-RV64-NEXT:    slli a1, a2, 31
12341; CHECK-RV64-NEXT:    bgez a1, .LBB61_429
12342; CHECK-RV64-NEXT:    j .LBB61_931
12343; CHECK-RV64-NEXT:  .LBB61_429: # %else1662
12344; CHECK-RV64-NEXT:    slli a1, a2, 30
12345; CHECK-RV64-NEXT:    bgez a1, .LBB61_430
12346; CHECK-RV64-NEXT:    j .LBB61_932
12347; CHECK-RV64-NEXT:  .LBB61_430: # %else1666
12348; CHECK-RV64-NEXT:    slli a1, a2, 29
12349; CHECK-RV64-NEXT:    bgez a1, .LBB61_431
12350; CHECK-RV64-NEXT:    j .LBB61_933
12351; CHECK-RV64-NEXT:  .LBB61_431: # %else1670
12352; CHECK-RV64-NEXT:    slli a1, a2, 28
12353; CHECK-RV64-NEXT:    bgez a1, .LBB61_432
12354; CHECK-RV64-NEXT:    j .LBB61_934
12355; CHECK-RV64-NEXT:  .LBB61_432: # %else1674
12356; CHECK-RV64-NEXT:    slli a1, a2, 27
12357; CHECK-RV64-NEXT:    bgez a1, .LBB61_433
12358; CHECK-RV64-NEXT:    j .LBB61_935
12359; CHECK-RV64-NEXT:  .LBB61_433: # %else1678
12360; CHECK-RV64-NEXT:    slli a1, a2, 26
12361; CHECK-RV64-NEXT:    bgez a1, .LBB61_434
12362; CHECK-RV64-NEXT:    j .LBB61_936
12363; CHECK-RV64-NEXT:  .LBB61_434: # %else1682
12364; CHECK-RV64-NEXT:    slli a1, a2, 25
12365; CHECK-RV64-NEXT:    bgez a1, .LBB61_435
12366; CHECK-RV64-NEXT:    j .LBB61_937
12367; CHECK-RV64-NEXT:  .LBB61_435: # %else1686
12368; CHECK-RV64-NEXT:    slli a1, a2, 24
12369; CHECK-RV64-NEXT:    bgez a1, .LBB61_436
12370; CHECK-RV64-NEXT:    j .LBB61_938
12371; CHECK-RV64-NEXT:  .LBB61_436: # %else1690
12372; CHECK-RV64-NEXT:    slli a1, a2, 23
12373; CHECK-RV64-NEXT:    bgez a1, .LBB61_437
12374; CHECK-RV64-NEXT:    j .LBB61_939
12375; CHECK-RV64-NEXT:  .LBB61_437: # %else1694
12376; CHECK-RV64-NEXT:    slli a1, a2, 22
12377; CHECK-RV64-NEXT:    bgez a1, .LBB61_438
12378; CHECK-RV64-NEXT:    j .LBB61_940
12379; CHECK-RV64-NEXT:  .LBB61_438: # %else1698
12380; CHECK-RV64-NEXT:    slli a1, a2, 21
12381; CHECK-RV64-NEXT:    bgez a1, .LBB61_439
12382; CHECK-RV64-NEXT:    j .LBB61_941
12383; CHECK-RV64-NEXT:  .LBB61_439: # %else1702
12384; CHECK-RV64-NEXT:    slli a1, a2, 20
12385; CHECK-RV64-NEXT:    bgez a1, .LBB61_440
12386; CHECK-RV64-NEXT:    j .LBB61_942
12387; CHECK-RV64-NEXT:  .LBB61_440: # %else1706
12388; CHECK-RV64-NEXT:    slli a1, a2, 19
12389; CHECK-RV64-NEXT:    bgez a1, .LBB61_441
12390; CHECK-RV64-NEXT:    j .LBB61_943
12391; CHECK-RV64-NEXT:  .LBB61_441: # %else1710
12392; CHECK-RV64-NEXT:    slli a1, a2, 18
12393; CHECK-RV64-NEXT:    bgez a1, .LBB61_442
12394; CHECK-RV64-NEXT:    j .LBB61_944
12395; CHECK-RV64-NEXT:  .LBB61_442: # %else1714
12396; CHECK-RV64-NEXT:    slli a1, a2, 17
12397; CHECK-RV64-NEXT:    bgez a1, .LBB61_443
12398; CHECK-RV64-NEXT:    j .LBB61_945
12399; CHECK-RV64-NEXT:  .LBB61_443: # %else1718
12400; CHECK-RV64-NEXT:    slli a1, a2, 16
12401; CHECK-RV64-NEXT:    bgez a1, .LBB61_444
12402; CHECK-RV64-NEXT:    j .LBB61_946
12403; CHECK-RV64-NEXT:  .LBB61_444: # %else1722
12404; CHECK-RV64-NEXT:    slli a1, a2, 15
12405; CHECK-RV64-NEXT:    bgez a1, .LBB61_445
12406; CHECK-RV64-NEXT:    j .LBB61_947
12407; CHECK-RV64-NEXT:  .LBB61_445: # %else1726
12408; CHECK-RV64-NEXT:    slli a1, a2, 14
12409; CHECK-RV64-NEXT:    bgez a1, .LBB61_446
12410; CHECK-RV64-NEXT:    j .LBB61_948
12411; CHECK-RV64-NEXT:  .LBB61_446: # %else1730
12412; CHECK-RV64-NEXT:    slli a1, a2, 13
12413; CHECK-RV64-NEXT:    bgez a1, .LBB61_447
12414; CHECK-RV64-NEXT:    j .LBB61_949
12415; CHECK-RV64-NEXT:  .LBB61_447: # %else1734
12416; CHECK-RV64-NEXT:    slli a1, a2, 12
12417; CHECK-RV64-NEXT:    bgez a1, .LBB61_448
12418; CHECK-RV64-NEXT:    j .LBB61_950
12419; CHECK-RV64-NEXT:  .LBB61_448: # %else1738
12420; CHECK-RV64-NEXT:    slli a1, a2, 11
12421; CHECK-RV64-NEXT:    bgez a1, .LBB61_449
12422; CHECK-RV64-NEXT:    j .LBB61_951
12423; CHECK-RV64-NEXT:  .LBB61_449: # %else1742
12424; CHECK-RV64-NEXT:    slli a1, a2, 10
12425; CHECK-RV64-NEXT:    bgez a1, .LBB61_450
12426; CHECK-RV64-NEXT:    j .LBB61_952
12427; CHECK-RV64-NEXT:  .LBB61_450: # %else1746
12428; CHECK-RV64-NEXT:    slli a1, a2, 9
12429; CHECK-RV64-NEXT:    bgez a1, .LBB61_451
12430; CHECK-RV64-NEXT:    j .LBB61_953
12431; CHECK-RV64-NEXT:  .LBB61_451: # %else1750
12432; CHECK-RV64-NEXT:    slli a1, a2, 8
12433; CHECK-RV64-NEXT:    bgez a1, .LBB61_452
12434; CHECK-RV64-NEXT:    j .LBB61_954
12435; CHECK-RV64-NEXT:  .LBB61_452: # %else1754
12436; CHECK-RV64-NEXT:    slli a1, a2, 7
12437; CHECK-RV64-NEXT:    bgez a1, .LBB61_453
12438; CHECK-RV64-NEXT:    j .LBB61_955
12439; CHECK-RV64-NEXT:  .LBB61_453: # %else1758
12440; CHECK-RV64-NEXT:    slli a1, a2, 6
12441; CHECK-RV64-NEXT:    bgez a1, .LBB61_454
12442; CHECK-RV64-NEXT:    j .LBB61_956
12443; CHECK-RV64-NEXT:  .LBB61_454: # %else1762
12444; CHECK-RV64-NEXT:    slli a1, a2, 5
12445; CHECK-RV64-NEXT:    bgez a1, .LBB61_455
12446; CHECK-RV64-NEXT:    j .LBB61_957
12447; CHECK-RV64-NEXT:  .LBB61_455: # %else1766
12448; CHECK-RV64-NEXT:    slli a1, a2, 4
12449; CHECK-RV64-NEXT:    bgez a1, .LBB61_456
12450; CHECK-RV64-NEXT:    j .LBB61_958
12451; CHECK-RV64-NEXT:  .LBB61_456: # %else1770
12452; CHECK-RV64-NEXT:    slli a1, a2, 3
12453; CHECK-RV64-NEXT:    bgez a1, .LBB61_457
12454; CHECK-RV64-NEXT:    j .LBB61_959
12455; CHECK-RV64-NEXT:  .LBB61_457: # %else1774
12456; CHECK-RV64-NEXT:    slli a1, a2, 2
12457; CHECK-RV64-NEXT:    bgez a1, .LBB61_459
12458; CHECK-RV64-NEXT:  .LBB61_458: # %cond.load1777
12459; CHECK-RV64-NEXT:    lbu a1, 0(a0)
12460; CHECK-RV64-NEXT:    li a3, 512
12461; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
12462; CHECK-RV64-NEXT:    vmv.s.x v16, a1
12463; CHECK-RV64-NEXT:    li a1, 446
12464; CHECK-RV64-NEXT:    li a3, 445
12465; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
12466; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
12467; CHECK-RV64-NEXT:    addi a0, a0, 1
12468; CHECK-RV64-NEXT:  .LBB61_459: # %else1778
12469; CHECK-RV64-NEXT:    slli a1, a2, 1
12470; CHECK-RV64-NEXT:    vsetivli zero, 1, e64, m1, ta, ma
12471; CHECK-RV64-NEXT:    vslidedown.vi v16, v0, 7
12472; CHECK-RV64-NEXT:    bgez a1, .LBB61_461
12473; CHECK-RV64-NEXT:  # %bb.460: # %cond.load1781
12474; CHECK-RV64-NEXT:    lbu a1, 0(a0)
12475; CHECK-RV64-NEXT:    vmv.s.x v24, a1
12476; CHECK-RV64-NEXT:    li a1, 447
12477; CHECK-RV64-NEXT:    li a3, 446
12478; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
12479; CHECK-RV64-NEXT:    vslideup.vx v8, v24, a3
12480; CHECK-RV64-NEXT:    addi a0, a0, 1
12481; CHECK-RV64-NEXT:  .LBB61_461: # %else1782
12482; CHECK-RV64-NEXT:    vsetivli zero, 1, e64, m1, ta, ma
12483; CHECK-RV64-NEXT:    vmv.x.s a1, v16
12484; CHECK-RV64-NEXT:    bgez a2, .LBB61_462
12485; CHECK-RV64-NEXT:    j .LBB61_960
12486; CHECK-RV64-NEXT:  .LBB61_462: # %else1786
12487; CHECK-RV64-NEXT:    andi a2, a1, 1
12488; CHECK-RV64-NEXT:    beqz a2, .LBB61_463
12489; CHECK-RV64-NEXT:    j .LBB61_961
12490; CHECK-RV64-NEXT:  .LBB61_463: # %else1790
12491; CHECK-RV64-NEXT:    andi a2, a1, 2
12492; CHECK-RV64-NEXT:    beqz a2, .LBB61_464
12493; CHECK-RV64-NEXT:    j .LBB61_962
12494; CHECK-RV64-NEXT:  .LBB61_464: # %else1794
12495; CHECK-RV64-NEXT:    andi a2, a1, 4
12496; CHECK-RV64-NEXT:    beqz a2, .LBB61_465
12497; CHECK-RV64-NEXT:    j .LBB61_963
12498; CHECK-RV64-NEXT:  .LBB61_465: # %else1798
12499; CHECK-RV64-NEXT:    andi a2, a1, 8
12500; CHECK-RV64-NEXT:    beqz a2, .LBB61_466
12501; CHECK-RV64-NEXT:    j .LBB61_964
12502; CHECK-RV64-NEXT:  .LBB61_466: # %else1802
12503; CHECK-RV64-NEXT:    andi a2, a1, 16
12504; CHECK-RV64-NEXT:    beqz a2, .LBB61_467
12505; CHECK-RV64-NEXT:    j .LBB61_965
12506; CHECK-RV64-NEXT:  .LBB61_467: # %else1806
12507; CHECK-RV64-NEXT:    andi a2, a1, 32
12508; CHECK-RV64-NEXT:    beqz a2, .LBB61_468
12509; CHECK-RV64-NEXT:    j .LBB61_966
12510; CHECK-RV64-NEXT:  .LBB61_468: # %else1810
12511; CHECK-RV64-NEXT:    andi a2, a1, 64
12512; CHECK-RV64-NEXT:    beqz a2, .LBB61_469
12513; CHECK-RV64-NEXT:    j .LBB61_967
12514; CHECK-RV64-NEXT:  .LBB61_469: # %else1814
12515; CHECK-RV64-NEXT:    andi a2, a1, 128
12516; CHECK-RV64-NEXT:    beqz a2, .LBB61_470
12517; CHECK-RV64-NEXT:    j .LBB61_968
12518; CHECK-RV64-NEXT:  .LBB61_470: # %else1818
12519; CHECK-RV64-NEXT:    andi a2, a1, 256
12520; CHECK-RV64-NEXT:    beqz a2, .LBB61_471
12521; CHECK-RV64-NEXT:    j .LBB61_969
12522; CHECK-RV64-NEXT:  .LBB61_471: # %else1822
12523; CHECK-RV64-NEXT:    andi a2, a1, 512
12524; CHECK-RV64-NEXT:    beqz a2, .LBB61_472
12525; CHECK-RV64-NEXT:    j .LBB61_970
12526; CHECK-RV64-NEXT:  .LBB61_472: # %else1826
12527; CHECK-RV64-NEXT:    andi a2, a1, 1024
12528; CHECK-RV64-NEXT:    beqz a2, .LBB61_473
12529; CHECK-RV64-NEXT:    j .LBB61_971
12530; CHECK-RV64-NEXT:  .LBB61_473: # %else1830
12531; CHECK-RV64-NEXT:    slli a2, a1, 52
12532; CHECK-RV64-NEXT:    bgez a2, .LBB61_474
12533; CHECK-RV64-NEXT:    j .LBB61_972
12534; CHECK-RV64-NEXT:  .LBB61_474: # %else1834
12535; CHECK-RV64-NEXT:    slli a2, a1, 51
12536; CHECK-RV64-NEXT:    bgez a2, .LBB61_475
12537; CHECK-RV64-NEXT:    j .LBB61_973
12538; CHECK-RV64-NEXT:  .LBB61_475: # %else1838
12539; CHECK-RV64-NEXT:    slli a2, a1, 50
12540; CHECK-RV64-NEXT:    bgez a2, .LBB61_476
12541; CHECK-RV64-NEXT:    j .LBB61_974
12542; CHECK-RV64-NEXT:  .LBB61_476: # %else1842
12543; CHECK-RV64-NEXT:    slli a2, a1, 49
12544; CHECK-RV64-NEXT:    bgez a2, .LBB61_477
12545; CHECK-RV64-NEXT:    j .LBB61_975
12546; CHECK-RV64-NEXT:  .LBB61_477: # %else1846
12547; CHECK-RV64-NEXT:    slli a2, a1, 48
12548; CHECK-RV64-NEXT:    bgez a2, .LBB61_478
12549; CHECK-RV64-NEXT:    j .LBB61_976
12550; CHECK-RV64-NEXT:  .LBB61_478: # %else1850
12551; CHECK-RV64-NEXT:    slli a2, a1, 47
12552; CHECK-RV64-NEXT:    bgez a2, .LBB61_479
12553; CHECK-RV64-NEXT:    j .LBB61_977
12554; CHECK-RV64-NEXT:  .LBB61_479: # %else1854
12555; CHECK-RV64-NEXT:    slli a2, a1, 46
12556; CHECK-RV64-NEXT:    bgez a2, .LBB61_480
12557; CHECK-RV64-NEXT:    j .LBB61_978
12558; CHECK-RV64-NEXT:  .LBB61_480: # %else1858
12559; CHECK-RV64-NEXT:    slli a2, a1, 45
12560; CHECK-RV64-NEXT:    bgez a2, .LBB61_481
12561; CHECK-RV64-NEXT:    j .LBB61_979
12562; CHECK-RV64-NEXT:  .LBB61_481: # %else1862
12563; CHECK-RV64-NEXT:    slli a2, a1, 44
12564; CHECK-RV64-NEXT:    bgez a2, .LBB61_482
12565; CHECK-RV64-NEXT:    j .LBB61_980
12566; CHECK-RV64-NEXT:  .LBB61_482: # %else1866
12567; CHECK-RV64-NEXT:    slli a2, a1, 43
12568; CHECK-RV64-NEXT:    bgez a2, .LBB61_483
12569; CHECK-RV64-NEXT:    j .LBB61_981
12570; CHECK-RV64-NEXT:  .LBB61_483: # %else1870
12571; CHECK-RV64-NEXT:    slli a2, a1, 42
12572; CHECK-RV64-NEXT:    bgez a2, .LBB61_484
12573; CHECK-RV64-NEXT:    j .LBB61_982
12574; CHECK-RV64-NEXT:  .LBB61_484: # %else1874
12575; CHECK-RV64-NEXT:    slli a2, a1, 41
12576; CHECK-RV64-NEXT:    bgez a2, .LBB61_485
12577; CHECK-RV64-NEXT:    j .LBB61_983
12578; CHECK-RV64-NEXT:  .LBB61_485: # %else1878
12579; CHECK-RV64-NEXT:    slli a2, a1, 40
12580; CHECK-RV64-NEXT:    bgez a2, .LBB61_486
12581; CHECK-RV64-NEXT:    j .LBB61_984
12582; CHECK-RV64-NEXT:  .LBB61_486: # %else1882
12583; CHECK-RV64-NEXT:    slli a2, a1, 39
12584; CHECK-RV64-NEXT:    bgez a2, .LBB61_487
12585; CHECK-RV64-NEXT:    j .LBB61_985
12586; CHECK-RV64-NEXT:  .LBB61_487: # %else1886
12587; CHECK-RV64-NEXT:    slli a2, a1, 38
12588; CHECK-RV64-NEXT:    bgez a2, .LBB61_488
12589; CHECK-RV64-NEXT:    j .LBB61_986
12590; CHECK-RV64-NEXT:  .LBB61_488: # %else1890
12591; CHECK-RV64-NEXT:    slli a2, a1, 37
12592; CHECK-RV64-NEXT:    bgez a2, .LBB61_489
12593; CHECK-RV64-NEXT:    j .LBB61_987
12594; CHECK-RV64-NEXT:  .LBB61_489: # %else1894
12595; CHECK-RV64-NEXT:    slli a2, a1, 36
12596; CHECK-RV64-NEXT:    bgez a2, .LBB61_490
12597; CHECK-RV64-NEXT:    j .LBB61_988
12598; CHECK-RV64-NEXT:  .LBB61_490: # %else1898
12599; CHECK-RV64-NEXT:    slli a2, a1, 35
12600; CHECK-RV64-NEXT:    bgez a2, .LBB61_491
12601; CHECK-RV64-NEXT:    j .LBB61_989
12602; CHECK-RV64-NEXT:  .LBB61_491: # %else1902
12603; CHECK-RV64-NEXT:    slli a2, a1, 34
12604; CHECK-RV64-NEXT:    bgez a2, .LBB61_492
12605; CHECK-RV64-NEXT:    j .LBB61_990
12606; CHECK-RV64-NEXT:  .LBB61_492: # %else1906
12607; CHECK-RV64-NEXT:    slli a2, a1, 33
12608; CHECK-RV64-NEXT:    bgez a2, .LBB61_493
12609; CHECK-RV64-NEXT:    j .LBB61_991
12610; CHECK-RV64-NEXT:  .LBB61_493: # %else1910
12611; CHECK-RV64-NEXT:    slli a2, a1, 32
12612; CHECK-RV64-NEXT:    bgez a2, .LBB61_494
12613; CHECK-RV64-NEXT:    j .LBB61_992
12614; CHECK-RV64-NEXT:  .LBB61_494: # %else1914
12615; CHECK-RV64-NEXT:    slli a2, a1, 31
12616; CHECK-RV64-NEXT:    bgez a2, .LBB61_495
12617; CHECK-RV64-NEXT:    j .LBB61_993
12618; CHECK-RV64-NEXT:  .LBB61_495: # %else1918
12619; CHECK-RV64-NEXT:    slli a2, a1, 30
12620; CHECK-RV64-NEXT:    bgez a2, .LBB61_496
12621; CHECK-RV64-NEXT:    j .LBB61_994
12622; CHECK-RV64-NEXT:  .LBB61_496: # %else1922
12623; CHECK-RV64-NEXT:    slli a2, a1, 29
12624; CHECK-RV64-NEXT:    bgez a2, .LBB61_497
12625; CHECK-RV64-NEXT:    j .LBB61_995
12626; CHECK-RV64-NEXT:  .LBB61_497: # %else1926
12627; CHECK-RV64-NEXT:    slli a2, a1, 28
12628; CHECK-RV64-NEXT:    bgez a2, .LBB61_498
12629; CHECK-RV64-NEXT:    j .LBB61_996
12630; CHECK-RV64-NEXT:  .LBB61_498: # %else1930
12631; CHECK-RV64-NEXT:    slli a2, a1, 27
12632; CHECK-RV64-NEXT:    bgez a2, .LBB61_499
12633; CHECK-RV64-NEXT:    j .LBB61_997
12634; CHECK-RV64-NEXT:  .LBB61_499: # %else1934
12635; CHECK-RV64-NEXT:    slli a2, a1, 26
12636; CHECK-RV64-NEXT:    bgez a2, .LBB61_500
12637; CHECK-RV64-NEXT:    j .LBB61_998
12638; CHECK-RV64-NEXT:  .LBB61_500: # %else1938
12639; CHECK-RV64-NEXT:    slli a2, a1, 25
12640; CHECK-RV64-NEXT:    bgez a2, .LBB61_501
12641; CHECK-RV64-NEXT:    j .LBB61_999
12642; CHECK-RV64-NEXT:  .LBB61_501: # %else1942
12643; CHECK-RV64-NEXT:    slli a2, a1, 24
12644; CHECK-RV64-NEXT:    bgez a2, .LBB61_502
12645; CHECK-RV64-NEXT:    j .LBB61_1000
12646; CHECK-RV64-NEXT:  .LBB61_502: # %else1946
12647; CHECK-RV64-NEXT:    slli a2, a1, 23
12648; CHECK-RV64-NEXT:    bgez a2, .LBB61_503
12649; CHECK-RV64-NEXT:    j .LBB61_1001
12650; CHECK-RV64-NEXT:  .LBB61_503: # %else1950
12651; CHECK-RV64-NEXT:    slli a2, a1, 22
12652; CHECK-RV64-NEXT:    bgez a2, .LBB61_504
12653; CHECK-RV64-NEXT:    j .LBB61_1002
12654; CHECK-RV64-NEXT:  .LBB61_504: # %else1954
12655; CHECK-RV64-NEXT:    slli a2, a1, 21
12656; CHECK-RV64-NEXT:    bgez a2, .LBB61_505
12657; CHECK-RV64-NEXT:    j .LBB61_1003
12658; CHECK-RV64-NEXT:  .LBB61_505: # %else1958
12659; CHECK-RV64-NEXT:    slli a2, a1, 20
12660; CHECK-RV64-NEXT:    bgez a2, .LBB61_506
12661; CHECK-RV64-NEXT:    j .LBB61_1004
12662; CHECK-RV64-NEXT:  .LBB61_506: # %else1962
12663; CHECK-RV64-NEXT:    slli a2, a1, 19
12664; CHECK-RV64-NEXT:    bgez a2, .LBB61_507
12665; CHECK-RV64-NEXT:    j .LBB61_1005
12666; CHECK-RV64-NEXT:  .LBB61_507: # %else1966
12667; CHECK-RV64-NEXT:    slli a2, a1, 18
12668; CHECK-RV64-NEXT:    bgez a2, .LBB61_508
12669; CHECK-RV64-NEXT:    j .LBB61_1006
12670; CHECK-RV64-NEXT:  .LBB61_508: # %else1970
12671; CHECK-RV64-NEXT:    slli a2, a1, 17
12672; CHECK-RV64-NEXT:    bgez a2, .LBB61_509
12673; CHECK-RV64-NEXT:    j .LBB61_1007
12674; CHECK-RV64-NEXT:  .LBB61_509: # %else1974
12675; CHECK-RV64-NEXT:    slli a2, a1, 16
12676; CHECK-RV64-NEXT:    bgez a2, .LBB61_510
12677; CHECK-RV64-NEXT:    j .LBB61_1008
12678; CHECK-RV64-NEXT:  .LBB61_510: # %else1978
12679; CHECK-RV64-NEXT:    slli a2, a1, 15
12680; CHECK-RV64-NEXT:    bgez a2, .LBB61_511
12681; CHECK-RV64-NEXT:    j .LBB61_1009
12682; CHECK-RV64-NEXT:  .LBB61_511: # %else1982
12683; CHECK-RV64-NEXT:    slli a2, a1, 14
12684; CHECK-RV64-NEXT:    bgez a2, .LBB61_512
12685; CHECK-RV64-NEXT:    j .LBB61_1010
12686; CHECK-RV64-NEXT:  .LBB61_512: # %else1986
12687; CHECK-RV64-NEXT:    slli a2, a1, 13
12688; CHECK-RV64-NEXT:    bgez a2, .LBB61_513
12689; CHECK-RV64-NEXT:    j .LBB61_1011
12690; CHECK-RV64-NEXT:  .LBB61_513: # %else1990
12691; CHECK-RV64-NEXT:    slli a2, a1, 12
12692; CHECK-RV64-NEXT:    bgez a2, .LBB61_514
12693; CHECK-RV64-NEXT:    j .LBB61_1012
12694; CHECK-RV64-NEXT:  .LBB61_514: # %else1994
12695; CHECK-RV64-NEXT:    slli a2, a1, 11
12696; CHECK-RV64-NEXT:    bgez a2, .LBB61_515
12697; CHECK-RV64-NEXT:    j .LBB61_1013
12698; CHECK-RV64-NEXT:  .LBB61_515: # %else1998
12699; CHECK-RV64-NEXT:    slli a2, a1, 10
12700; CHECK-RV64-NEXT:    bgez a2, .LBB61_516
12701; CHECK-RV64-NEXT:    j .LBB61_1014
12702; CHECK-RV64-NEXT:  .LBB61_516: # %else2002
12703; CHECK-RV64-NEXT:    slli a2, a1, 9
12704; CHECK-RV64-NEXT:    bgez a2, .LBB61_517
12705; CHECK-RV64-NEXT:    j .LBB61_1015
12706; CHECK-RV64-NEXT:  .LBB61_517: # %else2006
12707; CHECK-RV64-NEXT:    slli a2, a1, 8
12708; CHECK-RV64-NEXT:    bgez a2, .LBB61_518
12709; CHECK-RV64-NEXT:    j .LBB61_1016
12710; CHECK-RV64-NEXT:  .LBB61_518: # %else2010
12711; CHECK-RV64-NEXT:    slli a2, a1, 7
12712; CHECK-RV64-NEXT:    bgez a2, .LBB61_519
12713; CHECK-RV64-NEXT:    j .LBB61_1017
12714; CHECK-RV64-NEXT:  .LBB61_519: # %else2014
12715; CHECK-RV64-NEXT:    slli a2, a1, 6
12716; CHECK-RV64-NEXT:    bgez a2, .LBB61_520
12717; CHECK-RV64-NEXT:    j .LBB61_1018
12718; CHECK-RV64-NEXT:  .LBB61_520: # %else2018
12719; CHECK-RV64-NEXT:    slli a2, a1, 5
12720; CHECK-RV64-NEXT:    bgez a2, .LBB61_521
12721; CHECK-RV64-NEXT:    j .LBB61_1019
12722; CHECK-RV64-NEXT:  .LBB61_521: # %else2022
12723; CHECK-RV64-NEXT:    slli a2, a1, 4
12724; CHECK-RV64-NEXT:    bgez a2, .LBB61_522
12725; CHECK-RV64-NEXT:    j .LBB61_1020
12726; CHECK-RV64-NEXT:  .LBB61_522: # %else2026
12727; CHECK-RV64-NEXT:    slli a2, a1, 3
12728; CHECK-RV64-NEXT:    bgez a2, .LBB61_523
12729; CHECK-RV64-NEXT:    j .LBB61_1021
12730; CHECK-RV64-NEXT:  .LBB61_523: # %else2030
12731; CHECK-RV64-NEXT:    slli a2, a1, 2
12732; CHECK-RV64-NEXT:    bgez a2, .LBB61_524
12733; CHECK-RV64-NEXT:    j .LBB61_1022
12734; CHECK-RV64-NEXT:  .LBB61_524: # %else2034
12735; CHECK-RV64-NEXT:    slli a2, a1, 1
12736; CHECK-RV64-NEXT:    bgez a2, .LBB61_525
12737; CHECK-RV64-NEXT:    j .LBB61_1023
12738; CHECK-RV64-NEXT:  .LBB61_525: # %else2038
12739; CHECK-RV64-NEXT:    bgez a1, .LBB61_526
12740; CHECK-RV64-NEXT:    j .LBB61_1024
12741; CHECK-RV64-NEXT:  .LBB61_526: # %else2042
12742; CHECK-RV64-NEXT:    ret
12743; CHECK-RV64-NEXT:  .LBB61_527: # %cond.load
12744; CHECK-RV64-NEXT:    lbu a1, 0(a0)
12745; CHECK-RV64-NEXT:    vmv8r.v v16, v8
12746; CHECK-RV64-NEXT:    vsetvli zero, zero, e8, mf8, tu, ma
12747; CHECK-RV64-NEXT:    vmv.s.x v8, a1
12748; CHECK-RV64-NEXT:    addi a0, a0, 1
12749; CHECK-RV64-NEXT:    vmv1r.v v16, v8
12750; CHECK-RV64-NEXT:    vmv8r.v v8, v16
12751; CHECK-RV64-NEXT:    andi a1, a2, 2
12752; CHECK-RV64-NEXT:    bnez a1, .LBB61_528
12753; CHECK-RV64-NEXT:    j .LBB61_2
12754; CHECK-RV64-NEXT:  .LBB61_528: # %cond.load1
12755; CHECK-RV64-NEXT:    lbu a1, 0(a0)
12756; CHECK-RV64-NEXT:    vsetivli zero, 2, e8, m1, tu, ma
12757; CHECK-RV64-NEXT:    vmv8r.v v16, v8
12758; CHECK-RV64-NEXT:    vmv.s.x v9, a1
12759; CHECK-RV64-NEXT:    vslideup.vi v8, v9, 1
12760; CHECK-RV64-NEXT:    addi a0, a0, 1
12761; CHECK-RV64-NEXT:    vmv1r.v v16, v8
12762; CHECK-RV64-NEXT:    vmv8r.v v8, v16
12763; CHECK-RV64-NEXT:    andi a1, a2, 4
12764; CHECK-RV64-NEXT:    bnez a1, .LBB61_529
12765; CHECK-RV64-NEXT:    j .LBB61_3
12766; CHECK-RV64-NEXT:  .LBB61_529: # %cond.load5
12767; CHECK-RV64-NEXT:    lbu a1, 0(a0)
12768; CHECK-RV64-NEXT:    vsetivli zero, 3, e8, m1, tu, ma
12769; CHECK-RV64-NEXT:    vmv8r.v v16, v8
12770; CHECK-RV64-NEXT:    vmv.s.x v9, a1
12771; CHECK-RV64-NEXT:    vslideup.vi v8, v9, 2
12772; CHECK-RV64-NEXT:    addi a0, a0, 1
12773; CHECK-RV64-NEXT:    vmv1r.v v16, v8
12774; CHECK-RV64-NEXT:    vmv8r.v v8, v16
12775; CHECK-RV64-NEXT:    andi a1, a2, 8
12776; CHECK-RV64-NEXT:    bnez a1, .LBB61_530
12777; CHECK-RV64-NEXT:    j .LBB61_4
12778; CHECK-RV64-NEXT:  .LBB61_530: # %cond.load9
12779; CHECK-RV64-NEXT:    lbu a1, 0(a0)
12780; CHECK-RV64-NEXT:    vsetivli zero, 4, e8, m1, tu, ma
12781; CHECK-RV64-NEXT:    vmv8r.v v16, v8
12782; CHECK-RV64-NEXT:    vmv.s.x v9, a1
12783; CHECK-RV64-NEXT:    vslideup.vi v8, v9, 3
12784; CHECK-RV64-NEXT:    addi a0, a0, 1
12785; CHECK-RV64-NEXT:    vmv1r.v v16, v8
12786; CHECK-RV64-NEXT:    vmv8r.v v8, v16
12787; CHECK-RV64-NEXT:    andi a1, a2, 16
12788; CHECK-RV64-NEXT:    bnez a1, .LBB61_531
12789; CHECK-RV64-NEXT:    j .LBB61_5
12790; CHECK-RV64-NEXT:  .LBB61_531: # %cond.load13
12791; CHECK-RV64-NEXT:    lbu a1, 0(a0)
12792; CHECK-RV64-NEXT:    vsetivli zero, 5, e8, m1, tu, ma
12793; CHECK-RV64-NEXT:    vmv8r.v v16, v8
12794; CHECK-RV64-NEXT:    vmv.s.x v9, a1
12795; CHECK-RV64-NEXT:    vslideup.vi v8, v9, 4
12796; CHECK-RV64-NEXT:    addi a0, a0, 1
12797; CHECK-RV64-NEXT:    vmv1r.v v16, v8
12798; CHECK-RV64-NEXT:    vmv8r.v v8, v16
12799; CHECK-RV64-NEXT:    andi a1, a2, 32
12800; CHECK-RV64-NEXT:    bnez a1, .LBB61_532
12801; CHECK-RV64-NEXT:    j .LBB61_6
12802; CHECK-RV64-NEXT:  .LBB61_532: # %cond.load17
12803; CHECK-RV64-NEXT:    lbu a1, 0(a0)
12804; CHECK-RV64-NEXT:    vsetivli zero, 6, e8, m1, tu, ma
12805; CHECK-RV64-NEXT:    vmv8r.v v16, v8
12806; CHECK-RV64-NEXT:    vmv.s.x v9, a1
12807; CHECK-RV64-NEXT:    vslideup.vi v8, v9, 5
12808; CHECK-RV64-NEXT:    addi a0, a0, 1
12809; CHECK-RV64-NEXT:    vmv1r.v v16, v8
12810; CHECK-RV64-NEXT:    vmv8r.v v8, v16
12811; CHECK-RV64-NEXT:    andi a1, a2, 64
12812; CHECK-RV64-NEXT:    bnez a1, .LBB61_533
12813; CHECK-RV64-NEXT:    j .LBB61_7
12814; CHECK-RV64-NEXT:  .LBB61_533: # %cond.load21
12815; CHECK-RV64-NEXT:    lbu a1, 0(a0)
12816; CHECK-RV64-NEXT:    vsetivli zero, 7, e8, m1, tu, ma
12817; CHECK-RV64-NEXT:    vmv8r.v v16, v8
12818; CHECK-RV64-NEXT:    vmv.s.x v9, a1
12819; CHECK-RV64-NEXT:    vslideup.vi v8, v9, 6
12820; CHECK-RV64-NEXT:    addi a0, a0, 1
12821; CHECK-RV64-NEXT:    vmv1r.v v16, v8
12822; CHECK-RV64-NEXT:    vmv8r.v v8, v16
12823; CHECK-RV64-NEXT:    andi a1, a2, 128
12824; CHECK-RV64-NEXT:    bnez a1, .LBB61_534
12825; CHECK-RV64-NEXT:    j .LBB61_8
12826; CHECK-RV64-NEXT:  .LBB61_534: # %cond.load25
12827; CHECK-RV64-NEXT:    lbu a1, 0(a0)
12828; CHECK-RV64-NEXT:    vsetivli zero, 8, e8, m1, tu, ma
12829; CHECK-RV64-NEXT:    vmv8r.v v16, v8
12830; CHECK-RV64-NEXT:    vmv.s.x v9, a1
12831; CHECK-RV64-NEXT:    vslideup.vi v8, v9, 7
12832; CHECK-RV64-NEXT:    addi a0, a0, 1
12833; CHECK-RV64-NEXT:    vmv1r.v v16, v8
12834; CHECK-RV64-NEXT:    vmv8r.v v8, v16
12835; CHECK-RV64-NEXT:    andi a1, a2, 256
12836; CHECK-RV64-NEXT:    bnez a1, .LBB61_535
12837; CHECK-RV64-NEXT:    j .LBB61_9
12838; CHECK-RV64-NEXT:  .LBB61_535: # %cond.load29
12839; CHECK-RV64-NEXT:    lbu a1, 0(a0)
12840; CHECK-RV64-NEXT:    vsetivli zero, 9, e8, m1, tu, ma
12841; CHECK-RV64-NEXT:    vmv8r.v v16, v8
12842; CHECK-RV64-NEXT:    vmv.s.x v9, a1
12843; CHECK-RV64-NEXT:    vslideup.vi v8, v9, 8
12844; CHECK-RV64-NEXT:    addi a0, a0, 1
12845; CHECK-RV64-NEXT:    vmv1r.v v16, v8
12846; CHECK-RV64-NEXT:    vmv8r.v v8, v16
12847; CHECK-RV64-NEXT:    andi a1, a2, 512
12848; CHECK-RV64-NEXT:    bnez a1, .LBB61_536
12849; CHECK-RV64-NEXT:    j .LBB61_10
12850; CHECK-RV64-NEXT:  .LBB61_536: # %cond.load33
12851; CHECK-RV64-NEXT:    lbu a1, 0(a0)
12852; CHECK-RV64-NEXT:    vsetivli zero, 10, e8, m1, tu, ma
12853; CHECK-RV64-NEXT:    vmv8r.v v16, v8
12854; CHECK-RV64-NEXT:    vmv.s.x v9, a1
12855; CHECK-RV64-NEXT:    vslideup.vi v8, v9, 9
12856; CHECK-RV64-NEXT:    addi a0, a0, 1
12857; CHECK-RV64-NEXT:    vmv1r.v v16, v8
12858; CHECK-RV64-NEXT:    vmv8r.v v8, v16
12859; CHECK-RV64-NEXT:    andi a1, a2, 1024
12860; CHECK-RV64-NEXT:    bnez a1, .LBB61_537
12861; CHECK-RV64-NEXT:    j .LBB61_11
12862; CHECK-RV64-NEXT:  .LBB61_537: # %cond.load37
12863; CHECK-RV64-NEXT:    lbu a1, 0(a0)
12864; CHECK-RV64-NEXT:    vsetivli zero, 11, e8, m1, tu, ma
12865; CHECK-RV64-NEXT:    vmv8r.v v16, v8
12866; CHECK-RV64-NEXT:    vmv.s.x v9, a1
12867; CHECK-RV64-NEXT:    vslideup.vi v8, v9, 10
12868; CHECK-RV64-NEXT:    addi a0, a0, 1
12869; CHECK-RV64-NEXT:    vmv1r.v v16, v8
12870; CHECK-RV64-NEXT:    vmv8r.v v8, v16
12871; CHECK-RV64-NEXT:    slli a1, a2, 52
12872; CHECK-RV64-NEXT:    bltz a1, .LBB61_538
12873; CHECK-RV64-NEXT:    j .LBB61_12
12874; CHECK-RV64-NEXT:  .LBB61_538: # %cond.load41
12875; CHECK-RV64-NEXT:    lbu a1, 0(a0)
12876; CHECK-RV64-NEXT:    vsetivli zero, 12, e8, m1, tu, ma
12877; CHECK-RV64-NEXT:    vmv8r.v v16, v8
12878; CHECK-RV64-NEXT:    vmv.s.x v9, a1
12879; CHECK-RV64-NEXT:    vslideup.vi v8, v9, 11
12880; CHECK-RV64-NEXT:    addi a0, a0, 1
12881; CHECK-RV64-NEXT:    vmv1r.v v16, v8
12882; CHECK-RV64-NEXT:    vmv8r.v v8, v16
12883; CHECK-RV64-NEXT:    slli a1, a2, 51
12884; CHECK-RV64-NEXT:    bltz a1, .LBB61_539
12885; CHECK-RV64-NEXT:    j .LBB61_13
12886; CHECK-RV64-NEXT:  .LBB61_539: # %cond.load45
12887; CHECK-RV64-NEXT:    lbu a1, 0(a0)
12888; CHECK-RV64-NEXT:    vsetivli zero, 13, e8, m1, tu, ma
12889; CHECK-RV64-NEXT:    vmv8r.v v16, v8
12890; CHECK-RV64-NEXT:    vmv.s.x v9, a1
12891; CHECK-RV64-NEXT:    vslideup.vi v8, v9, 12
12892; CHECK-RV64-NEXT:    addi a0, a0, 1
12893; CHECK-RV64-NEXT:    vmv1r.v v16, v8
12894; CHECK-RV64-NEXT:    vmv8r.v v8, v16
12895; CHECK-RV64-NEXT:    slli a1, a2, 50
12896; CHECK-RV64-NEXT:    bltz a1, .LBB61_540
12897; CHECK-RV64-NEXT:    j .LBB61_14
12898; CHECK-RV64-NEXT:  .LBB61_540: # %cond.load49
12899; CHECK-RV64-NEXT:    lbu a1, 0(a0)
12900; CHECK-RV64-NEXT:    vsetivli zero, 14, e8, m1, tu, ma
12901; CHECK-RV64-NEXT:    vmv8r.v v16, v8
12902; CHECK-RV64-NEXT:    vmv.s.x v9, a1
12903; CHECK-RV64-NEXT:    vslideup.vi v8, v9, 13
12904; CHECK-RV64-NEXT:    addi a0, a0, 1
12905; CHECK-RV64-NEXT:    vmv1r.v v16, v8
12906; CHECK-RV64-NEXT:    vmv8r.v v8, v16
12907; CHECK-RV64-NEXT:    slli a1, a2, 49
12908; CHECK-RV64-NEXT:    bltz a1, .LBB61_541
12909; CHECK-RV64-NEXT:    j .LBB61_15
12910; CHECK-RV64-NEXT:  .LBB61_541: # %cond.load53
12911; CHECK-RV64-NEXT:    lbu a1, 0(a0)
12912; CHECK-RV64-NEXT:    vsetivli zero, 15, e8, m1, tu, ma
12913; CHECK-RV64-NEXT:    vmv8r.v v16, v8
12914; CHECK-RV64-NEXT:    vmv.s.x v9, a1
12915; CHECK-RV64-NEXT:    vslideup.vi v8, v9, 14
12916; CHECK-RV64-NEXT:    addi a0, a0, 1
12917; CHECK-RV64-NEXT:    vmv1r.v v16, v8
12918; CHECK-RV64-NEXT:    vmv8r.v v8, v16
12919; CHECK-RV64-NEXT:    slli a1, a2, 48
12920; CHECK-RV64-NEXT:    bltz a1, .LBB61_542
12921; CHECK-RV64-NEXT:    j .LBB61_16
12922; CHECK-RV64-NEXT:  .LBB61_542: # %cond.load57
12923; CHECK-RV64-NEXT:    lbu a1, 0(a0)
12924; CHECK-RV64-NEXT:    vsetivli zero, 16, e8, m1, tu, ma
12925; CHECK-RV64-NEXT:    vmv8r.v v16, v8
12926; CHECK-RV64-NEXT:    vmv.s.x v9, a1
12927; CHECK-RV64-NEXT:    vslideup.vi v8, v9, 15
12928; CHECK-RV64-NEXT:    addi a0, a0, 1
12929; CHECK-RV64-NEXT:    vmv1r.v v16, v8
12930; CHECK-RV64-NEXT:    vmv8r.v v8, v16
12931; CHECK-RV64-NEXT:    slli a1, a2, 47
12932; CHECK-RV64-NEXT:    bltz a1, .LBB61_543
12933; CHECK-RV64-NEXT:    j .LBB61_17
12934; CHECK-RV64-NEXT:  .LBB61_543: # %cond.load61
12935; CHECK-RV64-NEXT:    lbu a1, 0(a0)
12936; CHECK-RV64-NEXT:    vsetivli zero, 17, e8, m1, tu, ma
12937; CHECK-RV64-NEXT:    vmv8r.v v16, v8
12938; CHECK-RV64-NEXT:    vmv.s.x v9, a1
12939; CHECK-RV64-NEXT:    vslideup.vi v8, v9, 16
12940; CHECK-RV64-NEXT:    addi a0, a0, 1
12941; CHECK-RV64-NEXT:    vmv1r.v v16, v8
12942; CHECK-RV64-NEXT:    vmv8r.v v8, v16
12943; CHECK-RV64-NEXT:    slli a1, a2, 46
12944; CHECK-RV64-NEXT:    bltz a1, .LBB61_544
12945; CHECK-RV64-NEXT:    j .LBB61_18
12946; CHECK-RV64-NEXT:  .LBB61_544: # %cond.load65
12947; CHECK-RV64-NEXT:    lbu a1, 0(a0)
12948; CHECK-RV64-NEXT:    vsetivli zero, 18, e8, m1, tu, ma
12949; CHECK-RV64-NEXT:    vmv8r.v v16, v8
12950; CHECK-RV64-NEXT:    vmv.s.x v9, a1
12951; CHECK-RV64-NEXT:    vslideup.vi v8, v9, 17
12952; CHECK-RV64-NEXT:    addi a0, a0, 1
12953; CHECK-RV64-NEXT:    vmv1r.v v16, v8
12954; CHECK-RV64-NEXT:    vmv8r.v v8, v16
12955; CHECK-RV64-NEXT:    slli a1, a2, 45
12956; CHECK-RV64-NEXT:    bltz a1, .LBB61_545
12957; CHECK-RV64-NEXT:    j .LBB61_19
12958; CHECK-RV64-NEXT:  .LBB61_545: # %cond.load69
12959; CHECK-RV64-NEXT:    lbu a1, 0(a0)
12960; CHECK-RV64-NEXT:    vsetivli zero, 19, e8, m1, tu, ma
12961; CHECK-RV64-NEXT:    vmv8r.v v16, v8
12962; CHECK-RV64-NEXT:    vmv.s.x v9, a1
12963; CHECK-RV64-NEXT:    vslideup.vi v8, v9, 18
12964; CHECK-RV64-NEXT:    addi a0, a0, 1
12965; CHECK-RV64-NEXT:    vmv1r.v v16, v8
12966; CHECK-RV64-NEXT:    vmv8r.v v8, v16
12967; CHECK-RV64-NEXT:    slli a1, a2, 44
12968; CHECK-RV64-NEXT:    bltz a1, .LBB61_546
12969; CHECK-RV64-NEXT:    j .LBB61_20
12970; CHECK-RV64-NEXT:  .LBB61_546: # %cond.load73
12971; CHECK-RV64-NEXT:    lbu a1, 0(a0)
12972; CHECK-RV64-NEXT:    vsetivli zero, 20, e8, m1, tu, ma
12973; CHECK-RV64-NEXT:    vmv8r.v v16, v8
12974; CHECK-RV64-NEXT:    vmv.s.x v9, a1
12975; CHECK-RV64-NEXT:    vslideup.vi v8, v9, 19
12976; CHECK-RV64-NEXT:    addi a0, a0, 1
12977; CHECK-RV64-NEXT:    vmv1r.v v16, v8
12978; CHECK-RV64-NEXT:    vmv8r.v v8, v16
12979; CHECK-RV64-NEXT:    slli a1, a2, 43
12980; CHECK-RV64-NEXT:    bltz a1, .LBB61_547
12981; CHECK-RV64-NEXT:    j .LBB61_21
12982; CHECK-RV64-NEXT:  .LBB61_547: # %cond.load77
12983; CHECK-RV64-NEXT:    lbu a1, 0(a0)
12984; CHECK-RV64-NEXT:    vsetivli zero, 21, e8, m1, tu, ma
12985; CHECK-RV64-NEXT:    vmv8r.v v16, v8
12986; CHECK-RV64-NEXT:    vmv.s.x v9, a1
12987; CHECK-RV64-NEXT:    vslideup.vi v8, v9, 20
12988; CHECK-RV64-NEXT:    addi a0, a0, 1
12989; CHECK-RV64-NEXT:    vmv1r.v v16, v8
12990; CHECK-RV64-NEXT:    vmv8r.v v8, v16
12991; CHECK-RV64-NEXT:    slli a1, a2, 42
12992; CHECK-RV64-NEXT:    bltz a1, .LBB61_548
12993; CHECK-RV64-NEXT:    j .LBB61_22
12994; CHECK-RV64-NEXT:  .LBB61_548: # %cond.load81
12995; CHECK-RV64-NEXT:    lbu a1, 0(a0)
12996; CHECK-RV64-NEXT:    vsetivli zero, 22, e8, m1, tu, ma
12997; CHECK-RV64-NEXT:    vmv8r.v v16, v8
12998; CHECK-RV64-NEXT:    vmv.s.x v9, a1
12999; CHECK-RV64-NEXT:    vslideup.vi v8, v9, 21
13000; CHECK-RV64-NEXT:    addi a0, a0, 1
13001; CHECK-RV64-NEXT:    vmv1r.v v16, v8
13002; CHECK-RV64-NEXT:    vmv8r.v v8, v16
13003; CHECK-RV64-NEXT:    slli a1, a2, 41
13004; CHECK-RV64-NEXT:    bltz a1, .LBB61_549
13005; CHECK-RV64-NEXT:    j .LBB61_23
13006; CHECK-RV64-NEXT:  .LBB61_549: # %cond.load85
13007; CHECK-RV64-NEXT:    lbu a1, 0(a0)
13008; CHECK-RV64-NEXT:    vsetivli zero, 23, e8, m1, tu, ma
13009; CHECK-RV64-NEXT:    vmv8r.v v16, v8
13010; CHECK-RV64-NEXT:    vmv.s.x v9, a1
13011; CHECK-RV64-NEXT:    vslideup.vi v8, v9, 22
13012; CHECK-RV64-NEXT:    addi a0, a0, 1
13013; CHECK-RV64-NEXT:    vmv1r.v v16, v8
13014; CHECK-RV64-NEXT:    vmv8r.v v8, v16
13015; CHECK-RV64-NEXT:    slli a1, a2, 40
13016; CHECK-RV64-NEXT:    bltz a1, .LBB61_550
13017; CHECK-RV64-NEXT:    j .LBB61_24
13018; CHECK-RV64-NEXT:  .LBB61_550: # %cond.load89
13019; CHECK-RV64-NEXT:    lbu a1, 0(a0)
13020; CHECK-RV64-NEXT:    vsetivli zero, 24, e8, m1, tu, ma
13021; CHECK-RV64-NEXT:    vmv8r.v v16, v8
13022; CHECK-RV64-NEXT:    vmv.s.x v9, a1
13023; CHECK-RV64-NEXT:    vslideup.vi v8, v9, 23
13024; CHECK-RV64-NEXT:    addi a0, a0, 1
13025; CHECK-RV64-NEXT:    vmv1r.v v16, v8
13026; CHECK-RV64-NEXT:    vmv8r.v v8, v16
13027; CHECK-RV64-NEXT:    slli a1, a2, 39
13028; CHECK-RV64-NEXT:    bltz a1, .LBB61_551
13029; CHECK-RV64-NEXT:    j .LBB61_25
13030; CHECK-RV64-NEXT:  .LBB61_551: # %cond.load93
13031; CHECK-RV64-NEXT:    lbu a1, 0(a0)
13032; CHECK-RV64-NEXT:    vsetivli zero, 25, e8, m1, tu, ma
13033; CHECK-RV64-NEXT:    vmv8r.v v16, v8
13034; CHECK-RV64-NEXT:    vmv.s.x v9, a1
13035; CHECK-RV64-NEXT:    vslideup.vi v8, v9, 24
13036; CHECK-RV64-NEXT:    addi a0, a0, 1
13037; CHECK-RV64-NEXT:    vmv1r.v v16, v8
13038; CHECK-RV64-NEXT:    vmv8r.v v8, v16
13039; CHECK-RV64-NEXT:    slli a1, a2, 38
13040; CHECK-RV64-NEXT:    bltz a1, .LBB61_552
13041; CHECK-RV64-NEXT:    j .LBB61_26
13042; CHECK-RV64-NEXT:  .LBB61_552: # %cond.load97
13043; CHECK-RV64-NEXT:    lbu a1, 0(a0)
13044; CHECK-RV64-NEXT:    vsetivli zero, 26, e8, m1, tu, ma
13045; CHECK-RV64-NEXT:    vmv8r.v v16, v8
13046; CHECK-RV64-NEXT:    vmv.s.x v9, a1
13047; CHECK-RV64-NEXT:    vslideup.vi v8, v9, 25
13048; CHECK-RV64-NEXT:    addi a0, a0, 1
13049; CHECK-RV64-NEXT:    vmv1r.v v16, v8
13050; CHECK-RV64-NEXT:    vmv8r.v v8, v16
13051; CHECK-RV64-NEXT:    slli a1, a2, 37
13052; CHECK-RV64-NEXT:    bltz a1, .LBB61_553
13053; CHECK-RV64-NEXT:    j .LBB61_27
13054; CHECK-RV64-NEXT:  .LBB61_553: # %cond.load101
13055; CHECK-RV64-NEXT:    lbu a1, 0(a0)
13056; CHECK-RV64-NEXT:    vsetivli zero, 27, e8, m1, tu, ma
13057; CHECK-RV64-NEXT:    vmv8r.v v16, v8
13058; CHECK-RV64-NEXT:    vmv.s.x v9, a1
13059; CHECK-RV64-NEXT:    vslideup.vi v8, v9, 26
13060; CHECK-RV64-NEXT:    addi a0, a0, 1
13061; CHECK-RV64-NEXT:    vmv1r.v v16, v8
13062; CHECK-RV64-NEXT:    vmv8r.v v8, v16
13063; CHECK-RV64-NEXT:    slli a1, a2, 36
13064; CHECK-RV64-NEXT:    bltz a1, .LBB61_554
13065; CHECK-RV64-NEXT:    j .LBB61_28
13066; CHECK-RV64-NEXT:  .LBB61_554: # %cond.load105
13067; CHECK-RV64-NEXT:    lbu a1, 0(a0)
13068; CHECK-RV64-NEXT:    vsetivli zero, 28, e8, m1, tu, ma
13069; CHECK-RV64-NEXT:    vmv8r.v v16, v8
13070; CHECK-RV64-NEXT:    vmv.s.x v9, a1
13071; CHECK-RV64-NEXT:    vslideup.vi v8, v9, 27
13072; CHECK-RV64-NEXT:    addi a0, a0, 1
13073; CHECK-RV64-NEXT:    vmv1r.v v16, v8
13074; CHECK-RV64-NEXT:    vmv8r.v v8, v16
13075; CHECK-RV64-NEXT:    slli a1, a2, 35
13076; CHECK-RV64-NEXT:    bltz a1, .LBB61_555
13077; CHECK-RV64-NEXT:    j .LBB61_29
13078; CHECK-RV64-NEXT:  .LBB61_555: # %cond.load109
13079; CHECK-RV64-NEXT:    lbu a1, 0(a0)
13080; CHECK-RV64-NEXT:    vsetivli zero, 29, e8, m1, tu, ma
13081; CHECK-RV64-NEXT:    vmv8r.v v16, v8
13082; CHECK-RV64-NEXT:    vmv.s.x v9, a1
13083; CHECK-RV64-NEXT:    vslideup.vi v8, v9, 28
13084; CHECK-RV64-NEXT:    addi a0, a0, 1
13085; CHECK-RV64-NEXT:    vmv1r.v v16, v8
13086; CHECK-RV64-NEXT:    vmv8r.v v8, v16
13087; CHECK-RV64-NEXT:    slli a1, a2, 34
13088; CHECK-RV64-NEXT:    bltz a1, .LBB61_556
13089; CHECK-RV64-NEXT:    j .LBB61_30
13090; CHECK-RV64-NEXT:  .LBB61_556: # %cond.load113
13091; CHECK-RV64-NEXT:    lbu a1, 0(a0)
13092; CHECK-RV64-NEXT:    vsetivli zero, 30, e8, m1, tu, ma
13093; CHECK-RV64-NEXT:    vmv8r.v v16, v8
13094; CHECK-RV64-NEXT:    vmv.s.x v9, a1
13095; CHECK-RV64-NEXT:    vslideup.vi v8, v9, 29
13096; CHECK-RV64-NEXT:    addi a0, a0, 1
13097; CHECK-RV64-NEXT:    vmv1r.v v16, v8
13098; CHECK-RV64-NEXT:    vmv8r.v v8, v16
13099; CHECK-RV64-NEXT:    slli a1, a2, 33
13100; CHECK-RV64-NEXT:    bltz a1, .LBB61_557
13101; CHECK-RV64-NEXT:    j .LBB61_31
13102; CHECK-RV64-NEXT:  .LBB61_557: # %cond.load117
13103; CHECK-RV64-NEXT:    lbu a1, 0(a0)
13104; CHECK-RV64-NEXT:    vsetivli zero, 31, e8, m1, tu, ma
13105; CHECK-RV64-NEXT:    vmv8r.v v16, v8
13106; CHECK-RV64-NEXT:    vmv.s.x v9, a1
13107; CHECK-RV64-NEXT:    vslideup.vi v8, v9, 30
13108; CHECK-RV64-NEXT:    addi a0, a0, 1
13109; CHECK-RV64-NEXT:    vmv1r.v v16, v8
13110; CHECK-RV64-NEXT:    vmv8r.v v8, v16
13111; CHECK-RV64-NEXT:    slli a1, a2, 32
13112; CHECK-RV64-NEXT:    bltz a1, .LBB61_558
13113; CHECK-RV64-NEXT:    j .LBB61_32
13114; CHECK-RV64-NEXT:  .LBB61_558: # %cond.load121
13115; CHECK-RV64-NEXT:    lbu a1, 0(a0)
13116; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
13117; CHECK-RV64-NEXT:    vmv8r.v v16, v8
13118; CHECK-RV64-NEXT:    vmv.s.x v9, a1
13119; CHECK-RV64-NEXT:    li a1, 32
13120; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m1, tu, ma
13121; CHECK-RV64-NEXT:    vslideup.vi v8, v9, 31
13122; CHECK-RV64-NEXT:    addi a0, a0, 1
13123; CHECK-RV64-NEXT:    vmv1r.v v16, v8
13124; CHECK-RV64-NEXT:    vmv8r.v v8, v16
13125; CHECK-RV64-NEXT:    slli a1, a2, 31
13126; CHECK-RV64-NEXT:    bltz a1, .LBB61_559
13127; CHECK-RV64-NEXT:    j .LBB61_33
13128; CHECK-RV64-NEXT:  .LBB61_559: # %cond.load125
13129; CHECK-RV64-NEXT:    lbu a1, 0(a0)
13130; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
13131; CHECK-RV64-NEXT:    vmv8r.v v16, v8
13132; CHECK-RV64-NEXT:    vmv.s.x v9, a1
13133; CHECK-RV64-NEXT:    li a1, 33
13134; CHECK-RV64-NEXT:    li a3, 32
13135; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m1, tu, ma
13136; CHECK-RV64-NEXT:    vslideup.vx v8, v9, a3
13137; CHECK-RV64-NEXT:    addi a0, a0, 1
13138; CHECK-RV64-NEXT:    vmv1r.v v16, v8
13139; CHECK-RV64-NEXT:    vmv8r.v v8, v16
13140; CHECK-RV64-NEXT:    slli a1, a2, 30
13141; CHECK-RV64-NEXT:    bltz a1, .LBB61_560
13142; CHECK-RV64-NEXT:    j .LBB61_34
13143; CHECK-RV64-NEXT:  .LBB61_560: # %cond.load129
13144; CHECK-RV64-NEXT:    lbu a1, 0(a0)
13145; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
13146; CHECK-RV64-NEXT:    vmv8r.v v16, v8
13147; CHECK-RV64-NEXT:    vmv.s.x v9, a1
13148; CHECK-RV64-NEXT:    li a1, 34
13149; CHECK-RV64-NEXT:    li a3, 33
13150; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m1, tu, ma
13151; CHECK-RV64-NEXT:    vslideup.vx v8, v9, a3
13152; CHECK-RV64-NEXT:    addi a0, a0, 1
13153; CHECK-RV64-NEXT:    vmv1r.v v16, v8
13154; CHECK-RV64-NEXT:    vmv8r.v v8, v16
13155; CHECK-RV64-NEXT:    slli a1, a2, 29
13156; CHECK-RV64-NEXT:    bltz a1, .LBB61_561
13157; CHECK-RV64-NEXT:    j .LBB61_35
13158; CHECK-RV64-NEXT:  .LBB61_561: # %cond.load133
13159; CHECK-RV64-NEXT:    lbu a1, 0(a0)
13160; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
13161; CHECK-RV64-NEXT:    vmv8r.v v16, v8
13162; CHECK-RV64-NEXT:    vmv.s.x v9, a1
13163; CHECK-RV64-NEXT:    li a1, 35
13164; CHECK-RV64-NEXT:    li a3, 34
13165; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m1, tu, ma
13166; CHECK-RV64-NEXT:    vslideup.vx v8, v9, a3
13167; CHECK-RV64-NEXT:    addi a0, a0, 1
13168; CHECK-RV64-NEXT:    vmv1r.v v16, v8
13169; CHECK-RV64-NEXT:    vmv8r.v v8, v16
13170; CHECK-RV64-NEXT:    slli a1, a2, 28
13171; CHECK-RV64-NEXT:    bltz a1, .LBB61_562
13172; CHECK-RV64-NEXT:    j .LBB61_36
13173; CHECK-RV64-NEXT:  .LBB61_562: # %cond.load137
13174; CHECK-RV64-NEXT:    lbu a1, 0(a0)
13175; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
13176; CHECK-RV64-NEXT:    vmv8r.v v16, v8
13177; CHECK-RV64-NEXT:    vmv.s.x v9, a1
13178; CHECK-RV64-NEXT:    li a1, 36
13179; CHECK-RV64-NEXT:    li a3, 35
13180; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m1, tu, ma
13181; CHECK-RV64-NEXT:    vslideup.vx v8, v9, a3
13182; CHECK-RV64-NEXT:    addi a0, a0, 1
13183; CHECK-RV64-NEXT:    vmv1r.v v16, v8
13184; CHECK-RV64-NEXT:    vmv8r.v v8, v16
13185; CHECK-RV64-NEXT:    slli a1, a2, 27
13186; CHECK-RV64-NEXT:    bltz a1, .LBB61_563
13187; CHECK-RV64-NEXT:    j .LBB61_37
13188; CHECK-RV64-NEXT:  .LBB61_563: # %cond.load141
13189; CHECK-RV64-NEXT:    lbu a1, 0(a0)
13190; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
13191; CHECK-RV64-NEXT:    vmv8r.v v16, v8
13192; CHECK-RV64-NEXT:    vmv.s.x v9, a1
13193; CHECK-RV64-NEXT:    li a1, 37
13194; CHECK-RV64-NEXT:    li a3, 36
13195; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m1, tu, ma
13196; CHECK-RV64-NEXT:    vslideup.vx v8, v9, a3
13197; CHECK-RV64-NEXT:    addi a0, a0, 1
13198; CHECK-RV64-NEXT:    vmv1r.v v16, v8
13199; CHECK-RV64-NEXT:    vmv8r.v v8, v16
13200; CHECK-RV64-NEXT:    slli a1, a2, 26
13201; CHECK-RV64-NEXT:    bltz a1, .LBB61_564
13202; CHECK-RV64-NEXT:    j .LBB61_38
13203; CHECK-RV64-NEXT:  .LBB61_564: # %cond.load145
13204; CHECK-RV64-NEXT:    lbu a1, 0(a0)
13205; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
13206; CHECK-RV64-NEXT:    vmv8r.v v16, v8
13207; CHECK-RV64-NEXT:    vmv.s.x v9, a1
13208; CHECK-RV64-NEXT:    li a1, 38
13209; CHECK-RV64-NEXT:    li a3, 37
13210; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m1, tu, ma
13211; CHECK-RV64-NEXT:    vslideup.vx v8, v9, a3
13212; CHECK-RV64-NEXT:    addi a0, a0, 1
13213; CHECK-RV64-NEXT:    vmv1r.v v16, v8
13214; CHECK-RV64-NEXT:    vmv8r.v v8, v16
13215; CHECK-RV64-NEXT:    slli a1, a2, 25
13216; CHECK-RV64-NEXT:    bltz a1, .LBB61_565
13217; CHECK-RV64-NEXT:    j .LBB61_39
13218; CHECK-RV64-NEXT:  .LBB61_565: # %cond.load149
13219; CHECK-RV64-NEXT:    lbu a1, 0(a0)
13220; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
13221; CHECK-RV64-NEXT:    vmv8r.v v16, v8
13222; CHECK-RV64-NEXT:    vmv.s.x v9, a1
13223; CHECK-RV64-NEXT:    li a1, 39
13224; CHECK-RV64-NEXT:    li a3, 38
13225; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m1, tu, ma
13226; CHECK-RV64-NEXT:    vslideup.vx v8, v9, a3
13227; CHECK-RV64-NEXT:    addi a0, a0, 1
13228; CHECK-RV64-NEXT:    vmv1r.v v16, v8
13229; CHECK-RV64-NEXT:    vmv8r.v v8, v16
13230; CHECK-RV64-NEXT:    slli a1, a2, 24
13231; CHECK-RV64-NEXT:    bltz a1, .LBB61_566
13232; CHECK-RV64-NEXT:    j .LBB61_40
13233; CHECK-RV64-NEXT:  .LBB61_566: # %cond.load153
13234; CHECK-RV64-NEXT:    lbu a1, 0(a0)
13235; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
13236; CHECK-RV64-NEXT:    vmv8r.v v16, v8
13237; CHECK-RV64-NEXT:    vmv.s.x v9, a1
13238; CHECK-RV64-NEXT:    li a1, 40
13239; CHECK-RV64-NEXT:    li a3, 39
13240; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m1, tu, ma
13241; CHECK-RV64-NEXT:    vslideup.vx v8, v9, a3
13242; CHECK-RV64-NEXT:    addi a0, a0, 1
13243; CHECK-RV64-NEXT:    vmv1r.v v16, v8
13244; CHECK-RV64-NEXT:    vmv8r.v v8, v16
13245; CHECK-RV64-NEXT:    slli a1, a2, 23
13246; CHECK-RV64-NEXT:    bltz a1, .LBB61_567
13247; CHECK-RV64-NEXT:    j .LBB61_41
13248; CHECK-RV64-NEXT:  .LBB61_567: # %cond.load157
13249; CHECK-RV64-NEXT:    lbu a1, 0(a0)
13250; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
13251; CHECK-RV64-NEXT:    vmv8r.v v16, v8
13252; CHECK-RV64-NEXT:    vmv.s.x v9, a1
13253; CHECK-RV64-NEXT:    li a1, 41
13254; CHECK-RV64-NEXT:    li a3, 40
13255; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m1, tu, ma
13256; CHECK-RV64-NEXT:    vslideup.vx v8, v9, a3
13257; CHECK-RV64-NEXT:    addi a0, a0, 1
13258; CHECK-RV64-NEXT:    vmv1r.v v16, v8
13259; CHECK-RV64-NEXT:    vmv8r.v v8, v16
13260; CHECK-RV64-NEXT:    slli a1, a2, 22
13261; CHECK-RV64-NEXT:    bltz a1, .LBB61_568
13262; CHECK-RV64-NEXT:    j .LBB61_42
13263; CHECK-RV64-NEXT:  .LBB61_568: # %cond.load161
13264; CHECK-RV64-NEXT:    lbu a1, 0(a0)
13265; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
13266; CHECK-RV64-NEXT:    vmv8r.v v16, v8
13267; CHECK-RV64-NEXT:    vmv.s.x v9, a1
13268; CHECK-RV64-NEXT:    li a1, 42
13269; CHECK-RV64-NEXT:    li a3, 41
13270; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m1, tu, ma
13271; CHECK-RV64-NEXT:    vslideup.vx v8, v9, a3
13272; CHECK-RV64-NEXT:    addi a0, a0, 1
13273; CHECK-RV64-NEXT:    vmv1r.v v16, v8
13274; CHECK-RV64-NEXT:    vmv8r.v v8, v16
13275; CHECK-RV64-NEXT:    slli a1, a2, 21
13276; CHECK-RV64-NEXT:    bltz a1, .LBB61_569
13277; CHECK-RV64-NEXT:    j .LBB61_43
13278; CHECK-RV64-NEXT:  .LBB61_569: # %cond.load165
13279; CHECK-RV64-NEXT:    lbu a1, 0(a0)
13280; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
13281; CHECK-RV64-NEXT:    vmv8r.v v16, v8
13282; CHECK-RV64-NEXT:    vmv.s.x v9, a1
13283; CHECK-RV64-NEXT:    li a1, 43
13284; CHECK-RV64-NEXT:    li a3, 42
13285; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m1, tu, ma
13286; CHECK-RV64-NEXT:    vslideup.vx v8, v9, a3
13287; CHECK-RV64-NEXT:    addi a0, a0, 1
13288; CHECK-RV64-NEXT:    vmv1r.v v16, v8
13289; CHECK-RV64-NEXT:    vmv8r.v v8, v16
13290; CHECK-RV64-NEXT:    slli a1, a2, 20
13291; CHECK-RV64-NEXT:    bltz a1, .LBB61_570
13292; CHECK-RV64-NEXT:    j .LBB61_44
13293; CHECK-RV64-NEXT:  .LBB61_570: # %cond.load169
13294; CHECK-RV64-NEXT:    lbu a1, 0(a0)
13295; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
13296; CHECK-RV64-NEXT:    vmv8r.v v16, v8
13297; CHECK-RV64-NEXT:    vmv.s.x v9, a1
13298; CHECK-RV64-NEXT:    li a1, 44
13299; CHECK-RV64-NEXT:    li a3, 43
13300; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m1, tu, ma
13301; CHECK-RV64-NEXT:    vslideup.vx v8, v9, a3
13302; CHECK-RV64-NEXT:    addi a0, a0, 1
13303; CHECK-RV64-NEXT:    vmv1r.v v16, v8
13304; CHECK-RV64-NEXT:    vmv8r.v v8, v16
13305; CHECK-RV64-NEXT:    slli a1, a2, 19
13306; CHECK-RV64-NEXT:    bltz a1, .LBB61_571
13307; CHECK-RV64-NEXT:    j .LBB61_45
13308; CHECK-RV64-NEXT:  .LBB61_571: # %cond.load173
13309; CHECK-RV64-NEXT:    lbu a1, 0(a0)
13310; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
13311; CHECK-RV64-NEXT:    vmv8r.v v16, v8
13312; CHECK-RV64-NEXT:    vmv.s.x v9, a1
13313; CHECK-RV64-NEXT:    li a1, 45
13314; CHECK-RV64-NEXT:    li a3, 44
13315; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m1, tu, ma
13316; CHECK-RV64-NEXT:    vslideup.vx v8, v9, a3
13317; CHECK-RV64-NEXT:    addi a0, a0, 1
13318; CHECK-RV64-NEXT:    vmv1r.v v16, v8
13319; CHECK-RV64-NEXT:    vmv8r.v v8, v16
13320; CHECK-RV64-NEXT:    slli a1, a2, 18
13321; CHECK-RV64-NEXT:    bltz a1, .LBB61_572
13322; CHECK-RV64-NEXT:    j .LBB61_46
13323; CHECK-RV64-NEXT:  .LBB61_572: # %cond.load177
13324; CHECK-RV64-NEXT:    lbu a1, 0(a0)
13325; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
13326; CHECK-RV64-NEXT:    vmv8r.v v16, v8
13327; CHECK-RV64-NEXT:    vmv.s.x v9, a1
13328; CHECK-RV64-NEXT:    li a1, 46
13329; CHECK-RV64-NEXT:    li a3, 45
13330; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m1, tu, ma
13331; CHECK-RV64-NEXT:    vslideup.vx v8, v9, a3
13332; CHECK-RV64-NEXT:    addi a0, a0, 1
13333; CHECK-RV64-NEXT:    vmv1r.v v16, v8
13334; CHECK-RV64-NEXT:    vmv8r.v v8, v16
13335; CHECK-RV64-NEXT:    slli a1, a2, 17
13336; CHECK-RV64-NEXT:    bltz a1, .LBB61_573
13337; CHECK-RV64-NEXT:    j .LBB61_47
13338; CHECK-RV64-NEXT:  .LBB61_573: # %cond.load181
13339; CHECK-RV64-NEXT:    lbu a1, 0(a0)
13340; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
13341; CHECK-RV64-NEXT:    vmv8r.v v16, v8
13342; CHECK-RV64-NEXT:    vmv.s.x v9, a1
13343; CHECK-RV64-NEXT:    li a1, 47
13344; CHECK-RV64-NEXT:    li a3, 46
13345; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m1, tu, ma
13346; CHECK-RV64-NEXT:    vslideup.vx v8, v9, a3
13347; CHECK-RV64-NEXT:    addi a0, a0, 1
13348; CHECK-RV64-NEXT:    vmv1r.v v16, v8
13349; CHECK-RV64-NEXT:    vmv8r.v v8, v16
13350; CHECK-RV64-NEXT:    slli a1, a2, 16
13351; CHECK-RV64-NEXT:    bltz a1, .LBB61_574
13352; CHECK-RV64-NEXT:    j .LBB61_48
13353; CHECK-RV64-NEXT:  .LBB61_574: # %cond.load185
13354; CHECK-RV64-NEXT:    lbu a1, 0(a0)
13355; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
13356; CHECK-RV64-NEXT:    vmv8r.v v16, v8
13357; CHECK-RV64-NEXT:    vmv.s.x v9, a1
13358; CHECK-RV64-NEXT:    li a1, 48
13359; CHECK-RV64-NEXT:    li a3, 47
13360; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m1, tu, ma
13361; CHECK-RV64-NEXT:    vslideup.vx v8, v9, a3
13362; CHECK-RV64-NEXT:    addi a0, a0, 1
13363; CHECK-RV64-NEXT:    vmv1r.v v16, v8
13364; CHECK-RV64-NEXT:    vmv8r.v v8, v16
13365; CHECK-RV64-NEXT:    slli a1, a2, 15
13366; CHECK-RV64-NEXT:    bltz a1, .LBB61_575
13367; CHECK-RV64-NEXT:    j .LBB61_49
13368; CHECK-RV64-NEXT:  .LBB61_575: # %cond.load189
13369; CHECK-RV64-NEXT:    lbu a1, 0(a0)
13370; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
13371; CHECK-RV64-NEXT:    vmv8r.v v16, v8
13372; CHECK-RV64-NEXT:    vmv.s.x v9, a1
13373; CHECK-RV64-NEXT:    li a1, 49
13374; CHECK-RV64-NEXT:    li a3, 48
13375; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m1, tu, ma
13376; CHECK-RV64-NEXT:    vslideup.vx v8, v9, a3
13377; CHECK-RV64-NEXT:    addi a0, a0, 1
13378; CHECK-RV64-NEXT:    vmv1r.v v16, v8
13379; CHECK-RV64-NEXT:    vmv8r.v v8, v16
13380; CHECK-RV64-NEXT:    slli a1, a2, 14
13381; CHECK-RV64-NEXT:    bltz a1, .LBB61_576
13382; CHECK-RV64-NEXT:    j .LBB61_50
13383; CHECK-RV64-NEXT:  .LBB61_576: # %cond.load193
13384; CHECK-RV64-NEXT:    lbu a1, 0(a0)
13385; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
13386; CHECK-RV64-NEXT:    vmv8r.v v16, v8
13387; CHECK-RV64-NEXT:    vmv.s.x v9, a1
13388; CHECK-RV64-NEXT:    li a1, 50
13389; CHECK-RV64-NEXT:    li a3, 49
13390; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m1, tu, ma
13391; CHECK-RV64-NEXT:    vslideup.vx v8, v9, a3
13392; CHECK-RV64-NEXT:    addi a0, a0, 1
13393; CHECK-RV64-NEXT:    vmv1r.v v16, v8
13394; CHECK-RV64-NEXT:    vmv8r.v v8, v16
13395; CHECK-RV64-NEXT:    slli a1, a2, 13
13396; CHECK-RV64-NEXT:    bltz a1, .LBB61_577
13397; CHECK-RV64-NEXT:    j .LBB61_51
13398; CHECK-RV64-NEXT:  .LBB61_577: # %cond.load197
13399; CHECK-RV64-NEXT:    lbu a1, 0(a0)
13400; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
13401; CHECK-RV64-NEXT:    vmv8r.v v16, v8
13402; CHECK-RV64-NEXT:    vmv.s.x v9, a1
13403; CHECK-RV64-NEXT:    li a1, 51
13404; CHECK-RV64-NEXT:    li a3, 50
13405; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m1, tu, ma
13406; CHECK-RV64-NEXT:    vslideup.vx v8, v9, a3
13407; CHECK-RV64-NEXT:    addi a0, a0, 1
13408; CHECK-RV64-NEXT:    vmv1r.v v16, v8
13409; CHECK-RV64-NEXT:    vmv8r.v v8, v16
13410; CHECK-RV64-NEXT:    slli a1, a2, 12
13411; CHECK-RV64-NEXT:    bltz a1, .LBB61_578
13412; CHECK-RV64-NEXT:    j .LBB61_52
13413; CHECK-RV64-NEXT:  .LBB61_578: # %cond.load201
13414; CHECK-RV64-NEXT:    lbu a1, 0(a0)
13415; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
13416; CHECK-RV64-NEXT:    vmv8r.v v16, v8
13417; CHECK-RV64-NEXT:    vmv.s.x v9, a1
13418; CHECK-RV64-NEXT:    li a1, 52
13419; CHECK-RV64-NEXT:    li a3, 51
13420; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m1, tu, ma
13421; CHECK-RV64-NEXT:    vslideup.vx v8, v9, a3
13422; CHECK-RV64-NEXT:    addi a0, a0, 1
13423; CHECK-RV64-NEXT:    vmv1r.v v16, v8
13424; CHECK-RV64-NEXT:    vmv8r.v v8, v16
13425; CHECK-RV64-NEXT:    slli a1, a2, 11
13426; CHECK-RV64-NEXT:    bltz a1, .LBB61_579
13427; CHECK-RV64-NEXT:    j .LBB61_53
13428; CHECK-RV64-NEXT:  .LBB61_579: # %cond.load205
13429; CHECK-RV64-NEXT:    lbu a1, 0(a0)
13430; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
13431; CHECK-RV64-NEXT:    vmv8r.v v16, v8
13432; CHECK-RV64-NEXT:    vmv.s.x v9, a1
13433; CHECK-RV64-NEXT:    li a1, 53
13434; CHECK-RV64-NEXT:    li a3, 52
13435; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m1, tu, ma
13436; CHECK-RV64-NEXT:    vslideup.vx v8, v9, a3
13437; CHECK-RV64-NEXT:    addi a0, a0, 1
13438; CHECK-RV64-NEXT:    vmv1r.v v16, v8
13439; CHECK-RV64-NEXT:    vmv8r.v v8, v16
13440; CHECK-RV64-NEXT:    slli a1, a2, 10
13441; CHECK-RV64-NEXT:    bltz a1, .LBB61_580
13442; CHECK-RV64-NEXT:    j .LBB61_54
13443; CHECK-RV64-NEXT:  .LBB61_580: # %cond.load209
13444; CHECK-RV64-NEXT:    lbu a1, 0(a0)
13445; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
13446; CHECK-RV64-NEXT:    vmv8r.v v16, v8
13447; CHECK-RV64-NEXT:    vmv.s.x v9, a1
13448; CHECK-RV64-NEXT:    li a1, 54
13449; CHECK-RV64-NEXT:    li a3, 53
13450; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m1, tu, ma
13451; CHECK-RV64-NEXT:    vslideup.vx v8, v9, a3
13452; CHECK-RV64-NEXT:    addi a0, a0, 1
13453; CHECK-RV64-NEXT:    vmv1r.v v16, v8
13454; CHECK-RV64-NEXT:    vmv8r.v v8, v16
13455; CHECK-RV64-NEXT:    slli a1, a2, 9
13456; CHECK-RV64-NEXT:    bltz a1, .LBB61_581
13457; CHECK-RV64-NEXT:    j .LBB61_55
13458; CHECK-RV64-NEXT:  .LBB61_581: # %cond.load213
13459; CHECK-RV64-NEXT:    lbu a1, 0(a0)
13460; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
13461; CHECK-RV64-NEXT:    vmv8r.v v16, v8
13462; CHECK-RV64-NEXT:    vmv.s.x v9, a1
13463; CHECK-RV64-NEXT:    li a1, 55
13464; CHECK-RV64-NEXT:    li a3, 54
13465; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m1, tu, ma
13466; CHECK-RV64-NEXT:    vslideup.vx v8, v9, a3
13467; CHECK-RV64-NEXT:    addi a0, a0, 1
13468; CHECK-RV64-NEXT:    vmv1r.v v16, v8
13469; CHECK-RV64-NEXT:    vmv8r.v v8, v16
13470; CHECK-RV64-NEXT:    slli a1, a2, 8
13471; CHECK-RV64-NEXT:    bltz a1, .LBB61_582
13472; CHECK-RV64-NEXT:    j .LBB61_56
13473; CHECK-RV64-NEXT:  .LBB61_582: # %cond.load217
13474; CHECK-RV64-NEXT:    lbu a1, 0(a0)
13475; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
13476; CHECK-RV64-NEXT:    vmv8r.v v16, v8
13477; CHECK-RV64-NEXT:    vmv.s.x v9, a1
13478; CHECK-RV64-NEXT:    li a1, 56
13479; CHECK-RV64-NEXT:    li a3, 55
13480; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m1, tu, ma
13481; CHECK-RV64-NEXT:    vslideup.vx v8, v9, a3
13482; CHECK-RV64-NEXT:    addi a0, a0, 1
13483; CHECK-RV64-NEXT:    vmv1r.v v16, v8
13484; CHECK-RV64-NEXT:    vmv8r.v v8, v16
13485; CHECK-RV64-NEXT:    slli a1, a2, 7
13486; CHECK-RV64-NEXT:    bltz a1, .LBB61_583
13487; CHECK-RV64-NEXT:    j .LBB61_57
13488; CHECK-RV64-NEXT:  .LBB61_583: # %cond.load221
13489; CHECK-RV64-NEXT:    lbu a1, 0(a0)
13490; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
13491; CHECK-RV64-NEXT:    vmv8r.v v16, v8
13492; CHECK-RV64-NEXT:    vmv.s.x v9, a1
13493; CHECK-RV64-NEXT:    li a1, 57
13494; CHECK-RV64-NEXT:    li a3, 56
13495; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m1, tu, ma
13496; CHECK-RV64-NEXT:    vslideup.vx v8, v9, a3
13497; CHECK-RV64-NEXT:    addi a0, a0, 1
13498; CHECK-RV64-NEXT:    vmv1r.v v16, v8
13499; CHECK-RV64-NEXT:    vmv8r.v v8, v16
13500; CHECK-RV64-NEXT:    slli a1, a2, 6
13501; CHECK-RV64-NEXT:    bltz a1, .LBB61_584
13502; CHECK-RV64-NEXT:    j .LBB61_58
13503; CHECK-RV64-NEXT:  .LBB61_584: # %cond.load225
13504; CHECK-RV64-NEXT:    lbu a1, 0(a0)
13505; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
13506; CHECK-RV64-NEXT:    vmv8r.v v16, v8
13507; CHECK-RV64-NEXT:    vmv.s.x v9, a1
13508; CHECK-RV64-NEXT:    li a1, 58
13509; CHECK-RV64-NEXT:    li a3, 57
13510; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m1, tu, ma
13511; CHECK-RV64-NEXT:    vslideup.vx v8, v9, a3
13512; CHECK-RV64-NEXT:    addi a0, a0, 1
13513; CHECK-RV64-NEXT:    vmv1r.v v16, v8
13514; CHECK-RV64-NEXT:    vmv8r.v v8, v16
13515; CHECK-RV64-NEXT:    slli a1, a2, 5
13516; CHECK-RV64-NEXT:    bltz a1, .LBB61_585
13517; CHECK-RV64-NEXT:    j .LBB61_59
13518; CHECK-RV64-NEXT:  .LBB61_585: # %cond.load229
13519; CHECK-RV64-NEXT:    lbu a1, 0(a0)
13520; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
13521; CHECK-RV64-NEXT:    vmv8r.v v16, v8
13522; CHECK-RV64-NEXT:    vmv.s.x v9, a1
13523; CHECK-RV64-NEXT:    li a1, 59
13524; CHECK-RV64-NEXT:    li a3, 58
13525; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m1, tu, ma
13526; CHECK-RV64-NEXT:    vslideup.vx v8, v9, a3
13527; CHECK-RV64-NEXT:    addi a0, a0, 1
13528; CHECK-RV64-NEXT:    vmv1r.v v16, v8
13529; CHECK-RV64-NEXT:    vmv8r.v v8, v16
13530; CHECK-RV64-NEXT:    slli a1, a2, 4
13531; CHECK-RV64-NEXT:    bltz a1, .LBB61_586
13532; CHECK-RV64-NEXT:    j .LBB61_60
13533; CHECK-RV64-NEXT:  .LBB61_586: # %cond.load233
13534; CHECK-RV64-NEXT:    lbu a1, 0(a0)
13535; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
13536; CHECK-RV64-NEXT:    vmv8r.v v16, v8
13537; CHECK-RV64-NEXT:    vmv.s.x v9, a1
13538; CHECK-RV64-NEXT:    li a1, 60
13539; CHECK-RV64-NEXT:    li a3, 59
13540; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m1, tu, ma
13541; CHECK-RV64-NEXT:    vslideup.vx v8, v9, a3
13542; CHECK-RV64-NEXT:    addi a0, a0, 1
13543; CHECK-RV64-NEXT:    vmv1r.v v16, v8
13544; CHECK-RV64-NEXT:    vmv8r.v v8, v16
13545; CHECK-RV64-NEXT:    slli a1, a2, 3
13546; CHECK-RV64-NEXT:    bltz a1, .LBB61_587
13547; CHECK-RV64-NEXT:    j .LBB61_61
13548; CHECK-RV64-NEXT:  .LBB61_587: # %cond.load237
13549; CHECK-RV64-NEXT:    lbu a1, 0(a0)
13550; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
13551; CHECK-RV64-NEXT:    vmv8r.v v16, v8
13552; CHECK-RV64-NEXT:    vmv.s.x v9, a1
13553; CHECK-RV64-NEXT:    li a1, 61
13554; CHECK-RV64-NEXT:    li a3, 60
13555; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m1, tu, ma
13556; CHECK-RV64-NEXT:    vslideup.vx v8, v9, a3
13557; CHECK-RV64-NEXT:    addi a0, a0, 1
13558; CHECK-RV64-NEXT:    vmv1r.v v16, v8
13559; CHECK-RV64-NEXT:    vmv8r.v v8, v16
13560; CHECK-RV64-NEXT:    slli a1, a2, 2
13561; CHECK-RV64-NEXT:    bgez a1, .LBB61_1025
13562; CHECK-RV64-NEXT:    j .LBB61_62
13563; CHECK-RV64-NEXT:  .LBB61_1025: # %cond.load237
13564; CHECK-RV64-NEXT:    j .LBB61_63
13565; CHECK-RV64-NEXT:  .LBB61_588: # %cond.load249
13566; CHECK-RV64-NEXT:    lbu a2, 0(a0)
13567; CHECK-RV64-NEXT:    vmv8r.v v16, v8
13568; CHECK-RV64-NEXT:    vmv.s.x v9, a2
13569; CHECK-RV64-NEXT:    li a2, 64
13570; CHECK-RV64-NEXT:    li a3, 63
13571; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m1, tu, ma
13572; CHECK-RV64-NEXT:    vslideup.vx v8, v9, a3
13573; CHECK-RV64-NEXT:    addi a0, a0, 1
13574; CHECK-RV64-NEXT:    vmv1r.v v16, v8
13575; CHECK-RV64-NEXT:    vmv8r.v v8, v16
13576; CHECK-RV64-NEXT:    andi a2, a1, 1
13577; CHECK-RV64-NEXT:    bnez a2, .LBB61_589
13578; CHECK-RV64-NEXT:    j .LBB61_67
13579; CHECK-RV64-NEXT:  .LBB61_589: # %cond.load253
13580; CHECK-RV64-NEXT:    lbu a2, 0(a0)
13581; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
13582; CHECK-RV64-NEXT:    vmv8r.v v16, v8
13583; CHECK-RV64-NEXT:    vmv.s.x v10, a2
13584; CHECK-RV64-NEXT:    li a2, 65
13585; CHECK-RV64-NEXT:    li a3, 64
13586; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
13587; CHECK-RV64-NEXT:    vslideup.vx v8, v10, a3
13588; CHECK-RV64-NEXT:    addi a0, a0, 1
13589; CHECK-RV64-NEXT:    vmv2r.v v16, v8
13590; CHECK-RV64-NEXT:    vmv8r.v v8, v16
13591; CHECK-RV64-NEXT:    andi a2, a1, 2
13592; CHECK-RV64-NEXT:    bnez a2, .LBB61_590
13593; CHECK-RV64-NEXT:    j .LBB61_68
13594; CHECK-RV64-NEXT:  .LBB61_590: # %cond.load257
13595; CHECK-RV64-NEXT:    lbu a2, 0(a0)
13596; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
13597; CHECK-RV64-NEXT:    vmv8r.v v16, v8
13598; CHECK-RV64-NEXT:    vmv.s.x v10, a2
13599; CHECK-RV64-NEXT:    li a2, 66
13600; CHECK-RV64-NEXT:    li a3, 65
13601; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
13602; CHECK-RV64-NEXT:    vslideup.vx v8, v10, a3
13603; CHECK-RV64-NEXT:    addi a0, a0, 1
13604; CHECK-RV64-NEXT:    vmv2r.v v16, v8
13605; CHECK-RV64-NEXT:    vmv8r.v v8, v16
13606; CHECK-RV64-NEXT:    andi a2, a1, 4
13607; CHECK-RV64-NEXT:    bnez a2, .LBB61_591
13608; CHECK-RV64-NEXT:    j .LBB61_69
13609; CHECK-RV64-NEXT:  .LBB61_591: # %cond.load261
13610; CHECK-RV64-NEXT:    lbu a2, 0(a0)
13611; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
13612; CHECK-RV64-NEXT:    vmv8r.v v16, v8
13613; CHECK-RV64-NEXT:    vmv.s.x v10, a2
13614; CHECK-RV64-NEXT:    li a2, 67
13615; CHECK-RV64-NEXT:    li a3, 66
13616; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
13617; CHECK-RV64-NEXT:    vslideup.vx v8, v10, a3
13618; CHECK-RV64-NEXT:    addi a0, a0, 1
13619; CHECK-RV64-NEXT:    vmv2r.v v16, v8
13620; CHECK-RV64-NEXT:    vmv8r.v v8, v16
13621; CHECK-RV64-NEXT:    andi a2, a1, 8
13622; CHECK-RV64-NEXT:    bnez a2, .LBB61_592
13623; CHECK-RV64-NEXT:    j .LBB61_70
13624; CHECK-RV64-NEXT:  .LBB61_592: # %cond.load265
13625; CHECK-RV64-NEXT:    lbu a2, 0(a0)
13626; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
13627; CHECK-RV64-NEXT:    vmv8r.v v16, v8
13628; CHECK-RV64-NEXT:    vmv.s.x v10, a2
13629; CHECK-RV64-NEXT:    li a2, 68
13630; CHECK-RV64-NEXT:    li a3, 67
13631; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
13632; CHECK-RV64-NEXT:    vslideup.vx v8, v10, a3
13633; CHECK-RV64-NEXT:    addi a0, a0, 1
13634; CHECK-RV64-NEXT:    vmv2r.v v16, v8
13635; CHECK-RV64-NEXT:    vmv8r.v v8, v16
13636; CHECK-RV64-NEXT:    andi a2, a1, 16
13637; CHECK-RV64-NEXT:    bnez a2, .LBB61_593
13638; CHECK-RV64-NEXT:    j .LBB61_71
13639; CHECK-RV64-NEXT:  .LBB61_593: # %cond.load269
13640; CHECK-RV64-NEXT:    lbu a2, 0(a0)
13641; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
13642; CHECK-RV64-NEXT:    vmv8r.v v16, v8
13643; CHECK-RV64-NEXT:    vmv.s.x v10, a2
13644; CHECK-RV64-NEXT:    li a2, 69
13645; CHECK-RV64-NEXT:    li a3, 68
13646; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
13647; CHECK-RV64-NEXT:    vslideup.vx v8, v10, a3
13648; CHECK-RV64-NEXT:    addi a0, a0, 1
13649; CHECK-RV64-NEXT:    vmv2r.v v16, v8
13650; CHECK-RV64-NEXT:    vmv8r.v v8, v16
13651; CHECK-RV64-NEXT:    andi a2, a1, 32
13652; CHECK-RV64-NEXT:    bnez a2, .LBB61_594
13653; CHECK-RV64-NEXT:    j .LBB61_72
13654; CHECK-RV64-NEXT:  .LBB61_594: # %cond.load273
13655; CHECK-RV64-NEXT:    lbu a2, 0(a0)
13656; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
13657; CHECK-RV64-NEXT:    vmv8r.v v16, v8
13658; CHECK-RV64-NEXT:    vmv.s.x v10, a2
13659; CHECK-RV64-NEXT:    li a2, 70
13660; CHECK-RV64-NEXT:    li a3, 69
13661; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
13662; CHECK-RV64-NEXT:    vslideup.vx v8, v10, a3
13663; CHECK-RV64-NEXT:    addi a0, a0, 1
13664; CHECK-RV64-NEXT:    vmv2r.v v16, v8
13665; CHECK-RV64-NEXT:    vmv8r.v v8, v16
13666; CHECK-RV64-NEXT:    andi a2, a1, 64
13667; CHECK-RV64-NEXT:    bnez a2, .LBB61_595
13668; CHECK-RV64-NEXT:    j .LBB61_73
13669; CHECK-RV64-NEXT:  .LBB61_595: # %cond.load277
13670; CHECK-RV64-NEXT:    lbu a2, 0(a0)
13671; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
13672; CHECK-RV64-NEXT:    vmv8r.v v16, v8
13673; CHECK-RV64-NEXT:    vmv.s.x v10, a2
13674; CHECK-RV64-NEXT:    li a2, 71
13675; CHECK-RV64-NEXT:    li a3, 70
13676; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
13677; CHECK-RV64-NEXT:    vslideup.vx v8, v10, a3
13678; CHECK-RV64-NEXT:    addi a0, a0, 1
13679; CHECK-RV64-NEXT:    vmv2r.v v16, v8
13680; CHECK-RV64-NEXT:    vmv8r.v v8, v16
13681; CHECK-RV64-NEXT:    andi a2, a1, 128
13682; CHECK-RV64-NEXT:    bnez a2, .LBB61_596
13683; CHECK-RV64-NEXT:    j .LBB61_74
13684; CHECK-RV64-NEXT:  .LBB61_596: # %cond.load281
13685; CHECK-RV64-NEXT:    lbu a2, 0(a0)
13686; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
13687; CHECK-RV64-NEXT:    vmv8r.v v16, v8
13688; CHECK-RV64-NEXT:    vmv.s.x v10, a2
13689; CHECK-RV64-NEXT:    li a2, 72
13690; CHECK-RV64-NEXT:    li a3, 71
13691; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
13692; CHECK-RV64-NEXT:    vslideup.vx v8, v10, a3
13693; CHECK-RV64-NEXT:    addi a0, a0, 1
13694; CHECK-RV64-NEXT:    vmv2r.v v16, v8
13695; CHECK-RV64-NEXT:    vmv8r.v v8, v16
13696; CHECK-RV64-NEXT:    andi a2, a1, 256
13697; CHECK-RV64-NEXT:    bnez a2, .LBB61_597
13698; CHECK-RV64-NEXT:    j .LBB61_75
13699; CHECK-RV64-NEXT:  .LBB61_597: # %cond.load285
13700; CHECK-RV64-NEXT:    lbu a2, 0(a0)
13701; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
13702; CHECK-RV64-NEXT:    vmv8r.v v16, v8
13703; CHECK-RV64-NEXT:    vmv.s.x v10, a2
13704; CHECK-RV64-NEXT:    li a2, 73
13705; CHECK-RV64-NEXT:    li a3, 72
13706; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
13707; CHECK-RV64-NEXT:    vslideup.vx v8, v10, a3
13708; CHECK-RV64-NEXT:    addi a0, a0, 1
13709; CHECK-RV64-NEXT:    vmv2r.v v16, v8
13710; CHECK-RV64-NEXT:    vmv8r.v v8, v16
13711; CHECK-RV64-NEXT:    andi a2, a1, 512
13712; CHECK-RV64-NEXT:    bnez a2, .LBB61_598
13713; CHECK-RV64-NEXT:    j .LBB61_76
13714; CHECK-RV64-NEXT:  .LBB61_598: # %cond.load289
13715; CHECK-RV64-NEXT:    lbu a2, 0(a0)
13716; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
13717; CHECK-RV64-NEXT:    vmv8r.v v16, v8
13718; CHECK-RV64-NEXT:    vmv.s.x v10, a2
13719; CHECK-RV64-NEXT:    li a2, 74
13720; CHECK-RV64-NEXT:    li a3, 73
13721; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
13722; CHECK-RV64-NEXT:    vslideup.vx v8, v10, a3
13723; CHECK-RV64-NEXT:    addi a0, a0, 1
13724; CHECK-RV64-NEXT:    vmv2r.v v16, v8
13725; CHECK-RV64-NEXT:    vmv8r.v v8, v16
13726; CHECK-RV64-NEXT:    andi a2, a1, 1024
13727; CHECK-RV64-NEXT:    bnez a2, .LBB61_599
13728; CHECK-RV64-NEXT:    j .LBB61_77
13729; CHECK-RV64-NEXT:  .LBB61_599: # %cond.load293
13730; CHECK-RV64-NEXT:    lbu a2, 0(a0)
13731; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
13732; CHECK-RV64-NEXT:    vmv8r.v v16, v8
13733; CHECK-RV64-NEXT:    vmv.s.x v10, a2
13734; CHECK-RV64-NEXT:    li a2, 75
13735; CHECK-RV64-NEXT:    li a3, 74
13736; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
13737; CHECK-RV64-NEXT:    vslideup.vx v8, v10, a3
13738; CHECK-RV64-NEXT:    addi a0, a0, 1
13739; CHECK-RV64-NEXT:    vmv2r.v v16, v8
13740; CHECK-RV64-NEXT:    vmv8r.v v8, v16
13741; CHECK-RV64-NEXT:    slli a2, a1, 52
13742; CHECK-RV64-NEXT:    bltz a2, .LBB61_600
13743; CHECK-RV64-NEXT:    j .LBB61_78
13744; CHECK-RV64-NEXT:  .LBB61_600: # %cond.load297
13745; CHECK-RV64-NEXT:    lbu a2, 0(a0)
13746; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
13747; CHECK-RV64-NEXT:    vmv8r.v v16, v8
13748; CHECK-RV64-NEXT:    vmv.s.x v10, a2
13749; CHECK-RV64-NEXT:    li a2, 76
13750; CHECK-RV64-NEXT:    li a3, 75
13751; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
13752; CHECK-RV64-NEXT:    vslideup.vx v8, v10, a3
13753; CHECK-RV64-NEXT:    addi a0, a0, 1
13754; CHECK-RV64-NEXT:    vmv2r.v v16, v8
13755; CHECK-RV64-NEXT:    vmv8r.v v8, v16
13756; CHECK-RV64-NEXT:    slli a2, a1, 51
13757; CHECK-RV64-NEXT:    bltz a2, .LBB61_601
13758; CHECK-RV64-NEXT:    j .LBB61_79
13759; CHECK-RV64-NEXT:  .LBB61_601: # %cond.load301
13760; CHECK-RV64-NEXT:    lbu a2, 0(a0)
13761; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
13762; CHECK-RV64-NEXT:    vmv8r.v v16, v8
13763; CHECK-RV64-NEXT:    vmv.s.x v10, a2
13764; CHECK-RV64-NEXT:    li a2, 77
13765; CHECK-RV64-NEXT:    li a3, 76
13766; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
13767; CHECK-RV64-NEXT:    vslideup.vx v8, v10, a3
13768; CHECK-RV64-NEXT:    addi a0, a0, 1
13769; CHECK-RV64-NEXT:    vmv2r.v v16, v8
13770; CHECK-RV64-NEXT:    vmv8r.v v8, v16
13771; CHECK-RV64-NEXT:    slli a2, a1, 50
13772; CHECK-RV64-NEXT:    bltz a2, .LBB61_602
13773; CHECK-RV64-NEXT:    j .LBB61_80
13774; CHECK-RV64-NEXT:  .LBB61_602: # %cond.load305
13775; CHECK-RV64-NEXT:    lbu a2, 0(a0)
13776; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
13777; CHECK-RV64-NEXT:    vmv8r.v v16, v8
13778; CHECK-RV64-NEXT:    vmv.s.x v10, a2
13779; CHECK-RV64-NEXT:    li a2, 78
13780; CHECK-RV64-NEXT:    li a3, 77
13781; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
13782; CHECK-RV64-NEXT:    vslideup.vx v8, v10, a3
13783; CHECK-RV64-NEXT:    addi a0, a0, 1
13784; CHECK-RV64-NEXT:    vmv2r.v v16, v8
13785; CHECK-RV64-NEXT:    vmv8r.v v8, v16
13786; CHECK-RV64-NEXT:    slli a2, a1, 49
13787; CHECK-RV64-NEXT:    bltz a2, .LBB61_603
13788; CHECK-RV64-NEXT:    j .LBB61_81
13789; CHECK-RV64-NEXT:  .LBB61_603: # %cond.load309
13790; CHECK-RV64-NEXT:    lbu a2, 0(a0)
13791; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
13792; CHECK-RV64-NEXT:    vmv8r.v v16, v8
13793; CHECK-RV64-NEXT:    vmv.s.x v10, a2
13794; CHECK-RV64-NEXT:    li a2, 79
13795; CHECK-RV64-NEXT:    li a3, 78
13796; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
13797; CHECK-RV64-NEXT:    vslideup.vx v8, v10, a3
13798; CHECK-RV64-NEXT:    addi a0, a0, 1
13799; CHECK-RV64-NEXT:    vmv2r.v v16, v8
13800; CHECK-RV64-NEXT:    vmv8r.v v8, v16
13801; CHECK-RV64-NEXT:    slli a2, a1, 48
13802; CHECK-RV64-NEXT:    bltz a2, .LBB61_604
13803; CHECK-RV64-NEXT:    j .LBB61_82
13804; CHECK-RV64-NEXT:  .LBB61_604: # %cond.load313
13805; CHECK-RV64-NEXT:    lbu a2, 0(a0)
13806; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
13807; CHECK-RV64-NEXT:    vmv8r.v v16, v8
13808; CHECK-RV64-NEXT:    vmv.s.x v10, a2
13809; CHECK-RV64-NEXT:    li a2, 80
13810; CHECK-RV64-NEXT:    li a3, 79
13811; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
13812; CHECK-RV64-NEXT:    vslideup.vx v8, v10, a3
13813; CHECK-RV64-NEXT:    addi a0, a0, 1
13814; CHECK-RV64-NEXT:    vmv2r.v v16, v8
13815; CHECK-RV64-NEXT:    vmv8r.v v8, v16
13816; CHECK-RV64-NEXT:    slli a2, a1, 47
13817; CHECK-RV64-NEXT:    bltz a2, .LBB61_605
13818; CHECK-RV64-NEXT:    j .LBB61_83
13819; CHECK-RV64-NEXT:  .LBB61_605: # %cond.load317
13820; CHECK-RV64-NEXT:    lbu a2, 0(a0)
13821; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
13822; CHECK-RV64-NEXT:    vmv8r.v v16, v8
13823; CHECK-RV64-NEXT:    vmv.s.x v10, a2
13824; CHECK-RV64-NEXT:    li a2, 81
13825; CHECK-RV64-NEXT:    li a3, 80
13826; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
13827; CHECK-RV64-NEXT:    vslideup.vx v8, v10, a3
13828; CHECK-RV64-NEXT:    addi a0, a0, 1
13829; CHECK-RV64-NEXT:    vmv2r.v v16, v8
13830; CHECK-RV64-NEXT:    vmv8r.v v8, v16
13831; CHECK-RV64-NEXT:    slli a2, a1, 46
13832; CHECK-RV64-NEXT:    bltz a2, .LBB61_606
13833; CHECK-RV64-NEXT:    j .LBB61_84
13834; CHECK-RV64-NEXT:  .LBB61_606: # %cond.load321
13835; CHECK-RV64-NEXT:    lbu a2, 0(a0)
13836; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
13837; CHECK-RV64-NEXT:    vmv8r.v v16, v8
13838; CHECK-RV64-NEXT:    vmv.s.x v10, a2
13839; CHECK-RV64-NEXT:    li a2, 82
13840; CHECK-RV64-NEXT:    li a3, 81
13841; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
13842; CHECK-RV64-NEXT:    vslideup.vx v8, v10, a3
13843; CHECK-RV64-NEXT:    addi a0, a0, 1
13844; CHECK-RV64-NEXT:    vmv2r.v v16, v8
13845; CHECK-RV64-NEXT:    vmv8r.v v8, v16
13846; CHECK-RV64-NEXT:    slli a2, a1, 45
13847; CHECK-RV64-NEXT:    bltz a2, .LBB61_607
13848; CHECK-RV64-NEXT:    j .LBB61_85
13849; CHECK-RV64-NEXT:  .LBB61_607: # %cond.load325
13850; CHECK-RV64-NEXT:    lbu a2, 0(a0)
13851; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
13852; CHECK-RV64-NEXT:    vmv8r.v v16, v8
13853; CHECK-RV64-NEXT:    vmv.s.x v10, a2
13854; CHECK-RV64-NEXT:    li a2, 83
13855; CHECK-RV64-NEXT:    li a3, 82
13856; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
13857; CHECK-RV64-NEXT:    vslideup.vx v8, v10, a3
13858; CHECK-RV64-NEXT:    addi a0, a0, 1
13859; CHECK-RV64-NEXT:    vmv2r.v v16, v8
13860; CHECK-RV64-NEXT:    vmv8r.v v8, v16
13861; CHECK-RV64-NEXT:    slli a2, a1, 44
13862; CHECK-RV64-NEXT:    bltz a2, .LBB61_608
13863; CHECK-RV64-NEXT:    j .LBB61_86
13864; CHECK-RV64-NEXT:  .LBB61_608: # %cond.load329
13865; CHECK-RV64-NEXT:    lbu a2, 0(a0)
13866; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
13867; CHECK-RV64-NEXT:    vmv8r.v v16, v8
13868; CHECK-RV64-NEXT:    vmv.s.x v10, a2
13869; CHECK-RV64-NEXT:    li a2, 84
13870; CHECK-RV64-NEXT:    li a3, 83
13871; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
13872; CHECK-RV64-NEXT:    vslideup.vx v8, v10, a3
13873; CHECK-RV64-NEXT:    addi a0, a0, 1
13874; CHECK-RV64-NEXT:    vmv2r.v v16, v8
13875; CHECK-RV64-NEXT:    vmv8r.v v8, v16
13876; CHECK-RV64-NEXT:    slli a2, a1, 43
13877; CHECK-RV64-NEXT:    bltz a2, .LBB61_609
13878; CHECK-RV64-NEXT:    j .LBB61_87
13879; CHECK-RV64-NEXT:  .LBB61_609: # %cond.load333
13880; CHECK-RV64-NEXT:    lbu a2, 0(a0)
13881; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
13882; CHECK-RV64-NEXT:    vmv8r.v v16, v8
13883; CHECK-RV64-NEXT:    vmv.s.x v10, a2
13884; CHECK-RV64-NEXT:    li a2, 85
13885; CHECK-RV64-NEXT:    li a3, 84
13886; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
13887; CHECK-RV64-NEXT:    vslideup.vx v8, v10, a3
13888; CHECK-RV64-NEXT:    addi a0, a0, 1
13889; CHECK-RV64-NEXT:    vmv2r.v v16, v8
13890; CHECK-RV64-NEXT:    vmv8r.v v8, v16
13891; CHECK-RV64-NEXT:    slli a2, a1, 42
13892; CHECK-RV64-NEXT:    bltz a2, .LBB61_610
13893; CHECK-RV64-NEXT:    j .LBB61_88
13894; CHECK-RV64-NEXT:  .LBB61_610: # %cond.load337
13895; CHECK-RV64-NEXT:    lbu a2, 0(a0)
13896; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
13897; CHECK-RV64-NEXT:    vmv8r.v v16, v8
13898; CHECK-RV64-NEXT:    vmv.s.x v10, a2
13899; CHECK-RV64-NEXT:    li a2, 86
13900; CHECK-RV64-NEXT:    li a3, 85
13901; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
13902; CHECK-RV64-NEXT:    vslideup.vx v8, v10, a3
13903; CHECK-RV64-NEXT:    addi a0, a0, 1
13904; CHECK-RV64-NEXT:    vmv2r.v v16, v8
13905; CHECK-RV64-NEXT:    vmv8r.v v8, v16
13906; CHECK-RV64-NEXT:    slli a2, a1, 41
13907; CHECK-RV64-NEXT:    bltz a2, .LBB61_611
13908; CHECK-RV64-NEXT:    j .LBB61_89
13909; CHECK-RV64-NEXT:  .LBB61_611: # %cond.load341
13910; CHECK-RV64-NEXT:    lbu a2, 0(a0)
13911; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
13912; CHECK-RV64-NEXT:    vmv8r.v v16, v8
13913; CHECK-RV64-NEXT:    vmv.s.x v10, a2
13914; CHECK-RV64-NEXT:    li a2, 87
13915; CHECK-RV64-NEXT:    li a3, 86
13916; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
13917; CHECK-RV64-NEXT:    vslideup.vx v8, v10, a3
13918; CHECK-RV64-NEXT:    addi a0, a0, 1
13919; CHECK-RV64-NEXT:    vmv2r.v v16, v8
13920; CHECK-RV64-NEXT:    vmv8r.v v8, v16
13921; CHECK-RV64-NEXT:    slli a2, a1, 40
13922; CHECK-RV64-NEXT:    bltz a2, .LBB61_612
13923; CHECK-RV64-NEXT:    j .LBB61_90
13924; CHECK-RV64-NEXT:  .LBB61_612: # %cond.load345
13925; CHECK-RV64-NEXT:    lbu a2, 0(a0)
13926; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
13927; CHECK-RV64-NEXT:    vmv8r.v v16, v8
13928; CHECK-RV64-NEXT:    vmv.s.x v10, a2
13929; CHECK-RV64-NEXT:    li a2, 88
13930; CHECK-RV64-NEXT:    li a3, 87
13931; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
13932; CHECK-RV64-NEXT:    vslideup.vx v8, v10, a3
13933; CHECK-RV64-NEXT:    addi a0, a0, 1
13934; CHECK-RV64-NEXT:    vmv2r.v v16, v8
13935; CHECK-RV64-NEXT:    vmv8r.v v8, v16
13936; CHECK-RV64-NEXT:    slli a2, a1, 39
13937; CHECK-RV64-NEXT:    bltz a2, .LBB61_613
13938; CHECK-RV64-NEXT:    j .LBB61_91
13939; CHECK-RV64-NEXT:  .LBB61_613: # %cond.load349
13940; CHECK-RV64-NEXT:    lbu a2, 0(a0)
13941; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
13942; CHECK-RV64-NEXT:    vmv8r.v v16, v8
13943; CHECK-RV64-NEXT:    vmv.s.x v10, a2
13944; CHECK-RV64-NEXT:    li a2, 89
13945; CHECK-RV64-NEXT:    li a3, 88
13946; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
13947; CHECK-RV64-NEXT:    vslideup.vx v8, v10, a3
13948; CHECK-RV64-NEXT:    addi a0, a0, 1
13949; CHECK-RV64-NEXT:    vmv2r.v v16, v8
13950; CHECK-RV64-NEXT:    vmv8r.v v8, v16
13951; CHECK-RV64-NEXT:    slli a2, a1, 38
13952; CHECK-RV64-NEXT:    bltz a2, .LBB61_614
13953; CHECK-RV64-NEXT:    j .LBB61_92
13954; CHECK-RV64-NEXT:  .LBB61_614: # %cond.load353
13955; CHECK-RV64-NEXT:    lbu a2, 0(a0)
13956; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
13957; CHECK-RV64-NEXT:    vmv8r.v v16, v8
13958; CHECK-RV64-NEXT:    vmv.s.x v10, a2
13959; CHECK-RV64-NEXT:    li a2, 90
13960; CHECK-RV64-NEXT:    li a3, 89
13961; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
13962; CHECK-RV64-NEXT:    vslideup.vx v8, v10, a3
13963; CHECK-RV64-NEXT:    addi a0, a0, 1
13964; CHECK-RV64-NEXT:    vmv2r.v v16, v8
13965; CHECK-RV64-NEXT:    vmv8r.v v8, v16
13966; CHECK-RV64-NEXT:    slli a2, a1, 37
13967; CHECK-RV64-NEXT:    bltz a2, .LBB61_615
13968; CHECK-RV64-NEXT:    j .LBB61_93
13969; CHECK-RV64-NEXT:  .LBB61_615: # %cond.load357
13970; CHECK-RV64-NEXT:    lbu a2, 0(a0)
13971; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
13972; CHECK-RV64-NEXT:    vmv8r.v v16, v8
13973; CHECK-RV64-NEXT:    vmv.s.x v10, a2
13974; CHECK-RV64-NEXT:    li a2, 91
13975; CHECK-RV64-NEXT:    li a3, 90
13976; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
13977; CHECK-RV64-NEXT:    vslideup.vx v8, v10, a3
13978; CHECK-RV64-NEXT:    addi a0, a0, 1
13979; CHECK-RV64-NEXT:    vmv2r.v v16, v8
13980; CHECK-RV64-NEXT:    vmv8r.v v8, v16
13981; CHECK-RV64-NEXT:    slli a2, a1, 36
13982; CHECK-RV64-NEXT:    bltz a2, .LBB61_616
13983; CHECK-RV64-NEXT:    j .LBB61_94
13984; CHECK-RV64-NEXT:  .LBB61_616: # %cond.load361
13985; CHECK-RV64-NEXT:    lbu a2, 0(a0)
13986; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
13987; CHECK-RV64-NEXT:    vmv8r.v v16, v8
13988; CHECK-RV64-NEXT:    vmv.s.x v10, a2
13989; CHECK-RV64-NEXT:    li a2, 92
13990; CHECK-RV64-NEXT:    li a3, 91
13991; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
13992; CHECK-RV64-NEXT:    vslideup.vx v8, v10, a3
13993; CHECK-RV64-NEXT:    addi a0, a0, 1
13994; CHECK-RV64-NEXT:    vmv2r.v v16, v8
13995; CHECK-RV64-NEXT:    vmv8r.v v8, v16
13996; CHECK-RV64-NEXT:    slli a2, a1, 35
13997; CHECK-RV64-NEXT:    bltz a2, .LBB61_617
13998; CHECK-RV64-NEXT:    j .LBB61_95
13999; CHECK-RV64-NEXT:  .LBB61_617: # %cond.load365
14000; CHECK-RV64-NEXT:    lbu a2, 0(a0)
14001; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
14002; CHECK-RV64-NEXT:    vmv8r.v v16, v8
14003; CHECK-RV64-NEXT:    vmv.s.x v10, a2
14004; CHECK-RV64-NEXT:    li a2, 93
14005; CHECK-RV64-NEXT:    li a3, 92
14006; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
14007; CHECK-RV64-NEXT:    vslideup.vx v8, v10, a3
14008; CHECK-RV64-NEXT:    addi a0, a0, 1
14009; CHECK-RV64-NEXT:    vmv2r.v v16, v8
14010; CHECK-RV64-NEXT:    vmv8r.v v8, v16
14011; CHECK-RV64-NEXT:    slli a2, a1, 34
14012; CHECK-RV64-NEXT:    bltz a2, .LBB61_618
14013; CHECK-RV64-NEXT:    j .LBB61_96
14014; CHECK-RV64-NEXT:  .LBB61_618: # %cond.load369
14015; CHECK-RV64-NEXT:    lbu a2, 0(a0)
14016; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
14017; CHECK-RV64-NEXT:    vmv8r.v v16, v8
14018; CHECK-RV64-NEXT:    vmv.s.x v10, a2
14019; CHECK-RV64-NEXT:    li a2, 94
14020; CHECK-RV64-NEXT:    li a3, 93
14021; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
14022; CHECK-RV64-NEXT:    vslideup.vx v8, v10, a3
14023; CHECK-RV64-NEXT:    addi a0, a0, 1
14024; CHECK-RV64-NEXT:    vmv2r.v v16, v8
14025; CHECK-RV64-NEXT:    vmv8r.v v8, v16
14026; CHECK-RV64-NEXT:    slli a2, a1, 33
14027; CHECK-RV64-NEXT:    bltz a2, .LBB61_619
14028; CHECK-RV64-NEXT:    j .LBB61_97
14029; CHECK-RV64-NEXT:  .LBB61_619: # %cond.load373
14030; CHECK-RV64-NEXT:    lbu a2, 0(a0)
14031; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
14032; CHECK-RV64-NEXT:    vmv8r.v v16, v8
14033; CHECK-RV64-NEXT:    vmv.s.x v10, a2
14034; CHECK-RV64-NEXT:    li a2, 95
14035; CHECK-RV64-NEXT:    li a3, 94
14036; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
14037; CHECK-RV64-NEXT:    vslideup.vx v8, v10, a3
14038; CHECK-RV64-NEXT:    addi a0, a0, 1
14039; CHECK-RV64-NEXT:    vmv2r.v v16, v8
14040; CHECK-RV64-NEXT:    vmv8r.v v8, v16
14041; CHECK-RV64-NEXT:    slli a2, a1, 32
14042; CHECK-RV64-NEXT:    bltz a2, .LBB61_620
14043; CHECK-RV64-NEXT:    j .LBB61_98
14044; CHECK-RV64-NEXT:  .LBB61_620: # %cond.load377
14045; CHECK-RV64-NEXT:    lbu a2, 0(a0)
14046; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
14047; CHECK-RV64-NEXT:    vmv8r.v v16, v8
14048; CHECK-RV64-NEXT:    vmv.s.x v10, a2
14049; CHECK-RV64-NEXT:    li a2, 96
14050; CHECK-RV64-NEXT:    li a3, 95
14051; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
14052; CHECK-RV64-NEXT:    vslideup.vx v8, v10, a3
14053; CHECK-RV64-NEXT:    addi a0, a0, 1
14054; CHECK-RV64-NEXT:    vmv2r.v v16, v8
14055; CHECK-RV64-NEXT:    vmv8r.v v8, v16
14056; CHECK-RV64-NEXT:    slli a2, a1, 31
14057; CHECK-RV64-NEXT:    bltz a2, .LBB61_621
14058; CHECK-RV64-NEXT:    j .LBB61_99
14059; CHECK-RV64-NEXT:  .LBB61_621: # %cond.load381
14060; CHECK-RV64-NEXT:    lbu a2, 0(a0)
14061; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
14062; CHECK-RV64-NEXT:    vmv8r.v v16, v8
14063; CHECK-RV64-NEXT:    vmv.s.x v10, a2
14064; CHECK-RV64-NEXT:    li a2, 97
14065; CHECK-RV64-NEXT:    li a3, 96
14066; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
14067; CHECK-RV64-NEXT:    vslideup.vx v8, v10, a3
14068; CHECK-RV64-NEXT:    addi a0, a0, 1
14069; CHECK-RV64-NEXT:    vmv2r.v v16, v8
14070; CHECK-RV64-NEXT:    vmv8r.v v8, v16
14071; CHECK-RV64-NEXT:    slli a2, a1, 30
14072; CHECK-RV64-NEXT:    bltz a2, .LBB61_622
14073; CHECK-RV64-NEXT:    j .LBB61_100
14074; CHECK-RV64-NEXT:  .LBB61_622: # %cond.load385
14075; CHECK-RV64-NEXT:    lbu a2, 0(a0)
14076; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
14077; CHECK-RV64-NEXT:    vmv8r.v v16, v8
14078; CHECK-RV64-NEXT:    vmv.s.x v10, a2
14079; CHECK-RV64-NEXT:    li a2, 98
14080; CHECK-RV64-NEXT:    li a3, 97
14081; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
14082; CHECK-RV64-NEXT:    vslideup.vx v8, v10, a3
14083; CHECK-RV64-NEXT:    addi a0, a0, 1
14084; CHECK-RV64-NEXT:    vmv2r.v v16, v8
14085; CHECK-RV64-NEXT:    vmv8r.v v8, v16
14086; CHECK-RV64-NEXT:    slli a2, a1, 29
14087; CHECK-RV64-NEXT:    bltz a2, .LBB61_623
14088; CHECK-RV64-NEXT:    j .LBB61_101
14089; CHECK-RV64-NEXT:  .LBB61_623: # %cond.load389
14090; CHECK-RV64-NEXT:    lbu a2, 0(a0)
14091; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
14092; CHECK-RV64-NEXT:    vmv8r.v v16, v8
14093; CHECK-RV64-NEXT:    vmv.s.x v10, a2
14094; CHECK-RV64-NEXT:    li a2, 99
14095; CHECK-RV64-NEXT:    li a3, 98
14096; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
14097; CHECK-RV64-NEXT:    vslideup.vx v8, v10, a3
14098; CHECK-RV64-NEXT:    addi a0, a0, 1
14099; CHECK-RV64-NEXT:    vmv2r.v v16, v8
14100; CHECK-RV64-NEXT:    vmv8r.v v8, v16
14101; CHECK-RV64-NEXT:    slli a2, a1, 28
14102; CHECK-RV64-NEXT:    bltz a2, .LBB61_624
14103; CHECK-RV64-NEXT:    j .LBB61_102
14104; CHECK-RV64-NEXT:  .LBB61_624: # %cond.load393
14105; CHECK-RV64-NEXT:    lbu a2, 0(a0)
14106; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
14107; CHECK-RV64-NEXT:    vmv8r.v v16, v8
14108; CHECK-RV64-NEXT:    vmv.s.x v10, a2
14109; CHECK-RV64-NEXT:    li a2, 100
14110; CHECK-RV64-NEXT:    li a3, 99
14111; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
14112; CHECK-RV64-NEXT:    vslideup.vx v8, v10, a3
14113; CHECK-RV64-NEXT:    addi a0, a0, 1
14114; CHECK-RV64-NEXT:    vmv2r.v v16, v8
14115; CHECK-RV64-NEXT:    vmv8r.v v8, v16
14116; CHECK-RV64-NEXT:    slli a2, a1, 27
14117; CHECK-RV64-NEXT:    bltz a2, .LBB61_625
14118; CHECK-RV64-NEXT:    j .LBB61_103
14119; CHECK-RV64-NEXT:  .LBB61_625: # %cond.load397
14120; CHECK-RV64-NEXT:    lbu a2, 0(a0)
14121; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
14122; CHECK-RV64-NEXT:    vmv8r.v v16, v8
14123; CHECK-RV64-NEXT:    vmv.s.x v10, a2
14124; CHECK-RV64-NEXT:    li a2, 101
14125; CHECK-RV64-NEXT:    li a3, 100
14126; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
14127; CHECK-RV64-NEXT:    vslideup.vx v8, v10, a3
14128; CHECK-RV64-NEXT:    addi a0, a0, 1
14129; CHECK-RV64-NEXT:    vmv2r.v v16, v8
14130; CHECK-RV64-NEXT:    vmv8r.v v8, v16
14131; CHECK-RV64-NEXT:    slli a2, a1, 26
14132; CHECK-RV64-NEXT:    bltz a2, .LBB61_626
14133; CHECK-RV64-NEXT:    j .LBB61_104
14134; CHECK-RV64-NEXT:  .LBB61_626: # %cond.load401
14135; CHECK-RV64-NEXT:    lbu a2, 0(a0)
14136; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
14137; CHECK-RV64-NEXT:    vmv8r.v v16, v8
14138; CHECK-RV64-NEXT:    vmv.s.x v10, a2
14139; CHECK-RV64-NEXT:    li a2, 102
14140; CHECK-RV64-NEXT:    li a3, 101
14141; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
14142; CHECK-RV64-NEXT:    vslideup.vx v8, v10, a3
14143; CHECK-RV64-NEXT:    addi a0, a0, 1
14144; CHECK-RV64-NEXT:    vmv2r.v v16, v8
14145; CHECK-RV64-NEXT:    vmv8r.v v8, v16
14146; CHECK-RV64-NEXT:    slli a2, a1, 25
14147; CHECK-RV64-NEXT:    bltz a2, .LBB61_627
14148; CHECK-RV64-NEXT:    j .LBB61_105
14149; CHECK-RV64-NEXT:  .LBB61_627: # %cond.load405
14150; CHECK-RV64-NEXT:    lbu a2, 0(a0)
14151; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
14152; CHECK-RV64-NEXT:    vmv8r.v v16, v8
14153; CHECK-RV64-NEXT:    vmv.s.x v10, a2
14154; CHECK-RV64-NEXT:    li a2, 103
14155; CHECK-RV64-NEXT:    li a3, 102
14156; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
14157; CHECK-RV64-NEXT:    vslideup.vx v8, v10, a3
14158; CHECK-RV64-NEXT:    addi a0, a0, 1
14159; CHECK-RV64-NEXT:    vmv2r.v v16, v8
14160; CHECK-RV64-NEXT:    vmv8r.v v8, v16
14161; CHECK-RV64-NEXT:    slli a2, a1, 24
14162; CHECK-RV64-NEXT:    bltz a2, .LBB61_628
14163; CHECK-RV64-NEXT:    j .LBB61_106
14164; CHECK-RV64-NEXT:  .LBB61_628: # %cond.load409
14165; CHECK-RV64-NEXT:    lbu a2, 0(a0)
14166; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
14167; CHECK-RV64-NEXT:    vmv8r.v v16, v8
14168; CHECK-RV64-NEXT:    vmv.s.x v10, a2
14169; CHECK-RV64-NEXT:    li a2, 104
14170; CHECK-RV64-NEXT:    li a3, 103
14171; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
14172; CHECK-RV64-NEXT:    vslideup.vx v8, v10, a3
14173; CHECK-RV64-NEXT:    addi a0, a0, 1
14174; CHECK-RV64-NEXT:    vmv2r.v v16, v8
14175; CHECK-RV64-NEXT:    vmv8r.v v8, v16
14176; CHECK-RV64-NEXT:    slli a2, a1, 23
14177; CHECK-RV64-NEXT:    bltz a2, .LBB61_629
14178; CHECK-RV64-NEXT:    j .LBB61_107
14179; CHECK-RV64-NEXT:  .LBB61_629: # %cond.load413
14180; CHECK-RV64-NEXT:    lbu a2, 0(a0)
14181; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
14182; CHECK-RV64-NEXT:    vmv8r.v v16, v8
14183; CHECK-RV64-NEXT:    vmv.s.x v10, a2
14184; CHECK-RV64-NEXT:    li a2, 105
14185; CHECK-RV64-NEXT:    li a3, 104
14186; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
14187; CHECK-RV64-NEXT:    vslideup.vx v8, v10, a3
14188; CHECK-RV64-NEXT:    addi a0, a0, 1
14189; CHECK-RV64-NEXT:    vmv2r.v v16, v8
14190; CHECK-RV64-NEXT:    vmv8r.v v8, v16
14191; CHECK-RV64-NEXT:    slli a2, a1, 22
14192; CHECK-RV64-NEXT:    bltz a2, .LBB61_630
14193; CHECK-RV64-NEXT:    j .LBB61_108
14194; CHECK-RV64-NEXT:  .LBB61_630: # %cond.load417
14195; CHECK-RV64-NEXT:    lbu a2, 0(a0)
14196; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
14197; CHECK-RV64-NEXT:    vmv8r.v v16, v8
14198; CHECK-RV64-NEXT:    vmv.s.x v10, a2
14199; CHECK-RV64-NEXT:    li a2, 106
14200; CHECK-RV64-NEXT:    li a3, 105
14201; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
14202; CHECK-RV64-NEXT:    vslideup.vx v8, v10, a3
14203; CHECK-RV64-NEXT:    addi a0, a0, 1
14204; CHECK-RV64-NEXT:    vmv2r.v v16, v8
14205; CHECK-RV64-NEXT:    vmv8r.v v8, v16
14206; CHECK-RV64-NEXT:    slli a2, a1, 21
14207; CHECK-RV64-NEXT:    bltz a2, .LBB61_631
14208; CHECK-RV64-NEXT:    j .LBB61_109
14209; CHECK-RV64-NEXT:  .LBB61_631: # %cond.load421
14210; CHECK-RV64-NEXT:    lbu a2, 0(a0)
14211; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
14212; CHECK-RV64-NEXT:    vmv8r.v v16, v8
14213; CHECK-RV64-NEXT:    vmv.s.x v10, a2
14214; CHECK-RV64-NEXT:    li a2, 107
14215; CHECK-RV64-NEXT:    li a3, 106
14216; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
14217; CHECK-RV64-NEXT:    vslideup.vx v8, v10, a3
14218; CHECK-RV64-NEXT:    addi a0, a0, 1
14219; CHECK-RV64-NEXT:    vmv2r.v v16, v8
14220; CHECK-RV64-NEXT:    vmv8r.v v8, v16
14221; CHECK-RV64-NEXT:    slli a2, a1, 20
14222; CHECK-RV64-NEXT:    bltz a2, .LBB61_632
14223; CHECK-RV64-NEXT:    j .LBB61_110
14224; CHECK-RV64-NEXT:  .LBB61_632: # %cond.load425
14225; CHECK-RV64-NEXT:    lbu a2, 0(a0)
14226; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
14227; CHECK-RV64-NEXT:    vmv8r.v v16, v8
14228; CHECK-RV64-NEXT:    vmv.s.x v10, a2
14229; CHECK-RV64-NEXT:    li a2, 108
14230; CHECK-RV64-NEXT:    li a3, 107
14231; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
14232; CHECK-RV64-NEXT:    vslideup.vx v8, v10, a3
14233; CHECK-RV64-NEXT:    addi a0, a0, 1
14234; CHECK-RV64-NEXT:    vmv2r.v v16, v8
14235; CHECK-RV64-NEXT:    vmv8r.v v8, v16
14236; CHECK-RV64-NEXT:    slli a2, a1, 19
14237; CHECK-RV64-NEXT:    bltz a2, .LBB61_633
14238; CHECK-RV64-NEXT:    j .LBB61_111
14239; CHECK-RV64-NEXT:  .LBB61_633: # %cond.load429
14240; CHECK-RV64-NEXT:    lbu a2, 0(a0)
14241; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
14242; CHECK-RV64-NEXT:    vmv8r.v v16, v8
14243; CHECK-RV64-NEXT:    vmv.s.x v10, a2
14244; CHECK-RV64-NEXT:    li a2, 109
14245; CHECK-RV64-NEXT:    li a3, 108
14246; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
14247; CHECK-RV64-NEXT:    vslideup.vx v8, v10, a3
14248; CHECK-RV64-NEXT:    addi a0, a0, 1
14249; CHECK-RV64-NEXT:    vmv2r.v v16, v8
14250; CHECK-RV64-NEXT:    vmv8r.v v8, v16
14251; CHECK-RV64-NEXT:    slli a2, a1, 18
14252; CHECK-RV64-NEXT:    bltz a2, .LBB61_634
14253; CHECK-RV64-NEXT:    j .LBB61_112
14254; CHECK-RV64-NEXT:  .LBB61_634: # %cond.load433
14255; CHECK-RV64-NEXT:    lbu a2, 0(a0)
14256; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
14257; CHECK-RV64-NEXT:    vmv8r.v v16, v8
14258; CHECK-RV64-NEXT:    vmv.s.x v10, a2
14259; CHECK-RV64-NEXT:    li a2, 110
14260; CHECK-RV64-NEXT:    li a3, 109
14261; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
14262; CHECK-RV64-NEXT:    vslideup.vx v8, v10, a3
14263; CHECK-RV64-NEXT:    addi a0, a0, 1
14264; CHECK-RV64-NEXT:    vmv2r.v v16, v8
14265; CHECK-RV64-NEXT:    vmv8r.v v8, v16
14266; CHECK-RV64-NEXT:    slli a2, a1, 17
14267; CHECK-RV64-NEXT:    bltz a2, .LBB61_635
14268; CHECK-RV64-NEXT:    j .LBB61_113
14269; CHECK-RV64-NEXT:  .LBB61_635: # %cond.load437
14270; CHECK-RV64-NEXT:    lbu a2, 0(a0)
14271; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
14272; CHECK-RV64-NEXT:    vmv8r.v v16, v8
14273; CHECK-RV64-NEXT:    vmv.s.x v10, a2
14274; CHECK-RV64-NEXT:    li a2, 111
14275; CHECK-RV64-NEXT:    li a3, 110
14276; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
14277; CHECK-RV64-NEXT:    vslideup.vx v8, v10, a3
14278; CHECK-RV64-NEXT:    addi a0, a0, 1
14279; CHECK-RV64-NEXT:    vmv2r.v v16, v8
14280; CHECK-RV64-NEXT:    vmv8r.v v8, v16
14281; CHECK-RV64-NEXT:    slli a2, a1, 16
14282; CHECK-RV64-NEXT:    bltz a2, .LBB61_636
14283; CHECK-RV64-NEXT:    j .LBB61_114
14284; CHECK-RV64-NEXT:  .LBB61_636: # %cond.load441
14285; CHECK-RV64-NEXT:    lbu a2, 0(a0)
14286; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
14287; CHECK-RV64-NEXT:    vmv8r.v v16, v8
14288; CHECK-RV64-NEXT:    vmv.s.x v10, a2
14289; CHECK-RV64-NEXT:    li a2, 112
14290; CHECK-RV64-NEXT:    li a3, 111
14291; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
14292; CHECK-RV64-NEXT:    vslideup.vx v8, v10, a3
14293; CHECK-RV64-NEXT:    addi a0, a0, 1
14294; CHECK-RV64-NEXT:    vmv2r.v v16, v8
14295; CHECK-RV64-NEXT:    vmv8r.v v8, v16
14296; CHECK-RV64-NEXT:    slli a2, a1, 15
14297; CHECK-RV64-NEXT:    bltz a2, .LBB61_637
14298; CHECK-RV64-NEXT:    j .LBB61_115
14299; CHECK-RV64-NEXT:  .LBB61_637: # %cond.load445
14300; CHECK-RV64-NEXT:    lbu a2, 0(a0)
14301; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
14302; CHECK-RV64-NEXT:    vmv8r.v v16, v8
14303; CHECK-RV64-NEXT:    vmv.s.x v10, a2
14304; CHECK-RV64-NEXT:    li a2, 113
14305; CHECK-RV64-NEXT:    li a3, 112
14306; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
14307; CHECK-RV64-NEXT:    vslideup.vx v8, v10, a3
14308; CHECK-RV64-NEXT:    addi a0, a0, 1
14309; CHECK-RV64-NEXT:    vmv2r.v v16, v8
14310; CHECK-RV64-NEXT:    vmv8r.v v8, v16
14311; CHECK-RV64-NEXT:    slli a2, a1, 14
14312; CHECK-RV64-NEXT:    bltz a2, .LBB61_638
14313; CHECK-RV64-NEXT:    j .LBB61_116
14314; CHECK-RV64-NEXT:  .LBB61_638: # %cond.load449
14315; CHECK-RV64-NEXT:    lbu a2, 0(a0)
14316; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
14317; CHECK-RV64-NEXT:    vmv8r.v v16, v8
14318; CHECK-RV64-NEXT:    vmv.s.x v10, a2
14319; CHECK-RV64-NEXT:    li a2, 114
14320; CHECK-RV64-NEXT:    li a3, 113
14321; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
14322; CHECK-RV64-NEXT:    vslideup.vx v8, v10, a3
14323; CHECK-RV64-NEXT:    addi a0, a0, 1
14324; CHECK-RV64-NEXT:    vmv2r.v v16, v8
14325; CHECK-RV64-NEXT:    vmv8r.v v8, v16
14326; CHECK-RV64-NEXT:    slli a2, a1, 13
14327; CHECK-RV64-NEXT:    bltz a2, .LBB61_639
14328; CHECK-RV64-NEXT:    j .LBB61_117
14329; CHECK-RV64-NEXT:  .LBB61_639: # %cond.load453
14330; CHECK-RV64-NEXT:    lbu a2, 0(a0)
14331; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
14332; CHECK-RV64-NEXT:    vmv8r.v v16, v8
14333; CHECK-RV64-NEXT:    vmv.s.x v10, a2
14334; CHECK-RV64-NEXT:    li a2, 115
14335; CHECK-RV64-NEXT:    li a3, 114
14336; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
14337; CHECK-RV64-NEXT:    vslideup.vx v8, v10, a3
14338; CHECK-RV64-NEXT:    addi a0, a0, 1
14339; CHECK-RV64-NEXT:    vmv2r.v v16, v8
14340; CHECK-RV64-NEXT:    vmv8r.v v8, v16
14341; CHECK-RV64-NEXT:    slli a2, a1, 12
14342; CHECK-RV64-NEXT:    bltz a2, .LBB61_640
14343; CHECK-RV64-NEXT:    j .LBB61_118
14344; CHECK-RV64-NEXT:  .LBB61_640: # %cond.load457
14345; CHECK-RV64-NEXT:    lbu a2, 0(a0)
14346; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
14347; CHECK-RV64-NEXT:    vmv8r.v v16, v8
14348; CHECK-RV64-NEXT:    vmv.s.x v10, a2
14349; CHECK-RV64-NEXT:    li a2, 116
14350; CHECK-RV64-NEXT:    li a3, 115
14351; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
14352; CHECK-RV64-NEXT:    vslideup.vx v8, v10, a3
14353; CHECK-RV64-NEXT:    addi a0, a0, 1
14354; CHECK-RV64-NEXT:    vmv2r.v v16, v8
14355; CHECK-RV64-NEXT:    vmv8r.v v8, v16
14356; CHECK-RV64-NEXT:    slli a2, a1, 11
14357; CHECK-RV64-NEXT:    bltz a2, .LBB61_641
14358; CHECK-RV64-NEXT:    j .LBB61_119
14359; CHECK-RV64-NEXT:  .LBB61_641: # %cond.load461
14360; CHECK-RV64-NEXT:    lbu a2, 0(a0)
14361; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
14362; CHECK-RV64-NEXT:    vmv8r.v v16, v8
14363; CHECK-RV64-NEXT:    vmv.s.x v10, a2
14364; CHECK-RV64-NEXT:    li a2, 117
14365; CHECK-RV64-NEXT:    li a3, 116
14366; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
14367; CHECK-RV64-NEXT:    vslideup.vx v8, v10, a3
14368; CHECK-RV64-NEXT:    addi a0, a0, 1
14369; CHECK-RV64-NEXT:    vmv2r.v v16, v8
14370; CHECK-RV64-NEXT:    vmv8r.v v8, v16
14371; CHECK-RV64-NEXT:    slli a2, a1, 10
14372; CHECK-RV64-NEXT:    bltz a2, .LBB61_642
14373; CHECK-RV64-NEXT:    j .LBB61_120
14374; CHECK-RV64-NEXT:  .LBB61_642: # %cond.load465
14375; CHECK-RV64-NEXT:    lbu a2, 0(a0)
14376; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
14377; CHECK-RV64-NEXT:    vmv8r.v v16, v8
14378; CHECK-RV64-NEXT:    vmv.s.x v10, a2
14379; CHECK-RV64-NEXT:    li a2, 118
14380; CHECK-RV64-NEXT:    li a3, 117
14381; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
14382; CHECK-RV64-NEXT:    vslideup.vx v8, v10, a3
14383; CHECK-RV64-NEXT:    addi a0, a0, 1
14384; CHECK-RV64-NEXT:    vmv2r.v v16, v8
14385; CHECK-RV64-NEXT:    vmv8r.v v8, v16
14386; CHECK-RV64-NEXT:    slli a2, a1, 9
14387; CHECK-RV64-NEXT:    bltz a2, .LBB61_643
14388; CHECK-RV64-NEXT:    j .LBB61_121
14389; CHECK-RV64-NEXT:  .LBB61_643: # %cond.load469
14390; CHECK-RV64-NEXT:    lbu a2, 0(a0)
14391; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
14392; CHECK-RV64-NEXT:    vmv8r.v v16, v8
14393; CHECK-RV64-NEXT:    vmv.s.x v10, a2
14394; CHECK-RV64-NEXT:    li a2, 119
14395; CHECK-RV64-NEXT:    li a3, 118
14396; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
14397; CHECK-RV64-NEXT:    vslideup.vx v8, v10, a3
14398; CHECK-RV64-NEXT:    addi a0, a0, 1
14399; CHECK-RV64-NEXT:    vmv2r.v v16, v8
14400; CHECK-RV64-NEXT:    vmv8r.v v8, v16
14401; CHECK-RV64-NEXT:    slli a2, a1, 8
14402; CHECK-RV64-NEXT:    bltz a2, .LBB61_644
14403; CHECK-RV64-NEXT:    j .LBB61_122
14404; CHECK-RV64-NEXT:  .LBB61_644: # %cond.load473
14405; CHECK-RV64-NEXT:    lbu a2, 0(a0)
14406; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
14407; CHECK-RV64-NEXT:    vmv8r.v v16, v8
14408; CHECK-RV64-NEXT:    vmv.s.x v10, a2
14409; CHECK-RV64-NEXT:    li a2, 120
14410; CHECK-RV64-NEXT:    li a3, 119
14411; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
14412; CHECK-RV64-NEXT:    vslideup.vx v8, v10, a3
14413; CHECK-RV64-NEXT:    addi a0, a0, 1
14414; CHECK-RV64-NEXT:    vmv2r.v v16, v8
14415; CHECK-RV64-NEXT:    vmv8r.v v8, v16
14416; CHECK-RV64-NEXT:    slli a2, a1, 7
14417; CHECK-RV64-NEXT:    bltz a2, .LBB61_645
14418; CHECK-RV64-NEXT:    j .LBB61_123
14419; CHECK-RV64-NEXT:  .LBB61_645: # %cond.load477
14420; CHECK-RV64-NEXT:    lbu a2, 0(a0)
14421; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
14422; CHECK-RV64-NEXT:    vmv8r.v v16, v8
14423; CHECK-RV64-NEXT:    vmv.s.x v10, a2
14424; CHECK-RV64-NEXT:    li a2, 121
14425; CHECK-RV64-NEXT:    li a3, 120
14426; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
14427; CHECK-RV64-NEXT:    vslideup.vx v8, v10, a3
14428; CHECK-RV64-NEXT:    addi a0, a0, 1
14429; CHECK-RV64-NEXT:    vmv2r.v v16, v8
14430; CHECK-RV64-NEXT:    vmv8r.v v8, v16
14431; CHECK-RV64-NEXT:    slli a2, a1, 6
14432; CHECK-RV64-NEXT:    bltz a2, .LBB61_646
14433; CHECK-RV64-NEXT:    j .LBB61_124
14434; CHECK-RV64-NEXT:  .LBB61_646: # %cond.load481
14435; CHECK-RV64-NEXT:    lbu a2, 0(a0)
14436; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
14437; CHECK-RV64-NEXT:    vmv8r.v v16, v8
14438; CHECK-RV64-NEXT:    vmv.s.x v10, a2
14439; CHECK-RV64-NEXT:    li a2, 122
14440; CHECK-RV64-NEXT:    li a3, 121
14441; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
14442; CHECK-RV64-NEXT:    vslideup.vx v8, v10, a3
14443; CHECK-RV64-NEXT:    addi a0, a0, 1
14444; CHECK-RV64-NEXT:    vmv2r.v v16, v8
14445; CHECK-RV64-NEXT:    vmv8r.v v8, v16
14446; CHECK-RV64-NEXT:    slli a2, a1, 5
14447; CHECK-RV64-NEXT:    bltz a2, .LBB61_647
14448; CHECK-RV64-NEXT:    j .LBB61_125
14449; CHECK-RV64-NEXT:  .LBB61_647: # %cond.load485
14450; CHECK-RV64-NEXT:    lbu a2, 0(a0)
14451; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
14452; CHECK-RV64-NEXT:    vmv8r.v v16, v8
14453; CHECK-RV64-NEXT:    vmv.s.x v10, a2
14454; CHECK-RV64-NEXT:    li a2, 123
14455; CHECK-RV64-NEXT:    li a3, 122
14456; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
14457; CHECK-RV64-NEXT:    vslideup.vx v8, v10, a3
14458; CHECK-RV64-NEXT:    addi a0, a0, 1
14459; CHECK-RV64-NEXT:    vmv2r.v v16, v8
14460; CHECK-RV64-NEXT:    vmv8r.v v8, v16
14461; CHECK-RV64-NEXT:    slli a2, a1, 4
14462; CHECK-RV64-NEXT:    bltz a2, .LBB61_648
14463; CHECK-RV64-NEXT:    j .LBB61_126
14464; CHECK-RV64-NEXT:  .LBB61_648: # %cond.load489
14465; CHECK-RV64-NEXT:    lbu a2, 0(a0)
14466; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
14467; CHECK-RV64-NEXT:    vmv8r.v v16, v8
14468; CHECK-RV64-NEXT:    vmv.s.x v10, a2
14469; CHECK-RV64-NEXT:    li a2, 124
14470; CHECK-RV64-NEXT:    li a3, 123
14471; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
14472; CHECK-RV64-NEXT:    vslideup.vx v8, v10, a3
14473; CHECK-RV64-NEXT:    addi a0, a0, 1
14474; CHECK-RV64-NEXT:    vmv2r.v v16, v8
14475; CHECK-RV64-NEXT:    vmv8r.v v8, v16
14476; CHECK-RV64-NEXT:    slli a2, a1, 3
14477; CHECK-RV64-NEXT:    bltz a2, .LBB61_649
14478; CHECK-RV64-NEXT:    j .LBB61_127
14479; CHECK-RV64-NEXT:  .LBB61_649: # %cond.load493
14480; CHECK-RV64-NEXT:    lbu a2, 0(a0)
14481; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
14482; CHECK-RV64-NEXT:    vmv8r.v v16, v8
14483; CHECK-RV64-NEXT:    vmv.s.x v10, a2
14484; CHECK-RV64-NEXT:    li a2, 125
14485; CHECK-RV64-NEXT:    li a3, 124
14486; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m2, tu, ma
14487; CHECK-RV64-NEXT:    vslideup.vx v8, v10, a3
14488; CHECK-RV64-NEXT:    addi a0, a0, 1
14489; CHECK-RV64-NEXT:    vmv2r.v v16, v8
14490; CHECK-RV64-NEXT:    vmv8r.v v8, v16
14491; CHECK-RV64-NEXT:    slli a2, a1, 2
14492; CHECK-RV64-NEXT:    bgez a2, .LBB61_1026
14493; CHECK-RV64-NEXT:    j .LBB61_128
14494; CHECK-RV64-NEXT:  .LBB61_1026: # %cond.load493
14495; CHECK-RV64-NEXT:    j .LBB61_129
14496; CHECK-RV64-NEXT:  .LBB61_650: # %cond.load505
14497; CHECK-RV64-NEXT:    lbu a1, 0(a0)
14498; CHECK-RV64-NEXT:    vmv8r.v v16, v8
14499; CHECK-RV64-NEXT:    vmv.s.x v10, a1
14500; CHECK-RV64-NEXT:    li a1, 128
14501; CHECK-RV64-NEXT:    li a3, 127
14502; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m2, tu, ma
14503; CHECK-RV64-NEXT:    vslideup.vx v8, v10, a3
14504; CHECK-RV64-NEXT:    addi a0, a0, 1
14505; CHECK-RV64-NEXT:    vmv2r.v v16, v8
14506; CHECK-RV64-NEXT:    vmv8r.v v8, v16
14507; CHECK-RV64-NEXT:    andi a1, a2, 1
14508; CHECK-RV64-NEXT:    bnez a1, .LBB61_651
14509; CHECK-RV64-NEXT:    j .LBB61_133
14510; CHECK-RV64-NEXT:  .LBB61_651: # %cond.load509
14511; CHECK-RV64-NEXT:    lbu a1, 0(a0)
14512; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
14513; CHECK-RV64-NEXT:    vmv8r.v v16, v8
14514; CHECK-RV64-NEXT:    vmv.s.x v12, a1
14515; CHECK-RV64-NEXT:    li a1, 129
14516; CHECK-RV64-NEXT:    li a3, 128
14517; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m4, tu, ma
14518; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
14519; CHECK-RV64-NEXT:    addi a0, a0, 1
14520; CHECK-RV64-NEXT:    vmv4r.v v16, v8
14521; CHECK-RV64-NEXT:    vmv8r.v v8, v16
14522; CHECK-RV64-NEXT:    andi a1, a2, 2
14523; CHECK-RV64-NEXT:    bnez a1, .LBB61_652
14524; CHECK-RV64-NEXT:    j .LBB61_134
14525; CHECK-RV64-NEXT:  .LBB61_652: # %cond.load513
14526; CHECK-RV64-NEXT:    lbu a1, 0(a0)
14527; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
14528; CHECK-RV64-NEXT:    vmv8r.v v16, v8
14529; CHECK-RV64-NEXT:    vmv.s.x v12, a1
14530; CHECK-RV64-NEXT:    li a1, 130
14531; CHECK-RV64-NEXT:    li a3, 129
14532; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m4, tu, ma
14533; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
14534; CHECK-RV64-NEXT:    addi a0, a0, 1
14535; CHECK-RV64-NEXT:    vmv4r.v v16, v8
14536; CHECK-RV64-NEXT:    vmv8r.v v8, v16
14537; CHECK-RV64-NEXT:    andi a1, a2, 4
14538; CHECK-RV64-NEXT:    bnez a1, .LBB61_653
14539; CHECK-RV64-NEXT:    j .LBB61_135
14540; CHECK-RV64-NEXT:  .LBB61_653: # %cond.load517
14541; CHECK-RV64-NEXT:    lbu a1, 0(a0)
14542; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
14543; CHECK-RV64-NEXT:    vmv8r.v v16, v8
14544; CHECK-RV64-NEXT:    vmv.s.x v12, a1
14545; CHECK-RV64-NEXT:    li a1, 131
14546; CHECK-RV64-NEXT:    li a3, 130
14547; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m4, tu, ma
14548; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
14549; CHECK-RV64-NEXT:    addi a0, a0, 1
14550; CHECK-RV64-NEXT:    vmv4r.v v16, v8
14551; CHECK-RV64-NEXT:    vmv8r.v v8, v16
14552; CHECK-RV64-NEXT:    andi a1, a2, 8
14553; CHECK-RV64-NEXT:    bnez a1, .LBB61_654
14554; CHECK-RV64-NEXT:    j .LBB61_136
14555; CHECK-RV64-NEXT:  .LBB61_654: # %cond.load521
14556; CHECK-RV64-NEXT:    lbu a1, 0(a0)
14557; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
14558; CHECK-RV64-NEXT:    vmv8r.v v16, v8
14559; CHECK-RV64-NEXT:    vmv.s.x v12, a1
14560; CHECK-RV64-NEXT:    li a1, 132
14561; CHECK-RV64-NEXT:    li a3, 131
14562; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m4, tu, ma
14563; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
14564; CHECK-RV64-NEXT:    addi a0, a0, 1
14565; CHECK-RV64-NEXT:    vmv4r.v v16, v8
14566; CHECK-RV64-NEXT:    vmv8r.v v8, v16
14567; CHECK-RV64-NEXT:    andi a1, a2, 16
14568; CHECK-RV64-NEXT:    bnez a1, .LBB61_655
14569; CHECK-RV64-NEXT:    j .LBB61_137
14570; CHECK-RV64-NEXT:  .LBB61_655: # %cond.load525
14571; CHECK-RV64-NEXT:    lbu a1, 0(a0)
14572; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
14573; CHECK-RV64-NEXT:    vmv8r.v v16, v8
14574; CHECK-RV64-NEXT:    vmv.s.x v12, a1
14575; CHECK-RV64-NEXT:    li a1, 133
14576; CHECK-RV64-NEXT:    li a3, 132
14577; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m4, tu, ma
14578; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
14579; CHECK-RV64-NEXT:    addi a0, a0, 1
14580; CHECK-RV64-NEXT:    vmv4r.v v16, v8
14581; CHECK-RV64-NEXT:    vmv8r.v v8, v16
14582; CHECK-RV64-NEXT:    andi a1, a2, 32
14583; CHECK-RV64-NEXT:    bnez a1, .LBB61_656
14584; CHECK-RV64-NEXT:    j .LBB61_138
14585; CHECK-RV64-NEXT:  .LBB61_656: # %cond.load529
14586; CHECK-RV64-NEXT:    lbu a1, 0(a0)
14587; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
14588; CHECK-RV64-NEXT:    vmv8r.v v16, v8
14589; CHECK-RV64-NEXT:    vmv.s.x v12, a1
14590; CHECK-RV64-NEXT:    li a1, 134
14591; CHECK-RV64-NEXT:    li a3, 133
14592; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m4, tu, ma
14593; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
14594; CHECK-RV64-NEXT:    addi a0, a0, 1
14595; CHECK-RV64-NEXT:    vmv4r.v v16, v8
14596; CHECK-RV64-NEXT:    vmv8r.v v8, v16
14597; CHECK-RV64-NEXT:    andi a1, a2, 64
14598; CHECK-RV64-NEXT:    bnez a1, .LBB61_657
14599; CHECK-RV64-NEXT:    j .LBB61_139
14600; CHECK-RV64-NEXT:  .LBB61_657: # %cond.load533
14601; CHECK-RV64-NEXT:    lbu a1, 0(a0)
14602; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
14603; CHECK-RV64-NEXT:    vmv8r.v v16, v8
14604; CHECK-RV64-NEXT:    vmv.s.x v12, a1
14605; CHECK-RV64-NEXT:    li a1, 135
14606; CHECK-RV64-NEXT:    li a3, 134
14607; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m4, tu, ma
14608; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
14609; CHECK-RV64-NEXT:    addi a0, a0, 1
14610; CHECK-RV64-NEXT:    vmv4r.v v16, v8
14611; CHECK-RV64-NEXT:    vmv8r.v v8, v16
14612; CHECK-RV64-NEXT:    andi a1, a2, 128
14613; CHECK-RV64-NEXT:    bnez a1, .LBB61_658
14614; CHECK-RV64-NEXT:    j .LBB61_140
14615; CHECK-RV64-NEXT:  .LBB61_658: # %cond.load537
14616; CHECK-RV64-NEXT:    lbu a1, 0(a0)
14617; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
14618; CHECK-RV64-NEXT:    vmv8r.v v16, v8
14619; CHECK-RV64-NEXT:    vmv.s.x v12, a1
14620; CHECK-RV64-NEXT:    li a1, 136
14621; CHECK-RV64-NEXT:    li a3, 135
14622; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m4, tu, ma
14623; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
14624; CHECK-RV64-NEXT:    addi a0, a0, 1
14625; CHECK-RV64-NEXT:    vmv4r.v v16, v8
14626; CHECK-RV64-NEXT:    vmv8r.v v8, v16
14627; CHECK-RV64-NEXT:    andi a1, a2, 256
14628; CHECK-RV64-NEXT:    bnez a1, .LBB61_659
14629; CHECK-RV64-NEXT:    j .LBB61_141
14630; CHECK-RV64-NEXT:  .LBB61_659: # %cond.load541
14631; CHECK-RV64-NEXT:    lbu a1, 0(a0)
14632; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
14633; CHECK-RV64-NEXT:    vmv8r.v v16, v8
14634; CHECK-RV64-NEXT:    vmv.s.x v12, a1
14635; CHECK-RV64-NEXT:    li a1, 137
14636; CHECK-RV64-NEXT:    li a3, 136
14637; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m4, tu, ma
14638; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
14639; CHECK-RV64-NEXT:    addi a0, a0, 1
14640; CHECK-RV64-NEXT:    vmv4r.v v16, v8
14641; CHECK-RV64-NEXT:    vmv8r.v v8, v16
14642; CHECK-RV64-NEXT:    andi a1, a2, 512
14643; CHECK-RV64-NEXT:    bnez a1, .LBB61_660
14644; CHECK-RV64-NEXT:    j .LBB61_142
14645; CHECK-RV64-NEXT:  .LBB61_660: # %cond.load545
14646; CHECK-RV64-NEXT:    lbu a1, 0(a0)
14647; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
14648; CHECK-RV64-NEXT:    vmv8r.v v16, v8
14649; CHECK-RV64-NEXT:    vmv.s.x v12, a1
14650; CHECK-RV64-NEXT:    li a1, 138
14651; CHECK-RV64-NEXT:    li a3, 137
14652; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m4, tu, ma
14653; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
14654; CHECK-RV64-NEXT:    addi a0, a0, 1
14655; CHECK-RV64-NEXT:    vmv4r.v v16, v8
14656; CHECK-RV64-NEXT:    vmv8r.v v8, v16
14657; CHECK-RV64-NEXT:    andi a1, a2, 1024
14658; CHECK-RV64-NEXT:    bnez a1, .LBB61_661
14659; CHECK-RV64-NEXT:    j .LBB61_143
14660; CHECK-RV64-NEXT:  .LBB61_661: # %cond.load549
14661; CHECK-RV64-NEXT:    lbu a1, 0(a0)
14662; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
14663; CHECK-RV64-NEXT:    vmv8r.v v16, v8
14664; CHECK-RV64-NEXT:    vmv.s.x v12, a1
14665; CHECK-RV64-NEXT:    li a1, 139
14666; CHECK-RV64-NEXT:    li a3, 138
14667; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m4, tu, ma
14668; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
14669; CHECK-RV64-NEXT:    addi a0, a0, 1
14670; CHECK-RV64-NEXT:    vmv4r.v v16, v8
14671; CHECK-RV64-NEXT:    vmv8r.v v8, v16
14672; CHECK-RV64-NEXT:    slli a1, a2, 52
14673; CHECK-RV64-NEXT:    bltz a1, .LBB61_662
14674; CHECK-RV64-NEXT:    j .LBB61_144
14675; CHECK-RV64-NEXT:  .LBB61_662: # %cond.load553
14676; CHECK-RV64-NEXT:    lbu a1, 0(a0)
14677; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
14678; CHECK-RV64-NEXT:    vmv8r.v v16, v8
14679; CHECK-RV64-NEXT:    vmv.s.x v12, a1
14680; CHECK-RV64-NEXT:    li a1, 140
14681; CHECK-RV64-NEXT:    li a3, 139
14682; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m4, tu, ma
14683; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
14684; CHECK-RV64-NEXT:    addi a0, a0, 1
14685; CHECK-RV64-NEXT:    vmv4r.v v16, v8
14686; CHECK-RV64-NEXT:    vmv8r.v v8, v16
14687; CHECK-RV64-NEXT:    slli a1, a2, 51
14688; CHECK-RV64-NEXT:    bltz a1, .LBB61_663
14689; CHECK-RV64-NEXT:    j .LBB61_145
14690; CHECK-RV64-NEXT:  .LBB61_663: # %cond.load557
14691; CHECK-RV64-NEXT:    lbu a1, 0(a0)
14692; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
14693; CHECK-RV64-NEXT:    vmv8r.v v16, v8
14694; CHECK-RV64-NEXT:    vmv.s.x v12, a1
14695; CHECK-RV64-NEXT:    li a1, 141
14696; CHECK-RV64-NEXT:    li a3, 140
14697; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m4, tu, ma
14698; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
14699; CHECK-RV64-NEXT:    addi a0, a0, 1
14700; CHECK-RV64-NEXT:    vmv4r.v v16, v8
14701; CHECK-RV64-NEXT:    vmv8r.v v8, v16
14702; CHECK-RV64-NEXT:    slli a1, a2, 50
14703; CHECK-RV64-NEXT:    bltz a1, .LBB61_664
14704; CHECK-RV64-NEXT:    j .LBB61_146
14705; CHECK-RV64-NEXT:  .LBB61_664: # %cond.load561
14706; CHECK-RV64-NEXT:    lbu a1, 0(a0)
14707; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
14708; CHECK-RV64-NEXT:    vmv8r.v v16, v8
14709; CHECK-RV64-NEXT:    vmv.s.x v12, a1
14710; CHECK-RV64-NEXT:    li a1, 142
14711; CHECK-RV64-NEXT:    li a3, 141
14712; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m4, tu, ma
14713; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
14714; CHECK-RV64-NEXT:    addi a0, a0, 1
14715; CHECK-RV64-NEXT:    vmv4r.v v16, v8
14716; CHECK-RV64-NEXT:    vmv8r.v v8, v16
14717; CHECK-RV64-NEXT:    slli a1, a2, 49
14718; CHECK-RV64-NEXT:    bltz a1, .LBB61_665
14719; CHECK-RV64-NEXT:    j .LBB61_147
14720; CHECK-RV64-NEXT:  .LBB61_665: # %cond.load565
14721; CHECK-RV64-NEXT:    lbu a1, 0(a0)
14722; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
14723; CHECK-RV64-NEXT:    vmv8r.v v16, v8
14724; CHECK-RV64-NEXT:    vmv.s.x v12, a1
14725; CHECK-RV64-NEXT:    li a1, 143
14726; CHECK-RV64-NEXT:    li a3, 142
14727; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m4, tu, ma
14728; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
14729; CHECK-RV64-NEXT:    addi a0, a0, 1
14730; CHECK-RV64-NEXT:    vmv4r.v v16, v8
14731; CHECK-RV64-NEXT:    vmv8r.v v8, v16
14732; CHECK-RV64-NEXT:    slli a1, a2, 48
14733; CHECK-RV64-NEXT:    bltz a1, .LBB61_666
14734; CHECK-RV64-NEXT:    j .LBB61_148
14735; CHECK-RV64-NEXT:  .LBB61_666: # %cond.load569
14736; CHECK-RV64-NEXT:    lbu a1, 0(a0)
14737; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
14738; CHECK-RV64-NEXT:    vmv8r.v v16, v8
14739; CHECK-RV64-NEXT:    vmv.s.x v12, a1
14740; CHECK-RV64-NEXT:    li a1, 144
14741; CHECK-RV64-NEXT:    li a3, 143
14742; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m4, tu, ma
14743; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
14744; CHECK-RV64-NEXT:    addi a0, a0, 1
14745; CHECK-RV64-NEXT:    vmv4r.v v16, v8
14746; CHECK-RV64-NEXT:    vmv8r.v v8, v16
14747; CHECK-RV64-NEXT:    slli a1, a2, 47
14748; CHECK-RV64-NEXT:    bltz a1, .LBB61_667
14749; CHECK-RV64-NEXT:    j .LBB61_149
14750; CHECK-RV64-NEXT:  .LBB61_667: # %cond.load573
14751; CHECK-RV64-NEXT:    lbu a1, 0(a0)
14752; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
14753; CHECK-RV64-NEXT:    vmv8r.v v16, v8
14754; CHECK-RV64-NEXT:    vmv.s.x v12, a1
14755; CHECK-RV64-NEXT:    li a1, 145
14756; CHECK-RV64-NEXT:    li a3, 144
14757; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m4, tu, ma
14758; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
14759; CHECK-RV64-NEXT:    addi a0, a0, 1
14760; CHECK-RV64-NEXT:    vmv4r.v v16, v8
14761; CHECK-RV64-NEXT:    vmv8r.v v8, v16
14762; CHECK-RV64-NEXT:    slli a1, a2, 46
14763; CHECK-RV64-NEXT:    bltz a1, .LBB61_668
14764; CHECK-RV64-NEXT:    j .LBB61_150
14765; CHECK-RV64-NEXT:  .LBB61_668: # %cond.load577
14766; CHECK-RV64-NEXT:    lbu a1, 0(a0)
14767; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
14768; CHECK-RV64-NEXT:    vmv8r.v v16, v8
14769; CHECK-RV64-NEXT:    vmv.s.x v12, a1
14770; CHECK-RV64-NEXT:    li a1, 146
14771; CHECK-RV64-NEXT:    li a3, 145
14772; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m4, tu, ma
14773; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
14774; CHECK-RV64-NEXT:    addi a0, a0, 1
14775; CHECK-RV64-NEXT:    vmv4r.v v16, v8
14776; CHECK-RV64-NEXT:    vmv8r.v v8, v16
14777; CHECK-RV64-NEXT:    slli a1, a2, 45
14778; CHECK-RV64-NEXT:    bltz a1, .LBB61_669
14779; CHECK-RV64-NEXT:    j .LBB61_151
14780; CHECK-RV64-NEXT:  .LBB61_669: # %cond.load581
14781; CHECK-RV64-NEXT:    lbu a1, 0(a0)
14782; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
14783; CHECK-RV64-NEXT:    vmv8r.v v16, v8
14784; CHECK-RV64-NEXT:    vmv.s.x v12, a1
14785; CHECK-RV64-NEXT:    li a1, 147
14786; CHECK-RV64-NEXT:    li a3, 146
14787; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m4, tu, ma
14788; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
14789; CHECK-RV64-NEXT:    addi a0, a0, 1
14790; CHECK-RV64-NEXT:    vmv4r.v v16, v8
14791; CHECK-RV64-NEXT:    vmv8r.v v8, v16
14792; CHECK-RV64-NEXT:    slli a1, a2, 44
14793; CHECK-RV64-NEXT:    bltz a1, .LBB61_670
14794; CHECK-RV64-NEXT:    j .LBB61_152
14795; CHECK-RV64-NEXT:  .LBB61_670: # %cond.load585
14796; CHECK-RV64-NEXT:    lbu a1, 0(a0)
14797; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
14798; CHECK-RV64-NEXT:    vmv8r.v v16, v8
14799; CHECK-RV64-NEXT:    vmv.s.x v12, a1
14800; CHECK-RV64-NEXT:    li a1, 148
14801; CHECK-RV64-NEXT:    li a3, 147
14802; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m4, tu, ma
14803; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
14804; CHECK-RV64-NEXT:    addi a0, a0, 1
14805; CHECK-RV64-NEXT:    vmv4r.v v16, v8
14806; CHECK-RV64-NEXT:    vmv8r.v v8, v16
14807; CHECK-RV64-NEXT:    slli a1, a2, 43
14808; CHECK-RV64-NEXT:    bltz a1, .LBB61_671
14809; CHECK-RV64-NEXT:    j .LBB61_153
14810; CHECK-RV64-NEXT:  .LBB61_671: # %cond.load589
14811; CHECK-RV64-NEXT:    lbu a1, 0(a0)
14812; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
14813; CHECK-RV64-NEXT:    vmv8r.v v16, v8
14814; CHECK-RV64-NEXT:    vmv.s.x v12, a1
14815; CHECK-RV64-NEXT:    li a1, 149
14816; CHECK-RV64-NEXT:    li a3, 148
14817; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m4, tu, ma
14818; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
14819; CHECK-RV64-NEXT:    addi a0, a0, 1
14820; CHECK-RV64-NEXT:    vmv4r.v v16, v8
14821; CHECK-RV64-NEXT:    vmv8r.v v8, v16
14822; CHECK-RV64-NEXT:    slli a1, a2, 42
14823; CHECK-RV64-NEXT:    bltz a1, .LBB61_672
14824; CHECK-RV64-NEXT:    j .LBB61_154
14825; CHECK-RV64-NEXT:  .LBB61_672: # %cond.load593
14826; CHECK-RV64-NEXT:    lbu a1, 0(a0)
14827; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
14828; CHECK-RV64-NEXT:    vmv8r.v v16, v8
14829; CHECK-RV64-NEXT:    vmv.s.x v12, a1
14830; CHECK-RV64-NEXT:    li a1, 150
14831; CHECK-RV64-NEXT:    li a3, 149
14832; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m4, tu, ma
14833; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
14834; CHECK-RV64-NEXT:    addi a0, a0, 1
14835; CHECK-RV64-NEXT:    vmv4r.v v16, v8
14836; CHECK-RV64-NEXT:    vmv8r.v v8, v16
14837; CHECK-RV64-NEXT:    slli a1, a2, 41
14838; CHECK-RV64-NEXT:    bltz a1, .LBB61_673
14839; CHECK-RV64-NEXT:    j .LBB61_155
14840; CHECK-RV64-NEXT:  .LBB61_673: # %cond.load597
14841; CHECK-RV64-NEXT:    lbu a1, 0(a0)
14842; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
14843; CHECK-RV64-NEXT:    vmv8r.v v16, v8
14844; CHECK-RV64-NEXT:    vmv.s.x v12, a1
14845; CHECK-RV64-NEXT:    li a1, 151
14846; CHECK-RV64-NEXT:    li a3, 150
14847; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m4, tu, ma
14848; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
14849; CHECK-RV64-NEXT:    addi a0, a0, 1
14850; CHECK-RV64-NEXT:    vmv4r.v v16, v8
14851; CHECK-RV64-NEXT:    vmv8r.v v8, v16
14852; CHECK-RV64-NEXT:    slli a1, a2, 40
14853; CHECK-RV64-NEXT:    bltz a1, .LBB61_674
14854; CHECK-RV64-NEXT:    j .LBB61_156
14855; CHECK-RV64-NEXT:  .LBB61_674: # %cond.load601
14856; CHECK-RV64-NEXT:    lbu a1, 0(a0)
14857; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
14858; CHECK-RV64-NEXT:    vmv8r.v v16, v8
14859; CHECK-RV64-NEXT:    vmv.s.x v12, a1
14860; CHECK-RV64-NEXT:    li a1, 152
14861; CHECK-RV64-NEXT:    li a3, 151
14862; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m4, tu, ma
14863; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
14864; CHECK-RV64-NEXT:    addi a0, a0, 1
14865; CHECK-RV64-NEXT:    vmv4r.v v16, v8
14866; CHECK-RV64-NEXT:    vmv8r.v v8, v16
14867; CHECK-RV64-NEXT:    slli a1, a2, 39
14868; CHECK-RV64-NEXT:    bltz a1, .LBB61_675
14869; CHECK-RV64-NEXT:    j .LBB61_157
14870; CHECK-RV64-NEXT:  .LBB61_675: # %cond.load605
14871; CHECK-RV64-NEXT:    lbu a1, 0(a0)
14872; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
14873; CHECK-RV64-NEXT:    vmv8r.v v16, v8
14874; CHECK-RV64-NEXT:    vmv.s.x v12, a1
14875; CHECK-RV64-NEXT:    li a1, 153
14876; CHECK-RV64-NEXT:    li a3, 152
14877; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m4, tu, ma
14878; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
14879; CHECK-RV64-NEXT:    addi a0, a0, 1
14880; CHECK-RV64-NEXT:    vmv4r.v v16, v8
14881; CHECK-RV64-NEXT:    vmv8r.v v8, v16
14882; CHECK-RV64-NEXT:    slli a1, a2, 38
14883; CHECK-RV64-NEXT:    bltz a1, .LBB61_676
14884; CHECK-RV64-NEXT:    j .LBB61_158
14885; CHECK-RV64-NEXT:  .LBB61_676: # %cond.load609
14886; CHECK-RV64-NEXT:    lbu a1, 0(a0)
14887; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
14888; CHECK-RV64-NEXT:    vmv8r.v v16, v8
14889; CHECK-RV64-NEXT:    vmv.s.x v12, a1
14890; CHECK-RV64-NEXT:    li a1, 154
14891; CHECK-RV64-NEXT:    li a3, 153
14892; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m4, tu, ma
14893; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
14894; CHECK-RV64-NEXT:    addi a0, a0, 1
14895; CHECK-RV64-NEXT:    vmv4r.v v16, v8
14896; CHECK-RV64-NEXT:    vmv8r.v v8, v16
14897; CHECK-RV64-NEXT:    slli a1, a2, 37
14898; CHECK-RV64-NEXT:    bltz a1, .LBB61_677
14899; CHECK-RV64-NEXT:    j .LBB61_159
14900; CHECK-RV64-NEXT:  .LBB61_677: # %cond.load613
14901; CHECK-RV64-NEXT:    lbu a1, 0(a0)
14902; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
14903; CHECK-RV64-NEXT:    vmv8r.v v16, v8
14904; CHECK-RV64-NEXT:    vmv.s.x v12, a1
14905; CHECK-RV64-NEXT:    li a1, 155
14906; CHECK-RV64-NEXT:    li a3, 154
14907; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m4, tu, ma
14908; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
14909; CHECK-RV64-NEXT:    addi a0, a0, 1
14910; CHECK-RV64-NEXT:    vmv4r.v v16, v8
14911; CHECK-RV64-NEXT:    vmv8r.v v8, v16
14912; CHECK-RV64-NEXT:    slli a1, a2, 36
14913; CHECK-RV64-NEXT:    bltz a1, .LBB61_678
14914; CHECK-RV64-NEXT:    j .LBB61_160
14915; CHECK-RV64-NEXT:  .LBB61_678: # %cond.load617
14916; CHECK-RV64-NEXT:    lbu a1, 0(a0)
14917; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
14918; CHECK-RV64-NEXT:    vmv8r.v v16, v8
14919; CHECK-RV64-NEXT:    vmv.s.x v12, a1
14920; CHECK-RV64-NEXT:    li a1, 156
14921; CHECK-RV64-NEXT:    li a3, 155
14922; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m4, tu, ma
14923; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
14924; CHECK-RV64-NEXT:    addi a0, a0, 1
14925; CHECK-RV64-NEXT:    vmv4r.v v16, v8
14926; CHECK-RV64-NEXT:    vmv8r.v v8, v16
14927; CHECK-RV64-NEXT:    slli a1, a2, 35
14928; CHECK-RV64-NEXT:    bltz a1, .LBB61_679
14929; CHECK-RV64-NEXT:    j .LBB61_161
14930; CHECK-RV64-NEXT:  .LBB61_679: # %cond.load621
14931; CHECK-RV64-NEXT:    lbu a1, 0(a0)
14932; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
14933; CHECK-RV64-NEXT:    vmv8r.v v16, v8
14934; CHECK-RV64-NEXT:    vmv.s.x v12, a1
14935; CHECK-RV64-NEXT:    li a1, 157
14936; CHECK-RV64-NEXT:    li a3, 156
14937; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m4, tu, ma
14938; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
14939; CHECK-RV64-NEXT:    addi a0, a0, 1
14940; CHECK-RV64-NEXT:    vmv4r.v v16, v8
14941; CHECK-RV64-NEXT:    vmv8r.v v8, v16
14942; CHECK-RV64-NEXT:    slli a1, a2, 34
14943; CHECK-RV64-NEXT:    bltz a1, .LBB61_680
14944; CHECK-RV64-NEXT:    j .LBB61_162
14945; CHECK-RV64-NEXT:  .LBB61_680: # %cond.load625
14946; CHECK-RV64-NEXT:    lbu a1, 0(a0)
14947; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
14948; CHECK-RV64-NEXT:    vmv8r.v v16, v8
14949; CHECK-RV64-NEXT:    vmv.s.x v12, a1
14950; CHECK-RV64-NEXT:    li a1, 158
14951; CHECK-RV64-NEXT:    li a3, 157
14952; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m4, tu, ma
14953; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
14954; CHECK-RV64-NEXT:    addi a0, a0, 1
14955; CHECK-RV64-NEXT:    vmv4r.v v16, v8
14956; CHECK-RV64-NEXT:    vmv8r.v v8, v16
14957; CHECK-RV64-NEXT:    slli a1, a2, 33
14958; CHECK-RV64-NEXT:    bltz a1, .LBB61_681
14959; CHECK-RV64-NEXT:    j .LBB61_163
14960; CHECK-RV64-NEXT:  .LBB61_681: # %cond.load629
14961; CHECK-RV64-NEXT:    lbu a1, 0(a0)
14962; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
14963; CHECK-RV64-NEXT:    vmv8r.v v16, v8
14964; CHECK-RV64-NEXT:    vmv.s.x v12, a1
14965; CHECK-RV64-NEXT:    li a1, 159
14966; CHECK-RV64-NEXT:    li a3, 158
14967; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m4, tu, ma
14968; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
14969; CHECK-RV64-NEXT:    addi a0, a0, 1
14970; CHECK-RV64-NEXT:    vmv4r.v v16, v8
14971; CHECK-RV64-NEXT:    vmv8r.v v8, v16
14972; CHECK-RV64-NEXT:    slli a1, a2, 32
14973; CHECK-RV64-NEXT:    bltz a1, .LBB61_682
14974; CHECK-RV64-NEXT:    j .LBB61_164
14975; CHECK-RV64-NEXT:  .LBB61_682: # %cond.load633
14976; CHECK-RV64-NEXT:    lbu a1, 0(a0)
14977; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
14978; CHECK-RV64-NEXT:    vmv8r.v v16, v8
14979; CHECK-RV64-NEXT:    vmv.s.x v12, a1
14980; CHECK-RV64-NEXT:    li a1, 160
14981; CHECK-RV64-NEXT:    li a3, 159
14982; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m4, tu, ma
14983; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
14984; CHECK-RV64-NEXT:    addi a0, a0, 1
14985; CHECK-RV64-NEXT:    vmv4r.v v16, v8
14986; CHECK-RV64-NEXT:    vmv8r.v v8, v16
14987; CHECK-RV64-NEXT:    slli a1, a2, 31
14988; CHECK-RV64-NEXT:    bltz a1, .LBB61_683
14989; CHECK-RV64-NEXT:    j .LBB61_165
14990; CHECK-RV64-NEXT:  .LBB61_683: # %cond.load637
14991; CHECK-RV64-NEXT:    lbu a1, 0(a0)
14992; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
14993; CHECK-RV64-NEXT:    vmv8r.v v16, v8
14994; CHECK-RV64-NEXT:    vmv.s.x v12, a1
14995; CHECK-RV64-NEXT:    li a1, 161
14996; CHECK-RV64-NEXT:    li a3, 160
14997; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m4, tu, ma
14998; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
14999; CHECK-RV64-NEXT:    addi a0, a0, 1
15000; CHECK-RV64-NEXT:    vmv4r.v v16, v8
15001; CHECK-RV64-NEXT:    vmv8r.v v8, v16
15002; CHECK-RV64-NEXT:    slli a1, a2, 30
15003; CHECK-RV64-NEXT:    bltz a1, .LBB61_684
15004; CHECK-RV64-NEXT:    j .LBB61_166
15005; CHECK-RV64-NEXT:  .LBB61_684: # %cond.load641
15006; CHECK-RV64-NEXT:    lbu a1, 0(a0)
15007; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
15008; CHECK-RV64-NEXT:    vmv8r.v v16, v8
15009; CHECK-RV64-NEXT:    vmv.s.x v12, a1
15010; CHECK-RV64-NEXT:    li a1, 162
15011; CHECK-RV64-NEXT:    li a3, 161
15012; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m4, tu, ma
15013; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
15014; CHECK-RV64-NEXT:    addi a0, a0, 1
15015; CHECK-RV64-NEXT:    vmv4r.v v16, v8
15016; CHECK-RV64-NEXT:    vmv8r.v v8, v16
15017; CHECK-RV64-NEXT:    slli a1, a2, 29
15018; CHECK-RV64-NEXT:    bltz a1, .LBB61_685
15019; CHECK-RV64-NEXT:    j .LBB61_167
15020; CHECK-RV64-NEXT:  .LBB61_685: # %cond.load645
15021; CHECK-RV64-NEXT:    lbu a1, 0(a0)
15022; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
15023; CHECK-RV64-NEXT:    vmv8r.v v16, v8
15024; CHECK-RV64-NEXT:    vmv.s.x v12, a1
15025; CHECK-RV64-NEXT:    li a1, 163
15026; CHECK-RV64-NEXT:    li a3, 162
15027; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m4, tu, ma
15028; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
15029; CHECK-RV64-NEXT:    addi a0, a0, 1
15030; CHECK-RV64-NEXT:    vmv4r.v v16, v8
15031; CHECK-RV64-NEXT:    vmv8r.v v8, v16
15032; CHECK-RV64-NEXT:    slli a1, a2, 28
15033; CHECK-RV64-NEXT:    bltz a1, .LBB61_686
15034; CHECK-RV64-NEXT:    j .LBB61_168
15035; CHECK-RV64-NEXT:  .LBB61_686: # %cond.load649
15036; CHECK-RV64-NEXT:    lbu a1, 0(a0)
15037; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
15038; CHECK-RV64-NEXT:    vmv8r.v v16, v8
15039; CHECK-RV64-NEXT:    vmv.s.x v12, a1
15040; CHECK-RV64-NEXT:    li a1, 164
15041; CHECK-RV64-NEXT:    li a3, 163
15042; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m4, tu, ma
15043; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
15044; CHECK-RV64-NEXT:    addi a0, a0, 1
15045; CHECK-RV64-NEXT:    vmv4r.v v16, v8
15046; CHECK-RV64-NEXT:    vmv8r.v v8, v16
15047; CHECK-RV64-NEXT:    slli a1, a2, 27
15048; CHECK-RV64-NEXT:    bltz a1, .LBB61_687
15049; CHECK-RV64-NEXT:    j .LBB61_169
15050; CHECK-RV64-NEXT:  .LBB61_687: # %cond.load653
15051; CHECK-RV64-NEXT:    lbu a1, 0(a0)
15052; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
15053; CHECK-RV64-NEXT:    vmv8r.v v16, v8
15054; CHECK-RV64-NEXT:    vmv.s.x v12, a1
15055; CHECK-RV64-NEXT:    li a1, 165
15056; CHECK-RV64-NEXT:    li a3, 164
15057; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m4, tu, ma
15058; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
15059; CHECK-RV64-NEXT:    addi a0, a0, 1
15060; CHECK-RV64-NEXT:    vmv4r.v v16, v8
15061; CHECK-RV64-NEXT:    vmv8r.v v8, v16
15062; CHECK-RV64-NEXT:    slli a1, a2, 26
15063; CHECK-RV64-NEXT:    bltz a1, .LBB61_688
15064; CHECK-RV64-NEXT:    j .LBB61_170
15065; CHECK-RV64-NEXT:  .LBB61_688: # %cond.load657
15066; CHECK-RV64-NEXT:    lbu a1, 0(a0)
15067; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
15068; CHECK-RV64-NEXT:    vmv8r.v v16, v8
15069; CHECK-RV64-NEXT:    vmv.s.x v12, a1
15070; CHECK-RV64-NEXT:    li a1, 166
15071; CHECK-RV64-NEXT:    li a3, 165
15072; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m4, tu, ma
15073; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
15074; CHECK-RV64-NEXT:    addi a0, a0, 1
15075; CHECK-RV64-NEXT:    vmv4r.v v16, v8
15076; CHECK-RV64-NEXT:    vmv8r.v v8, v16
15077; CHECK-RV64-NEXT:    slli a1, a2, 25
15078; CHECK-RV64-NEXT:    bltz a1, .LBB61_689
15079; CHECK-RV64-NEXT:    j .LBB61_171
15080; CHECK-RV64-NEXT:  .LBB61_689: # %cond.load661
15081; CHECK-RV64-NEXT:    lbu a1, 0(a0)
15082; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
15083; CHECK-RV64-NEXT:    vmv8r.v v16, v8
15084; CHECK-RV64-NEXT:    vmv.s.x v12, a1
15085; CHECK-RV64-NEXT:    li a1, 167
15086; CHECK-RV64-NEXT:    li a3, 166
15087; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m4, tu, ma
15088; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
15089; CHECK-RV64-NEXT:    addi a0, a0, 1
15090; CHECK-RV64-NEXT:    vmv4r.v v16, v8
15091; CHECK-RV64-NEXT:    vmv8r.v v8, v16
15092; CHECK-RV64-NEXT:    slli a1, a2, 24
15093; CHECK-RV64-NEXT:    bltz a1, .LBB61_690
15094; CHECK-RV64-NEXT:    j .LBB61_172
15095; CHECK-RV64-NEXT:  .LBB61_690: # %cond.load665
15096; CHECK-RV64-NEXT:    lbu a1, 0(a0)
15097; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
15098; CHECK-RV64-NEXT:    vmv8r.v v16, v8
15099; CHECK-RV64-NEXT:    vmv.s.x v12, a1
15100; CHECK-RV64-NEXT:    li a1, 168
15101; CHECK-RV64-NEXT:    li a3, 167
15102; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m4, tu, ma
15103; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
15104; CHECK-RV64-NEXT:    addi a0, a0, 1
15105; CHECK-RV64-NEXT:    vmv4r.v v16, v8
15106; CHECK-RV64-NEXT:    vmv8r.v v8, v16
15107; CHECK-RV64-NEXT:    slli a1, a2, 23
15108; CHECK-RV64-NEXT:    bltz a1, .LBB61_691
15109; CHECK-RV64-NEXT:    j .LBB61_173
15110; CHECK-RV64-NEXT:  .LBB61_691: # %cond.load669
15111; CHECK-RV64-NEXT:    lbu a1, 0(a0)
15112; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
15113; CHECK-RV64-NEXT:    vmv8r.v v16, v8
15114; CHECK-RV64-NEXT:    vmv.s.x v12, a1
15115; CHECK-RV64-NEXT:    li a1, 169
15116; CHECK-RV64-NEXT:    li a3, 168
15117; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m4, tu, ma
15118; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
15119; CHECK-RV64-NEXT:    addi a0, a0, 1
15120; CHECK-RV64-NEXT:    vmv4r.v v16, v8
15121; CHECK-RV64-NEXT:    vmv8r.v v8, v16
15122; CHECK-RV64-NEXT:    slli a1, a2, 22
15123; CHECK-RV64-NEXT:    bltz a1, .LBB61_692
15124; CHECK-RV64-NEXT:    j .LBB61_174
15125; CHECK-RV64-NEXT:  .LBB61_692: # %cond.load673
15126; CHECK-RV64-NEXT:    lbu a1, 0(a0)
15127; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
15128; CHECK-RV64-NEXT:    vmv8r.v v16, v8
15129; CHECK-RV64-NEXT:    vmv.s.x v12, a1
15130; CHECK-RV64-NEXT:    li a1, 170
15131; CHECK-RV64-NEXT:    li a3, 169
15132; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m4, tu, ma
15133; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
15134; CHECK-RV64-NEXT:    addi a0, a0, 1
15135; CHECK-RV64-NEXT:    vmv4r.v v16, v8
15136; CHECK-RV64-NEXT:    vmv8r.v v8, v16
15137; CHECK-RV64-NEXT:    slli a1, a2, 21
15138; CHECK-RV64-NEXT:    bltz a1, .LBB61_693
15139; CHECK-RV64-NEXT:    j .LBB61_175
15140; CHECK-RV64-NEXT:  .LBB61_693: # %cond.load677
15141; CHECK-RV64-NEXT:    lbu a1, 0(a0)
15142; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
15143; CHECK-RV64-NEXT:    vmv8r.v v16, v8
15144; CHECK-RV64-NEXT:    vmv.s.x v12, a1
15145; CHECK-RV64-NEXT:    li a1, 171
15146; CHECK-RV64-NEXT:    li a3, 170
15147; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m4, tu, ma
15148; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
15149; CHECK-RV64-NEXT:    addi a0, a0, 1
15150; CHECK-RV64-NEXT:    vmv4r.v v16, v8
15151; CHECK-RV64-NEXT:    vmv8r.v v8, v16
15152; CHECK-RV64-NEXT:    slli a1, a2, 20
15153; CHECK-RV64-NEXT:    bltz a1, .LBB61_694
15154; CHECK-RV64-NEXT:    j .LBB61_176
15155; CHECK-RV64-NEXT:  .LBB61_694: # %cond.load681
15156; CHECK-RV64-NEXT:    lbu a1, 0(a0)
15157; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
15158; CHECK-RV64-NEXT:    vmv8r.v v16, v8
15159; CHECK-RV64-NEXT:    vmv.s.x v12, a1
15160; CHECK-RV64-NEXT:    li a1, 172
15161; CHECK-RV64-NEXT:    li a3, 171
15162; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m4, tu, ma
15163; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
15164; CHECK-RV64-NEXT:    addi a0, a0, 1
15165; CHECK-RV64-NEXT:    vmv4r.v v16, v8
15166; CHECK-RV64-NEXT:    vmv8r.v v8, v16
15167; CHECK-RV64-NEXT:    slli a1, a2, 19
15168; CHECK-RV64-NEXT:    bltz a1, .LBB61_695
15169; CHECK-RV64-NEXT:    j .LBB61_177
15170; CHECK-RV64-NEXT:  .LBB61_695: # %cond.load685
15171; CHECK-RV64-NEXT:    lbu a1, 0(a0)
15172; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
15173; CHECK-RV64-NEXT:    vmv8r.v v16, v8
15174; CHECK-RV64-NEXT:    vmv.s.x v12, a1
15175; CHECK-RV64-NEXT:    li a1, 173
15176; CHECK-RV64-NEXT:    li a3, 172
15177; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m4, tu, ma
15178; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
15179; CHECK-RV64-NEXT:    addi a0, a0, 1
15180; CHECK-RV64-NEXT:    vmv4r.v v16, v8
15181; CHECK-RV64-NEXT:    vmv8r.v v8, v16
15182; CHECK-RV64-NEXT:    slli a1, a2, 18
15183; CHECK-RV64-NEXT:    bltz a1, .LBB61_696
15184; CHECK-RV64-NEXT:    j .LBB61_178
15185; CHECK-RV64-NEXT:  .LBB61_696: # %cond.load689
15186; CHECK-RV64-NEXT:    lbu a1, 0(a0)
15187; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
15188; CHECK-RV64-NEXT:    vmv8r.v v16, v8
15189; CHECK-RV64-NEXT:    vmv.s.x v12, a1
15190; CHECK-RV64-NEXT:    li a1, 174
15191; CHECK-RV64-NEXT:    li a3, 173
15192; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m4, tu, ma
15193; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
15194; CHECK-RV64-NEXT:    addi a0, a0, 1
15195; CHECK-RV64-NEXT:    vmv4r.v v16, v8
15196; CHECK-RV64-NEXT:    vmv8r.v v8, v16
15197; CHECK-RV64-NEXT:    slli a1, a2, 17
15198; CHECK-RV64-NEXT:    bltz a1, .LBB61_697
15199; CHECK-RV64-NEXT:    j .LBB61_179
15200; CHECK-RV64-NEXT:  .LBB61_697: # %cond.load693
15201; CHECK-RV64-NEXT:    lbu a1, 0(a0)
15202; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
15203; CHECK-RV64-NEXT:    vmv8r.v v16, v8
15204; CHECK-RV64-NEXT:    vmv.s.x v12, a1
15205; CHECK-RV64-NEXT:    li a1, 175
15206; CHECK-RV64-NEXT:    li a3, 174
15207; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m4, tu, ma
15208; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
15209; CHECK-RV64-NEXT:    addi a0, a0, 1
15210; CHECK-RV64-NEXT:    vmv4r.v v16, v8
15211; CHECK-RV64-NEXT:    vmv8r.v v8, v16
15212; CHECK-RV64-NEXT:    slli a1, a2, 16
15213; CHECK-RV64-NEXT:    bltz a1, .LBB61_698
15214; CHECK-RV64-NEXT:    j .LBB61_180
15215; CHECK-RV64-NEXT:  .LBB61_698: # %cond.load697
15216; CHECK-RV64-NEXT:    lbu a1, 0(a0)
15217; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
15218; CHECK-RV64-NEXT:    vmv8r.v v16, v8
15219; CHECK-RV64-NEXT:    vmv.s.x v12, a1
15220; CHECK-RV64-NEXT:    li a1, 176
15221; CHECK-RV64-NEXT:    li a3, 175
15222; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m4, tu, ma
15223; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
15224; CHECK-RV64-NEXT:    addi a0, a0, 1
15225; CHECK-RV64-NEXT:    vmv4r.v v16, v8
15226; CHECK-RV64-NEXT:    vmv8r.v v8, v16
15227; CHECK-RV64-NEXT:    slli a1, a2, 15
15228; CHECK-RV64-NEXT:    bltz a1, .LBB61_699
15229; CHECK-RV64-NEXT:    j .LBB61_181
15230; CHECK-RV64-NEXT:  .LBB61_699: # %cond.load701
15231; CHECK-RV64-NEXT:    lbu a1, 0(a0)
15232; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
15233; CHECK-RV64-NEXT:    vmv8r.v v16, v8
15234; CHECK-RV64-NEXT:    vmv.s.x v12, a1
15235; CHECK-RV64-NEXT:    li a1, 177
15236; CHECK-RV64-NEXT:    li a3, 176
15237; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m4, tu, ma
15238; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
15239; CHECK-RV64-NEXT:    addi a0, a0, 1
15240; CHECK-RV64-NEXT:    vmv4r.v v16, v8
15241; CHECK-RV64-NEXT:    vmv8r.v v8, v16
15242; CHECK-RV64-NEXT:    slli a1, a2, 14
15243; CHECK-RV64-NEXT:    bltz a1, .LBB61_700
15244; CHECK-RV64-NEXT:    j .LBB61_182
15245; CHECK-RV64-NEXT:  .LBB61_700: # %cond.load705
15246; CHECK-RV64-NEXT:    lbu a1, 0(a0)
15247; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
15248; CHECK-RV64-NEXT:    vmv8r.v v16, v8
15249; CHECK-RV64-NEXT:    vmv.s.x v12, a1
15250; CHECK-RV64-NEXT:    li a1, 178
15251; CHECK-RV64-NEXT:    li a3, 177
15252; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m4, tu, ma
15253; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
15254; CHECK-RV64-NEXT:    addi a0, a0, 1
15255; CHECK-RV64-NEXT:    vmv4r.v v16, v8
15256; CHECK-RV64-NEXT:    vmv8r.v v8, v16
15257; CHECK-RV64-NEXT:    slli a1, a2, 13
15258; CHECK-RV64-NEXT:    bltz a1, .LBB61_701
15259; CHECK-RV64-NEXT:    j .LBB61_183
15260; CHECK-RV64-NEXT:  .LBB61_701: # %cond.load709
15261; CHECK-RV64-NEXT:    lbu a1, 0(a0)
15262; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
15263; CHECK-RV64-NEXT:    vmv8r.v v16, v8
15264; CHECK-RV64-NEXT:    vmv.s.x v12, a1
15265; CHECK-RV64-NEXT:    li a1, 179
15266; CHECK-RV64-NEXT:    li a3, 178
15267; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m4, tu, ma
15268; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
15269; CHECK-RV64-NEXT:    addi a0, a0, 1
15270; CHECK-RV64-NEXT:    vmv4r.v v16, v8
15271; CHECK-RV64-NEXT:    vmv8r.v v8, v16
15272; CHECK-RV64-NEXT:    slli a1, a2, 12
15273; CHECK-RV64-NEXT:    bltz a1, .LBB61_702
15274; CHECK-RV64-NEXT:    j .LBB61_184
15275; CHECK-RV64-NEXT:  .LBB61_702: # %cond.load713
15276; CHECK-RV64-NEXT:    lbu a1, 0(a0)
15277; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
15278; CHECK-RV64-NEXT:    vmv8r.v v16, v8
15279; CHECK-RV64-NEXT:    vmv.s.x v12, a1
15280; CHECK-RV64-NEXT:    li a1, 180
15281; CHECK-RV64-NEXT:    li a3, 179
15282; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m4, tu, ma
15283; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
15284; CHECK-RV64-NEXT:    addi a0, a0, 1
15285; CHECK-RV64-NEXT:    vmv4r.v v16, v8
15286; CHECK-RV64-NEXT:    vmv8r.v v8, v16
15287; CHECK-RV64-NEXT:    slli a1, a2, 11
15288; CHECK-RV64-NEXT:    bltz a1, .LBB61_703
15289; CHECK-RV64-NEXT:    j .LBB61_185
15290; CHECK-RV64-NEXT:  .LBB61_703: # %cond.load717
15291; CHECK-RV64-NEXT:    lbu a1, 0(a0)
15292; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
15293; CHECK-RV64-NEXT:    vmv8r.v v16, v8
15294; CHECK-RV64-NEXT:    vmv.s.x v12, a1
15295; CHECK-RV64-NEXT:    li a1, 181
15296; CHECK-RV64-NEXT:    li a3, 180
15297; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m4, tu, ma
15298; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
15299; CHECK-RV64-NEXT:    addi a0, a0, 1
15300; CHECK-RV64-NEXT:    vmv4r.v v16, v8
15301; CHECK-RV64-NEXT:    vmv8r.v v8, v16
15302; CHECK-RV64-NEXT:    slli a1, a2, 10
15303; CHECK-RV64-NEXT:    bltz a1, .LBB61_704
15304; CHECK-RV64-NEXT:    j .LBB61_186
15305; CHECK-RV64-NEXT:  .LBB61_704: # %cond.load721
15306; CHECK-RV64-NEXT:    lbu a1, 0(a0)
15307; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
15308; CHECK-RV64-NEXT:    vmv8r.v v16, v8
15309; CHECK-RV64-NEXT:    vmv.s.x v12, a1
15310; CHECK-RV64-NEXT:    li a1, 182
15311; CHECK-RV64-NEXT:    li a3, 181
15312; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m4, tu, ma
15313; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
15314; CHECK-RV64-NEXT:    addi a0, a0, 1
15315; CHECK-RV64-NEXT:    vmv4r.v v16, v8
15316; CHECK-RV64-NEXT:    vmv8r.v v8, v16
15317; CHECK-RV64-NEXT:    slli a1, a2, 9
15318; CHECK-RV64-NEXT:    bltz a1, .LBB61_705
15319; CHECK-RV64-NEXT:    j .LBB61_187
15320; CHECK-RV64-NEXT:  .LBB61_705: # %cond.load725
15321; CHECK-RV64-NEXT:    lbu a1, 0(a0)
15322; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
15323; CHECK-RV64-NEXT:    vmv8r.v v16, v8
15324; CHECK-RV64-NEXT:    vmv.s.x v12, a1
15325; CHECK-RV64-NEXT:    li a1, 183
15326; CHECK-RV64-NEXT:    li a3, 182
15327; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m4, tu, ma
15328; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
15329; CHECK-RV64-NEXT:    addi a0, a0, 1
15330; CHECK-RV64-NEXT:    vmv4r.v v16, v8
15331; CHECK-RV64-NEXT:    vmv8r.v v8, v16
15332; CHECK-RV64-NEXT:    slli a1, a2, 8
15333; CHECK-RV64-NEXT:    bltz a1, .LBB61_706
15334; CHECK-RV64-NEXT:    j .LBB61_188
15335; CHECK-RV64-NEXT:  .LBB61_706: # %cond.load729
15336; CHECK-RV64-NEXT:    lbu a1, 0(a0)
15337; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
15338; CHECK-RV64-NEXT:    vmv8r.v v16, v8
15339; CHECK-RV64-NEXT:    vmv.s.x v12, a1
15340; CHECK-RV64-NEXT:    li a1, 184
15341; CHECK-RV64-NEXT:    li a3, 183
15342; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m4, tu, ma
15343; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
15344; CHECK-RV64-NEXT:    addi a0, a0, 1
15345; CHECK-RV64-NEXT:    vmv4r.v v16, v8
15346; CHECK-RV64-NEXT:    vmv8r.v v8, v16
15347; CHECK-RV64-NEXT:    slli a1, a2, 7
15348; CHECK-RV64-NEXT:    bltz a1, .LBB61_707
15349; CHECK-RV64-NEXT:    j .LBB61_189
15350; CHECK-RV64-NEXT:  .LBB61_707: # %cond.load733
15351; CHECK-RV64-NEXT:    lbu a1, 0(a0)
15352; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
15353; CHECK-RV64-NEXT:    vmv8r.v v16, v8
15354; CHECK-RV64-NEXT:    vmv.s.x v12, a1
15355; CHECK-RV64-NEXT:    li a1, 185
15356; CHECK-RV64-NEXT:    li a3, 184
15357; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m4, tu, ma
15358; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
15359; CHECK-RV64-NEXT:    addi a0, a0, 1
15360; CHECK-RV64-NEXT:    vmv4r.v v16, v8
15361; CHECK-RV64-NEXT:    vmv8r.v v8, v16
15362; CHECK-RV64-NEXT:    slli a1, a2, 6
15363; CHECK-RV64-NEXT:    bltz a1, .LBB61_708
15364; CHECK-RV64-NEXT:    j .LBB61_190
15365; CHECK-RV64-NEXT:  .LBB61_708: # %cond.load737
15366; CHECK-RV64-NEXT:    lbu a1, 0(a0)
15367; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
15368; CHECK-RV64-NEXT:    vmv8r.v v16, v8
15369; CHECK-RV64-NEXT:    vmv.s.x v12, a1
15370; CHECK-RV64-NEXT:    li a1, 186
15371; CHECK-RV64-NEXT:    li a3, 185
15372; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m4, tu, ma
15373; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
15374; CHECK-RV64-NEXT:    addi a0, a0, 1
15375; CHECK-RV64-NEXT:    vmv4r.v v16, v8
15376; CHECK-RV64-NEXT:    vmv8r.v v8, v16
15377; CHECK-RV64-NEXT:    slli a1, a2, 5
15378; CHECK-RV64-NEXT:    bltz a1, .LBB61_709
15379; CHECK-RV64-NEXT:    j .LBB61_191
15380; CHECK-RV64-NEXT:  .LBB61_709: # %cond.load741
15381; CHECK-RV64-NEXT:    lbu a1, 0(a0)
15382; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
15383; CHECK-RV64-NEXT:    vmv8r.v v16, v8
15384; CHECK-RV64-NEXT:    vmv.s.x v12, a1
15385; CHECK-RV64-NEXT:    li a1, 187
15386; CHECK-RV64-NEXT:    li a3, 186
15387; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m4, tu, ma
15388; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
15389; CHECK-RV64-NEXT:    addi a0, a0, 1
15390; CHECK-RV64-NEXT:    vmv4r.v v16, v8
15391; CHECK-RV64-NEXT:    vmv8r.v v8, v16
15392; CHECK-RV64-NEXT:    slli a1, a2, 4
15393; CHECK-RV64-NEXT:    bltz a1, .LBB61_710
15394; CHECK-RV64-NEXT:    j .LBB61_192
15395; CHECK-RV64-NEXT:  .LBB61_710: # %cond.load745
15396; CHECK-RV64-NEXT:    lbu a1, 0(a0)
15397; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
15398; CHECK-RV64-NEXT:    vmv8r.v v16, v8
15399; CHECK-RV64-NEXT:    vmv.s.x v12, a1
15400; CHECK-RV64-NEXT:    li a1, 188
15401; CHECK-RV64-NEXT:    li a3, 187
15402; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m4, tu, ma
15403; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
15404; CHECK-RV64-NEXT:    addi a0, a0, 1
15405; CHECK-RV64-NEXT:    vmv4r.v v16, v8
15406; CHECK-RV64-NEXT:    vmv8r.v v8, v16
15407; CHECK-RV64-NEXT:    slli a1, a2, 3
15408; CHECK-RV64-NEXT:    bltz a1, .LBB61_711
15409; CHECK-RV64-NEXT:    j .LBB61_193
15410; CHECK-RV64-NEXT:  .LBB61_711: # %cond.load749
15411; CHECK-RV64-NEXT:    lbu a1, 0(a0)
15412; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
15413; CHECK-RV64-NEXT:    vmv8r.v v16, v8
15414; CHECK-RV64-NEXT:    vmv.s.x v12, a1
15415; CHECK-RV64-NEXT:    li a1, 189
15416; CHECK-RV64-NEXT:    li a3, 188
15417; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m4, tu, ma
15418; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
15419; CHECK-RV64-NEXT:    addi a0, a0, 1
15420; CHECK-RV64-NEXT:    vmv4r.v v16, v8
15421; CHECK-RV64-NEXT:    vmv8r.v v8, v16
15422; CHECK-RV64-NEXT:    slli a1, a2, 2
15423; CHECK-RV64-NEXT:    bgez a1, .LBB61_1027
15424; CHECK-RV64-NEXT:    j .LBB61_194
15425; CHECK-RV64-NEXT:  .LBB61_1027: # %cond.load749
15426; CHECK-RV64-NEXT:    j .LBB61_195
15427; CHECK-RV64-NEXT:  .LBB61_712: # %cond.load761
15428; CHECK-RV64-NEXT:    lbu a2, 0(a0)
15429; CHECK-RV64-NEXT:    vmv8r.v v16, v8
15430; CHECK-RV64-NEXT:    vmv.s.x v12, a2
15431; CHECK-RV64-NEXT:    li a2, 192
15432; CHECK-RV64-NEXT:    li a3, 191
15433; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
15434; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
15435; CHECK-RV64-NEXT:    addi a0, a0, 1
15436; CHECK-RV64-NEXT:    vmv4r.v v16, v8
15437; CHECK-RV64-NEXT:    vmv8r.v v8, v16
15438; CHECK-RV64-NEXT:    andi a2, a1, 1
15439; CHECK-RV64-NEXT:    bnez a2, .LBB61_713
15440; CHECK-RV64-NEXT:    j .LBB61_199
15441; CHECK-RV64-NEXT:  .LBB61_713: # %cond.load765
15442; CHECK-RV64-NEXT:    lbu a2, 0(a0)
15443; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
15444; CHECK-RV64-NEXT:    vmv8r.v v16, v8
15445; CHECK-RV64-NEXT:    vmv.s.x v12, a2
15446; CHECK-RV64-NEXT:    li a2, 193
15447; CHECK-RV64-NEXT:    li a3, 192
15448; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
15449; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
15450; CHECK-RV64-NEXT:    addi a0, a0, 1
15451; CHECK-RV64-NEXT:    vmv4r.v v16, v8
15452; CHECK-RV64-NEXT:    vmv8r.v v8, v16
15453; CHECK-RV64-NEXT:    andi a2, a1, 2
15454; CHECK-RV64-NEXT:    bnez a2, .LBB61_714
15455; CHECK-RV64-NEXT:    j .LBB61_200
15456; CHECK-RV64-NEXT:  .LBB61_714: # %cond.load769
15457; CHECK-RV64-NEXT:    lbu a2, 0(a0)
15458; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
15459; CHECK-RV64-NEXT:    vmv8r.v v16, v8
15460; CHECK-RV64-NEXT:    vmv.s.x v12, a2
15461; CHECK-RV64-NEXT:    li a2, 194
15462; CHECK-RV64-NEXT:    li a3, 193
15463; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
15464; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
15465; CHECK-RV64-NEXT:    addi a0, a0, 1
15466; CHECK-RV64-NEXT:    vmv4r.v v16, v8
15467; CHECK-RV64-NEXT:    vmv8r.v v8, v16
15468; CHECK-RV64-NEXT:    andi a2, a1, 4
15469; CHECK-RV64-NEXT:    bnez a2, .LBB61_715
15470; CHECK-RV64-NEXT:    j .LBB61_201
15471; CHECK-RV64-NEXT:  .LBB61_715: # %cond.load773
15472; CHECK-RV64-NEXT:    lbu a2, 0(a0)
15473; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
15474; CHECK-RV64-NEXT:    vmv8r.v v16, v8
15475; CHECK-RV64-NEXT:    vmv.s.x v12, a2
15476; CHECK-RV64-NEXT:    li a2, 195
15477; CHECK-RV64-NEXT:    li a3, 194
15478; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
15479; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
15480; CHECK-RV64-NEXT:    addi a0, a0, 1
15481; CHECK-RV64-NEXT:    vmv4r.v v16, v8
15482; CHECK-RV64-NEXT:    vmv8r.v v8, v16
15483; CHECK-RV64-NEXT:    andi a2, a1, 8
15484; CHECK-RV64-NEXT:    bnez a2, .LBB61_716
15485; CHECK-RV64-NEXT:    j .LBB61_202
15486; CHECK-RV64-NEXT:  .LBB61_716: # %cond.load777
15487; CHECK-RV64-NEXT:    lbu a2, 0(a0)
15488; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
15489; CHECK-RV64-NEXT:    vmv8r.v v16, v8
15490; CHECK-RV64-NEXT:    vmv.s.x v12, a2
15491; CHECK-RV64-NEXT:    li a2, 196
15492; CHECK-RV64-NEXT:    li a3, 195
15493; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
15494; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
15495; CHECK-RV64-NEXT:    addi a0, a0, 1
15496; CHECK-RV64-NEXT:    vmv4r.v v16, v8
15497; CHECK-RV64-NEXT:    vmv8r.v v8, v16
15498; CHECK-RV64-NEXT:    andi a2, a1, 16
15499; CHECK-RV64-NEXT:    bnez a2, .LBB61_717
15500; CHECK-RV64-NEXT:    j .LBB61_203
15501; CHECK-RV64-NEXT:  .LBB61_717: # %cond.load781
15502; CHECK-RV64-NEXT:    lbu a2, 0(a0)
15503; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
15504; CHECK-RV64-NEXT:    vmv8r.v v16, v8
15505; CHECK-RV64-NEXT:    vmv.s.x v12, a2
15506; CHECK-RV64-NEXT:    li a2, 197
15507; CHECK-RV64-NEXT:    li a3, 196
15508; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
15509; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
15510; CHECK-RV64-NEXT:    addi a0, a0, 1
15511; CHECK-RV64-NEXT:    vmv4r.v v16, v8
15512; CHECK-RV64-NEXT:    vmv8r.v v8, v16
15513; CHECK-RV64-NEXT:    andi a2, a1, 32
15514; CHECK-RV64-NEXT:    bnez a2, .LBB61_718
15515; CHECK-RV64-NEXT:    j .LBB61_204
15516; CHECK-RV64-NEXT:  .LBB61_718: # %cond.load785
15517; CHECK-RV64-NEXT:    lbu a2, 0(a0)
15518; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
15519; CHECK-RV64-NEXT:    vmv8r.v v16, v8
15520; CHECK-RV64-NEXT:    vmv.s.x v12, a2
15521; CHECK-RV64-NEXT:    li a2, 198
15522; CHECK-RV64-NEXT:    li a3, 197
15523; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
15524; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
15525; CHECK-RV64-NEXT:    addi a0, a0, 1
15526; CHECK-RV64-NEXT:    vmv4r.v v16, v8
15527; CHECK-RV64-NEXT:    vmv8r.v v8, v16
15528; CHECK-RV64-NEXT:    andi a2, a1, 64
15529; CHECK-RV64-NEXT:    bnez a2, .LBB61_719
15530; CHECK-RV64-NEXT:    j .LBB61_205
15531; CHECK-RV64-NEXT:  .LBB61_719: # %cond.load789
15532; CHECK-RV64-NEXT:    lbu a2, 0(a0)
15533; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
15534; CHECK-RV64-NEXT:    vmv8r.v v16, v8
15535; CHECK-RV64-NEXT:    vmv.s.x v12, a2
15536; CHECK-RV64-NEXT:    li a2, 199
15537; CHECK-RV64-NEXT:    li a3, 198
15538; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
15539; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
15540; CHECK-RV64-NEXT:    addi a0, a0, 1
15541; CHECK-RV64-NEXT:    vmv4r.v v16, v8
15542; CHECK-RV64-NEXT:    vmv8r.v v8, v16
15543; CHECK-RV64-NEXT:    andi a2, a1, 128
15544; CHECK-RV64-NEXT:    bnez a2, .LBB61_720
15545; CHECK-RV64-NEXT:    j .LBB61_206
15546; CHECK-RV64-NEXT:  .LBB61_720: # %cond.load793
15547; CHECK-RV64-NEXT:    lbu a2, 0(a0)
15548; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
15549; CHECK-RV64-NEXT:    vmv8r.v v16, v8
15550; CHECK-RV64-NEXT:    vmv.s.x v12, a2
15551; CHECK-RV64-NEXT:    li a2, 200
15552; CHECK-RV64-NEXT:    li a3, 199
15553; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
15554; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
15555; CHECK-RV64-NEXT:    addi a0, a0, 1
15556; CHECK-RV64-NEXT:    vmv4r.v v16, v8
15557; CHECK-RV64-NEXT:    vmv8r.v v8, v16
15558; CHECK-RV64-NEXT:    andi a2, a1, 256
15559; CHECK-RV64-NEXT:    bnez a2, .LBB61_721
15560; CHECK-RV64-NEXT:    j .LBB61_207
15561; CHECK-RV64-NEXT:  .LBB61_721: # %cond.load797
15562; CHECK-RV64-NEXT:    lbu a2, 0(a0)
15563; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
15564; CHECK-RV64-NEXT:    vmv8r.v v16, v8
15565; CHECK-RV64-NEXT:    vmv.s.x v12, a2
15566; CHECK-RV64-NEXT:    li a2, 201
15567; CHECK-RV64-NEXT:    li a3, 200
15568; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
15569; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
15570; CHECK-RV64-NEXT:    addi a0, a0, 1
15571; CHECK-RV64-NEXT:    vmv4r.v v16, v8
15572; CHECK-RV64-NEXT:    vmv8r.v v8, v16
15573; CHECK-RV64-NEXT:    andi a2, a1, 512
15574; CHECK-RV64-NEXT:    bnez a2, .LBB61_722
15575; CHECK-RV64-NEXT:    j .LBB61_208
15576; CHECK-RV64-NEXT:  .LBB61_722: # %cond.load801
15577; CHECK-RV64-NEXT:    lbu a2, 0(a0)
15578; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
15579; CHECK-RV64-NEXT:    vmv8r.v v16, v8
15580; CHECK-RV64-NEXT:    vmv.s.x v12, a2
15581; CHECK-RV64-NEXT:    li a2, 202
15582; CHECK-RV64-NEXT:    li a3, 201
15583; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
15584; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
15585; CHECK-RV64-NEXT:    addi a0, a0, 1
15586; CHECK-RV64-NEXT:    vmv4r.v v16, v8
15587; CHECK-RV64-NEXT:    vmv8r.v v8, v16
15588; CHECK-RV64-NEXT:    andi a2, a1, 1024
15589; CHECK-RV64-NEXT:    bnez a2, .LBB61_723
15590; CHECK-RV64-NEXT:    j .LBB61_209
15591; CHECK-RV64-NEXT:  .LBB61_723: # %cond.load805
15592; CHECK-RV64-NEXT:    lbu a2, 0(a0)
15593; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
15594; CHECK-RV64-NEXT:    vmv8r.v v16, v8
15595; CHECK-RV64-NEXT:    vmv.s.x v12, a2
15596; CHECK-RV64-NEXT:    li a2, 203
15597; CHECK-RV64-NEXT:    li a3, 202
15598; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
15599; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
15600; CHECK-RV64-NEXT:    addi a0, a0, 1
15601; CHECK-RV64-NEXT:    vmv4r.v v16, v8
15602; CHECK-RV64-NEXT:    vmv8r.v v8, v16
15603; CHECK-RV64-NEXT:    slli a2, a1, 52
15604; CHECK-RV64-NEXT:    bltz a2, .LBB61_724
15605; CHECK-RV64-NEXT:    j .LBB61_210
15606; CHECK-RV64-NEXT:  .LBB61_724: # %cond.load809
15607; CHECK-RV64-NEXT:    lbu a2, 0(a0)
15608; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
15609; CHECK-RV64-NEXT:    vmv8r.v v16, v8
15610; CHECK-RV64-NEXT:    vmv.s.x v12, a2
15611; CHECK-RV64-NEXT:    li a2, 204
15612; CHECK-RV64-NEXT:    li a3, 203
15613; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
15614; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
15615; CHECK-RV64-NEXT:    addi a0, a0, 1
15616; CHECK-RV64-NEXT:    vmv4r.v v16, v8
15617; CHECK-RV64-NEXT:    vmv8r.v v8, v16
15618; CHECK-RV64-NEXT:    slli a2, a1, 51
15619; CHECK-RV64-NEXT:    bltz a2, .LBB61_725
15620; CHECK-RV64-NEXT:    j .LBB61_211
15621; CHECK-RV64-NEXT:  .LBB61_725: # %cond.load813
15622; CHECK-RV64-NEXT:    lbu a2, 0(a0)
15623; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
15624; CHECK-RV64-NEXT:    vmv8r.v v16, v8
15625; CHECK-RV64-NEXT:    vmv.s.x v12, a2
15626; CHECK-RV64-NEXT:    li a2, 205
15627; CHECK-RV64-NEXT:    li a3, 204
15628; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
15629; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
15630; CHECK-RV64-NEXT:    addi a0, a0, 1
15631; CHECK-RV64-NEXT:    vmv4r.v v16, v8
15632; CHECK-RV64-NEXT:    vmv8r.v v8, v16
15633; CHECK-RV64-NEXT:    slli a2, a1, 50
15634; CHECK-RV64-NEXT:    bltz a2, .LBB61_726
15635; CHECK-RV64-NEXT:    j .LBB61_212
15636; CHECK-RV64-NEXT:  .LBB61_726: # %cond.load817
15637; CHECK-RV64-NEXT:    lbu a2, 0(a0)
15638; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
15639; CHECK-RV64-NEXT:    vmv8r.v v16, v8
15640; CHECK-RV64-NEXT:    vmv.s.x v12, a2
15641; CHECK-RV64-NEXT:    li a2, 206
15642; CHECK-RV64-NEXT:    li a3, 205
15643; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
15644; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
15645; CHECK-RV64-NEXT:    addi a0, a0, 1
15646; CHECK-RV64-NEXT:    vmv4r.v v16, v8
15647; CHECK-RV64-NEXT:    vmv8r.v v8, v16
15648; CHECK-RV64-NEXT:    slli a2, a1, 49
15649; CHECK-RV64-NEXT:    bltz a2, .LBB61_727
15650; CHECK-RV64-NEXT:    j .LBB61_213
15651; CHECK-RV64-NEXT:  .LBB61_727: # %cond.load821
15652; CHECK-RV64-NEXT:    lbu a2, 0(a0)
15653; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
15654; CHECK-RV64-NEXT:    vmv8r.v v16, v8
15655; CHECK-RV64-NEXT:    vmv.s.x v12, a2
15656; CHECK-RV64-NEXT:    li a2, 207
15657; CHECK-RV64-NEXT:    li a3, 206
15658; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
15659; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
15660; CHECK-RV64-NEXT:    addi a0, a0, 1
15661; CHECK-RV64-NEXT:    vmv4r.v v16, v8
15662; CHECK-RV64-NEXT:    vmv8r.v v8, v16
15663; CHECK-RV64-NEXT:    slli a2, a1, 48
15664; CHECK-RV64-NEXT:    bltz a2, .LBB61_728
15665; CHECK-RV64-NEXT:    j .LBB61_214
15666; CHECK-RV64-NEXT:  .LBB61_728: # %cond.load825
15667; CHECK-RV64-NEXT:    lbu a2, 0(a0)
15668; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
15669; CHECK-RV64-NEXT:    vmv8r.v v16, v8
15670; CHECK-RV64-NEXT:    vmv.s.x v12, a2
15671; CHECK-RV64-NEXT:    li a2, 208
15672; CHECK-RV64-NEXT:    li a3, 207
15673; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
15674; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
15675; CHECK-RV64-NEXT:    addi a0, a0, 1
15676; CHECK-RV64-NEXT:    vmv4r.v v16, v8
15677; CHECK-RV64-NEXT:    vmv8r.v v8, v16
15678; CHECK-RV64-NEXT:    slli a2, a1, 47
15679; CHECK-RV64-NEXT:    bltz a2, .LBB61_729
15680; CHECK-RV64-NEXT:    j .LBB61_215
15681; CHECK-RV64-NEXT:  .LBB61_729: # %cond.load829
15682; CHECK-RV64-NEXT:    lbu a2, 0(a0)
15683; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
15684; CHECK-RV64-NEXT:    vmv8r.v v16, v8
15685; CHECK-RV64-NEXT:    vmv.s.x v12, a2
15686; CHECK-RV64-NEXT:    li a2, 209
15687; CHECK-RV64-NEXT:    li a3, 208
15688; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
15689; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
15690; CHECK-RV64-NEXT:    addi a0, a0, 1
15691; CHECK-RV64-NEXT:    vmv4r.v v16, v8
15692; CHECK-RV64-NEXT:    vmv8r.v v8, v16
15693; CHECK-RV64-NEXT:    slli a2, a1, 46
15694; CHECK-RV64-NEXT:    bltz a2, .LBB61_730
15695; CHECK-RV64-NEXT:    j .LBB61_216
15696; CHECK-RV64-NEXT:  .LBB61_730: # %cond.load833
15697; CHECK-RV64-NEXT:    lbu a2, 0(a0)
15698; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
15699; CHECK-RV64-NEXT:    vmv8r.v v16, v8
15700; CHECK-RV64-NEXT:    vmv.s.x v12, a2
15701; CHECK-RV64-NEXT:    li a2, 210
15702; CHECK-RV64-NEXT:    li a3, 209
15703; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
15704; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
15705; CHECK-RV64-NEXT:    addi a0, a0, 1
15706; CHECK-RV64-NEXT:    vmv4r.v v16, v8
15707; CHECK-RV64-NEXT:    vmv8r.v v8, v16
15708; CHECK-RV64-NEXT:    slli a2, a1, 45
15709; CHECK-RV64-NEXT:    bltz a2, .LBB61_731
15710; CHECK-RV64-NEXT:    j .LBB61_217
15711; CHECK-RV64-NEXT:  .LBB61_731: # %cond.load837
15712; CHECK-RV64-NEXT:    lbu a2, 0(a0)
15713; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
15714; CHECK-RV64-NEXT:    vmv8r.v v16, v8
15715; CHECK-RV64-NEXT:    vmv.s.x v12, a2
15716; CHECK-RV64-NEXT:    li a2, 211
15717; CHECK-RV64-NEXT:    li a3, 210
15718; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
15719; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
15720; CHECK-RV64-NEXT:    addi a0, a0, 1
15721; CHECK-RV64-NEXT:    vmv4r.v v16, v8
15722; CHECK-RV64-NEXT:    vmv8r.v v8, v16
15723; CHECK-RV64-NEXT:    slli a2, a1, 44
15724; CHECK-RV64-NEXT:    bltz a2, .LBB61_732
15725; CHECK-RV64-NEXT:    j .LBB61_218
15726; CHECK-RV64-NEXT:  .LBB61_732: # %cond.load841
15727; CHECK-RV64-NEXT:    lbu a2, 0(a0)
15728; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
15729; CHECK-RV64-NEXT:    vmv8r.v v16, v8
15730; CHECK-RV64-NEXT:    vmv.s.x v12, a2
15731; CHECK-RV64-NEXT:    li a2, 212
15732; CHECK-RV64-NEXT:    li a3, 211
15733; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
15734; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
15735; CHECK-RV64-NEXT:    addi a0, a0, 1
15736; CHECK-RV64-NEXT:    vmv4r.v v16, v8
15737; CHECK-RV64-NEXT:    vmv8r.v v8, v16
15738; CHECK-RV64-NEXT:    slli a2, a1, 43
15739; CHECK-RV64-NEXT:    bltz a2, .LBB61_733
15740; CHECK-RV64-NEXT:    j .LBB61_219
15741; CHECK-RV64-NEXT:  .LBB61_733: # %cond.load845
15742; CHECK-RV64-NEXT:    lbu a2, 0(a0)
15743; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
15744; CHECK-RV64-NEXT:    vmv8r.v v16, v8
15745; CHECK-RV64-NEXT:    vmv.s.x v12, a2
15746; CHECK-RV64-NEXT:    li a2, 213
15747; CHECK-RV64-NEXT:    li a3, 212
15748; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
15749; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
15750; CHECK-RV64-NEXT:    addi a0, a0, 1
15751; CHECK-RV64-NEXT:    vmv4r.v v16, v8
15752; CHECK-RV64-NEXT:    vmv8r.v v8, v16
15753; CHECK-RV64-NEXT:    slli a2, a1, 42
15754; CHECK-RV64-NEXT:    bltz a2, .LBB61_734
15755; CHECK-RV64-NEXT:    j .LBB61_220
15756; CHECK-RV64-NEXT:  .LBB61_734: # %cond.load849
15757; CHECK-RV64-NEXT:    lbu a2, 0(a0)
15758; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
15759; CHECK-RV64-NEXT:    vmv8r.v v16, v8
15760; CHECK-RV64-NEXT:    vmv.s.x v12, a2
15761; CHECK-RV64-NEXT:    li a2, 214
15762; CHECK-RV64-NEXT:    li a3, 213
15763; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
15764; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
15765; CHECK-RV64-NEXT:    addi a0, a0, 1
15766; CHECK-RV64-NEXT:    vmv4r.v v16, v8
15767; CHECK-RV64-NEXT:    vmv8r.v v8, v16
15768; CHECK-RV64-NEXT:    slli a2, a1, 41
15769; CHECK-RV64-NEXT:    bltz a2, .LBB61_735
15770; CHECK-RV64-NEXT:    j .LBB61_221
15771; CHECK-RV64-NEXT:  .LBB61_735: # %cond.load853
15772; CHECK-RV64-NEXT:    lbu a2, 0(a0)
15773; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
15774; CHECK-RV64-NEXT:    vmv8r.v v16, v8
15775; CHECK-RV64-NEXT:    vmv.s.x v12, a2
15776; CHECK-RV64-NEXT:    li a2, 215
15777; CHECK-RV64-NEXT:    li a3, 214
15778; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
15779; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
15780; CHECK-RV64-NEXT:    addi a0, a0, 1
15781; CHECK-RV64-NEXT:    vmv4r.v v16, v8
15782; CHECK-RV64-NEXT:    vmv8r.v v8, v16
15783; CHECK-RV64-NEXT:    slli a2, a1, 40
15784; CHECK-RV64-NEXT:    bltz a2, .LBB61_736
15785; CHECK-RV64-NEXT:    j .LBB61_222
15786; CHECK-RV64-NEXT:  .LBB61_736: # %cond.load857
15787; CHECK-RV64-NEXT:    lbu a2, 0(a0)
15788; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
15789; CHECK-RV64-NEXT:    vmv8r.v v16, v8
15790; CHECK-RV64-NEXT:    vmv.s.x v12, a2
15791; CHECK-RV64-NEXT:    li a2, 216
15792; CHECK-RV64-NEXT:    li a3, 215
15793; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
15794; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
15795; CHECK-RV64-NEXT:    addi a0, a0, 1
15796; CHECK-RV64-NEXT:    vmv4r.v v16, v8
15797; CHECK-RV64-NEXT:    vmv8r.v v8, v16
15798; CHECK-RV64-NEXT:    slli a2, a1, 39
15799; CHECK-RV64-NEXT:    bltz a2, .LBB61_737
15800; CHECK-RV64-NEXT:    j .LBB61_223
15801; CHECK-RV64-NEXT:  .LBB61_737: # %cond.load861
15802; CHECK-RV64-NEXT:    lbu a2, 0(a0)
15803; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
15804; CHECK-RV64-NEXT:    vmv8r.v v16, v8
15805; CHECK-RV64-NEXT:    vmv.s.x v12, a2
15806; CHECK-RV64-NEXT:    li a2, 217
15807; CHECK-RV64-NEXT:    li a3, 216
15808; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
15809; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
15810; CHECK-RV64-NEXT:    addi a0, a0, 1
15811; CHECK-RV64-NEXT:    vmv4r.v v16, v8
15812; CHECK-RV64-NEXT:    vmv8r.v v8, v16
15813; CHECK-RV64-NEXT:    slli a2, a1, 38
15814; CHECK-RV64-NEXT:    bltz a2, .LBB61_738
15815; CHECK-RV64-NEXT:    j .LBB61_224
15816; CHECK-RV64-NEXT:  .LBB61_738: # %cond.load865
15817; CHECK-RV64-NEXT:    lbu a2, 0(a0)
15818; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
15819; CHECK-RV64-NEXT:    vmv8r.v v16, v8
15820; CHECK-RV64-NEXT:    vmv.s.x v12, a2
15821; CHECK-RV64-NEXT:    li a2, 218
15822; CHECK-RV64-NEXT:    li a3, 217
15823; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
15824; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
15825; CHECK-RV64-NEXT:    addi a0, a0, 1
15826; CHECK-RV64-NEXT:    vmv4r.v v16, v8
15827; CHECK-RV64-NEXT:    vmv8r.v v8, v16
15828; CHECK-RV64-NEXT:    slli a2, a1, 37
15829; CHECK-RV64-NEXT:    bltz a2, .LBB61_739
15830; CHECK-RV64-NEXT:    j .LBB61_225
15831; CHECK-RV64-NEXT:  .LBB61_739: # %cond.load869
15832; CHECK-RV64-NEXT:    lbu a2, 0(a0)
15833; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
15834; CHECK-RV64-NEXT:    vmv8r.v v16, v8
15835; CHECK-RV64-NEXT:    vmv.s.x v12, a2
15836; CHECK-RV64-NEXT:    li a2, 219
15837; CHECK-RV64-NEXT:    li a3, 218
15838; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
15839; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
15840; CHECK-RV64-NEXT:    addi a0, a0, 1
15841; CHECK-RV64-NEXT:    vmv4r.v v16, v8
15842; CHECK-RV64-NEXT:    vmv8r.v v8, v16
15843; CHECK-RV64-NEXT:    slli a2, a1, 36
15844; CHECK-RV64-NEXT:    bltz a2, .LBB61_740
15845; CHECK-RV64-NEXT:    j .LBB61_226
15846; CHECK-RV64-NEXT:  .LBB61_740: # %cond.load873
15847; CHECK-RV64-NEXT:    lbu a2, 0(a0)
15848; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
15849; CHECK-RV64-NEXT:    vmv8r.v v16, v8
15850; CHECK-RV64-NEXT:    vmv.s.x v12, a2
15851; CHECK-RV64-NEXT:    li a2, 220
15852; CHECK-RV64-NEXT:    li a3, 219
15853; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
15854; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
15855; CHECK-RV64-NEXT:    addi a0, a0, 1
15856; CHECK-RV64-NEXT:    vmv4r.v v16, v8
15857; CHECK-RV64-NEXT:    vmv8r.v v8, v16
15858; CHECK-RV64-NEXT:    slli a2, a1, 35
15859; CHECK-RV64-NEXT:    bltz a2, .LBB61_741
15860; CHECK-RV64-NEXT:    j .LBB61_227
15861; CHECK-RV64-NEXT:  .LBB61_741: # %cond.load877
15862; CHECK-RV64-NEXT:    lbu a2, 0(a0)
15863; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
15864; CHECK-RV64-NEXT:    vmv8r.v v16, v8
15865; CHECK-RV64-NEXT:    vmv.s.x v12, a2
15866; CHECK-RV64-NEXT:    li a2, 221
15867; CHECK-RV64-NEXT:    li a3, 220
15868; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
15869; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
15870; CHECK-RV64-NEXT:    addi a0, a0, 1
15871; CHECK-RV64-NEXT:    vmv4r.v v16, v8
15872; CHECK-RV64-NEXT:    vmv8r.v v8, v16
15873; CHECK-RV64-NEXT:    slli a2, a1, 34
15874; CHECK-RV64-NEXT:    bltz a2, .LBB61_742
15875; CHECK-RV64-NEXT:    j .LBB61_228
15876; CHECK-RV64-NEXT:  .LBB61_742: # %cond.load881
15877; CHECK-RV64-NEXT:    lbu a2, 0(a0)
15878; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
15879; CHECK-RV64-NEXT:    vmv8r.v v16, v8
15880; CHECK-RV64-NEXT:    vmv.s.x v12, a2
15881; CHECK-RV64-NEXT:    li a2, 222
15882; CHECK-RV64-NEXT:    li a3, 221
15883; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
15884; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
15885; CHECK-RV64-NEXT:    addi a0, a0, 1
15886; CHECK-RV64-NEXT:    vmv4r.v v16, v8
15887; CHECK-RV64-NEXT:    vmv8r.v v8, v16
15888; CHECK-RV64-NEXT:    slli a2, a1, 33
15889; CHECK-RV64-NEXT:    bltz a2, .LBB61_743
15890; CHECK-RV64-NEXT:    j .LBB61_229
15891; CHECK-RV64-NEXT:  .LBB61_743: # %cond.load885
15892; CHECK-RV64-NEXT:    lbu a2, 0(a0)
15893; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
15894; CHECK-RV64-NEXT:    vmv8r.v v16, v8
15895; CHECK-RV64-NEXT:    vmv.s.x v12, a2
15896; CHECK-RV64-NEXT:    li a2, 223
15897; CHECK-RV64-NEXT:    li a3, 222
15898; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
15899; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
15900; CHECK-RV64-NEXT:    addi a0, a0, 1
15901; CHECK-RV64-NEXT:    vmv4r.v v16, v8
15902; CHECK-RV64-NEXT:    vmv8r.v v8, v16
15903; CHECK-RV64-NEXT:    slli a2, a1, 32
15904; CHECK-RV64-NEXT:    bltz a2, .LBB61_744
15905; CHECK-RV64-NEXT:    j .LBB61_230
15906; CHECK-RV64-NEXT:  .LBB61_744: # %cond.load889
15907; CHECK-RV64-NEXT:    lbu a2, 0(a0)
15908; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
15909; CHECK-RV64-NEXT:    vmv8r.v v16, v8
15910; CHECK-RV64-NEXT:    vmv.s.x v12, a2
15911; CHECK-RV64-NEXT:    li a2, 224
15912; CHECK-RV64-NEXT:    li a3, 223
15913; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
15914; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
15915; CHECK-RV64-NEXT:    addi a0, a0, 1
15916; CHECK-RV64-NEXT:    vmv4r.v v16, v8
15917; CHECK-RV64-NEXT:    vmv8r.v v8, v16
15918; CHECK-RV64-NEXT:    slli a2, a1, 31
15919; CHECK-RV64-NEXT:    bltz a2, .LBB61_745
15920; CHECK-RV64-NEXT:    j .LBB61_231
15921; CHECK-RV64-NEXT:  .LBB61_745: # %cond.load893
15922; CHECK-RV64-NEXT:    lbu a2, 0(a0)
15923; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
15924; CHECK-RV64-NEXT:    vmv8r.v v16, v8
15925; CHECK-RV64-NEXT:    vmv.s.x v12, a2
15926; CHECK-RV64-NEXT:    li a2, 225
15927; CHECK-RV64-NEXT:    li a3, 224
15928; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
15929; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
15930; CHECK-RV64-NEXT:    addi a0, a0, 1
15931; CHECK-RV64-NEXT:    vmv4r.v v16, v8
15932; CHECK-RV64-NEXT:    vmv8r.v v8, v16
15933; CHECK-RV64-NEXT:    slli a2, a1, 30
15934; CHECK-RV64-NEXT:    bltz a2, .LBB61_746
15935; CHECK-RV64-NEXT:    j .LBB61_232
15936; CHECK-RV64-NEXT:  .LBB61_746: # %cond.load897
15937; CHECK-RV64-NEXT:    lbu a2, 0(a0)
15938; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
15939; CHECK-RV64-NEXT:    vmv8r.v v16, v8
15940; CHECK-RV64-NEXT:    vmv.s.x v12, a2
15941; CHECK-RV64-NEXT:    li a2, 226
15942; CHECK-RV64-NEXT:    li a3, 225
15943; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
15944; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
15945; CHECK-RV64-NEXT:    addi a0, a0, 1
15946; CHECK-RV64-NEXT:    vmv4r.v v16, v8
15947; CHECK-RV64-NEXT:    vmv8r.v v8, v16
15948; CHECK-RV64-NEXT:    slli a2, a1, 29
15949; CHECK-RV64-NEXT:    bltz a2, .LBB61_747
15950; CHECK-RV64-NEXT:    j .LBB61_233
15951; CHECK-RV64-NEXT:  .LBB61_747: # %cond.load901
15952; CHECK-RV64-NEXT:    lbu a2, 0(a0)
15953; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
15954; CHECK-RV64-NEXT:    vmv8r.v v16, v8
15955; CHECK-RV64-NEXT:    vmv.s.x v12, a2
15956; CHECK-RV64-NEXT:    li a2, 227
15957; CHECK-RV64-NEXT:    li a3, 226
15958; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
15959; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
15960; CHECK-RV64-NEXT:    addi a0, a0, 1
15961; CHECK-RV64-NEXT:    vmv4r.v v16, v8
15962; CHECK-RV64-NEXT:    vmv8r.v v8, v16
15963; CHECK-RV64-NEXT:    slli a2, a1, 28
15964; CHECK-RV64-NEXT:    bltz a2, .LBB61_748
15965; CHECK-RV64-NEXT:    j .LBB61_234
15966; CHECK-RV64-NEXT:  .LBB61_748: # %cond.load905
15967; CHECK-RV64-NEXT:    lbu a2, 0(a0)
15968; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
15969; CHECK-RV64-NEXT:    vmv8r.v v16, v8
15970; CHECK-RV64-NEXT:    vmv.s.x v12, a2
15971; CHECK-RV64-NEXT:    li a2, 228
15972; CHECK-RV64-NEXT:    li a3, 227
15973; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
15974; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
15975; CHECK-RV64-NEXT:    addi a0, a0, 1
15976; CHECK-RV64-NEXT:    vmv4r.v v16, v8
15977; CHECK-RV64-NEXT:    vmv8r.v v8, v16
15978; CHECK-RV64-NEXT:    slli a2, a1, 27
15979; CHECK-RV64-NEXT:    bltz a2, .LBB61_749
15980; CHECK-RV64-NEXT:    j .LBB61_235
15981; CHECK-RV64-NEXT:  .LBB61_749: # %cond.load909
15982; CHECK-RV64-NEXT:    lbu a2, 0(a0)
15983; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
15984; CHECK-RV64-NEXT:    vmv8r.v v16, v8
15985; CHECK-RV64-NEXT:    vmv.s.x v12, a2
15986; CHECK-RV64-NEXT:    li a2, 229
15987; CHECK-RV64-NEXT:    li a3, 228
15988; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
15989; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
15990; CHECK-RV64-NEXT:    addi a0, a0, 1
15991; CHECK-RV64-NEXT:    vmv4r.v v16, v8
15992; CHECK-RV64-NEXT:    vmv8r.v v8, v16
15993; CHECK-RV64-NEXT:    slli a2, a1, 26
15994; CHECK-RV64-NEXT:    bltz a2, .LBB61_750
15995; CHECK-RV64-NEXT:    j .LBB61_236
15996; CHECK-RV64-NEXT:  .LBB61_750: # %cond.load913
15997; CHECK-RV64-NEXT:    lbu a2, 0(a0)
15998; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
15999; CHECK-RV64-NEXT:    vmv8r.v v16, v8
16000; CHECK-RV64-NEXT:    vmv.s.x v12, a2
16001; CHECK-RV64-NEXT:    li a2, 230
16002; CHECK-RV64-NEXT:    li a3, 229
16003; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
16004; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
16005; CHECK-RV64-NEXT:    addi a0, a0, 1
16006; CHECK-RV64-NEXT:    vmv4r.v v16, v8
16007; CHECK-RV64-NEXT:    vmv8r.v v8, v16
16008; CHECK-RV64-NEXT:    slli a2, a1, 25
16009; CHECK-RV64-NEXT:    bltz a2, .LBB61_751
16010; CHECK-RV64-NEXT:    j .LBB61_237
16011; CHECK-RV64-NEXT:  .LBB61_751: # %cond.load917
16012; CHECK-RV64-NEXT:    lbu a2, 0(a0)
16013; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
16014; CHECK-RV64-NEXT:    vmv8r.v v16, v8
16015; CHECK-RV64-NEXT:    vmv.s.x v12, a2
16016; CHECK-RV64-NEXT:    li a2, 231
16017; CHECK-RV64-NEXT:    li a3, 230
16018; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
16019; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
16020; CHECK-RV64-NEXT:    addi a0, a0, 1
16021; CHECK-RV64-NEXT:    vmv4r.v v16, v8
16022; CHECK-RV64-NEXT:    vmv8r.v v8, v16
16023; CHECK-RV64-NEXT:    slli a2, a1, 24
16024; CHECK-RV64-NEXT:    bltz a2, .LBB61_752
16025; CHECK-RV64-NEXT:    j .LBB61_238
16026; CHECK-RV64-NEXT:  .LBB61_752: # %cond.load921
16027; CHECK-RV64-NEXT:    lbu a2, 0(a0)
16028; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
16029; CHECK-RV64-NEXT:    vmv8r.v v16, v8
16030; CHECK-RV64-NEXT:    vmv.s.x v12, a2
16031; CHECK-RV64-NEXT:    li a2, 232
16032; CHECK-RV64-NEXT:    li a3, 231
16033; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
16034; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
16035; CHECK-RV64-NEXT:    addi a0, a0, 1
16036; CHECK-RV64-NEXT:    vmv4r.v v16, v8
16037; CHECK-RV64-NEXT:    vmv8r.v v8, v16
16038; CHECK-RV64-NEXT:    slli a2, a1, 23
16039; CHECK-RV64-NEXT:    bltz a2, .LBB61_753
16040; CHECK-RV64-NEXT:    j .LBB61_239
16041; CHECK-RV64-NEXT:  .LBB61_753: # %cond.load925
16042; CHECK-RV64-NEXT:    lbu a2, 0(a0)
16043; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
16044; CHECK-RV64-NEXT:    vmv8r.v v16, v8
16045; CHECK-RV64-NEXT:    vmv.s.x v12, a2
16046; CHECK-RV64-NEXT:    li a2, 233
16047; CHECK-RV64-NEXT:    li a3, 232
16048; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
16049; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
16050; CHECK-RV64-NEXT:    addi a0, a0, 1
16051; CHECK-RV64-NEXT:    vmv4r.v v16, v8
16052; CHECK-RV64-NEXT:    vmv8r.v v8, v16
16053; CHECK-RV64-NEXT:    slli a2, a1, 22
16054; CHECK-RV64-NEXT:    bltz a2, .LBB61_754
16055; CHECK-RV64-NEXT:    j .LBB61_240
16056; CHECK-RV64-NEXT:  .LBB61_754: # %cond.load929
16057; CHECK-RV64-NEXT:    lbu a2, 0(a0)
16058; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
16059; CHECK-RV64-NEXT:    vmv8r.v v16, v8
16060; CHECK-RV64-NEXT:    vmv.s.x v12, a2
16061; CHECK-RV64-NEXT:    li a2, 234
16062; CHECK-RV64-NEXT:    li a3, 233
16063; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
16064; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
16065; CHECK-RV64-NEXT:    addi a0, a0, 1
16066; CHECK-RV64-NEXT:    vmv4r.v v16, v8
16067; CHECK-RV64-NEXT:    vmv8r.v v8, v16
16068; CHECK-RV64-NEXT:    slli a2, a1, 21
16069; CHECK-RV64-NEXT:    bltz a2, .LBB61_755
16070; CHECK-RV64-NEXT:    j .LBB61_241
16071; CHECK-RV64-NEXT:  .LBB61_755: # %cond.load933
16072; CHECK-RV64-NEXT:    lbu a2, 0(a0)
16073; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
16074; CHECK-RV64-NEXT:    vmv8r.v v16, v8
16075; CHECK-RV64-NEXT:    vmv.s.x v12, a2
16076; CHECK-RV64-NEXT:    li a2, 235
16077; CHECK-RV64-NEXT:    li a3, 234
16078; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
16079; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
16080; CHECK-RV64-NEXT:    addi a0, a0, 1
16081; CHECK-RV64-NEXT:    vmv4r.v v16, v8
16082; CHECK-RV64-NEXT:    vmv8r.v v8, v16
16083; CHECK-RV64-NEXT:    slli a2, a1, 20
16084; CHECK-RV64-NEXT:    bltz a2, .LBB61_756
16085; CHECK-RV64-NEXT:    j .LBB61_242
16086; CHECK-RV64-NEXT:  .LBB61_756: # %cond.load937
16087; CHECK-RV64-NEXT:    lbu a2, 0(a0)
16088; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
16089; CHECK-RV64-NEXT:    vmv8r.v v16, v8
16090; CHECK-RV64-NEXT:    vmv.s.x v12, a2
16091; CHECK-RV64-NEXT:    li a2, 236
16092; CHECK-RV64-NEXT:    li a3, 235
16093; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
16094; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
16095; CHECK-RV64-NEXT:    addi a0, a0, 1
16096; CHECK-RV64-NEXT:    vmv4r.v v16, v8
16097; CHECK-RV64-NEXT:    vmv8r.v v8, v16
16098; CHECK-RV64-NEXT:    slli a2, a1, 19
16099; CHECK-RV64-NEXT:    bltz a2, .LBB61_757
16100; CHECK-RV64-NEXT:    j .LBB61_243
16101; CHECK-RV64-NEXT:  .LBB61_757: # %cond.load941
16102; CHECK-RV64-NEXT:    lbu a2, 0(a0)
16103; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
16104; CHECK-RV64-NEXT:    vmv8r.v v16, v8
16105; CHECK-RV64-NEXT:    vmv.s.x v12, a2
16106; CHECK-RV64-NEXT:    li a2, 237
16107; CHECK-RV64-NEXT:    li a3, 236
16108; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
16109; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
16110; CHECK-RV64-NEXT:    addi a0, a0, 1
16111; CHECK-RV64-NEXT:    vmv4r.v v16, v8
16112; CHECK-RV64-NEXT:    vmv8r.v v8, v16
16113; CHECK-RV64-NEXT:    slli a2, a1, 18
16114; CHECK-RV64-NEXT:    bltz a2, .LBB61_758
16115; CHECK-RV64-NEXT:    j .LBB61_244
16116; CHECK-RV64-NEXT:  .LBB61_758: # %cond.load945
16117; CHECK-RV64-NEXT:    lbu a2, 0(a0)
16118; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
16119; CHECK-RV64-NEXT:    vmv8r.v v16, v8
16120; CHECK-RV64-NEXT:    vmv.s.x v12, a2
16121; CHECK-RV64-NEXT:    li a2, 238
16122; CHECK-RV64-NEXT:    li a3, 237
16123; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
16124; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
16125; CHECK-RV64-NEXT:    addi a0, a0, 1
16126; CHECK-RV64-NEXT:    vmv4r.v v16, v8
16127; CHECK-RV64-NEXT:    vmv8r.v v8, v16
16128; CHECK-RV64-NEXT:    slli a2, a1, 17
16129; CHECK-RV64-NEXT:    bltz a2, .LBB61_759
16130; CHECK-RV64-NEXT:    j .LBB61_245
16131; CHECK-RV64-NEXT:  .LBB61_759: # %cond.load949
16132; CHECK-RV64-NEXT:    lbu a2, 0(a0)
16133; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
16134; CHECK-RV64-NEXT:    vmv8r.v v16, v8
16135; CHECK-RV64-NEXT:    vmv.s.x v12, a2
16136; CHECK-RV64-NEXT:    li a2, 239
16137; CHECK-RV64-NEXT:    li a3, 238
16138; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
16139; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
16140; CHECK-RV64-NEXT:    addi a0, a0, 1
16141; CHECK-RV64-NEXT:    vmv4r.v v16, v8
16142; CHECK-RV64-NEXT:    vmv8r.v v8, v16
16143; CHECK-RV64-NEXT:    slli a2, a1, 16
16144; CHECK-RV64-NEXT:    bltz a2, .LBB61_760
16145; CHECK-RV64-NEXT:    j .LBB61_246
16146; CHECK-RV64-NEXT:  .LBB61_760: # %cond.load953
16147; CHECK-RV64-NEXT:    lbu a2, 0(a0)
16148; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
16149; CHECK-RV64-NEXT:    vmv8r.v v16, v8
16150; CHECK-RV64-NEXT:    vmv.s.x v12, a2
16151; CHECK-RV64-NEXT:    li a2, 240
16152; CHECK-RV64-NEXT:    li a3, 239
16153; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
16154; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
16155; CHECK-RV64-NEXT:    addi a0, a0, 1
16156; CHECK-RV64-NEXT:    vmv4r.v v16, v8
16157; CHECK-RV64-NEXT:    vmv8r.v v8, v16
16158; CHECK-RV64-NEXT:    slli a2, a1, 15
16159; CHECK-RV64-NEXT:    bltz a2, .LBB61_761
16160; CHECK-RV64-NEXT:    j .LBB61_247
16161; CHECK-RV64-NEXT:  .LBB61_761: # %cond.load957
16162; CHECK-RV64-NEXT:    lbu a2, 0(a0)
16163; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
16164; CHECK-RV64-NEXT:    vmv8r.v v16, v8
16165; CHECK-RV64-NEXT:    vmv.s.x v12, a2
16166; CHECK-RV64-NEXT:    li a2, 241
16167; CHECK-RV64-NEXT:    li a3, 240
16168; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
16169; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
16170; CHECK-RV64-NEXT:    addi a0, a0, 1
16171; CHECK-RV64-NEXT:    vmv4r.v v16, v8
16172; CHECK-RV64-NEXT:    vmv8r.v v8, v16
16173; CHECK-RV64-NEXT:    slli a2, a1, 14
16174; CHECK-RV64-NEXT:    bltz a2, .LBB61_762
16175; CHECK-RV64-NEXT:    j .LBB61_248
16176; CHECK-RV64-NEXT:  .LBB61_762: # %cond.load961
16177; CHECK-RV64-NEXT:    lbu a2, 0(a0)
16178; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
16179; CHECK-RV64-NEXT:    vmv8r.v v16, v8
16180; CHECK-RV64-NEXT:    vmv.s.x v12, a2
16181; CHECK-RV64-NEXT:    li a2, 242
16182; CHECK-RV64-NEXT:    li a3, 241
16183; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
16184; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
16185; CHECK-RV64-NEXT:    addi a0, a0, 1
16186; CHECK-RV64-NEXT:    vmv4r.v v16, v8
16187; CHECK-RV64-NEXT:    vmv8r.v v8, v16
16188; CHECK-RV64-NEXT:    slli a2, a1, 13
16189; CHECK-RV64-NEXT:    bltz a2, .LBB61_763
16190; CHECK-RV64-NEXT:    j .LBB61_249
16191; CHECK-RV64-NEXT:  .LBB61_763: # %cond.load965
16192; CHECK-RV64-NEXT:    lbu a2, 0(a0)
16193; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
16194; CHECK-RV64-NEXT:    vmv8r.v v16, v8
16195; CHECK-RV64-NEXT:    vmv.s.x v12, a2
16196; CHECK-RV64-NEXT:    li a2, 243
16197; CHECK-RV64-NEXT:    li a3, 242
16198; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
16199; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
16200; CHECK-RV64-NEXT:    addi a0, a0, 1
16201; CHECK-RV64-NEXT:    vmv4r.v v16, v8
16202; CHECK-RV64-NEXT:    vmv8r.v v8, v16
16203; CHECK-RV64-NEXT:    slli a2, a1, 12
16204; CHECK-RV64-NEXT:    bltz a2, .LBB61_764
16205; CHECK-RV64-NEXT:    j .LBB61_250
16206; CHECK-RV64-NEXT:  .LBB61_764: # %cond.load969
16207; CHECK-RV64-NEXT:    lbu a2, 0(a0)
16208; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
16209; CHECK-RV64-NEXT:    vmv8r.v v16, v8
16210; CHECK-RV64-NEXT:    vmv.s.x v12, a2
16211; CHECK-RV64-NEXT:    li a2, 244
16212; CHECK-RV64-NEXT:    li a3, 243
16213; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
16214; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
16215; CHECK-RV64-NEXT:    addi a0, a0, 1
16216; CHECK-RV64-NEXT:    vmv4r.v v16, v8
16217; CHECK-RV64-NEXT:    vmv8r.v v8, v16
16218; CHECK-RV64-NEXT:    slli a2, a1, 11
16219; CHECK-RV64-NEXT:    bltz a2, .LBB61_765
16220; CHECK-RV64-NEXT:    j .LBB61_251
16221; CHECK-RV64-NEXT:  .LBB61_765: # %cond.load973
16222; CHECK-RV64-NEXT:    lbu a2, 0(a0)
16223; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
16224; CHECK-RV64-NEXT:    vmv8r.v v16, v8
16225; CHECK-RV64-NEXT:    vmv.s.x v12, a2
16226; CHECK-RV64-NEXT:    li a2, 245
16227; CHECK-RV64-NEXT:    li a3, 244
16228; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
16229; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
16230; CHECK-RV64-NEXT:    addi a0, a0, 1
16231; CHECK-RV64-NEXT:    vmv4r.v v16, v8
16232; CHECK-RV64-NEXT:    vmv8r.v v8, v16
16233; CHECK-RV64-NEXT:    slli a2, a1, 10
16234; CHECK-RV64-NEXT:    bltz a2, .LBB61_766
16235; CHECK-RV64-NEXT:    j .LBB61_252
16236; CHECK-RV64-NEXT:  .LBB61_766: # %cond.load977
16237; CHECK-RV64-NEXT:    lbu a2, 0(a0)
16238; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
16239; CHECK-RV64-NEXT:    vmv8r.v v16, v8
16240; CHECK-RV64-NEXT:    vmv.s.x v12, a2
16241; CHECK-RV64-NEXT:    li a2, 246
16242; CHECK-RV64-NEXT:    li a3, 245
16243; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
16244; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
16245; CHECK-RV64-NEXT:    addi a0, a0, 1
16246; CHECK-RV64-NEXT:    vmv4r.v v16, v8
16247; CHECK-RV64-NEXT:    vmv8r.v v8, v16
16248; CHECK-RV64-NEXT:    slli a2, a1, 9
16249; CHECK-RV64-NEXT:    bltz a2, .LBB61_767
16250; CHECK-RV64-NEXT:    j .LBB61_253
16251; CHECK-RV64-NEXT:  .LBB61_767: # %cond.load981
16252; CHECK-RV64-NEXT:    lbu a2, 0(a0)
16253; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
16254; CHECK-RV64-NEXT:    vmv8r.v v16, v8
16255; CHECK-RV64-NEXT:    vmv.s.x v12, a2
16256; CHECK-RV64-NEXT:    li a2, 247
16257; CHECK-RV64-NEXT:    li a3, 246
16258; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
16259; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
16260; CHECK-RV64-NEXT:    addi a0, a0, 1
16261; CHECK-RV64-NEXT:    vmv4r.v v16, v8
16262; CHECK-RV64-NEXT:    vmv8r.v v8, v16
16263; CHECK-RV64-NEXT:    slli a2, a1, 8
16264; CHECK-RV64-NEXT:    bltz a2, .LBB61_768
16265; CHECK-RV64-NEXT:    j .LBB61_254
16266; CHECK-RV64-NEXT:  .LBB61_768: # %cond.load985
16267; CHECK-RV64-NEXT:    lbu a2, 0(a0)
16268; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
16269; CHECK-RV64-NEXT:    vmv8r.v v16, v8
16270; CHECK-RV64-NEXT:    vmv.s.x v12, a2
16271; CHECK-RV64-NEXT:    li a2, 248
16272; CHECK-RV64-NEXT:    li a3, 247
16273; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
16274; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
16275; CHECK-RV64-NEXT:    addi a0, a0, 1
16276; CHECK-RV64-NEXT:    vmv4r.v v16, v8
16277; CHECK-RV64-NEXT:    vmv8r.v v8, v16
16278; CHECK-RV64-NEXT:    slli a2, a1, 7
16279; CHECK-RV64-NEXT:    bltz a2, .LBB61_769
16280; CHECK-RV64-NEXT:    j .LBB61_255
16281; CHECK-RV64-NEXT:  .LBB61_769: # %cond.load989
16282; CHECK-RV64-NEXT:    lbu a2, 0(a0)
16283; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
16284; CHECK-RV64-NEXT:    vmv8r.v v16, v8
16285; CHECK-RV64-NEXT:    vmv.s.x v12, a2
16286; CHECK-RV64-NEXT:    li a2, 249
16287; CHECK-RV64-NEXT:    li a3, 248
16288; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
16289; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
16290; CHECK-RV64-NEXT:    addi a0, a0, 1
16291; CHECK-RV64-NEXT:    vmv4r.v v16, v8
16292; CHECK-RV64-NEXT:    vmv8r.v v8, v16
16293; CHECK-RV64-NEXT:    slli a2, a1, 6
16294; CHECK-RV64-NEXT:    bltz a2, .LBB61_770
16295; CHECK-RV64-NEXT:    j .LBB61_256
16296; CHECK-RV64-NEXT:  .LBB61_770: # %cond.load993
16297; CHECK-RV64-NEXT:    lbu a2, 0(a0)
16298; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
16299; CHECK-RV64-NEXT:    vmv8r.v v16, v8
16300; CHECK-RV64-NEXT:    vmv.s.x v12, a2
16301; CHECK-RV64-NEXT:    li a2, 250
16302; CHECK-RV64-NEXT:    li a3, 249
16303; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
16304; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
16305; CHECK-RV64-NEXT:    addi a0, a0, 1
16306; CHECK-RV64-NEXT:    vmv4r.v v16, v8
16307; CHECK-RV64-NEXT:    vmv8r.v v8, v16
16308; CHECK-RV64-NEXT:    slli a2, a1, 5
16309; CHECK-RV64-NEXT:    bltz a2, .LBB61_771
16310; CHECK-RV64-NEXT:    j .LBB61_257
16311; CHECK-RV64-NEXT:  .LBB61_771: # %cond.load997
16312; CHECK-RV64-NEXT:    lbu a2, 0(a0)
16313; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
16314; CHECK-RV64-NEXT:    vmv8r.v v16, v8
16315; CHECK-RV64-NEXT:    vmv.s.x v12, a2
16316; CHECK-RV64-NEXT:    li a2, 251
16317; CHECK-RV64-NEXT:    li a3, 250
16318; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
16319; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
16320; CHECK-RV64-NEXT:    addi a0, a0, 1
16321; CHECK-RV64-NEXT:    vmv4r.v v16, v8
16322; CHECK-RV64-NEXT:    vmv8r.v v8, v16
16323; CHECK-RV64-NEXT:    slli a2, a1, 4
16324; CHECK-RV64-NEXT:    bltz a2, .LBB61_772
16325; CHECK-RV64-NEXT:    j .LBB61_258
16326; CHECK-RV64-NEXT:  .LBB61_772: # %cond.load1001
16327; CHECK-RV64-NEXT:    lbu a2, 0(a0)
16328; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
16329; CHECK-RV64-NEXT:    vmv8r.v v16, v8
16330; CHECK-RV64-NEXT:    vmv.s.x v12, a2
16331; CHECK-RV64-NEXT:    li a2, 252
16332; CHECK-RV64-NEXT:    li a3, 251
16333; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
16334; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
16335; CHECK-RV64-NEXT:    addi a0, a0, 1
16336; CHECK-RV64-NEXT:    vmv4r.v v16, v8
16337; CHECK-RV64-NEXT:    vmv8r.v v8, v16
16338; CHECK-RV64-NEXT:    slli a2, a1, 3
16339; CHECK-RV64-NEXT:    bltz a2, .LBB61_773
16340; CHECK-RV64-NEXT:    j .LBB61_259
16341; CHECK-RV64-NEXT:  .LBB61_773: # %cond.load1005
16342; CHECK-RV64-NEXT:    lbu a2, 0(a0)
16343; CHECK-RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
16344; CHECK-RV64-NEXT:    vmv8r.v v16, v8
16345; CHECK-RV64-NEXT:    vmv.s.x v12, a2
16346; CHECK-RV64-NEXT:    li a2, 253
16347; CHECK-RV64-NEXT:    li a3, 252
16348; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m4, tu, ma
16349; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
16350; CHECK-RV64-NEXT:    addi a0, a0, 1
16351; CHECK-RV64-NEXT:    vmv4r.v v16, v8
16352; CHECK-RV64-NEXT:    vmv8r.v v8, v16
16353; CHECK-RV64-NEXT:    slli a2, a1, 2
16354; CHECK-RV64-NEXT:    bgez a2, .LBB61_1028
16355; CHECK-RV64-NEXT:    j .LBB61_260
16356; CHECK-RV64-NEXT:  .LBB61_1028: # %cond.load1005
16357; CHECK-RV64-NEXT:    j .LBB61_261
16358; CHECK-RV64-NEXT:  .LBB61_774: # %cond.load1017
16359; CHECK-RV64-NEXT:    lbu a1, 0(a0)
16360; CHECK-RV64-NEXT:    vmv8r.v v16, v8
16361; CHECK-RV64-NEXT:    vmv.s.x v12, a1
16362; CHECK-RV64-NEXT:    li a1, 256
16363; CHECK-RV64-NEXT:    li a3, 255
16364; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m4, tu, ma
16365; CHECK-RV64-NEXT:    vslideup.vx v8, v12, a3
16366; CHECK-RV64-NEXT:    addi a0, a0, 1
16367; CHECK-RV64-NEXT:    vmv4r.v v16, v8
16368; CHECK-RV64-NEXT:    vmv8r.v v8, v16
16369; CHECK-RV64-NEXT:    andi a1, a2, 1
16370; CHECK-RV64-NEXT:    bnez a1, .LBB61_775
16371; CHECK-RV64-NEXT:    j .LBB61_265
16372; CHECK-RV64-NEXT:  .LBB61_775: # %cond.load1021
16373; CHECK-RV64-NEXT:    lbu a1, 0(a0)
16374; CHECK-RV64-NEXT:    li a3, 512
16375; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
16376; CHECK-RV64-NEXT:    vmv.s.x v16, a1
16377; CHECK-RV64-NEXT:    li a1, 257
16378; CHECK-RV64-NEXT:    li a3, 256
16379; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
16380; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
16381; CHECK-RV64-NEXT:    addi a0, a0, 1
16382; CHECK-RV64-NEXT:    andi a1, a2, 2
16383; CHECK-RV64-NEXT:    bnez a1, .LBB61_776
16384; CHECK-RV64-NEXT:    j .LBB61_266
16385; CHECK-RV64-NEXT:  .LBB61_776: # %cond.load1025
16386; CHECK-RV64-NEXT:    lbu a1, 0(a0)
16387; CHECK-RV64-NEXT:    li a3, 512
16388; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
16389; CHECK-RV64-NEXT:    vmv.s.x v16, a1
16390; CHECK-RV64-NEXT:    li a1, 258
16391; CHECK-RV64-NEXT:    li a3, 257
16392; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
16393; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
16394; CHECK-RV64-NEXT:    addi a0, a0, 1
16395; CHECK-RV64-NEXT:    andi a1, a2, 4
16396; CHECK-RV64-NEXT:    bnez a1, .LBB61_777
16397; CHECK-RV64-NEXT:    j .LBB61_267
16398; CHECK-RV64-NEXT:  .LBB61_777: # %cond.load1029
16399; CHECK-RV64-NEXT:    lbu a1, 0(a0)
16400; CHECK-RV64-NEXT:    li a3, 512
16401; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
16402; CHECK-RV64-NEXT:    vmv.s.x v16, a1
16403; CHECK-RV64-NEXT:    li a1, 259
16404; CHECK-RV64-NEXT:    li a3, 258
16405; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
16406; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
16407; CHECK-RV64-NEXT:    addi a0, a0, 1
16408; CHECK-RV64-NEXT:    andi a1, a2, 8
16409; CHECK-RV64-NEXT:    bnez a1, .LBB61_778
16410; CHECK-RV64-NEXT:    j .LBB61_268
16411; CHECK-RV64-NEXT:  .LBB61_778: # %cond.load1033
16412; CHECK-RV64-NEXT:    lbu a1, 0(a0)
16413; CHECK-RV64-NEXT:    li a3, 512
16414; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
16415; CHECK-RV64-NEXT:    vmv.s.x v16, a1
16416; CHECK-RV64-NEXT:    li a1, 260
16417; CHECK-RV64-NEXT:    li a3, 259
16418; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
16419; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
16420; CHECK-RV64-NEXT:    addi a0, a0, 1
16421; CHECK-RV64-NEXT:    andi a1, a2, 16
16422; CHECK-RV64-NEXT:    bnez a1, .LBB61_779
16423; CHECK-RV64-NEXT:    j .LBB61_269
16424; CHECK-RV64-NEXT:  .LBB61_779: # %cond.load1037
16425; CHECK-RV64-NEXT:    lbu a1, 0(a0)
16426; CHECK-RV64-NEXT:    li a3, 512
16427; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
16428; CHECK-RV64-NEXT:    vmv.s.x v16, a1
16429; CHECK-RV64-NEXT:    li a1, 261
16430; CHECK-RV64-NEXT:    li a3, 260
16431; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
16432; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
16433; CHECK-RV64-NEXT:    addi a0, a0, 1
16434; CHECK-RV64-NEXT:    andi a1, a2, 32
16435; CHECK-RV64-NEXT:    bnez a1, .LBB61_780
16436; CHECK-RV64-NEXT:    j .LBB61_270
16437; CHECK-RV64-NEXT:  .LBB61_780: # %cond.load1041
16438; CHECK-RV64-NEXT:    lbu a1, 0(a0)
16439; CHECK-RV64-NEXT:    li a3, 512
16440; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
16441; CHECK-RV64-NEXT:    vmv.s.x v16, a1
16442; CHECK-RV64-NEXT:    li a1, 262
16443; CHECK-RV64-NEXT:    li a3, 261
16444; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
16445; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
16446; CHECK-RV64-NEXT:    addi a0, a0, 1
16447; CHECK-RV64-NEXT:    andi a1, a2, 64
16448; CHECK-RV64-NEXT:    bnez a1, .LBB61_781
16449; CHECK-RV64-NEXT:    j .LBB61_271
16450; CHECK-RV64-NEXT:  .LBB61_781: # %cond.load1045
16451; CHECK-RV64-NEXT:    lbu a1, 0(a0)
16452; CHECK-RV64-NEXT:    li a3, 512
16453; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
16454; CHECK-RV64-NEXT:    vmv.s.x v16, a1
16455; CHECK-RV64-NEXT:    li a1, 263
16456; CHECK-RV64-NEXT:    li a3, 262
16457; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
16458; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
16459; CHECK-RV64-NEXT:    addi a0, a0, 1
16460; CHECK-RV64-NEXT:    andi a1, a2, 128
16461; CHECK-RV64-NEXT:    bnez a1, .LBB61_782
16462; CHECK-RV64-NEXT:    j .LBB61_272
16463; CHECK-RV64-NEXT:  .LBB61_782: # %cond.load1049
16464; CHECK-RV64-NEXT:    lbu a1, 0(a0)
16465; CHECK-RV64-NEXT:    li a3, 512
16466; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
16467; CHECK-RV64-NEXT:    vmv.s.x v16, a1
16468; CHECK-RV64-NEXT:    li a1, 264
16469; CHECK-RV64-NEXT:    li a3, 263
16470; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
16471; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
16472; CHECK-RV64-NEXT:    addi a0, a0, 1
16473; CHECK-RV64-NEXT:    andi a1, a2, 256
16474; CHECK-RV64-NEXT:    bnez a1, .LBB61_783
16475; CHECK-RV64-NEXT:    j .LBB61_273
16476; CHECK-RV64-NEXT:  .LBB61_783: # %cond.load1053
16477; CHECK-RV64-NEXT:    lbu a1, 0(a0)
16478; CHECK-RV64-NEXT:    li a3, 512
16479; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
16480; CHECK-RV64-NEXT:    vmv.s.x v16, a1
16481; CHECK-RV64-NEXT:    li a1, 265
16482; CHECK-RV64-NEXT:    li a3, 264
16483; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
16484; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
16485; CHECK-RV64-NEXT:    addi a0, a0, 1
16486; CHECK-RV64-NEXT:    andi a1, a2, 512
16487; CHECK-RV64-NEXT:    bnez a1, .LBB61_784
16488; CHECK-RV64-NEXT:    j .LBB61_274
16489; CHECK-RV64-NEXT:  .LBB61_784: # %cond.load1057
16490; CHECK-RV64-NEXT:    lbu a1, 0(a0)
16491; CHECK-RV64-NEXT:    li a3, 512
16492; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
16493; CHECK-RV64-NEXT:    vmv.s.x v16, a1
16494; CHECK-RV64-NEXT:    li a1, 266
16495; CHECK-RV64-NEXT:    li a3, 265
16496; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
16497; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
16498; CHECK-RV64-NEXT:    addi a0, a0, 1
16499; CHECK-RV64-NEXT:    andi a1, a2, 1024
16500; CHECK-RV64-NEXT:    bnez a1, .LBB61_785
16501; CHECK-RV64-NEXT:    j .LBB61_275
16502; CHECK-RV64-NEXT:  .LBB61_785: # %cond.load1061
16503; CHECK-RV64-NEXT:    lbu a1, 0(a0)
16504; CHECK-RV64-NEXT:    li a3, 512
16505; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
16506; CHECK-RV64-NEXT:    vmv.s.x v16, a1
16507; CHECK-RV64-NEXT:    li a1, 267
16508; CHECK-RV64-NEXT:    li a3, 266
16509; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
16510; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
16511; CHECK-RV64-NEXT:    addi a0, a0, 1
16512; CHECK-RV64-NEXT:    slli a1, a2, 52
16513; CHECK-RV64-NEXT:    bltz a1, .LBB61_786
16514; CHECK-RV64-NEXT:    j .LBB61_276
16515; CHECK-RV64-NEXT:  .LBB61_786: # %cond.load1065
16516; CHECK-RV64-NEXT:    lbu a1, 0(a0)
16517; CHECK-RV64-NEXT:    li a3, 512
16518; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
16519; CHECK-RV64-NEXT:    vmv.s.x v16, a1
16520; CHECK-RV64-NEXT:    li a1, 268
16521; CHECK-RV64-NEXT:    li a3, 267
16522; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
16523; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
16524; CHECK-RV64-NEXT:    addi a0, a0, 1
16525; CHECK-RV64-NEXT:    slli a1, a2, 51
16526; CHECK-RV64-NEXT:    bltz a1, .LBB61_787
16527; CHECK-RV64-NEXT:    j .LBB61_277
16528; CHECK-RV64-NEXT:  .LBB61_787: # %cond.load1069
16529; CHECK-RV64-NEXT:    lbu a1, 0(a0)
16530; CHECK-RV64-NEXT:    li a3, 512
16531; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
16532; CHECK-RV64-NEXT:    vmv.s.x v16, a1
16533; CHECK-RV64-NEXT:    li a1, 269
16534; CHECK-RV64-NEXT:    li a3, 268
16535; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
16536; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
16537; CHECK-RV64-NEXT:    addi a0, a0, 1
16538; CHECK-RV64-NEXT:    slli a1, a2, 50
16539; CHECK-RV64-NEXT:    bltz a1, .LBB61_788
16540; CHECK-RV64-NEXT:    j .LBB61_278
16541; CHECK-RV64-NEXT:  .LBB61_788: # %cond.load1073
16542; CHECK-RV64-NEXT:    lbu a1, 0(a0)
16543; CHECK-RV64-NEXT:    li a3, 512
16544; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
16545; CHECK-RV64-NEXT:    vmv.s.x v16, a1
16546; CHECK-RV64-NEXT:    li a1, 270
16547; CHECK-RV64-NEXT:    li a3, 269
16548; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
16549; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
16550; CHECK-RV64-NEXT:    addi a0, a0, 1
16551; CHECK-RV64-NEXT:    slli a1, a2, 49
16552; CHECK-RV64-NEXT:    bltz a1, .LBB61_789
16553; CHECK-RV64-NEXT:    j .LBB61_279
16554; CHECK-RV64-NEXT:  .LBB61_789: # %cond.load1077
16555; CHECK-RV64-NEXT:    lbu a1, 0(a0)
16556; CHECK-RV64-NEXT:    li a3, 512
16557; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
16558; CHECK-RV64-NEXT:    vmv.s.x v16, a1
16559; CHECK-RV64-NEXT:    li a1, 271
16560; CHECK-RV64-NEXT:    li a3, 270
16561; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
16562; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
16563; CHECK-RV64-NEXT:    addi a0, a0, 1
16564; CHECK-RV64-NEXT:    slli a1, a2, 48
16565; CHECK-RV64-NEXT:    bltz a1, .LBB61_790
16566; CHECK-RV64-NEXT:    j .LBB61_280
16567; CHECK-RV64-NEXT:  .LBB61_790: # %cond.load1081
16568; CHECK-RV64-NEXT:    lbu a1, 0(a0)
16569; CHECK-RV64-NEXT:    li a3, 512
16570; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
16571; CHECK-RV64-NEXT:    vmv.s.x v16, a1
16572; CHECK-RV64-NEXT:    li a1, 272
16573; CHECK-RV64-NEXT:    li a3, 271
16574; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
16575; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
16576; CHECK-RV64-NEXT:    addi a0, a0, 1
16577; CHECK-RV64-NEXT:    slli a1, a2, 47
16578; CHECK-RV64-NEXT:    bltz a1, .LBB61_791
16579; CHECK-RV64-NEXT:    j .LBB61_281
16580; CHECK-RV64-NEXT:  .LBB61_791: # %cond.load1085
16581; CHECK-RV64-NEXT:    lbu a1, 0(a0)
16582; CHECK-RV64-NEXT:    li a3, 512
16583; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
16584; CHECK-RV64-NEXT:    vmv.s.x v16, a1
16585; CHECK-RV64-NEXT:    li a1, 273
16586; CHECK-RV64-NEXT:    li a3, 272
16587; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
16588; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
16589; CHECK-RV64-NEXT:    addi a0, a0, 1
16590; CHECK-RV64-NEXT:    slli a1, a2, 46
16591; CHECK-RV64-NEXT:    bltz a1, .LBB61_792
16592; CHECK-RV64-NEXT:    j .LBB61_282
16593; CHECK-RV64-NEXT:  .LBB61_792: # %cond.load1089
16594; CHECK-RV64-NEXT:    lbu a1, 0(a0)
16595; CHECK-RV64-NEXT:    li a3, 512
16596; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
16597; CHECK-RV64-NEXT:    vmv.s.x v16, a1
16598; CHECK-RV64-NEXT:    li a1, 274
16599; CHECK-RV64-NEXT:    li a3, 273
16600; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
16601; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
16602; CHECK-RV64-NEXT:    addi a0, a0, 1
16603; CHECK-RV64-NEXT:    slli a1, a2, 45
16604; CHECK-RV64-NEXT:    bltz a1, .LBB61_793
16605; CHECK-RV64-NEXT:    j .LBB61_283
16606; CHECK-RV64-NEXT:  .LBB61_793: # %cond.load1093
16607; CHECK-RV64-NEXT:    lbu a1, 0(a0)
16608; CHECK-RV64-NEXT:    li a3, 512
16609; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
16610; CHECK-RV64-NEXT:    vmv.s.x v16, a1
16611; CHECK-RV64-NEXT:    li a1, 275
16612; CHECK-RV64-NEXT:    li a3, 274
16613; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
16614; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
16615; CHECK-RV64-NEXT:    addi a0, a0, 1
16616; CHECK-RV64-NEXT:    slli a1, a2, 44
16617; CHECK-RV64-NEXT:    bltz a1, .LBB61_794
16618; CHECK-RV64-NEXT:    j .LBB61_284
16619; CHECK-RV64-NEXT:  .LBB61_794: # %cond.load1097
16620; CHECK-RV64-NEXT:    lbu a1, 0(a0)
16621; CHECK-RV64-NEXT:    li a3, 512
16622; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
16623; CHECK-RV64-NEXT:    vmv.s.x v16, a1
16624; CHECK-RV64-NEXT:    li a1, 276
16625; CHECK-RV64-NEXT:    li a3, 275
16626; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
16627; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
16628; CHECK-RV64-NEXT:    addi a0, a0, 1
16629; CHECK-RV64-NEXT:    slli a1, a2, 43
16630; CHECK-RV64-NEXT:    bltz a1, .LBB61_795
16631; CHECK-RV64-NEXT:    j .LBB61_285
16632; CHECK-RV64-NEXT:  .LBB61_795: # %cond.load1101
16633; CHECK-RV64-NEXT:    lbu a1, 0(a0)
16634; CHECK-RV64-NEXT:    li a3, 512
16635; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
16636; CHECK-RV64-NEXT:    vmv.s.x v16, a1
16637; CHECK-RV64-NEXT:    li a1, 277
16638; CHECK-RV64-NEXT:    li a3, 276
16639; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
16640; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
16641; CHECK-RV64-NEXT:    addi a0, a0, 1
16642; CHECK-RV64-NEXT:    slli a1, a2, 42
16643; CHECK-RV64-NEXT:    bltz a1, .LBB61_796
16644; CHECK-RV64-NEXT:    j .LBB61_286
16645; CHECK-RV64-NEXT:  .LBB61_796: # %cond.load1105
16646; CHECK-RV64-NEXT:    lbu a1, 0(a0)
16647; CHECK-RV64-NEXT:    li a3, 512
16648; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
16649; CHECK-RV64-NEXT:    vmv.s.x v16, a1
16650; CHECK-RV64-NEXT:    li a1, 278
16651; CHECK-RV64-NEXT:    li a3, 277
16652; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
16653; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
16654; CHECK-RV64-NEXT:    addi a0, a0, 1
16655; CHECK-RV64-NEXT:    slli a1, a2, 41
16656; CHECK-RV64-NEXT:    bltz a1, .LBB61_797
16657; CHECK-RV64-NEXT:    j .LBB61_287
16658; CHECK-RV64-NEXT:  .LBB61_797: # %cond.load1109
16659; CHECK-RV64-NEXT:    lbu a1, 0(a0)
16660; CHECK-RV64-NEXT:    li a3, 512
16661; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
16662; CHECK-RV64-NEXT:    vmv.s.x v16, a1
16663; CHECK-RV64-NEXT:    li a1, 279
16664; CHECK-RV64-NEXT:    li a3, 278
16665; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
16666; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
16667; CHECK-RV64-NEXT:    addi a0, a0, 1
16668; CHECK-RV64-NEXT:    slli a1, a2, 40
16669; CHECK-RV64-NEXT:    bltz a1, .LBB61_798
16670; CHECK-RV64-NEXT:    j .LBB61_288
16671; CHECK-RV64-NEXT:  .LBB61_798: # %cond.load1113
16672; CHECK-RV64-NEXT:    lbu a1, 0(a0)
16673; CHECK-RV64-NEXT:    li a3, 512
16674; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
16675; CHECK-RV64-NEXT:    vmv.s.x v16, a1
16676; CHECK-RV64-NEXT:    li a1, 280
16677; CHECK-RV64-NEXT:    li a3, 279
16678; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
16679; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
16680; CHECK-RV64-NEXT:    addi a0, a0, 1
16681; CHECK-RV64-NEXT:    slli a1, a2, 39
16682; CHECK-RV64-NEXT:    bltz a1, .LBB61_799
16683; CHECK-RV64-NEXT:    j .LBB61_289
16684; CHECK-RV64-NEXT:  .LBB61_799: # %cond.load1117
16685; CHECK-RV64-NEXT:    lbu a1, 0(a0)
16686; CHECK-RV64-NEXT:    li a3, 512
16687; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
16688; CHECK-RV64-NEXT:    vmv.s.x v16, a1
16689; CHECK-RV64-NEXT:    li a1, 281
16690; CHECK-RV64-NEXT:    li a3, 280
16691; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
16692; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
16693; CHECK-RV64-NEXT:    addi a0, a0, 1
16694; CHECK-RV64-NEXT:    slli a1, a2, 38
16695; CHECK-RV64-NEXT:    bltz a1, .LBB61_800
16696; CHECK-RV64-NEXT:    j .LBB61_290
16697; CHECK-RV64-NEXT:  .LBB61_800: # %cond.load1121
16698; CHECK-RV64-NEXT:    lbu a1, 0(a0)
16699; CHECK-RV64-NEXT:    li a3, 512
16700; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
16701; CHECK-RV64-NEXT:    vmv.s.x v16, a1
16702; CHECK-RV64-NEXT:    li a1, 282
16703; CHECK-RV64-NEXT:    li a3, 281
16704; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
16705; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
16706; CHECK-RV64-NEXT:    addi a0, a0, 1
16707; CHECK-RV64-NEXT:    slli a1, a2, 37
16708; CHECK-RV64-NEXT:    bltz a1, .LBB61_801
16709; CHECK-RV64-NEXT:    j .LBB61_291
16710; CHECK-RV64-NEXT:  .LBB61_801: # %cond.load1125
16711; CHECK-RV64-NEXT:    lbu a1, 0(a0)
16712; CHECK-RV64-NEXT:    li a3, 512
16713; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
16714; CHECK-RV64-NEXT:    vmv.s.x v16, a1
16715; CHECK-RV64-NEXT:    li a1, 283
16716; CHECK-RV64-NEXT:    li a3, 282
16717; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
16718; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
16719; CHECK-RV64-NEXT:    addi a0, a0, 1
16720; CHECK-RV64-NEXT:    slli a1, a2, 36
16721; CHECK-RV64-NEXT:    bltz a1, .LBB61_802
16722; CHECK-RV64-NEXT:    j .LBB61_292
16723; CHECK-RV64-NEXT:  .LBB61_802: # %cond.load1129
16724; CHECK-RV64-NEXT:    lbu a1, 0(a0)
16725; CHECK-RV64-NEXT:    li a3, 512
16726; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
16727; CHECK-RV64-NEXT:    vmv.s.x v16, a1
16728; CHECK-RV64-NEXT:    li a1, 284
16729; CHECK-RV64-NEXT:    li a3, 283
16730; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
16731; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
16732; CHECK-RV64-NEXT:    addi a0, a0, 1
16733; CHECK-RV64-NEXT:    slli a1, a2, 35
16734; CHECK-RV64-NEXT:    bltz a1, .LBB61_803
16735; CHECK-RV64-NEXT:    j .LBB61_293
16736; CHECK-RV64-NEXT:  .LBB61_803: # %cond.load1133
16737; CHECK-RV64-NEXT:    lbu a1, 0(a0)
16738; CHECK-RV64-NEXT:    li a3, 512
16739; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
16740; CHECK-RV64-NEXT:    vmv.s.x v16, a1
16741; CHECK-RV64-NEXT:    li a1, 285
16742; CHECK-RV64-NEXT:    li a3, 284
16743; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
16744; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
16745; CHECK-RV64-NEXT:    addi a0, a0, 1
16746; CHECK-RV64-NEXT:    slli a1, a2, 34
16747; CHECK-RV64-NEXT:    bltz a1, .LBB61_804
16748; CHECK-RV64-NEXT:    j .LBB61_294
16749; CHECK-RV64-NEXT:  .LBB61_804: # %cond.load1137
16750; CHECK-RV64-NEXT:    lbu a1, 0(a0)
16751; CHECK-RV64-NEXT:    li a3, 512
16752; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
16753; CHECK-RV64-NEXT:    vmv.s.x v16, a1
16754; CHECK-RV64-NEXT:    li a1, 286
16755; CHECK-RV64-NEXT:    li a3, 285
16756; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
16757; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
16758; CHECK-RV64-NEXT:    addi a0, a0, 1
16759; CHECK-RV64-NEXT:    slli a1, a2, 33
16760; CHECK-RV64-NEXT:    bltz a1, .LBB61_805
16761; CHECK-RV64-NEXT:    j .LBB61_295
16762; CHECK-RV64-NEXT:  .LBB61_805: # %cond.load1141
16763; CHECK-RV64-NEXT:    lbu a1, 0(a0)
16764; CHECK-RV64-NEXT:    li a3, 512
16765; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
16766; CHECK-RV64-NEXT:    vmv.s.x v16, a1
16767; CHECK-RV64-NEXT:    li a1, 287
16768; CHECK-RV64-NEXT:    li a3, 286
16769; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
16770; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
16771; CHECK-RV64-NEXT:    addi a0, a0, 1
16772; CHECK-RV64-NEXT:    slli a1, a2, 32
16773; CHECK-RV64-NEXT:    bltz a1, .LBB61_806
16774; CHECK-RV64-NEXT:    j .LBB61_296
16775; CHECK-RV64-NEXT:  .LBB61_806: # %cond.load1145
16776; CHECK-RV64-NEXT:    lbu a1, 0(a0)
16777; CHECK-RV64-NEXT:    li a3, 512
16778; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
16779; CHECK-RV64-NEXT:    vmv.s.x v16, a1
16780; CHECK-RV64-NEXT:    li a1, 288
16781; CHECK-RV64-NEXT:    li a3, 287
16782; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
16783; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
16784; CHECK-RV64-NEXT:    addi a0, a0, 1
16785; CHECK-RV64-NEXT:    slli a1, a2, 31
16786; CHECK-RV64-NEXT:    bltz a1, .LBB61_807
16787; CHECK-RV64-NEXT:    j .LBB61_297
16788; CHECK-RV64-NEXT:  .LBB61_807: # %cond.load1149
16789; CHECK-RV64-NEXT:    lbu a1, 0(a0)
16790; CHECK-RV64-NEXT:    li a3, 512
16791; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
16792; CHECK-RV64-NEXT:    vmv.s.x v16, a1
16793; CHECK-RV64-NEXT:    li a1, 289
16794; CHECK-RV64-NEXT:    li a3, 288
16795; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
16796; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
16797; CHECK-RV64-NEXT:    addi a0, a0, 1
16798; CHECK-RV64-NEXT:    slli a1, a2, 30
16799; CHECK-RV64-NEXT:    bltz a1, .LBB61_808
16800; CHECK-RV64-NEXT:    j .LBB61_298
16801; CHECK-RV64-NEXT:  .LBB61_808: # %cond.load1153
16802; CHECK-RV64-NEXT:    lbu a1, 0(a0)
16803; CHECK-RV64-NEXT:    li a3, 512
16804; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
16805; CHECK-RV64-NEXT:    vmv.s.x v16, a1
16806; CHECK-RV64-NEXT:    li a1, 290
16807; CHECK-RV64-NEXT:    li a3, 289
16808; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
16809; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
16810; CHECK-RV64-NEXT:    addi a0, a0, 1
16811; CHECK-RV64-NEXT:    slli a1, a2, 29
16812; CHECK-RV64-NEXT:    bltz a1, .LBB61_809
16813; CHECK-RV64-NEXT:    j .LBB61_299
16814; CHECK-RV64-NEXT:  .LBB61_809: # %cond.load1157
16815; CHECK-RV64-NEXT:    lbu a1, 0(a0)
16816; CHECK-RV64-NEXT:    li a3, 512
16817; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
16818; CHECK-RV64-NEXT:    vmv.s.x v16, a1
16819; CHECK-RV64-NEXT:    li a1, 291
16820; CHECK-RV64-NEXT:    li a3, 290
16821; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
16822; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
16823; CHECK-RV64-NEXT:    addi a0, a0, 1
16824; CHECK-RV64-NEXT:    slli a1, a2, 28
16825; CHECK-RV64-NEXT:    bltz a1, .LBB61_810
16826; CHECK-RV64-NEXT:    j .LBB61_300
16827; CHECK-RV64-NEXT:  .LBB61_810: # %cond.load1161
16828; CHECK-RV64-NEXT:    lbu a1, 0(a0)
16829; CHECK-RV64-NEXT:    li a3, 512
16830; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
16831; CHECK-RV64-NEXT:    vmv.s.x v16, a1
16832; CHECK-RV64-NEXT:    li a1, 292
16833; CHECK-RV64-NEXT:    li a3, 291
16834; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
16835; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
16836; CHECK-RV64-NEXT:    addi a0, a0, 1
16837; CHECK-RV64-NEXT:    slli a1, a2, 27
16838; CHECK-RV64-NEXT:    bltz a1, .LBB61_811
16839; CHECK-RV64-NEXT:    j .LBB61_301
16840; CHECK-RV64-NEXT:  .LBB61_811: # %cond.load1165
16841; CHECK-RV64-NEXT:    lbu a1, 0(a0)
16842; CHECK-RV64-NEXT:    li a3, 512
16843; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
16844; CHECK-RV64-NEXT:    vmv.s.x v16, a1
16845; CHECK-RV64-NEXT:    li a1, 293
16846; CHECK-RV64-NEXT:    li a3, 292
16847; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
16848; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
16849; CHECK-RV64-NEXT:    addi a0, a0, 1
16850; CHECK-RV64-NEXT:    slli a1, a2, 26
16851; CHECK-RV64-NEXT:    bltz a1, .LBB61_812
16852; CHECK-RV64-NEXT:    j .LBB61_302
16853; CHECK-RV64-NEXT:  .LBB61_812: # %cond.load1169
16854; CHECK-RV64-NEXT:    lbu a1, 0(a0)
16855; CHECK-RV64-NEXT:    li a3, 512
16856; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
16857; CHECK-RV64-NEXT:    vmv.s.x v16, a1
16858; CHECK-RV64-NEXT:    li a1, 294
16859; CHECK-RV64-NEXT:    li a3, 293
16860; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
16861; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
16862; CHECK-RV64-NEXT:    addi a0, a0, 1
16863; CHECK-RV64-NEXT:    slli a1, a2, 25
16864; CHECK-RV64-NEXT:    bltz a1, .LBB61_813
16865; CHECK-RV64-NEXT:    j .LBB61_303
16866; CHECK-RV64-NEXT:  .LBB61_813: # %cond.load1173
16867; CHECK-RV64-NEXT:    lbu a1, 0(a0)
16868; CHECK-RV64-NEXT:    li a3, 512
16869; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
16870; CHECK-RV64-NEXT:    vmv.s.x v16, a1
16871; CHECK-RV64-NEXT:    li a1, 295
16872; CHECK-RV64-NEXT:    li a3, 294
16873; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
16874; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
16875; CHECK-RV64-NEXT:    addi a0, a0, 1
16876; CHECK-RV64-NEXT:    slli a1, a2, 24
16877; CHECK-RV64-NEXT:    bltz a1, .LBB61_814
16878; CHECK-RV64-NEXT:    j .LBB61_304
16879; CHECK-RV64-NEXT:  .LBB61_814: # %cond.load1177
16880; CHECK-RV64-NEXT:    lbu a1, 0(a0)
16881; CHECK-RV64-NEXT:    li a3, 512
16882; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
16883; CHECK-RV64-NEXT:    vmv.s.x v16, a1
16884; CHECK-RV64-NEXT:    li a1, 296
16885; CHECK-RV64-NEXT:    li a3, 295
16886; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
16887; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
16888; CHECK-RV64-NEXT:    addi a0, a0, 1
16889; CHECK-RV64-NEXT:    slli a1, a2, 23
16890; CHECK-RV64-NEXT:    bltz a1, .LBB61_815
16891; CHECK-RV64-NEXT:    j .LBB61_305
16892; CHECK-RV64-NEXT:  .LBB61_815: # %cond.load1181
16893; CHECK-RV64-NEXT:    lbu a1, 0(a0)
16894; CHECK-RV64-NEXT:    li a3, 512
16895; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
16896; CHECK-RV64-NEXT:    vmv.s.x v16, a1
16897; CHECK-RV64-NEXT:    li a1, 297
16898; CHECK-RV64-NEXT:    li a3, 296
16899; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
16900; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
16901; CHECK-RV64-NEXT:    addi a0, a0, 1
16902; CHECK-RV64-NEXT:    slli a1, a2, 22
16903; CHECK-RV64-NEXT:    bltz a1, .LBB61_816
16904; CHECK-RV64-NEXT:    j .LBB61_306
16905; CHECK-RV64-NEXT:  .LBB61_816: # %cond.load1185
16906; CHECK-RV64-NEXT:    lbu a1, 0(a0)
16907; CHECK-RV64-NEXT:    li a3, 512
16908; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
16909; CHECK-RV64-NEXT:    vmv.s.x v16, a1
16910; CHECK-RV64-NEXT:    li a1, 298
16911; CHECK-RV64-NEXT:    li a3, 297
16912; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
16913; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
16914; CHECK-RV64-NEXT:    addi a0, a0, 1
16915; CHECK-RV64-NEXT:    slli a1, a2, 21
16916; CHECK-RV64-NEXT:    bltz a1, .LBB61_817
16917; CHECK-RV64-NEXT:    j .LBB61_307
16918; CHECK-RV64-NEXT:  .LBB61_817: # %cond.load1189
16919; CHECK-RV64-NEXT:    lbu a1, 0(a0)
16920; CHECK-RV64-NEXT:    li a3, 512
16921; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
16922; CHECK-RV64-NEXT:    vmv.s.x v16, a1
16923; CHECK-RV64-NEXT:    li a1, 299
16924; CHECK-RV64-NEXT:    li a3, 298
16925; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
16926; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
16927; CHECK-RV64-NEXT:    addi a0, a0, 1
16928; CHECK-RV64-NEXT:    slli a1, a2, 20
16929; CHECK-RV64-NEXT:    bltz a1, .LBB61_818
16930; CHECK-RV64-NEXT:    j .LBB61_308
16931; CHECK-RV64-NEXT:  .LBB61_818: # %cond.load1193
16932; CHECK-RV64-NEXT:    lbu a1, 0(a0)
16933; CHECK-RV64-NEXT:    li a3, 512
16934; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
16935; CHECK-RV64-NEXT:    vmv.s.x v16, a1
16936; CHECK-RV64-NEXT:    li a1, 300
16937; CHECK-RV64-NEXT:    li a3, 299
16938; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
16939; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
16940; CHECK-RV64-NEXT:    addi a0, a0, 1
16941; CHECK-RV64-NEXT:    slli a1, a2, 19
16942; CHECK-RV64-NEXT:    bltz a1, .LBB61_819
16943; CHECK-RV64-NEXT:    j .LBB61_309
16944; CHECK-RV64-NEXT:  .LBB61_819: # %cond.load1197
16945; CHECK-RV64-NEXT:    lbu a1, 0(a0)
16946; CHECK-RV64-NEXT:    li a3, 512
16947; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
16948; CHECK-RV64-NEXT:    vmv.s.x v16, a1
16949; CHECK-RV64-NEXT:    li a1, 301
16950; CHECK-RV64-NEXT:    li a3, 300
16951; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
16952; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
16953; CHECK-RV64-NEXT:    addi a0, a0, 1
16954; CHECK-RV64-NEXT:    slli a1, a2, 18
16955; CHECK-RV64-NEXT:    bltz a1, .LBB61_820
16956; CHECK-RV64-NEXT:    j .LBB61_310
16957; CHECK-RV64-NEXT:  .LBB61_820: # %cond.load1201
16958; CHECK-RV64-NEXT:    lbu a1, 0(a0)
16959; CHECK-RV64-NEXT:    li a3, 512
16960; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
16961; CHECK-RV64-NEXT:    vmv.s.x v16, a1
16962; CHECK-RV64-NEXT:    li a1, 302
16963; CHECK-RV64-NEXT:    li a3, 301
16964; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
16965; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
16966; CHECK-RV64-NEXT:    addi a0, a0, 1
16967; CHECK-RV64-NEXT:    slli a1, a2, 17
16968; CHECK-RV64-NEXT:    bltz a1, .LBB61_821
16969; CHECK-RV64-NEXT:    j .LBB61_311
16970; CHECK-RV64-NEXT:  .LBB61_821: # %cond.load1205
16971; CHECK-RV64-NEXT:    lbu a1, 0(a0)
16972; CHECK-RV64-NEXT:    li a3, 512
16973; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
16974; CHECK-RV64-NEXT:    vmv.s.x v16, a1
16975; CHECK-RV64-NEXT:    li a1, 303
16976; CHECK-RV64-NEXT:    li a3, 302
16977; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
16978; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
16979; CHECK-RV64-NEXT:    addi a0, a0, 1
16980; CHECK-RV64-NEXT:    slli a1, a2, 16
16981; CHECK-RV64-NEXT:    bltz a1, .LBB61_822
16982; CHECK-RV64-NEXT:    j .LBB61_312
16983; CHECK-RV64-NEXT:  .LBB61_822: # %cond.load1209
16984; CHECK-RV64-NEXT:    lbu a1, 0(a0)
16985; CHECK-RV64-NEXT:    li a3, 512
16986; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
16987; CHECK-RV64-NEXT:    vmv.s.x v16, a1
16988; CHECK-RV64-NEXT:    li a1, 304
16989; CHECK-RV64-NEXT:    li a3, 303
16990; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
16991; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
16992; CHECK-RV64-NEXT:    addi a0, a0, 1
16993; CHECK-RV64-NEXT:    slli a1, a2, 15
16994; CHECK-RV64-NEXT:    bltz a1, .LBB61_823
16995; CHECK-RV64-NEXT:    j .LBB61_313
16996; CHECK-RV64-NEXT:  .LBB61_823: # %cond.load1213
16997; CHECK-RV64-NEXT:    lbu a1, 0(a0)
16998; CHECK-RV64-NEXT:    li a3, 512
16999; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
17000; CHECK-RV64-NEXT:    vmv.s.x v16, a1
17001; CHECK-RV64-NEXT:    li a1, 305
17002; CHECK-RV64-NEXT:    li a3, 304
17003; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
17004; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
17005; CHECK-RV64-NEXT:    addi a0, a0, 1
17006; CHECK-RV64-NEXT:    slli a1, a2, 14
17007; CHECK-RV64-NEXT:    bltz a1, .LBB61_824
17008; CHECK-RV64-NEXT:    j .LBB61_314
17009; CHECK-RV64-NEXT:  .LBB61_824: # %cond.load1217
17010; CHECK-RV64-NEXT:    lbu a1, 0(a0)
17011; CHECK-RV64-NEXT:    li a3, 512
17012; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
17013; CHECK-RV64-NEXT:    vmv.s.x v16, a1
17014; CHECK-RV64-NEXT:    li a1, 306
17015; CHECK-RV64-NEXT:    li a3, 305
17016; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
17017; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
17018; CHECK-RV64-NEXT:    addi a0, a0, 1
17019; CHECK-RV64-NEXT:    slli a1, a2, 13
17020; CHECK-RV64-NEXT:    bltz a1, .LBB61_825
17021; CHECK-RV64-NEXT:    j .LBB61_315
17022; CHECK-RV64-NEXT:  .LBB61_825: # %cond.load1221
17023; CHECK-RV64-NEXT:    lbu a1, 0(a0)
17024; CHECK-RV64-NEXT:    li a3, 512
17025; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
17026; CHECK-RV64-NEXT:    vmv.s.x v16, a1
17027; CHECK-RV64-NEXT:    li a1, 307
17028; CHECK-RV64-NEXT:    li a3, 306
17029; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
17030; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
17031; CHECK-RV64-NEXT:    addi a0, a0, 1
17032; CHECK-RV64-NEXT:    slli a1, a2, 12
17033; CHECK-RV64-NEXT:    bltz a1, .LBB61_826
17034; CHECK-RV64-NEXT:    j .LBB61_316
17035; CHECK-RV64-NEXT:  .LBB61_826: # %cond.load1225
17036; CHECK-RV64-NEXT:    lbu a1, 0(a0)
17037; CHECK-RV64-NEXT:    li a3, 512
17038; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
17039; CHECK-RV64-NEXT:    vmv.s.x v16, a1
17040; CHECK-RV64-NEXT:    li a1, 308
17041; CHECK-RV64-NEXT:    li a3, 307
17042; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
17043; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
17044; CHECK-RV64-NEXT:    addi a0, a0, 1
17045; CHECK-RV64-NEXT:    slli a1, a2, 11
17046; CHECK-RV64-NEXT:    bltz a1, .LBB61_827
17047; CHECK-RV64-NEXT:    j .LBB61_317
17048; CHECK-RV64-NEXT:  .LBB61_827: # %cond.load1229
17049; CHECK-RV64-NEXT:    lbu a1, 0(a0)
17050; CHECK-RV64-NEXT:    li a3, 512
17051; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
17052; CHECK-RV64-NEXT:    vmv.s.x v16, a1
17053; CHECK-RV64-NEXT:    li a1, 309
17054; CHECK-RV64-NEXT:    li a3, 308
17055; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
17056; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
17057; CHECK-RV64-NEXT:    addi a0, a0, 1
17058; CHECK-RV64-NEXT:    slli a1, a2, 10
17059; CHECK-RV64-NEXT:    bltz a1, .LBB61_828
17060; CHECK-RV64-NEXT:    j .LBB61_318
17061; CHECK-RV64-NEXT:  .LBB61_828: # %cond.load1233
17062; CHECK-RV64-NEXT:    lbu a1, 0(a0)
17063; CHECK-RV64-NEXT:    li a3, 512
17064; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
17065; CHECK-RV64-NEXT:    vmv.s.x v16, a1
17066; CHECK-RV64-NEXT:    li a1, 310
17067; CHECK-RV64-NEXT:    li a3, 309
17068; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
17069; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
17070; CHECK-RV64-NEXT:    addi a0, a0, 1
17071; CHECK-RV64-NEXT:    slli a1, a2, 9
17072; CHECK-RV64-NEXT:    bltz a1, .LBB61_829
17073; CHECK-RV64-NEXT:    j .LBB61_319
17074; CHECK-RV64-NEXT:  .LBB61_829: # %cond.load1237
17075; CHECK-RV64-NEXT:    lbu a1, 0(a0)
17076; CHECK-RV64-NEXT:    li a3, 512
17077; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
17078; CHECK-RV64-NEXT:    vmv.s.x v16, a1
17079; CHECK-RV64-NEXT:    li a1, 311
17080; CHECK-RV64-NEXT:    li a3, 310
17081; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
17082; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
17083; CHECK-RV64-NEXT:    addi a0, a0, 1
17084; CHECK-RV64-NEXT:    slli a1, a2, 8
17085; CHECK-RV64-NEXT:    bltz a1, .LBB61_830
17086; CHECK-RV64-NEXT:    j .LBB61_320
17087; CHECK-RV64-NEXT:  .LBB61_830: # %cond.load1241
17088; CHECK-RV64-NEXT:    lbu a1, 0(a0)
17089; CHECK-RV64-NEXT:    li a3, 512
17090; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
17091; CHECK-RV64-NEXT:    vmv.s.x v16, a1
17092; CHECK-RV64-NEXT:    li a1, 312
17093; CHECK-RV64-NEXT:    li a3, 311
17094; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
17095; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
17096; CHECK-RV64-NEXT:    addi a0, a0, 1
17097; CHECK-RV64-NEXT:    slli a1, a2, 7
17098; CHECK-RV64-NEXT:    bltz a1, .LBB61_831
17099; CHECK-RV64-NEXT:    j .LBB61_321
17100; CHECK-RV64-NEXT:  .LBB61_831: # %cond.load1245
17101; CHECK-RV64-NEXT:    lbu a1, 0(a0)
17102; CHECK-RV64-NEXT:    li a3, 512
17103; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
17104; CHECK-RV64-NEXT:    vmv.s.x v16, a1
17105; CHECK-RV64-NEXT:    li a1, 313
17106; CHECK-RV64-NEXT:    li a3, 312
17107; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
17108; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
17109; CHECK-RV64-NEXT:    addi a0, a0, 1
17110; CHECK-RV64-NEXT:    slli a1, a2, 6
17111; CHECK-RV64-NEXT:    bltz a1, .LBB61_832
17112; CHECK-RV64-NEXT:    j .LBB61_322
17113; CHECK-RV64-NEXT:  .LBB61_832: # %cond.load1249
17114; CHECK-RV64-NEXT:    lbu a1, 0(a0)
17115; CHECK-RV64-NEXT:    li a3, 512
17116; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
17117; CHECK-RV64-NEXT:    vmv.s.x v16, a1
17118; CHECK-RV64-NEXT:    li a1, 314
17119; CHECK-RV64-NEXT:    li a3, 313
17120; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
17121; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
17122; CHECK-RV64-NEXT:    addi a0, a0, 1
17123; CHECK-RV64-NEXT:    slli a1, a2, 5
17124; CHECK-RV64-NEXT:    bltz a1, .LBB61_833
17125; CHECK-RV64-NEXT:    j .LBB61_323
17126; CHECK-RV64-NEXT:  .LBB61_833: # %cond.load1253
17127; CHECK-RV64-NEXT:    lbu a1, 0(a0)
17128; CHECK-RV64-NEXT:    li a3, 512
17129; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
17130; CHECK-RV64-NEXT:    vmv.s.x v16, a1
17131; CHECK-RV64-NEXT:    li a1, 315
17132; CHECK-RV64-NEXT:    li a3, 314
17133; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
17134; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
17135; CHECK-RV64-NEXT:    addi a0, a0, 1
17136; CHECK-RV64-NEXT:    slli a1, a2, 4
17137; CHECK-RV64-NEXT:    bltz a1, .LBB61_834
17138; CHECK-RV64-NEXT:    j .LBB61_324
17139; CHECK-RV64-NEXT:  .LBB61_834: # %cond.load1257
17140; CHECK-RV64-NEXT:    lbu a1, 0(a0)
17141; CHECK-RV64-NEXT:    li a3, 512
17142; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
17143; CHECK-RV64-NEXT:    vmv.s.x v16, a1
17144; CHECK-RV64-NEXT:    li a1, 316
17145; CHECK-RV64-NEXT:    li a3, 315
17146; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
17147; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
17148; CHECK-RV64-NEXT:    addi a0, a0, 1
17149; CHECK-RV64-NEXT:    slli a1, a2, 3
17150; CHECK-RV64-NEXT:    bltz a1, .LBB61_835
17151; CHECK-RV64-NEXT:    j .LBB61_325
17152; CHECK-RV64-NEXT:  .LBB61_835: # %cond.load1261
17153; CHECK-RV64-NEXT:    lbu a1, 0(a0)
17154; CHECK-RV64-NEXT:    li a3, 512
17155; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
17156; CHECK-RV64-NEXT:    vmv.s.x v16, a1
17157; CHECK-RV64-NEXT:    li a1, 317
17158; CHECK-RV64-NEXT:    li a3, 316
17159; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
17160; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
17161; CHECK-RV64-NEXT:    addi a0, a0, 1
17162; CHECK-RV64-NEXT:    slli a1, a2, 2
17163; CHECK-RV64-NEXT:    bgez a1, .LBB61_1029
17164; CHECK-RV64-NEXT:    j .LBB61_326
17165; CHECK-RV64-NEXT:  .LBB61_1029: # %cond.load1261
17166; CHECK-RV64-NEXT:    j .LBB61_327
17167; CHECK-RV64-NEXT:  .LBB61_836: # %cond.load1273
17168; CHECK-RV64-NEXT:    lbu a2, 0(a0)
17169; CHECK-RV64-NEXT:    vmv.s.x v16, a2
17170; CHECK-RV64-NEXT:    li a2, 320
17171; CHECK-RV64-NEXT:    li a3, 319
17172; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
17173; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
17174; CHECK-RV64-NEXT:    addi a0, a0, 1
17175; CHECK-RV64-NEXT:    andi a2, a1, 1
17176; CHECK-RV64-NEXT:    bnez a2, .LBB61_837
17177; CHECK-RV64-NEXT:    j .LBB61_331
17178; CHECK-RV64-NEXT:  .LBB61_837: # %cond.load1277
17179; CHECK-RV64-NEXT:    lbu a2, 0(a0)
17180; CHECK-RV64-NEXT:    li a3, 512
17181; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
17182; CHECK-RV64-NEXT:    vmv.s.x v16, a2
17183; CHECK-RV64-NEXT:    li a2, 321
17184; CHECK-RV64-NEXT:    li a3, 320
17185; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
17186; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
17187; CHECK-RV64-NEXT:    addi a0, a0, 1
17188; CHECK-RV64-NEXT:    andi a2, a1, 2
17189; CHECK-RV64-NEXT:    bnez a2, .LBB61_838
17190; CHECK-RV64-NEXT:    j .LBB61_332
17191; CHECK-RV64-NEXT:  .LBB61_838: # %cond.load1281
17192; CHECK-RV64-NEXT:    lbu a2, 0(a0)
17193; CHECK-RV64-NEXT:    li a3, 512
17194; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
17195; CHECK-RV64-NEXT:    vmv.s.x v16, a2
17196; CHECK-RV64-NEXT:    li a2, 322
17197; CHECK-RV64-NEXT:    li a3, 321
17198; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
17199; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
17200; CHECK-RV64-NEXT:    addi a0, a0, 1
17201; CHECK-RV64-NEXT:    andi a2, a1, 4
17202; CHECK-RV64-NEXT:    bnez a2, .LBB61_839
17203; CHECK-RV64-NEXT:    j .LBB61_333
17204; CHECK-RV64-NEXT:  .LBB61_839: # %cond.load1285
17205; CHECK-RV64-NEXT:    lbu a2, 0(a0)
17206; CHECK-RV64-NEXT:    li a3, 512
17207; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
17208; CHECK-RV64-NEXT:    vmv.s.x v16, a2
17209; CHECK-RV64-NEXT:    li a2, 323
17210; CHECK-RV64-NEXT:    li a3, 322
17211; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
17212; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
17213; CHECK-RV64-NEXT:    addi a0, a0, 1
17214; CHECK-RV64-NEXT:    andi a2, a1, 8
17215; CHECK-RV64-NEXT:    bnez a2, .LBB61_840
17216; CHECK-RV64-NEXT:    j .LBB61_334
17217; CHECK-RV64-NEXT:  .LBB61_840: # %cond.load1289
17218; CHECK-RV64-NEXT:    lbu a2, 0(a0)
17219; CHECK-RV64-NEXT:    li a3, 512
17220; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
17221; CHECK-RV64-NEXT:    vmv.s.x v16, a2
17222; CHECK-RV64-NEXT:    li a2, 324
17223; CHECK-RV64-NEXT:    li a3, 323
17224; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
17225; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
17226; CHECK-RV64-NEXT:    addi a0, a0, 1
17227; CHECK-RV64-NEXT:    andi a2, a1, 16
17228; CHECK-RV64-NEXT:    bnez a2, .LBB61_841
17229; CHECK-RV64-NEXT:    j .LBB61_335
17230; CHECK-RV64-NEXT:  .LBB61_841: # %cond.load1293
17231; CHECK-RV64-NEXT:    lbu a2, 0(a0)
17232; CHECK-RV64-NEXT:    li a3, 512
17233; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
17234; CHECK-RV64-NEXT:    vmv.s.x v16, a2
17235; CHECK-RV64-NEXT:    li a2, 325
17236; CHECK-RV64-NEXT:    li a3, 324
17237; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
17238; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
17239; CHECK-RV64-NEXT:    addi a0, a0, 1
17240; CHECK-RV64-NEXT:    andi a2, a1, 32
17241; CHECK-RV64-NEXT:    bnez a2, .LBB61_842
17242; CHECK-RV64-NEXT:    j .LBB61_336
17243; CHECK-RV64-NEXT:  .LBB61_842: # %cond.load1297
17244; CHECK-RV64-NEXT:    lbu a2, 0(a0)
17245; CHECK-RV64-NEXT:    li a3, 512
17246; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
17247; CHECK-RV64-NEXT:    vmv.s.x v16, a2
17248; CHECK-RV64-NEXT:    li a2, 326
17249; CHECK-RV64-NEXT:    li a3, 325
17250; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
17251; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
17252; CHECK-RV64-NEXT:    addi a0, a0, 1
17253; CHECK-RV64-NEXT:    andi a2, a1, 64
17254; CHECK-RV64-NEXT:    bnez a2, .LBB61_843
17255; CHECK-RV64-NEXT:    j .LBB61_337
17256; CHECK-RV64-NEXT:  .LBB61_843: # %cond.load1301
17257; CHECK-RV64-NEXT:    lbu a2, 0(a0)
17258; CHECK-RV64-NEXT:    li a3, 512
17259; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
17260; CHECK-RV64-NEXT:    vmv.s.x v16, a2
17261; CHECK-RV64-NEXT:    li a2, 327
17262; CHECK-RV64-NEXT:    li a3, 326
17263; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
17264; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
17265; CHECK-RV64-NEXT:    addi a0, a0, 1
17266; CHECK-RV64-NEXT:    andi a2, a1, 128
17267; CHECK-RV64-NEXT:    bnez a2, .LBB61_844
17268; CHECK-RV64-NEXT:    j .LBB61_338
17269; CHECK-RV64-NEXT:  .LBB61_844: # %cond.load1305
17270; CHECK-RV64-NEXT:    lbu a2, 0(a0)
17271; CHECK-RV64-NEXT:    li a3, 512
17272; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
17273; CHECK-RV64-NEXT:    vmv.s.x v16, a2
17274; CHECK-RV64-NEXT:    li a2, 328
17275; CHECK-RV64-NEXT:    li a3, 327
17276; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
17277; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
17278; CHECK-RV64-NEXT:    addi a0, a0, 1
17279; CHECK-RV64-NEXT:    andi a2, a1, 256
17280; CHECK-RV64-NEXT:    bnez a2, .LBB61_845
17281; CHECK-RV64-NEXT:    j .LBB61_339
17282; CHECK-RV64-NEXT:  .LBB61_845: # %cond.load1309
17283; CHECK-RV64-NEXT:    lbu a2, 0(a0)
17284; CHECK-RV64-NEXT:    li a3, 512
17285; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
17286; CHECK-RV64-NEXT:    vmv.s.x v16, a2
17287; CHECK-RV64-NEXT:    li a2, 329
17288; CHECK-RV64-NEXT:    li a3, 328
17289; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
17290; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
17291; CHECK-RV64-NEXT:    addi a0, a0, 1
17292; CHECK-RV64-NEXT:    andi a2, a1, 512
17293; CHECK-RV64-NEXT:    bnez a2, .LBB61_846
17294; CHECK-RV64-NEXT:    j .LBB61_340
17295; CHECK-RV64-NEXT:  .LBB61_846: # %cond.load1313
17296; CHECK-RV64-NEXT:    lbu a2, 0(a0)
17297; CHECK-RV64-NEXT:    li a3, 512
17298; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
17299; CHECK-RV64-NEXT:    vmv.s.x v16, a2
17300; CHECK-RV64-NEXT:    li a2, 330
17301; CHECK-RV64-NEXT:    li a3, 329
17302; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
17303; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
17304; CHECK-RV64-NEXT:    addi a0, a0, 1
17305; CHECK-RV64-NEXT:    andi a2, a1, 1024
17306; CHECK-RV64-NEXT:    bnez a2, .LBB61_847
17307; CHECK-RV64-NEXT:    j .LBB61_341
17308; CHECK-RV64-NEXT:  .LBB61_847: # %cond.load1317
17309; CHECK-RV64-NEXT:    lbu a2, 0(a0)
17310; CHECK-RV64-NEXT:    li a3, 512
17311; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
17312; CHECK-RV64-NEXT:    vmv.s.x v16, a2
17313; CHECK-RV64-NEXT:    li a2, 331
17314; CHECK-RV64-NEXT:    li a3, 330
17315; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
17316; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
17317; CHECK-RV64-NEXT:    addi a0, a0, 1
17318; CHECK-RV64-NEXT:    slli a2, a1, 52
17319; CHECK-RV64-NEXT:    bltz a2, .LBB61_848
17320; CHECK-RV64-NEXT:    j .LBB61_342
17321; CHECK-RV64-NEXT:  .LBB61_848: # %cond.load1321
17322; CHECK-RV64-NEXT:    lbu a2, 0(a0)
17323; CHECK-RV64-NEXT:    li a3, 512
17324; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
17325; CHECK-RV64-NEXT:    vmv.s.x v16, a2
17326; CHECK-RV64-NEXT:    li a2, 332
17327; CHECK-RV64-NEXT:    li a3, 331
17328; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
17329; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
17330; CHECK-RV64-NEXT:    addi a0, a0, 1
17331; CHECK-RV64-NEXT:    slli a2, a1, 51
17332; CHECK-RV64-NEXT:    bltz a2, .LBB61_849
17333; CHECK-RV64-NEXT:    j .LBB61_343
17334; CHECK-RV64-NEXT:  .LBB61_849: # %cond.load1325
17335; CHECK-RV64-NEXT:    lbu a2, 0(a0)
17336; CHECK-RV64-NEXT:    li a3, 512
17337; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
17338; CHECK-RV64-NEXT:    vmv.s.x v16, a2
17339; CHECK-RV64-NEXT:    li a2, 333
17340; CHECK-RV64-NEXT:    li a3, 332
17341; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
17342; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
17343; CHECK-RV64-NEXT:    addi a0, a0, 1
17344; CHECK-RV64-NEXT:    slli a2, a1, 50
17345; CHECK-RV64-NEXT:    bltz a2, .LBB61_850
17346; CHECK-RV64-NEXT:    j .LBB61_344
17347; CHECK-RV64-NEXT:  .LBB61_850: # %cond.load1329
17348; CHECK-RV64-NEXT:    lbu a2, 0(a0)
17349; CHECK-RV64-NEXT:    li a3, 512
17350; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
17351; CHECK-RV64-NEXT:    vmv.s.x v16, a2
17352; CHECK-RV64-NEXT:    li a2, 334
17353; CHECK-RV64-NEXT:    li a3, 333
17354; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
17355; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
17356; CHECK-RV64-NEXT:    addi a0, a0, 1
17357; CHECK-RV64-NEXT:    slli a2, a1, 49
17358; CHECK-RV64-NEXT:    bltz a2, .LBB61_851
17359; CHECK-RV64-NEXT:    j .LBB61_345
17360; CHECK-RV64-NEXT:  .LBB61_851: # %cond.load1333
17361; CHECK-RV64-NEXT:    lbu a2, 0(a0)
17362; CHECK-RV64-NEXT:    li a3, 512
17363; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
17364; CHECK-RV64-NEXT:    vmv.s.x v16, a2
17365; CHECK-RV64-NEXT:    li a2, 335
17366; CHECK-RV64-NEXT:    li a3, 334
17367; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
17368; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
17369; CHECK-RV64-NEXT:    addi a0, a0, 1
17370; CHECK-RV64-NEXT:    slli a2, a1, 48
17371; CHECK-RV64-NEXT:    bltz a2, .LBB61_852
17372; CHECK-RV64-NEXT:    j .LBB61_346
17373; CHECK-RV64-NEXT:  .LBB61_852: # %cond.load1337
17374; CHECK-RV64-NEXT:    lbu a2, 0(a0)
17375; CHECK-RV64-NEXT:    li a3, 512
17376; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
17377; CHECK-RV64-NEXT:    vmv.s.x v16, a2
17378; CHECK-RV64-NEXT:    li a2, 336
17379; CHECK-RV64-NEXT:    li a3, 335
17380; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
17381; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
17382; CHECK-RV64-NEXT:    addi a0, a0, 1
17383; CHECK-RV64-NEXT:    slli a2, a1, 47
17384; CHECK-RV64-NEXT:    bltz a2, .LBB61_853
17385; CHECK-RV64-NEXT:    j .LBB61_347
17386; CHECK-RV64-NEXT:  .LBB61_853: # %cond.load1341
17387; CHECK-RV64-NEXT:    lbu a2, 0(a0)
17388; CHECK-RV64-NEXT:    li a3, 512
17389; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
17390; CHECK-RV64-NEXT:    vmv.s.x v16, a2
17391; CHECK-RV64-NEXT:    li a2, 337
17392; CHECK-RV64-NEXT:    li a3, 336
17393; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
17394; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
17395; CHECK-RV64-NEXT:    addi a0, a0, 1
17396; CHECK-RV64-NEXT:    slli a2, a1, 46
17397; CHECK-RV64-NEXT:    bltz a2, .LBB61_854
17398; CHECK-RV64-NEXT:    j .LBB61_348
17399; CHECK-RV64-NEXT:  .LBB61_854: # %cond.load1345
17400; CHECK-RV64-NEXT:    lbu a2, 0(a0)
17401; CHECK-RV64-NEXT:    li a3, 512
17402; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
17403; CHECK-RV64-NEXT:    vmv.s.x v16, a2
17404; CHECK-RV64-NEXT:    li a2, 338
17405; CHECK-RV64-NEXT:    li a3, 337
17406; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
17407; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
17408; CHECK-RV64-NEXT:    addi a0, a0, 1
17409; CHECK-RV64-NEXT:    slli a2, a1, 45
17410; CHECK-RV64-NEXT:    bltz a2, .LBB61_855
17411; CHECK-RV64-NEXT:    j .LBB61_349
17412; CHECK-RV64-NEXT:  .LBB61_855: # %cond.load1349
17413; CHECK-RV64-NEXT:    lbu a2, 0(a0)
17414; CHECK-RV64-NEXT:    li a3, 512
17415; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
17416; CHECK-RV64-NEXT:    vmv.s.x v16, a2
17417; CHECK-RV64-NEXT:    li a2, 339
17418; CHECK-RV64-NEXT:    li a3, 338
17419; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
17420; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
17421; CHECK-RV64-NEXT:    addi a0, a0, 1
17422; CHECK-RV64-NEXT:    slli a2, a1, 44
17423; CHECK-RV64-NEXT:    bltz a2, .LBB61_856
17424; CHECK-RV64-NEXT:    j .LBB61_350
17425; CHECK-RV64-NEXT:  .LBB61_856: # %cond.load1353
17426; CHECK-RV64-NEXT:    lbu a2, 0(a0)
17427; CHECK-RV64-NEXT:    li a3, 512
17428; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
17429; CHECK-RV64-NEXT:    vmv.s.x v16, a2
17430; CHECK-RV64-NEXT:    li a2, 340
17431; CHECK-RV64-NEXT:    li a3, 339
17432; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
17433; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
17434; CHECK-RV64-NEXT:    addi a0, a0, 1
17435; CHECK-RV64-NEXT:    slli a2, a1, 43
17436; CHECK-RV64-NEXT:    bltz a2, .LBB61_857
17437; CHECK-RV64-NEXT:    j .LBB61_351
17438; CHECK-RV64-NEXT:  .LBB61_857: # %cond.load1357
17439; CHECK-RV64-NEXT:    lbu a2, 0(a0)
17440; CHECK-RV64-NEXT:    li a3, 512
17441; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
17442; CHECK-RV64-NEXT:    vmv.s.x v16, a2
17443; CHECK-RV64-NEXT:    li a2, 341
17444; CHECK-RV64-NEXT:    li a3, 340
17445; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
17446; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
17447; CHECK-RV64-NEXT:    addi a0, a0, 1
17448; CHECK-RV64-NEXT:    slli a2, a1, 42
17449; CHECK-RV64-NEXT:    bltz a2, .LBB61_858
17450; CHECK-RV64-NEXT:    j .LBB61_352
17451; CHECK-RV64-NEXT:  .LBB61_858: # %cond.load1361
17452; CHECK-RV64-NEXT:    lbu a2, 0(a0)
17453; CHECK-RV64-NEXT:    li a3, 512
17454; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
17455; CHECK-RV64-NEXT:    vmv.s.x v16, a2
17456; CHECK-RV64-NEXT:    li a2, 342
17457; CHECK-RV64-NEXT:    li a3, 341
17458; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
17459; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
17460; CHECK-RV64-NEXT:    addi a0, a0, 1
17461; CHECK-RV64-NEXT:    slli a2, a1, 41
17462; CHECK-RV64-NEXT:    bltz a2, .LBB61_859
17463; CHECK-RV64-NEXT:    j .LBB61_353
17464; CHECK-RV64-NEXT:  .LBB61_859: # %cond.load1365
17465; CHECK-RV64-NEXT:    lbu a2, 0(a0)
17466; CHECK-RV64-NEXT:    li a3, 512
17467; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
17468; CHECK-RV64-NEXT:    vmv.s.x v16, a2
17469; CHECK-RV64-NEXT:    li a2, 343
17470; CHECK-RV64-NEXT:    li a3, 342
17471; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
17472; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
17473; CHECK-RV64-NEXT:    addi a0, a0, 1
17474; CHECK-RV64-NEXT:    slli a2, a1, 40
17475; CHECK-RV64-NEXT:    bltz a2, .LBB61_860
17476; CHECK-RV64-NEXT:    j .LBB61_354
17477; CHECK-RV64-NEXT:  .LBB61_860: # %cond.load1369
17478; CHECK-RV64-NEXT:    lbu a2, 0(a0)
17479; CHECK-RV64-NEXT:    li a3, 512
17480; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
17481; CHECK-RV64-NEXT:    vmv.s.x v16, a2
17482; CHECK-RV64-NEXT:    li a2, 344
17483; CHECK-RV64-NEXT:    li a3, 343
17484; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
17485; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
17486; CHECK-RV64-NEXT:    addi a0, a0, 1
17487; CHECK-RV64-NEXT:    slli a2, a1, 39
17488; CHECK-RV64-NEXT:    bltz a2, .LBB61_861
17489; CHECK-RV64-NEXT:    j .LBB61_355
17490; CHECK-RV64-NEXT:  .LBB61_861: # %cond.load1373
17491; CHECK-RV64-NEXT:    lbu a2, 0(a0)
17492; CHECK-RV64-NEXT:    li a3, 512
17493; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
17494; CHECK-RV64-NEXT:    vmv.s.x v16, a2
17495; CHECK-RV64-NEXT:    li a2, 345
17496; CHECK-RV64-NEXT:    li a3, 344
17497; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
17498; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
17499; CHECK-RV64-NEXT:    addi a0, a0, 1
17500; CHECK-RV64-NEXT:    slli a2, a1, 38
17501; CHECK-RV64-NEXT:    bltz a2, .LBB61_862
17502; CHECK-RV64-NEXT:    j .LBB61_356
17503; CHECK-RV64-NEXT:  .LBB61_862: # %cond.load1377
17504; CHECK-RV64-NEXT:    lbu a2, 0(a0)
17505; CHECK-RV64-NEXT:    li a3, 512
17506; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
17507; CHECK-RV64-NEXT:    vmv.s.x v16, a2
17508; CHECK-RV64-NEXT:    li a2, 346
17509; CHECK-RV64-NEXT:    li a3, 345
17510; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
17511; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
17512; CHECK-RV64-NEXT:    addi a0, a0, 1
17513; CHECK-RV64-NEXT:    slli a2, a1, 37
17514; CHECK-RV64-NEXT:    bltz a2, .LBB61_863
17515; CHECK-RV64-NEXT:    j .LBB61_357
17516; CHECK-RV64-NEXT:  .LBB61_863: # %cond.load1381
17517; CHECK-RV64-NEXT:    lbu a2, 0(a0)
17518; CHECK-RV64-NEXT:    li a3, 512
17519; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
17520; CHECK-RV64-NEXT:    vmv.s.x v16, a2
17521; CHECK-RV64-NEXT:    li a2, 347
17522; CHECK-RV64-NEXT:    li a3, 346
17523; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
17524; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
17525; CHECK-RV64-NEXT:    addi a0, a0, 1
17526; CHECK-RV64-NEXT:    slli a2, a1, 36
17527; CHECK-RV64-NEXT:    bltz a2, .LBB61_864
17528; CHECK-RV64-NEXT:    j .LBB61_358
17529; CHECK-RV64-NEXT:  .LBB61_864: # %cond.load1385
17530; CHECK-RV64-NEXT:    lbu a2, 0(a0)
17531; CHECK-RV64-NEXT:    li a3, 512
17532; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
17533; CHECK-RV64-NEXT:    vmv.s.x v16, a2
17534; CHECK-RV64-NEXT:    li a2, 348
17535; CHECK-RV64-NEXT:    li a3, 347
17536; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
17537; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
17538; CHECK-RV64-NEXT:    addi a0, a0, 1
17539; CHECK-RV64-NEXT:    slli a2, a1, 35
17540; CHECK-RV64-NEXT:    bltz a2, .LBB61_865
17541; CHECK-RV64-NEXT:    j .LBB61_359
17542; CHECK-RV64-NEXT:  .LBB61_865: # %cond.load1389
17543; CHECK-RV64-NEXT:    lbu a2, 0(a0)
17544; CHECK-RV64-NEXT:    li a3, 512
17545; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
17546; CHECK-RV64-NEXT:    vmv.s.x v16, a2
17547; CHECK-RV64-NEXT:    li a2, 349
17548; CHECK-RV64-NEXT:    li a3, 348
17549; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
17550; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
17551; CHECK-RV64-NEXT:    addi a0, a0, 1
17552; CHECK-RV64-NEXT:    slli a2, a1, 34
17553; CHECK-RV64-NEXT:    bltz a2, .LBB61_866
17554; CHECK-RV64-NEXT:    j .LBB61_360
17555; CHECK-RV64-NEXT:  .LBB61_866: # %cond.load1393
17556; CHECK-RV64-NEXT:    lbu a2, 0(a0)
17557; CHECK-RV64-NEXT:    li a3, 512
17558; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
17559; CHECK-RV64-NEXT:    vmv.s.x v16, a2
17560; CHECK-RV64-NEXT:    li a2, 350
17561; CHECK-RV64-NEXT:    li a3, 349
17562; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
17563; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
17564; CHECK-RV64-NEXT:    addi a0, a0, 1
17565; CHECK-RV64-NEXT:    slli a2, a1, 33
17566; CHECK-RV64-NEXT:    bltz a2, .LBB61_867
17567; CHECK-RV64-NEXT:    j .LBB61_361
17568; CHECK-RV64-NEXT:  .LBB61_867: # %cond.load1397
17569; CHECK-RV64-NEXT:    lbu a2, 0(a0)
17570; CHECK-RV64-NEXT:    li a3, 512
17571; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
17572; CHECK-RV64-NEXT:    vmv.s.x v16, a2
17573; CHECK-RV64-NEXT:    li a2, 351
17574; CHECK-RV64-NEXT:    li a3, 350
17575; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
17576; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
17577; CHECK-RV64-NEXT:    addi a0, a0, 1
17578; CHECK-RV64-NEXT:    slli a2, a1, 32
17579; CHECK-RV64-NEXT:    bltz a2, .LBB61_868
17580; CHECK-RV64-NEXT:    j .LBB61_362
17581; CHECK-RV64-NEXT:  .LBB61_868: # %cond.load1401
17582; CHECK-RV64-NEXT:    lbu a2, 0(a0)
17583; CHECK-RV64-NEXT:    li a3, 512
17584; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
17585; CHECK-RV64-NEXT:    vmv.s.x v16, a2
17586; CHECK-RV64-NEXT:    li a2, 352
17587; CHECK-RV64-NEXT:    li a3, 351
17588; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
17589; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
17590; CHECK-RV64-NEXT:    addi a0, a0, 1
17591; CHECK-RV64-NEXT:    slli a2, a1, 31
17592; CHECK-RV64-NEXT:    bltz a2, .LBB61_869
17593; CHECK-RV64-NEXT:    j .LBB61_363
17594; CHECK-RV64-NEXT:  .LBB61_869: # %cond.load1405
17595; CHECK-RV64-NEXT:    lbu a2, 0(a0)
17596; CHECK-RV64-NEXT:    li a3, 512
17597; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
17598; CHECK-RV64-NEXT:    vmv.s.x v16, a2
17599; CHECK-RV64-NEXT:    li a2, 353
17600; CHECK-RV64-NEXT:    li a3, 352
17601; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
17602; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
17603; CHECK-RV64-NEXT:    addi a0, a0, 1
17604; CHECK-RV64-NEXT:    slli a2, a1, 30
17605; CHECK-RV64-NEXT:    bltz a2, .LBB61_870
17606; CHECK-RV64-NEXT:    j .LBB61_364
17607; CHECK-RV64-NEXT:  .LBB61_870: # %cond.load1409
17608; CHECK-RV64-NEXT:    lbu a2, 0(a0)
17609; CHECK-RV64-NEXT:    li a3, 512
17610; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
17611; CHECK-RV64-NEXT:    vmv.s.x v16, a2
17612; CHECK-RV64-NEXT:    li a2, 354
17613; CHECK-RV64-NEXT:    li a3, 353
17614; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
17615; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
17616; CHECK-RV64-NEXT:    addi a0, a0, 1
17617; CHECK-RV64-NEXT:    slli a2, a1, 29
17618; CHECK-RV64-NEXT:    bltz a2, .LBB61_871
17619; CHECK-RV64-NEXT:    j .LBB61_365
17620; CHECK-RV64-NEXT:  .LBB61_871: # %cond.load1413
17621; CHECK-RV64-NEXT:    lbu a2, 0(a0)
17622; CHECK-RV64-NEXT:    li a3, 512
17623; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
17624; CHECK-RV64-NEXT:    vmv.s.x v16, a2
17625; CHECK-RV64-NEXT:    li a2, 355
17626; CHECK-RV64-NEXT:    li a3, 354
17627; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
17628; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
17629; CHECK-RV64-NEXT:    addi a0, a0, 1
17630; CHECK-RV64-NEXT:    slli a2, a1, 28
17631; CHECK-RV64-NEXT:    bltz a2, .LBB61_872
17632; CHECK-RV64-NEXT:    j .LBB61_366
17633; CHECK-RV64-NEXT:  .LBB61_872: # %cond.load1417
17634; CHECK-RV64-NEXT:    lbu a2, 0(a0)
17635; CHECK-RV64-NEXT:    li a3, 512
17636; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
17637; CHECK-RV64-NEXT:    vmv.s.x v16, a2
17638; CHECK-RV64-NEXT:    li a2, 356
17639; CHECK-RV64-NEXT:    li a3, 355
17640; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
17641; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
17642; CHECK-RV64-NEXT:    addi a0, a0, 1
17643; CHECK-RV64-NEXT:    slli a2, a1, 27
17644; CHECK-RV64-NEXT:    bltz a2, .LBB61_873
17645; CHECK-RV64-NEXT:    j .LBB61_367
17646; CHECK-RV64-NEXT:  .LBB61_873: # %cond.load1421
17647; CHECK-RV64-NEXT:    lbu a2, 0(a0)
17648; CHECK-RV64-NEXT:    li a3, 512
17649; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
17650; CHECK-RV64-NEXT:    vmv.s.x v16, a2
17651; CHECK-RV64-NEXT:    li a2, 357
17652; CHECK-RV64-NEXT:    li a3, 356
17653; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
17654; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
17655; CHECK-RV64-NEXT:    addi a0, a0, 1
17656; CHECK-RV64-NEXT:    slli a2, a1, 26
17657; CHECK-RV64-NEXT:    bltz a2, .LBB61_874
17658; CHECK-RV64-NEXT:    j .LBB61_368
17659; CHECK-RV64-NEXT:  .LBB61_874: # %cond.load1425
17660; CHECK-RV64-NEXT:    lbu a2, 0(a0)
17661; CHECK-RV64-NEXT:    li a3, 512
17662; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
17663; CHECK-RV64-NEXT:    vmv.s.x v16, a2
17664; CHECK-RV64-NEXT:    li a2, 358
17665; CHECK-RV64-NEXT:    li a3, 357
17666; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
17667; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
17668; CHECK-RV64-NEXT:    addi a0, a0, 1
17669; CHECK-RV64-NEXT:    slli a2, a1, 25
17670; CHECK-RV64-NEXT:    bltz a2, .LBB61_875
17671; CHECK-RV64-NEXT:    j .LBB61_369
17672; CHECK-RV64-NEXT:  .LBB61_875: # %cond.load1429
17673; CHECK-RV64-NEXT:    lbu a2, 0(a0)
17674; CHECK-RV64-NEXT:    li a3, 512
17675; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
17676; CHECK-RV64-NEXT:    vmv.s.x v16, a2
17677; CHECK-RV64-NEXT:    li a2, 359
17678; CHECK-RV64-NEXT:    li a3, 358
17679; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
17680; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
17681; CHECK-RV64-NEXT:    addi a0, a0, 1
17682; CHECK-RV64-NEXT:    slli a2, a1, 24
17683; CHECK-RV64-NEXT:    bltz a2, .LBB61_876
17684; CHECK-RV64-NEXT:    j .LBB61_370
17685; CHECK-RV64-NEXT:  .LBB61_876: # %cond.load1433
17686; CHECK-RV64-NEXT:    lbu a2, 0(a0)
17687; CHECK-RV64-NEXT:    li a3, 512
17688; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
17689; CHECK-RV64-NEXT:    vmv.s.x v16, a2
17690; CHECK-RV64-NEXT:    li a2, 360
17691; CHECK-RV64-NEXT:    li a3, 359
17692; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
17693; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
17694; CHECK-RV64-NEXT:    addi a0, a0, 1
17695; CHECK-RV64-NEXT:    slli a2, a1, 23
17696; CHECK-RV64-NEXT:    bltz a2, .LBB61_877
17697; CHECK-RV64-NEXT:    j .LBB61_371
17698; CHECK-RV64-NEXT:  .LBB61_877: # %cond.load1437
17699; CHECK-RV64-NEXT:    lbu a2, 0(a0)
17700; CHECK-RV64-NEXT:    li a3, 512
17701; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
17702; CHECK-RV64-NEXT:    vmv.s.x v16, a2
17703; CHECK-RV64-NEXT:    li a2, 361
17704; CHECK-RV64-NEXT:    li a3, 360
17705; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
17706; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
17707; CHECK-RV64-NEXT:    addi a0, a0, 1
17708; CHECK-RV64-NEXT:    slli a2, a1, 22
17709; CHECK-RV64-NEXT:    bltz a2, .LBB61_878
17710; CHECK-RV64-NEXT:    j .LBB61_372
17711; CHECK-RV64-NEXT:  .LBB61_878: # %cond.load1441
17712; CHECK-RV64-NEXT:    lbu a2, 0(a0)
17713; CHECK-RV64-NEXT:    li a3, 512
17714; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
17715; CHECK-RV64-NEXT:    vmv.s.x v16, a2
17716; CHECK-RV64-NEXT:    li a2, 362
17717; CHECK-RV64-NEXT:    li a3, 361
17718; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
17719; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
17720; CHECK-RV64-NEXT:    addi a0, a0, 1
17721; CHECK-RV64-NEXT:    slli a2, a1, 21
17722; CHECK-RV64-NEXT:    bltz a2, .LBB61_879
17723; CHECK-RV64-NEXT:    j .LBB61_373
17724; CHECK-RV64-NEXT:  .LBB61_879: # %cond.load1445
17725; CHECK-RV64-NEXT:    lbu a2, 0(a0)
17726; CHECK-RV64-NEXT:    li a3, 512
17727; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
17728; CHECK-RV64-NEXT:    vmv.s.x v16, a2
17729; CHECK-RV64-NEXT:    li a2, 363
17730; CHECK-RV64-NEXT:    li a3, 362
17731; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
17732; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
17733; CHECK-RV64-NEXT:    addi a0, a0, 1
17734; CHECK-RV64-NEXT:    slli a2, a1, 20
17735; CHECK-RV64-NEXT:    bltz a2, .LBB61_880
17736; CHECK-RV64-NEXT:    j .LBB61_374
17737; CHECK-RV64-NEXT:  .LBB61_880: # %cond.load1449
17738; CHECK-RV64-NEXT:    lbu a2, 0(a0)
17739; CHECK-RV64-NEXT:    li a3, 512
17740; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
17741; CHECK-RV64-NEXT:    vmv.s.x v16, a2
17742; CHECK-RV64-NEXT:    li a2, 364
17743; CHECK-RV64-NEXT:    li a3, 363
17744; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
17745; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
17746; CHECK-RV64-NEXT:    addi a0, a0, 1
17747; CHECK-RV64-NEXT:    slli a2, a1, 19
17748; CHECK-RV64-NEXT:    bltz a2, .LBB61_881
17749; CHECK-RV64-NEXT:    j .LBB61_375
17750; CHECK-RV64-NEXT:  .LBB61_881: # %cond.load1453
17751; CHECK-RV64-NEXT:    lbu a2, 0(a0)
17752; CHECK-RV64-NEXT:    li a3, 512
17753; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
17754; CHECK-RV64-NEXT:    vmv.s.x v16, a2
17755; CHECK-RV64-NEXT:    li a2, 365
17756; CHECK-RV64-NEXT:    li a3, 364
17757; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
17758; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
17759; CHECK-RV64-NEXT:    addi a0, a0, 1
17760; CHECK-RV64-NEXT:    slli a2, a1, 18
17761; CHECK-RV64-NEXT:    bltz a2, .LBB61_882
17762; CHECK-RV64-NEXT:    j .LBB61_376
17763; CHECK-RV64-NEXT:  .LBB61_882: # %cond.load1457
17764; CHECK-RV64-NEXT:    lbu a2, 0(a0)
17765; CHECK-RV64-NEXT:    li a3, 512
17766; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
17767; CHECK-RV64-NEXT:    vmv.s.x v16, a2
17768; CHECK-RV64-NEXT:    li a2, 366
17769; CHECK-RV64-NEXT:    li a3, 365
17770; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
17771; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
17772; CHECK-RV64-NEXT:    addi a0, a0, 1
17773; CHECK-RV64-NEXT:    slli a2, a1, 17
17774; CHECK-RV64-NEXT:    bltz a2, .LBB61_883
17775; CHECK-RV64-NEXT:    j .LBB61_377
17776; CHECK-RV64-NEXT:  .LBB61_883: # %cond.load1461
17777; CHECK-RV64-NEXT:    lbu a2, 0(a0)
17778; CHECK-RV64-NEXT:    li a3, 512
17779; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
17780; CHECK-RV64-NEXT:    vmv.s.x v16, a2
17781; CHECK-RV64-NEXT:    li a2, 367
17782; CHECK-RV64-NEXT:    li a3, 366
17783; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
17784; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
17785; CHECK-RV64-NEXT:    addi a0, a0, 1
17786; CHECK-RV64-NEXT:    slli a2, a1, 16
17787; CHECK-RV64-NEXT:    bltz a2, .LBB61_884
17788; CHECK-RV64-NEXT:    j .LBB61_378
17789; CHECK-RV64-NEXT:  .LBB61_884: # %cond.load1465
17790; CHECK-RV64-NEXT:    lbu a2, 0(a0)
17791; CHECK-RV64-NEXT:    li a3, 512
17792; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
17793; CHECK-RV64-NEXT:    vmv.s.x v16, a2
17794; CHECK-RV64-NEXT:    li a2, 368
17795; CHECK-RV64-NEXT:    li a3, 367
17796; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
17797; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
17798; CHECK-RV64-NEXT:    addi a0, a0, 1
17799; CHECK-RV64-NEXT:    slli a2, a1, 15
17800; CHECK-RV64-NEXT:    bltz a2, .LBB61_885
17801; CHECK-RV64-NEXT:    j .LBB61_379
17802; CHECK-RV64-NEXT:  .LBB61_885: # %cond.load1469
17803; CHECK-RV64-NEXT:    lbu a2, 0(a0)
17804; CHECK-RV64-NEXT:    li a3, 512
17805; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
17806; CHECK-RV64-NEXT:    vmv.s.x v16, a2
17807; CHECK-RV64-NEXT:    li a2, 369
17808; CHECK-RV64-NEXT:    li a3, 368
17809; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
17810; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
17811; CHECK-RV64-NEXT:    addi a0, a0, 1
17812; CHECK-RV64-NEXT:    slli a2, a1, 14
17813; CHECK-RV64-NEXT:    bltz a2, .LBB61_886
17814; CHECK-RV64-NEXT:    j .LBB61_380
17815; CHECK-RV64-NEXT:  .LBB61_886: # %cond.load1473
17816; CHECK-RV64-NEXT:    lbu a2, 0(a0)
17817; CHECK-RV64-NEXT:    li a3, 512
17818; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
17819; CHECK-RV64-NEXT:    vmv.s.x v16, a2
17820; CHECK-RV64-NEXT:    li a2, 370
17821; CHECK-RV64-NEXT:    li a3, 369
17822; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
17823; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
17824; CHECK-RV64-NEXT:    addi a0, a0, 1
17825; CHECK-RV64-NEXT:    slli a2, a1, 13
17826; CHECK-RV64-NEXT:    bltz a2, .LBB61_887
17827; CHECK-RV64-NEXT:    j .LBB61_381
17828; CHECK-RV64-NEXT:  .LBB61_887: # %cond.load1477
17829; CHECK-RV64-NEXT:    lbu a2, 0(a0)
17830; CHECK-RV64-NEXT:    li a3, 512
17831; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
17832; CHECK-RV64-NEXT:    vmv.s.x v16, a2
17833; CHECK-RV64-NEXT:    li a2, 371
17834; CHECK-RV64-NEXT:    li a3, 370
17835; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
17836; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
17837; CHECK-RV64-NEXT:    addi a0, a0, 1
17838; CHECK-RV64-NEXT:    slli a2, a1, 12
17839; CHECK-RV64-NEXT:    bltz a2, .LBB61_888
17840; CHECK-RV64-NEXT:    j .LBB61_382
17841; CHECK-RV64-NEXT:  .LBB61_888: # %cond.load1481
17842; CHECK-RV64-NEXT:    lbu a2, 0(a0)
17843; CHECK-RV64-NEXT:    li a3, 512
17844; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
17845; CHECK-RV64-NEXT:    vmv.s.x v16, a2
17846; CHECK-RV64-NEXT:    li a2, 372
17847; CHECK-RV64-NEXT:    li a3, 371
17848; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
17849; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
17850; CHECK-RV64-NEXT:    addi a0, a0, 1
17851; CHECK-RV64-NEXT:    slli a2, a1, 11
17852; CHECK-RV64-NEXT:    bltz a2, .LBB61_889
17853; CHECK-RV64-NEXT:    j .LBB61_383
17854; CHECK-RV64-NEXT:  .LBB61_889: # %cond.load1485
17855; CHECK-RV64-NEXT:    lbu a2, 0(a0)
17856; CHECK-RV64-NEXT:    li a3, 512
17857; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
17858; CHECK-RV64-NEXT:    vmv.s.x v16, a2
17859; CHECK-RV64-NEXT:    li a2, 373
17860; CHECK-RV64-NEXT:    li a3, 372
17861; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
17862; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
17863; CHECK-RV64-NEXT:    addi a0, a0, 1
17864; CHECK-RV64-NEXT:    slli a2, a1, 10
17865; CHECK-RV64-NEXT:    bltz a2, .LBB61_890
17866; CHECK-RV64-NEXT:    j .LBB61_384
17867; CHECK-RV64-NEXT:  .LBB61_890: # %cond.load1489
17868; CHECK-RV64-NEXT:    lbu a2, 0(a0)
17869; CHECK-RV64-NEXT:    li a3, 512
17870; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
17871; CHECK-RV64-NEXT:    vmv.s.x v16, a2
17872; CHECK-RV64-NEXT:    li a2, 374
17873; CHECK-RV64-NEXT:    li a3, 373
17874; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
17875; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
17876; CHECK-RV64-NEXT:    addi a0, a0, 1
17877; CHECK-RV64-NEXT:    slli a2, a1, 9
17878; CHECK-RV64-NEXT:    bltz a2, .LBB61_891
17879; CHECK-RV64-NEXT:    j .LBB61_385
17880; CHECK-RV64-NEXT:  .LBB61_891: # %cond.load1493
17881; CHECK-RV64-NEXT:    lbu a2, 0(a0)
17882; CHECK-RV64-NEXT:    li a3, 512
17883; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
17884; CHECK-RV64-NEXT:    vmv.s.x v16, a2
17885; CHECK-RV64-NEXT:    li a2, 375
17886; CHECK-RV64-NEXT:    li a3, 374
17887; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
17888; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
17889; CHECK-RV64-NEXT:    addi a0, a0, 1
17890; CHECK-RV64-NEXT:    slli a2, a1, 8
17891; CHECK-RV64-NEXT:    bltz a2, .LBB61_892
17892; CHECK-RV64-NEXT:    j .LBB61_386
17893; CHECK-RV64-NEXT:  .LBB61_892: # %cond.load1497
17894; CHECK-RV64-NEXT:    lbu a2, 0(a0)
17895; CHECK-RV64-NEXT:    li a3, 512
17896; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
17897; CHECK-RV64-NEXT:    vmv.s.x v16, a2
17898; CHECK-RV64-NEXT:    li a2, 376
17899; CHECK-RV64-NEXT:    li a3, 375
17900; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
17901; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
17902; CHECK-RV64-NEXT:    addi a0, a0, 1
17903; CHECK-RV64-NEXT:    slli a2, a1, 7
17904; CHECK-RV64-NEXT:    bltz a2, .LBB61_893
17905; CHECK-RV64-NEXT:    j .LBB61_387
17906; CHECK-RV64-NEXT:  .LBB61_893: # %cond.load1501
17907; CHECK-RV64-NEXT:    lbu a2, 0(a0)
17908; CHECK-RV64-NEXT:    li a3, 512
17909; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
17910; CHECK-RV64-NEXT:    vmv.s.x v16, a2
17911; CHECK-RV64-NEXT:    li a2, 377
17912; CHECK-RV64-NEXT:    li a3, 376
17913; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
17914; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
17915; CHECK-RV64-NEXT:    addi a0, a0, 1
17916; CHECK-RV64-NEXT:    slli a2, a1, 6
17917; CHECK-RV64-NEXT:    bltz a2, .LBB61_894
17918; CHECK-RV64-NEXT:    j .LBB61_388
17919; CHECK-RV64-NEXT:  .LBB61_894: # %cond.load1505
17920; CHECK-RV64-NEXT:    lbu a2, 0(a0)
17921; CHECK-RV64-NEXT:    li a3, 512
17922; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
17923; CHECK-RV64-NEXT:    vmv.s.x v16, a2
17924; CHECK-RV64-NEXT:    li a2, 378
17925; CHECK-RV64-NEXT:    li a3, 377
17926; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
17927; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
17928; CHECK-RV64-NEXT:    addi a0, a0, 1
17929; CHECK-RV64-NEXT:    slli a2, a1, 5
17930; CHECK-RV64-NEXT:    bltz a2, .LBB61_895
17931; CHECK-RV64-NEXT:    j .LBB61_389
17932; CHECK-RV64-NEXT:  .LBB61_895: # %cond.load1509
17933; CHECK-RV64-NEXT:    lbu a2, 0(a0)
17934; CHECK-RV64-NEXT:    li a3, 512
17935; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
17936; CHECK-RV64-NEXT:    vmv.s.x v16, a2
17937; CHECK-RV64-NEXT:    li a2, 379
17938; CHECK-RV64-NEXT:    li a3, 378
17939; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
17940; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
17941; CHECK-RV64-NEXT:    addi a0, a0, 1
17942; CHECK-RV64-NEXT:    slli a2, a1, 4
17943; CHECK-RV64-NEXT:    bltz a2, .LBB61_896
17944; CHECK-RV64-NEXT:    j .LBB61_390
17945; CHECK-RV64-NEXT:  .LBB61_896: # %cond.load1513
17946; CHECK-RV64-NEXT:    lbu a2, 0(a0)
17947; CHECK-RV64-NEXT:    li a3, 512
17948; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
17949; CHECK-RV64-NEXT:    vmv.s.x v16, a2
17950; CHECK-RV64-NEXT:    li a2, 380
17951; CHECK-RV64-NEXT:    li a3, 379
17952; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
17953; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
17954; CHECK-RV64-NEXT:    addi a0, a0, 1
17955; CHECK-RV64-NEXT:    slli a2, a1, 3
17956; CHECK-RV64-NEXT:    bltz a2, .LBB61_897
17957; CHECK-RV64-NEXT:    j .LBB61_391
17958; CHECK-RV64-NEXT:  .LBB61_897: # %cond.load1517
17959; CHECK-RV64-NEXT:    lbu a2, 0(a0)
17960; CHECK-RV64-NEXT:    li a3, 512
17961; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
17962; CHECK-RV64-NEXT:    vmv.s.x v16, a2
17963; CHECK-RV64-NEXT:    li a2, 381
17964; CHECK-RV64-NEXT:    li a3, 380
17965; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
17966; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
17967; CHECK-RV64-NEXT:    addi a0, a0, 1
17968; CHECK-RV64-NEXT:    slli a2, a1, 2
17969; CHECK-RV64-NEXT:    bgez a2, .LBB61_1030
17970; CHECK-RV64-NEXT:    j .LBB61_392
17971; CHECK-RV64-NEXT:  .LBB61_1030: # %cond.load1517
17972; CHECK-RV64-NEXT:    j .LBB61_393
17973; CHECK-RV64-NEXT:  .LBB61_898: # %cond.load1529
17974; CHECK-RV64-NEXT:    lbu a1, 0(a0)
17975; CHECK-RV64-NEXT:    vmv.s.x v16, a1
17976; CHECK-RV64-NEXT:    li a1, 384
17977; CHECK-RV64-NEXT:    li a3, 383
17978; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
17979; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
17980; CHECK-RV64-NEXT:    addi a0, a0, 1
17981; CHECK-RV64-NEXT:    andi a1, a2, 1
17982; CHECK-RV64-NEXT:    bnez a1, .LBB61_899
17983; CHECK-RV64-NEXT:    j .LBB61_397
17984; CHECK-RV64-NEXT:  .LBB61_899: # %cond.load1533
17985; CHECK-RV64-NEXT:    lbu a1, 0(a0)
17986; CHECK-RV64-NEXT:    li a3, 512
17987; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
17988; CHECK-RV64-NEXT:    vmv.s.x v16, a1
17989; CHECK-RV64-NEXT:    li a1, 385
17990; CHECK-RV64-NEXT:    li a3, 384
17991; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
17992; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
17993; CHECK-RV64-NEXT:    addi a0, a0, 1
17994; CHECK-RV64-NEXT:    andi a1, a2, 2
17995; CHECK-RV64-NEXT:    bnez a1, .LBB61_900
17996; CHECK-RV64-NEXT:    j .LBB61_398
17997; CHECK-RV64-NEXT:  .LBB61_900: # %cond.load1537
17998; CHECK-RV64-NEXT:    lbu a1, 0(a0)
17999; CHECK-RV64-NEXT:    li a3, 512
18000; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
18001; CHECK-RV64-NEXT:    vmv.s.x v16, a1
18002; CHECK-RV64-NEXT:    li a1, 386
18003; CHECK-RV64-NEXT:    li a3, 385
18004; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
18005; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
18006; CHECK-RV64-NEXT:    addi a0, a0, 1
18007; CHECK-RV64-NEXT:    andi a1, a2, 4
18008; CHECK-RV64-NEXT:    bnez a1, .LBB61_901
18009; CHECK-RV64-NEXT:    j .LBB61_399
18010; CHECK-RV64-NEXT:  .LBB61_901: # %cond.load1541
18011; CHECK-RV64-NEXT:    lbu a1, 0(a0)
18012; CHECK-RV64-NEXT:    li a3, 512
18013; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
18014; CHECK-RV64-NEXT:    vmv.s.x v16, a1
18015; CHECK-RV64-NEXT:    li a1, 387
18016; CHECK-RV64-NEXT:    li a3, 386
18017; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
18018; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
18019; CHECK-RV64-NEXT:    addi a0, a0, 1
18020; CHECK-RV64-NEXT:    andi a1, a2, 8
18021; CHECK-RV64-NEXT:    bnez a1, .LBB61_902
18022; CHECK-RV64-NEXT:    j .LBB61_400
18023; CHECK-RV64-NEXT:  .LBB61_902: # %cond.load1545
18024; CHECK-RV64-NEXT:    lbu a1, 0(a0)
18025; CHECK-RV64-NEXT:    li a3, 512
18026; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
18027; CHECK-RV64-NEXT:    vmv.s.x v16, a1
18028; CHECK-RV64-NEXT:    li a1, 388
18029; CHECK-RV64-NEXT:    li a3, 387
18030; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
18031; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
18032; CHECK-RV64-NEXT:    addi a0, a0, 1
18033; CHECK-RV64-NEXT:    andi a1, a2, 16
18034; CHECK-RV64-NEXT:    bnez a1, .LBB61_903
18035; CHECK-RV64-NEXT:    j .LBB61_401
18036; CHECK-RV64-NEXT:  .LBB61_903: # %cond.load1549
18037; CHECK-RV64-NEXT:    lbu a1, 0(a0)
18038; CHECK-RV64-NEXT:    li a3, 512
18039; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
18040; CHECK-RV64-NEXT:    vmv.s.x v16, a1
18041; CHECK-RV64-NEXT:    li a1, 389
18042; CHECK-RV64-NEXT:    li a3, 388
18043; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
18044; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
18045; CHECK-RV64-NEXT:    addi a0, a0, 1
18046; CHECK-RV64-NEXT:    andi a1, a2, 32
18047; CHECK-RV64-NEXT:    bnez a1, .LBB61_904
18048; CHECK-RV64-NEXT:    j .LBB61_402
18049; CHECK-RV64-NEXT:  .LBB61_904: # %cond.load1553
18050; CHECK-RV64-NEXT:    lbu a1, 0(a0)
18051; CHECK-RV64-NEXT:    li a3, 512
18052; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
18053; CHECK-RV64-NEXT:    vmv.s.x v16, a1
18054; CHECK-RV64-NEXT:    li a1, 390
18055; CHECK-RV64-NEXT:    li a3, 389
18056; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
18057; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
18058; CHECK-RV64-NEXT:    addi a0, a0, 1
18059; CHECK-RV64-NEXT:    andi a1, a2, 64
18060; CHECK-RV64-NEXT:    bnez a1, .LBB61_905
18061; CHECK-RV64-NEXT:    j .LBB61_403
18062; CHECK-RV64-NEXT:  .LBB61_905: # %cond.load1557
18063; CHECK-RV64-NEXT:    lbu a1, 0(a0)
18064; CHECK-RV64-NEXT:    li a3, 512
18065; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
18066; CHECK-RV64-NEXT:    vmv.s.x v16, a1
18067; CHECK-RV64-NEXT:    li a1, 391
18068; CHECK-RV64-NEXT:    li a3, 390
18069; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
18070; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
18071; CHECK-RV64-NEXT:    addi a0, a0, 1
18072; CHECK-RV64-NEXT:    andi a1, a2, 128
18073; CHECK-RV64-NEXT:    bnez a1, .LBB61_906
18074; CHECK-RV64-NEXT:    j .LBB61_404
18075; CHECK-RV64-NEXT:  .LBB61_906: # %cond.load1561
18076; CHECK-RV64-NEXT:    lbu a1, 0(a0)
18077; CHECK-RV64-NEXT:    li a3, 512
18078; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
18079; CHECK-RV64-NEXT:    vmv.s.x v16, a1
18080; CHECK-RV64-NEXT:    li a1, 392
18081; CHECK-RV64-NEXT:    li a3, 391
18082; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
18083; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
18084; CHECK-RV64-NEXT:    addi a0, a0, 1
18085; CHECK-RV64-NEXT:    andi a1, a2, 256
18086; CHECK-RV64-NEXT:    bnez a1, .LBB61_907
18087; CHECK-RV64-NEXT:    j .LBB61_405
18088; CHECK-RV64-NEXT:  .LBB61_907: # %cond.load1565
18089; CHECK-RV64-NEXT:    lbu a1, 0(a0)
18090; CHECK-RV64-NEXT:    li a3, 512
18091; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
18092; CHECK-RV64-NEXT:    vmv.s.x v16, a1
18093; CHECK-RV64-NEXT:    li a1, 393
18094; CHECK-RV64-NEXT:    li a3, 392
18095; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
18096; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
18097; CHECK-RV64-NEXT:    addi a0, a0, 1
18098; CHECK-RV64-NEXT:    andi a1, a2, 512
18099; CHECK-RV64-NEXT:    bnez a1, .LBB61_908
18100; CHECK-RV64-NEXT:    j .LBB61_406
18101; CHECK-RV64-NEXT:  .LBB61_908: # %cond.load1569
18102; CHECK-RV64-NEXT:    lbu a1, 0(a0)
18103; CHECK-RV64-NEXT:    li a3, 512
18104; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
18105; CHECK-RV64-NEXT:    vmv.s.x v16, a1
18106; CHECK-RV64-NEXT:    li a1, 394
18107; CHECK-RV64-NEXT:    li a3, 393
18108; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
18109; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
18110; CHECK-RV64-NEXT:    addi a0, a0, 1
18111; CHECK-RV64-NEXT:    andi a1, a2, 1024
18112; CHECK-RV64-NEXT:    bnez a1, .LBB61_909
18113; CHECK-RV64-NEXT:    j .LBB61_407
18114; CHECK-RV64-NEXT:  .LBB61_909: # %cond.load1573
18115; CHECK-RV64-NEXT:    lbu a1, 0(a0)
18116; CHECK-RV64-NEXT:    li a3, 512
18117; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
18118; CHECK-RV64-NEXT:    vmv.s.x v16, a1
18119; CHECK-RV64-NEXT:    li a1, 395
18120; CHECK-RV64-NEXT:    li a3, 394
18121; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
18122; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
18123; CHECK-RV64-NEXT:    addi a0, a0, 1
18124; CHECK-RV64-NEXT:    slli a1, a2, 52
18125; CHECK-RV64-NEXT:    bltz a1, .LBB61_910
18126; CHECK-RV64-NEXT:    j .LBB61_408
18127; CHECK-RV64-NEXT:  .LBB61_910: # %cond.load1577
18128; CHECK-RV64-NEXT:    lbu a1, 0(a0)
18129; CHECK-RV64-NEXT:    li a3, 512
18130; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
18131; CHECK-RV64-NEXT:    vmv.s.x v16, a1
18132; CHECK-RV64-NEXT:    li a1, 396
18133; CHECK-RV64-NEXT:    li a3, 395
18134; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
18135; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
18136; CHECK-RV64-NEXT:    addi a0, a0, 1
18137; CHECK-RV64-NEXT:    slli a1, a2, 51
18138; CHECK-RV64-NEXT:    bltz a1, .LBB61_911
18139; CHECK-RV64-NEXT:    j .LBB61_409
18140; CHECK-RV64-NEXT:  .LBB61_911: # %cond.load1581
18141; CHECK-RV64-NEXT:    lbu a1, 0(a0)
18142; CHECK-RV64-NEXT:    li a3, 512
18143; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
18144; CHECK-RV64-NEXT:    vmv.s.x v16, a1
18145; CHECK-RV64-NEXT:    li a1, 397
18146; CHECK-RV64-NEXT:    li a3, 396
18147; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
18148; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
18149; CHECK-RV64-NEXT:    addi a0, a0, 1
18150; CHECK-RV64-NEXT:    slli a1, a2, 50
18151; CHECK-RV64-NEXT:    bltz a1, .LBB61_912
18152; CHECK-RV64-NEXT:    j .LBB61_410
18153; CHECK-RV64-NEXT:  .LBB61_912: # %cond.load1585
18154; CHECK-RV64-NEXT:    lbu a1, 0(a0)
18155; CHECK-RV64-NEXT:    li a3, 512
18156; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
18157; CHECK-RV64-NEXT:    vmv.s.x v16, a1
18158; CHECK-RV64-NEXT:    li a1, 398
18159; CHECK-RV64-NEXT:    li a3, 397
18160; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
18161; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
18162; CHECK-RV64-NEXT:    addi a0, a0, 1
18163; CHECK-RV64-NEXT:    slli a1, a2, 49
18164; CHECK-RV64-NEXT:    bltz a1, .LBB61_913
18165; CHECK-RV64-NEXT:    j .LBB61_411
18166; CHECK-RV64-NEXT:  .LBB61_913: # %cond.load1589
18167; CHECK-RV64-NEXT:    lbu a1, 0(a0)
18168; CHECK-RV64-NEXT:    li a3, 512
18169; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
18170; CHECK-RV64-NEXT:    vmv.s.x v16, a1
18171; CHECK-RV64-NEXT:    li a1, 399
18172; CHECK-RV64-NEXT:    li a3, 398
18173; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
18174; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
18175; CHECK-RV64-NEXT:    addi a0, a0, 1
18176; CHECK-RV64-NEXT:    slli a1, a2, 48
18177; CHECK-RV64-NEXT:    bltz a1, .LBB61_914
18178; CHECK-RV64-NEXT:    j .LBB61_412
18179; CHECK-RV64-NEXT:  .LBB61_914: # %cond.load1593
18180; CHECK-RV64-NEXT:    lbu a1, 0(a0)
18181; CHECK-RV64-NEXT:    li a3, 512
18182; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
18183; CHECK-RV64-NEXT:    vmv.s.x v16, a1
18184; CHECK-RV64-NEXT:    li a1, 400
18185; CHECK-RV64-NEXT:    li a3, 399
18186; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
18187; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
18188; CHECK-RV64-NEXT:    addi a0, a0, 1
18189; CHECK-RV64-NEXT:    slli a1, a2, 47
18190; CHECK-RV64-NEXT:    bltz a1, .LBB61_915
18191; CHECK-RV64-NEXT:    j .LBB61_413
18192; CHECK-RV64-NEXT:  .LBB61_915: # %cond.load1597
18193; CHECK-RV64-NEXT:    lbu a1, 0(a0)
18194; CHECK-RV64-NEXT:    li a3, 512
18195; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
18196; CHECK-RV64-NEXT:    vmv.s.x v16, a1
18197; CHECK-RV64-NEXT:    li a1, 401
18198; CHECK-RV64-NEXT:    li a3, 400
18199; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
18200; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
18201; CHECK-RV64-NEXT:    addi a0, a0, 1
18202; CHECK-RV64-NEXT:    slli a1, a2, 46
18203; CHECK-RV64-NEXT:    bltz a1, .LBB61_916
18204; CHECK-RV64-NEXT:    j .LBB61_414
18205; CHECK-RV64-NEXT:  .LBB61_916: # %cond.load1601
18206; CHECK-RV64-NEXT:    lbu a1, 0(a0)
18207; CHECK-RV64-NEXT:    li a3, 512
18208; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
18209; CHECK-RV64-NEXT:    vmv.s.x v16, a1
18210; CHECK-RV64-NEXT:    li a1, 402
18211; CHECK-RV64-NEXT:    li a3, 401
18212; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
18213; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
18214; CHECK-RV64-NEXT:    addi a0, a0, 1
18215; CHECK-RV64-NEXT:    slli a1, a2, 45
18216; CHECK-RV64-NEXT:    bltz a1, .LBB61_917
18217; CHECK-RV64-NEXT:    j .LBB61_415
18218; CHECK-RV64-NEXT:  .LBB61_917: # %cond.load1605
18219; CHECK-RV64-NEXT:    lbu a1, 0(a0)
18220; CHECK-RV64-NEXT:    li a3, 512
18221; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
18222; CHECK-RV64-NEXT:    vmv.s.x v16, a1
18223; CHECK-RV64-NEXT:    li a1, 403
18224; CHECK-RV64-NEXT:    li a3, 402
18225; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
18226; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
18227; CHECK-RV64-NEXT:    addi a0, a0, 1
18228; CHECK-RV64-NEXT:    slli a1, a2, 44
18229; CHECK-RV64-NEXT:    bltz a1, .LBB61_918
18230; CHECK-RV64-NEXT:    j .LBB61_416
18231; CHECK-RV64-NEXT:  .LBB61_918: # %cond.load1609
18232; CHECK-RV64-NEXT:    lbu a1, 0(a0)
18233; CHECK-RV64-NEXT:    li a3, 512
18234; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
18235; CHECK-RV64-NEXT:    vmv.s.x v16, a1
18236; CHECK-RV64-NEXT:    li a1, 404
18237; CHECK-RV64-NEXT:    li a3, 403
18238; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
18239; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
18240; CHECK-RV64-NEXT:    addi a0, a0, 1
18241; CHECK-RV64-NEXT:    slli a1, a2, 43
18242; CHECK-RV64-NEXT:    bltz a1, .LBB61_919
18243; CHECK-RV64-NEXT:    j .LBB61_417
18244; CHECK-RV64-NEXT:  .LBB61_919: # %cond.load1613
18245; CHECK-RV64-NEXT:    lbu a1, 0(a0)
18246; CHECK-RV64-NEXT:    li a3, 512
18247; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
18248; CHECK-RV64-NEXT:    vmv.s.x v16, a1
18249; CHECK-RV64-NEXT:    li a1, 405
18250; CHECK-RV64-NEXT:    li a3, 404
18251; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
18252; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
18253; CHECK-RV64-NEXT:    addi a0, a0, 1
18254; CHECK-RV64-NEXT:    slli a1, a2, 42
18255; CHECK-RV64-NEXT:    bltz a1, .LBB61_920
18256; CHECK-RV64-NEXT:    j .LBB61_418
18257; CHECK-RV64-NEXT:  .LBB61_920: # %cond.load1617
18258; CHECK-RV64-NEXT:    lbu a1, 0(a0)
18259; CHECK-RV64-NEXT:    li a3, 512
18260; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
18261; CHECK-RV64-NEXT:    vmv.s.x v16, a1
18262; CHECK-RV64-NEXT:    li a1, 406
18263; CHECK-RV64-NEXT:    li a3, 405
18264; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
18265; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
18266; CHECK-RV64-NEXT:    addi a0, a0, 1
18267; CHECK-RV64-NEXT:    slli a1, a2, 41
18268; CHECK-RV64-NEXT:    bltz a1, .LBB61_921
18269; CHECK-RV64-NEXT:    j .LBB61_419
18270; CHECK-RV64-NEXT:  .LBB61_921: # %cond.load1621
18271; CHECK-RV64-NEXT:    lbu a1, 0(a0)
18272; CHECK-RV64-NEXT:    li a3, 512
18273; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
18274; CHECK-RV64-NEXT:    vmv.s.x v16, a1
18275; CHECK-RV64-NEXT:    li a1, 407
18276; CHECK-RV64-NEXT:    li a3, 406
18277; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
18278; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
18279; CHECK-RV64-NEXT:    addi a0, a0, 1
18280; CHECK-RV64-NEXT:    slli a1, a2, 40
18281; CHECK-RV64-NEXT:    bltz a1, .LBB61_922
18282; CHECK-RV64-NEXT:    j .LBB61_420
18283; CHECK-RV64-NEXT:  .LBB61_922: # %cond.load1625
18284; CHECK-RV64-NEXT:    lbu a1, 0(a0)
18285; CHECK-RV64-NEXT:    li a3, 512
18286; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
18287; CHECK-RV64-NEXT:    vmv.s.x v16, a1
18288; CHECK-RV64-NEXT:    li a1, 408
18289; CHECK-RV64-NEXT:    li a3, 407
18290; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
18291; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
18292; CHECK-RV64-NEXT:    addi a0, a0, 1
18293; CHECK-RV64-NEXT:    slli a1, a2, 39
18294; CHECK-RV64-NEXT:    bltz a1, .LBB61_923
18295; CHECK-RV64-NEXT:    j .LBB61_421
18296; CHECK-RV64-NEXT:  .LBB61_923: # %cond.load1629
18297; CHECK-RV64-NEXT:    lbu a1, 0(a0)
18298; CHECK-RV64-NEXT:    li a3, 512
18299; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
18300; CHECK-RV64-NEXT:    vmv.s.x v16, a1
18301; CHECK-RV64-NEXT:    li a1, 409
18302; CHECK-RV64-NEXT:    li a3, 408
18303; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
18304; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
18305; CHECK-RV64-NEXT:    addi a0, a0, 1
18306; CHECK-RV64-NEXT:    slli a1, a2, 38
18307; CHECK-RV64-NEXT:    bltz a1, .LBB61_924
18308; CHECK-RV64-NEXT:    j .LBB61_422
18309; CHECK-RV64-NEXT:  .LBB61_924: # %cond.load1633
18310; CHECK-RV64-NEXT:    lbu a1, 0(a0)
18311; CHECK-RV64-NEXT:    li a3, 512
18312; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
18313; CHECK-RV64-NEXT:    vmv.s.x v16, a1
18314; CHECK-RV64-NEXT:    li a1, 410
18315; CHECK-RV64-NEXT:    li a3, 409
18316; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
18317; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
18318; CHECK-RV64-NEXT:    addi a0, a0, 1
18319; CHECK-RV64-NEXT:    slli a1, a2, 37
18320; CHECK-RV64-NEXT:    bltz a1, .LBB61_925
18321; CHECK-RV64-NEXT:    j .LBB61_423
18322; CHECK-RV64-NEXT:  .LBB61_925: # %cond.load1637
18323; CHECK-RV64-NEXT:    lbu a1, 0(a0)
18324; CHECK-RV64-NEXT:    li a3, 512
18325; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
18326; CHECK-RV64-NEXT:    vmv.s.x v16, a1
18327; CHECK-RV64-NEXT:    li a1, 411
18328; CHECK-RV64-NEXT:    li a3, 410
18329; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
18330; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
18331; CHECK-RV64-NEXT:    addi a0, a0, 1
18332; CHECK-RV64-NEXT:    slli a1, a2, 36
18333; CHECK-RV64-NEXT:    bltz a1, .LBB61_926
18334; CHECK-RV64-NEXT:    j .LBB61_424
18335; CHECK-RV64-NEXT:  .LBB61_926: # %cond.load1641
18336; CHECK-RV64-NEXT:    lbu a1, 0(a0)
18337; CHECK-RV64-NEXT:    li a3, 512
18338; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
18339; CHECK-RV64-NEXT:    vmv.s.x v16, a1
18340; CHECK-RV64-NEXT:    li a1, 412
18341; CHECK-RV64-NEXT:    li a3, 411
18342; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
18343; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
18344; CHECK-RV64-NEXT:    addi a0, a0, 1
18345; CHECK-RV64-NEXT:    slli a1, a2, 35
18346; CHECK-RV64-NEXT:    bltz a1, .LBB61_927
18347; CHECK-RV64-NEXT:    j .LBB61_425
18348; CHECK-RV64-NEXT:  .LBB61_927: # %cond.load1645
18349; CHECK-RV64-NEXT:    lbu a1, 0(a0)
18350; CHECK-RV64-NEXT:    li a3, 512
18351; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
18352; CHECK-RV64-NEXT:    vmv.s.x v16, a1
18353; CHECK-RV64-NEXT:    li a1, 413
18354; CHECK-RV64-NEXT:    li a3, 412
18355; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
18356; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
18357; CHECK-RV64-NEXT:    addi a0, a0, 1
18358; CHECK-RV64-NEXT:    slli a1, a2, 34
18359; CHECK-RV64-NEXT:    bltz a1, .LBB61_928
18360; CHECK-RV64-NEXT:    j .LBB61_426
18361; CHECK-RV64-NEXT:  .LBB61_928: # %cond.load1649
18362; CHECK-RV64-NEXT:    lbu a1, 0(a0)
18363; CHECK-RV64-NEXT:    li a3, 512
18364; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
18365; CHECK-RV64-NEXT:    vmv.s.x v16, a1
18366; CHECK-RV64-NEXT:    li a1, 414
18367; CHECK-RV64-NEXT:    li a3, 413
18368; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
18369; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
18370; CHECK-RV64-NEXT:    addi a0, a0, 1
18371; CHECK-RV64-NEXT:    slli a1, a2, 33
18372; CHECK-RV64-NEXT:    bltz a1, .LBB61_929
18373; CHECK-RV64-NEXT:    j .LBB61_427
18374; CHECK-RV64-NEXT:  .LBB61_929: # %cond.load1653
18375; CHECK-RV64-NEXT:    lbu a1, 0(a0)
18376; CHECK-RV64-NEXT:    li a3, 512
18377; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
18378; CHECK-RV64-NEXT:    vmv.s.x v16, a1
18379; CHECK-RV64-NEXT:    li a1, 415
18380; CHECK-RV64-NEXT:    li a3, 414
18381; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
18382; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
18383; CHECK-RV64-NEXT:    addi a0, a0, 1
18384; CHECK-RV64-NEXT:    slli a1, a2, 32
18385; CHECK-RV64-NEXT:    bltz a1, .LBB61_930
18386; CHECK-RV64-NEXT:    j .LBB61_428
18387; CHECK-RV64-NEXT:  .LBB61_930: # %cond.load1657
18388; CHECK-RV64-NEXT:    lbu a1, 0(a0)
18389; CHECK-RV64-NEXT:    li a3, 512
18390; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
18391; CHECK-RV64-NEXT:    vmv.s.x v16, a1
18392; CHECK-RV64-NEXT:    li a1, 416
18393; CHECK-RV64-NEXT:    li a3, 415
18394; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
18395; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
18396; CHECK-RV64-NEXT:    addi a0, a0, 1
18397; CHECK-RV64-NEXT:    slli a1, a2, 31
18398; CHECK-RV64-NEXT:    bltz a1, .LBB61_931
18399; CHECK-RV64-NEXT:    j .LBB61_429
18400; CHECK-RV64-NEXT:  .LBB61_931: # %cond.load1661
18401; CHECK-RV64-NEXT:    lbu a1, 0(a0)
18402; CHECK-RV64-NEXT:    li a3, 512
18403; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
18404; CHECK-RV64-NEXT:    vmv.s.x v16, a1
18405; CHECK-RV64-NEXT:    li a1, 417
18406; CHECK-RV64-NEXT:    li a3, 416
18407; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
18408; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
18409; CHECK-RV64-NEXT:    addi a0, a0, 1
18410; CHECK-RV64-NEXT:    slli a1, a2, 30
18411; CHECK-RV64-NEXT:    bltz a1, .LBB61_932
18412; CHECK-RV64-NEXT:    j .LBB61_430
18413; CHECK-RV64-NEXT:  .LBB61_932: # %cond.load1665
18414; CHECK-RV64-NEXT:    lbu a1, 0(a0)
18415; CHECK-RV64-NEXT:    li a3, 512
18416; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
18417; CHECK-RV64-NEXT:    vmv.s.x v16, a1
18418; CHECK-RV64-NEXT:    li a1, 418
18419; CHECK-RV64-NEXT:    li a3, 417
18420; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
18421; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
18422; CHECK-RV64-NEXT:    addi a0, a0, 1
18423; CHECK-RV64-NEXT:    slli a1, a2, 29
18424; CHECK-RV64-NEXT:    bltz a1, .LBB61_933
18425; CHECK-RV64-NEXT:    j .LBB61_431
18426; CHECK-RV64-NEXT:  .LBB61_933: # %cond.load1669
18427; CHECK-RV64-NEXT:    lbu a1, 0(a0)
18428; CHECK-RV64-NEXT:    li a3, 512
18429; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
18430; CHECK-RV64-NEXT:    vmv.s.x v16, a1
18431; CHECK-RV64-NEXT:    li a1, 419
18432; CHECK-RV64-NEXT:    li a3, 418
18433; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
18434; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
18435; CHECK-RV64-NEXT:    addi a0, a0, 1
18436; CHECK-RV64-NEXT:    slli a1, a2, 28
18437; CHECK-RV64-NEXT:    bltz a1, .LBB61_934
18438; CHECK-RV64-NEXT:    j .LBB61_432
18439; CHECK-RV64-NEXT:  .LBB61_934: # %cond.load1673
18440; CHECK-RV64-NEXT:    lbu a1, 0(a0)
18441; CHECK-RV64-NEXT:    li a3, 512
18442; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
18443; CHECK-RV64-NEXT:    vmv.s.x v16, a1
18444; CHECK-RV64-NEXT:    li a1, 420
18445; CHECK-RV64-NEXT:    li a3, 419
18446; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
18447; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
18448; CHECK-RV64-NEXT:    addi a0, a0, 1
18449; CHECK-RV64-NEXT:    slli a1, a2, 27
18450; CHECK-RV64-NEXT:    bltz a1, .LBB61_935
18451; CHECK-RV64-NEXT:    j .LBB61_433
18452; CHECK-RV64-NEXT:  .LBB61_935: # %cond.load1677
18453; CHECK-RV64-NEXT:    lbu a1, 0(a0)
18454; CHECK-RV64-NEXT:    li a3, 512
18455; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
18456; CHECK-RV64-NEXT:    vmv.s.x v16, a1
18457; CHECK-RV64-NEXT:    li a1, 421
18458; CHECK-RV64-NEXT:    li a3, 420
18459; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
18460; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
18461; CHECK-RV64-NEXT:    addi a0, a0, 1
18462; CHECK-RV64-NEXT:    slli a1, a2, 26
18463; CHECK-RV64-NEXT:    bltz a1, .LBB61_936
18464; CHECK-RV64-NEXT:    j .LBB61_434
18465; CHECK-RV64-NEXT:  .LBB61_936: # %cond.load1681
18466; CHECK-RV64-NEXT:    lbu a1, 0(a0)
18467; CHECK-RV64-NEXT:    li a3, 512
18468; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
18469; CHECK-RV64-NEXT:    vmv.s.x v16, a1
18470; CHECK-RV64-NEXT:    li a1, 422
18471; CHECK-RV64-NEXT:    li a3, 421
18472; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
18473; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
18474; CHECK-RV64-NEXT:    addi a0, a0, 1
18475; CHECK-RV64-NEXT:    slli a1, a2, 25
18476; CHECK-RV64-NEXT:    bltz a1, .LBB61_937
18477; CHECK-RV64-NEXT:    j .LBB61_435
18478; CHECK-RV64-NEXT:  .LBB61_937: # %cond.load1685
18479; CHECK-RV64-NEXT:    lbu a1, 0(a0)
18480; CHECK-RV64-NEXT:    li a3, 512
18481; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
18482; CHECK-RV64-NEXT:    vmv.s.x v16, a1
18483; CHECK-RV64-NEXT:    li a1, 423
18484; CHECK-RV64-NEXT:    li a3, 422
18485; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
18486; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
18487; CHECK-RV64-NEXT:    addi a0, a0, 1
18488; CHECK-RV64-NEXT:    slli a1, a2, 24
18489; CHECK-RV64-NEXT:    bltz a1, .LBB61_938
18490; CHECK-RV64-NEXT:    j .LBB61_436
18491; CHECK-RV64-NEXT:  .LBB61_938: # %cond.load1689
18492; CHECK-RV64-NEXT:    lbu a1, 0(a0)
18493; CHECK-RV64-NEXT:    li a3, 512
18494; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
18495; CHECK-RV64-NEXT:    vmv.s.x v16, a1
18496; CHECK-RV64-NEXT:    li a1, 424
18497; CHECK-RV64-NEXT:    li a3, 423
18498; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
18499; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
18500; CHECK-RV64-NEXT:    addi a0, a0, 1
18501; CHECK-RV64-NEXT:    slli a1, a2, 23
18502; CHECK-RV64-NEXT:    bltz a1, .LBB61_939
18503; CHECK-RV64-NEXT:    j .LBB61_437
18504; CHECK-RV64-NEXT:  .LBB61_939: # %cond.load1693
18505; CHECK-RV64-NEXT:    lbu a1, 0(a0)
18506; CHECK-RV64-NEXT:    li a3, 512
18507; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
18508; CHECK-RV64-NEXT:    vmv.s.x v16, a1
18509; CHECK-RV64-NEXT:    li a1, 425
18510; CHECK-RV64-NEXT:    li a3, 424
18511; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
18512; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
18513; CHECK-RV64-NEXT:    addi a0, a0, 1
18514; CHECK-RV64-NEXT:    slli a1, a2, 22
18515; CHECK-RV64-NEXT:    bltz a1, .LBB61_940
18516; CHECK-RV64-NEXT:    j .LBB61_438
18517; CHECK-RV64-NEXT:  .LBB61_940: # %cond.load1697
18518; CHECK-RV64-NEXT:    lbu a1, 0(a0)
18519; CHECK-RV64-NEXT:    li a3, 512
18520; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
18521; CHECK-RV64-NEXT:    vmv.s.x v16, a1
18522; CHECK-RV64-NEXT:    li a1, 426
18523; CHECK-RV64-NEXT:    li a3, 425
18524; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
18525; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
18526; CHECK-RV64-NEXT:    addi a0, a0, 1
18527; CHECK-RV64-NEXT:    slli a1, a2, 21
18528; CHECK-RV64-NEXT:    bltz a1, .LBB61_941
18529; CHECK-RV64-NEXT:    j .LBB61_439
18530; CHECK-RV64-NEXT:  .LBB61_941: # %cond.load1701
18531; CHECK-RV64-NEXT:    lbu a1, 0(a0)
18532; CHECK-RV64-NEXT:    li a3, 512
18533; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
18534; CHECK-RV64-NEXT:    vmv.s.x v16, a1
18535; CHECK-RV64-NEXT:    li a1, 427
18536; CHECK-RV64-NEXT:    li a3, 426
18537; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
18538; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
18539; CHECK-RV64-NEXT:    addi a0, a0, 1
18540; CHECK-RV64-NEXT:    slli a1, a2, 20
18541; CHECK-RV64-NEXT:    bltz a1, .LBB61_942
18542; CHECK-RV64-NEXT:    j .LBB61_440
18543; CHECK-RV64-NEXT:  .LBB61_942: # %cond.load1705
18544; CHECK-RV64-NEXT:    lbu a1, 0(a0)
18545; CHECK-RV64-NEXT:    li a3, 512
18546; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
18547; CHECK-RV64-NEXT:    vmv.s.x v16, a1
18548; CHECK-RV64-NEXT:    li a1, 428
18549; CHECK-RV64-NEXT:    li a3, 427
18550; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
18551; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
18552; CHECK-RV64-NEXT:    addi a0, a0, 1
18553; CHECK-RV64-NEXT:    slli a1, a2, 19
18554; CHECK-RV64-NEXT:    bltz a1, .LBB61_943
18555; CHECK-RV64-NEXT:    j .LBB61_441
18556; CHECK-RV64-NEXT:  .LBB61_943: # %cond.load1709
18557; CHECK-RV64-NEXT:    lbu a1, 0(a0)
18558; CHECK-RV64-NEXT:    li a3, 512
18559; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
18560; CHECK-RV64-NEXT:    vmv.s.x v16, a1
18561; CHECK-RV64-NEXT:    li a1, 429
18562; CHECK-RV64-NEXT:    li a3, 428
18563; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
18564; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
18565; CHECK-RV64-NEXT:    addi a0, a0, 1
18566; CHECK-RV64-NEXT:    slli a1, a2, 18
18567; CHECK-RV64-NEXT:    bltz a1, .LBB61_944
18568; CHECK-RV64-NEXT:    j .LBB61_442
18569; CHECK-RV64-NEXT:  .LBB61_944: # %cond.load1713
18570; CHECK-RV64-NEXT:    lbu a1, 0(a0)
18571; CHECK-RV64-NEXT:    li a3, 512
18572; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
18573; CHECK-RV64-NEXT:    vmv.s.x v16, a1
18574; CHECK-RV64-NEXT:    li a1, 430
18575; CHECK-RV64-NEXT:    li a3, 429
18576; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
18577; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
18578; CHECK-RV64-NEXT:    addi a0, a0, 1
18579; CHECK-RV64-NEXT:    slli a1, a2, 17
18580; CHECK-RV64-NEXT:    bltz a1, .LBB61_945
18581; CHECK-RV64-NEXT:    j .LBB61_443
18582; CHECK-RV64-NEXT:  .LBB61_945: # %cond.load1717
18583; CHECK-RV64-NEXT:    lbu a1, 0(a0)
18584; CHECK-RV64-NEXT:    li a3, 512
18585; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
18586; CHECK-RV64-NEXT:    vmv.s.x v16, a1
18587; CHECK-RV64-NEXT:    li a1, 431
18588; CHECK-RV64-NEXT:    li a3, 430
18589; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
18590; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
18591; CHECK-RV64-NEXT:    addi a0, a0, 1
18592; CHECK-RV64-NEXT:    slli a1, a2, 16
18593; CHECK-RV64-NEXT:    bltz a1, .LBB61_946
18594; CHECK-RV64-NEXT:    j .LBB61_444
18595; CHECK-RV64-NEXT:  .LBB61_946: # %cond.load1721
18596; CHECK-RV64-NEXT:    lbu a1, 0(a0)
18597; CHECK-RV64-NEXT:    li a3, 512
18598; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
18599; CHECK-RV64-NEXT:    vmv.s.x v16, a1
18600; CHECK-RV64-NEXT:    li a1, 432
18601; CHECK-RV64-NEXT:    li a3, 431
18602; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
18603; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
18604; CHECK-RV64-NEXT:    addi a0, a0, 1
18605; CHECK-RV64-NEXT:    slli a1, a2, 15
18606; CHECK-RV64-NEXT:    bltz a1, .LBB61_947
18607; CHECK-RV64-NEXT:    j .LBB61_445
18608; CHECK-RV64-NEXT:  .LBB61_947: # %cond.load1725
18609; CHECK-RV64-NEXT:    lbu a1, 0(a0)
18610; CHECK-RV64-NEXT:    li a3, 512
18611; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
18612; CHECK-RV64-NEXT:    vmv.s.x v16, a1
18613; CHECK-RV64-NEXT:    li a1, 433
18614; CHECK-RV64-NEXT:    li a3, 432
18615; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
18616; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
18617; CHECK-RV64-NEXT:    addi a0, a0, 1
18618; CHECK-RV64-NEXT:    slli a1, a2, 14
18619; CHECK-RV64-NEXT:    bltz a1, .LBB61_948
18620; CHECK-RV64-NEXT:    j .LBB61_446
18621; CHECK-RV64-NEXT:  .LBB61_948: # %cond.load1729
18622; CHECK-RV64-NEXT:    lbu a1, 0(a0)
18623; CHECK-RV64-NEXT:    li a3, 512
18624; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
18625; CHECK-RV64-NEXT:    vmv.s.x v16, a1
18626; CHECK-RV64-NEXT:    li a1, 434
18627; CHECK-RV64-NEXT:    li a3, 433
18628; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
18629; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
18630; CHECK-RV64-NEXT:    addi a0, a0, 1
18631; CHECK-RV64-NEXT:    slli a1, a2, 13
18632; CHECK-RV64-NEXT:    bltz a1, .LBB61_949
18633; CHECK-RV64-NEXT:    j .LBB61_447
18634; CHECK-RV64-NEXT:  .LBB61_949: # %cond.load1733
18635; CHECK-RV64-NEXT:    lbu a1, 0(a0)
18636; CHECK-RV64-NEXT:    li a3, 512
18637; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
18638; CHECK-RV64-NEXT:    vmv.s.x v16, a1
18639; CHECK-RV64-NEXT:    li a1, 435
18640; CHECK-RV64-NEXT:    li a3, 434
18641; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
18642; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
18643; CHECK-RV64-NEXT:    addi a0, a0, 1
18644; CHECK-RV64-NEXT:    slli a1, a2, 12
18645; CHECK-RV64-NEXT:    bltz a1, .LBB61_950
18646; CHECK-RV64-NEXT:    j .LBB61_448
18647; CHECK-RV64-NEXT:  .LBB61_950: # %cond.load1737
18648; CHECK-RV64-NEXT:    lbu a1, 0(a0)
18649; CHECK-RV64-NEXT:    li a3, 512
18650; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
18651; CHECK-RV64-NEXT:    vmv.s.x v16, a1
18652; CHECK-RV64-NEXT:    li a1, 436
18653; CHECK-RV64-NEXT:    li a3, 435
18654; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
18655; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
18656; CHECK-RV64-NEXT:    addi a0, a0, 1
18657; CHECK-RV64-NEXT:    slli a1, a2, 11
18658; CHECK-RV64-NEXT:    bltz a1, .LBB61_951
18659; CHECK-RV64-NEXT:    j .LBB61_449
18660; CHECK-RV64-NEXT:  .LBB61_951: # %cond.load1741
18661; CHECK-RV64-NEXT:    lbu a1, 0(a0)
18662; CHECK-RV64-NEXT:    li a3, 512
18663; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
18664; CHECK-RV64-NEXT:    vmv.s.x v16, a1
18665; CHECK-RV64-NEXT:    li a1, 437
18666; CHECK-RV64-NEXT:    li a3, 436
18667; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
18668; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
18669; CHECK-RV64-NEXT:    addi a0, a0, 1
18670; CHECK-RV64-NEXT:    slli a1, a2, 10
18671; CHECK-RV64-NEXT:    bltz a1, .LBB61_952
18672; CHECK-RV64-NEXT:    j .LBB61_450
18673; CHECK-RV64-NEXT:  .LBB61_952: # %cond.load1745
18674; CHECK-RV64-NEXT:    lbu a1, 0(a0)
18675; CHECK-RV64-NEXT:    li a3, 512
18676; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
18677; CHECK-RV64-NEXT:    vmv.s.x v16, a1
18678; CHECK-RV64-NEXT:    li a1, 438
18679; CHECK-RV64-NEXT:    li a3, 437
18680; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
18681; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
18682; CHECK-RV64-NEXT:    addi a0, a0, 1
18683; CHECK-RV64-NEXT:    slli a1, a2, 9
18684; CHECK-RV64-NEXT:    bltz a1, .LBB61_953
18685; CHECK-RV64-NEXT:    j .LBB61_451
18686; CHECK-RV64-NEXT:  .LBB61_953: # %cond.load1749
18687; CHECK-RV64-NEXT:    lbu a1, 0(a0)
18688; CHECK-RV64-NEXT:    li a3, 512
18689; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
18690; CHECK-RV64-NEXT:    vmv.s.x v16, a1
18691; CHECK-RV64-NEXT:    li a1, 439
18692; CHECK-RV64-NEXT:    li a3, 438
18693; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
18694; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
18695; CHECK-RV64-NEXT:    addi a0, a0, 1
18696; CHECK-RV64-NEXT:    slli a1, a2, 8
18697; CHECK-RV64-NEXT:    bltz a1, .LBB61_954
18698; CHECK-RV64-NEXT:    j .LBB61_452
18699; CHECK-RV64-NEXT:  .LBB61_954: # %cond.load1753
18700; CHECK-RV64-NEXT:    lbu a1, 0(a0)
18701; CHECK-RV64-NEXT:    li a3, 512
18702; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
18703; CHECK-RV64-NEXT:    vmv.s.x v16, a1
18704; CHECK-RV64-NEXT:    li a1, 440
18705; CHECK-RV64-NEXT:    li a3, 439
18706; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
18707; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
18708; CHECK-RV64-NEXT:    addi a0, a0, 1
18709; CHECK-RV64-NEXT:    slli a1, a2, 7
18710; CHECK-RV64-NEXT:    bltz a1, .LBB61_955
18711; CHECK-RV64-NEXT:    j .LBB61_453
18712; CHECK-RV64-NEXT:  .LBB61_955: # %cond.load1757
18713; CHECK-RV64-NEXT:    lbu a1, 0(a0)
18714; CHECK-RV64-NEXT:    li a3, 512
18715; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
18716; CHECK-RV64-NEXT:    vmv.s.x v16, a1
18717; CHECK-RV64-NEXT:    li a1, 441
18718; CHECK-RV64-NEXT:    li a3, 440
18719; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
18720; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
18721; CHECK-RV64-NEXT:    addi a0, a0, 1
18722; CHECK-RV64-NEXT:    slli a1, a2, 6
18723; CHECK-RV64-NEXT:    bltz a1, .LBB61_956
18724; CHECK-RV64-NEXT:    j .LBB61_454
18725; CHECK-RV64-NEXT:  .LBB61_956: # %cond.load1761
18726; CHECK-RV64-NEXT:    lbu a1, 0(a0)
18727; CHECK-RV64-NEXT:    li a3, 512
18728; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
18729; CHECK-RV64-NEXT:    vmv.s.x v16, a1
18730; CHECK-RV64-NEXT:    li a1, 442
18731; CHECK-RV64-NEXT:    li a3, 441
18732; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
18733; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
18734; CHECK-RV64-NEXT:    addi a0, a0, 1
18735; CHECK-RV64-NEXT:    slli a1, a2, 5
18736; CHECK-RV64-NEXT:    bltz a1, .LBB61_957
18737; CHECK-RV64-NEXT:    j .LBB61_455
18738; CHECK-RV64-NEXT:  .LBB61_957: # %cond.load1765
18739; CHECK-RV64-NEXT:    lbu a1, 0(a0)
18740; CHECK-RV64-NEXT:    li a3, 512
18741; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
18742; CHECK-RV64-NEXT:    vmv.s.x v16, a1
18743; CHECK-RV64-NEXT:    li a1, 443
18744; CHECK-RV64-NEXT:    li a3, 442
18745; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
18746; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
18747; CHECK-RV64-NEXT:    addi a0, a0, 1
18748; CHECK-RV64-NEXT:    slli a1, a2, 4
18749; CHECK-RV64-NEXT:    bltz a1, .LBB61_958
18750; CHECK-RV64-NEXT:    j .LBB61_456
18751; CHECK-RV64-NEXT:  .LBB61_958: # %cond.load1769
18752; CHECK-RV64-NEXT:    lbu a1, 0(a0)
18753; CHECK-RV64-NEXT:    li a3, 512
18754; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
18755; CHECK-RV64-NEXT:    vmv.s.x v16, a1
18756; CHECK-RV64-NEXT:    li a1, 444
18757; CHECK-RV64-NEXT:    li a3, 443
18758; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
18759; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
18760; CHECK-RV64-NEXT:    addi a0, a0, 1
18761; CHECK-RV64-NEXT:    slli a1, a2, 3
18762; CHECK-RV64-NEXT:    bltz a1, .LBB61_959
18763; CHECK-RV64-NEXT:    j .LBB61_457
18764; CHECK-RV64-NEXT:  .LBB61_959: # %cond.load1773
18765; CHECK-RV64-NEXT:    lbu a1, 0(a0)
18766; CHECK-RV64-NEXT:    li a3, 512
18767; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
18768; CHECK-RV64-NEXT:    vmv.s.x v16, a1
18769; CHECK-RV64-NEXT:    li a1, 445
18770; CHECK-RV64-NEXT:    li a3, 444
18771; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, tu, ma
18772; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
18773; CHECK-RV64-NEXT:    addi a0, a0, 1
18774; CHECK-RV64-NEXT:    slli a1, a2, 2
18775; CHECK-RV64-NEXT:    bgez a1, .LBB61_1031
18776; CHECK-RV64-NEXT:    j .LBB61_458
18777; CHECK-RV64-NEXT:  .LBB61_1031: # %cond.load1773
18778; CHECK-RV64-NEXT:    j .LBB61_459
18779; CHECK-RV64-NEXT:  .LBB61_960: # %cond.load1785
18780; CHECK-RV64-NEXT:    lbu a2, 0(a0)
18781; CHECK-RV64-NEXT:    vmv.s.x v16, a2
18782; CHECK-RV64-NEXT:    li a2, 448
18783; CHECK-RV64-NEXT:    li a3, 447
18784; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
18785; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
18786; CHECK-RV64-NEXT:    addi a0, a0, 1
18787; CHECK-RV64-NEXT:    andi a2, a1, 1
18788; CHECK-RV64-NEXT:    bnez a2, .LBB61_961
18789; CHECK-RV64-NEXT:    j .LBB61_463
18790; CHECK-RV64-NEXT:  .LBB61_961: # %cond.load1789
18791; CHECK-RV64-NEXT:    lbu a2, 0(a0)
18792; CHECK-RV64-NEXT:    li a3, 512
18793; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
18794; CHECK-RV64-NEXT:    vmv.s.x v16, a2
18795; CHECK-RV64-NEXT:    li a2, 449
18796; CHECK-RV64-NEXT:    li a3, 448
18797; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
18798; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
18799; CHECK-RV64-NEXT:    addi a0, a0, 1
18800; CHECK-RV64-NEXT:    andi a2, a1, 2
18801; CHECK-RV64-NEXT:    bnez a2, .LBB61_962
18802; CHECK-RV64-NEXT:    j .LBB61_464
18803; CHECK-RV64-NEXT:  .LBB61_962: # %cond.load1793
18804; CHECK-RV64-NEXT:    lbu a2, 0(a0)
18805; CHECK-RV64-NEXT:    li a3, 512
18806; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
18807; CHECK-RV64-NEXT:    vmv.s.x v16, a2
18808; CHECK-RV64-NEXT:    li a2, 450
18809; CHECK-RV64-NEXT:    li a3, 449
18810; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
18811; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
18812; CHECK-RV64-NEXT:    addi a0, a0, 1
18813; CHECK-RV64-NEXT:    andi a2, a1, 4
18814; CHECK-RV64-NEXT:    bnez a2, .LBB61_963
18815; CHECK-RV64-NEXT:    j .LBB61_465
18816; CHECK-RV64-NEXT:  .LBB61_963: # %cond.load1797
18817; CHECK-RV64-NEXT:    lbu a2, 0(a0)
18818; CHECK-RV64-NEXT:    li a3, 512
18819; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
18820; CHECK-RV64-NEXT:    vmv.s.x v16, a2
18821; CHECK-RV64-NEXT:    li a2, 451
18822; CHECK-RV64-NEXT:    li a3, 450
18823; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
18824; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
18825; CHECK-RV64-NEXT:    addi a0, a0, 1
18826; CHECK-RV64-NEXT:    andi a2, a1, 8
18827; CHECK-RV64-NEXT:    bnez a2, .LBB61_964
18828; CHECK-RV64-NEXT:    j .LBB61_466
18829; CHECK-RV64-NEXT:  .LBB61_964: # %cond.load1801
18830; CHECK-RV64-NEXT:    lbu a2, 0(a0)
18831; CHECK-RV64-NEXT:    li a3, 512
18832; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
18833; CHECK-RV64-NEXT:    vmv.s.x v16, a2
18834; CHECK-RV64-NEXT:    li a2, 452
18835; CHECK-RV64-NEXT:    li a3, 451
18836; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
18837; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
18838; CHECK-RV64-NEXT:    addi a0, a0, 1
18839; CHECK-RV64-NEXT:    andi a2, a1, 16
18840; CHECK-RV64-NEXT:    bnez a2, .LBB61_965
18841; CHECK-RV64-NEXT:    j .LBB61_467
18842; CHECK-RV64-NEXT:  .LBB61_965: # %cond.load1805
18843; CHECK-RV64-NEXT:    lbu a2, 0(a0)
18844; CHECK-RV64-NEXT:    li a3, 512
18845; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
18846; CHECK-RV64-NEXT:    vmv.s.x v16, a2
18847; CHECK-RV64-NEXT:    li a2, 453
18848; CHECK-RV64-NEXT:    li a3, 452
18849; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
18850; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
18851; CHECK-RV64-NEXT:    addi a0, a0, 1
18852; CHECK-RV64-NEXT:    andi a2, a1, 32
18853; CHECK-RV64-NEXT:    bnez a2, .LBB61_966
18854; CHECK-RV64-NEXT:    j .LBB61_468
18855; CHECK-RV64-NEXT:  .LBB61_966: # %cond.load1809
18856; CHECK-RV64-NEXT:    lbu a2, 0(a0)
18857; CHECK-RV64-NEXT:    li a3, 512
18858; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
18859; CHECK-RV64-NEXT:    vmv.s.x v16, a2
18860; CHECK-RV64-NEXT:    li a2, 454
18861; CHECK-RV64-NEXT:    li a3, 453
18862; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
18863; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
18864; CHECK-RV64-NEXT:    addi a0, a0, 1
18865; CHECK-RV64-NEXT:    andi a2, a1, 64
18866; CHECK-RV64-NEXT:    bnez a2, .LBB61_967
18867; CHECK-RV64-NEXT:    j .LBB61_469
18868; CHECK-RV64-NEXT:  .LBB61_967: # %cond.load1813
18869; CHECK-RV64-NEXT:    lbu a2, 0(a0)
18870; CHECK-RV64-NEXT:    li a3, 512
18871; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
18872; CHECK-RV64-NEXT:    vmv.s.x v16, a2
18873; CHECK-RV64-NEXT:    li a2, 455
18874; CHECK-RV64-NEXT:    li a3, 454
18875; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
18876; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
18877; CHECK-RV64-NEXT:    addi a0, a0, 1
18878; CHECK-RV64-NEXT:    andi a2, a1, 128
18879; CHECK-RV64-NEXT:    bnez a2, .LBB61_968
18880; CHECK-RV64-NEXT:    j .LBB61_470
18881; CHECK-RV64-NEXT:  .LBB61_968: # %cond.load1817
18882; CHECK-RV64-NEXT:    lbu a2, 0(a0)
18883; CHECK-RV64-NEXT:    li a3, 512
18884; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
18885; CHECK-RV64-NEXT:    vmv.s.x v16, a2
18886; CHECK-RV64-NEXT:    li a2, 456
18887; CHECK-RV64-NEXT:    li a3, 455
18888; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
18889; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
18890; CHECK-RV64-NEXT:    addi a0, a0, 1
18891; CHECK-RV64-NEXT:    andi a2, a1, 256
18892; CHECK-RV64-NEXT:    bnez a2, .LBB61_969
18893; CHECK-RV64-NEXT:    j .LBB61_471
18894; CHECK-RV64-NEXT:  .LBB61_969: # %cond.load1821
18895; CHECK-RV64-NEXT:    lbu a2, 0(a0)
18896; CHECK-RV64-NEXT:    li a3, 512
18897; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
18898; CHECK-RV64-NEXT:    vmv.s.x v16, a2
18899; CHECK-RV64-NEXT:    li a2, 457
18900; CHECK-RV64-NEXT:    li a3, 456
18901; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
18902; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
18903; CHECK-RV64-NEXT:    addi a0, a0, 1
18904; CHECK-RV64-NEXT:    andi a2, a1, 512
18905; CHECK-RV64-NEXT:    bnez a2, .LBB61_970
18906; CHECK-RV64-NEXT:    j .LBB61_472
18907; CHECK-RV64-NEXT:  .LBB61_970: # %cond.load1825
18908; CHECK-RV64-NEXT:    lbu a2, 0(a0)
18909; CHECK-RV64-NEXT:    li a3, 512
18910; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
18911; CHECK-RV64-NEXT:    vmv.s.x v16, a2
18912; CHECK-RV64-NEXT:    li a2, 458
18913; CHECK-RV64-NEXT:    li a3, 457
18914; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
18915; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
18916; CHECK-RV64-NEXT:    addi a0, a0, 1
18917; CHECK-RV64-NEXT:    andi a2, a1, 1024
18918; CHECK-RV64-NEXT:    bnez a2, .LBB61_971
18919; CHECK-RV64-NEXT:    j .LBB61_473
18920; CHECK-RV64-NEXT:  .LBB61_971: # %cond.load1829
18921; CHECK-RV64-NEXT:    lbu a2, 0(a0)
18922; CHECK-RV64-NEXT:    li a3, 512
18923; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
18924; CHECK-RV64-NEXT:    vmv.s.x v16, a2
18925; CHECK-RV64-NEXT:    li a2, 459
18926; CHECK-RV64-NEXT:    li a3, 458
18927; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
18928; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
18929; CHECK-RV64-NEXT:    addi a0, a0, 1
18930; CHECK-RV64-NEXT:    slli a2, a1, 52
18931; CHECK-RV64-NEXT:    bltz a2, .LBB61_972
18932; CHECK-RV64-NEXT:    j .LBB61_474
18933; CHECK-RV64-NEXT:  .LBB61_972: # %cond.load1833
18934; CHECK-RV64-NEXT:    lbu a2, 0(a0)
18935; CHECK-RV64-NEXT:    li a3, 512
18936; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
18937; CHECK-RV64-NEXT:    vmv.s.x v16, a2
18938; CHECK-RV64-NEXT:    li a2, 460
18939; CHECK-RV64-NEXT:    li a3, 459
18940; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
18941; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
18942; CHECK-RV64-NEXT:    addi a0, a0, 1
18943; CHECK-RV64-NEXT:    slli a2, a1, 51
18944; CHECK-RV64-NEXT:    bltz a2, .LBB61_973
18945; CHECK-RV64-NEXT:    j .LBB61_475
18946; CHECK-RV64-NEXT:  .LBB61_973: # %cond.load1837
18947; CHECK-RV64-NEXT:    lbu a2, 0(a0)
18948; CHECK-RV64-NEXT:    li a3, 512
18949; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
18950; CHECK-RV64-NEXT:    vmv.s.x v16, a2
18951; CHECK-RV64-NEXT:    li a2, 461
18952; CHECK-RV64-NEXT:    li a3, 460
18953; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
18954; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
18955; CHECK-RV64-NEXT:    addi a0, a0, 1
18956; CHECK-RV64-NEXT:    slli a2, a1, 50
18957; CHECK-RV64-NEXT:    bltz a2, .LBB61_974
18958; CHECK-RV64-NEXT:    j .LBB61_476
18959; CHECK-RV64-NEXT:  .LBB61_974: # %cond.load1841
18960; CHECK-RV64-NEXT:    lbu a2, 0(a0)
18961; CHECK-RV64-NEXT:    li a3, 512
18962; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
18963; CHECK-RV64-NEXT:    vmv.s.x v16, a2
18964; CHECK-RV64-NEXT:    li a2, 462
18965; CHECK-RV64-NEXT:    li a3, 461
18966; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
18967; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
18968; CHECK-RV64-NEXT:    addi a0, a0, 1
18969; CHECK-RV64-NEXT:    slli a2, a1, 49
18970; CHECK-RV64-NEXT:    bltz a2, .LBB61_975
18971; CHECK-RV64-NEXT:    j .LBB61_477
18972; CHECK-RV64-NEXT:  .LBB61_975: # %cond.load1845
18973; CHECK-RV64-NEXT:    lbu a2, 0(a0)
18974; CHECK-RV64-NEXT:    li a3, 512
18975; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
18976; CHECK-RV64-NEXT:    vmv.s.x v16, a2
18977; CHECK-RV64-NEXT:    li a2, 463
18978; CHECK-RV64-NEXT:    li a3, 462
18979; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
18980; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
18981; CHECK-RV64-NEXT:    addi a0, a0, 1
18982; CHECK-RV64-NEXT:    slli a2, a1, 48
18983; CHECK-RV64-NEXT:    bltz a2, .LBB61_976
18984; CHECK-RV64-NEXT:    j .LBB61_478
18985; CHECK-RV64-NEXT:  .LBB61_976: # %cond.load1849
18986; CHECK-RV64-NEXT:    lbu a2, 0(a0)
18987; CHECK-RV64-NEXT:    li a3, 512
18988; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
18989; CHECK-RV64-NEXT:    vmv.s.x v16, a2
18990; CHECK-RV64-NEXT:    li a2, 464
18991; CHECK-RV64-NEXT:    li a3, 463
18992; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
18993; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
18994; CHECK-RV64-NEXT:    addi a0, a0, 1
18995; CHECK-RV64-NEXT:    slli a2, a1, 47
18996; CHECK-RV64-NEXT:    bltz a2, .LBB61_977
18997; CHECK-RV64-NEXT:    j .LBB61_479
18998; CHECK-RV64-NEXT:  .LBB61_977: # %cond.load1853
18999; CHECK-RV64-NEXT:    lbu a2, 0(a0)
19000; CHECK-RV64-NEXT:    li a3, 512
19001; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
19002; CHECK-RV64-NEXT:    vmv.s.x v16, a2
19003; CHECK-RV64-NEXT:    li a2, 465
19004; CHECK-RV64-NEXT:    li a3, 464
19005; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
19006; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
19007; CHECK-RV64-NEXT:    addi a0, a0, 1
19008; CHECK-RV64-NEXT:    slli a2, a1, 46
19009; CHECK-RV64-NEXT:    bltz a2, .LBB61_978
19010; CHECK-RV64-NEXT:    j .LBB61_480
19011; CHECK-RV64-NEXT:  .LBB61_978: # %cond.load1857
19012; CHECK-RV64-NEXT:    lbu a2, 0(a0)
19013; CHECK-RV64-NEXT:    li a3, 512
19014; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
19015; CHECK-RV64-NEXT:    vmv.s.x v16, a2
19016; CHECK-RV64-NEXT:    li a2, 466
19017; CHECK-RV64-NEXT:    li a3, 465
19018; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
19019; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
19020; CHECK-RV64-NEXT:    addi a0, a0, 1
19021; CHECK-RV64-NEXT:    slli a2, a1, 45
19022; CHECK-RV64-NEXT:    bltz a2, .LBB61_979
19023; CHECK-RV64-NEXT:    j .LBB61_481
19024; CHECK-RV64-NEXT:  .LBB61_979: # %cond.load1861
19025; CHECK-RV64-NEXT:    lbu a2, 0(a0)
19026; CHECK-RV64-NEXT:    li a3, 512
19027; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
19028; CHECK-RV64-NEXT:    vmv.s.x v16, a2
19029; CHECK-RV64-NEXT:    li a2, 467
19030; CHECK-RV64-NEXT:    li a3, 466
19031; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
19032; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
19033; CHECK-RV64-NEXT:    addi a0, a0, 1
19034; CHECK-RV64-NEXT:    slli a2, a1, 44
19035; CHECK-RV64-NEXT:    bltz a2, .LBB61_980
19036; CHECK-RV64-NEXT:    j .LBB61_482
19037; CHECK-RV64-NEXT:  .LBB61_980: # %cond.load1865
19038; CHECK-RV64-NEXT:    lbu a2, 0(a0)
19039; CHECK-RV64-NEXT:    li a3, 512
19040; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
19041; CHECK-RV64-NEXT:    vmv.s.x v16, a2
19042; CHECK-RV64-NEXT:    li a2, 468
19043; CHECK-RV64-NEXT:    li a3, 467
19044; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
19045; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
19046; CHECK-RV64-NEXT:    addi a0, a0, 1
19047; CHECK-RV64-NEXT:    slli a2, a1, 43
19048; CHECK-RV64-NEXT:    bltz a2, .LBB61_981
19049; CHECK-RV64-NEXT:    j .LBB61_483
19050; CHECK-RV64-NEXT:  .LBB61_981: # %cond.load1869
19051; CHECK-RV64-NEXT:    lbu a2, 0(a0)
19052; CHECK-RV64-NEXT:    li a3, 512
19053; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
19054; CHECK-RV64-NEXT:    vmv.s.x v16, a2
19055; CHECK-RV64-NEXT:    li a2, 469
19056; CHECK-RV64-NEXT:    li a3, 468
19057; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
19058; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
19059; CHECK-RV64-NEXT:    addi a0, a0, 1
19060; CHECK-RV64-NEXT:    slli a2, a1, 42
19061; CHECK-RV64-NEXT:    bltz a2, .LBB61_982
19062; CHECK-RV64-NEXT:    j .LBB61_484
19063; CHECK-RV64-NEXT:  .LBB61_982: # %cond.load1873
19064; CHECK-RV64-NEXT:    lbu a2, 0(a0)
19065; CHECK-RV64-NEXT:    li a3, 512
19066; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
19067; CHECK-RV64-NEXT:    vmv.s.x v16, a2
19068; CHECK-RV64-NEXT:    li a2, 470
19069; CHECK-RV64-NEXT:    li a3, 469
19070; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
19071; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
19072; CHECK-RV64-NEXT:    addi a0, a0, 1
19073; CHECK-RV64-NEXT:    slli a2, a1, 41
19074; CHECK-RV64-NEXT:    bltz a2, .LBB61_983
19075; CHECK-RV64-NEXT:    j .LBB61_485
19076; CHECK-RV64-NEXT:  .LBB61_983: # %cond.load1877
19077; CHECK-RV64-NEXT:    lbu a2, 0(a0)
19078; CHECK-RV64-NEXT:    li a3, 512
19079; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
19080; CHECK-RV64-NEXT:    vmv.s.x v16, a2
19081; CHECK-RV64-NEXT:    li a2, 471
19082; CHECK-RV64-NEXT:    li a3, 470
19083; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
19084; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
19085; CHECK-RV64-NEXT:    addi a0, a0, 1
19086; CHECK-RV64-NEXT:    slli a2, a1, 40
19087; CHECK-RV64-NEXT:    bltz a2, .LBB61_984
19088; CHECK-RV64-NEXT:    j .LBB61_486
19089; CHECK-RV64-NEXT:  .LBB61_984: # %cond.load1881
19090; CHECK-RV64-NEXT:    lbu a2, 0(a0)
19091; CHECK-RV64-NEXT:    li a3, 512
19092; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
19093; CHECK-RV64-NEXT:    vmv.s.x v16, a2
19094; CHECK-RV64-NEXT:    li a2, 472
19095; CHECK-RV64-NEXT:    li a3, 471
19096; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
19097; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
19098; CHECK-RV64-NEXT:    addi a0, a0, 1
19099; CHECK-RV64-NEXT:    slli a2, a1, 39
19100; CHECK-RV64-NEXT:    bltz a2, .LBB61_985
19101; CHECK-RV64-NEXT:    j .LBB61_487
19102; CHECK-RV64-NEXT:  .LBB61_985: # %cond.load1885
19103; CHECK-RV64-NEXT:    lbu a2, 0(a0)
19104; CHECK-RV64-NEXT:    li a3, 512
19105; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
19106; CHECK-RV64-NEXT:    vmv.s.x v16, a2
19107; CHECK-RV64-NEXT:    li a2, 473
19108; CHECK-RV64-NEXT:    li a3, 472
19109; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
19110; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
19111; CHECK-RV64-NEXT:    addi a0, a0, 1
19112; CHECK-RV64-NEXT:    slli a2, a1, 38
19113; CHECK-RV64-NEXT:    bltz a2, .LBB61_986
19114; CHECK-RV64-NEXT:    j .LBB61_488
19115; CHECK-RV64-NEXT:  .LBB61_986: # %cond.load1889
19116; CHECK-RV64-NEXT:    lbu a2, 0(a0)
19117; CHECK-RV64-NEXT:    li a3, 512
19118; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
19119; CHECK-RV64-NEXT:    vmv.s.x v16, a2
19120; CHECK-RV64-NEXT:    li a2, 474
19121; CHECK-RV64-NEXT:    li a3, 473
19122; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
19123; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
19124; CHECK-RV64-NEXT:    addi a0, a0, 1
19125; CHECK-RV64-NEXT:    slli a2, a1, 37
19126; CHECK-RV64-NEXT:    bltz a2, .LBB61_987
19127; CHECK-RV64-NEXT:    j .LBB61_489
19128; CHECK-RV64-NEXT:  .LBB61_987: # %cond.load1893
19129; CHECK-RV64-NEXT:    lbu a2, 0(a0)
19130; CHECK-RV64-NEXT:    li a3, 512
19131; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
19132; CHECK-RV64-NEXT:    vmv.s.x v16, a2
19133; CHECK-RV64-NEXT:    li a2, 475
19134; CHECK-RV64-NEXT:    li a3, 474
19135; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
19136; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
19137; CHECK-RV64-NEXT:    addi a0, a0, 1
19138; CHECK-RV64-NEXT:    slli a2, a1, 36
19139; CHECK-RV64-NEXT:    bltz a2, .LBB61_988
19140; CHECK-RV64-NEXT:    j .LBB61_490
19141; CHECK-RV64-NEXT:  .LBB61_988: # %cond.load1897
19142; CHECK-RV64-NEXT:    lbu a2, 0(a0)
19143; CHECK-RV64-NEXT:    li a3, 512
19144; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
19145; CHECK-RV64-NEXT:    vmv.s.x v16, a2
19146; CHECK-RV64-NEXT:    li a2, 476
19147; CHECK-RV64-NEXT:    li a3, 475
19148; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
19149; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
19150; CHECK-RV64-NEXT:    addi a0, a0, 1
19151; CHECK-RV64-NEXT:    slli a2, a1, 35
19152; CHECK-RV64-NEXT:    bltz a2, .LBB61_989
19153; CHECK-RV64-NEXT:    j .LBB61_491
19154; CHECK-RV64-NEXT:  .LBB61_989: # %cond.load1901
19155; CHECK-RV64-NEXT:    lbu a2, 0(a0)
19156; CHECK-RV64-NEXT:    li a3, 512
19157; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
19158; CHECK-RV64-NEXT:    vmv.s.x v16, a2
19159; CHECK-RV64-NEXT:    li a2, 477
19160; CHECK-RV64-NEXT:    li a3, 476
19161; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
19162; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
19163; CHECK-RV64-NEXT:    addi a0, a0, 1
19164; CHECK-RV64-NEXT:    slli a2, a1, 34
19165; CHECK-RV64-NEXT:    bltz a2, .LBB61_990
19166; CHECK-RV64-NEXT:    j .LBB61_492
19167; CHECK-RV64-NEXT:  .LBB61_990: # %cond.load1905
19168; CHECK-RV64-NEXT:    lbu a2, 0(a0)
19169; CHECK-RV64-NEXT:    li a3, 512
19170; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
19171; CHECK-RV64-NEXT:    vmv.s.x v16, a2
19172; CHECK-RV64-NEXT:    li a2, 478
19173; CHECK-RV64-NEXT:    li a3, 477
19174; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
19175; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
19176; CHECK-RV64-NEXT:    addi a0, a0, 1
19177; CHECK-RV64-NEXT:    slli a2, a1, 33
19178; CHECK-RV64-NEXT:    bltz a2, .LBB61_991
19179; CHECK-RV64-NEXT:    j .LBB61_493
19180; CHECK-RV64-NEXT:  .LBB61_991: # %cond.load1909
19181; CHECK-RV64-NEXT:    lbu a2, 0(a0)
19182; CHECK-RV64-NEXT:    li a3, 512
19183; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
19184; CHECK-RV64-NEXT:    vmv.s.x v16, a2
19185; CHECK-RV64-NEXT:    li a2, 479
19186; CHECK-RV64-NEXT:    li a3, 478
19187; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
19188; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
19189; CHECK-RV64-NEXT:    addi a0, a0, 1
19190; CHECK-RV64-NEXT:    slli a2, a1, 32
19191; CHECK-RV64-NEXT:    bltz a2, .LBB61_992
19192; CHECK-RV64-NEXT:    j .LBB61_494
19193; CHECK-RV64-NEXT:  .LBB61_992: # %cond.load1913
19194; CHECK-RV64-NEXT:    lbu a2, 0(a0)
19195; CHECK-RV64-NEXT:    li a3, 512
19196; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
19197; CHECK-RV64-NEXT:    vmv.s.x v16, a2
19198; CHECK-RV64-NEXT:    li a2, 480
19199; CHECK-RV64-NEXT:    li a3, 479
19200; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
19201; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
19202; CHECK-RV64-NEXT:    addi a0, a0, 1
19203; CHECK-RV64-NEXT:    slli a2, a1, 31
19204; CHECK-RV64-NEXT:    bltz a2, .LBB61_993
19205; CHECK-RV64-NEXT:    j .LBB61_495
19206; CHECK-RV64-NEXT:  .LBB61_993: # %cond.load1917
19207; CHECK-RV64-NEXT:    lbu a2, 0(a0)
19208; CHECK-RV64-NEXT:    li a3, 512
19209; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
19210; CHECK-RV64-NEXT:    vmv.s.x v16, a2
19211; CHECK-RV64-NEXT:    li a2, 481
19212; CHECK-RV64-NEXT:    li a3, 480
19213; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
19214; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
19215; CHECK-RV64-NEXT:    addi a0, a0, 1
19216; CHECK-RV64-NEXT:    slli a2, a1, 30
19217; CHECK-RV64-NEXT:    bltz a2, .LBB61_994
19218; CHECK-RV64-NEXT:    j .LBB61_496
19219; CHECK-RV64-NEXT:  .LBB61_994: # %cond.load1921
19220; CHECK-RV64-NEXT:    lbu a2, 0(a0)
19221; CHECK-RV64-NEXT:    li a3, 512
19222; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
19223; CHECK-RV64-NEXT:    vmv.s.x v16, a2
19224; CHECK-RV64-NEXT:    li a2, 482
19225; CHECK-RV64-NEXT:    li a3, 481
19226; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
19227; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
19228; CHECK-RV64-NEXT:    addi a0, a0, 1
19229; CHECK-RV64-NEXT:    slli a2, a1, 29
19230; CHECK-RV64-NEXT:    bltz a2, .LBB61_995
19231; CHECK-RV64-NEXT:    j .LBB61_497
19232; CHECK-RV64-NEXT:  .LBB61_995: # %cond.load1925
19233; CHECK-RV64-NEXT:    lbu a2, 0(a0)
19234; CHECK-RV64-NEXT:    li a3, 512
19235; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
19236; CHECK-RV64-NEXT:    vmv.s.x v16, a2
19237; CHECK-RV64-NEXT:    li a2, 483
19238; CHECK-RV64-NEXT:    li a3, 482
19239; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
19240; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
19241; CHECK-RV64-NEXT:    addi a0, a0, 1
19242; CHECK-RV64-NEXT:    slli a2, a1, 28
19243; CHECK-RV64-NEXT:    bltz a2, .LBB61_996
19244; CHECK-RV64-NEXT:    j .LBB61_498
19245; CHECK-RV64-NEXT:  .LBB61_996: # %cond.load1929
19246; CHECK-RV64-NEXT:    lbu a2, 0(a0)
19247; CHECK-RV64-NEXT:    li a3, 512
19248; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
19249; CHECK-RV64-NEXT:    vmv.s.x v16, a2
19250; CHECK-RV64-NEXT:    li a2, 484
19251; CHECK-RV64-NEXT:    li a3, 483
19252; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
19253; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
19254; CHECK-RV64-NEXT:    addi a0, a0, 1
19255; CHECK-RV64-NEXT:    slli a2, a1, 27
19256; CHECK-RV64-NEXT:    bltz a2, .LBB61_997
19257; CHECK-RV64-NEXT:    j .LBB61_499
19258; CHECK-RV64-NEXT:  .LBB61_997: # %cond.load1933
19259; CHECK-RV64-NEXT:    lbu a2, 0(a0)
19260; CHECK-RV64-NEXT:    li a3, 512
19261; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
19262; CHECK-RV64-NEXT:    vmv.s.x v16, a2
19263; CHECK-RV64-NEXT:    li a2, 485
19264; CHECK-RV64-NEXT:    li a3, 484
19265; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
19266; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
19267; CHECK-RV64-NEXT:    addi a0, a0, 1
19268; CHECK-RV64-NEXT:    slli a2, a1, 26
19269; CHECK-RV64-NEXT:    bltz a2, .LBB61_998
19270; CHECK-RV64-NEXT:    j .LBB61_500
19271; CHECK-RV64-NEXT:  .LBB61_998: # %cond.load1937
19272; CHECK-RV64-NEXT:    lbu a2, 0(a0)
19273; CHECK-RV64-NEXT:    li a3, 512
19274; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
19275; CHECK-RV64-NEXT:    vmv.s.x v16, a2
19276; CHECK-RV64-NEXT:    li a2, 486
19277; CHECK-RV64-NEXT:    li a3, 485
19278; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
19279; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
19280; CHECK-RV64-NEXT:    addi a0, a0, 1
19281; CHECK-RV64-NEXT:    slli a2, a1, 25
19282; CHECK-RV64-NEXT:    bltz a2, .LBB61_999
19283; CHECK-RV64-NEXT:    j .LBB61_501
19284; CHECK-RV64-NEXT:  .LBB61_999: # %cond.load1941
19285; CHECK-RV64-NEXT:    lbu a2, 0(a0)
19286; CHECK-RV64-NEXT:    li a3, 512
19287; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
19288; CHECK-RV64-NEXT:    vmv.s.x v16, a2
19289; CHECK-RV64-NEXT:    li a2, 487
19290; CHECK-RV64-NEXT:    li a3, 486
19291; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
19292; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
19293; CHECK-RV64-NEXT:    addi a0, a0, 1
19294; CHECK-RV64-NEXT:    slli a2, a1, 24
19295; CHECK-RV64-NEXT:    bltz a2, .LBB61_1000
19296; CHECK-RV64-NEXT:    j .LBB61_502
19297; CHECK-RV64-NEXT:  .LBB61_1000: # %cond.load1945
19298; CHECK-RV64-NEXT:    lbu a2, 0(a0)
19299; CHECK-RV64-NEXT:    li a3, 512
19300; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
19301; CHECK-RV64-NEXT:    vmv.s.x v16, a2
19302; CHECK-RV64-NEXT:    li a2, 488
19303; CHECK-RV64-NEXT:    li a3, 487
19304; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
19305; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
19306; CHECK-RV64-NEXT:    addi a0, a0, 1
19307; CHECK-RV64-NEXT:    slli a2, a1, 23
19308; CHECK-RV64-NEXT:    bltz a2, .LBB61_1001
19309; CHECK-RV64-NEXT:    j .LBB61_503
19310; CHECK-RV64-NEXT:  .LBB61_1001: # %cond.load1949
19311; CHECK-RV64-NEXT:    lbu a2, 0(a0)
19312; CHECK-RV64-NEXT:    li a3, 512
19313; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
19314; CHECK-RV64-NEXT:    vmv.s.x v16, a2
19315; CHECK-RV64-NEXT:    li a2, 489
19316; CHECK-RV64-NEXT:    li a3, 488
19317; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
19318; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
19319; CHECK-RV64-NEXT:    addi a0, a0, 1
19320; CHECK-RV64-NEXT:    slli a2, a1, 22
19321; CHECK-RV64-NEXT:    bltz a2, .LBB61_1002
19322; CHECK-RV64-NEXT:    j .LBB61_504
19323; CHECK-RV64-NEXT:  .LBB61_1002: # %cond.load1953
19324; CHECK-RV64-NEXT:    lbu a2, 0(a0)
19325; CHECK-RV64-NEXT:    li a3, 512
19326; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
19327; CHECK-RV64-NEXT:    vmv.s.x v16, a2
19328; CHECK-RV64-NEXT:    li a2, 490
19329; CHECK-RV64-NEXT:    li a3, 489
19330; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
19331; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
19332; CHECK-RV64-NEXT:    addi a0, a0, 1
19333; CHECK-RV64-NEXT:    slli a2, a1, 21
19334; CHECK-RV64-NEXT:    bltz a2, .LBB61_1003
19335; CHECK-RV64-NEXT:    j .LBB61_505
19336; CHECK-RV64-NEXT:  .LBB61_1003: # %cond.load1957
19337; CHECK-RV64-NEXT:    lbu a2, 0(a0)
19338; CHECK-RV64-NEXT:    li a3, 512
19339; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
19340; CHECK-RV64-NEXT:    vmv.s.x v16, a2
19341; CHECK-RV64-NEXT:    li a2, 491
19342; CHECK-RV64-NEXT:    li a3, 490
19343; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
19344; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
19345; CHECK-RV64-NEXT:    addi a0, a0, 1
19346; CHECK-RV64-NEXT:    slli a2, a1, 20
19347; CHECK-RV64-NEXT:    bltz a2, .LBB61_1004
19348; CHECK-RV64-NEXT:    j .LBB61_506
19349; CHECK-RV64-NEXT:  .LBB61_1004: # %cond.load1961
19350; CHECK-RV64-NEXT:    lbu a2, 0(a0)
19351; CHECK-RV64-NEXT:    li a3, 512
19352; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
19353; CHECK-RV64-NEXT:    vmv.s.x v16, a2
19354; CHECK-RV64-NEXT:    li a2, 492
19355; CHECK-RV64-NEXT:    li a3, 491
19356; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
19357; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
19358; CHECK-RV64-NEXT:    addi a0, a0, 1
19359; CHECK-RV64-NEXT:    slli a2, a1, 19
19360; CHECK-RV64-NEXT:    bltz a2, .LBB61_1005
19361; CHECK-RV64-NEXT:    j .LBB61_507
19362; CHECK-RV64-NEXT:  .LBB61_1005: # %cond.load1965
19363; CHECK-RV64-NEXT:    lbu a2, 0(a0)
19364; CHECK-RV64-NEXT:    li a3, 512
19365; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
19366; CHECK-RV64-NEXT:    vmv.s.x v16, a2
19367; CHECK-RV64-NEXT:    li a2, 493
19368; CHECK-RV64-NEXT:    li a3, 492
19369; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
19370; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
19371; CHECK-RV64-NEXT:    addi a0, a0, 1
19372; CHECK-RV64-NEXT:    slli a2, a1, 18
19373; CHECK-RV64-NEXT:    bltz a2, .LBB61_1006
19374; CHECK-RV64-NEXT:    j .LBB61_508
19375; CHECK-RV64-NEXT:  .LBB61_1006: # %cond.load1969
19376; CHECK-RV64-NEXT:    lbu a2, 0(a0)
19377; CHECK-RV64-NEXT:    li a3, 512
19378; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
19379; CHECK-RV64-NEXT:    vmv.s.x v16, a2
19380; CHECK-RV64-NEXT:    li a2, 494
19381; CHECK-RV64-NEXT:    li a3, 493
19382; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
19383; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
19384; CHECK-RV64-NEXT:    addi a0, a0, 1
19385; CHECK-RV64-NEXT:    slli a2, a1, 17
19386; CHECK-RV64-NEXT:    bltz a2, .LBB61_1007
19387; CHECK-RV64-NEXT:    j .LBB61_509
19388; CHECK-RV64-NEXT:  .LBB61_1007: # %cond.load1973
19389; CHECK-RV64-NEXT:    lbu a2, 0(a0)
19390; CHECK-RV64-NEXT:    li a3, 512
19391; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
19392; CHECK-RV64-NEXT:    vmv.s.x v16, a2
19393; CHECK-RV64-NEXT:    li a2, 495
19394; CHECK-RV64-NEXT:    li a3, 494
19395; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
19396; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
19397; CHECK-RV64-NEXT:    addi a0, a0, 1
19398; CHECK-RV64-NEXT:    slli a2, a1, 16
19399; CHECK-RV64-NEXT:    bltz a2, .LBB61_1008
19400; CHECK-RV64-NEXT:    j .LBB61_510
19401; CHECK-RV64-NEXT:  .LBB61_1008: # %cond.load1977
19402; CHECK-RV64-NEXT:    lbu a2, 0(a0)
19403; CHECK-RV64-NEXT:    li a3, 512
19404; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
19405; CHECK-RV64-NEXT:    vmv.s.x v16, a2
19406; CHECK-RV64-NEXT:    li a2, 496
19407; CHECK-RV64-NEXT:    li a3, 495
19408; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
19409; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
19410; CHECK-RV64-NEXT:    addi a0, a0, 1
19411; CHECK-RV64-NEXT:    slli a2, a1, 15
19412; CHECK-RV64-NEXT:    bltz a2, .LBB61_1009
19413; CHECK-RV64-NEXT:    j .LBB61_511
19414; CHECK-RV64-NEXT:  .LBB61_1009: # %cond.load1981
19415; CHECK-RV64-NEXT:    lbu a2, 0(a0)
19416; CHECK-RV64-NEXT:    li a3, 512
19417; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
19418; CHECK-RV64-NEXT:    vmv.s.x v16, a2
19419; CHECK-RV64-NEXT:    li a2, 497
19420; CHECK-RV64-NEXT:    li a3, 496
19421; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
19422; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
19423; CHECK-RV64-NEXT:    addi a0, a0, 1
19424; CHECK-RV64-NEXT:    slli a2, a1, 14
19425; CHECK-RV64-NEXT:    bltz a2, .LBB61_1010
19426; CHECK-RV64-NEXT:    j .LBB61_512
19427; CHECK-RV64-NEXT:  .LBB61_1010: # %cond.load1985
19428; CHECK-RV64-NEXT:    lbu a2, 0(a0)
19429; CHECK-RV64-NEXT:    li a3, 512
19430; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
19431; CHECK-RV64-NEXT:    vmv.s.x v16, a2
19432; CHECK-RV64-NEXT:    li a2, 498
19433; CHECK-RV64-NEXT:    li a3, 497
19434; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
19435; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
19436; CHECK-RV64-NEXT:    addi a0, a0, 1
19437; CHECK-RV64-NEXT:    slli a2, a1, 13
19438; CHECK-RV64-NEXT:    bltz a2, .LBB61_1011
19439; CHECK-RV64-NEXT:    j .LBB61_513
19440; CHECK-RV64-NEXT:  .LBB61_1011: # %cond.load1989
19441; CHECK-RV64-NEXT:    lbu a2, 0(a0)
19442; CHECK-RV64-NEXT:    li a3, 512
19443; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
19444; CHECK-RV64-NEXT:    vmv.s.x v16, a2
19445; CHECK-RV64-NEXT:    li a2, 499
19446; CHECK-RV64-NEXT:    li a3, 498
19447; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
19448; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
19449; CHECK-RV64-NEXT:    addi a0, a0, 1
19450; CHECK-RV64-NEXT:    slli a2, a1, 12
19451; CHECK-RV64-NEXT:    bltz a2, .LBB61_1012
19452; CHECK-RV64-NEXT:    j .LBB61_514
19453; CHECK-RV64-NEXT:  .LBB61_1012: # %cond.load1993
19454; CHECK-RV64-NEXT:    lbu a2, 0(a0)
19455; CHECK-RV64-NEXT:    li a3, 512
19456; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
19457; CHECK-RV64-NEXT:    vmv.s.x v16, a2
19458; CHECK-RV64-NEXT:    li a2, 500
19459; CHECK-RV64-NEXT:    li a3, 499
19460; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
19461; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
19462; CHECK-RV64-NEXT:    addi a0, a0, 1
19463; CHECK-RV64-NEXT:    slli a2, a1, 11
19464; CHECK-RV64-NEXT:    bltz a2, .LBB61_1013
19465; CHECK-RV64-NEXT:    j .LBB61_515
19466; CHECK-RV64-NEXT:  .LBB61_1013: # %cond.load1997
19467; CHECK-RV64-NEXT:    lbu a2, 0(a0)
19468; CHECK-RV64-NEXT:    li a3, 512
19469; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
19470; CHECK-RV64-NEXT:    vmv.s.x v16, a2
19471; CHECK-RV64-NEXT:    li a2, 501
19472; CHECK-RV64-NEXT:    li a3, 500
19473; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
19474; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
19475; CHECK-RV64-NEXT:    addi a0, a0, 1
19476; CHECK-RV64-NEXT:    slli a2, a1, 10
19477; CHECK-RV64-NEXT:    bltz a2, .LBB61_1014
19478; CHECK-RV64-NEXT:    j .LBB61_516
19479; CHECK-RV64-NEXT:  .LBB61_1014: # %cond.load2001
19480; CHECK-RV64-NEXT:    lbu a2, 0(a0)
19481; CHECK-RV64-NEXT:    li a3, 512
19482; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
19483; CHECK-RV64-NEXT:    vmv.s.x v16, a2
19484; CHECK-RV64-NEXT:    li a2, 502
19485; CHECK-RV64-NEXT:    li a3, 501
19486; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
19487; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
19488; CHECK-RV64-NEXT:    addi a0, a0, 1
19489; CHECK-RV64-NEXT:    slli a2, a1, 9
19490; CHECK-RV64-NEXT:    bltz a2, .LBB61_1015
19491; CHECK-RV64-NEXT:    j .LBB61_517
19492; CHECK-RV64-NEXT:  .LBB61_1015: # %cond.load2005
19493; CHECK-RV64-NEXT:    lbu a2, 0(a0)
19494; CHECK-RV64-NEXT:    li a3, 512
19495; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
19496; CHECK-RV64-NEXT:    vmv.s.x v16, a2
19497; CHECK-RV64-NEXT:    li a2, 503
19498; CHECK-RV64-NEXT:    li a3, 502
19499; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
19500; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
19501; CHECK-RV64-NEXT:    addi a0, a0, 1
19502; CHECK-RV64-NEXT:    slli a2, a1, 8
19503; CHECK-RV64-NEXT:    bltz a2, .LBB61_1016
19504; CHECK-RV64-NEXT:    j .LBB61_518
19505; CHECK-RV64-NEXT:  .LBB61_1016: # %cond.load2009
19506; CHECK-RV64-NEXT:    lbu a2, 0(a0)
19507; CHECK-RV64-NEXT:    li a3, 512
19508; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
19509; CHECK-RV64-NEXT:    vmv.s.x v16, a2
19510; CHECK-RV64-NEXT:    li a2, 504
19511; CHECK-RV64-NEXT:    li a3, 503
19512; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
19513; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
19514; CHECK-RV64-NEXT:    addi a0, a0, 1
19515; CHECK-RV64-NEXT:    slli a2, a1, 7
19516; CHECK-RV64-NEXT:    bltz a2, .LBB61_1017
19517; CHECK-RV64-NEXT:    j .LBB61_519
19518; CHECK-RV64-NEXT:  .LBB61_1017: # %cond.load2013
19519; CHECK-RV64-NEXT:    lbu a2, 0(a0)
19520; CHECK-RV64-NEXT:    li a3, 512
19521; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
19522; CHECK-RV64-NEXT:    vmv.s.x v16, a2
19523; CHECK-RV64-NEXT:    li a2, 505
19524; CHECK-RV64-NEXT:    li a3, 504
19525; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
19526; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
19527; CHECK-RV64-NEXT:    addi a0, a0, 1
19528; CHECK-RV64-NEXT:    slli a2, a1, 6
19529; CHECK-RV64-NEXT:    bltz a2, .LBB61_1018
19530; CHECK-RV64-NEXT:    j .LBB61_520
19531; CHECK-RV64-NEXT:  .LBB61_1018: # %cond.load2017
19532; CHECK-RV64-NEXT:    lbu a2, 0(a0)
19533; CHECK-RV64-NEXT:    li a3, 512
19534; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
19535; CHECK-RV64-NEXT:    vmv.s.x v16, a2
19536; CHECK-RV64-NEXT:    li a2, 506
19537; CHECK-RV64-NEXT:    li a3, 505
19538; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
19539; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
19540; CHECK-RV64-NEXT:    addi a0, a0, 1
19541; CHECK-RV64-NEXT:    slli a2, a1, 5
19542; CHECK-RV64-NEXT:    bltz a2, .LBB61_1019
19543; CHECK-RV64-NEXT:    j .LBB61_521
19544; CHECK-RV64-NEXT:  .LBB61_1019: # %cond.load2021
19545; CHECK-RV64-NEXT:    lbu a2, 0(a0)
19546; CHECK-RV64-NEXT:    li a3, 512
19547; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
19548; CHECK-RV64-NEXT:    vmv.s.x v16, a2
19549; CHECK-RV64-NEXT:    li a2, 507
19550; CHECK-RV64-NEXT:    li a3, 506
19551; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
19552; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
19553; CHECK-RV64-NEXT:    addi a0, a0, 1
19554; CHECK-RV64-NEXT:    slli a2, a1, 4
19555; CHECK-RV64-NEXT:    bltz a2, .LBB61_1020
19556; CHECK-RV64-NEXT:    j .LBB61_522
19557; CHECK-RV64-NEXT:  .LBB61_1020: # %cond.load2025
19558; CHECK-RV64-NEXT:    lbu a2, 0(a0)
19559; CHECK-RV64-NEXT:    li a3, 512
19560; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
19561; CHECK-RV64-NEXT:    vmv.s.x v16, a2
19562; CHECK-RV64-NEXT:    li a2, 508
19563; CHECK-RV64-NEXT:    li a3, 507
19564; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
19565; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
19566; CHECK-RV64-NEXT:    addi a0, a0, 1
19567; CHECK-RV64-NEXT:    slli a2, a1, 3
19568; CHECK-RV64-NEXT:    bltz a2, .LBB61_1021
19569; CHECK-RV64-NEXT:    j .LBB61_523
19570; CHECK-RV64-NEXT:  .LBB61_1021: # %cond.load2029
19571; CHECK-RV64-NEXT:    lbu a2, 0(a0)
19572; CHECK-RV64-NEXT:    li a3, 512
19573; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
19574; CHECK-RV64-NEXT:    vmv.s.x v16, a2
19575; CHECK-RV64-NEXT:    li a2, 509
19576; CHECK-RV64-NEXT:    li a3, 508
19577; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
19578; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
19579; CHECK-RV64-NEXT:    addi a0, a0, 1
19580; CHECK-RV64-NEXT:    slli a2, a1, 2
19581; CHECK-RV64-NEXT:    bltz a2, .LBB61_1022
19582; CHECK-RV64-NEXT:    j .LBB61_524
19583; CHECK-RV64-NEXT:  .LBB61_1022: # %cond.load2033
19584; CHECK-RV64-NEXT:    lbu a2, 0(a0)
19585; CHECK-RV64-NEXT:    li a3, 512
19586; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
19587; CHECK-RV64-NEXT:    vmv.s.x v16, a2
19588; CHECK-RV64-NEXT:    li a2, 510
19589; CHECK-RV64-NEXT:    li a3, 509
19590; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
19591; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
19592; CHECK-RV64-NEXT:    addi a0, a0, 1
19593; CHECK-RV64-NEXT:    slli a2, a1, 1
19594; CHECK-RV64-NEXT:    bltz a2, .LBB61_1023
19595; CHECK-RV64-NEXT:    j .LBB61_525
19596; CHECK-RV64-NEXT:  .LBB61_1023: # %cond.load2037
19597; CHECK-RV64-NEXT:    lbu a2, 0(a0)
19598; CHECK-RV64-NEXT:    li a3, 512
19599; CHECK-RV64-NEXT:    vsetvli zero, a3, e8, m1, ta, ma
19600; CHECK-RV64-NEXT:    vmv.s.x v16, a2
19601; CHECK-RV64-NEXT:    li a2, 511
19602; CHECK-RV64-NEXT:    li a3, 510
19603; CHECK-RV64-NEXT:    vsetvli zero, a2, e8, m8, tu, ma
19604; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a3
19605; CHECK-RV64-NEXT:    addi a0, a0, 1
19606; CHECK-RV64-NEXT:    bltz a1, .LBB61_1024
19607; CHECK-RV64-NEXT:    j .LBB61_526
19608; CHECK-RV64-NEXT:  .LBB61_1024: # %cond.load2041
19609; CHECK-RV64-NEXT:    lbu a0, 0(a0)
19610; CHECK-RV64-NEXT:    li a1, 512
19611; CHECK-RV64-NEXT:    vsetvli zero, a1, e8, m8, ta, ma
19612; CHECK-RV64-NEXT:    vmv.s.x v16, a0
19613; CHECK-RV64-NEXT:    li a0, 511
19614; CHECK-RV64-NEXT:    vslideup.vx v8, v16, a0
19615; CHECK-RV64-NEXT:    ret
19616  %res = call <512 x i8> @llvm.masked.expandload.v512i8(ptr align 1 %base, <512 x i1> %mask, <512 x i8> %passthru)
19617  ret <512 x i8> %res
19618}
19619