xref: /llvm-project/llvm/test/CodeGen/RISCV/rvv/ctlz-sdnode.ll (revision 9122c5235ec85ce0c0ad337e862b006e7b349d84) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=riscv32 -mattr=+zve64x -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,CHECK-ZVE64X,RV32,RV32I
3; RUN: llc -mtriple=riscv64 -mattr=+zve64x -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,CHECK-ZVE64X,RV64,RV64I
4; RUN: llc -mtriple=riscv32 -mattr=+zve64f,+f -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,CHECK-F,RV32F
5; RUN: llc -mtriple=riscv64 -mattr=+zve64f,+f -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,CHECK-F,RV64F
6; RUN: llc -mtriple=riscv32 -mattr=+v,+d -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,CHECK-D,RV32
7; RUN: llc -mtriple=riscv64 -mattr=+v,+d -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,CHECK-D,RV64
8; RUN: llc -mtriple=riscv32 -mattr=+v,+zvbb -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK-ZVBB
9; RUN: llc -mtriple=riscv64 -mattr=+v,+zvbb -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK-ZVBB
10
11define <vscale x 1 x i8> @ctlz_nxv1i8(<vscale x 1 x i8> %va) {
12; CHECK-ZVE64X-LABEL: ctlz_nxv1i8:
13; CHECK-ZVE64X:       # %bb.0:
14; CHECK-ZVE64X-NEXT:    vsetvli a0, zero, e8, mf8, ta, ma
15; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 1
16; CHECK-ZVE64X-NEXT:    li a0, 85
17; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v9
18; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 2
19; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v9
20; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 4
21; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v9
22; CHECK-ZVE64X-NEXT:    vnot.v v8, v8
23; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 1
24; CHECK-ZVE64X-NEXT:    vand.vx v9, v9, a0
25; CHECK-ZVE64X-NEXT:    li a0, 51
26; CHECK-ZVE64X-NEXT:    vsub.vv v8, v8, v9
27; CHECK-ZVE64X-NEXT:    vand.vx v9, v8, a0
28; CHECK-ZVE64X-NEXT:    vsrl.vi v8, v8, 2
29; CHECK-ZVE64X-NEXT:    vand.vx v8, v8, a0
30; CHECK-ZVE64X-NEXT:    vadd.vv v8, v9, v8
31; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 4
32; CHECK-ZVE64X-NEXT:    vadd.vv v8, v8, v9
33; CHECK-ZVE64X-NEXT:    vand.vi v8, v8, 15
34; CHECK-ZVE64X-NEXT:    ret
35;
36; CHECK-F-LABEL: ctlz_nxv1i8:
37; CHECK-F:       # %bb.0:
38; CHECK-F-NEXT:    vsetvli a0, zero, e16, mf4, ta, ma
39; CHECK-F-NEXT:    vzext.vf2 v9, v8
40; CHECK-F-NEXT:    li a0, 134
41; CHECK-F-NEXT:    vfwcvt.f.xu.v v8, v9
42; CHECK-F-NEXT:    vnsrl.wi v8, v8, 23
43; CHECK-F-NEXT:    vsetvli zero, zero, e8, mf8, ta, ma
44; CHECK-F-NEXT:    vnsrl.wi v8, v8, 0
45; CHECK-F-NEXT:    vrsub.vx v8, v8, a0
46; CHECK-F-NEXT:    li a0, 8
47; CHECK-F-NEXT:    vminu.vx v8, v8, a0
48; CHECK-F-NEXT:    ret
49;
50; CHECK-D-LABEL: ctlz_nxv1i8:
51; CHECK-D:       # %bb.0:
52; CHECK-D-NEXT:    vsetvli a0, zero, e16, mf4, ta, ma
53; CHECK-D-NEXT:    vzext.vf2 v9, v8
54; CHECK-D-NEXT:    li a0, 134
55; CHECK-D-NEXT:    vfwcvt.f.xu.v v8, v9
56; CHECK-D-NEXT:    vnsrl.wi v8, v8, 23
57; CHECK-D-NEXT:    vsetvli zero, zero, e8, mf8, ta, ma
58; CHECK-D-NEXT:    vnsrl.wi v8, v8, 0
59; CHECK-D-NEXT:    vrsub.vx v8, v8, a0
60; CHECK-D-NEXT:    li a0, 8
61; CHECK-D-NEXT:    vminu.vx v8, v8, a0
62; CHECK-D-NEXT:    ret
63;
64; CHECK-ZVBB-LABEL: ctlz_nxv1i8:
65; CHECK-ZVBB:       # %bb.0:
66; CHECK-ZVBB-NEXT:    vsetvli a0, zero, e8, mf8, ta, ma
67; CHECK-ZVBB-NEXT:    vclz.v v8, v8
68; CHECK-ZVBB-NEXT:    ret
69  %a = call <vscale x 1 x i8> @llvm.ctlz.nxv1i8(<vscale x 1 x i8> %va, i1 false)
70  ret <vscale x 1 x i8> %a
71}
72declare <vscale x 1 x i8> @llvm.ctlz.nxv1i8(<vscale x 1 x i8>, i1)
73
74define <vscale x 2 x i8> @ctlz_nxv2i8(<vscale x 2 x i8> %va) {
75; CHECK-ZVE64X-LABEL: ctlz_nxv2i8:
76; CHECK-ZVE64X:       # %bb.0:
77; CHECK-ZVE64X-NEXT:    vsetvli a0, zero, e8, mf4, ta, ma
78; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 1
79; CHECK-ZVE64X-NEXT:    li a0, 85
80; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v9
81; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 2
82; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v9
83; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 4
84; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v9
85; CHECK-ZVE64X-NEXT:    vnot.v v8, v8
86; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 1
87; CHECK-ZVE64X-NEXT:    vand.vx v9, v9, a0
88; CHECK-ZVE64X-NEXT:    li a0, 51
89; CHECK-ZVE64X-NEXT:    vsub.vv v8, v8, v9
90; CHECK-ZVE64X-NEXT:    vand.vx v9, v8, a0
91; CHECK-ZVE64X-NEXT:    vsrl.vi v8, v8, 2
92; CHECK-ZVE64X-NEXT:    vand.vx v8, v8, a0
93; CHECK-ZVE64X-NEXT:    vadd.vv v8, v9, v8
94; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 4
95; CHECK-ZVE64X-NEXT:    vadd.vv v8, v8, v9
96; CHECK-ZVE64X-NEXT:    vand.vi v8, v8, 15
97; CHECK-ZVE64X-NEXT:    ret
98;
99; CHECK-F-LABEL: ctlz_nxv2i8:
100; CHECK-F:       # %bb.0:
101; CHECK-F-NEXT:    vsetvli a0, zero, e16, mf2, ta, ma
102; CHECK-F-NEXT:    vzext.vf2 v9, v8
103; CHECK-F-NEXT:    li a0, 134
104; CHECK-F-NEXT:    vfwcvt.f.xu.v v8, v9
105; CHECK-F-NEXT:    vnsrl.wi v8, v8, 23
106; CHECK-F-NEXT:    vsetvli zero, zero, e8, mf4, ta, ma
107; CHECK-F-NEXT:    vnsrl.wi v8, v8, 0
108; CHECK-F-NEXT:    vrsub.vx v8, v8, a0
109; CHECK-F-NEXT:    li a0, 8
110; CHECK-F-NEXT:    vminu.vx v8, v8, a0
111; CHECK-F-NEXT:    ret
112;
113; CHECK-D-LABEL: ctlz_nxv2i8:
114; CHECK-D:       # %bb.0:
115; CHECK-D-NEXT:    vsetvli a0, zero, e16, mf2, ta, ma
116; CHECK-D-NEXT:    vzext.vf2 v9, v8
117; CHECK-D-NEXT:    li a0, 134
118; CHECK-D-NEXT:    vfwcvt.f.xu.v v8, v9
119; CHECK-D-NEXT:    vnsrl.wi v8, v8, 23
120; CHECK-D-NEXT:    vsetvli zero, zero, e8, mf4, ta, ma
121; CHECK-D-NEXT:    vnsrl.wi v8, v8, 0
122; CHECK-D-NEXT:    vrsub.vx v8, v8, a0
123; CHECK-D-NEXT:    li a0, 8
124; CHECK-D-NEXT:    vminu.vx v8, v8, a0
125; CHECK-D-NEXT:    ret
126;
127; CHECK-ZVBB-LABEL: ctlz_nxv2i8:
128; CHECK-ZVBB:       # %bb.0:
129; CHECK-ZVBB-NEXT:    vsetvli a0, zero, e8, mf4, ta, ma
130; CHECK-ZVBB-NEXT:    vclz.v v8, v8
131; CHECK-ZVBB-NEXT:    ret
132  %a = call <vscale x 2 x i8> @llvm.ctlz.nxv2i8(<vscale x 2 x i8> %va, i1 false)
133  ret <vscale x 2 x i8> %a
134}
135declare <vscale x 2 x i8> @llvm.ctlz.nxv2i8(<vscale x 2 x i8>, i1)
136
137define <vscale x 4 x i8> @ctlz_nxv4i8(<vscale x 4 x i8> %va) {
138; CHECK-ZVE64X-LABEL: ctlz_nxv4i8:
139; CHECK-ZVE64X:       # %bb.0:
140; CHECK-ZVE64X-NEXT:    vsetvli a0, zero, e8, mf2, ta, ma
141; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 1
142; CHECK-ZVE64X-NEXT:    li a0, 85
143; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v9
144; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 2
145; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v9
146; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 4
147; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v9
148; CHECK-ZVE64X-NEXT:    vnot.v v8, v8
149; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 1
150; CHECK-ZVE64X-NEXT:    vand.vx v9, v9, a0
151; CHECK-ZVE64X-NEXT:    li a0, 51
152; CHECK-ZVE64X-NEXT:    vsub.vv v8, v8, v9
153; CHECK-ZVE64X-NEXT:    vand.vx v9, v8, a0
154; CHECK-ZVE64X-NEXT:    vsrl.vi v8, v8, 2
155; CHECK-ZVE64X-NEXT:    vand.vx v8, v8, a0
156; CHECK-ZVE64X-NEXT:    vadd.vv v8, v9, v8
157; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 4
158; CHECK-ZVE64X-NEXT:    vadd.vv v8, v8, v9
159; CHECK-ZVE64X-NEXT:    vand.vi v8, v8, 15
160; CHECK-ZVE64X-NEXT:    ret
161;
162; CHECK-F-LABEL: ctlz_nxv4i8:
163; CHECK-F:       # %bb.0:
164; CHECK-F-NEXT:    vsetvli a0, zero, e16, m1, ta, ma
165; CHECK-F-NEXT:    vzext.vf2 v9, v8
166; CHECK-F-NEXT:    li a0, 134
167; CHECK-F-NEXT:    vfwcvt.f.xu.v v10, v9
168; CHECK-F-NEXT:    vnsrl.wi v8, v10, 23
169; CHECK-F-NEXT:    vsetvli zero, zero, e8, mf2, ta, ma
170; CHECK-F-NEXT:    vnsrl.wi v8, v8, 0
171; CHECK-F-NEXT:    vrsub.vx v8, v8, a0
172; CHECK-F-NEXT:    li a0, 8
173; CHECK-F-NEXT:    vminu.vx v8, v8, a0
174; CHECK-F-NEXT:    ret
175;
176; CHECK-D-LABEL: ctlz_nxv4i8:
177; CHECK-D:       # %bb.0:
178; CHECK-D-NEXT:    vsetvli a0, zero, e16, m1, ta, ma
179; CHECK-D-NEXT:    vzext.vf2 v9, v8
180; CHECK-D-NEXT:    li a0, 134
181; CHECK-D-NEXT:    vfwcvt.f.xu.v v10, v9
182; CHECK-D-NEXT:    vnsrl.wi v8, v10, 23
183; CHECK-D-NEXT:    vsetvli zero, zero, e8, mf2, ta, ma
184; CHECK-D-NEXT:    vnsrl.wi v8, v8, 0
185; CHECK-D-NEXT:    vrsub.vx v8, v8, a0
186; CHECK-D-NEXT:    li a0, 8
187; CHECK-D-NEXT:    vminu.vx v8, v8, a0
188; CHECK-D-NEXT:    ret
189;
190; CHECK-ZVBB-LABEL: ctlz_nxv4i8:
191; CHECK-ZVBB:       # %bb.0:
192; CHECK-ZVBB-NEXT:    vsetvli a0, zero, e8, mf2, ta, ma
193; CHECK-ZVBB-NEXT:    vclz.v v8, v8
194; CHECK-ZVBB-NEXT:    ret
195  %a = call <vscale x 4 x i8> @llvm.ctlz.nxv4i8(<vscale x 4 x i8> %va, i1 false)
196  ret <vscale x 4 x i8> %a
197}
198declare <vscale x 4 x i8> @llvm.ctlz.nxv4i8(<vscale x 4 x i8>, i1)
199
200define <vscale x 8 x i8> @ctlz_nxv8i8(<vscale x 8 x i8> %va) {
201; CHECK-ZVE64X-LABEL: ctlz_nxv8i8:
202; CHECK-ZVE64X:       # %bb.0:
203; CHECK-ZVE64X-NEXT:    vsetvli a0, zero, e8, m1, ta, ma
204; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 1
205; CHECK-ZVE64X-NEXT:    li a0, 85
206; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v9
207; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 2
208; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v9
209; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 4
210; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v9
211; CHECK-ZVE64X-NEXT:    vnot.v v8, v8
212; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 1
213; CHECK-ZVE64X-NEXT:    vand.vx v9, v9, a0
214; CHECK-ZVE64X-NEXT:    li a0, 51
215; CHECK-ZVE64X-NEXT:    vsub.vv v8, v8, v9
216; CHECK-ZVE64X-NEXT:    vand.vx v9, v8, a0
217; CHECK-ZVE64X-NEXT:    vsrl.vi v8, v8, 2
218; CHECK-ZVE64X-NEXT:    vand.vx v8, v8, a0
219; CHECK-ZVE64X-NEXT:    vadd.vv v8, v9, v8
220; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 4
221; CHECK-ZVE64X-NEXT:    vadd.vv v8, v8, v9
222; CHECK-ZVE64X-NEXT:    vand.vi v8, v8, 15
223; CHECK-ZVE64X-NEXT:    ret
224;
225; CHECK-F-LABEL: ctlz_nxv8i8:
226; CHECK-F:       # %bb.0:
227; CHECK-F-NEXT:    vsetvli a0, zero, e16, m2, ta, ma
228; CHECK-F-NEXT:    vzext.vf2 v10, v8
229; CHECK-F-NEXT:    li a0, 134
230; CHECK-F-NEXT:    vfwcvt.f.xu.v v12, v10
231; CHECK-F-NEXT:    vnsrl.wi v8, v12, 23
232; CHECK-F-NEXT:    vsetvli zero, zero, e8, m1, ta, ma
233; CHECK-F-NEXT:    vnsrl.wi v10, v8, 0
234; CHECK-F-NEXT:    vrsub.vx v8, v10, a0
235; CHECK-F-NEXT:    li a0, 8
236; CHECK-F-NEXT:    vminu.vx v8, v8, a0
237; CHECK-F-NEXT:    ret
238;
239; CHECK-D-LABEL: ctlz_nxv8i8:
240; CHECK-D:       # %bb.0:
241; CHECK-D-NEXT:    vsetvli a0, zero, e16, m2, ta, ma
242; CHECK-D-NEXT:    vzext.vf2 v10, v8
243; CHECK-D-NEXT:    li a0, 134
244; CHECK-D-NEXT:    vfwcvt.f.xu.v v12, v10
245; CHECK-D-NEXT:    vnsrl.wi v8, v12, 23
246; CHECK-D-NEXT:    vsetvli zero, zero, e8, m1, ta, ma
247; CHECK-D-NEXT:    vnsrl.wi v10, v8, 0
248; CHECK-D-NEXT:    vrsub.vx v8, v10, a0
249; CHECK-D-NEXT:    li a0, 8
250; CHECK-D-NEXT:    vminu.vx v8, v8, a0
251; CHECK-D-NEXT:    ret
252;
253; CHECK-ZVBB-LABEL: ctlz_nxv8i8:
254; CHECK-ZVBB:       # %bb.0:
255; CHECK-ZVBB-NEXT:    vsetvli a0, zero, e8, m1, ta, ma
256; CHECK-ZVBB-NEXT:    vclz.v v8, v8
257; CHECK-ZVBB-NEXT:    ret
258  %a = call <vscale x 8 x i8> @llvm.ctlz.nxv8i8(<vscale x 8 x i8> %va, i1 false)
259  ret <vscale x 8 x i8> %a
260}
261declare <vscale x 8 x i8> @llvm.ctlz.nxv8i8(<vscale x 8 x i8>, i1)
262
263define <vscale x 16 x i8> @ctlz_nxv16i8(<vscale x 16 x i8> %va) {
264; CHECK-ZVE64X-LABEL: ctlz_nxv16i8:
265; CHECK-ZVE64X:       # %bb.0:
266; CHECK-ZVE64X-NEXT:    vsetvli a0, zero, e8, m2, ta, ma
267; CHECK-ZVE64X-NEXT:    vsrl.vi v10, v8, 1
268; CHECK-ZVE64X-NEXT:    li a0, 85
269; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v10
270; CHECK-ZVE64X-NEXT:    vsrl.vi v10, v8, 2
271; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v10
272; CHECK-ZVE64X-NEXT:    vsrl.vi v10, v8, 4
273; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v10
274; CHECK-ZVE64X-NEXT:    vnot.v v8, v8
275; CHECK-ZVE64X-NEXT:    vsrl.vi v10, v8, 1
276; CHECK-ZVE64X-NEXT:    vand.vx v10, v10, a0
277; CHECK-ZVE64X-NEXT:    li a0, 51
278; CHECK-ZVE64X-NEXT:    vsub.vv v8, v8, v10
279; CHECK-ZVE64X-NEXT:    vand.vx v10, v8, a0
280; CHECK-ZVE64X-NEXT:    vsrl.vi v8, v8, 2
281; CHECK-ZVE64X-NEXT:    vand.vx v8, v8, a0
282; CHECK-ZVE64X-NEXT:    vadd.vv v8, v10, v8
283; CHECK-ZVE64X-NEXT:    vsrl.vi v10, v8, 4
284; CHECK-ZVE64X-NEXT:    vadd.vv v8, v8, v10
285; CHECK-ZVE64X-NEXT:    vand.vi v8, v8, 15
286; CHECK-ZVE64X-NEXT:    ret
287;
288; CHECK-F-LABEL: ctlz_nxv16i8:
289; CHECK-F:       # %bb.0:
290; CHECK-F-NEXT:    vsetvli a0, zero, e16, m4, ta, ma
291; CHECK-F-NEXT:    vzext.vf2 v12, v8
292; CHECK-F-NEXT:    li a0, 134
293; CHECK-F-NEXT:    vfwcvt.f.xu.v v16, v12
294; CHECK-F-NEXT:    vnsrl.wi v8, v16, 23
295; CHECK-F-NEXT:    vsetvli zero, zero, e8, m2, ta, ma
296; CHECK-F-NEXT:    vnsrl.wi v12, v8, 0
297; CHECK-F-NEXT:    vrsub.vx v8, v12, a0
298; CHECK-F-NEXT:    li a0, 8
299; CHECK-F-NEXT:    vminu.vx v8, v8, a0
300; CHECK-F-NEXT:    ret
301;
302; CHECK-D-LABEL: ctlz_nxv16i8:
303; CHECK-D:       # %bb.0:
304; CHECK-D-NEXT:    vsetvli a0, zero, e16, m4, ta, ma
305; CHECK-D-NEXT:    vzext.vf2 v12, v8
306; CHECK-D-NEXT:    li a0, 134
307; CHECK-D-NEXT:    vfwcvt.f.xu.v v16, v12
308; CHECK-D-NEXT:    vnsrl.wi v8, v16, 23
309; CHECK-D-NEXT:    vsetvli zero, zero, e8, m2, ta, ma
310; CHECK-D-NEXT:    vnsrl.wi v12, v8, 0
311; CHECK-D-NEXT:    vrsub.vx v8, v12, a0
312; CHECK-D-NEXT:    li a0, 8
313; CHECK-D-NEXT:    vminu.vx v8, v8, a0
314; CHECK-D-NEXT:    ret
315;
316; CHECK-ZVBB-LABEL: ctlz_nxv16i8:
317; CHECK-ZVBB:       # %bb.0:
318; CHECK-ZVBB-NEXT:    vsetvli a0, zero, e8, m2, ta, ma
319; CHECK-ZVBB-NEXT:    vclz.v v8, v8
320; CHECK-ZVBB-NEXT:    ret
321  %a = call <vscale x 16 x i8> @llvm.ctlz.nxv16i8(<vscale x 16 x i8> %va, i1 false)
322  ret <vscale x 16 x i8> %a
323}
324declare <vscale x 16 x i8> @llvm.ctlz.nxv16i8(<vscale x 16 x i8>, i1)
325
326define <vscale x 32 x i8> @ctlz_nxv32i8(<vscale x 32 x i8> %va) {
327; CHECK-LABEL: ctlz_nxv32i8:
328; CHECK:       # %bb.0:
329; CHECK-NEXT:    vsetvli a0, zero, e8, m4, ta, ma
330; CHECK-NEXT:    vsrl.vi v12, v8, 1
331; CHECK-NEXT:    li a0, 85
332; CHECK-NEXT:    vor.vv v8, v8, v12
333; CHECK-NEXT:    vsrl.vi v12, v8, 2
334; CHECK-NEXT:    vor.vv v8, v8, v12
335; CHECK-NEXT:    vsrl.vi v12, v8, 4
336; CHECK-NEXT:    vor.vv v8, v8, v12
337; CHECK-NEXT:    vnot.v v8, v8
338; CHECK-NEXT:    vsrl.vi v12, v8, 1
339; CHECK-NEXT:    vand.vx v12, v12, a0
340; CHECK-NEXT:    li a0, 51
341; CHECK-NEXT:    vsub.vv v8, v8, v12
342; CHECK-NEXT:    vand.vx v12, v8, a0
343; CHECK-NEXT:    vsrl.vi v8, v8, 2
344; CHECK-NEXT:    vand.vx v8, v8, a0
345; CHECK-NEXT:    vadd.vv v8, v12, v8
346; CHECK-NEXT:    vsrl.vi v12, v8, 4
347; CHECK-NEXT:    vadd.vv v8, v8, v12
348; CHECK-NEXT:    vand.vi v8, v8, 15
349; CHECK-NEXT:    ret
350;
351; CHECK-ZVBB-LABEL: ctlz_nxv32i8:
352; CHECK-ZVBB:       # %bb.0:
353; CHECK-ZVBB-NEXT:    vsetvli a0, zero, e8, m4, ta, ma
354; CHECK-ZVBB-NEXT:    vclz.v v8, v8
355; CHECK-ZVBB-NEXT:    ret
356  %a = call <vscale x 32 x i8> @llvm.ctlz.nxv32i8(<vscale x 32 x i8> %va, i1 false)
357  ret <vscale x 32 x i8> %a
358}
359declare <vscale x 32 x i8> @llvm.ctlz.nxv32i8(<vscale x 32 x i8>, i1)
360
361define <vscale x 64 x i8> @ctlz_nxv64i8(<vscale x 64 x i8> %va) {
362; CHECK-LABEL: ctlz_nxv64i8:
363; CHECK:       # %bb.0:
364; CHECK-NEXT:    vsetvli a0, zero, e8, m8, ta, ma
365; CHECK-NEXT:    vsrl.vi v16, v8, 1
366; CHECK-NEXT:    li a0, 85
367; CHECK-NEXT:    vor.vv v8, v8, v16
368; CHECK-NEXT:    vsrl.vi v16, v8, 2
369; CHECK-NEXT:    vor.vv v8, v8, v16
370; CHECK-NEXT:    vsrl.vi v16, v8, 4
371; CHECK-NEXT:    vor.vv v8, v8, v16
372; CHECK-NEXT:    vnot.v v8, v8
373; CHECK-NEXT:    vsrl.vi v16, v8, 1
374; CHECK-NEXT:    vand.vx v16, v16, a0
375; CHECK-NEXT:    li a0, 51
376; CHECK-NEXT:    vsub.vv v8, v8, v16
377; CHECK-NEXT:    vand.vx v16, v8, a0
378; CHECK-NEXT:    vsrl.vi v8, v8, 2
379; CHECK-NEXT:    vand.vx v8, v8, a0
380; CHECK-NEXT:    vadd.vv v8, v16, v8
381; CHECK-NEXT:    vsrl.vi v16, v8, 4
382; CHECK-NEXT:    vadd.vv v8, v8, v16
383; CHECK-NEXT:    vand.vi v8, v8, 15
384; CHECK-NEXT:    ret
385;
386; CHECK-ZVBB-LABEL: ctlz_nxv64i8:
387; CHECK-ZVBB:       # %bb.0:
388; CHECK-ZVBB-NEXT:    vsetvli a0, zero, e8, m8, ta, ma
389; CHECK-ZVBB-NEXT:    vclz.v v8, v8
390; CHECK-ZVBB-NEXT:    ret
391  %a = call <vscale x 64 x i8> @llvm.ctlz.nxv64i8(<vscale x 64 x i8> %va, i1 false)
392  ret <vscale x 64 x i8> %a
393}
394declare <vscale x 64 x i8> @llvm.ctlz.nxv64i8(<vscale x 64 x i8>, i1)
395
396define <vscale x 1 x i16> @ctlz_nxv1i16(<vscale x 1 x i16> %va) {
397; CHECK-ZVE64X-LABEL: ctlz_nxv1i16:
398; CHECK-ZVE64X:       # %bb.0:
399; CHECK-ZVE64X-NEXT:    vsetvli a0, zero, e16, mf4, ta, ma
400; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 1
401; CHECK-ZVE64X-NEXT:    lui a0, 5
402; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v9
403; CHECK-ZVE64X-NEXT:    addi a0, a0, 1365
404; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 2
405; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v9
406; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 4
407; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v9
408; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 8
409; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v9
410; CHECK-ZVE64X-NEXT:    vnot.v v8, v8
411; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 1
412; CHECK-ZVE64X-NEXT:    vand.vx v9, v9, a0
413; CHECK-ZVE64X-NEXT:    lui a0, 3
414; CHECK-ZVE64X-NEXT:    addi a0, a0, 819
415; CHECK-ZVE64X-NEXT:    vsub.vv v8, v8, v9
416; CHECK-ZVE64X-NEXT:    vand.vx v9, v8, a0
417; CHECK-ZVE64X-NEXT:    vsrl.vi v8, v8, 2
418; CHECK-ZVE64X-NEXT:    vand.vx v8, v8, a0
419; CHECK-ZVE64X-NEXT:    lui a0, 1
420; CHECK-ZVE64X-NEXT:    addi a0, a0, -241
421; CHECK-ZVE64X-NEXT:    vadd.vv v8, v9, v8
422; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 4
423; CHECK-ZVE64X-NEXT:    vadd.vv v8, v8, v9
424; CHECK-ZVE64X-NEXT:    vand.vx v8, v8, a0
425; CHECK-ZVE64X-NEXT:    li a0, 257
426; CHECK-ZVE64X-NEXT:    vmul.vx v8, v8, a0
427; CHECK-ZVE64X-NEXT:    vsrl.vi v8, v8, 8
428; CHECK-ZVE64X-NEXT:    ret
429;
430; CHECK-F-LABEL: ctlz_nxv1i16:
431; CHECK-F:       # %bb.0:
432; CHECK-F-NEXT:    vsetvli a0, zero, e16, mf4, ta, ma
433; CHECK-F-NEXT:    vfwcvt.f.xu.v v9, v8
434; CHECK-F-NEXT:    li a0, 142
435; CHECK-F-NEXT:    vnsrl.wi v8, v9, 23
436; CHECK-F-NEXT:    vrsub.vx v8, v8, a0
437; CHECK-F-NEXT:    li a0, 16
438; CHECK-F-NEXT:    vminu.vx v8, v8, a0
439; CHECK-F-NEXT:    ret
440;
441; CHECK-D-LABEL: ctlz_nxv1i16:
442; CHECK-D:       # %bb.0:
443; CHECK-D-NEXT:    vsetvli a0, zero, e16, mf4, ta, ma
444; CHECK-D-NEXT:    vfwcvt.f.xu.v v9, v8
445; CHECK-D-NEXT:    li a0, 142
446; CHECK-D-NEXT:    vnsrl.wi v8, v9, 23
447; CHECK-D-NEXT:    vrsub.vx v8, v8, a0
448; CHECK-D-NEXT:    li a0, 16
449; CHECK-D-NEXT:    vminu.vx v8, v8, a0
450; CHECK-D-NEXT:    ret
451;
452; CHECK-ZVBB-LABEL: ctlz_nxv1i16:
453; CHECK-ZVBB:       # %bb.0:
454; CHECK-ZVBB-NEXT:    vsetvli a0, zero, e16, mf4, ta, ma
455; CHECK-ZVBB-NEXT:    vclz.v v8, v8
456; CHECK-ZVBB-NEXT:    ret
457  %a = call <vscale x 1 x i16> @llvm.ctlz.nxv1i16(<vscale x 1 x i16> %va, i1 false)
458  ret <vscale x 1 x i16> %a
459}
460declare <vscale x 1 x i16> @llvm.ctlz.nxv1i16(<vscale x 1 x i16>, i1)
461
462define <vscale x 2 x i16> @ctlz_nxv2i16(<vscale x 2 x i16> %va) {
463; CHECK-ZVE64X-LABEL: ctlz_nxv2i16:
464; CHECK-ZVE64X:       # %bb.0:
465; CHECK-ZVE64X-NEXT:    vsetvli a0, zero, e16, mf2, ta, ma
466; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 1
467; CHECK-ZVE64X-NEXT:    lui a0, 5
468; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v9
469; CHECK-ZVE64X-NEXT:    addi a0, a0, 1365
470; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 2
471; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v9
472; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 4
473; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v9
474; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 8
475; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v9
476; CHECK-ZVE64X-NEXT:    vnot.v v8, v8
477; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 1
478; CHECK-ZVE64X-NEXT:    vand.vx v9, v9, a0
479; CHECK-ZVE64X-NEXT:    lui a0, 3
480; CHECK-ZVE64X-NEXT:    addi a0, a0, 819
481; CHECK-ZVE64X-NEXT:    vsub.vv v8, v8, v9
482; CHECK-ZVE64X-NEXT:    vand.vx v9, v8, a0
483; CHECK-ZVE64X-NEXT:    vsrl.vi v8, v8, 2
484; CHECK-ZVE64X-NEXT:    vand.vx v8, v8, a0
485; CHECK-ZVE64X-NEXT:    lui a0, 1
486; CHECK-ZVE64X-NEXT:    addi a0, a0, -241
487; CHECK-ZVE64X-NEXT:    vadd.vv v8, v9, v8
488; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 4
489; CHECK-ZVE64X-NEXT:    vadd.vv v8, v8, v9
490; CHECK-ZVE64X-NEXT:    vand.vx v8, v8, a0
491; CHECK-ZVE64X-NEXT:    li a0, 257
492; CHECK-ZVE64X-NEXT:    vmul.vx v8, v8, a0
493; CHECK-ZVE64X-NEXT:    vsrl.vi v8, v8, 8
494; CHECK-ZVE64X-NEXT:    ret
495;
496; CHECK-F-LABEL: ctlz_nxv2i16:
497; CHECK-F:       # %bb.0:
498; CHECK-F-NEXT:    vsetvli a0, zero, e16, mf2, ta, ma
499; CHECK-F-NEXT:    vfwcvt.f.xu.v v9, v8
500; CHECK-F-NEXT:    li a0, 142
501; CHECK-F-NEXT:    vnsrl.wi v8, v9, 23
502; CHECK-F-NEXT:    vrsub.vx v8, v8, a0
503; CHECK-F-NEXT:    li a0, 16
504; CHECK-F-NEXT:    vminu.vx v8, v8, a0
505; CHECK-F-NEXT:    ret
506;
507; CHECK-D-LABEL: ctlz_nxv2i16:
508; CHECK-D:       # %bb.0:
509; CHECK-D-NEXT:    vsetvli a0, zero, e16, mf2, ta, ma
510; CHECK-D-NEXT:    vfwcvt.f.xu.v v9, v8
511; CHECK-D-NEXT:    li a0, 142
512; CHECK-D-NEXT:    vnsrl.wi v8, v9, 23
513; CHECK-D-NEXT:    vrsub.vx v8, v8, a0
514; CHECK-D-NEXT:    li a0, 16
515; CHECK-D-NEXT:    vminu.vx v8, v8, a0
516; CHECK-D-NEXT:    ret
517;
518; CHECK-ZVBB-LABEL: ctlz_nxv2i16:
519; CHECK-ZVBB:       # %bb.0:
520; CHECK-ZVBB-NEXT:    vsetvli a0, zero, e16, mf2, ta, ma
521; CHECK-ZVBB-NEXT:    vclz.v v8, v8
522; CHECK-ZVBB-NEXT:    ret
523  %a = call <vscale x 2 x i16> @llvm.ctlz.nxv2i16(<vscale x 2 x i16> %va, i1 false)
524  ret <vscale x 2 x i16> %a
525}
526declare <vscale x 2 x i16> @llvm.ctlz.nxv2i16(<vscale x 2 x i16>, i1)
527
528define <vscale x 4 x i16> @ctlz_nxv4i16(<vscale x 4 x i16> %va) {
529; CHECK-ZVE64X-LABEL: ctlz_nxv4i16:
530; CHECK-ZVE64X:       # %bb.0:
531; CHECK-ZVE64X-NEXT:    vsetvli a0, zero, e16, m1, ta, ma
532; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 1
533; CHECK-ZVE64X-NEXT:    lui a0, 5
534; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v9
535; CHECK-ZVE64X-NEXT:    addi a0, a0, 1365
536; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 2
537; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v9
538; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 4
539; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v9
540; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 8
541; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v9
542; CHECK-ZVE64X-NEXT:    vnot.v v8, v8
543; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 1
544; CHECK-ZVE64X-NEXT:    vand.vx v9, v9, a0
545; CHECK-ZVE64X-NEXT:    lui a0, 3
546; CHECK-ZVE64X-NEXT:    addi a0, a0, 819
547; CHECK-ZVE64X-NEXT:    vsub.vv v8, v8, v9
548; CHECK-ZVE64X-NEXT:    vand.vx v9, v8, a0
549; CHECK-ZVE64X-NEXT:    vsrl.vi v8, v8, 2
550; CHECK-ZVE64X-NEXT:    vand.vx v8, v8, a0
551; CHECK-ZVE64X-NEXT:    lui a0, 1
552; CHECK-ZVE64X-NEXT:    addi a0, a0, -241
553; CHECK-ZVE64X-NEXT:    vadd.vv v8, v9, v8
554; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 4
555; CHECK-ZVE64X-NEXT:    vadd.vv v8, v8, v9
556; CHECK-ZVE64X-NEXT:    vand.vx v8, v8, a0
557; CHECK-ZVE64X-NEXT:    li a0, 257
558; CHECK-ZVE64X-NEXT:    vmul.vx v8, v8, a0
559; CHECK-ZVE64X-NEXT:    vsrl.vi v8, v8, 8
560; CHECK-ZVE64X-NEXT:    ret
561;
562; CHECK-F-LABEL: ctlz_nxv4i16:
563; CHECK-F:       # %bb.0:
564; CHECK-F-NEXT:    vsetvli a0, zero, e16, m1, ta, ma
565; CHECK-F-NEXT:    vfwcvt.f.xu.v v10, v8
566; CHECK-F-NEXT:    li a0, 142
567; CHECK-F-NEXT:    vnsrl.wi v8, v10, 23
568; CHECK-F-NEXT:    vrsub.vx v8, v8, a0
569; CHECK-F-NEXT:    li a0, 16
570; CHECK-F-NEXT:    vminu.vx v8, v8, a0
571; CHECK-F-NEXT:    ret
572;
573; CHECK-D-LABEL: ctlz_nxv4i16:
574; CHECK-D:       # %bb.0:
575; CHECK-D-NEXT:    vsetvli a0, zero, e16, m1, ta, ma
576; CHECK-D-NEXT:    vfwcvt.f.xu.v v10, v8
577; CHECK-D-NEXT:    li a0, 142
578; CHECK-D-NEXT:    vnsrl.wi v8, v10, 23
579; CHECK-D-NEXT:    vrsub.vx v8, v8, a0
580; CHECK-D-NEXT:    li a0, 16
581; CHECK-D-NEXT:    vminu.vx v8, v8, a0
582; CHECK-D-NEXT:    ret
583;
584; CHECK-ZVBB-LABEL: ctlz_nxv4i16:
585; CHECK-ZVBB:       # %bb.0:
586; CHECK-ZVBB-NEXT:    vsetvli a0, zero, e16, m1, ta, ma
587; CHECK-ZVBB-NEXT:    vclz.v v8, v8
588; CHECK-ZVBB-NEXT:    ret
589  %a = call <vscale x 4 x i16> @llvm.ctlz.nxv4i16(<vscale x 4 x i16> %va, i1 false)
590  ret <vscale x 4 x i16> %a
591}
592declare <vscale x 4 x i16> @llvm.ctlz.nxv4i16(<vscale x 4 x i16>, i1)
593
594define <vscale x 8 x i16> @ctlz_nxv8i16(<vscale x 8 x i16> %va) {
595; CHECK-ZVE64X-LABEL: ctlz_nxv8i16:
596; CHECK-ZVE64X:       # %bb.0:
597; CHECK-ZVE64X-NEXT:    vsetvli a0, zero, e16, m2, ta, ma
598; CHECK-ZVE64X-NEXT:    vsrl.vi v10, v8, 1
599; CHECK-ZVE64X-NEXT:    lui a0, 5
600; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v10
601; CHECK-ZVE64X-NEXT:    addi a0, a0, 1365
602; CHECK-ZVE64X-NEXT:    vsrl.vi v10, v8, 2
603; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v10
604; CHECK-ZVE64X-NEXT:    vsrl.vi v10, v8, 4
605; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v10
606; CHECK-ZVE64X-NEXT:    vsrl.vi v10, v8, 8
607; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v10
608; CHECK-ZVE64X-NEXT:    vnot.v v8, v8
609; CHECK-ZVE64X-NEXT:    vsrl.vi v10, v8, 1
610; CHECK-ZVE64X-NEXT:    vand.vx v10, v10, a0
611; CHECK-ZVE64X-NEXT:    lui a0, 3
612; CHECK-ZVE64X-NEXT:    addi a0, a0, 819
613; CHECK-ZVE64X-NEXT:    vsub.vv v8, v8, v10
614; CHECK-ZVE64X-NEXT:    vand.vx v10, v8, a0
615; CHECK-ZVE64X-NEXT:    vsrl.vi v8, v8, 2
616; CHECK-ZVE64X-NEXT:    vand.vx v8, v8, a0
617; CHECK-ZVE64X-NEXT:    lui a0, 1
618; CHECK-ZVE64X-NEXT:    addi a0, a0, -241
619; CHECK-ZVE64X-NEXT:    vadd.vv v8, v10, v8
620; CHECK-ZVE64X-NEXT:    vsrl.vi v10, v8, 4
621; CHECK-ZVE64X-NEXT:    vadd.vv v8, v8, v10
622; CHECK-ZVE64X-NEXT:    vand.vx v8, v8, a0
623; CHECK-ZVE64X-NEXT:    li a0, 257
624; CHECK-ZVE64X-NEXT:    vmul.vx v8, v8, a0
625; CHECK-ZVE64X-NEXT:    vsrl.vi v8, v8, 8
626; CHECK-ZVE64X-NEXT:    ret
627;
628; CHECK-F-LABEL: ctlz_nxv8i16:
629; CHECK-F:       # %bb.0:
630; CHECK-F-NEXT:    vsetvli a0, zero, e16, m2, ta, ma
631; CHECK-F-NEXT:    vfwcvt.f.xu.v v12, v8
632; CHECK-F-NEXT:    li a0, 142
633; CHECK-F-NEXT:    vnsrl.wi v8, v12, 23
634; CHECK-F-NEXT:    vrsub.vx v8, v8, a0
635; CHECK-F-NEXT:    li a0, 16
636; CHECK-F-NEXT:    vminu.vx v8, v8, a0
637; CHECK-F-NEXT:    ret
638;
639; CHECK-D-LABEL: ctlz_nxv8i16:
640; CHECK-D:       # %bb.0:
641; CHECK-D-NEXT:    vsetvli a0, zero, e16, m2, ta, ma
642; CHECK-D-NEXT:    vfwcvt.f.xu.v v12, v8
643; CHECK-D-NEXT:    li a0, 142
644; CHECK-D-NEXT:    vnsrl.wi v8, v12, 23
645; CHECK-D-NEXT:    vrsub.vx v8, v8, a0
646; CHECK-D-NEXT:    li a0, 16
647; CHECK-D-NEXT:    vminu.vx v8, v8, a0
648; CHECK-D-NEXT:    ret
649;
650; CHECK-ZVBB-LABEL: ctlz_nxv8i16:
651; CHECK-ZVBB:       # %bb.0:
652; CHECK-ZVBB-NEXT:    vsetvli a0, zero, e16, m2, ta, ma
653; CHECK-ZVBB-NEXT:    vclz.v v8, v8
654; CHECK-ZVBB-NEXT:    ret
655  %a = call <vscale x 8 x i16> @llvm.ctlz.nxv8i16(<vscale x 8 x i16> %va, i1 false)
656  ret <vscale x 8 x i16> %a
657}
658declare <vscale x 8 x i16> @llvm.ctlz.nxv8i16(<vscale x 8 x i16>, i1)
659
660define <vscale x 16 x i16> @ctlz_nxv16i16(<vscale x 16 x i16> %va) {
661; CHECK-ZVE64X-LABEL: ctlz_nxv16i16:
662; CHECK-ZVE64X:       # %bb.0:
663; CHECK-ZVE64X-NEXT:    vsetvli a0, zero, e16, m4, ta, ma
664; CHECK-ZVE64X-NEXT:    vsrl.vi v12, v8, 1
665; CHECK-ZVE64X-NEXT:    lui a0, 5
666; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v12
667; CHECK-ZVE64X-NEXT:    addi a0, a0, 1365
668; CHECK-ZVE64X-NEXT:    vsrl.vi v12, v8, 2
669; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v12
670; CHECK-ZVE64X-NEXT:    vsrl.vi v12, v8, 4
671; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v12
672; CHECK-ZVE64X-NEXT:    vsrl.vi v12, v8, 8
673; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v12
674; CHECK-ZVE64X-NEXT:    vnot.v v8, v8
675; CHECK-ZVE64X-NEXT:    vsrl.vi v12, v8, 1
676; CHECK-ZVE64X-NEXT:    vand.vx v12, v12, a0
677; CHECK-ZVE64X-NEXT:    lui a0, 3
678; CHECK-ZVE64X-NEXT:    addi a0, a0, 819
679; CHECK-ZVE64X-NEXT:    vsub.vv v8, v8, v12
680; CHECK-ZVE64X-NEXT:    vand.vx v12, v8, a0
681; CHECK-ZVE64X-NEXT:    vsrl.vi v8, v8, 2
682; CHECK-ZVE64X-NEXT:    vand.vx v8, v8, a0
683; CHECK-ZVE64X-NEXT:    lui a0, 1
684; CHECK-ZVE64X-NEXT:    addi a0, a0, -241
685; CHECK-ZVE64X-NEXT:    vadd.vv v8, v12, v8
686; CHECK-ZVE64X-NEXT:    vsrl.vi v12, v8, 4
687; CHECK-ZVE64X-NEXT:    vadd.vv v8, v8, v12
688; CHECK-ZVE64X-NEXT:    vand.vx v8, v8, a0
689; CHECK-ZVE64X-NEXT:    li a0, 257
690; CHECK-ZVE64X-NEXT:    vmul.vx v8, v8, a0
691; CHECK-ZVE64X-NEXT:    vsrl.vi v8, v8, 8
692; CHECK-ZVE64X-NEXT:    ret
693;
694; CHECK-F-LABEL: ctlz_nxv16i16:
695; CHECK-F:       # %bb.0:
696; CHECK-F-NEXT:    vsetvli a0, zero, e16, m4, ta, ma
697; CHECK-F-NEXT:    vfwcvt.f.xu.v v16, v8
698; CHECK-F-NEXT:    li a0, 142
699; CHECK-F-NEXT:    vnsrl.wi v8, v16, 23
700; CHECK-F-NEXT:    vrsub.vx v8, v8, a0
701; CHECK-F-NEXT:    li a0, 16
702; CHECK-F-NEXT:    vminu.vx v8, v8, a0
703; CHECK-F-NEXT:    ret
704;
705; CHECK-D-LABEL: ctlz_nxv16i16:
706; CHECK-D:       # %bb.0:
707; CHECK-D-NEXT:    vsetvli a0, zero, e16, m4, ta, ma
708; CHECK-D-NEXT:    vfwcvt.f.xu.v v16, v8
709; CHECK-D-NEXT:    li a0, 142
710; CHECK-D-NEXT:    vnsrl.wi v8, v16, 23
711; CHECK-D-NEXT:    vrsub.vx v8, v8, a0
712; CHECK-D-NEXT:    li a0, 16
713; CHECK-D-NEXT:    vminu.vx v8, v8, a0
714; CHECK-D-NEXT:    ret
715;
716; CHECK-ZVBB-LABEL: ctlz_nxv16i16:
717; CHECK-ZVBB:       # %bb.0:
718; CHECK-ZVBB-NEXT:    vsetvli a0, zero, e16, m4, ta, ma
719; CHECK-ZVBB-NEXT:    vclz.v v8, v8
720; CHECK-ZVBB-NEXT:    ret
721  %a = call <vscale x 16 x i16> @llvm.ctlz.nxv16i16(<vscale x 16 x i16> %va, i1 false)
722  ret <vscale x 16 x i16> %a
723}
724declare <vscale x 16 x i16> @llvm.ctlz.nxv16i16(<vscale x 16 x i16>, i1)
725
726define <vscale x 32 x i16> @ctlz_nxv32i16(<vscale x 32 x i16> %va) {
727; CHECK-LABEL: ctlz_nxv32i16:
728; CHECK:       # %bb.0:
729; CHECK-NEXT:    vsetvli a0, zero, e16, m8, ta, ma
730; CHECK-NEXT:    vsrl.vi v16, v8, 1
731; CHECK-NEXT:    lui a0, 5
732; CHECK-NEXT:    vor.vv v8, v8, v16
733; CHECK-NEXT:    addi a0, a0, 1365
734; CHECK-NEXT:    vsrl.vi v16, v8, 2
735; CHECK-NEXT:    vor.vv v8, v8, v16
736; CHECK-NEXT:    vsrl.vi v16, v8, 4
737; CHECK-NEXT:    vor.vv v8, v8, v16
738; CHECK-NEXT:    vsrl.vi v16, v8, 8
739; CHECK-NEXT:    vor.vv v8, v8, v16
740; CHECK-NEXT:    vnot.v v8, v8
741; CHECK-NEXT:    vsrl.vi v16, v8, 1
742; CHECK-NEXT:    vand.vx v16, v16, a0
743; CHECK-NEXT:    lui a0, 3
744; CHECK-NEXT:    addi a0, a0, 819
745; CHECK-NEXT:    vsub.vv v8, v8, v16
746; CHECK-NEXT:    vand.vx v16, v8, a0
747; CHECK-NEXT:    vsrl.vi v8, v8, 2
748; CHECK-NEXT:    vand.vx v8, v8, a0
749; CHECK-NEXT:    lui a0, 1
750; CHECK-NEXT:    addi a0, a0, -241
751; CHECK-NEXT:    vadd.vv v8, v16, v8
752; CHECK-NEXT:    vsrl.vi v16, v8, 4
753; CHECK-NEXT:    vadd.vv v8, v8, v16
754; CHECK-NEXT:    vand.vx v8, v8, a0
755; CHECK-NEXT:    li a0, 257
756; CHECK-NEXT:    vmul.vx v8, v8, a0
757; CHECK-NEXT:    vsrl.vi v8, v8, 8
758; CHECK-NEXT:    ret
759;
760; CHECK-ZVBB-LABEL: ctlz_nxv32i16:
761; CHECK-ZVBB:       # %bb.0:
762; CHECK-ZVBB-NEXT:    vsetvli a0, zero, e16, m8, ta, ma
763; CHECK-ZVBB-NEXT:    vclz.v v8, v8
764; CHECK-ZVBB-NEXT:    ret
765  %a = call <vscale x 32 x i16> @llvm.ctlz.nxv32i16(<vscale x 32 x i16> %va, i1 false)
766  ret <vscale x 32 x i16> %a
767}
768declare <vscale x 32 x i16> @llvm.ctlz.nxv32i16(<vscale x 32 x i16>, i1)
769
770define <vscale x 1 x i32> @ctlz_nxv1i32(<vscale x 1 x i32> %va) {
771; CHECK-ZVE64X-LABEL: ctlz_nxv1i32:
772; CHECK-ZVE64X:       # %bb.0:
773; CHECK-ZVE64X-NEXT:    vsetvli a0, zero, e32, mf2, ta, ma
774; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 1
775; CHECK-ZVE64X-NEXT:    lui a0, 349525
776; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v9
777; CHECK-ZVE64X-NEXT:    addi a0, a0, 1365
778; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 2
779; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v9
780; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 4
781; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v9
782; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 8
783; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v9
784; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 16
785; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v9
786; CHECK-ZVE64X-NEXT:    vnot.v v8, v8
787; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 1
788; CHECK-ZVE64X-NEXT:    vand.vx v9, v9, a0
789; CHECK-ZVE64X-NEXT:    lui a0, 209715
790; CHECK-ZVE64X-NEXT:    addi a0, a0, 819
791; CHECK-ZVE64X-NEXT:    vsub.vv v8, v8, v9
792; CHECK-ZVE64X-NEXT:    vand.vx v9, v8, a0
793; CHECK-ZVE64X-NEXT:    vsrl.vi v8, v8, 2
794; CHECK-ZVE64X-NEXT:    vand.vx v8, v8, a0
795; CHECK-ZVE64X-NEXT:    lui a0, 61681
796; CHECK-ZVE64X-NEXT:    addi a0, a0, -241
797; CHECK-ZVE64X-NEXT:    vadd.vv v8, v9, v8
798; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 4
799; CHECK-ZVE64X-NEXT:    vadd.vv v8, v8, v9
800; CHECK-ZVE64X-NEXT:    vand.vx v8, v8, a0
801; CHECK-ZVE64X-NEXT:    lui a0, 4112
802; CHECK-ZVE64X-NEXT:    addi a0, a0, 257
803; CHECK-ZVE64X-NEXT:    vmul.vx v8, v8, a0
804; CHECK-ZVE64X-NEXT:    vsrl.vi v8, v8, 24
805; CHECK-ZVE64X-NEXT:    ret
806;
807; CHECK-F-LABEL: ctlz_nxv1i32:
808; CHECK-F:       # %bb.0:
809; CHECK-F-NEXT:    fsrmi a0, 1
810; CHECK-F-NEXT:    vsetvli a1, zero, e32, mf2, ta, ma
811; CHECK-F-NEXT:    vfcvt.f.xu.v v8, v8
812; CHECK-F-NEXT:    li a1, 158
813; CHECK-F-NEXT:    vsrl.vi v8, v8, 23
814; CHECK-F-NEXT:    vrsub.vx v8, v8, a1
815; CHECK-F-NEXT:    li a1, 32
816; CHECK-F-NEXT:    vminu.vx v8, v8, a1
817; CHECK-F-NEXT:    fsrm a0
818; CHECK-F-NEXT:    ret
819;
820; CHECK-D-LABEL: ctlz_nxv1i32:
821; CHECK-D:       # %bb.0:
822; CHECK-D-NEXT:    vsetvli a0, zero, e32, mf2, ta, ma
823; CHECK-D-NEXT:    vfwcvt.f.xu.v v9, v8
824; CHECK-D-NEXT:    li a0, 52
825; CHECK-D-NEXT:    vnsrl.wx v8, v9, a0
826; CHECK-D-NEXT:    li a0, 1054
827; CHECK-D-NEXT:    vrsub.vx v8, v8, a0
828; CHECK-D-NEXT:    li a0, 32
829; CHECK-D-NEXT:    vminu.vx v8, v8, a0
830; CHECK-D-NEXT:    ret
831;
832; CHECK-ZVBB-LABEL: ctlz_nxv1i32:
833; CHECK-ZVBB:       # %bb.0:
834; CHECK-ZVBB-NEXT:    vsetvli a0, zero, e32, mf2, ta, ma
835; CHECK-ZVBB-NEXT:    vclz.v v8, v8
836; CHECK-ZVBB-NEXT:    ret
837  %a = call <vscale x 1 x i32> @llvm.ctlz.nxv1i32(<vscale x 1 x i32> %va, i1 false)
838  ret <vscale x 1 x i32> %a
839}
840declare <vscale x 1 x i32> @llvm.ctlz.nxv1i32(<vscale x 1 x i32>, i1)
841
842define <vscale x 2 x i32> @ctlz_nxv2i32(<vscale x 2 x i32> %va) {
843; CHECK-ZVE64X-LABEL: ctlz_nxv2i32:
844; CHECK-ZVE64X:       # %bb.0:
845; CHECK-ZVE64X-NEXT:    vsetvli a0, zero, e32, m1, ta, ma
846; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 1
847; CHECK-ZVE64X-NEXT:    lui a0, 349525
848; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v9
849; CHECK-ZVE64X-NEXT:    addi a0, a0, 1365
850; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 2
851; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v9
852; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 4
853; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v9
854; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 8
855; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v9
856; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 16
857; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v9
858; CHECK-ZVE64X-NEXT:    vnot.v v8, v8
859; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 1
860; CHECK-ZVE64X-NEXT:    vand.vx v9, v9, a0
861; CHECK-ZVE64X-NEXT:    lui a0, 209715
862; CHECK-ZVE64X-NEXT:    addi a0, a0, 819
863; CHECK-ZVE64X-NEXT:    vsub.vv v8, v8, v9
864; CHECK-ZVE64X-NEXT:    vand.vx v9, v8, a0
865; CHECK-ZVE64X-NEXT:    vsrl.vi v8, v8, 2
866; CHECK-ZVE64X-NEXT:    vand.vx v8, v8, a0
867; CHECK-ZVE64X-NEXT:    lui a0, 61681
868; CHECK-ZVE64X-NEXT:    addi a0, a0, -241
869; CHECK-ZVE64X-NEXT:    vadd.vv v8, v9, v8
870; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 4
871; CHECK-ZVE64X-NEXT:    vadd.vv v8, v8, v9
872; CHECK-ZVE64X-NEXT:    vand.vx v8, v8, a0
873; CHECK-ZVE64X-NEXT:    lui a0, 4112
874; CHECK-ZVE64X-NEXT:    addi a0, a0, 257
875; CHECK-ZVE64X-NEXT:    vmul.vx v8, v8, a0
876; CHECK-ZVE64X-NEXT:    vsrl.vi v8, v8, 24
877; CHECK-ZVE64X-NEXT:    ret
878;
879; CHECK-F-LABEL: ctlz_nxv2i32:
880; CHECK-F:       # %bb.0:
881; CHECK-F-NEXT:    fsrmi a0, 1
882; CHECK-F-NEXT:    vsetvli a1, zero, e32, m1, ta, ma
883; CHECK-F-NEXT:    vfcvt.f.xu.v v8, v8
884; CHECK-F-NEXT:    li a1, 158
885; CHECK-F-NEXT:    vsrl.vi v8, v8, 23
886; CHECK-F-NEXT:    vrsub.vx v8, v8, a1
887; CHECK-F-NEXT:    li a1, 32
888; CHECK-F-NEXT:    vminu.vx v8, v8, a1
889; CHECK-F-NEXT:    fsrm a0
890; CHECK-F-NEXT:    ret
891;
892; CHECK-D-LABEL: ctlz_nxv2i32:
893; CHECK-D:       # %bb.0:
894; CHECK-D-NEXT:    vsetvli a0, zero, e32, m1, ta, ma
895; CHECK-D-NEXT:    vfwcvt.f.xu.v v10, v8
896; CHECK-D-NEXT:    li a0, 52
897; CHECK-D-NEXT:    vnsrl.wx v8, v10, a0
898; CHECK-D-NEXT:    li a0, 1054
899; CHECK-D-NEXT:    vrsub.vx v8, v8, a0
900; CHECK-D-NEXT:    li a0, 32
901; CHECK-D-NEXT:    vminu.vx v8, v8, a0
902; CHECK-D-NEXT:    ret
903;
904; CHECK-ZVBB-LABEL: ctlz_nxv2i32:
905; CHECK-ZVBB:       # %bb.0:
906; CHECK-ZVBB-NEXT:    vsetvli a0, zero, e32, m1, ta, ma
907; CHECK-ZVBB-NEXT:    vclz.v v8, v8
908; CHECK-ZVBB-NEXT:    ret
909  %a = call <vscale x 2 x i32> @llvm.ctlz.nxv2i32(<vscale x 2 x i32> %va, i1 false)
910  ret <vscale x 2 x i32> %a
911}
912declare <vscale x 2 x i32> @llvm.ctlz.nxv2i32(<vscale x 2 x i32>, i1)
913
914define <vscale x 4 x i32> @ctlz_nxv4i32(<vscale x 4 x i32> %va) {
915; CHECK-ZVE64X-LABEL: ctlz_nxv4i32:
916; CHECK-ZVE64X:       # %bb.0:
917; CHECK-ZVE64X-NEXT:    vsetvli a0, zero, e32, m2, ta, ma
918; CHECK-ZVE64X-NEXT:    vsrl.vi v10, v8, 1
919; CHECK-ZVE64X-NEXT:    lui a0, 349525
920; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v10
921; CHECK-ZVE64X-NEXT:    addi a0, a0, 1365
922; CHECK-ZVE64X-NEXT:    vsrl.vi v10, v8, 2
923; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v10
924; CHECK-ZVE64X-NEXT:    vsrl.vi v10, v8, 4
925; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v10
926; CHECK-ZVE64X-NEXT:    vsrl.vi v10, v8, 8
927; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v10
928; CHECK-ZVE64X-NEXT:    vsrl.vi v10, v8, 16
929; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v10
930; CHECK-ZVE64X-NEXT:    vnot.v v8, v8
931; CHECK-ZVE64X-NEXT:    vsrl.vi v10, v8, 1
932; CHECK-ZVE64X-NEXT:    vand.vx v10, v10, a0
933; CHECK-ZVE64X-NEXT:    lui a0, 209715
934; CHECK-ZVE64X-NEXT:    addi a0, a0, 819
935; CHECK-ZVE64X-NEXT:    vsub.vv v8, v8, v10
936; CHECK-ZVE64X-NEXT:    vand.vx v10, v8, a0
937; CHECK-ZVE64X-NEXT:    vsrl.vi v8, v8, 2
938; CHECK-ZVE64X-NEXT:    vand.vx v8, v8, a0
939; CHECK-ZVE64X-NEXT:    lui a0, 61681
940; CHECK-ZVE64X-NEXT:    addi a0, a0, -241
941; CHECK-ZVE64X-NEXT:    vadd.vv v8, v10, v8
942; CHECK-ZVE64X-NEXT:    vsrl.vi v10, v8, 4
943; CHECK-ZVE64X-NEXT:    vadd.vv v8, v8, v10
944; CHECK-ZVE64X-NEXT:    vand.vx v8, v8, a0
945; CHECK-ZVE64X-NEXT:    lui a0, 4112
946; CHECK-ZVE64X-NEXT:    addi a0, a0, 257
947; CHECK-ZVE64X-NEXT:    vmul.vx v8, v8, a0
948; CHECK-ZVE64X-NEXT:    vsrl.vi v8, v8, 24
949; CHECK-ZVE64X-NEXT:    ret
950;
951; CHECK-F-LABEL: ctlz_nxv4i32:
952; CHECK-F:       # %bb.0:
953; CHECK-F-NEXT:    fsrmi a0, 1
954; CHECK-F-NEXT:    vsetvli a1, zero, e32, m2, ta, ma
955; CHECK-F-NEXT:    vfcvt.f.xu.v v8, v8
956; CHECK-F-NEXT:    li a1, 158
957; CHECK-F-NEXT:    vsrl.vi v8, v8, 23
958; CHECK-F-NEXT:    vrsub.vx v8, v8, a1
959; CHECK-F-NEXT:    li a1, 32
960; CHECK-F-NEXT:    vminu.vx v8, v8, a1
961; CHECK-F-NEXT:    fsrm a0
962; CHECK-F-NEXT:    ret
963;
964; CHECK-D-LABEL: ctlz_nxv4i32:
965; CHECK-D:       # %bb.0:
966; CHECK-D-NEXT:    vsetvli a0, zero, e32, m2, ta, ma
967; CHECK-D-NEXT:    vfwcvt.f.xu.v v12, v8
968; CHECK-D-NEXT:    li a0, 52
969; CHECK-D-NEXT:    vnsrl.wx v8, v12, a0
970; CHECK-D-NEXT:    li a0, 1054
971; CHECK-D-NEXT:    vrsub.vx v8, v8, a0
972; CHECK-D-NEXT:    li a0, 32
973; CHECK-D-NEXT:    vminu.vx v8, v8, a0
974; CHECK-D-NEXT:    ret
975;
976; CHECK-ZVBB-LABEL: ctlz_nxv4i32:
977; CHECK-ZVBB:       # %bb.0:
978; CHECK-ZVBB-NEXT:    vsetvli a0, zero, e32, m2, ta, ma
979; CHECK-ZVBB-NEXT:    vclz.v v8, v8
980; CHECK-ZVBB-NEXT:    ret
981  %a = call <vscale x 4 x i32> @llvm.ctlz.nxv4i32(<vscale x 4 x i32> %va, i1 false)
982  ret <vscale x 4 x i32> %a
983}
984declare <vscale x 4 x i32> @llvm.ctlz.nxv4i32(<vscale x 4 x i32>, i1)
985
986define <vscale x 8 x i32> @ctlz_nxv8i32(<vscale x 8 x i32> %va) {
987; CHECK-ZVE64X-LABEL: ctlz_nxv8i32:
988; CHECK-ZVE64X:       # %bb.0:
989; CHECK-ZVE64X-NEXT:    vsetvli a0, zero, e32, m4, ta, ma
990; CHECK-ZVE64X-NEXT:    vsrl.vi v12, v8, 1
991; CHECK-ZVE64X-NEXT:    lui a0, 349525
992; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v12
993; CHECK-ZVE64X-NEXT:    addi a0, a0, 1365
994; CHECK-ZVE64X-NEXT:    vsrl.vi v12, v8, 2
995; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v12
996; CHECK-ZVE64X-NEXT:    vsrl.vi v12, v8, 4
997; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v12
998; CHECK-ZVE64X-NEXT:    vsrl.vi v12, v8, 8
999; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v12
1000; CHECK-ZVE64X-NEXT:    vsrl.vi v12, v8, 16
1001; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v12
1002; CHECK-ZVE64X-NEXT:    vnot.v v8, v8
1003; CHECK-ZVE64X-NEXT:    vsrl.vi v12, v8, 1
1004; CHECK-ZVE64X-NEXT:    vand.vx v12, v12, a0
1005; CHECK-ZVE64X-NEXT:    lui a0, 209715
1006; CHECK-ZVE64X-NEXT:    addi a0, a0, 819
1007; CHECK-ZVE64X-NEXT:    vsub.vv v8, v8, v12
1008; CHECK-ZVE64X-NEXT:    vand.vx v12, v8, a0
1009; CHECK-ZVE64X-NEXT:    vsrl.vi v8, v8, 2
1010; CHECK-ZVE64X-NEXT:    vand.vx v8, v8, a0
1011; CHECK-ZVE64X-NEXT:    lui a0, 61681
1012; CHECK-ZVE64X-NEXT:    addi a0, a0, -241
1013; CHECK-ZVE64X-NEXT:    vadd.vv v8, v12, v8
1014; CHECK-ZVE64X-NEXT:    vsrl.vi v12, v8, 4
1015; CHECK-ZVE64X-NEXT:    vadd.vv v8, v8, v12
1016; CHECK-ZVE64X-NEXT:    vand.vx v8, v8, a0
1017; CHECK-ZVE64X-NEXT:    lui a0, 4112
1018; CHECK-ZVE64X-NEXT:    addi a0, a0, 257
1019; CHECK-ZVE64X-NEXT:    vmul.vx v8, v8, a0
1020; CHECK-ZVE64X-NEXT:    vsrl.vi v8, v8, 24
1021; CHECK-ZVE64X-NEXT:    ret
1022;
1023; CHECK-F-LABEL: ctlz_nxv8i32:
1024; CHECK-F:       # %bb.0:
1025; CHECK-F-NEXT:    fsrmi a0, 1
1026; CHECK-F-NEXT:    vsetvli a1, zero, e32, m4, ta, ma
1027; CHECK-F-NEXT:    vfcvt.f.xu.v v8, v8
1028; CHECK-F-NEXT:    li a1, 158
1029; CHECK-F-NEXT:    vsrl.vi v8, v8, 23
1030; CHECK-F-NEXT:    vrsub.vx v8, v8, a1
1031; CHECK-F-NEXT:    li a1, 32
1032; CHECK-F-NEXT:    vminu.vx v8, v8, a1
1033; CHECK-F-NEXT:    fsrm a0
1034; CHECK-F-NEXT:    ret
1035;
1036; CHECK-D-LABEL: ctlz_nxv8i32:
1037; CHECK-D:       # %bb.0:
1038; CHECK-D-NEXT:    vsetvli a0, zero, e32, m4, ta, ma
1039; CHECK-D-NEXT:    vfwcvt.f.xu.v v16, v8
1040; CHECK-D-NEXT:    li a0, 52
1041; CHECK-D-NEXT:    vnsrl.wx v8, v16, a0
1042; CHECK-D-NEXT:    li a0, 1054
1043; CHECK-D-NEXT:    vrsub.vx v8, v8, a0
1044; CHECK-D-NEXT:    li a0, 32
1045; CHECK-D-NEXT:    vminu.vx v8, v8, a0
1046; CHECK-D-NEXT:    ret
1047;
1048; CHECK-ZVBB-LABEL: ctlz_nxv8i32:
1049; CHECK-ZVBB:       # %bb.0:
1050; CHECK-ZVBB-NEXT:    vsetvli a0, zero, e32, m4, ta, ma
1051; CHECK-ZVBB-NEXT:    vclz.v v8, v8
1052; CHECK-ZVBB-NEXT:    ret
1053  %a = call <vscale x 8 x i32> @llvm.ctlz.nxv8i32(<vscale x 8 x i32> %va, i1 false)
1054  ret <vscale x 8 x i32> %a
1055}
1056declare <vscale x 8 x i32> @llvm.ctlz.nxv8i32(<vscale x 8 x i32>, i1)
1057
1058define <vscale x 16 x i32> @ctlz_nxv16i32(<vscale x 16 x i32> %va) {
1059; CHECK-ZVE64X-LABEL: ctlz_nxv16i32:
1060; CHECK-ZVE64X:       # %bb.0:
1061; CHECK-ZVE64X-NEXT:    vsetvli a0, zero, e32, m8, ta, ma
1062; CHECK-ZVE64X-NEXT:    vsrl.vi v16, v8, 1
1063; CHECK-ZVE64X-NEXT:    lui a0, 349525
1064; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v16
1065; CHECK-ZVE64X-NEXT:    addi a0, a0, 1365
1066; CHECK-ZVE64X-NEXT:    vsrl.vi v16, v8, 2
1067; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v16
1068; CHECK-ZVE64X-NEXT:    vsrl.vi v16, v8, 4
1069; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v16
1070; CHECK-ZVE64X-NEXT:    vsrl.vi v16, v8, 8
1071; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v16
1072; CHECK-ZVE64X-NEXT:    vsrl.vi v16, v8, 16
1073; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v16
1074; CHECK-ZVE64X-NEXT:    vnot.v v8, v8
1075; CHECK-ZVE64X-NEXT:    vsrl.vi v16, v8, 1
1076; CHECK-ZVE64X-NEXT:    vand.vx v16, v16, a0
1077; CHECK-ZVE64X-NEXT:    lui a0, 209715
1078; CHECK-ZVE64X-NEXT:    addi a0, a0, 819
1079; CHECK-ZVE64X-NEXT:    vsub.vv v8, v8, v16
1080; CHECK-ZVE64X-NEXT:    vand.vx v16, v8, a0
1081; CHECK-ZVE64X-NEXT:    vsrl.vi v8, v8, 2
1082; CHECK-ZVE64X-NEXT:    vand.vx v8, v8, a0
1083; CHECK-ZVE64X-NEXT:    lui a0, 61681
1084; CHECK-ZVE64X-NEXT:    addi a0, a0, -241
1085; CHECK-ZVE64X-NEXT:    vadd.vv v8, v16, v8
1086; CHECK-ZVE64X-NEXT:    vsrl.vi v16, v8, 4
1087; CHECK-ZVE64X-NEXT:    vadd.vv v8, v8, v16
1088; CHECK-ZVE64X-NEXT:    vand.vx v8, v8, a0
1089; CHECK-ZVE64X-NEXT:    lui a0, 4112
1090; CHECK-ZVE64X-NEXT:    addi a0, a0, 257
1091; CHECK-ZVE64X-NEXT:    vmul.vx v8, v8, a0
1092; CHECK-ZVE64X-NEXT:    vsrl.vi v8, v8, 24
1093; CHECK-ZVE64X-NEXT:    ret
1094;
1095; CHECK-F-LABEL: ctlz_nxv16i32:
1096; CHECK-F:       # %bb.0:
1097; CHECK-F-NEXT:    fsrmi a0, 1
1098; CHECK-F-NEXT:    vsetvli a1, zero, e32, m8, ta, ma
1099; CHECK-F-NEXT:    vfcvt.f.xu.v v8, v8
1100; CHECK-F-NEXT:    li a1, 158
1101; CHECK-F-NEXT:    vsrl.vi v8, v8, 23
1102; CHECK-F-NEXT:    vrsub.vx v8, v8, a1
1103; CHECK-F-NEXT:    li a1, 32
1104; CHECK-F-NEXT:    vminu.vx v8, v8, a1
1105; CHECK-F-NEXT:    fsrm a0
1106; CHECK-F-NEXT:    ret
1107;
1108; CHECK-D-LABEL: ctlz_nxv16i32:
1109; CHECK-D:       # %bb.0:
1110; CHECK-D-NEXT:    fsrmi a0, 1
1111; CHECK-D-NEXT:    vsetvli a1, zero, e32, m8, ta, ma
1112; CHECK-D-NEXT:    vfcvt.f.xu.v v8, v8
1113; CHECK-D-NEXT:    li a1, 158
1114; CHECK-D-NEXT:    vsrl.vi v8, v8, 23
1115; CHECK-D-NEXT:    vrsub.vx v8, v8, a1
1116; CHECK-D-NEXT:    li a1, 32
1117; CHECK-D-NEXT:    vminu.vx v8, v8, a1
1118; CHECK-D-NEXT:    fsrm a0
1119; CHECK-D-NEXT:    ret
1120;
1121; CHECK-ZVBB-LABEL: ctlz_nxv16i32:
1122; CHECK-ZVBB:       # %bb.0:
1123; CHECK-ZVBB-NEXT:    vsetvli a0, zero, e32, m8, ta, ma
1124; CHECK-ZVBB-NEXT:    vclz.v v8, v8
1125; CHECK-ZVBB-NEXT:    ret
1126  %a = call <vscale x 16 x i32> @llvm.ctlz.nxv16i32(<vscale x 16 x i32> %va, i1 false)
1127  ret <vscale x 16 x i32> %a
1128}
1129declare <vscale x 16 x i32> @llvm.ctlz.nxv16i32(<vscale x 16 x i32>, i1)
1130
1131define <vscale x 1 x i64> @ctlz_nxv1i64(<vscale x 1 x i64> %va) {
1132; RV32I-LABEL: ctlz_nxv1i64:
1133; RV32I:       # %bb.0:
1134; RV32I-NEXT:    vsetvli a0, zero, e64, m1, ta, ma
1135; RV32I-NEXT:    vsrl.vi v9, v8, 1
1136; RV32I-NEXT:    lui a0, 349525
1137; RV32I-NEXT:    addi a0, a0, 1365
1138; RV32I-NEXT:    vsetvli a1, zero, e32, m1, ta, ma
1139; RV32I-NEXT:    vmv.v.x v10, a0
1140; RV32I-NEXT:    li a0, 32
1141; RV32I-NEXT:    vsetvli a1, zero, e64, m1, ta, ma
1142; RV32I-NEXT:    vor.vv v8, v8, v9
1143; RV32I-NEXT:    vsrl.vi v9, v8, 2
1144; RV32I-NEXT:    vor.vv v8, v8, v9
1145; RV32I-NEXT:    vsrl.vi v9, v8, 4
1146; RV32I-NEXT:    vor.vv v8, v8, v9
1147; RV32I-NEXT:    vsrl.vi v9, v8, 8
1148; RV32I-NEXT:    vor.vv v8, v8, v9
1149; RV32I-NEXT:    vsrl.vi v9, v8, 16
1150; RV32I-NEXT:    vor.vv v8, v8, v9
1151; RV32I-NEXT:    vsrl.vx v9, v8, a0
1152; RV32I-NEXT:    lui a0, 209715
1153; RV32I-NEXT:    addi a0, a0, 819
1154; RV32I-NEXT:    vor.vv v8, v8, v9
1155; RV32I-NEXT:    vnot.v v8, v8
1156; RV32I-NEXT:    vsrl.vi v9, v8, 1
1157; RV32I-NEXT:    vand.vv v9, v9, v10
1158; RV32I-NEXT:    vsetvli a1, zero, e32, m1, ta, ma
1159; RV32I-NEXT:    vmv.v.x v10, a0
1160; RV32I-NEXT:    lui a0, 61681
1161; RV32I-NEXT:    addi a0, a0, -241
1162; RV32I-NEXT:    vsetvli a1, zero, e64, m1, ta, ma
1163; RV32I-NEXT:    vsub.vv v8, v8, v9
1164; RV32I-NEXT:    vand.vv v9, v8, v10
1165; RV32I-NEXT:    vsrl.vi v8, v8, 2
1166; RV32I-NEXT:    vand.vv v8, v8, v10
1167; RV32I-NEXT:    vsetvli a1, zero, e32, m1, ta, ma
1168; RV32I-NEXT:    vmv.v.x v10, a0
1169; RV32I-NEXT:    lui a0, 4112
1170; RV32I-NEXT:    addi a0, a0, 257
1171; RV32I-NEXT:    vsetvli a1, zero, e64, m1, ta, ma
1172; RV32I-NEXT:    vadd.vv v8, v9, v8
1173; RV32I-NEXT:    vsrl.vi v9, v8, 4
1174; RV32I-NEXT:    vadd.vv v8, v8, v9
1175; RV32I-NEXT:    vsetvli a1, zero, e32, m1, ta, ma
1176; RV32I-NEXT:    vmv.v.x v9, a0
1177; RV32I-NEXT:    vsetvli a0, zero, e64, m1, ta, ma
1178; RV32I-NEXT:    vand.vv v8, v8, v10
1179; RV32I-NEXT:    vmul.vv v8, v8, v9
1180; RV32I-NEXT:    li a0, 56
1181; RV32I-NEXT:    vsrl.vx v8, v8, a0
1182; RV32I-NEXT:    ret
1183;
1184; RV64I-LABEL: ctlz_nxv1i64:
1185; RV64I:       # %bb.0:
1186; RV64I-NEXT:    vsetvli a0, zero, e64, m1, ta, ma
1187; RV64I-NEXT:    vsrl.vi v9, v8, 1
1188; RV64I-NEXT:    lui a0, 349525
1189; RV64I-NEXT:    lui a1, 209715
1190; RV64I-NEXT:    lui a2, 61681
1191; RV64I-NEXT:    lui a3, 4112
1192; RV64I-NEXT:    addiw a0, a0, 1365
1193; RV64I-NEXT:    addiw a1, a1, 819
1194; RV64I-NEXT:    addiw a2, a2, -241
1195; RV64I-NEXT:    addiw a3, a3, 257
1196; RV64I-NEXT:    slli a4, a0, 32
1197; RV64I-NEXT:    add a0, a0, a4
1198; RV64I-NEXT:    slli a4, a1, 32
1199; RV64I-NEXT:    add a1, a1, a4
1200; RV64I-NEXT:    slli a4, a2, 32
1201; RV64I-NEXT:    add a2, a2, a4
1202; RV64I-NEXT:    slli a4, a3, 32
1203; RV64I-NEXT:    add a3, a3, a4
1204; RV64I-NEXT:    li a4, 32
1205; RV64I-NEXT:    vor.vv v8, v8, v9
1206; RV64I-NEXT:    vsrl.vi v9, v8, 2
1207; RV64I-NEXT:    vor.vv v8, v8, v9
1208; RV64I-NEXT:    vsrl.vi v9, v8, 4
1209; RV64I-NEXT:    vor.vv v8, v8, v9
1210; RV64I-NEXT:    vsrl.vi v9, v8, 8
1211; RV64I-NEXT:    vor.vv v8, v8, v9
1212; RV64I-NEXT:    vsrl.vi v9, v8, 16
1213; RV64I-NEXT:    vor.vv v8, v8, v9
1214; RV64I-NEXT:    vsrl.vx v9, v8, a4
1215; RV64I-NEXT:    vor.vv v8, v8, v9
1216; RV64I-NEXT:    vnot.v v8, v8
1217; RV64I-NEXT:    vsrl.vi v9, v8, 1
1218; RV64I-NEXT:    vand.vx v9, v9, a0
1219; RV64I-NEXT:    vsub.vv v8, v8, v9
1220; RV64I-NEXT:    vand.vx v9, v8, a1
1221; RV64I-NEXT:    vsrl.vi v8, v8, 2
1222; RV64I-NEXT:    vand.vx v8, v8, a1
1223; RV64I-NEXT:    vadd.vv v8, v9, v8
1224; RV64I-NEXT:    vsrl.vi v9, v8, 4
1225; RV64I-NEXT:    vadd.vv v8, v8, v9
1226; RV64I-NEXT:    vand.vx v8, v8, a2
1227; RV64I-NEXT:    vmul.vx v8, v8, a3
1228; RV64I-NEXT:    li a0, 56
1229; RV64I-NEXT:    vsrl.vx v8, v8, a0
1230; RV64I-NEXT:    ret
1231;
1232; CHECK-F-LABEL: ctlz_nxv1i64:
1233; CHECK-F:       # %bb.0:
1234; CHECK-F-NEXT:    li a0, 190
1235; CHECK-F-NEXT:    fsrmi a1, 1
1236; CHECK-F-NEXT:    vsetvli a2, zero, e32, mf2, ta, ma
1237; CHECK-F-NEXT:    vfncvt.f.xu.w v9, v8
1238; CHECK-F-NEXT:    vmv.v.x v8, a0
1239; CHECK-F-NEXT:    vsrl.vi v9, v9, 23
1240; CHECK-F-NEXT:    vwsubu.vv v10, v8, v9
1241; CHECK-F-NEXT:    li a0, 64
1242; CHECK-F-NEXT:    vsetvli zero, zero, e64, m1, ta, ma
1243; CHECK-F-NEXT:    vminu.vx v8, v10, a0
1244; CHECK-F-NEXT:    fsrm a1
1245; CHECK-F-NEXT:    ret
1246;
1247; CHECK-D-LABEL: ctlz_nxv1i64:
1248; CHECK-D:       # %bb.0:
1249; CHECK-D-NEXT:    fsrmi a0, 1
1250; CHECK-D-NEXT:    vsetvli a1, zero, e64, m1, ta, ma
1251; CHECK-D-NEXT:    vfcvt.f.xu.v v8, v8
1252; CHECK-D-NEXT:    li a1, 52
1253; CHECK-D-NEXT:    vsrl.vx v8, v8, a1
1254; CHECK-D-NEXT:    li a1, 1086
1255; CHECK-D-NEXT:    vrsub.vx v8, v8, a1
1256; CHECK-D-NEXT:    li a1, 64
1257; CHECK-D-NEXT:    vminu.vx v8, v8, a1
1258; CHECK-D-NEXT:    fsrm a0
1259; CHECK-D-NEXT:    ret
1260;
1261; CHECK-ZVBB-LABEL: ctlz_nxv1i64:
1262; CHECK-ZVBB:       # %bb.0:
1263; CHECK-ZVBB-NEXT:    vsetvli a0, zero, e64, m1, ta, ma
1264; CHECK-ZVBB-NEXT:    vclz.v v8, v8
1265; CHECK-ZVBB-NEXT:    ret
1266  %a = call <vscale x 1 x i64> @llvm.ctlz.nxv1i64(<vscale x 1 x i64> %va, i1 false)
1267  ret <vscale x 1 x i64> %a
1268}
1269declare <vscale x 1 x i64> @llvm.ctlz.nxv1i64(<vscale x 1 x i64>, i1)
1270
1271define <vscale x 2 x i64> @ctlz_nxv2i64(<vscale x 2 x i64> %va) {
1272; RV32I-LABEL: ctlz_nxv2i64:
1273; RV32I:       # %bb.0:
1274; RV32I-NEXT:    vsetvli a0, zero, e64, m2, ta, ma
1275; RV32I-NEXT:    vsrl.vi v10, v8, 1
1276; RV32I-NEXT:    lui a0, 349525
1277; RV32I-NEXT:    addi a0, a0, 1365
1278; RV32I-NEXT:    vsetvli a1, zero, e32, m2, ta, ma
1279; RV32I-NEXT:    vmv.v.x v12, a0
1280; RV32I-NEXT:    li a0, 32
1281; RV32I-NEXT:    vsetvli a1, zero, e64, m2, ta, ma
1282; RV32I-NEXT:    vor.vv v8, v8, v10
1283; RV32I-NEXT:    vsrl.vi v10, v8, 2
1284; RV32I-NEXT:    vor.vv v8, v8, v10
1285; RV32I-NEXT:    vsrl.vi v10, v8, 4
1286; RV32I-NEXT:    vor.vv v8, v8, v10
1287; RV32I-NEXT:    vsrl.vi v10, v8, 8
1288; RV32I-NEXT:    vor.vv v8, v8, v10
1289; RV32I-NEXT:    vsrl.vi v10, v8, 16
1290; RV32I-NEXT:    vor.vv v8, v8, v10
1291; RV32I-NEXT:    vsrl.vx v10, v8, a0
1292; RV32I-NEXT:    lui a0, 209715
1293; RV32I-NEXT:    addi a0, a0, 819
1294; RV32I-NEXT:    vor.vv v8, v8, v10
1295; RV32I-NEXT:    vnot.v v8, v8
1296; RV32I-NEXT:    vsrl.vi v10, v8, 1
1297; RV32I-NEXT:    vand.vv v10, v10, v12
1298; RV32I-NEXT:    vsetvli a1, zero, e32, m2, ta, ma
1299; RV32I-NEXT:    vmv.v.x v12, a0
1300; RV32I-NEXT:    lui a0, 61681
1301; RV32I-NEXT:    addi a0, a0, -241
1302; RV32I-NEXT:    vsetvli a1, zero, e64, m2, ta, ma
1303; RV32I-NEXT:    vsub.vv v8, v8, v10
1304; RV32I-NEXT:    vand.vv v10, v8, v12
1305; RV32I-NEXT:    vsrl.vi v8, v8, 2
1306; RV32I-NEXT:    vand.vv v8, v8, v12
1307; RV32I-NEXT:    vsetvli a1, zero, e32, m2, ta, ma
1308; RV32I-NEXT:    vmv.v.x v12, a0
1309; RV32I-NEXT:    lui a0, 4112
1310; RV32I-NEXT:    addi a0, a0, 257
1311; RV32I-NEXT:    vsetvli a1, zero, e64, m2, ta, ma
1312; RV32I-NEXT:    vadd.vv v8, v10, v8
1313; RV32I-NEXT:    vsrl.vi v10, v8, 4
1314; RV32I-NEXT:    vadd.vv v8, v8, v10
1315; RV32I-NEXT:    vsetvli a1, zero, e32, m2, ta, ma
1316; RV32I-NEXT:    vmv.v.x v10, a0
1317; RV32I-NEXT:    vsetvli a0, zero, e64, m2, ta, ma
1318; RV32I-NEXT:    vand.vv v8, v8, v12
1319; RV32I-NEXT:    vmul.vv v8, v8, v10
1320; RV32I-NEXT:    li a0, 56
1321; RV32I-NEXT:    vsrl.vx v8, v8, a0
1322; RV32I-NEXT:    ret
1323;
1324; RV64I-LABEL: ctlz_nxv2i64:
1325; RV64I:       # %bb.0:
1326; RV64I-NEXT:    vsetvli a0, zero, e64, m2, ta, ma
1327; RV64I-NEXT:    vsrl.vi v10, v8, 1
1328; RV64I-NEXT:    lui a0, 349525
1329; RV64I-NEXT:    lui a1, 209715
1330; RV64I-NEXT:    lui a2, 61681
1331; RV64I-NEXT:    lui a3, 4112
1332; RV64I-NEXT:    addiw a0, a0, 1365
1333; RV64I-NEXT:    addiw a1, a1, 819
1334; RV64I-NEXT:    addiw a2, a2, -241
1335; RV64I-NEXT:    addiw a3, a3, 257
1336; RV64I-NEXT:    slli a4, a0, 32
1337; RV64I-NEXT:    add a0, a0, a4
1338; RV64I-NEXT:    slli a4, a1, 32
1339; RV64I-NEXT:    add a1, a1, a4
1340; RV64I-NEXT:    slli a4, a2, 32
1341; RV64I-NEXT:    add a2, a2, a4
1342; RV64I-NEXT:    slli a4, a3, 32
1343; RV64I-NEXT:    add a3, a3, a4
1344; RV64I-NEXT:    li a4, 32
1345; RV64I-NEXT:    vor.vv v8, v8, v10
1346; RV64I-NEXT:    vsrl.vi v10, v8, 2
1347; RV64I-NEXT:    vor.vv v8, v8, v10
1348; RV64I-NEXT:    vsrl.vi v10, v8, 4
1349; RV64I-NEXT:    vor.vv v8, v8, v10
1350; RV64I-NEXT:    vsrl.vi v10, v8, 8
1351; RV64I-NEXT:    vor.vv v8, v8, v10
1352; RV64I-NEXT:    vsrl.vi v10, v8, 16
1353; RV64I-NEXT:    vor.vv v8, v8, v10
1354; RV64I-NEXT:    vsrl.vx v10, v8, a4
1355; RV64I-NEXT:    vor.vv v8, v8, v10
1356; RV64I-NEXT:    vnot.v v8, v8
1357; RV64I-NEXT:    vsrl.vi v10, v8, 1
1358; RV64I-NEXT:    vand.vx v10, v10, a0
1359; RV64I-NEXT:    vsub.vv v8, v8, v10
1360; RV64I-NEXT:    vand.vx v10, v8, a1
1361; RV64I-NEXT:    vsrl.vi v8, v8, 2
1362; RV64I-NEXT:    vand.vx v8, v8, a1
1363; RV64I-NEXT:    vadd.vv v8, v10, v8
1364; RV64I-NEXT:    vsrl.vi v10, v8, 4
1365; RV64I-NEXT:    vadd.vv v8, v8, v10
1366; RV64I-NEXT:    vand.vx v8, v8, a2
1367; RV64I-NEXT:    vmul.vx v8, v8, a3
1368; RV64I-NEXT:    li a0, 56
1369; RV64I-NEXT:    vsrl.vx v8, v8, a0
1370; RV64I-NEXT:    ret
1371;
1372; CHECK-F-LABEL: ctlz_nxv2i64:
1373; CHECK-F:       # %bb.0:
1374; CHECK-F-NEXT:    li a0, 190
1375; CHECK-F-NEXT:    fsrmi a1, 1
1376; CHECK-F-NEXT:    vsetvli a2, zero, e32, m1, ta, ma
1377; CHECK-F-NEXT:    vfncvt.f.xu.w v10, v8
1378; CHECK-F-NEXT:    vmv.v.x v8, a0
1379; CHECK-F-NEXT:    vsrl.vi v9, v10, 23
1380; CHECK-F-NEXT:    vwsubu.vv v10, v8, v9
1381; CHECK-F-NEXT:    li a0, 64
1382; CHECK-F-NEXT:    vsetvli zero, zero, e64, m2, ta, ma
1383; CHECK-F-NEXT:    vminu.vx v8, v10, a0
1384; CHECK-F-NEXT:    fsrm a1
1385; CHECK-F-NEXT:    ret
1386;
1387; CHECK-D-LABEL: ctlz_nxv2i64:
1388; CHECK-D:       # %bb.0:
1389; CHECK-D-NEXT:    fsrmi a0, 1
1390; CHECK-D-NEXT:    vsetvli a1, zero, e64, m2, ta, ma
1391; CHECK-D-NEXT:    vfcvt.f.xu.v v8, v8
1392; CHECK-D-NEXT:    li a1, 52
1393; CHECK-D-NEXT:    vsrl.vx v8, v8, a1
1394; CHECK-D-NEXT:    li a1, 1086
1395; CHECK-D-NEXT:    vrsub.vx v8, v8, a1
1396; CHECK-D-NEXT:    li a1, 64
1397; CHECK-D-NEXT:    vminu.vx v8, v8, a1
1398; CHECK-D-NEXT:    fsrm a0
1399; CHECK-D-NEXT:    ret
1400;
1401; CHECK-ZVBB-LABEL: ctlz_nxv2i64:
1402; CHECK-ZVBB:       # %bb.0:
1403; CHECK-ZVBB-NEXT:    vsetvli a0, zero, e64, m2, ta, ma
1404; CHECK-ZVBB-NEXT:    vclz.v v8, v8
1405; CHECK-ZVBB-NEXT:    ret
1406  %a = call <vscale x 2 x i64> @llvm.ctlz.nxv2i64(<vscale x 2 x i64> %va, i1 false)
1407  ret <vscale x 2 x i64> %a
1408}
1409declare <vscale x 2 x i64> @llvm.ctlz.nxv2i64(<vscale x 2 x i64>, i1)
1410
1411define <vscale x 4 x i64> @ctlz_nxv4i64(<vscale x 4 x i64> %va) {
1412; RV32I-LABEL: ctlz_nxv4i64:
1413; RV32I:       # %bb.0:
1414; RV32I-NEXT:    vsetvli a0, zero, e64, m4, ta, ma
1415; RV32I-NEXT:    vsrl.vi v12, v8, 1
1416; RV32I-NEXT:    lui a0, 349525
1417; RV32I-NEXT:    addi a0, a0, 1365
1418; RV32I-NEXT:    vsetvli a1, zero, e32, m4, ta, ma
1419; RV32I-NEXT:    vmv.v.x v16, a0
1420; RV32I-NEXT:    li a0, 32
1421; RV32I-NEXT:    vsetvli a1, zero, e64, m4, ta, ma
1422; RV32I-NEXT:    vor.vv v8, v8, v12
1423; RV32I-NEXT:    vsrl.vi v12, v8, 2
1424; RV32I-NEXT:    vor.vv v8, v8, v12
1425; RV32I-NEXT:    vsrl.vi v12, v8, 4
1426; RV32I-NEXT:    vor.vv v8, v8, v12
1427; RV32I-NEXT:    vsrl.vi v12, v8, 8
1428; RV32I-NEXT:    vor.vv v8, v8, v12
1429; RV32I-NEXT:    vsrl.vi v12, v8, 16
1430; RV32I-NEXT:    vor.vv v8, v8, v12
1431; RV32I-NEXT:    vsrl.vx v12, v8, a0
1432; RV32I-NEXT:    lui a0, 209715
1433; RV32I-NEXT:    addi a0, a0, 819
1434; RV32I-NEXT:    vor.vv v8, v8, v12
1435; RV32I-NEXT:    vnot.v v8, v8
1436; RV32I-NEXT:    vsrl.vi v12, v8, 1
1437; RV32I-NEXT:    vand.vv v12, v12, v16
1438; RV32I-NEXT:    vsetvli a1, zero, e32, m4, ta, ma
1439; RV32I-NEXT:    vmv.v.x v16, a0
1440; RV32I-NEXT:    lui a0, 61681
1441; RV32I-NEXT:    addi a0, a0, -241
1442; RV32I-NEXT:    vsetvli a1, zero, e64, m4, ta, ma
1443; RV32I-NEXT:    vsub.vv v8, v8, v12
1444; RV32I-NEXT:    vand.vv v12, v8, v16
1445; RV32I-NEXT:    vsrl.vi v8, v8, 2
1446; RV32I-NEXT:    vand.vv v8, v8, v16
1447; RV32I-NEXT:    vsetvli a1, zero, e32, m4, ta, ma
1448; RV32I-NEXT:    vmv.v.x v16, a0
1449; RV32I-NEXT:    lui a0, 4112
1450; RV32I-NEXT:    addi a0, a0, 257
1451; RV32I-NEXT:    vsetvli a1, zero, e64, m4, ta, ma
1452; RV32I-NEXT:    vadd.vv v8, v12, v8
1453; RV32I-NEXT:    vsrl.vi v12, v8, 4
1454; RV32I-NEXT:    vadd.vv v8, v8, v12
1455; RV32I-NEXT:    vsetvli a1, zero, e32, m4, ta, ma
1456; RV32I-NEXT:    vmv.v.x v12, a0
1457; RV32I-NEXT:    vsetvli a0, zero, e64, m4, ta, ma
1458; RV32I-NEXT:    vand.vv v8, v8, v16
1459; RV32I-NEXT:    vmul.vv v8, v8, v12
1460; RV32I-NEXT:    li a0, 56
1461; RV32I-NEXT:    vsrl.vx v8, v8, a0
1462; RV32I-NEXT:    ret
1463;
1464; RV64I-LABEL: ctlz_nxv4i64:
1465; RV64I:       # %bb.0:
1466; RV64I-NEXT:    vsetvli a0, zero, e64, m4, ta, ma
1467; RV64I-NEXT:    vsrl.vi v12, v8, 1
1468; RV64I-NEXT:    lui a0, 349525
1469; RV64I-NEXT:    lui a1, 209715
1470; RV64I-NEXT:    lui a2, 61681
1471; RV64I-NEXT:    lui a3, 4112
1472; RV64I-NEXT:    addiw a0, a0, 1365
1473; RV64I-NEXT:    addiw a1, a1, 819
1474; RV64I-NEXT:    addiw a2, a2, -241
1475; RV64I-NEXT:    addiw a3, a3, 257
1476; RV64I-NEXT:    slli a4, a0, 32
1477; RV64I-NEXT:    add a0, a0, a4
1478; RV64I-NEXT:    slli a4, a1, 32
1479; RV64I-NEXT:    add a1, a1, a4
1480; RV64I-NEXT:    slli a4, a2, 32
1481; RV64I-NEXT:    add a2, a2, a4
1482; RV64I-NEXT:    slli a4, a3, 32
1483; RV64I-NEXT:    add a3, a3, a4
1484; RV64I-NEXT:    li a4, 32
1485; RV64I-NEXT:    vor.vv v8, v8, v12
1486; RV64I-NEXT:    vsrl.vi v12, v8, 2
1487; RV64I-NEXT:    vor.vv v8, v8, v12
1488; RV64I-NEXT:    vsrl.vi v12, v8, 4
1489; RV64I-NEXT:    vor.vv v8, v8, v12
1490; RV64I-NEXT:    vsrl.vi v12, v8, 8
1491; RV64I-NEXT:    vor.vv v8, v8, v12
1492; RV64I-NEXT:    vsrl.vi v12, v8, 16
1493; RV64I-NEXT:    vor.vv v8, v8, v12
1494; RV64I-NEXT:    vsrl.vx v12, v8, a4
1495; RV64I-NEXT:    vor.vv v8, v8, v12
1496; RV64I-NEXT:    vnot.v v8, v8
1497; RV64I-NEXT:    vsrl.vi v12, v8, 1
1498; RV64I-NEXT:    vand.vx v12, v12, a0
1499; RV64I-NEXT:    vsub.vv v8, v8, v12
1500; RV64I-NEXT:    vand.vx v12, v8, a1
1501; RV64I-NEXT:    vsrl.vi v8, v8, 2
1502; RV64I-NEXT:    vand.vx v8, v8, a1
1503; RV64I-NEXT:    vadd.vv v8, v12, v8
1504; RV64I-NEXT:    vsrl.vi v12, v8, 4
1505; RV64I-NEXT:    vadd.vv v8, v8, v12
1506; RV64I-NEXT:    vand.vx v8, v8, a2
1507; RV64I-NEXT:    vmul.vx v8, v8, a3
1508; RV64I-NEXT:    li a0, 56
1509; RV64I-NEXT:    vsrl.vx v8, v8, a0
1510; RV64I-NEXT:    ret
1511;
1512; CHECK-F-LABEL: ctlz_nxv4i64:
1513; CHECK-F:       # %bb.0:
1514; CHECK-F-NEXT:    li a0, 190
1515; CHECK-F-NEXT:    fsrmi a1, 1
1516; CHECK-F-NEXT:    vsetvli a2, zero, e32, m2, ta, ma
1517; CHECK-F-NEXT:    vfncvt.f.xu.w v12, v8
1518; CHECK-F-NEXT:    vmv.v.x v8, a0
1519; CHECK-F-NEXT:    vsrl.vi v10, v12, 23
1520; CHECK-F-NEXT:    vwsubu.vv v12, v8, v10
1521; CHECK-F-NEXT:    li a0, 64
1522; CHECK-F-NEXT:    vsetvli zero, zero, e64, m4, ta, ma
1523; CHECK-F-NEXT:    vminu.vx v8, v12, a0
1524; CHECK-F-NEXT:    fsrm a1
1525; CHECK-F-NEXT:    ret
1526;
1527; CHECK-D-LABEL: ctlz_nxv4i64:
1528; CHECK-D:       # %bb.0:
1529; CHECK-D-NEXT:    fsrmi a0, 1
1530; CHECK-D-NEXT:    vsetvli a1, zero, e64, m4, ta, ma
1531; CHECK-D-NEXT:    vfcvt.f.xu.v v8, v8
1532; CHECK-D-NEXT:    li a1, 52
1533; CHECK-D-NEXT:    vsrl.vx v8, v8, a1
1534; CHECK-D-NEXT:    li a1, 1086
1535; CHECK-D-NEXT:    vrsub.vx v8, v8, a1
1536; CHECK-D-NEXT:    li a1, 64
1537; CHECK-D-NEXT:    vminu.vx v8, v8, a1
1538; CHECK-D-NEXT:    fsrm a0
1539; CHECK-D-NEXT:    ret
1540;
1541; CHECK-ZVBB-LABEL: ctlz_nxv4i64:
1542; CHECK-ZVBB:       # %bb.0:
1543; CHECK-ZVBB-NEXT:    vsetvli a0, zero, e64, m4, ta, ma
1544; CHECK-ZVBB-NEXT:    vclz.v v8, v8
1545; CHECK-ZVBB-NEXT:    ret
1546  %a = call <vscale x 4 x i64> @llvm.ctlz.nxv4i64(<vscale x 4 x i64> %va, i1 false)
1547  ret <vscale x 4 x i64> %a
1548}
1549declare <vscale x 4 x i64> @llvm.ctlz.nxv4i64(<vscale x 4 x i64>, i1)
1550
1551define <vscale x 8 x i64> @ctlz_nxv8i64(<vscale x 8 x i64> %va) {
1552; RV32I-LABEL: ctlz_nxv8i64:
1553; RV32I:       # %bb.0:
1554; RV32I-NEXT:    vsetvli a0, zero, e64, m8, ta, ma
1555; RV32I-NEXT:    vsrl.vi v16, v8, 1
1556; RV32I-NEXT:    lui a0, 349525
1557; RV32I-NEXT:    addi a0, a0, 1365
1558; RV32I-NEXT:    vsetvli a1, zero, e32, m8, ta, ma
1559; RV32I-NEXT:    vmv.v.x v24, a0
1560; RV32I-NEXT:    li a0, 32
1561; RV32I-NEXT:    vsetvli a1, zero, e64, m8, ta, ma
1562; RV32I-NEXT:    vor.vv v8, v8, v16
1563; RV32I-NEXT:    vsrl.vi v16, v8, 2
1564; RV32I-NEXT:    vor.vv v8, v8, v16
1565; RV32I-NEXT:    vsrl.vi v16, v8, 4
1566; RV32I-NEXT:    vor.vv v8, v8, v16
1567; RV32I-NEXT:    vsrl.vi v16, v8, 8
1568; RV32I-NEXT:    vor.vv v8, v8, v16
1569; RV32I-NEXT:    vsrl.vi v16, v8, 16
1570; RV32I-NEXT:    vor.vv v8, v8, v16
1571; RV32I-NEXT:    vsrl.vx v16, v8, a0
1572; RV32I-NEXT:    lui a0, 209715
1573; RV32I-NEXT:    addi a0, a0, 819
1574; RV32I-NEXT:    vor.vv v8, v8, v16
1575; RV32I-NEXT:    vnot.v v8, v8
1576; RV32I-NEXT:    vsrl.vi v16, v8, 1
1577; RV32I-NEXT:    vand.vv v24, v16, v24
1578; RV32I-NEXT:    vsetvli a1, zero, e32, m8, ta, ma
1579; RV32I-NEXT:    vmv.v.x v16, a0
1580; RV32I-NEXT:    lui a0, 61681
1581; RV32I-NEXT:    addi a0, a0, -241
1582; RV32I-NEXT:    vsetvli a1, zero, e64, m8, ta, ma
1583; RV32I-NEXT:    vsub.vv v8, v8, v24
1584; RV32I-NEXT:    vand.vv v24, v8, v16
1585; RV32I-NEXT:    vsrl.vi v8, v8, 2
1586; RV32I-NEXT:    vand.vv v8, v8, v16
1587; RV32I-NEXT:    vsetvli a1, zero, e32, m8, ta, ma
1588; RV32I-NEXT:    vmv.v.x v16, a0
1589; RV32I-NEXT:    lui a0, 4112
1590; RV32I-NEXT:    addi a0, a0, 257
1591; RV32I-NEXT:    vsetvli a1, zero, e64, m8, ta, ma
1592; RV32I-NEXT:    vadd.vv v8, v24, v8
1593; RV32I-NEXT:    vsrl.vi v24, v8, 4
1594; RV32I-NEXT:    vadd.vv v8, v8, v24
1595; RV32I-NEXT:    vsetvli a1, zero, e32, m8, ta, ma
1596; RV32I-NEXT:    vmv.v.x v24, a0
1597; RV32I-NEXT:    vsetvli a0, zero, e64, m8, ta, ma
1598; RV32I-NEXT:    vand.vv v8, v8, v16
1599; RV32I-NEXT:    vmul.vv v8, v8, v24
1600; RV32I-NEXT:    li a0, 56
1601; RV32I-NEXT:    vsrl.vx v8, v8, a0
1602; RV32I-NEXT:    ret
1603;
1604; RV64I-LABEL: ctlz_nxv8i64:
1605; RV64I:       # %bb.0:
1606; RV64I-NEXT:    vsetvli a0, zero, e64, m8, ta, ma
1607; RV64I-NEXT:    vsrl.vi v16, v8, 1
1608; RV64I-NEXT:    lui a0, 349525
1609; RV64I-NEXT:    lui a1, 209715
1610; RV64I-NEXT:    lui a2, 61681
1611; RV64I-NEXT:    lui a3, 4112
1612; RV64I-NEXT:    addiw a0, a0, 1365
1613; RV64I-NEXT:    addiw a1, a1, 819
1614; RV64I-NEXT:    addiw a2, a2, -241
1615; RV64I-NEXT:    addiw a3, a3, 257
1616; RV64I-NEXT:    slli a4, a0, 32
1617; RV64I-NEXT:    add a0, a0, a4
1618; RV64I-NEXT:    slli a4, a1, 32
1619; RV64I-NEXT:    add a1, a1, a4
1620; RV64I-NEXT:    slli a4, a2, 32
1621; RV64I-NEXT:    add a2, a2, a4
1622; RV64I-NEXT:    slli a4, a3, 32
1623; RV64I-NEXT:    add a3, a3, a4
1624; RV64I-NEXT:    li a4, 32
1625; RV64I-NEXT:    vor.vv v8, v8, v16
1626; RV64I-NEXT:    vsrl.vi v16, v8, 2
1627; RV64I-NEXT:    vor.vv v8, v8, v16
1628; RV64I-NEXT:    vsrl.vi v16, v8, 4
1629; RV64I-NEXT:    vor.vv v8, v8, v16
1630; RV64I-NEXT:    vsrl.vi v16, v8, 8
1631; RV64I-NEXT:    vor.vv v8, v8, v16
1632; RV64I-NEXT:    vsrl.vi v16, v8, 16
1633; RV64I-NEXT:    vor.vv v8, v8, v16
1634; RV64I-NEXT:    vsrl.vx v16, v8, a4
1635; RV64I-NEXT:    vor.vv v8, v8, v16
1636; RV64I-NEXT:    vnot.v v8, v8
1637; RV64I-NEXT:    vsrl.vi v16, v8, 1
1638; RV64I-NEXT:    vand.vx v16, v16, a0
1639; RV64I-NEXT:    vsub.vv v8, v8, v16
1640; RV64I-NEXT:    vand.vx v16, v8, a1
1641; RV64I-NEXT:    vsrl.vi v8, v8, 2
1642; RV64I-NEXT:    vand.vx v8, v8, a1
1643; RV64I-NEXT:    vadd.vv v8, v16, v8
1644; RV64I-NEXT:    vsrl.vi v16, v8, 4
1645; RV64I-NEXT:    vadd.vv v8, v8, v16
1646; RV64I-NEXT:    vand.vx v8, v8, a2
1647; RV64I-NEXT:    vmul.vx v8, v8, a3
1648; RV64I-NEXT:    li a0, 56
1649; RV64I-NEXT:    vsrl.vx v8, v8, a0
1650; RV64I-NEXT:    ret
1651;
1652; CHECK-F-LABEL: ctlz_nxv8i64:
1653; CHECK-F:       # %bb.0:
1654; CHECK-F-NEXT:    li a0, 190
1655; CHECK-F-NEXT:    fsrmi a1, 1
1656; CHECK-F-NEXT:    vsetvli a2, zero, e32, m4, ta, ma
1657; CHECK-F-NEXT:    vfncvt.f.xu.w v16, v8
1658; CHECK-F-NEXT:    vmv.v.x v8, a0
1659; CHECK-F-NEXT:    vsrl.vi v12, v16, 23
1660; CHECK-F-NEXT:    vwsubu.vv v16, v8, v12
1661; CHECK-F-NEXT:    li a0, 64
1662; CHECK-F-NEXT:    vsetvli zero, zero, e64, m8, ta, ma
1663; CHECK-F-NEXT:    vminu.vx v8, v16, a0
1664; CHECK-F-NEXT:    fsrm a1
1665; CHECK-F-NEXT:    ret
1666;
1667; CHECK-D-LABEL: ctlz_nxv8i64:
1668; CHECK-D:       # %bb.0:
1669; CHECK-D-NEXT:    fsrmi a0, 1
1670; CHECK-D-NEXT:    vsetvli a1, zero, e64, m8, ta, ma
1671; CHECK-D-NEXT:    vfcvt.f.xu.v v8, v8
1672; CHECK-D-NEXT:    li a1, 52
1673; CHECK-D-NEXT:    vsrl.vx v8, v8, a1
1674; CHECK-D-NEXT:    li a1, 1086
1675; CHECK-D-NEXT:    vrsub.vx v8, v8, a1
1676; CHECK-D-NEXT:    li a1, 64
1677; CHECK-D-NEXT:    vminu.vx v8, v8, a1
1678; CHECK-D-NEXT:    fsrm a0
1679; CHECK-D-NEXT:    ret
1680;
1681; CHECK-ZVBB-LABEL: ctlz_nxv8i64:
1682; CHECK-ZVBB:       # %bb.0:
1683; CHECK-ZVBB-NEXT:    vsetvli a0, zero, e64, m8, ta, ma
1684; CHECK-ZVBB-NEXT:    vclz.v v8, v8
1685; CHECK-ZVBB-NEXT:    ret
1686  %a = call <vscale x 8 x i64> @llvm.ctlz.nxv8i64(<vscale x 8 x i64> %va, i1 false)
1687  ret <vscale x 8 x i64> %a
1688}
1689declare <vscale x 8 x i64> @llvm.ctlz.nxv8i64(<vscale x 8 x i64>, i1)
1690
1691define <vscale x 1 x i8> @ctlz_zero_undef_nxv1i8(<vscale x 1 x i8> %va) {
1692; CHECK-ZVE64X-LABEL: ctlz_zero_undef_nxv1i8:
1693; CHECK-ZVE64X:       # %bb.0:
1694; CHECK-ZVE64X-NEXT:    vsetvli a0, zero, e8, mf8, ta, ma
1695; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 1
1696; CHECK-ZVE64X-NEXT:    li a0, 85
1697; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v9
1698; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 2
1699; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v9
1700; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 4
1701; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v9
1702; CHECK-ZVE64X-NEXT:    vnot.v v8, v8
1703; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 1
1704; CHECK-ZVE64X-NEXT:    vand.vx v9, v9, a0
1705; CHECK-ZVE64X-NEXT:    li a0, 51
1706; CHECK-ZVE64X-NEXT:    vsub.vv v8, v8, v9
1707; CHECK-ZVE64X-NEXT:    vand.vx v9, v8, a0
1708; CHECK-ZVE64X-NEXT:    vsrl.vi v8, v8, 2
1709; CHECK-ZVE64X-NEXT:    vand.vx v8, v8, a0
1710; CHECK-ZVE64X-NEXT:    vadd.vv v8, v9, v8
1711; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 4
1712; CHECK-ZVE64X-NEXT:    vadd.vv v8, v8, v9
1713; CHECK-ZVE64X-NEXT:    vand.vi v8, v8, 15
1714; CHECK-ZVE64X-NEXT:    ret
1715;
1716; CHECK-F-LABEL: ctlz_zero_undef_nxv1i8:
1717; CHECK-F:       # %bb.0:
1718; CHECK-F-NEXT:    vsetvli a0, zero, e16, mf4, ta, ma
1719; CHECK-F-NEXT:    vzext.vf2 v9, v8
1720; CHECK-F-NEXT:    vfwcvt.f.xu.v v8, v9
1721; CHECK-F-NEXT:    vnsrl.wi v8, v8, 23
1722; CHECK-F-NEXT:    vsetvli zero, zero, e8, mf8, ta, ma
1723; CHECK-F-NEXT:    vnsrl.wi v8, v8, 0
1724; CHECK-F-NEXT:    li a0, 134
1725; CHECK-F-NEXT:    vrsub.vx v8, v8, a0
1726; CHECK-F-NEXT:    ret
1727;
1728; CHECK-D-LABEL: ctlz_zero_undef_nxv1i8:
1729; CHECK-D:       # %bb.0:
1730; CHECK-D-NEXT:    vsetvli a0, zero, e16, mf4, ta, ma
1731; CHECK-D-NEXT:    vzext.vf2 v9, v8
1732; CHECK-D-NEXT:    vfwcvt.f.xu.v v8, v9
1733; CHECK-D-NEXT:    vnsrl.wi v8, v8, 23
1734; CHECK-D-NEXT:    vsetvli zero, zero, e8, mf8, ta, ma
1735; CHECK-D-NEXT:    vnsrl.wi v8, v8, 0
1736; CHECK-D-NEXT:    li a0, 134
1737; CHECK-D-NEXT:    vrsub.vx v8, v8, a0
1738; CHECK-D-NEXT:    ret
1739;
1740; CHECK-ZVBB-LABEL: ctlz_zero_undef_nxv1i8:
1741; CHECK-ZVBB:       # %bb.0:
1742; CHECK-ZVBB-NEXT:    vsetvli a0, zero, e8, mf8, ta, ma
1743; CHECK-ZVBB-NEXT:    vclz.v v8, v8
1744; CHECK-ZVBB-NEXT:    ret
1745  %a = call <vscale x 1 x i8> @llvm.ctlz.nxv1i8(<vscale x 1 x i8> %va, i1 true)
1746  ret <vscale x 1 x i8> %a
1747}
1748
1749define <vscale x 2 x i8> @ctlz_zero_undef_nxv2i8(<vscale x 2 x i8> %va) {
1750; CHECK-ZVE64X-LABEL: ctlz_zero_undef_nxv2i8:
1751; CHECK-ZVE64X:       # %bb.0:
1752; CHECK-ZVE64X-NEXT:    vsetvli a0, zero, e8, mf4, ta, ma
1753; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 1
1754; CHECK-ZVE64X-NEXT:    li a0, 85
1755; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v9
1756; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 2
1757; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v9
1758; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 4
1759; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v9
1760; CHECK-ZVE64X-NEXT:    vnot.v v8, v8
1761; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 1
1762; CHECK-ZVE64X-NEXT:    vand.vx v9, v9, a0
1763; CHECK-ZVE64X-NEXT:    li a0, 51
1764; CHECK-ZVE64X-NEXT:    vsub.vv v8, v8, v9
1765; CHECK-ZVE64X-NEXT:    vand.vx v9, v8, a0
1766; CHECK-ZVE64X-NEXT:    vsrl.vi v8, v8, 2
1767; CHECK-ZVE64X-NEXT:    vand.vx v8, v8, a0
1768; CHECK-ZVE64X-NEXT:    vadd.vv v8, v9, v8
1769; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 4
1770; CHECK-ZVE64X-NEXT:    vadd.vv v8, v8, v9
1771; CHECK-ZVE64X-NEXT:    vand.vi v8, v8, 15
1772; CHECK-ZVE64X-NEXT:    ret
1773;
1774; CHECK-F-LABEL: ctlz_zero_undef_nxv2i8:
1775; CHECK-F:       # %bb.0:
1776; CHECK-F-NEXT:    vsetvli a0, zero, e16, mf2, ta, ma
1777; CHECK-F-NEXT:    vzext.vf2 v9, v8
1778; CHECK-F-NEXT:    vfwcvt.f.xu.v v8, v9
1779; CHECK-F-NEXT:    vnsrl.wi v8, v8, 23
1780; CHECK-F-NEXT:    vsetvli zero, zero, e8, mf4, ta, ma
1781; CHECK-F-NEXT:    vnsrl.wi v8, v8, 0
1782; CHECK-F-NEXT:    li a0, 134
1783; CHECK-F-NEXT:    vrsub.vx v8, v8, a0
1784; CHECK-F-NEXT:    ret
1785;
1786; CHECK-D-LABEL: ctlz_zero_undef_nxv2i8:
1787; CHECK-D:       # %bb.0:
1788; CHECK-D-NEXT:    vsetvli a0, zero, e16, mf2, ta, ma
1789; CHECK-D-NEXT:    vzext.vf2 v9, v8
1790; CHECK-D-NEXT:    vfwcvt.f.xu.v v8, v9
1791; CHECK-D-NEXT:    vnsrl.wi v8, v8, 23
1792; CHECK-D-NEXT:    vsetvli zero, zero, e8, mf4, ta, ma
1793; CHECK-D-NEXT:    vnsrl.wi v8, v8, 0
1794; CHECK-D-NEXT:    li a0, 134
1795; CHECK-D-NEXT:    vrsub.vx v8, v8, a0
1796; CHECK-D-NEXT:    ret
1797;
1798; CHECK-ZVBB-LABEL: ctlz_zero_undef_nxv2i8:
1799; CHECK-ZVBB:       # %bb.0:
1800; CHECK-ZVBB-NEXT:    vsetvli a0, zero, e8, mf4, ta, ma
1801; CHECK-ZVBB-NEXT:    vclz.v v8, v8
1802; CHECK-ZVBB-NEXT:    ret
1803  %a = call <vscale x 2 x i8> @llvm.ctlz.nxv2i8(<vscale x 2 x i8> %va, i1 true)
1804  ret <vscale x 2 x i8> %a
1805}
1806
1807define <vscale x 4 x i8> @ctlz_zero_undef_nxv4i8(<vscale x 4 x i8> %va) {
1808; CHECK-ZVE64X-LABEL: ctlz_zero_undef_nxv4i8:
1809; CHECK-ZVE64X:       # %bb.0:
1810; CHECK-ZVE64X-NEXT:    vsetvli a0, zero, e8, mf2, ta, ma
1811; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 1
1812; CHECK-ZVE64X-NEXT:    li a0, 85
1813; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v9
1814; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 2
1815; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v9
1816; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 4
1817; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v9
1818; CHECK-ZVE64X-NEXT:    vnot.v v8, v8
1819; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 1
1820; CHECK-ZVE64X-NEXT:    vand.vx v9, v9, a0
1821; CHECK-ZVE64X-NEXT:    li a0, 51
1822; CHECK-ZVE64X-NEXT:    vsub.vv v8, v8, v9
1823; CHECK-ZVE64X-NEXT:    vand.vx v9, v8, a0
1824; CHECK-ZVE64X-NEXT:    vsrl.vi v8, v8, 2
1825; CHECK-ZVE64X-NEXT:    vand.vx v8, v8, a0
1826; CHECK-ZVE64X-NEXT:    vadd.vv v8, v9, v8
1827; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 4
1828; CHECK-ZVE64X-NEXT:    vadd.vv v8, v8, v9
1829; CHECK-ZVE64X-NEXT:    vand.vi v8, v8, 15
1830; CHECK-ZVE64X-NEXT:    ret
1831;
1832; CHECK-F-LABEL: ctlz_zero_undef_nxv4i8:
1833; CHECK-F:       # %bb.0:
1834; CHECK-F-NEXT:    vsetvli a0, zero, e16, m1, ta, ma
1835; CHECK-F-NEXT:    vzext.vf2 v9, v8
1836; CHECK-F-NEXT:    vfwcvt.f.xu.v v10, v9
1837; CHECK-F-NEXT:    vnsrl.wi v8, v10, 23
1838; CHECK-F-NEXT:    vsetvli zero, zero, e8, mf2, ta, ma
1839; CHECK-F-NEXT:    vnsrl.wi v8, v8, 0
1840; CHECK-F-NEXT:    li a0, 134
1841; CHECK-F-NEXT:    vrsub.vx v8, v8, a0
1842; CHECK-F-NEXT:    ret
1843;
1844; CHECK-D-LABEL: ctlz_zero_undef_nxv4i8:
1845; CHECK-D:       # %bb.0:
1846; CHECK-D-NEXT:    vsetvli a0, zero, e16, m1, ta, ma
1847; CHECK-D-NEXT:    vzext.vf2 v9, v8
1848; CHECK-D-NEXT:    vfwcvt.f.xu.v v10, v9
1849; CHECK-D-NEXT:    vnsrl.wi v8, v10, 23
1850; CHECK-D-NEXT:    vsetvli zero, zero, e8, mf2, ta, ma
1851; CHECK-D-NEXT:    vnsrl.wi v8, v8, 0
1852; CHECK-D-NEXT:    li a0, 134
1853; CHECK-D-NEXT:    vrsub.vx v8, v8, a0
1854; CHECK-D-NEXT:    ret
1855;
1856; CHECK-ZVBB-LABEL: ctlz_zero_undef_nxv4i8:
1857; CHECK-ZVBB:       # %bb.0:
1858; CHECK-ZVBB-NEXT:    vsetvli a0, zero, e8, mf2, ta, ma
1859; CHECK-ZVBB-NEXT:    vclz.v v8, v8
1860; CHECK-ZVBB-NEXT:    ret
1861  %a = call <vscale x 4 x i8> @llvm.ctlz.nxv4i8(<vscale x 4 x i8> %va, i1 true)
1862  ret <vscale x 4 x i8> %a
1863}
1864
1865define <vscale x 8 x i8> @ctlz_zero_undef_nxv8i8(<vscale x 8 x i8> %va) {
1866; CHECK-ZVE64X-LABEL: ctlz_zero_undef_nxv8i8:
1867; CHECK-ZVE64X:       # %bb.0:
1868; CHECK-ZVE64X-NEXT:    vsetvli a0, zero, e8, m1, ta, ma
1869; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 1
1870; CHECK-ZVE64X-NEXT:    li a0, 85
1871; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v9
1872; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 2
1873; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v9
1874; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 4
1875; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v9
1876; CHECK-ZVE64X-NEXT:    vnot.v v8, v8
1877; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 1
1878; CHECK-ZVE64X-NEXT:    vand.vx v9, v9, a0
1879; CHECK-ZVE64X-NEXT:    li a0, 51
1880; CHECK-ZVE64X-NEXT:    vsub.vv v8, v8, v9
1881; CHECK-ZVE64X-NEXT:    vand.vx v9, v8, a0
1882; CHECK-ZVE64X-NEXT:    vsrl.vi v8, v8, 2
1883; CHECK-ZVE64X-NEXT:    vand.vx v8, v8, a0
1884; CHECK-ZVE64X-NEXT:    vadd.vv v8, v9, v8
1885; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 4
1886; CHECK-ZVE64X-NEXT:    vadd.vv v8, v8, v9
1887; CHECK-ZVE64X-NEXT:    vand.vi v8, v8, 15
1888; CHECK-ZVE64X-NEXT:    ret
1889;
1890; CHECK-F-LABEL: ctlz_zero_undef_nxv8i8:
1891; CHECK-F:       # %bb.0:
1892; CHECK-F-NEXT:    vsetvli a0, zero, e16, m2, ta, ma
1893; CHECK-F-NEXT:    vzext.vf2 v10, v8
1894; CHECK-F-NEXT:    vfwcvt.f.xu.v v12, v10
1895; CHECK-F-NEXT:    vnsrl.wi v8, v12, 23
1896; CHECK-F-NEXT:    vsetvli zero, zero, e8, m1, ta, ma
1897; CHECK-F-NEXT:    vnsrl.wi v10, v8, 0
1898; CHECK-F-NEXT:    li a0, 134
1899; CHECK-F-NEXT:    vrsub.vx v8, v10, a0
1900; CHECK-F-NEXT:    ret
1901;
1902; CHECK-D-LABEL: ctlz_zero_undef_nxv8i8:
1903; CHECK-D:       # %bb.0:
1904; CHECK-D-NEXT:    vsetvli a0, zero, e16, m2, ta, ma
1905; CHECK-D-NEXT:    vzext.vf2 v10, v8
1906; CHECK-D-NEXT:    vfwcvt.f.xu.v v12, v10
1907; CHECK-D-NEXT:    vnsrl.wi v8, v12, 23
1908; CHECK-D-NEXT:    vsetvli zero, zero, e8, m1, ta, ma
1909; CHECK-D-NEXT:    vnsrl.wi v10, v8, 0
1910; CHECK-D-NEXT:    li a0, 134
1911; CHECK-D-NEXT:    vrsub.vx v8, v10, a0
1912; CHECK-D-NEXT:    ret
1913;
1914; CHECK-ZVBB-LABEL: ctlz_zero_undef_nxv8i8:
1915; CHECK-ZVBB:       # %bb.0:
1916; CHECK-ZVBB-NEXT:    vsetvli a0, zero, e8, m1, ta, ma
1917; CHECK-ZVBB-NEXT:    vclz.v v8, v8
1918; CHECK-ZVBB-NEXT:    ret
1919  %a = call <vscale x 8 x i8> @llvm.ctlz.nxv8i8(<vscale x 8 x i8> %va, i1 true)
1920  ret <vscale x 8 x i8> %a
1921}
1922
1923define <vscale x 16 x i8> @ctlz_zero_undef_nxv16i8(<vscale x 16 x i8> %va) {
1924; CHECK-ZVE64X-LABEL: ctlz_zero_undef_nxv16i8:
1925; CHECK-ZVE64X:       # %bb.0:
1926; CHECK-ZVE64X-NEXT:    vsetvli a0, zero, e8, m2, ta, ma
1927; CHECK-ZVE64X-NEXT:    vsrl.vi v10, v8, 1
1928; CHECK-ZVE64X-NEXT:    li a0, 85
1929; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v10
1930; CHECK-ZVE64X-NEXT:    vsrl.vi v10, v8, 2
1931; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v10
1932; CHECK-ZVE64X-NEXT:    vsrl.vi v10, v8, 4
1933; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v10
1934; CHECK-ZVE64X-NEXT:    vnot.v v8, v8
1935; CHECK-ZVE64X-NEXT:    vsrl.vi v10, v8, 1
1936; CHECK-ZVE64X-NEXT:    vand.vx v10, v10, a0
1937; CHECK-ZVE64X-NEXT:    li a0, 51
1938; CHECK-ZVE64X-NEXT:    vsub.vv v8, v8, v10
1939; CHECK-ZVE64X-NEXT:    vand.vx v10, v8, a0
1940; CHECK-ZVE64X-NEXT:    vsrl.vi v8, v8, 2
1941; CHECK-ZVE64X-NEXT:    vand.vx v8, v8, a0
1942; CHECK-ZVE64X-NEXT:    vadd.vv v8, v10, v8
1943; CHECK-ZVE64X-NEXT:    vsrl.vi v10, v8, 4
1944; CHECK-ZVE64X-NEXT:    vadd.vv v8, v8, v10
1945; CHECK-ZVE64X-NEXT:    vand.vi v8, v8, 15
1946; CHECK-ZVE64X-NEXT:    ret
1947;
1948; CHECK-F-LABEL: ctlz_zero_undef_nxv16i8:
1949; CHECK-F:       # %bb.0:
1950; CHECK-F-NEXT:    vsetvli a0, zero, e16, m4, ta, ma
1951; CHECK-F-NEXT:    vzext.vf2 v12, v8
1952; CHECK-F-NEXT:    vfwcvt.f.xu.v v16, v12
1953; CHECK-F-NEXT:    vnsrl.wi v8, v16, 23
1954; CHECK-F-NEXT:    vsetvli zero, zero, e8, m2, ta, ma
1955; CHECK-F-NEXT:    vnsrl.wi v12, v8, 0
1956; CHECK-F-NEXT:    li a0, 134
1957; CHECK-F-NEXT:    vrsub.vx v8, v12, a0
1958; CHECK-F-NEXT:    ret
1959;
1960; CHECK-D-LABEL: ctlz_zero_undef_nxv16i8:
1961; CHECK-D:       # %bb.0:
1962; CHECK-D-NEXT:    vsetvli a0, zero, e16, m4, ta, ma
1963; CHECK-D-NEXT:    vzext.vf2 v12, v8
1964; CHECK-D-NEXT:    vfwcvt.f.xu.v v16, v12
1965; CHECK-D-NEXT:    vnsrl.wi v8, v16, 23
1966; CHECK-D-NEXT:    vsetvli zero, zero, e8, m2, ta, ma
1967; CHECK-D-NEXT:    vnsrl.wi v12, v8, 0
1968; CHECK-D-NEXT:    li a0, 134
1969; CHECK-D-NEXT:    vrsub.vx v8, v12, a0
1970; CHECK-D-NEXT:    ret
1971;
1972; CHECK-ZVBB-LABEL: ctlz_zero_undef_nxv16i8:
1973; CHECK-ZVBB:       # %bb.0:
1974; CHECK-ZVBB-NEXT:    vsetvli a0, zero, e8, m2, ta, ma
1975; CHECK-ZVBB-NEXT:    vclz.v v8, v8
1976; CHECK-ZVBB-NEXT:    ret
1977  %a = call <vscale x 16 x i8> @llvm.ctlz.nxv16i8(<vscale x 16 x i8> %va, i1 true)
1978  ret <vscale x 16 x i8> %a
1979}
1980
1981define <vscale x 32 x i8> @ctlz_zero_undef_nxv32i8(<vscale x 32 x i8> %va) {
1982; CHECK-LABEL: ctlz_zero_undef_nxv32i8:
1983; CHECK:       # %bb.0:
1984; CHECK-NEXT:    vsetvli a0, zero, e8, m4, ta, ma
1985; CHECK-NEXT:    vsrl.vi v12, v8, 1
1986; CHECK-NEXT:    li a0, 85
1987; CHECK-NEXT:    vor.vv v8, v8, v12
1988; CHECK-NEXT:    vsrl.vi v12, v8, 2
1989; CHECK-NEXT:    vor.vv v8, v8, v12
1990; CHECK-NEXT:    vsrl.vi v12, v8, 4
1991; CHECK-NEXT:    vor.vv v8, v8, v12
1992; CHECK-NEXT:    vnot.v v8, v8
1993; CHECK-NEXT:    vsrl.vi v12, v8, 1
1994; CHECK-NEXT:    vand.vx v12, v12, a0
1995; CHECK-NEXT:    li a0, 51
1996; CHECK-NEXT:    vsub.vv v8, v8, v12
1997; CHECK-NEXT:    vand.vx v12, v8, a0
1998; CHECK-NEXT:    vsrl.vi v8, v8, 2
1999; CHECK-NEXT:    vand.vx v8, v8, a0
2000; CHECK-NEXT:    vadd.vv v8, v12, v8
2001; CHECK-NEXT:    vsrl.vi v12, v8, 4
2002; CHECK-NEXT:    vadd.vv v8, v8, v12
2003; CHECK-NEXT:    vand.vi v8, v8, 15
2004; CHECK-NEXT:    ret
2005;
2006; CHECK-ZVBB-LABEL: ctlz_zero_undef_nxv32i8:
2007; CHECK-ZVBB:       # %bb.0:
2008; CHECK-ZVBB-NEXT:    vsetvli a0, zero, e8, m4, ta, ma
2009; CHECK-ZVBB-NEXT:    vclz.v v8, v8
2010; CHECK-ZVBB-NEXT:    ret
2011  %a = call <vscale x 32 x i8> @llvm.ctlz.nxv32i8(<vscale x 32 x i8> %va, i1 true)
2012  ret <vscale x 32 x i8> %a
2013}
2014
2015define <vscale x 64 x i8> @ctlz_zero_undef_nxv64i8(<vscale x 64 x i8> %va) {
2016; CHECK-LABEL: ctlz_zero_undef_nxv64i8:
2017; CHECK:       # %bb.0:
2018; CHECK-NEXT:    vsetvli a0, zero, e8, m8, ta, ma
2019; CHECK-NEXT:    vsrl.vi v16, v8, 1
2020; CHECK-NEXT:    li a0, 85
2021; CHECK-NEXT:    vor.vv v8, v8, v16
2022; CHECK-NEXT:    vsrl.vi v16, v8, 2
2023; CHECK-NEXT:    vor.vv v8, v8, v16
2024; CHECK-NEXT:    vsrl.vi v16, v8, 4
2025; CHECK-NEXT:    vor.vv v8, v8, v16
2026; CHECK-NEXT:    vnot.v v8, v8
2027; CHECK-NEXT:    vsrl.vi v16, v8, 1
2028; CHECK-NEXT:    vand.vx v16, v16, a0
2029; CHECK-NEXT:    li a0, 51
2030; CHECK-NEXT:    vsub.vv v8, v8, v16
2031; CHECK-NEXT:    vand.vx v16, v8, a0
2032; CHECK-NEXT:    vsrl.vi v8, v8, 2
2033; CHECK-NEXT:    vand.vx v8, v8, a0
2034; CHECK-NEXT:    vadd.vv v8, v16, v8
2035; CHECK-NEXT:    vsrl.vi v16, v8, 4
2036; CHECK-NEXT:    vadd.vv v8, v8, v16
2037; CHECK-NEXT:    vand.vi v8, v8, 15
2038; CHECK-NEXT:    ret
2039;
2040; CHECK-ZVBB-LABEL: ctlz_zero_undef_nxv64i8:
2041; CHECK-ZVBB:       # %bb.0:
2042; CHECK-ZVBB-NEXT:    vsetvli a0, zero, e8, m8, ta, ma
2043; CHECK-ZVBB-NEXT:    vclz.v v8, v8
2044; CHECK-ZVBB-NEXT:    ret
2045  %a = call <vscale x 64 x i8> @llvm.ctlz.nxv64i8(<vscale x 64 x i8> %va, i1 true)
2046  ret <vscale x 64 x i8> %a
2047}
2048
2049define <vscale x 1 x i16> @ctlz_zero_undef_nxv1i16(<vscale x 1 x i16> %va) {
2050; CHECK-ZVE64X-LABEL: ctlz_zero_undef_nxv1i16:
2051; CHECK-ZVE64X:       # %bb.0:
2052; CHECK-ZVE64X-NEXT:    vsetvli a0, zero, e16, mf4, ta, ma
2053; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 1
2054; CHECK-ZVE64X-NEXT:    lui a0, 5
2055; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v9
2056; CHECK-ZVE64X-NEXT:    addi a0, a0, 1365
2057; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 2
2058; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v9
2059; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 4
2060; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v9
2061; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 8
2062; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v9
2063; CHECK-ZVE64X-NEXT:    vnot.v v8, v8
2064; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 1
2065; CHECK-ZVE64X-NEXT:    vand.vx v9, v9, a0
2066; CHECK-ZVE64X-NEXT:    lui a0, 3
2067; CHECK-ZVE64X-NEXT:    addi a0, a0, 819
2068; CHECK-ZVE64X-NEXT:    vsub.vv v8, v8, v9
2069; CHECK-ZVE64X-NEXT:    vand.vx v9, v8, a0
2070; CHECK-ZVE64X-NEXT:    vsrl.vi v8, v8, 2
2071; CHECK-ZVE64X-NEXT:    vand.vx v8, v8, a0
2072; CHECK-ZVE64X-NEXT:    lui a0, 1
2073; CHECK-ZVE64X-NEXT:    addi a0, a0, -241
2074; CHECK-ZVE64X-NEXT:    vadd.vv v8, v9, v8
2075; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 4
2076; CHECK-ZVE64X-NEXT:    vadd.vv v8, v8, v9
2077; CHECK-ZVE64X-NEXT:    vand.vx v8, v8, a0
2078; CHECK-ZVE64X-NEXT:    li a0, 257
2079; CHECK-ZVE64X-NEXT:    vmul.vx v8, v8, a0
2080; CHECK-ZVE64X-NEXT:    vsrl.vi v8, v8, 8
2081; CHECK-ZVE64X-NEXT:    ret
2082;
2083; CHECK-F-LABEL: ctlz_zero_undef_nxv1i16:
2084; CHECK-F:       # %bb.0:
2085; CHECK-F-NEXT:    vsetvli a0, zero, e16, mf4, ta, ma
2086; CHECK-F-NEXT:    vfwcvt.f.xu.v v9, v8
2087; CHECK-F-NEXT:    vnsrl.wi v8, v9, 23
2088; CHECK-F-NEXT:    li a0, 142
2089; CHECK-F-NEXT:    vrsub.vx v8, v8, a0
2090; CHECK-F-NEXT:    ret
2091;
2092; CHECK-D-LABEL: ctlz_zero_undef_nxv1i16:
2093; CHECK-D:       # %bb.0:
2094; CHECK-D-NEXT:    vsetvli a0, zero, e16, mf4, ta, ma
2095; CHECK-D-NEXT:    vfwcvt.f.xu.v v9, v8
2096; CHECK-D-NEXT:    vnsrl.wi v8, v9, 23
2097; CHECK-D-NEXT:    li a0, 142
2098; CHECK-D-NEXT:    vrsub.vx v8, v8, a0
2099; CHECK-D-NEXT:    ret
2100;
2101; CHECK-ZVBB-LABEL: ctlz_zero_undef_nxv1i16:
2102; CHECK-ZVBB:       # %bb.0:
2103; CHECK-ZVBB-NEXT:    vsetvli a0, zero, e16, mf4, ta, ma
2104; CHECK-ZVBB-NEXT:    vclz.v v8, v8
2105; CHECK-ZVBB-NEXT:    ret
2106  %a = call <vscale x 1 x i16> @llvm.ctlz.nxv1i16(<vscale x 1 x i16> %va, i1 true)
2107  ret <vscale x 1 x i16> %a
2108}
2109
2110define <vscale x 2 x i16> @ctlz_zero_undef_nxv2i16(<vscale x 2 x i16> %va) {
2111; CHECK-ZVE64X-LABEL: ctlz_zero_undef_nxv2i16:
2112; CHECK-ZVE64X:       # %bb.0:
2113; CHECK-ZVE64X-NEXT:    vsetvli a0, zero, e16, mf2, ta, ma
2114; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 1
2115; CHECK-ZVE64X-NEXT:    lui a0, 5
2116; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v9
2117; CHECK-ZVE64X-NEXT:    addi a0, a0, 1365
2118; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 2
2119; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v9
2120; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 4
2121; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v9
2122; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 8
2123; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v9
2124; CHECK-ZVE64X-NEXT:    vnot.v v8, v8
2125; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 1
2126; CHECK-ZVE64X-NEXT:    vand.vx v9, v9, a0
2127; CHECK-ZVE64X-NEXT:    lui a0, 3
2128; CHECK-ZVE64X-NEXT:    addi a0, a0, 819
2129; CHECK-ZVE64X-NEXT:    vsub.vv v8, v8, v9
2130; CHECK-ZVE64X-NEXT:    vand.vx v9, v8, a0
2131; CHECK-ZVE64X-NEXT:    vsrl.vi v8, v8, 2
2132; CHECK-ZVE64X-NEXT:    vand.vx v8, v8, a0
2133; CHECK-ZVE64X-NEXT:    lui a0, 1
2134; CHECK-ZVE64X-NEXT:    addi a0, a0, -241
2135; CHECK-ZVE64X-NEXT:    vadd.vv v8, v9, v8
2136; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 4
2137; CHECK-ZVE64X-NEXT:    vadd.vv v8, v8, v9
2138; CHECK-ZVE64X-NEXT:    vand.vx v8, v8, a0
2139; CHECK-ZVE64X-NEXT:    li a0, 257
2140; CHECK-ZVE64X-NEXT:    vmul.vx v8, v8, a0
2141; CHECK-ZVE64X-NEXT:    vsrl.vi v8, v8, 8
2142; CHECK-ZVE64X-NEXT:    ret
2143;
2144; CHECK-F-LABEL: ctlz_zero_undef_nxv2i16:
2145; CHECK-F:       # %bb.0:
2146; CHECK-F-NEXT:    vsetvli a0, zero, e16, mf2, ta, ma
2147; CHECK-F-NEXT:    vfwcvt.f.xu.v v9, v8
2148; CHECK-F-NEXT:    vnsrl.wi v8, v9, 23
2149; CHECK-F-NEXT:    li a0, 142
2150; CHECK-F-NEXT:    vrsub.vx v8, v8, a0
2151; CHECK-F-NEXT:    ret
2152;
2153; CHECK-D-LABEL: ctlz_zero_undef_nxv2i16:
2154; CHECK-D:       # %bb.0:
2155; CHECK-D-NEXT:    vsetvli a0, zero, e16, mf2, ta, ma
2156; CHECK-D-NEXT:    vfwcvt.f.xu.v v9, v8
2157; CHECK-D-NEXT:    vnsrl.wi v8, v9, 23
2158; CHECK-D-NEXT:    li a0, 142
2159; CHECK-D-NEXT:    vrsub.vx v8, v8, a0
2160; CHECK-D-NEXT:    ret
2161;
2162; CHECK-ZVBB-LABEL: ctlz_zero_undef_nxv2i16:
2163; CHECK-ZVBB:       # %bb.0:
2164; CHECK-ZVBB-NEXT:    vsetvli a0, zero, e16, mf2, ta, ma
2165; CHECK-ZVBB-NEXT:    vclz.v v8, v8
2166; CHECK-ZVBB-NEXT:    ret
2167  %a = call <vscale x 2 x i16> @llvm.ctlz.nxv2i16(<vscale x 2 x i16> %va, i1 true)
2168  ret <vscale x 2 x i16> %a
2169}
2170
2171define <vscale x 4 x i16> @ctlz_zero_undef_nxv4i16(<vscale x 4 x i16> %va) {
2172; CHECK-ZVE64X-LABEL: ctlz_zero_undef_nxv4i16:
2173; CHECK-ZVE64X:       # %bb.0:
2174; CHECK-ZVE64X-NEXT:    vsetvli a0, zero, e16, m1, ta, ma
2175; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 1
2176; CHECK-ZVE64X-NEXT:    lui a0, 5
2177; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v9
2178; CHECK-ZVE64X-NEXT:    addi a0, a0, 1365
2179; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 2
2180; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v9
2181; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 4
2182; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v9
2183; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 8
2184; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v9
2185; CHECK-ZVE64X-NEXT:    vnot.v v8, v8
2186; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 1
2187; CHECK-ZVE64X-NEXT:    vand.vx v9, v9, a0
2188; CHECK-ZVE64X-NEXT:    lui a0, 3
2189; CHECK-ZVE64X-NEXT:    addi a0, a0, 819
2190; CHECK-ZVE64X-NEXT:    vsub.vv v8, v8, v9
2191; CHECK-ZVE64X-NEXT:    vand.vx v9, v8, a0
2192; CHECK-ZVE64X-NEXT:    vsrl.vi v8, v8, 2
2193; CHECK-ZVE64X-NEXT:    vand.vx v8, v8, a0
2194; CHECK-ZVE64X-NEXT:    lui a0, 1
2195; CHECK-ZVE64X-NEXT:    addi a0, a0, -241
2196; CHECK-ZVE64X-NEXT:    vadd.vv v8, v9, v8
2197; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 4
2198; CHECK-ZVE64X-NEXT:    vadd.vv v8, v8, v9
2199; CHECK-ZVE64X-NEXT:    vand.vx v8, v8, a0
2200; CHECK-ZVE64X-NEXT:    li a0, 257
2201; CHECK-ZVE64X-NEXT:    vmul.vx v8, v8, a0
2202; CHECK-ZVE64X-NEXT:    vsrl.vi v8, v8, 8
2203; CHECK-ZVE64X-NEXT:    ret
2204;
2205; CHECK-F-LABEL: ctlz_zero_undef_nxv4i16:
2206; CHECK-F:       # %bb.0:
2207; CHECK-F-NEXT:    vsetvli a0, zero, e16, m1, ta, ma
2208; CHECK-F-NEXT:    vfwcvt.f.xu.v v10, v8
2209; CHECK-F-NEXT:    vnsrl.wi v8, v10, 23
2210; CHECK-F-NEXT:    li a0, 142
2211; CHECK-F-NEXT:    vrsub.vx v8, v8, a0
2212; CHECK-F-NEXT:    ret
2213;
2214; CHECK-D-LABEL: ctlz_zero_undef_nxv4i16:
2215; CHECK-D:       # %bb.0:
2216; CHECK-D-NEXT:    vsetvli a0, zero, e16, m1, ta, ma
2217; CHECK-D-NEXT:    vfwcvt.f.xu.v v10, v8
2218; CHECK-D-NEXT:    vnsrl.wi v8, v10, 23
2219; CHECK-D-NEXT:    li a0, 142
2220; CHECK-D-NEXT:    vrsub.vx v8, v8, a0
2221; CHECK-D-NEXT:    ret
2222;
2223; CHECK-ZVBB-LABEL: ctlz_zero_undef_nxv4i16:
2224; CHECK-ZVBB:       # %bb.0:
2225; CHECK-ZVBB-NEXT:    vsetvli a0, zero, e16, m1, ta, ma
2226; CHECK-ZVBB-NEXT:    vclz.v v8, v8
2227; CHECK-ZVBB-NEXT:    ret
2228  %a = call <vscale x 4 x i16> @llvm.ctlz.nxv4i16(<vscale x 4 x i16> %va, i1 true)
2229  ret <vscale x 4 x i16> %a
2230}
2231
2232define <vscale x 8 x i16> @ctlz_zero_undef_nxv8i16(<vscale x 8 x i16> %va) {
2233; CHECK-ZVE64X-LABEL: ctlz_zero_undef_nxv8i16:
2234; CHECK-ZVE64X:       # %bb.0:
2235; CHECK-ZVE64X-NEXT:    vsetvli a0, zero, e16, m2, ta, ma
2236; CHECK-ZVE64X-NEXT:    vsrl.vi v10, v8, 1
2237; CHECK-ZVE64X-NEXT:    lui a0, 5
2238; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v10
2239; CHECK-ZVE64X-NEXT:    addi a0, a0, 1365
2240; CHECK-ZVE64X-NEXT:    vsrl.vi v10, v8, 2
2241; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v10
2242; CHECK-ZVE64X-NEXT:    vsrl.vi v10, v8, 4
2243; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v10
2244; CHECK-ZVE64X-NEXT:    vsrl.vi v10, v8, 8
2245; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v10
2246; CHECK-ZVE64X-NEXT:    vnot.v v8, v8
2247; CHECK-ZVE64X-NEXT:    vsrl.vi v10, v8, 1
2248; CHECK-ZVE64X-NEXT:    vand.vx v10, v10, a0
2249; CHECK-ZVE64X-NEXT:    lui a0, 3
2250; CHECK-ZVE64X-NEXT:    addi a0, a0, 819
2251; CHECK-ZVE64X-NEXT:    vsub.vv v8, v8, v10
2252; CHECK-ZVE64X-NEXT:    vand.vx v10, v8, a0
2253; CHECK-ZVE64X-NEXT:    vsrl.vi v8, v8, 2
2254; CHECK-ZVE64X-NEXT:    vand.vx v8, v8, a0
2255; CHECK-ZVE64X-NEXT:    lui a0, 1
2256; CHECK-ZVE64X-NEXT:    addi a0, a0, -241
2257; CHECK-ZVE64X-NEXT:    vadd.vv v8, v10, v8
2258; CHECK-ZVE64X-NEXT:    vsrl.vi v10, v8, 4
2259; CHECK-ZVE64X-NEXT:    vadd.vv v8, v8, v10
2260; CHECK-ZVE64X-NEXT:    vand.vx v8, v8, a0
2261; CHECK-ZVE64X-NEXT:    li a0, 257
2262; CHECK-ZVE64X-NEXT:    vmul.vx v8, v8, a0
2263; CHECK-ZVE64X-NEXT:    vsrl.vi v8, v8, 8
2264; CHECK-ZVE64X-NEXT:    ret
2265;
2266; CHECK-F-LABEL: ctlz_zero_undef_nxv8i16:
2267; CHECK-F:       # %bb.0:
2268; CHECK-F-NEXT:    vsetvli a0, zero, e16, m2, ta, ma
2269; CHECK-F-NEXT:    vfwcvt.f.xu.v v12, v8
2270; CHECK-F-NEXT:    vnsrl.wi v8, v12, 23
2271; CHECK-F-NEXT:    li a0, 142
2272; CHECK-F-NEXT:    vrsub.vx v8, v8, a0
2273; CHECK-F-NEXT:    ret
2274;
2275; CHECK-D-LABEL: ctlz_zero_undef_nxv8i16:
2276; CHECK-D:       # %bb.0:
2277; CHECK-D-NEXT:    vsetvli a0, zero, e16, m2, ta, ma
2278; CHECK-D-NEXT:    vfwcvt.f.xu.v v12, v8
2279; CHECK-D-NEXT:    vnsrl.wi v8, v12, 23
2280; CHECK-D-NEXT:    li a0, 142
2281; CHECK-D-NEXT:    vrsub.vx v8, v8, a0
2282; CHECK-D-NEXT:    ret
2283;
2284; CHECK-ZVBB-LABEL: ctlz_zero_undef_nxv8i16:
2285; CHECK-ZVBB:       # %bb.0:
2286; CHECK-ZVBB-NEXT:    vsetvli a0, zero, e16, m2, ta, ma
2287; CHECK-ZVBB-NEXT:    vclz.v v8, v8
2288; CHECK-ZVBB-NEXT:    ret
2289  %a = call <vscale x 8 x i16> @llvm.ctlz.nxv8i16(<vscale x 8 x i16> %va, i1 true)
2290  ret <vscale x 8 x i16> %a
2291}
2292
2293define <vscale x 16 x i16> @ctlz_zero_undef_nxv16i16(<vscale x 16 x i16> %va) {
2294; CHECK-ZVE64X-LABEL: ctlz_zero_undef_nxv16i16:
2295; CHECK-ZVE64X:       # %bb.0:
2296; CHECK-ZVE64X-NEXT:    vsetvli a0, zero, e16, m4, ta, ma
2297; CHECK-ZVE64X-NEXT:    vsrl.vi v12, v8, 1
2298; CHECK-ZVE64X-NEXT:    lui a0, 5
2299; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v12
2300; CHECK-ZVE64X-NEXT:    addi a0, a0, 1365
2301; CHECK-ZVE64X-NEXT:    vsrl.vi v12, v8, 2
2302; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v12
2303; CHECK-ZVE64X-NEXT:    vsrl.vi v12, v8, 4
2304; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v12
2305; CHECK-ZVE64X-NEXT:    vsrl.vi v12, v8, 8
2306; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v12
2307; CHECK-ZVE64X-NEXT:    vnot.v v8, v8
2308; CHECK-ZVE64X-NEXT:    vsrl.vi v12, v8, 1
2309; CHECK-ZVE64X-NEXT:    vand.vx v12, v12, a0
2310; CHECK-ZVE64X-NEXT:    lui a0, 3
2311; CHECK-ZVE64X-NEXT:    addi a0, a0, 819
2312; CHECK-ZVE64X-NEXT:    vsub.vv v8, v8, v12
2313; CHECK-ZVE64X-NEXT:    vand.vx v12, v8, a0
2314; CHECK-ZVE64X-NEXT:    vsrl.vi v8, v8, 2
2315; CHECK-ZVE64X-NEXT:    vand.vx v8, v8, a0
2316; CHECK-ZVE64X-NEXT:    lui a0, 1
2317; CHECK-ZVE64X-NEXT:    addi a0, a0, -241
2318; CHECK-ZVE64X-NEXT:    vadd.vv v8, v12, v8
2319; CHECK-ZVE64X-NEXT:    vsrl.vi v12, v8, 4
2320; CHECK-ZVE64X-NEXT:    vadd.vv v8, v8, v12
2321; CHECK-ZVE64X-NEXT:    vand.vx v8, v8, a0
2322; CHECK-ZVE64X-NEXT:    li a0, 257
2323; CHECK-ZVE64X-NEXT:    vmul.vx v8, v8, a0
2324; CHECK-ZVE64X-NEXT:    vsrl.vi v8, v8, 8
2325; CHECK-ZVE64X-NEXT:    ret
2326;
2327; CHECK-F-LABEL: ctlz_zero_undef_nxv16i16:
2328; CHECK-F:       # %bb.0:
2329; CHECK-F-NEXT:    vsetvli a0, zero, e16, m4, ta, ma
2330; CHECK-F-NEXT:    vfwcvt.f.xu.v v16, v8
2331; CHECK-F-NEXT:    vnsrl.wi v8, v16, 23
2332; CHECK-F-NEXT:    li a0, 142
2333; CHECK-F-NEXT:    vrsub.vx v8, v8, a0
2334; CHECK-F-NEXT:    ret
2335;
2336; CHECK-D-LABEL: ctlz_zero_undef_nxv16i16:
2337; CHECK-D:       # %bb.0:
2338; CHECK-D-NEXT:    vsetvli a0, zero, e16, m4, ta, ma
2339; CHECK-D-NEXT:    vfwcvt.f.xu.v v16, v8
2340; CHECK-D-NEXT:    vnsrl.wi v8, v16, 23
2341; CHECK-D-NEXT:    li a0, 142
2342; CHECK-D-NEXT:    vrsub.vx v8, v8, a0
2343; CHECK-D-NEXT:    ret
2344;
2345; CHECK-ZVBB-LABEL: ctlz_zero_undef_nxv16i16:
2346; CHECK-ZVBB:       # %bb.0:
2347; CHECK-ZVBB-NEXT:    vsetvli a0, zero, e16, m4, ta, ma
2348; CHECK-ZVBB-NEXT:    vclz.v v8, v8
2349; CHECK-ZVBB-NEXT:    ret
2350  %a = call <vscale x 16 x i16> @llvm.ctlz.nxv16i16(<vscale x 16 x i16> %va, i1 true)
2351  ret <vscale x 16 x i16> %a
2352}
2353
2354define <vscale x 32 x i16> @ctlz_zero_undef_nxv32i16(<vscale x 32 x i16> %va) {
2355; CHECK-LABEL: ctlz_zero_undef_nxv32i16:
2356; CHECK:       # %bb.0:
2357; CHECK-NEXT:    vsetvli a0, zero, e16, m8, ta, ma
2358; CHECK-NEXT:    vsrl.vi v16, v8, 1
2359; CHECK-NEXT:    lui a0, 5
2360; CHECK-NEXT:    vor.vv v8, v8, v16
2361; CHECK-NEXT:    addi a0, a0, 1365
2362; CHECK-NEXT:    vsrl.vi v16, v8, 2
2363; CHECK-NEXT:    vor.vv v8, v8, v16
2364; CHECK-NEXT:    vsrl.vi v16, v8, 4
2365; CHECK-NEXT:    vor.vv v8, v8, v16
2366; CHECK-NEXT:    vsrl.vi v16, v8, 8
2367; CHECK-NEXT:    vor.vv v8, v8, v16
2368; CHECK-NEXT:    vnot.v v8, v8
2369; CHECK-NEXT:    vsrl.vi v16, v8, 1
2370; CHECK-NEXT:    vand.vx v16, v16, a0
2371; CHECK-NEXT:    lui a0, 3
2372; CHECK-NEXT:    addi a0, a0, 819
2373; CHECK-NEXT:    vsub.vv v8, v8, v16
2374; CHECK-NEXT:    vand.vx v16, v8, a0
2375; CHECK-NEXT:    vsrl.vi v8, v8, 2
2376; CHECK-NEXT:    vand.vx v8, v8, a0
2377; CHECK-NEXT:    lui a0, 1
2378; CHECK-NEXT:    addi a0, a0, -241
2379; CHECK-NEXT:    vadd.vv v8, v16, v8
2380; CHECK-NEXT:    vsrl.vi v16, v8, 4
2381; CHECK-NEXT:    vadd.vv v8, v8, v16
2382; CHECK-NEXT:    vand.vx v8, v8, a0
2383; CHECK-NEXT:    li a0, 257
2384; CHECK-NEXT:    vmul.vx v8, v8, a0
2385; CHECK-NEXT:    vsrl.vi v8, v8, 8
2386; CHECK-NEXT:    ret
2387;
2388; CHECK-ZVBB-LABEL: ctlz_zero_undef_nxv32i16:
2389; CHECK-ZVBB:       # %bb.0:
2390; CHECK-ZVBB-NEXT:    vsetvli a0, zero, e16, m8, ta, ma
2391; CHECK-ZVBB-NEXT:    vclz.v v8, v8
2392; CHECK-ZVBB-NEXT:    ret
2393  %a = call <vscale x 32 x i16> @llvm.ctlz.nxv32i16(<vscale x 32 x i16> %va, i1 true)
2394  ret <vscale x 32 x i16> %a
2395}
2396
2397define <vscale x 1 x i32> @ctlz_zero_undef_nxv1i32(<vscale x 1 x i32> %va) {
2398; CHECK-ZVE64X-LABEL: ctlz_zero_undef_nxv1i32:
2399; CHECK-ZVE64X:       # %bb.0:
2400; CHECK-ZVE64X-NEXT:    vsetvli a0, zero, e32, mf2, ta, ma
2401; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 1
2402; CHECK-ZVE64X-NEXT:    lui a0, 349525
2403; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v9
2404; CHECK-ZVE64X-NEXT:    addi a0, a0, 1365
2405; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 2
2406; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v9
2407; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 4
2408; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v9
2409; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 8
2410; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v9
2411; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 16
2412; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v9
2413; CHECK-ZVE64X-NEXT:    vnot.v v8, v8
2414; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 1
2415; CHECK-ZVE64X-NEXT:    vand.vx v9, v9, a0
2416; CHECK-ZVE64X-NEXT:    lui a0, 209715
2417; CHECK-ZVE64X-NEXT:    addi a0, a0, 819
2418; CHECK-ZVE64X-NEXT:    vsub.vv v8, v8, v9
2419; CHECK-ZVE64X-NEXT:    vand.vx v9, v8, a0
2420; CHECK-ZVE64X-NEXT:    vsrl.vi v8, v8, 2
2421; CHECK-ZVE64X-NEXT:    vand.vx v8, v8, a0
2422; CHECK-ZVE64X-NEXT:    lui a0, 61681
2423; CHECK-ZVE64X-NEXT:    addi a0, a0, -241
2424; CHECK-ZVE64X-NEXT:    vadd.vv v8, v9, v8
2425; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 4
2426; CHECK-ZVE64X-NEXT:    vadd.vv v8, v8, v9
2427; CHECK-ZVE64X-NEXT:    vand.vx v8, v8, a0
2428; CHECK-ZVE64X-NEXT:    lui a0, 4112
2429; CHECK-ZVE64X-NEXT:    addi a0, a0, 257
2430; CHECK-ZVE64X-NEXT:    vmul.vx v8, v8, a0
2431; CHECK-ZVE64X-NEXT:    vsrl.vi v8, v8, 24
2432; CHECK-ZVE64X-NEXT:    ret
2433;
2434; CHECK-F-LABEL: ctlz_zero_undef_nxv1i32:
2435; CHECK-F:       # %bb.0:
2436; CHECK-F-NEXT:    fsrmi a0, 1
2437; CHECK-F-NEXT:    vsetvli a1, zero, e32, mf2, ta, ma
2438; CHECK-F-NEXT:    vfcvt.f.xu.v v8, v8
2439; CHECK-F-NEXT:    vsrl.vi v8, v8, 23
2440; CHECK-F-NEXT:    li a1, 158
2441; CHECK-F-NEXT:    vrsub.vx v8, v8, a1
2442; CHECK-F-NEXT:    fsrm a0
2443; CHECK-F-NEXT:    ret
2444;
2445; CHECK-D-LABEL: ctlz_zero_undef_nxv1i32:
2446; CHECK-D:       # %bb.0:
2447; CHECK-D-NEXT:    vsetvli a0, zero, e32, mf2, ta, ma
2448; CHECK-D-NEXT:    vfwcvt.f.xu.v v9, v8
2449; CHECK-D-NEXT:    li a0, 52
2450; CHECK-D-NEXT:    vnsrl.wx v8, v9, a0
2451; CHECK-D-NEXT:    li a0, 1054
2452; CHECK-D-NEXT:    vrsub.vx v8, v8, a0
2453; CHECK-D-NEXT:    ret
2454;
2455; CHECK-ZVBB-LABEL: ctlz_zero_undef_nxv1i32:
2456; CHECK-ZVBB:       # %bb.0:
2457; CHECK-ZVBB-NEXT:    vsetvli a0, zero, e32, mf2, ta, ma
2458; CHECK-ZVBB-NEXT:    vclz.v v8, v8
2459; CHECK-ZVBB-NEXT:    ret
2460  %a = call <vscale x 1 x i32> @llvm.ctlz.nxv1i32(<vscale x 1 x i32> %va, i1 true)
2461  ret <vscale x 1 x i32> %a
2462}
2463
2464define <vscale x 2 x i32> @ctlz_zero_undef_nxv2i32(<vscale x 2 x i32> %va) {
2465; CHECK-ZVE64X-LABEL: ctlz_zero_undef_nxv2i32:
2466; CHECK-ZVE64X:       # %bb.0:
2467; CHECK-ZVE64X-NEXT:    vsetvli a0, zero, e32, m1, ta, ma
2468; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 1
2469; CHECK-ZVE64X-NEXT:    lui a0, 349525
2470; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v9
2471; CHECK-ZVE64X-NEXT:    addi a0, a0, 1365
2472; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 2
2473; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v9
2474; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 4
2475; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v9
2476; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 8
2477; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v9
2478; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 16
2479; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v9
2480; CHECK-ZVE64X-NEXT:    vnot.v v8, v8
2481; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 1
2482; CHECK-ZVE64X-NEXT:    vand.vx v9, v9, a0
2483; CHECK-ZVE64X-NEXT:    lui a0, 209715
2484; CHECK-ZVE64X-NEXT:    addi a0, a0, 819
2485; CHECK-ZVE64X-NEXT:    vsub.vv v8, v8, v9
2486; CHECK-ZVE64X-NEXT:    vand.vx v9, v8, a0
2487; CHECK-ZVE64X-NEXT:    vsrl.vi v8, v8, 2
2488; CHECK-ZVE64X-NEXT:    vand.vx v8, v8, a0
2489; CHECK-ZVE64X-NEXT:    lui a0, 61681
2490; CHECK-ZVE64X-NEXT:    addi a0, a0, -241
2491; CHECK-ZVE64X-NEXT:    vadd.vv v8, v9, v8
2492; CHECK-ZVE64X-NEXT:    vsrl.vi v9, v8, 4
2493; CHECK-ZVE64X-NEXT:    vadd.vv v8, v8, v9
2494; CHECK-ZVE64X-NEXT:    vand.vx v8, v8, a0
2495; CHECK-ZVE64X-NEXT:    lui a0, 4112
2496; CHECK-ZVE64X-NEXT:    addi a0, a0, 257
2497; CHECK-ZVE64X-NEXT:    vmul.vx v8, v8, a0
2498; CHECK-ZVE64X-NEXT:    vsrl.vi v8, v8, 24
2499; CHECK-ZVE64X-NEXT:    ret
2500;
2501; CHECK-F-LABEL: ctlz_zero_undef_nxv2i32:
2502; CHECK-F:       # %bb.0:
2503; CHECK-F-NEXT:    fsrmi a0, 1
2504; CHECK-F-NEXT:    vsetvli a1, zero, e32, m1, ta, ma
2505; CHECK-F-NEXT:    vfcvt.f.xu.v v8, v8
2506; CHECK-F-NEXT:    vsrl.vi v8, v8, 23
2507; CHECK-F-NEXT:    li a1, 158
2508; CHECK-F-NEXT:    vrsub.vx v8, v8, a1
2509; CHECK-F-NEXT:    fsrm a0
2510; CHECK-F-NEXT:    ret
2511;
2512; CHECK-D-LABEL: ctlz_zero_undef_nxv2i32:
2513; CHECK-D:       # %bb.0:
2514; CHECK-D-NEXT:    vsetvli a0, zero, e32, m1, ta, ma
2515; CHECK-D-NEXT:    vfwcvt.f.xu.v v10, v8
2516; CHECK-D-NEXT:    li a0, 52
2517; CHECK-D-NEXT:    vnsrl.wx v8, v10, a0
2518; CHECK-D-NEXT:    li a0, 1054
2519; CHECK-D-NEXT:    vrsub.vx v8, v8, a0
2520; CHECK-D-NEXT:    ret
2521;
2522; CHECK-ZVBB-LABEL: ctlz_zero_undef_nxv2i32:
2523; CHECK-ZVBB:       # %bb.0:
2524; CHECK-ZVBB-NEXT:    vsetvli a0, zero, e32, m1, ta, ma
2525; CHECK-ZVBB-NEXT:    vclz.v v8, v8
2526; CHECK-ZVBB-NEXT:    ret
2527  %a = call <vscale x 2 x i32> @llvm.ctlz.nxv2i32(<vscale x 2 x i32> %va, i1 true)
2528  ret <vscale x 2 x i32> %a
2529}
2530
2531define <vscale x 4 x i32> @ctlz_zero_undef_nxv4i32(<vscale x 4 x i32> %va) {
2532; CHECK-ZVE64X-LABEL: ctlz_zero_undef_nxv4i32:
2533; CHECK-ZVE64X:       # %bb.0:
2534; CHECK-ZVE64X-NEXT:    vsetvli a0, zero, e32, m2, ta, ma
2535; CHECK-ZVE64X-NEXT:    vsrl.vi v10, v8, 1
2536; CHECK-ZVE64X-NEXT:    lui a0, 349525
2537; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v10
2538; CHECK-ZVE64X-NEXT:    addi a0, a0, 1365
2539; CHECK-ZVE64X-NEXT:    vsrl.vi v10, v8, 2
2540; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v10
2541; CHECK-ZVE64X-NEXT:    vsrl.vi v10, v8, 4
2542; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v10
2543; CHECK-ZVE64X-NEXT:    vsrl.vi v10, v8, 8
2544; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v10
2545; CHECK-ZVE64X-NEXT:    vsrl.vi v10, v8, 16
2546; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v10
2547; CHECK-ZVE64X-NEXT:    vnot.v v8, v8
2548; CHECK-ZVE64X-NEXT:    vsrl.vi v10, v8, 1
2549; CHECK-ZVE64X-NEXT:    vand.vx v10, v10, a0
2550; CHECK-ZVE64X-NEXT:    lui a0, 209715
2551; CHECK-ZVE64X-NEXT:    addi a0, a0, 819
2552; CHECK-ZVE64X-NEXT:    vsub.vv v8, v8, v10
2553; CHECK-ZVE64X-NEXT:    vand.vx v10, v8, a0
2554; CHECK-ZVE64X-NEXT:    vsrl.vi v8, v8, 2
2555; CHECK-ZVE64X-NEXT:    vand.vx v8, v8, a0
2556; CHECK-ZVE64X-NEXT:    lui a0, 61681
2557; CHECK-ZVE64X-NEXT:    addi a0, a0, -241
2558; CHECK-ZVE64X-NEXT:    vadd.vv v8, v10, v8
2559; CHECK-ZVE64X-NEXT:    vsrl.vi v10, v8, 4
2560; CHECK-ZVE64X-NEXT:    vadd.vv v8, v8, v10
2561; CHECK-ZVE64X-NEXT:    vand.vx v8, v8, a0
2562; CHECK-ZVE64X-NEXT:    lui a0, 4112
2563; CHECK-ZVE64X-NEXT:    addi a0, a0, 257
2564; CHECK-ZVE64X-NEXT:    vmul.vx v8, v8, a0
2565; CHECK-ZVE64X-NEXT:    vsrl.vi v8, v8, 24
2566; CHECK-ZVE64X-NEXT:    ret
2567;
2568; CHECK-F-LABEL: ctlz_zero_undef_nxv4i32:
2569; CHECK-F:       # %bb.0:
2570; CHECK-F-NEXT:    fsrmi a0, 1
2571; CHECK-F-NEXT:    vsetvli a1, zero, e32, m2, ta, ma
2572; CHECK-F-NEXT:    vfcvt.f.xu.v v8, v8
2573; CHECK-F-NEXT:    vsrl.vi v8, v8, 23
2574; CHECK-F-NEXT:    li a1, 158
2575; CHECK-F-NEXT:    vrsub.vx v8, v8, a1
2576; CHECK-F-NEXT:    fsrm a0
2577; CHECK-F-NEXT:    ret
2578;
2579; CHECK-D-LABEL: ctlz_zero_undef_nxv4i32:
2580; CHECK-D:       # %bb.0:
2581; CHECK-D-NEXT:    vsetvli a0, zero, e32, m2, ta, ma
2582; CHECK-D-NEXT:    vfwcvt.f.xu.v v12, v8
2583; CHECK-D-NEXT:    li a0, 52
2584; CHECK-D-NEXT:    vnsrl.wx v8, v12, a0
2585; CHECK-D-NEXT:    li a0, 1054
2586; CHECK-D-NEXT:    vrsub.vx v8, v8, a0
2587; CHECK-D-NEXT:    ret
2588;
2589; CHECK-ZVBB-LABEL: ctlz_zero_undef_nxv4i32:
2590; CHECK-ZVBB:       # %bb.0:
2591; CHECK-ZVBB-NEXT:    vsetvli a0, zero, e32, m2, ta, ma
2592; CHECK-ZVBB-NEXT:    vclz.v v8, v8
2593; CHECK-ZVBB-NEXT:    ret
2594  %a = call <vscale x 4 x i32> @llvm.ctlz.nxv4i32(<vscale x 4 x i32> %va, i1 true)
2595  ret <vscale x 4 x i32> %a
2596}
2597
2598define <vscale x 8 x i32> @ctlz_zero_undef_nxv8i32(<vscale x 8 x i32> %va) {
2599; CHECK-ZVE64X-LABEL: ctlz_zero_undef_nxv8i32:
2600; CHECK-ZVE64X:       # %bb.0:
2601; CHECK-ZVE64X-NEXT:    vsetvli a0, zero, e32, m4, ta, ma
2602; CHECK-ZVE64X-NEXT:    vsrl.vi v12, v8, 1
2603; CHECK-ZVE64X-NEXT:    lui a0, 349525
2604; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v12
2605; CHECK-ZVE64X-NEXT:    addi a0, a0, 1365
2606; CHECK-ZVE64X-NEXT:    vsrl.vi v12, v8, 2
2607; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v12
2608; CHECK-ZVE64X-NEXT:    vsrl.vi v12, v8, 4
2609; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v12
2610; CHECK-ZVE64X-NEXT:    vsrl.vi v12, v8, 8
2611; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v12
2612; CHECK-ZVE64X-NEXT:    vsrl.vi v12, v8, 16
2613; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v12
2614; CHECK-ZVE64X-NEXT:    vnot.v v8, v8
2615; CHECK-ZVE64X-NEXT:    vsrl.vi v12, v8, 1
2616; CHECK-ZVE64X-NEXT:    vand.vx v12, v12, a0
2617; CHECK-ZVE64X-NEXT:    lui a0, 209715
2618; CHECK-ZVE64X-NEXT:    addi a0, a0, 819
2619; CHECK-ZVE64X-NEXT:    vsub.vv v8, v8, v12
2620; CHECK-ZVE64X-NEXT:    vand.vx v12, v8, a0
2621; CHECK-ZVE64X-NEXT:    vsrl.vi v8, v8, 2
2622; CHECK-ZVE64X-NEXT:    vand.vx v8, v8, a0
2623; CHECK-ZVE64X-NEXT:    lui a0, 61681
2624; CHECK-ZVE64X-NEXT:    addi a0, a0, -241
2625; CHECK-ZVE64X-NEXT:    vadd.vv v8, v12, v8
2626; CHECK-ZVE64X-NEXT:    vsrl.vi v12, v8, 4
2627; CHECK-ZVE64X-NEXT:    vadd.vv v8, v8, v12
2628; CHECK-ZVE64X-NEXT:    vand.vx v8, v8, a0
2629; CHECK-ZVE64X-NEXT:    lui a0, 4112
2630; CHECK-ZVE64X-NEXT:    addi a0, a0, 257
2631; CHECK-ZVE64X-NEXT:    vmul.vx v8, v8, a0
2632; CHECK-ZVE64X-NEXT:    vsrl.vi v8, v8, 24
2633; CHECK-ZVE64X-NEXT:    ret
2634;
2635; CHECK-F-LABEL: ctlz_zero_undef_nxv8i32:
2636; CHECK-F:       # %bb.0:
2637; CHECK-F-NEXT:    fsrmi a0, 1
2638; CHECK-F-NEXT:    vsetvli a1, zero, e32, m4, ta, ma
2639; CHECK-F-NEXT:    vfcvt.f.xu.v v8, v8
2640; CHECK-F-NEXT:    vsrl.vi v8, v8, 23
2641; CHECK-F-NEXT:    li a1, 158
2642; CHECK-F-NEXT:    vrsub.vx v8, v8, a1
2643; CHECK-F-NEXT:    fsrm a0
2644; CHECK-F-NEXT:    ret
2645;
2646; CHECK-D-LABEL: ctlz_zero_undef_nxv8i32:
2647; CHECK-D:       # %bb.0:
2648; CHECK-D-NEXT:    vsetvli a0, zero, e32, m4, ta, ma
2649; CHECK-D-NEXT:    vfwcvt.f.xu.v v16, v8
2650; CHECK-D-NEXT:    li a0, 52
2651; CHECK-D-NEXT:    vnsrl.wx v8, v16, a0
2652; CHECK-D-NEXT:    li a0, 1054
2653; CHECK-D-NEXT:    vrsub.vx v8, v8, a0
2654; CHECK-D-NEXT:    ret
2655;
2656; CHECK-ZVBB-LABEL: ctlz_zero_undef_nxv8i32:
2657; CHECK-ZVBB:       # %bb.0:
2658; CHECK-ZVBB-NEXT:    vsetvli a0, zero, e32, m4, ta, ma
2659; CHECK-ZVBB-NEXT:    vclz.v v8, v8
2660; CHECK-ZVBB-NEXT:    ret
2661  %a = call <vscale x 8 x i32> @llvm.ctlz.nxv8i32(<vscale x 8 x i32> %va, i1 true)
2662  ret <vscale x 8 x i32> %a
2663}
2664
2665define <vscale x 16 x i32> @ctlz_zero_undef_nxv16i32(<vscale x 16 x i32> %va) {
2666; CHECK-ZVE64X-LABEL: ctlz_zero_undef_nxv16i32:
2667; CHECK-ZVE64X:       # %bb.0:
2668; CHECK-ZVE64X-NEXT:    vsetvli a0, zero, e32, m8, ta, ma
2669; CHECK-ZVE64X-NEXT:    vsrl.vi v16, v8, 1
2670; CHECK-ZVE64X-NEXT:    lui a0, 349525
2671; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v16
2672; CHECK-ZVE64X-NEXT:    addi a0, a0, 1365
2673; CHECK-ZVE64X-NEXT:    vsrl.vi v16, v8, 2
2674; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v16
2675; CHECK-ZVE64X-NEXT:    vsrl.vi v16, v8, 4
2676; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v16
2677; CHECK-ZVE64X-NEXT:    vsrl.vi v16, v8, 8
2678; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v16
2679; CHECK-ZVE64X-NEXT:    vsrl.vi v16, v8, 16
2680; CHECK-ZVE64X-NEXT:    vor.vv v8, v8, v16
2681; CHECK-ZVE64X-NEXT:    vnot.v v8, v8
2682; CHECK-ZVE64X-NEXT:    vsrl.vi v16, v8, 1
2683; CHECK-ZVE64X-NEXT:    vand.vx v16, v16, a0
2684; CHECK-ZVE64X-NEXT:    lui a0, 209715
2685; CHECK-ZVE64X-NEXT:    addi a0, a0, 819
2686; CHECK-ZVE64X-NEXT:    vsub.vv v8, v8, v16
2687; CHECK-ZVE64X-NEXT:    vand.vx v16, v8, a0
2688; CHECK-ZVE64X-NEXT:    vsrl.vi v8, v8, 2
2689; CHECK-ZVE64X-NEXT:    vand.vx v8, v8, a0
2690; CHECK-ZVE64X-NEXT:    lui a0, 61681
2691; CHECK-ZVE64X-NEXT:    addi a0, a0, -241
2692; CHECK-ZVE64X-NEXT:    vadd.vv v8, v16, v8
2693; CHECK-ZVE64X-NEXT:    vsrl.vi v16, v8, 4
2694; CHECK-ZVE64X-NEXT:    vadd.vv v8, v8, v16
2695; CHECK-ZVE64X-NEXT:    vand.vx v8, v8, a0
2696; CHECK-ZVE64X-NEXT:    lui a0, 4112
2697; CHECK-ZVE64X-NEXT:    addi a0, a0, 257
2698; CHECK-ZVE64X-NEXT:    vmul.vx v8, v8, a0
2699; CHECK-ZVE64X-NEXT:    vsrl.vi v8, v8, 24
2700; CHECK-ZVE64X-NEXT:    ret
2701;
2702; CHECK-F-LABEL: ctlz_zero_undef_nxv16i32:
2703; CHECK-F:       # %bb.0:
2704; CHECK-F-NEXT:    fsrmi a0, 1
2705; CHECK-F-NEXT:    vsetvli a1, zero, e32, m8, ta, ma
2706; CHECK-F-NEXT:    vfcvt.f.xu.v v8, v8
2707; CHECK-F-NEXT:    vsrl.vi v8, v8, 23
2708; CHECK-F-NEXT:    li a1, 158
2709; CHECK-F-NEXT:    vrsub.vx v8, v8, a1
2710; CHECK-F-NEXT:    fsrm a0
2711; CHECK-F-NEXT:    ret
2712;
2713; CHECK-D-LABEL: ctlz_zero_undef_nxv16i32:
2714; CHECK-D:       # %bb.0:
2715; CHECK-D-NEXT:    fsrmi a0, 1
2716; CHECK-D-NEXT:    vsetvli a1, zero, e32, m8, ta, ma
2717; CHECK-D-NEXT:    vfcvt.f.xu.v v8, v8
2718; CHECK-D-NEXT:    vsrl.vi v8, v8, 23
2719; CHECK-D-NEXT:    li a1, 158
2720; CHECK-D-NEXT:    vrsub.vx v8, v8, a1
2721; CHECK-D-NEXT:    fsrm a0
2722; CHECK-D-NEXT:    ret
2723;
2724; CHECK-ZVBB-LABEL: ctlz_zero_undef_nxv16i32:
2725; CHECK-ZVBB:       # %bb.0:
2726; CHECK-ZVBB-NEXT:    vsetvli a0, zero, e32, m8, ta, ma
2727; CHECK-ZVBB-NEXT:    vclz.v v8, v8
2728; CHECK-ZVBB-NEXT:    ret
2729  %a = call <vscale x 16 x i32> @llvm.ctlz.nxv16i32(<vscale x 16 x i32> %va, i1 true)
2730  ret <vscale x 16 x i32> %a
2731}
2732
2733define <vscale x 1 x i64> @ctlz_zero_undef_nxv1i64(<vscale x 1 x i64> %va) {
2734; RV32I-LABEL: ctlz_zero_undef_nxv1i64:
2735; RV32I:       # %bb.0:
2736; RV32I-NEXT:    vsetvli a0, zero, e64, m1, ta, ma
2737; RV32I-NEXT:    vsrl.vi v9, v8, 1
2738; RV32I-NEXT:    lui a0, 349525
2739; RV32I-NEXT:    addi a0, a0, 1365
2740; RV32I-NEXT:    vsetvli a1, zero, e32, m1, ta, ma
2741; RV32I-NEXT:    vmv.v.x v10, a0
2742; RV32I-NEXT:    li a0, 32
2743; RV32I-NEXT:    vsetvli a1, zero, e64, m1, ta, ma
2744; RV32I-NEXT:    vor.vv v8, v8, v9
2745; RV32I-NEXT:    vsrl.vi v9, v8, 2
2746; RV32I-NEXT:    vor.vv v8, v8, v9
2747; RV32I-NEXT:    vsrl.vi v9, v8, 4
2748; RV32I-NEXT:    vor.vv v8, v8, v9
2749; RV32I-NEXT:    vsrl.vi v9, v8, 8
2750; RV32I-NEXT:    vor.vv v8, v8, v9
2751; RV32I-NEXT:    vsrl.vi v9, v8, 16
2752; RV32I-NEXT:    vor.vv v8, v8, v9
2753; RV32I-NEXT:    vsrl.vx v9, v8, a0
2754; RV32I-NEXT:    lui a0, 209715
2755; RV32I-NEXT:    addi a0, a0, 819
2756; RV32I-NEXT:    vor.vv v8, v8, v9
2757; RV32I-NEXT:    vnot.v v8, v8
2758; RV32I-NEXT:    vsrl.vi v9, v8, 1
2759; RV32I-NEXT:    vand.vv v9, v9, v10
2760; RV32I-NEXT:    vsetvli a1, zero, e32, m1, ta, ma
2761; RV32I-NEXT:    vmv.v.x v10, a0
2762; RV32I-NEXT:    lui a0, 61681
2763; RV32I-NEXT:    addi a0, a0, -241
2764; RV32I-NEXT:    vsetvli a1, zero, e64, m1, ta, ma
2765; RV32I-NEXT:    vsub.vv v8, v8, v9
2766; RV32I-NEXT:    vand.vv v9, v8, v10
2767; RV32I-NEXT:    vsrl.vi v8, v8, 2
2768; RV32I-NEXT:    vand.vv v8, v8, v10
2769; RV32I-NEXT:    vsetvli a1, zero, e32, m1, ta, ma
2770; RV32I-NEXT:    vmv.v.x v10, a0
2771; RV32I-NEXT:    lui a0, 4112
2772; RV32I-NEXT:    addi a0, a0, 257
2773; RV32I-NEXT:    vsetvli a1, zero, e64, m1, ta, ma
2774; RV32I-NEXT:    vadd.vv v8, v9, v8
2775; RV32I-NEXT:    vsrl.vi v9, v8, 4
2776; RV32I-NEXT:    vadd.vv v8, v8, v9
2777; RV32I-NEXT:    vsetvli a1, zero, e32, m1, ta, ma
2778; RV32I-NEXT:    vmv.v.x v9, a0
2779; RV32I-NEXT:    vsetvli a0, zero, e64, m1, ta, ma
2780; RV32I-NEXT:    vand.vv v8, v8, v10
2781; RV32I-NEXT:    vmul.vv v8, v8, v9
2782; RV32I-NEXT:    li a0, 56
2783; RV32I-NEXT:    vsrl.vx v8, v8, a0
2784; RV32I-NEXT:    ret
2785;
2786; RV64I-LABEL: ctlz_zero_undef_nxv1i64:
2787; RV64I:       # %bb.0:
2788; RV64I-NEXT:    vsetvli a0, zero, e64, m1, ta, ma
2789; RV64I-NEXT:    vsrl.vi v9, v8, 1
2790; RV64I-NEXT:    lui a0, 349525
2791; RV64I-NEXT:    lui a1, 209715
2792; RV64I-NEXT:    lui a2, 61681
2793; RV64I-NEXT:    lui a3, 4112
2794; RV64I-NEXT:    addiw a0, a0, 1365
2795; RV64I-NEXT:    addiw a1, a1, 819
2796; RV64I-NEXT:    addiw a2, a2, -241
2797; RV64I-NEXT:    addiw a3, a3, 257
2798; RV64I-NEXT:    slli a4, a0, 32
2799; RV64I-NEXT:    add a0, a0, a4
2800; RV64I-NEXT:    slli a4, a1, 32
2801; RV64I-NEXT:    add a1, a1, a4
2802; RV64I-NEXT:    slli a4, a2, 32
2803; RV64I-NEXT:    add a2, a2, a4
2804; RV64I-NEXT:    slli a4, a3, 32
2805; RV64I-NEXT:    add a3, a3, a4
2806; RV64I-NEXT:    li a4, 32
2807; RV64I-NEXT:    vor.vv v8, v8, v9
2808; RV64I-NEXT:    vsrl.vi v9, v8, 2
2809; RV64I-NEXT:    vor.vv v8, v8, v9
2810; RV64I-NEXT:    vsrl.vi v9, v8, 4
2811; RV64I-NEXT:    vor.vv v8, v8, v9
2812; RV64I-NEXT:    vsrl.vi v9, v8, 8
2813; RV64I-NEXT:    vor.vv v8, v8, v9
2814; RV64I-NEXT:    vsrl.vi v9, v8, 16
2815; RV64I-NEXT:    vor.vv v8, v8, v9
2816; RV64I-NEXT:    vsrl.vx v9, v8, a4
2817; RV64I-NEXT:    vor.vv v8, v8, v9
2818; RV64I-NEXT:    vnot.v v8, v8
2819; RV64I-NEXT:    vsrl.vi v9, v8, 1
2820; RV64I-NEXT:    vand.vx v9, v9, a0
2821; RV64I-NEXT:    vsub.vv v8, v8, v9
2822; RV64I-NEXT:    vand.vx v9, v8, a1
2823; RV64I-NEXT:    vsrl.vi v8, v8, 2
2824; RV64I-NEXT:    vand.vx v8, v8, a1
2825; RV64I-NEXT:    vadd.vv v8, v9, v8
2826; RV64I-NEXT:    vsrl.vi v9, v8, 4
2827; RV64I-NEXT:    vadd.vv v8, v8, v9
2828; RV64I-NEXT:    vand.vx v8, v8, a2
2829; RV64I-NEXT:    vmul.vx v8, v8, a3
2830; RV64I-NEXT:    li a0, 56
2831; RV64I-NEXT:    vsrl.vx v8, v8, a0
2832; RV64I-NEXT:    ret
2833;
2834; CHECK-F-LABEL: ctlz_zero_undef_nxv1i64:
2835; CHECK-F:       # %bb.0:
2836; CHECK-F-NEXT:    li a0, 190
2837; CHECK-F-NEXT:    vsetvli a1, zero, e32, mf2, ta, ma
2838; CHECK-F-NEXT:    vmv.v.x v9, a0
2839; CHECK-F-NEXT:    fsrmi a0, 1
2840; CHECK-F-NEXT:    vfncvt.f.xu.w v10, v8
2841; CHECK-F-NEXT:    vsrl.vi v10, v10, 23
2842; CHECK-F-NEXT:    vwsubu.vv v8, v9, v10
2843; CHECK-F-NEXT:    fsrm a0
2844; CHECK-F-NEXT:    ret
2845;
2846; CHECK-D-LABEL: ctlz_zero_undef_nxv1i64:
2847; CHECK-D:       # %bb.0:
2848; CHECK-D-NEXT:    fsrmi a0, 1
2849; CHECK-D-NEXT:    vsetvli a1, zero, e64, m1, ta, ma
2850; CHECK-D-NEXT:    vfcvt.f.xu.v v8, v8
2851; CHECK-D-NEXT:    li a1, 52
2852; CHECK-D-NEXT:    vsrl.vx v8, v8, a1
2853; CHECK-D-NEXT:    li a1, 1086
2854; CHECK-D-NEXT:    vrsub.vx v8, v8, a1
2855; CHECK-D-NEXT:    fsrm a0
2856; CHECK-D-NEXT:    ret
2857;
2858; CHECK-ZVBB-LABEL: ctlz_zero_undef_nxv1i64:
2859; CHECK-ZVBB:       # %bb.0:
2860; CHECK-ZVBB-NEXT:    vsetvli a0, zero, e64, m1, ta, ma
2861; CHECK-ZVBB-NEXT:    vclz.v v8, v8
2862; CHECK-ZVBB-NEXT:    ret
2863  %a = call <vscale x 1 x i64> @llvm.ctlz.nxv1i64(<vscale x 1 x i64> %va, i1 true)
2864  ret <vscale x 1 x i64> %a
2865}
2866
2867define <vscale x 2 x i64> @ctlz_zero_undef_nxv2i64(<vscale x 2 x i64> %va) {
2868; RV32I-LABEL: ctlz_zero_undef_nxv2i64:
2869; RV32I:       # %bb.0:
2870; RV32I-NEXT:    vsetvli a0, zero, e64, m2, ta, ma
2871; RV32I-NEXT:    vsrl.vi v10, v8, 1
2872; RV32I-NEXT:    lui a0, 349525
2873; RV32I-NEXT:    addi a0, a0, 1365
2874; RV32I-NEXT:    vsetvli a1, zero, e32, m2, ta, ma
2875; RV32I-NEXT:    vmv.v.x v12, a0
2876; RV32I-NEXT:    li a0, 32
2877; RV32I-NEXT:    vsetvli a1, zero, e64, m2, ta, ma
2878; RV32I-NEXT:    vor.vv v8, v8, v10
2879; RV32I-NEXT:    vsrl.vi v10, v8, 2
2880; RV32I-NEXT:    vor.vv v8, v8, v10
2881; RV32I-NEXT:    vsrl.vi v10, v8, 4
2882; RV32I-NEXT:    vor.vv v8, v8, v10
2883; RV32I-NEXT:    vsrl.vi v10, v8, 8
2884; RV32I-NEXT:    vor.vv v8, v8, v10
2885; RV32I-NEXT:    vsrl.vi v10, v8, 16
2886; RV32I-NEXT:    vor.vv v8, v8, v10
2887; RV32I-NEXT:    vsrl.vx v10, v8, a0
2888; RV32I-NEXT:    lui a0, 209715
2889; RV32I-NEXT:    addi a0, a0, 819
2890; RV32I-NEXT:    vor.vv v8, v8, v10
2891; RV32I-NEXT:    vnot.v v8, v8
2892; RV32I-NEXT:    vsrl.vi v10, v8, 1
2893; RV32I-NEXT:    vand.vv v10, v10, v12
2894; RV32I-NEXT:    vsetvli a1, zero, e32, m2, ta, ma
2895; RV32I-NEXT:    vmv.v.x v12, a0
2896; RV32I-NEXT:    lui a0, 61681
2897; RV32I-NEXT:    addi a0, a0, -241
2898; RV32I-NEXT:    vsetvli a1, zero, e64, m2, ta, ma
2899; RV32I-NEXT:    vsub.vv v8, v8, v10
2900; RV32I-NEXT:    vand.vv v10, v8, v12
2901; RV32I-NEXT:    vsrl.vi v8, v8, 2
2902; RV32I-NEXT:    vand.vv v8, v8, v12
2903; RV32I-NEXT:    vsetvli a1, zero, e32, m2, ta, ma
2904; RV32I-NEXT:    vmv.v.x v12, a0
2905; RV32I-NEXT:    lui a0, 4112
2906; RV32I-NEXT:    addi a0, a0, 257
2907; RV32I-NEXT:    vsetvli a1, zero, e64, m2, ta, ma
2908; RV32I-NEXT:    vadd.vv v8, v10, v8
2909; RV32I-NEXT:    vsrl.vi v10, v8, 4
2910; RV32I-NEXT:    vadd.vv v8, v8, v10
2911; RV32I-NEXT:    vsetvli a1, zero, e32, m2, ta, ma
2912; RV32I-NEXT:    vmv.v.x v10, a0
2913; RV32I-NEXT:    vsetvli a0, zero, e64, m2, ta, ma
2914; RV32I-NEXT:    vand.vv v8, v8, v12
2915; RV32I-NEXT:    vmul.vv v8, v8, v10
2916; RV32I-NEXT:    li a0, 56
2917; RV32I-NEXT:    vsrl.vx v8, v8, a0
2918; RV32I-NEXT:    ret
2919;
2920; RV64I-LABEL: ctlz_zero_undef_nxv2i64:
2921; RV64I:       # %bb.0:
2922; RV64I-NEXT:    vsetvli a0, zero, e64, m2, ta, ma
2923; RV64I-NEXT:    vsrl.vi v10, v8, 1
2924; RV64I-NEXT:    lui a0, 349525
2925; RV64I-NEXT:    lui a1, 209715
2926; RV64I-NEXT:    lui a2, 61681
2927; RV64I-NEXT:    lui a3, 4112
2928; RV64I-NEXT:    addiw a0, a0, 1365
2929; RV64I-NEXT:    addiw a1, a1, 819
2930; RV64I-NEXT:    addiw a2, a2, -241
2931; RV64I-NEXT:    addiw a3, a3, 257
2932; RV64I-NEXT:    slli a4, a0, 32
2933; RV64I-NEXT:    add a0, a0, a4
2934; RV64I-NEXT:    slli a4, a1, 32
2935; RV64I-NEXT:    add a1, a1, a4
2936; RV64I-NEXT:    slli a4, a2, 32
2937; RV64I-NEXT:    add a2, a2, a4
2938; RV64I-NEXT:    slli a4, a3, 32
2939; RV64I-NEXT:    add a3, a3, a4
2940; RV64I-NEXT:    li a4, 32
2941; RV64I-NEXT:    vor.vv v8, v8, v10
2942; RV64I-NEXT:    vsrl.vi v10, v8, 2
2943; RV64I-NEXT:    vor.vv v8, v8, v10
2944; RV64I-NEXT:    vsrl.vi v10, v8, 4
2945; RV64I-NEXT:    vor.vv v8, v8, v10
2946; RV64I-NEXT:    vsrl.vi v10, v8, 8
2947; RV64I-NEXT:    vor.vv v8, v8, v10
2948; RV64I-NEXT:    vsrl.vi v10, v8, 16
2949; RV64I-NEXT:    vor.vv v8, v8, v10
2950; RV64I-NEXT:    vsrl.vx v10, v8, a4
2951; RV64I-NEXT:    vor.vv v8, v8, v10
2952; RV64I-NEXT:    vnot.v v8, v8
2953; RV64I-NEXT:    vsrl.vi v10, v8, 1
2954; RV64I-NEXT:    vand.vx v10, v10, a0
2955; RV64I-NEXT:    vsub.vv v8, v8, v10
2956; RV64I-NEXT:    vand.vx v10, v8, a1
2957; RV64I-NEXT:    vsrl.vi v8, v8, 2
2958; RV64I-NEXT:    vand.vx v8, v8, a1
2959; RV64I-NEXT:    vadd.vv v8, v10, v8
2960; RV64I-NEXT:    vsrl.vi v10, v8, 4
2961; RV64I-NEXT:    vadd.vv v8, v8, v10
2962; RV64I-NEXT:    vand.vx v8, v8, a2
2963; RV64I-NEXT:    vmul.vx v8, v8, a3
2964; RV64I-NEXT:    li a0, 56
2965; RV64I-NEXT:    vsrl.vx v8, v8, a0
2966; RV64I-NEXT:    ret
2967;
2968; CHECK-F-LABEL: ctlz_zero_undef_nxv2i64:
2969; CHECK-F:       # %bb.0:
2970; CHECK-F-NEXT:    li a0, 190
2971; CHECK-F-NEXT:    vsetvli a1, zero, e32, m1, ta, ma
2972; CHECK-F-NEXT:    vmv.v.x v10, a0
2973; CHECK-F-NEXT:    fsrmi a0, 1
2974; CHECK-F-NEXT:    vfncvt.f.xu.w v11, v8
2975; CHECK-F-NEXT:    vsrl.vi v11, v11, 23
2976; CHECK-F-NEXT:    vwsubu.vv v8, v10, v11
2977; CHECK-F-NEXT:    fsrm a0
2978; CHECK-F-NEXT:    ret
2979;
2980; CHECK-D-LABEL: ctlz_zero_undef_nxv2i64:
2981; CHECK-D:       # %bb.0:
2982; CHECK-D-NEXT:    fsrmi a0, 1
2983; CHECK-D-NEXT:    vsetvli a1, zero, e64, m2, ta, ma
2984; CHECK-D-NEXT:    vfcvt.f.xu.v v8, v8
2985; CHECK-D-NEXT:    li a1, 52
2986; CHECK-D-NEXT:    vsrl.vx v8, v8, a1
2987; CHECK-D-NEXT:    li a1, 1086
2988; CHECK-D-NEXT:    vrsub.vx v8, v8, a1
2989; CHECK-D-NEXT:    fsrm a0
2990; CHECK-D-NEXT:    ret
2991;
2992; CHECK-ZVBB-LABEL: ctlz_zero_undef_nxv2i64:
2993; CHECK-ZVBB:       # %bb.0:
2994; CHECK-ZVBB-NEXT:    vsetvli a0, zero, e64, m2, ta, ma
2995; CHECK-ZVBB-NEXT:    vclz.v v8, v8
2996; CHECK-ZVBB-NEXT:    ret
2997  %a = call <vscale x 2 x i64> @llvm.ctlz.nxv2i64(<vscale x 2 x i64> %va, i1 true)
2998  ret <vscale x 2 x i64> %a
2999}
3000
3001define <vscale x 4 x i64> @ctlz_zero_undef_nxv4i64(<vscale x 4 x i64> %va) {
3002; RV32I-LABEL: ctlz_zero_undef_nxv4i64:
3003; RV32I:       # %bb.0:
3004; RV32I-NEXT:    vsetvli a0, zero, e64, m4, ta, ma
3005; RV32I-NEXT:    vsrl.vi v12, v8, 1
3006; RV32I-NEXT:    lui a0, 349525
3007; RV32I-NEXT:    addi a0, a0, 1365
3008; RV32I-NEXT:    vsetvli a1, zero, e32, m4, ta, ma
3009; RV32I-NEXT:    vmv.v.x v16, a0
3010; RV32I-NEXT:    li a0, 32
3011; RV32I-NEXT:    vsetvli a1, zero, e64, m4, ta, ma
3012; RV32I-NEXT:    vor.vv v8, v8, v12
3013; RV32I-NEXT:    vsrl.vi v12, v8, 2
3014; RV32I-NEXT:    vor.vv v8, v8, v12
3015; RV32I-NEXT:    vsrl.vi v12, v8, 4
3016; RV32I-NEXT:    vor.vv v8, v8, v12
3017; RV32I-NEXT:    vsrl.vi v12, v8, 8
3018; RV32I-NEXT:    vor.vv v8, v8, v12
3019; RV32I-NEXT:    vsrl.vi v12, v8, 16
3020; RV32I-NEXT:    vor.vv v8, v8, v12
3021; RV32I-NEXT:    vsrl.vx v12, v8, a0
3022; RV32I-NEXT:    lui a0, 209715
3023; RV32I-NEXT:    addi a0, a0, 819
3024; RV32I-NEXT:    vor.vv v8, v8, v12
3025; RV32I-NEXT:    vnot.v v8, v8
3026; RV32I-NEXT:    vsrl.vi v12, v8, 1
3027; RV32I-NEXT:    vand.vv v12, v12, v16
3028; RV32I-NEXT:    vsetvli a1, zero, e32, m4, ta, ma
3029; RV32I-NEXT:    vmv.v.x v16, a0
3030; RV32I-NEXT:    lui a0, 61681
3031; RV32I-NEXT:    addi a0, a0, -241
3032; RV32I-NEXT:    vsetvli a1, zero, e64, m4, ta, ma
3033; RV32I-NEXT:    vsub.vv v8, v8, v12
3034; RV32I-NEXT:    vand.vv v12, v8, v16
3035; RV32I-NEXT:    vsrl.vi v8, v8, 2
3036; RV32I-NEXT:    vand.vv v8, v8, v16
3037; RV32I-NEXT:    vsetvli a1, zero, e32, m4, ta, ma
3038; RV32I-NEXT:    vmv.v.x v16, a0
3039; RV32I-NEXT:    lui a0, 4112
3040; RV32I-NEXT:    addi a0, a0, 257
3041; RV32I-NEXT:    vsetvli a1, zero, e64, m4, ta, ma
3042; RV32I-NEXT:    vadd.vv v8, v12, v8
3043; RV32I-NEXT:    vsrl.vi v12, v8, 4
3044; RV32I-NEXT:    vadd.vv v8, v8, v12
3045; RV32I-NEXT:    vsetvli a1, zero, e32, m4, ta, ma
3046; RV32I-NEXT:    vmv.v.x v12, a0
3047; RV32I-NEXT:    vsetvli a0, zero, e64, m4, ta, ma
3048; RV32I-NEXT:    vand.vv v8, v8, v16
3049; RV32I-NEXT:    vmul.vv v8, v8, v12
3050; RV32I-NEXT:    li a0, 56
3051; RV32I-NEXT:    vsrl.vx v8, v8, a0
3052; RV32I-NEXT:    ret
3053;
3054; RV64I-LABEL: ctlz_zero_undef_nxv4i64:
3055; RV64I:       # %bb.0:
3056; RV64I-NEXT:    vsetvli a0, zero, e64, m4, ta, ma
3057; RV64I-NEXT:    vsrl.vi v12, v8, 1
3058; RV64I-NEXT:    lui a0, 349525
3059; RV64I-NEXT:    lui a1, 209715
3060; RV64I-NEXT:    lui a2, 61681
3061; RV64I-NEXT:    lui a3, 4112
3062; RV64I-NEXT:    addiw a0, a0, 1365
3063; RV64I-NEXT:    addiw a1, a1, 819
3064; RV64I-NEXT:    addiw a2, a2, -241
3065; RV64I-NEXT:    addiw a3, a3, 257
3066; RV64I-NEXT:    slli a4, a0, 32
3067; RV64I-NEXT:    add a0, a0, a4
3068; RV64I-NEXT:    slli a4, a1, 32
3069; RV64I-NEXT:    add a1, a1, a4
3070; RV64I-NEXT:    slli a4, a2, 32
3071; RV64I-NEXT:    add a2, a2, a4
3072; RV64I-NEXT:    slli a4, a3, 32
3073; RV64I-NEXT:    add a3, a3, a4
3074; RV64I-NEXT:    li a4, 32
3075; RV64I-NEXT:    vor.vv v8, v8, v12
3076; RV64I-NEXT:    vsrl.vi v12, v8, 2
3077; RV64I-NEXT:    vor.vv v8, v8, v12
3078; RV64I-NEXT:    vsrl.vi v12, v8, 4
3079; RV64I-NEXT:    vor.vv v8, v8, v12
3080; RV64I-NEXT:    vsrl.vi v12, v8, 8
3081; RV64I-NEXT:    vor.vv v8, v8, v12
3082; RV64I-NEXT:    vsrl.vi v12, v8, 16
3083; RV64I-NEXT:    vor.vv v8, v8, v12
3084; RV64I-NEXT:    vsrl.vx v12, v8, a4
3085; RV64I-NEXT:    vor.vv v8, v8, v12
3086; RV64I-NEXT:    vnot.v v8, v8
3087; RV64I-NEXT:    vsrl.vi v12, v8, 1
3088; RV64I-NEXT:    vand.vx v12, v12, a0
3089; RV64I-NEXT:    vsub.vv v8, v8, v12
3090; RV64I-NEXT:    vand.vx v12, v8, a1
3091; RV64I-NEXT:    vsrl.vi v8, v8, 2
3092; RV64I-NEXT:    vand.vx v8, v8, a1
3093; RV64I-NEXT:    vadd.vv v8, v12, v8
3094; RV64I-NEXT:    vsrl.vi v12, v8, 4
3095; RV64I-NEXT:    vadd.vv v8, v8, v12
3096; RV64I-NEXT:    vand.vx v8, v8, a2
3097; RV64I-NEXT:    vmul.vx v8, v8, a3
3098; RV64I-NEXT:    li a0, 56
3099; RV64I-NEXT:    vsrl.vx v8, v8, a0
3100; RV64I-NEXT:    ret
3101;
3102; CHECK-F-LABEL: ctlz_zero_undef_nxv4i64:
3103; CHECK-F:       # %bb.0:
3104; CHECK-F-NEXT:    li a0, 190
3105; CHECK-F-NEXT:    vsetvli a1, zero, e32, m2, ta, ma
3106; CHECK-F-NEXT:    vmv.v.x v12, a0
3107; CHECK-F-NEXT:    fsrmi a0, 1
3108; CHECK-F-NEXT:    vfncvt.f.xu.w v14, v8
3109; CHECK-F-NEXT:    vsrl.vi v14, v14, 23
3110; CHECK-F-NEXT:    vwsubu.vv v8, v12, v14
3111; CHECK-F-NEXT:    fsrm a0
3112; CHECK-F-NEXT:    ret
3113;
3114; CHECK-D-LABEL: ctlz_zero_undef_nxv4i64:
3115; CHECK-D:       # %bb.0:
3116; CHECK-D-NEXT:    fsrmi a0, 1
3117; CHECK-D-NEXT:    vsetvli a1, zero, e64, m4, ta, ma
3118; CHECK-D-NEXT:    vfcvt.f.xu.v v8, v8
3119; CHECK-D-NEXT:    li a1, 52
3120; CHECK-D-NEXT:    vsrl.vx v8, v8, a1
3121; CHECK-D-NEXT:    li a1, 1086
3122; CHECK-D-NEXT:    vrsub.vx v8, v8, a1
3123; CHECK-D-NEXT:    fsrm a0
3124; CHECK-D-NEXT:    ret
3125;
3126; CHECK-ZVBB-LABEL: ctlz_zero_undef_nxv4i64:
3127; CHECK-ZVBB:       # %bb.0:
3128; CHECK-ZVBB-NEXT:    vsetvli a0, zero, e64, m4, ta, ma
3129; CHECK-ZVBB-NEXT:    vclz.v v8, v8
3130; CHECK-ZVBB-NEXT:    ret
3131  %a = call <vscale x 4 x i64> @llvm.ctlz.nxv4i64(<vscale x 4 x i64> %va, i1 true)
3132  ret <vscale x 4 x i64> %a
3133}
3134
3135define <vscale x 8 x i64> @ctlz_zero_undef_nxv8i64(<vscale x 8 x i64> %va) {
3136; RV32I-LABEL: ctlz_zero_undef_nxv8i64:
3137; RV32I:       # %bb.0:
3138; RV32I-NEXT:    vsetvli a0, zero, e64, m8, ta, ma
3139; RV32I-NEXT:    vsrl.vi v16, v8, 1
3140; RV32I-NEXT:    lui a0, 349525
3141; RV32I-NEXT:    addi a0, a0, 1365
3142; RV32I-NEXT:    vsetvli a1, zero, e32, m8, ta, ma
3143; RV32I-NEXT:    vmv.v.x v24, a0
3144; RV32I-NEXT:    li a0, 32
3145; RV32I-NEXT:    vsetvli a1, zero, e64, m8, ta, ma
3146; RV32I-NEXT:    vor.vv v8, v8, v16
3147; RV32I-NEXT:    vsrl.vi v16, v8, 2
3148; RV32I-NEXT:    vor.vv v8, v8, v16
3149; RV32I-NEXT:    vsrl.vi v16, v8, 4
3150; RV32I-NEXT:    vor.vv v8, v8, v16
3151; RV32I-NEXT:    vsrl.vi v16, v8, 8
3152; RV32I-NEXT:    vor.vv v8, v8, v16
3153; RV32I-NEXT:    vsrl.vi v16, v8, 16
3154; RV32I-NEXT:    vor.vv v8, v8, v16
3155; RV32I-NEXT:    vsrl.vx v16, v8, a0
3156; RV32I-NEXT:    lui a0, 209715
3157; RV32I-NEXT:    addi a0, a0, 819
3158; RV32I-NEXT:    vor.vv v8, v8, v16
3159; RV32I-NEXT:    vnot.v v8, v8
3160; RV32I-NEXT:    vsrl.vi v16, v8, 1
3161; RV32I-NEXT:    vand.vv v24, v16, v24
3162; RV32I-NEXT:    vsetvli a1, zero, e32, m8, ta, ma
3163; RV32I-NEXT:    vmv.v.x v16, a0
3164; RV32I-NEXT:    lui a0, 61681
3165; RV32I-NEXT:    addi a0, a0, -241
3166; RV32I-NEXT:    vsetvli a1, zero, e64, m8, ta, ma
3167; RV32I-NEXT:    vsub.vv v8, v8, v24
3168; RV32I-NEXT:    vand.vv v24, v8, v16
3169; RV32I-NEXT:    vsrl.vi v8, v8, 2
3170; RV32I-NEXT:    vand.vv v8, v8, v16
3171; RV32I-NEXT:    vsetvli a1, zero, e32, m8, ta, ma
3172; RV32I-NEXT:    vmv.v.x v16, a0
3173; RV32I-NEXT:    lui a0, 4112
3174; RV32I-NEXT:    addi a0, a0, 257
3175; RV32I-NEXT:    vsetvli a1, zero, e64, m8, ta, ma
3176; RV32I-NEXT:    vadd.vv v8, v24, v8
3177; RV32I-NEXT:    vsrl.vi v24, v8, 4
3178; RV32I-NEXT:    vadd.vv v8, v8, v24
3179; RV32I-NEXT:    vsetvli a1, zero, e32, m8, ta, ma
3180; RV32I-NEXT:    vmv.v.x v24, a0
3181; RV32I-NEXT:    vsetvli a0, zero, e64, m8, ta, ma
3182; RV32I-NEXT:    vand.vv v8, v8, v16
3183; RV32I-NEXT:    vmul.vv v8, v8, v24
3184; RV32I-NEXT:    li a0, 56
3185; RV32I-NEXT:    vsrl.vx v8, v8, a0
3186; RV32I-NEXT:    ret
3187;
3188; RV64I-LABEL: ctlz_zero_undef_nxv8i64:
3189; RV64I:       # %bb.0:
3190; RV64I-NEXT:    vsetvli a0, zero, e64, m8, ta, ma
3191; RV64I-NEXT:    vsrl.vi v16, v8, 1
3192; RV64I-NEXT:    lui a0, 349525
3193; RV64I-NEXT:    lui a1, 209715
3194; RV64I-NEXT:    lui a2, 61681
3195; RV64I-NEXT:    lui a3, 4112
3196; RV64I-NEXT:    addiw a0, a0, 1365
3197; RV64I-NEXT:    addiw a1, a1, 819
3198; RV64I-NEXT:    addiw a2, a2, -241
3199; RV64I-NEXT:    addiw a3, a3, 257
3200; RV64I-NEXT:    slli a4, a0, 32
3201; RV64I-NEXT:    add a0, a0, a4
3202; RV64I-NEXT:    slli a4, a1, 32
3203; RV64I-NEXT:    add a1, a1, a4
3204; RV64I-NEXT:    slli a4, a2, 32
3205; RV64I-NEXT:    add a2, a2, a4
3206; RV64I-NEXT:    slli a4, a3, 32
3207; RV64I-NEXT:    add a3, a3, a4
3208; RV64I-NEXT:    li a4, 32
3209; RV64I-NEXT:    vor.vv v8, v8, v16
3210; RV64I-NEXT:    vsrl.vi v16, v8, 2
3211; RV64I-NEXT:    vor.vv v8, v8, v16
3212; RV64I-NEXT:    vsrl.vi v16, v8, 4
3213; RV64I-NEXT:    vor.vv v8, v8, v16
3214; RV64I-NEXT:    vsrl.vi v16, v8, 8
3215; RV64I-NEXT:    vor.vv v8, v8, v16
3216; RV64I-NEXT:    vsrl.vi v16, v8, 16
3217; RV64I-NEXT:    vor.vv v8, v8, v16
3218; RV64I-NEXT:    vsrl.vx v16, v8, a4
3219; RV64I-NEXT:    vor.vv v8, v8, v16
3220; RV64I-NEXT:    vnot.v v8, v8
3221; RV64I-NEXT:    vsrl.vi v16, v8, 1
3222; RV64I-NEXT:    vand.vx v16, v16, a0
3223; RV64I-NEXT:    vsub.vv v8, v8, v16
3224; RV64I-NEXT:    vand.vx v16, v8, a1
3225; RV64I-NEXT:    vsrl.vi v8, v8, 2
3226; RV64I-NEXT:    vand.vx v8, v8, a1
3227; RV64I-NEXT:    vadd.vv v8, v16, v8
3228; RV64I-NEXT:    vsrl.vi v16, v8, 4
3229; RV64I-NEXT:    vadd.vv v8, v8, v16
3230; RV64I-NEXT:    vand.vx v8, v8, a2
3231; RV64I-NEXT:    vmul.vx v8, v8, a3
3232; RV64I-NEXT:    li a0, 56
3233; RV64I-NEXT:    vsrl.vx v8, v8, a0
3234; RV64I-NEXT:    ret
3235;
3236; CHECK-F-LABEL: ctlz_zero_undef_nxv8i64:
3237; CHECK-F:       # %bb.0:
3238; CHECK-F-NEXT:    li a0, 190
3239; CHECK-F-NEXT:    vsetvli a1, zero, e32, m4, ta, ma
3240; CHECK-F-NEXT:    vmv.v.x v16, a0
3241; CHECK-F-NEXT:    fsrmi a0, 1
3242; CHECK-F-NEXT:    vfncvt.f.xu.w v20, v8
3243; CHECK-F-NEXT:    vsrl.vi v20, v20, 23
3244; CHECK-F-NEXT:    vwsubu.vv v8, v16, v20
3245; CHECK-F-NEXT:    fsrm a0
3246; CHECK-F-NEXT:    ret
3247;
3248; CHECK-D-LABEL: ctlz_zero_undef_nxv8i64:
3249; CHECK-D:       # %bb.0:
3250; CHECK-D-NEXT:    fsrmi a0, 1
3251; CHECK-D-NEXT:    vsetvli a1, zero, e64, m8, ta, ma
3252; CHECK-D-NEXT:    vfcvt.f.xu.v v8, v8
3253; CHECK-D-NEXT:    li a1, 52
3254; CHECK-D-NEXT:    vsrl.vx v8, v8, a1
3255; CHECK-D-NEXT:    li a1, 1086
3256; CHECK-D-NEXT:    vrsub.vx v8, v8, a1
3257; CHECK-D-NEXT:    fsrm a0
3258; CHECK-D-NEXT:    ret
3259;
3260; CHECK-ZVBB-LABEL: ctlz_zero_undef_nxv8i64:
3261; CHECK-ZVBB:       # %bb.0:
3262; CHECK-ZVBB-NEXT:    vsetvli a0, zero, e64, m8, ta, ma
3263; CHECK-ZVBB-NEXT:    vclz.v v8, v8
3264; CHECK-ZVBB-NEXT:    ret
3265  %a = call <vscale x 8 x i64> @llvm.ctlz.nxv8i64(<vscale x 8 x i64> %va, i1 true)
3266  ret <vscale x 8 x i64> %a
3267}
3268;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
3269; RV32: {{.*}}
3270; RV32F: {{.*}}
3271; RV64: {{.*}}
3272; RV64F: {{.*}}
3273