xref: /llvm-project/llvm/test/CodeGen/RISCV/rvv/compressstore.ll (revision b6c0f1bfa79a3a32d841ac5ab1f94c3aee3b5d90) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
2; RUN: llc -verify-machineinstrs -mtriple=riscv64 -mattr=+v,+d,+m,+zbb %s -o - | FileCheck %s --check-prefix=RV64
3; RUN: llc -verify-machineinstrs -mtriple=riscv32 -mattr=+v,+d,+m,+zbb %s -o - | FileCheck %s --check-prefix=RV32
4
5; Compress + store for i8 type
6
7define void @test_compresstore_v1i8(ptr %p, <1 x i1> %mask, <1 x i8> %data) {
8; RV64-LABEL: test_compresstore_v1i8:
9; RV64:       # %bb.0: # %entry
10; RV64-NEXT:    vsetivli zero, 1, e8, mf8, ta, ma
11; RV64-NEXT:    vcompress.vm v9, v8, v0
12; RV64-NEXT:    vcpop.m a1, v0
13; RV64-NEXT:    vsetvli zero, a1, e8, mf8, ta, ma
14; RV64-NEXT:    vse8.v v9, (a0)
15; RV64-NEXT:    ret
16;
17; RV32-LABEL: test_compresstore_v1i8:
18; RV32:       # %bb.0: # %entry
19; RV32-NEXT:    vsetivli zero, 1, e8, mf8, ta, ma
20; RV32-NEXT:    vcompress.vm v9, v8, v0
21; RV32-NEXT:    vcpop.m a1, v0
22; RV32-NEXT:    vsetvli zero, a1, e8, mf8, ta, ma
23; RV32-NEXT:    vse8.v v9, (a0)
24; RV32-NEXT:    ret
25entry:
26  tail call void @llvm.masked.compressstore.v1i8(<1 x i8> %data, ptr align 1 %p, <1 x i1> %mask)
27  ret void
28}
29
30define void @test_compresstore_v2i8(ptr %p, <2 x i1> %mask, <2 x i8> %data) {
31; RV64-LABEL: test_compresstore_v2i8:
32; RV64:       # %bb.0: # %entry
33; RV64-NEXT:    vsetivli zero, 2, e8, mf8, ta, ma
34; RV64-NEXT:    vcompress.vm v9, v8, v0
35; RV64-NEXT:    vcpop.m a1, v0
36; RV64-NEXT:    vsetvli zero, a1, e8, mf8, ta, ma
37; RV64-NEXT:    vse8.v v9, (a0)
38; RV64-NEXT:    ret
39;
40; RV32-LABEL: test_compresstore_v2i8:
41; RV32:       # %bb.0: # %entry
42; RV32-NEXT:    vsetivli zero, 2, e8, mf8, ta, ma
43; RV32-NEXT:    vcompress.vm v9, v8, v0
44; RV32-NEXT:    vcpop.m a1, v0
45; RV32-NEXT:    vsetvli zero, a1, e8, mf8, ta, ma
46; RV32-NEXT:    vse8.v v9, (a0)
47; RV32-NEXT:    ret
48entry:
49  tail call void @llvm.masked.compressstore.v2i8(<2 x i8> %data, ptr align 1 %p, <2 x i1> %mask)
50  ret void
51}
52
53define void @test_compresstore_v4i8(ptr %p, <4 x i1> %mask, <4 x i8> %data) {
54; RV64-LABEL: test_compresstore_v4i8:
55; RV64:       # %bb.0: # %entry
56; RV64-NEXT:    vsetivli zero, 4, e8, mf4, ta, ma
57; RV64-NEXT:    vcompress.vm v9, v8, v0
58; RV64-NEXT:    vcpop.m a1, v0
59; RV64-NEXT:    vsetvli zero, a1, e8, mf4, ta, ma
60; RV64-NEXT:    vse8.v v9, (a0)
61; RV64-NEXT:    ret
62;
63; RV32-LABEL: test_compresstore_v4i8:
64; RV32:       # %bb.0: # %entry
65; RV32-NEXT:    vsetivli zero, 4, e8, mf4, ta, ma
66; RV32-NEXT:    vcompress.vm v9, v8, v0
67; RV32-NEXT:    vcpop.m a1, v0
68; RV32-NEXT:    vsetvli zero, a1, e8, mf4, ta, ma
69; RV32-NEXT:    vse8.v v9, (a0)
70; RV32-NEXT:    ret
71entry:
72  tail call void @llvm.masked.compressstore.v4i8(<4 x i8> %data, ptr align 1 %p, <4 x i1> %mask)
73  ret void
74}
75
76define void @test_compresstore_v8i8(ptr %p, <8 x i1> %mask, <8 x i8> %data) {
77; RV64-LABEL: test_compresstore_v8i8:
78; RV64:       # %bb.0: # %entry
79; RV64-NEXT:    vsetivli zero, 8, e8, mf2, ta, ma
80; RV64-NEXT:    vcompress.vm v9, v8, v0
81; RV64-NEXT:    vcpop.m a1, v0
82; RV64-NEXT:    vsetvli zero, a1, e8, mf2, ta, ma
83; RV64-NEXT:    vse8.v v9, (a0)
84; RV64-NEXT:    ret
85;
86; RV32-LABEL: test_compresstore_v8i8:
87; RV32:       # %bb.0: # %entry
88; RV32-NEXT:    vsetivli zero, 8, e8, mf2, ta, ma
89; RV32-NEXT:    vcompress.vm v9, v8, v0
90; RV32-NEXT:    vcpop.m a1, v0
91; RV32-NEXT:    vsetvli zero, a1, e8, mf2, ta, ma
92; RV32-NEXT:    vse8.v v9, (a0)
93; RV32-NEXT:    ret
94entry:
95  tail call void @llvm.masked.compressstore.v8i8(<8 x i8> %data, ptr align 1 %p, <8 x i1> %mask)
96  ret void
97}
98
99define void @test_compresstore_v16i8(ptr %p, <16 x i1> %mask, <16 x i8> %data) {
100; RV64-LABEL: test_compresstore_v16i8:
101; RV64:       # %bb.0: # %entry
102; RV64-NEXT:    vsetivli zero, 16, e8, m1, ta, ma
103; RV64-NEXT:    vcompress.vm v9, v8, v0
104; RV64-NEXT:    vcpop.m a1, v0
105; RV64-NEXT:    vsetvli zero, a1, e8, m1, ta, ma
106; RV64-NEXT:    vse8.v v9, (a0)
107; RV64-NEXT:    ret
108;
109; RV32-LABEL: test_compresstore_v16i8:
110; RV32:       # %bb.0: # %entry
111; RV32-NEXT:    vsetivli zero, 16, e8, m1, ta, ma
112; RV32-NEXT:    vcompress.vm v9, v8, v0
113; RV32-NEXT:    vcpop.m a1, v0
114; RV32-NEXT:    vsetvli zero, a1, e8, m1, ta, ma
115; RV32-NEXT:    vse8.v v9, (a0)
116; RV32-NEXT:    ret
117entry:
118  tail call void @llvm.masked.compressstore.v16i8(<16 x i8> %data, ptr align 1 %p, <16 x i1> %mask)
119  ret void
120}
121
122define void @test_compresstore_v32i8(ptr %p, <32 x i1> %mask, <32 x i8> %data) {
123; RV64-LABEL: test_compresstore_v32i8:
124; RV64:       # %bb.0: # %entry
125; RV64-NEXT:    li a1, 32
126; RV64-NEXT:    vsetvli zero, a1, e8, m2, ta, ma
127; RV64-NEXT:    vcompress.vm v10, v8, v0
128; RV64-NEXT:    vcpop.m a1, v0
129; RV64-NEXT:    vsetvli zero, a1, e8, m2, ta, ma
130; RV64-NEXT:    vse8.v v10, (a0)
131; RV64-NEXT:    ret
132;
133; RV32-LABEL: test_compresstore_v32i8:
134; RV32:       # %bb.0: # %entry
135; RV32-NEXT:    li a1, 32
136; RV32-NEXT:    vsetvli zero, a1, e8, m2, ta, ma
137; RV32-NEXT:    vcompress.vm v10, v8, v0
138; RV32-NEXT:    vcpop.m a1, v0
139; RV32-NEXT:    vsetvli zero, a1, e8, m2, ta, ma
140; RV32-NEXT:    vse8.v v10, (a0)
141; RV32-NEXT:    ret
142entry:
143  tail call void @llvm.masked.compressstore.v32i8(<32 x i8> %data, ptr align 1 %p, <32 x i1> %mask)
144  ret void
145}
146
147define void @test_compresstore_v64i8(ptr %p, <64 x i1> %mask, <64 x i8> %data) {
148; RV64-LABEL: test_compresstore_v64i8:
149; RV64:       # %bb.0: # %entry
150; RV64-NEXT:    li a1, 64
151; RV64-NEXT:    vsetvli zero, a1, e8, m4, ta, ma
152; RV64-NEXT:    vcompress.vm v12, v8, v0
153; RV64-NEXT:    vcpop.m a1, v0
154; RV64-NEXT:    vsetvli zero, a1, e8, m4, ta, ma
155; RV64-NEXT:    vse8.v v12, (a0)
156; RV64-NEXT:    ret
157;
158; RV32-LABEL: test_compresstore_v64i8:
159; RV32:       # %bb.0: # %entry
160; RV32-NEXT:    li a1, 64
161; RV32-NEXT:    vsetvli zero, a1, e8, m4, ta, ma
162; RV32-NEXT:    vcompress.vm v12, v8, v0
163; RV32-NEXT:    vcpop.m a1, v0
164; RV32-NEXT:    vsetvli zero, a1, e8, m4, ta, ma
165; RV32-NEXT:    vse8.v v12, (a0)
166; RV32-NEXT:    ret
167entry:
168  tail call void @llvm.masked.compressstore.v64i8(<64 x i8> %data, ptr align 1 %p, <64 x i1> %mask)
169  ret void
170}
171
172define void @test_compresstore_v128i8(ptr %p, <128 x i1> %mask, <128 x i8> %data) {
173; RV64-LABEL: test_compresstore_v128i8:
174; RV64:       # %bb.0: # %entry
175; RV64-NEXT:    li a1, 128
176; RV64-NEXT:    vsetvli zero, a1, e8, m8, ta, ma
177; RV64-NEXT:    vcompress.vm v16, v8, v0
178; RV64-NEXT:    vcpop.m a1, v0
179; RV64-NEXT:    vsetvli zero, a1, e8, m8, ta, ma
180; RV64-NEXT:    vse8.v v16, (a0)
181; RV64-NEXT:    ret
182;
183; RV32-LABEL: test_compresstore_v128i8:
184; RV32:       # %bb.0: # %entry
185; RV32-NEXT:    li a1, 128
186; RV32-NEXT:    vsetvli zero, a1, e8, m8, ta, ma
187; RV32-NEXT:    vcompress.vm v16, v8, v0
188; RV32-NEXT:    vcpop.m a1, v0
189; RV32-NEXT:    vsetvli zero, a1, e8, m8, ta, ma
190; RV32-NEXT:    vse8.v v16, (a0)
191; RV32-NEXT:    ret
192entry:
193  tail call void @llvm.masked.compressstore.v128i8(<128 x i8> %data, ptr align 1 %p, <128 x i1> %mask)
194  ret void
195}
196
197define void @test_compresstore_v256i8(ptr %p, <256 x i1> %mask, <256 x i8> %data) {
198; RV64-LABEL: test_compresstore_v256i8:
199; RV64:       # %bb.0: # %entry
200; RV64-NEXT:    vsetivli zero, 1, e64, m1, ta, ma
201; RV64-NEXT:    vmv1r.v v7, v8
202; RV64-NEXT:    li a2, 128
203; RV64-NEXT:    vslidedown.vi v9, v0, 1
204; RV64-NEXT:    vmv.x.s a3, v0
205; RV64-NEXT:    vsetvli zero, a2, e8, m8, ta, ma
206; RV64-NEXT:    vle8.v v24, (a1)
207; RV64-NEXT:    vsetvli zero, a2, e64, m1, ta, ma
208; RV64-NEXT:    vmv.x.s a1, v9
209; RV64-NEXT:    vsetvli zero, a2, e8, m8, ta, ma
210; RV64-NEXT:    vcompress.vm v8, v16, v0
211; RV64-NEXT:    vcpop.m a4, v0
212; RV64-NEXT:    vsetvli zero, a4, e8, m8, ta, ma
213; RV64-NEXT:    vse8.v v8, (a0)
214; RV64-NEXT:    vsetvli zero, a2, e8, m8, ta, ma
215; RV64-NEXT:    vcpop.m a2, v7
216; RV64-NEXT:    cpop a3, a3
217; RV64-NEXT:    cpop a1, a1
218; RV64-NEXT:    add a0, a0, a3
219; RV64-NEXT:    vcompress.vm v8, v24, v7
220; RV64-NEXT:    add a0, a0, a1
221; RV64-NEXT:    vsetvli zero, a2, e8, m8, ta, ma
222; RV64-NEXT:    vse8.v v8, (a0)
223; RV64-NEXT:    ret
224;
225; RV32-LABEL: test_compresstore_v256i8:
226; RV32:       # %bb.0: # %entry
227; RV32-NEXT:    addi sp, sp, -16
228; RV32-NEXT:    .cfi_def_cfa_offset 16
229; RV32-NEXT:    csrr a2, vlenb
230; RV32-NEXT:    slli a2, a2, 3
231; RV32-NEXT:    sub sp, sp, a2
232; RV32-NEXT:    .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x08, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 8 * vlenb
233; RV32-NEXT:    vsetivli zero, 1, e64, m1, ta, ma
234; RV32-NEXT:    vmv8r.v v24, v16
235; RV32-NEXT:    li a2, 128
236; RV32-NEXT:    vslidedown.vi v9, v0, 1
237; RV32-NEXT:    li a3, 32
238; RV32-NEXT:    vmv.x.s a4, v0
239; RV32-NEXT:    vsetvli zero, a2, e8, m8, ta, ma
240; RV32-NEXT:    vle8.v v16, (a1)
241; RV32-NEXT:    addi a1, sp, 16
242; RV32-NEXT:    vs8r.v v16, (a1) # Unknown-size Folded Spill
243; RV32-NEXT:    vsetivli zero, 1, e64, m1, ta, ma
244; RV32-NEXT:    vsrl.vx v10, v9, a3
245; RV32-NEXT:    vmv.x.s a1, v9
246; RV32-NEXT:    vsrl.vx v9, v0, a3
247; RV32-NEXT:    vsetvli zero, a2, e8, m8, ta, ma
248; RV32-NEXT:    vcompress.vm v16, v24, v0
249; RV32-NEXT:    vcpop.m a3, v0
250; RV32-NEXT:    cpop a4, a4
251; RV32-NEXT:    vsetvli zero, a2, e64, m1, ta, ma
252; RV32-NEXT:    vmv.x.s a5, v10
253; RV32-NEXT:    vmv.x.s a6, v9
254; RV32-NEXT:    vsetvli zero, a3, e8, m8, ta, ma
255; RV32-NEXT:    vse8.v v16, (a0)
256; RV32-NEXT:    cpop a1, a1
257; RV32-NEXT:    cpop a3, a6
258; RV32-NEXT:    cpop a5, a5
259; RV32-NEXT:    add a3, a4, a3
260; RV32-NEXT:    add a1, a1, a5
261; RV32-NEXT:    add a1, a3, a1
262; RV32-NEXT:    addi a3, sp, 16
263; RV32-NEXT:    vl8r.v v24, (a3) # Unknown-size Folded Reload
264; RV32-NEXT:    vsetvli zero, a2, e8, m8, ta, ma
265; RV32-NEXT:    vcompress.vm v16, v24, v8
266; RV32-NEXT:    add a0, a0, a1
267; RV32-NEXT:    vcpop.m a1, v8
268; RV32-NEXT:    vsetvli zero, a1, e8, m8, ta, ma
269; RV32-NEXT:    vse8.v v16, (a0)
270; RV32-NEXT:    csrr a0, vlenb
271; RV32-NEXT:    slli a0, a0, 3
272; RV32-NEXT:    add sp, sp, a0
273; RV32-NEXT:    .cfi_def_cfa sp, 16
274; RV32-NEXT:    addi sp, sp, 16
275; RV32-NEXT:    .cfi_def_cfa_offset 0
276; RV32-NEXT:    ret
277entry:
278  tail call void @llvm.masked.compressstore.v256i8(<256 x i8> %data, ptr align 1 %p, <256 x i1> %mask)
279  ret void
280}
281
282; Compress + store for i16 type
283
284define void @test_compresstore_v1i16(ptr %p, <1 x i1> %mask, <1 x i16> %data) {
285; RV64-LABEL: test_compresstore_v1i16:
286; RV64:       # %bb.0: # %entry
287; RV64-NEXT:    vsetivli zero, 1, e16, mf4, ta, ma
288; RV64-NEXT:    vcompress.vm v9, v8, v0
289; RV64-NEXT:    vcpop.m a1, v0
290; RV64-NEXT:    vsetvli zero, a1, e16, mf4, ta, ma
291; RV64-NEXT:    vse16.v v9, (a0)
292; RV64-NEXT:    ret
293;
294; RV32-LABEL: test_compresstore_v1i16:
295; RV32:       # %bb.0: # %entry
296; RV32-NEXT:    vsetivli zero, 1, e16, mf4, ta, ma
297; RV32-NEXT:    vcompress.vm v9, v8, v0
298; RV32-NEXT:    vcpop.m a1, v0
299; RV32-NEXT:    vsetvli zero, a1, e16, mf4, ta, ma
300; RV32-NEXT:    vse16.v v9, (a0)
301; RV32-NEXT:    ret
302entry:
303  tail call void @llvm.masked.compressstore.v1i16(<1 x i16> %data, ptr align 2 %p, <1 x i1> %mask)
304  ret void
305}
306
307define void @test_compresstore_v2i16(ptr %p, <2 x i1> %mask, <2 x i16> %data) {
308; RV64-LABEL: test_compresstore_v2i16:
309; RV64:       # %bb.0: # %entry
310; RV64-NEXT:    vsetivli zero, 2, e16, mf4, ta, ma
311; RV64-NEXT:    vcompress.vm v9, v8, v0
312; RV64-NEXT:    vcpop.m a1, v0
313; RV64-NEXT:    vsetvli zero, a1, e16, mf4, ta, ma
314; RV64-NEXT:    vse16.v v9, (a0)
315; RV64-NEXT:    ret
316;
317; RV32-LABEL: test_compresstore_v2i16:
318; RV32:       # %bb.0: # %entry
319; RV32-NEXT:    vsetivli zero, 2, e16, mf4, ta, ma
320; RV32-NEXT:    vcompress.vm v9, v8, v0
321; RV32-NEXT:    vcpop.m a1, v0
322; RV32-NEXT:    vsetvli zero, a1, e16, mf4, ta, ma
323; RV32-NEXT:    vse16.v v9, (a0)
324; RV32-NEXT:    ret
325entry:
326  tail call void @llvm.masked.compressstore.v2i16(<2 x i16> %data, ptr align 2 %p, <2 x i1> %mask)
327  ret void
328}
329
330define void @test_compresstore_v4i16(ptr %p, <4 x i1> %mask, <4 x i16> %data) {
331; RV64-LABEL: test_compresstore_v4i16:
332; RV64:       # %bb.0: # %entry
333; RV64-NEXT:    vsetivli zero, 4, e16, mf2, ta, ma
334; RV64-NEXT:    vcompress.vm v9, v8, v0
335; RV64-NEXT:    vcpop.m a1, v0
336; RV64-NEXT:    vsetvli zero, a1, e16, mf2, ta, ma
337; RV64-NEXT:    vse16.v v9, (a0)
338; RV64-NEXT:    ret
339;
340; RV32-LABEL: test_compresstore_v4i16:
341; RV32:       # %bb.0: # %entry
342; RV32-NEXT:    vsetivli zero, 4, e16, mf2, ta, ma
343; RV32-NEXT:    vcompress.vm v9, v8, v0
344; RV32-NEXT:    vcpop.m a1, v0
345; RV32-NEXT:    vsetvli zero, a1, e16, mf2, ta, ma
346; RV32-NEXT:    vse16.v v9, (a0)
347; RV32-NEXT:    ret
348entry:
349  tail call void @llvm.masked.compressstore.v4i16(<4 x i16> %data, ptr align 2 %p, <4 x i1> %mask)
350  ret void
351}
352
353define void @test_compresstore_v8i16(ptr %p, <8 x i1> %mask, <8 x i16> %data) {
354; RV64-LABEL: test_compresstore_v8i16:
355; RV64:       # %bb.0: # %entry
356; RV64-NEXT:    vsetivli zero, 8, e16, m1, ta, ma
357; RV64-NEXT:    vcompress.vm v9, v8, v0
358; RV64-NEXT:    vcpop.m a1, v0
359; RV64-NEXT:    vsetvli zero, a1, e16, m1, ta, ma
360; RV64-NEXT:    vse16.v v9, (a0)
361; RV64-NEXT:    ret
362;
363; RV32-LABEL: test_compresstore_v8i16:
364; RV32:       # %bb.0: # %entry
365; RV32-NEXT:    vsetivli zero, 8, e16, m1, ta, ma
366; RV32-NEXT:    vcompress.vm v9, v8, v0
367; RV32-NEXT:    vcpop.m a1, v0
368; RV32-NEXT:    vsetvli zero, a1, e16, m1, ta, ma
369; RV32-NEXT:    vse16.v v9, (a0)
370; RV32-NEXT:    ret
371entry:
372  tail call void @llvm.masked.compressstore.v8i16(<8 x i16> %data, ptr align 2 %p, <8 x i1> %mask)
373  ret void
374}
375
376define void @test_compresstore_v16i16(ptr %p, <16 x i1> %mask, <16 x i16> %data) {
377; RV64-LABEL: test_compresstore_v16i16:
378; RV64:       # %bb.0: # %entry
379; RV64-NEXT:    vsetivli zero, 16, e16, m2, ta, ma
380; RV64-NEXT:    vcompress.vm v10, v8, v0
381; RV64-NEXT:    vcpop.m a1, v0
382; RV64-NEXT:    vsetvli zero, a1, e16, m2, ta, ma
383; RV64-NEXT:    vse16.v v10, (a0)
384; RV64-NEXT:    ret
385;
386; RV32-LABEL: test_compresstore_v16i16:
387; RV32:       # %bb.0: # %entry
388; RV32-NEXT:    vsetivli zero, 16, e16, m2, ta, ma
389; RV32-NEXT:    vcompress.vm v10, v8, v0
390; RV32-NEXT:    vcpop.m a1, v0
391; RV32-NEXT:    vsetvli zero, a1, e16, m2, ta, ma
392; RV32-NEXT:    vse16.v v10, (a0)
393; RV32-NEXT:    ret
394entry:
395  tail call void @llvm.masked.compressstore.v16i16(<16 x i16> %data, ptr align 2 %p, <16 x i1> %mask)
396  ret void
397}
398
399define void @test_compresstore_v32i16(ptr %p, <32 x i1> %mask, <32 x i16> %data) {
400; RV64-LABEL: test_compresstore_v32i16:
401; RV64:       # %bb.0: # %entry
402; RV64-NEXT:    li a1, 32
403; RV64-NEXT:    vsetvli zero, a1, e16, m4, ta, ma
404; RV64-NEXT:    vcompress.vm v12, v8, v0
405; RV64-NEXT:    vcpop.m a1, v0
406; RV64-NEXT:    vsetvli zero, a1, e16, m4, ta, ma
407; RV64-NEXT:    vse16.v v12, (a0)
408; RV64-NEXT:    ret
409;
410; RV32-LABEL: test_compresstore_v32i16:
411; RV32:       # %bb.0: # %entry
412; RV32-NEXT:    li a1, 32
413; RV32-NEXT:    vsetvli zero, a1, e16, m4, ta, ma
414; RV32-NEXT:    vcompress.vm v12, v8, v0
415; RV32-NEXT:    vcpop.m a1, v0
416; RV32-NEXT:    vsetvli zero, a1, e16, m4, ta, ma
417; RV32-NEXT:    vse16.v v12, (a0)
418; RV32-NEXT:    ret
419entry:
420  tail call void @llvm.masked.compressstore.v32i16(<32 x i16> %data, ptr align 2 %p, <32 x i1> %mask)
421  ret void
422}
423
424define void @test_compresstore_v64i16(ptr %p, <64 x i1> %mask, <64 x i16> %data) {
425; RV64-LABEL: test_compresstore_v64i16:
426; RV64:       # %bb.0: # %entry
427; RV64-NEXT:    li a1, 64
428; RV64-NEXT:    vsetvli zero, a1, e16, m8, ta, ma
429; RV64-NEXT:    vcompress.vm v16, v8, v0
430; RV64-NEXT:    vcpop.m a1, v0
431; RV64-NEXT:    vsetvli zero, a1, e16, m8, ta, ma
432; RV64-NEXT:    vse16.v v16, (a0)
433; RV64-NEXT:    ret
434;
435; RV32-LABEL: test_compresstore_v64i16:
436; RV32:       # %bb.0: # %entry
437; RV32-NEXT:    li a1, 64
438; RV32-NEXT:    vsetvli zero, a1, e16, m8, ta, ma
439; RV32-NEXT:    vcompress.vm v16, v8, v0
440; RV32-NEXT:    vcpop.m a1, v0
441; RV32-NEXT:    vsetvli zero, a1, e16, m8, ta, ma
442; RV32-NEXT:    vse16.v v16, (a0)
443; RV32-NEXT:    ret
444entry:
445  tail call void @llvm.masked.compressstore.v64i16(<64 x i16> %data, ptr align 2 %p, <64 x i1> %mask)
446  ret void
447}
448
449define void @test_compresstore_v128i16(ptr %p, <128 x i1> %mask, <128 x i16> %data) {
450; RV64-LABEL: test_compresstore_v128i16:
451; RV64:       # %bb.0: # %entry
452; RV64-NEXT:    li a1, 64
453; RV64-NEXT:    vsetvli zero, a1, e16, m8, ta, ma
454; RV64-NEXT:    vcompress.vm v24, v8, v0
455; RV64-NEXT:    vcpop.m a2, v0
456; RV64-NEXT:    vsetivli zero, 8, e8, m1, ta, ma
457; RV64-NEXT:    vslidedown.vi v8, v0, 8
458; RV64-NEXT:    vsetvli zero, a1, e16, m8, ta, ma
459; RV64-NEXT:    vcompress.vm v0, v16, v8
460; RV64-NEXT:    vcpop.m a1, v8
461; RV64-NEXT:    vsetvli zero, a2, e16, m8, ta, ma
462; RV64-NEXT:    vse16.v v24, (a0)
463; RV64-NEXT:    slli a2, a2, 1
464; RV64-NEXT:    add a0, a0, a2
465; RV64-NEXT:    vsetvli zero, a1, e16, m8, ta, ma
466; RV64-NEXT:    vse16.v v0, (a0)
467; RV64-NEXT:    ret
468;
469; RV32-LABEL: test_compresstore_v128i16:
470; RV32:       # %bb.0: # %entry
471; RV32-NEXT:    li a1, 64
472; RV32-NEXT:    vsetivli zero, 8, e8, m1, ta, ma
473; RV32-NEXT:    vslidedown.vi v7, v0, 8
474; RV32-NEXT:    vsetvli zero, a1, e16, m8, ta, ma
475; RV32-NEXT:    vcompress.vm v24, v16, v7
476; RV32-NEXT:    vcpop.m a2, v7
477; RV32-NEXT:    li a3, 32
478; RV32-NEXT:    vsetvli zero, a1, e64, m1, ta, ma
479; RV32-NEXT:    vmv.x.s a4, v0
480; RV32-NEXT:    vsetvli zero, a1, e16, m8, ta, ma
481; RV32-NEXT:    vcompress.vm v16, v8, v0
482; RV32-NEXT:    vcpop.m a1, v0
483; RV32-NEXT:    vsetivli zero, 1, e64, m1, ta, ma
484; RV32-NEXT:    vsrl.vx v8, v0, a3
485; RV32-NEXT:    vsetvli zero, a1, e16, m8, ta, ma
486; RV32-NEXT:    vse16.v v16, (a0)
487; RV32-NEXT:    vsetvli zero, a1, e64, m1, ta, ma
488; RV32-NEXT:    vmv.x.s a1, v8
489; RV32-NEXT:    cpop a1, a1
490; RV32-NEXT:    cpop a3, a4
491; RV32-NEXT:    add a1, a3, a1
492; RV32-NEXT:    slli a1, a1, 1
493; RV32-NEXT:    add a0, a0, a1
494; RV32-NEXT:    vsetvli zero, a2, e16, m8, ta, ma
495; RV32-NEXT:    vse16.v v24, (a0)
496; RV32-NEXT:    ret
497entry:
498  tail call void @llvm.masked.compressstore.v128i16(<128 x i16> %data, ptr align 2 %p, <128 x i1> %mask)
499  ret void
500}
501
502; Compress + store for i32 type
503
504define void @test_compresstore_v1i32(ptr %p, <1 x i1> %mask, <1 x i32> %data) {
505; RV64-LABEL: test_compresstore_v1i32:
506; RV64:       # %bb.0: # %entry
507; RV64-NEXT:    vsetivli zero, 1, e32, mf2, ta, ma
508; RV64-NEXT:    vcompress.vm v9, v8, v0
509; RV64-NEXT:    vcpop.m a1, v0
510; RV64-NEXT:    vsetvli zero, a1, e32, mf2, ta, ma
511; RV64-NEXT:    vse32.v v9, (a0)
512; RV64-NEXT:    ret
513;
514; RV32-LABEL: test_compresstore_v1i32:
515; RV32:       # %bb.0: # %entry
516; RV32-NEXT:    vsetivli zero, 1, e32, mf2, ta, ma
517; RV32-NEXT:    vcompress.vm v9, v8, v0
518; RV32-NEXT:    vcpop.m a1, v0
519; RV32-NEXT:    vsetvli zero, a1, e32, mf2, ta, ma
520; RV32-NEXT:    vse32.v v9, (a0)
521; RV32-NEXT:    ret
522entry:
523  tail call void @llvm.masked.compressstore.v1i32(<1 x i32> %data, ptr align 4 %p, <1 x i1> %mask)
524  ret void
525}
526
527define void @test_compresstore_v2i32(ptr %p, <2 x i1> %mask, <2 x i32> %data) {
528; RV64-LABEL: test_compresstore_v2i32:
529; RV64:       # %bb.0: # %entry
530; RV64-NEXT:    vsetivli zero, 2, e32, mf2, ta, ma
531; RV64-NEXT:    vcompress.vm v9, v8, v0
532; RV64-NEXT:    vcpop.m a1, v0
533; RV64-NEXT:    vsetvli zero, a1, e32, mf2, ta, ma
534; RV64-NEXT:    vse32.v v9, (a0)
535; RV64-NEXT:    ret
536;
537; RV32-LABEL: test_compresstore_v2i32:
538; RV32:       # %bb.0: # %entry
539; RV32-NEXT:    vsetivli zero, 2, e32, mf2, ta, ma
540; RV32-NEXT:    vcompress.vm v9, v8, v0
541; RV32-NEXT:    vcpop.m a1, v0
542; RV32-NEXT:    vsetvli zero, a1, e32, mf2, ta, ma
543; RV32-NEXT:    vse32.v v9, (a0)
544; RV32-NEXT:    ret
545entry:
546  tail call void @llvm.masked.compressstore.v2i32(<2 x i32> %data, ptr align 4 %p, <2 x i1> %mask)
547  ret void
548}
549
550define void @test_compresstore_v4i32(ptr %p, <4 x i1> %mask, <4 x i32> %data) {
551; RV64-LABEL: test_compresstore_v4i32:
552; RV64:       # %bb.0: # %entry
553; RV64-NEXT:    vsetivli zero, 4, e32, m1, ta, ma
554; RV64-NEXT:    vcompress.vm v9, v8, v0
555; RV64-NEXT:    vcpop.m a1, v0
556; RV64-NEXT:    vsetvli zero, a1, e32, m1, ta, ma
557; RV64-NEXT:    vse32.v v9, (a0)
558; RV64-NEXT:    ret
559;
560; RV32-LABEL: test_compresstore_v4i32:
561; RV32:       # %bb.0: # %entry
562; RV32-NEXT:    vsetivli zero, 4, e32, m1, ta, ma
563; RV32-NEXT:    vcompress.vm v9, v8, v0
564; RV32-NEXT:    vcpop.m a1, v0
565; RV32-NEXT:    vsetvli zero, a1, e32, m1, ta, ma
566; RV32-NEXT:    vse32.v v9, (a0)
567; RV32-NEXT:    ret
568entry:
569  tail call void @llvm.masked.compressstore.v4i32(<4 x i32> %data, ptr align 4 %p, <4 x i1> %mask)
570  ret void
571}
572
573define void @test_compresstore_v8i32(ptr %p, <8 x i1> %mask, <8 x i32> %data) {
574; RV64-LABEL: test_compresstore_v8i32:
575; RV64:       # %bb.0: # %entry
576; RV64-NEXT:    vsetivli zero, 8, e32, m2, ta, ma
577; RV64-NEXT:    vcompress.vm v10, v8, v0
578; RV64-NEXT:    vcpop.m a1, v0
579; RV64-NEXT:    vsetvli zero, a1, e32, m2, ta, ma
580; RV64-NEXT:    vse32.v v10, (a0)
581; RV64-NEXT:    ret
582;
583; RV32-LABEL: test_compresstore_v8i32:
584; RV32:       # %bb.0: # %entry
585; RV32-NEXT:    vsetivli zero, 8, e32, m2, ta, ma
586; RV32-NEXT:    vcompress.vm v10, v8, v0
587; RV32-NEXT:    vcpop.m a1, v0
588; RV32-NEXT:    vsetvli zero, a1, e32, m2, ta, ma
589; RV32-NEXT:    vse32.v v10, (a0)
590; RV32-NEXT:    ret
591entry:
592  tail call void @llvm.masked.compressstore.v8i32(<8 x i32> %data, ptr align 4 %p, <8 x i1> %mask)
593  ret void
594}
595
596define void @test_compresstore_v16i32(ptr %p, <16 x i1> %mask, <16 x i32> %data) {
597; RV64-LABEL: test_compresstore_v16i32:
598; RV64:       # %bb.0: # %entry
599; RV64-NEXT:    vsetivli zero, 16, e32, m4, ta, ma
600; RV64-NEXT:    vcompress.vm v12, v8, v0
601; RV64-NEXT:    vcpop.m a1, v0
602; RV64-NEXT:    vsetvli zero, a1, e32, m4, ta, ma
603; RV64-NEXT:    vse32.v v12, (a0)
604; RV64-NEXT:    ret
605;
606; RV32-LABEL: test_compresstore_v16i32:
607; RV32:       # %bb.0: # %entry
608; RV32-NEXT:    vsetivli zero, 16, e32, m4, ta, ma
609; RV32-NEXT:    vcompress.vm v12, v8, v0
610; RV32-NEXT:    vcpop.m a1, v0
611; RV32-NEXT:    vsetvli zero, a1, e32, m4, ta, ma
612; RV32-NEXT:    vse32.v v12, (a0)
613; RV32-NEXT:    ret
614entry:
615  tail call void @llvm.masked.compressstore.v16i32(<16 x i32> %data, ptr align 4 %p, <16 x i1> %mask)
616  ret void
617}
618
619define void @test_compresstore_v32i32(ptr %p, <32 x i1> %mask, <32 x i32> %data) {
620; RV64-LABEL: test_compresstore_v32i32:
621; RV64:       # %bb.0: # %entry
622; RV64-NEXT:    li a1, 32
623; RV64-NEXT:    vsetvli zero, a1, e32, m8, ta, ma
624; RV64-NEXT:    vcompress.vm v16, v8, v0
625; RV64-NEXT:    vcpop.m a1, v0
626; RV64-NEXT:    vsetvli zero, a1, e32, m8, ta, ma
627; RV64-NEXT:    vse32.v v16, (a0)
628; RV64-NEXT:    ret
629;
630; RV32-LABEL: test_compresstore_v32i32:
631; RV32:       # %bb.0: # %entry
632; RV32-NEXT:    li a1, 32
633; RV32-NEXT:    vsetvli zero, a1, e32, m8, ta, ma
634; RV32-NEXT:    vcompress.vm v16, v8, v0
635; RV32-NEXT:    vcpop.m a1, v0
636; RV32-NEXT:    vsetvli zero, a1, e32, m8, ta, ma
637; RV32-NEXT:    vse32.v v16, (a0)
638; RV32-NEXT:    ret
639entry:
640  tail call void @llvm.masked.compressstore.v32i32(<32 x i32> %data, ptr align 4 %p, <32 x i1> %mask)
641  ret void
642}
643
644define void @test_compresstore_v64i32(ptr %p, <64 x i1> %mask, <64 x i32> %data) {
645; RV64-LABEL: test_compresstore_v64i32:
646; RV64:       # %bb.0: # %entry
647; RV64-NEXT:    li a1, 32
648; RV64-NEXT:    vsetvli zero, a1, e32, m8, ta, ma
649; RV64-NEXT:    vcompress.vm v24, v8, v0
650; RV64-NEXT:    vcpop.m a2, v0
651; RV64-NEXT:    vsetvli zero, a2, e32, m8, ta, ma
652; RV64-NEXT:    vse32.v v24, (a0)
653; RV64-NEXT:    vsetivli zero, 4, e8, mf2, ta, ma
654; RV64-NEXT:    vslidedown.vi v8, v0, 4
655; RV64-NEXT:    vsetvli zero, a1, e32, m8, ta, ma
656; RV64-NEXT:    vmv.x.s a1, v0
657; RV64-NEXT:    vcompress.vm v24, v16, v8
658; RV64-NEXT:    vcpop.m a2, v8
659; RV64-NEXT:    cpopw a1, a1
660; RV64-NEXT:    slli a1, a1, 2
661; RV64-NEXT:    add a0, a0, a1
662; RV64-NEXT:    vsetvli zero, a2, e32, m8, ta, ma
663; RV64-NEXT:    vse32.v v24, (a0)
664; RV64-NEXT:    ret
665;
666; RV32-LABEL: test_compresstore_v64i32:
667; RV32:       # %bb.0: # %entry
668; RV32-NEXT:    li a1, 32
669; RV32-NEXT:    vsetvli zero, a1, e32, m8, ta, ma
670; RV32-NEXT:    vcompress.vm v24, v8, v0
671; RV32-NEXT:    vcpop.m a2, v0
672; RV32-NEXT:    vsetivli zero, 4, e8, mf2, ta, ma
673; RV32-NEXT:    vslidedown.vi v8, v0, 4
674; RV32-NEXT:    vsetvli zero, a1, e32, m8, ta, ma
675; RV32-NEXT:    vcompress.vm v0, v16, v8
676; RV32-NEXT:    vcpop.m a1, v8
677; RV32-NEXT:    vsetvli zero, a2, e32, m8, ta, ma
678; RV32-NEXT:    vse32.v v24, (a0)
679; RV32-NEXT:    slli a2, a2, 2
680; RV32-NEXT:    add a0, a0, a2
681; RV32-NEXT:    vsetvli zero, a1, e32, m8, ta, ma
682; RV32-NEXT:    vse32.v v0, (a0)
683; RV32-NEXT:    ret
684entry:
685  tail call void @llvm.masked.compressstore.v64i32(<64 x i32> %data, ptr align 4 %p, <64 x i1> %mask)
686  ret void
687}
688
689; Compress + store for i64 type
690
691define void @test_compresstore_v1i64(ptr %p, <1 x i1> %mask, <1 x i64> %data) {
692; RV64-LABEL: test_compresstore_v1i64:
693; RV64:       # %bb.0: # %entry
694; RV64-NEXT:    vsetivli zero, 1, e64, m1, ta, ma
695; RV64-NEXT:    vcompress.vm v9, v8, v0
696; RV64-NEXT:    vcpop.m a1, v0
697; RV64-NEXT:    vsetvli zero, a1, e64, m1, ta, ma
698; RV64-NEXT:    vse64.v v9, (a0)
699; RV64-NEXT:    ret
700;
701; RV32-LABEL: test_compresstore_v1i64:
702; RV32:       # %bb.0: # %entry
703; RV32-NEXT:    vsetivli zero, 1, e64, m1, ta, ma
704; RV32-NEXT:    vcompress.vm v9, v8, v0
705; RV32-NEXT:    vcpop.m a1, v0
706; RV32-NEXT:    vsetvli zero, a1, e64, m1, ta, ma
707; RV32-NEXT:    vse64.v v9, (a0)
708; RV32-NEXT:    ret
709entry:
710  tail call void @llvm.masked.compressstore.v1i64(<1 x i64> %data, ptr align 8 %p, <1 x i1> %mask)
711  ret void
712}
713
714define void @test_compresstore_v2i64(ptr %p, <2 x i1> %mask, <2 x i64> %data) {
715; RV64-LABEL: test_compresstore_v2i64:
716; RV64:       # %bb.0: # %entry
717; RV64-NEXT:    vsetivli zero, 2, e64, m1, ta, ma
718; RV64-NEXT:    vcompress.vm v9, v8, v0
719; RV64-NEXT:    vcpop.m a1, v0
720; RV64-NEXT:    vsetvli zero, a1, e64, m1, ta, ma
721; RV64-NEXT:    vse64.v v9, (a0)
722; RV64-NEXT:    ret
723;
724; RV32-LABEL: test_compresstore_v2i64:
725; RV32:       # %bb.0: # %entry
726; RV32-NEXT:    vsetivli zero, 2, e64, m1, ta, ma
727; RV32-NEXT:    vcompress.vm v9, v8, v0
728; RV32-NEXT:    vcpop.m a1, v0
729; RV32-NEXT:    vsetvli zero, a1, e64, m1, ta, ma
730; RV32-NEXT:    vse64.v v9, (a0)
731; RV32-NEXT:    ret
732entry:
733  tail call void @llvm.masked.compressstore.v2i64(<2 x i64> %data, ptr align 8 %p, <2 x i1> %mask)
734  ret void
735}
736
737define void @test_compresstore_v4i64(ptr %p, <4 x i1> %mask, <4 x i64> %data) {
738; RV64-LABEL: test_compresstore_v4i64:
739; RV64:       # %bb.0: # %entry
740; RV64-NEXT:    vsetivli zero, 4, e64, m2, ta, ma
741; RV64-NEXT:    vcompress.vm v10, v8, v0
742; RV64-NEXT:    vcpop.m a1, v0
743; RV64-NEXT:    vsetvli zero, a1, e64, m2, ta, ma
744; RV64-NEXT:    vse64.v v10, (a0)
745; RV64-NEXT:    ret
746;
747; RV32-LABEL: test_compresstore_v4i64:
748; RV32:       # %bb.0: # %entry
749; RV32-NEXT:    vsetivli zero, 4, e64, m2, ta, ma
750; RV32-NEXT:    vcompress.vm v10, v8, v0
751; RV32-NEXT:    vcpop.m a1, v0
752; RV32-NEXT:    vsetvli zero, a1, e64, m2, ta, ma
753; RV32-NEXT:    vse64.v v10, (a0)
754; RV32-NEXT:    ret
755entry:
756  tail call void @llvm.masked.compressstore.v4i64(<4 x i64> %data, ptr align 8 %p, <4 x i1> %mask)
757  ret void
758}
759
760define void @test_compresstore_v8i64(ptr %p, <8 x i1> %mask, <8 x i64> %data) {
761; RV64-LABEL: test_compresstore_v8i64:
762; RV64:       # %bb.0: # %entry
763; RV64-NEXT:    vsetivli zero, 8, e64, m4, ta, ma
764; RV64-NEXT:    vcompress.vm v12, v8, v0
765; RV64-NEXT:    vcpop.m a1, v0
766; RV64-NEXT:    vsetvli zero, a1, e64, m4, ta, ma
767; RV64-NEXT:    vse64.v v12, (a0)
768; RV64-NEXT:    ret
769;
770; RV32-LABEL: test_compresstore_v8i64:
771; RV32:       # %bb.0: # %entry
772; RV32-NEXT:    vsetivli zero, 8, e64, m4, ta, ma
773; RV32-NEXT:    vcompress.vm v12, v8, v0
774; RV32-NEXT:    vcpop.m a1, v0
775; RV32-NEXT:    vsetvli zero, a1, e64, m4, ta, ma
776; RV32-NEXT:    vse64.v v12, (a0)
777; RV32-NEXT:    ret
778entry:
779  tail call void @llvm.masked.compressstore.v8i64(<8 x i64> %data, ptr align 8 %p, <8 x i1> %mask)
780  ret void
781}
782
783define void @test_compresstore_v16i64(ptr %p, <16 x i1> %mask, <16 x i64> %data) {
784; RV64-LABEL: test_compresstore_v16i64:
785; RV64:       # %bb.0: # %entry
786; RV64-NEXT:    vsetivli zero, 16, e64, m8, ta, ma
787; RV64-NEXT:    vcompress.vm v16, v8, v0
788; RV64-NEXT:    vcpop.m a1, v0
789; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma
790; RV64-NEXT:    vse64.v v16, (a0)
791; RV64-NEXT:    ret
792;
793; RV32-LABEL: test_compresstore_v16i64:
794; RV32:       # %bb.0: # %entry
795; RV32-NEXT:    vsetivli zero, 16, e64, m8, ta, ma
796; RV32-NEXT:    vcompress.vm v16, v8, v0
797; RV32-NEXT:    vcpop.m a1, v0
798; RV32-NEXT:    vsetvli zero, a1, e64, m8, ta, ma
799; RV32-NEXT:    vse64.v v16, (a0)
800; RV32-NEXT:    ret
801entry:
802  tail call void @llvm.masked.compressstore.v16i64(<16 x i64> %data, ptr align 8 %p, <16 x i1> %mask)
803  ret void
804}
805
806define void @test_compresstore_v32i64(ptr %p, <32 x i1> %mask, <32 x i64> %data) {
807; RV64-LABEL: test_compresstore_v32i64:
808; RV64:       # %bb.0: # %entry
809; RV64-NEXT:    vsetivli zero, 16, e64, m8, ta, ma
810; RV64-NEXT:    vcompress.vm v24, v8, v0
811; RV64-NEXT:    vcpop.m a1, v0
812; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma
813; RV64-NEXT:    vse64.v v24, (a0)
814; RV64-NEXT:    vsetivli zero, 2, e8, mf4, ta, ma
815; RV64-NEXT:    vslidedown.vi v8, v0, 2
816; RV64-NEXT:    vsetvli zero, zero, e16, mf2, ta, ma
817; RV64-NEXT:    vmv.x.s a1, v0
818; RV64-NEXT:    vsetivli zero, 16, e64, m8, ta, ma
819; RV64-NEXT:    vcompress.vm v24, v16, v8
820; RV64-NEXT:    zext.h a1, a1
821; RV64-NEXT:    cpopw a1, a1
822; RV64-NEXT:    slli a1, a1, 3
823; RV64-NEXT:    add a0, a0, a1
824; RV64-NEXT:    vcpop.m a1, v8
825; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma
826; RV64-NEXT:    vse64.v v24, (a0)
827; RV64-NEXT:    ret
828;
829; RV32-LABEL: test_compresstore_v32i64:
830; RV32:       # %bb.0: # %entry
831; RV32-NEXT:    vsetivli zero, 16, e64, m8, ta, ma
832; RV32-NEXT:    vcompress.vm v24, v8, v0
833; RV32-NEXT:    vcpop.m a1, v0
834; RV32-NEXT:    vsetvli zero, a1, e64, m8, ta, ma
835; RV32-NEXT:    vse64.v v24, (a0)
836; RV32-NEXT:    vsetivli zero, 2, e8, mf4, ta, ma
837; RV32-NEXT:    vslidedown.vi v8, v0, 2
838; RV32-NEXT:    vsetvli zero, zero, e16, mf2, ta, ma
839; RV32-NEXT:    vmv.x.s a1, v0
840; RV32-NEXT:    vsetivli zero, 16, e64, m8, ta, ma
841; RV32-NEXT:    vcompress.vm v24, v16, v8
842; RV32-NEXT:    zext.h a1, a1
843; RV32-NEXT:    cpop a1, a1
844; RV32-NEXT:    slli a1, a1, 3
845; RV32-NEXT:    add a0, a0, a1
846; RV32-NEXT:    vcpop.m a1, v8
847; RV32-NEXT:    vsetvli zero, a1, e64, m8, ta, ma
848; RV32-NEXT:    vse64.v v24, (a0)
849; RV32-NEXT:    ret
850entry:
851  tail call void @llvm.masked.compressstore.v32i64(<32 x i64> %data, ptr align 8 %p, <32 x i1> %mask)
852  ret void
853}
854
855declare void @llvm.masked.compressstore.v1i8(<1 x i8>, ptr, <1 x i1>)
856declare void @llvm.masked.compressstore.v2i8(<2 x i8>, ptr, <2 x i1>)
857declare void @llvm.masked.compressstore.v4i8(<4 x i8>, ptr, <4 x i1>)
858declare void @llvm.masked.compressstore.v8i8(<8 x i8>, ptr, <8 x i1>)
859declare void @llvm.masked.compressstore.v16i8(<16 x i8>, ptr, <16 x i1>)
860declare void @llvm.masked.compressstore.v32i8(<32 x i8>, ptr, <32 x i1>)
861declare void @llvm.masked.compressstore.v64i8(<64 x i8>, ptr, <64 x i1>)
862declare void @llvm.masked.compressstore.v128i8(<128 x i8>, ptr, <128 x i1>)
863declare void @llvm.masked.compressstore.v256i8(<256 x i8>, ptr, <256 x i1>)
864
865declare void @llvm.masked.compressstore.v1i16(<1 x i16>, ptr, <1 x i1>)
866declare void @llvm.masked.compressstore.v2i16(<2 x i16>, ptr, <2 x i1>)
867declare void @llvm.masked.compressstore.v4i16(<4 x i16>, ptr, <4 x i1>)
868declare void @llvm.masked.compressstore.v8i16(<8 x i16>, ptr, <8 x i1>)
869declare void @llvm.masked.compressstore.v16i16(<16 x i16>, ptr, <16 x i1>)
870declare void @llvm.masked.compressstore.v32i16(<32 x i16>, ptr, <32 x i1>)
871declare void @llvm.masked.compressstore.v64i16(<64 x i16>, ptr, <64 x i1>)
872declare void @llvm.masked.compressstore.v128i16(<128 x i16>, ptr, <128 x i1>)
873
874declare void @llvm.masked.compressstore.v1i32(<1 x i32>, ptr, <1 x i1>)
875declare void @llvm.masked.compressstore.v2i32(<2 x i32>, ptr, <2 x i1>)
876declare void @llvm.masked.compressstore.v4i32(<4 x i32>, ptr, <4 x i1>)
877declare void @llvm.masked.compressstore.v8i32(<8 x i32>, ptr, <8 x i1>)
878declare void @llvm.masked.compressstore.v16i32(<16 x i32>, ptr, <16 x i1>)
879declare void @llvm.masked.compressstore.v32i32(<32 x i32>, ptr, <32 x i1>)
880declare void @llvm.masked.compressstore.v64i32(<64 x i32>, ptr, <64 x i1>)
881
882declare void @llvm.masked.compressstore.v1i64(<1 x i64>, ptr, <1 x i1>)
883declare void @llvm.masked.compressstore.v2i64(<2 x i64>, ptr, <2 x i1>)
884declare void @llvm.masked.compressstore.v4i64(<4 x i64>, ptr, <4 x i1>)
885declare void @llvm.masked.compressstore.v8i64(<8 x i64>, ptr, <8 x i1>)
886declare void @llvm.masked.compressstore.v16i64(<16 x i64>, ptr, <16 x i1>)
887declare void @llvm.masked.compressstore.v32i64(<32 x i64>, ptr, <32 x i1>)
888