1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3 2; RUN: llc -mtriple=riscv64 -mattr=+v,+f,+m,+zvfh \ 3; RUN: < %s | FileCheck %s 4 5declare <16 x i8> @llvm.vector.extract.v16i8.nxv8i8(<vscale x 8 x i8>, i64 immarg) 6declare <vscale x 8 x i8> @llvm.vector.insert.nxv8i8.v16i8(<vscale x 8 x i8>, <16 x i8>, i64 immarg) 7declare <vscale x 8 x i8> @llvm.riscv.vslideup.nxv8i8.i64(<vscale x 8 x i8>, <vscale x 8 x i8>, i64, i64, i64 immarg) 8declare <vscale x 2 x i32> @llvm.vector.insert.nxv2i32.v4i32(<vscale x 2 x i32>, <4 x i32>, i64 immarg) 9 10define void @foo(<vscale x 8 x i8> %0) { 11; CHECK-LABEL: foo: 12; CHECK: # %bb.0: 13; CHECK-NEXT: addi sp, sp, -32 14; CHECK-NEXT: .cfi_def_cfa_offset 32 15; CHECK-NEXT: sd ra, 24(sp) # 8-byte Folded Spill 16; CHECK-NEXT: sd s0, 16(sp) # 8-byte Folded Spill 17; CHECK-NEXT: sd s1, 8(sp) # 8-byte Folded Spill 18; CHECK-NEXT: sd s2, 0(sp) # 8-byte Folded Spill 19; CHECK-NEXT: .cfi_offset ra, -8 20; CHECK-NEXT: .cfi_offset s0, -16 21; CHECK-NEXT: .cfi_offset s1, -24 22; CHECK-NEXT: .cfi_offset s2, -32 23; CHECK-NEXT: li s0, 0 24; CHECK-NEXT: vsetvli a0, zero, e8, m1, ta, ma 25; CHECK-NEXT: vmv.v.i v9, 0 26; CHECK-NEXT: vsetivli zero, 0, e8, m1, tu, ma 27; CHECK-NEXT: vslideup.vi v9, v10, 0 28; CHECK-NEXT: vslideup.vi v8, v10, 0 29; CHECK-NEXT: vsetvli zero, zero, e64, m8, ta, ma 30; CHECK-NEXT: vmv.x.s s1, v9 31; CHECK-NEXT: vmv.x.s s2, v8 32; CHECK-NEXT: .LBB0_1: # =>This Inner Loop Header: Depth=1 33; CHECK-NEXT: mv a0, s1 34; CHECK-NEXT: mv a1, s0 35; CHECK-NEXT: mv a2, s2 36; CHECK-NEXT: mv a3, s0 37; CHECK-NEXT: mv a4, s0 38; CHECK-NEXT: mv a5, s0 39; CHECK-NEXT: jalr s0 40; CHECK-NEXT: j .LBB0_1 41 %2 = tail call <vscale x 8 x i8> @llvm.vector.insert.nxv8i8.v16i8(<vscale x 8 x i8> undef, <16 x i8> undef, i64 0) 42 %3 = tail call <vscale x 8 x i8> @llvm.vector.insert.nxv8i8.v16i8(<vscale x 8 x i8> undef, <16 x i8> poison, i64 0) 43 br label %4 44 454: ; preds = %4, %1 46 %5 = tail call <vscale x 8 x i8> @llvm.riscv.vslideup.nxv8i8.i64(<vscale x 8 x i8> zeroinitializer, <vscale x 8 x i8> %2, i64 0, i64 0, i64 0) 47 %6 = tail call <16 x i8> @llvm.vector.extract.v16i8.nxv8i8(<vscale x 8 x i8> %5, i64 0) 48 %7 = bitcast <16 x i8> %6 to <2 x i64> 49 %8 = extractelement <2 x i64> %7, i64 0 50 %9 = insertvalue [2 x i64] zeroinitializer, i64 %8, 0 51 %10 = tail call <vscale x 8 x i8> @llvm.riscv.vslideup.nxv8i8.i64(<vscale x 8 x i8> %0, <vscale x 8 x i8> %3, i64 0, i64 0, i64 0) 52 %11 = tail call <16 x i8> @llvm.vector.extract.v16i8.nxv8i8(<vscale x 8 x i8> %10, i64 0) 53 %12 = bitcast <16 x i8> %11 to <2 x i64> 54 %13 = extractelement <2 x i64> %12, i64 0 55 %14 = insertvalue [2 x i64] zeroinitializer, i64 %13, 0 56 %15 = tail call fastcc [2 x i64] null([2 x i64] %9, [2 x i64] %14, [2 x i64] zeroinitializer) 57 br label %4 58} 59