xref: /llvm-project/llvm/test/CodeGen/RISCV/rv64zksed-intrinsic-autoupgrade.ll (revision 2f2af2d01763374ed55f5fb598e5005c1b9af957)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=riscv64 -mattr=+zksed -verify-machineinstrs < %s \
3; RUN:   | FileCheck %s -check-prefix=RV64ZKSED
4
5declare i64 @llvm.riscv.sm4ks.i64(i64, i64, i8);
6
7define i64 @sm4ks_i64(i64 %a, i64 %b) nounwind {
8; RV64ZKSED-LABEL: sm4ks_i64:
9; RV64ZKSED:       # %bb.0:
10; RV64ZKSED-NEXT:    sm4ks a0, a0, a1, 0
11; RV64ZKSED-NEXT:    ret
12  %val = call i64 @llvm.riscv.sm4ks.i64(i64 %a, i64 %b, i8 0)
13  ret i64 %val
14}
15
16declare i64 @llvm.riscv.sm4ed.i64(i64, i64, i8);
17
18define i64 @sm4ed_i64(i64 %a, i64 %b) nounwind {
19; RV64ZKSED-LABEL: sm4ed_i64:
20; RV64ZKSED:       # %bb.0:
21; RV64ZKSED-NEXT:    sm4ed a0, a0, a1, 1
22; RV64ZKSED-NEXT:    ret
23  %val = call i64 @llvm.riscv.sm4ed.i64(i64 %a, i64 %b, i8 1)
24  ret i64 %val
25}
26