xref: /llvm-project/llvm/test/CodeGen/RISCV/rv64-stackmap.ll (revision ff9af4c43ad71eeba2cabe99609cfaa0fd54c1d0)
1; RUN: llc -mtriple=riscv64 < %s | FileCheck %s
2
3; CHECK-LABEL:  .section	.llvm_stackmaps
4; CHECK-NEXT:  __LLVM_StackMaps:
5; Header
6; CHECK-NEXT:   .byte   3
7; CHECK-NEXT:   .byte   0
8; CHECK-NEXT:   .half   0
9; Num Functions
10; CHECK-NEXT:   .word   12
11; Num LargeConstants
12; CHECK-NEXT:   .word   2
13; Num Callsites
14; CHECK-NEXT:   .word   16
15
16; Functions and stack size
17; CHECK-NEXT:   .quad   constantargs
18; CHECK-NEXT:   .quad   0
19; CHECK-NEXT:   .quad   1
20; CHECK-NEXT:   .quad   osrinline
21; CHECK-NEXT:   .quad   32
22; CHECK-NEXT:   .quad   1
23; CHECK-NEXT:   .quad   osrcold
24; CHECK-NEXT:   .quad   0
25; CHECK-NEXT:   .quad   1
26; CHECK-NEXT:   .quad   propertyRead
27; CHECK-NEXT:   .quad   16
28; CHECK-NEXT:   .quad   1
29; CHECK-NEXT:   .quad   propertyWrite
30; CHECK-NEXT:   .quad   0
31; CHECK-NEXT:   .quad   1
32; CHECK-NEXT:   .quad   jsVoidCall
33; CHECK-NEXT:   .quad   0
34; CHECK-NEXT:   .quad   1
35; CHECK-NEXT:   .quad   jsIntCall
36; CHECK-NEXT:   .quad   0
37; CHECK-NEXT:   .quad   1
38; CHECK-NEXT:   .quad   liveConstant
39; CHECK-NEXT:   .quad   0
40; CHECK-NEXT:   .quad   1
41; CHECK-NEXT:   .quad   spilledValue
42; CHECK-NEXT:   .quad   144
43; CHECK-NEXT:   .quad   1
44; CHECK-NEXT:   .quad   directFrameIdx
45; CHECK-NEXT:   .quad   48
46; CHECK-NEXT:   .quad   2
47; CHECK-NEXT:   .quad   longid
48; CHECK-NEXT:   .quad   0
49; CHECK-NEXT:   .quad   4
50; CHECK-NEXT:   .quad   needsStackRealignment
51; CHECK-NEXT:   .quad   -1
52; CHECK-NEXT:   .quad   1
53
54; Num LargeConstants
55; CHECK-NEXT:   .quad   4294967295
56; CHECK-NEXT:   .quad   4294967296
57
58; Constant arguments
59;
60; CHECK-NEXT:   .quad   1
61; CHECK-NEXT:   .word   .L{{.*}}-constantargs
62; CHECK-NEXT:   .half   0
63; CHECK-NEXT:   .half   4
64; SmallConstant
65; CHECK-NEXT:   .byte   4
66; CHECK-NEXT:   .byte   0
67; CHECK-NEXT:   .half   8
68; CHECK-NEXT:   .half   0
69; CHECK-NEXT:   .half   0
70; CHECK-NEXT:   .word   65535
71; SmallConstant
72; CHECK-NEXT:   .byte   4
73; CHECK-NEXT:   .byte   0
74; CHECK-NEXT:   .half   8
75; CHECK-NEXT:   .half   0
76; CHECK-NEXT:   .half   0
77; CHECK-NEXT:   .word   65536
78; SmallConstant
79; CHECK-NEXT:   .byte   5
80; CHECK-NEXT:   .byte   0
81; CHECK-NEXT:   .half   8
82; CHECK-NEXT:   .half   0
83; CHECK-NEXT:   .half   0
84; CHECK-NEXT:   .word   0
85; LargeConstant at index 0
86; CHECK-NEXT:   .byte   5
87; CHECK-NEXT:   .byte   0
88; CHECK-NEXT:   .half   8
89; CHECK-NEXT:   .half   0
90; CHECK-NEXT:   .half   0
91; CHECK-NEXT:   .word   1
92
93define void @constantargs() {
94entry:
95  %0 = inttoptr i64 244837814094590 to ptr
96  tail call void (i64, i32, ptr, i32, ...) @llvm.experimental.patchpoint.void(i64 1, i32 28, ptr %0, i32 0, i64 65535, i64 65536, i64 4294967295, i64 4294967296)
97  ret void
98}
99
100; Inline OSR Exit
101;
102; CHECK:        .word   .L{{.*}}-osrinline
103; CHECK-NEXT:   .half   0
104; CHECK-NEXT:   .half   2
105; CHECK-NEXT:   .byte   1
106; CHECK-NEXT:   .byte   0
107; CHECK-NEXT:   .half   8
108; CHECK-NEXT:   .half   {{[0-9]+}}
109; CHECK-NEXT:   .half   0
110; CHECK-NEXT:   .word   0
111; CHECK-NEXT:   .byte   1
112; CHECK-NEXT:   .byte   0
113; CHECK-NEXT:   .half   8
114; CHECK-NEXT:   .half   {{[0-9]+}}
115; CHECK-NEXT:   .half   0
116; CHECK-NEXT:   .word   0
117define void @osrinline(i64 %a, i64 %b) {
118entry:
119  ; Runtime void->void call.
120  call void inttoptr (i64 244837814094590 to ptr)()
121  ; Followed by inline OSR patchpoint with 12-byte shadow and 2 live vars.
122  call void (i64, i32, ...) @llvm.experimental.stackmap(i64 3, i32 12, i64 %a, i64 %b)
123  ret void
124}
125
126; Cold OSR Exit
127;
128; 2 live variables in register.
129;
130; CHECK:        .word   .L{{.*}}-osrcold
131; CHECK-NEXT:   .half   0
132; CHECK-NEXT:   .half   2
133; CHECK-NEXT:   .byte   1
134; CHECK-NEXT:   .byte   0
135; CHECK-NEXT:   .half   8
136; CHECK-NEXT:   .half   {{[0-9]+}}
137; CHECK-NEXT:   .half   0
138; CHECK-NEXT:   .word   0
139; CHECK-NEXT:   .byte   1
140; CHECK-NEXT:   .byte   0
141; CHECK-NEXT:   .half   8
142; CHECK-NEXT:   .half   {{[0-9]+}}
143; CHECK-NEXT:   .half   0
144; CHECK-NEXT:   .word   0
145define void @osrcold(i64 %a, i64 %b) {
146entry:
147  %test = icmp slt i64 %a, %b
148  br i1 %test, label %ret, label %cold
149cold:
150  ; OSR patchpoint with 28-byte nop-slide and 2 live vars.
151  %thunk = inttoptr i64 244837814094590 to ptr
152  call void (i64, i32, ptr, i32, ...) @llvm.experimental.patchpoint.void(i64 4, i32 28, ptr %thunk, i32 0, i64 %a, i64 %b)
153  unreachable
154ret:
155  ret void
156}
157
158; Property Read
159; CHECK-LABEL:  .word   .L{{.*}}-propertyRead
160; CHECK-NEXT:   .half   0
161; CHECK-NEXT:   .half   2
162; CHECK-NEXT:   .byte   1
163; CHECK-NEXT:   .byte   0
164; CHECK-NEXT:   .half   8
165; CHECK-NEXT:   .half   {{[0-9]+}}
166; CHECK-NEXT:   .half   0
167; CHECK-NEXT:   .word   0
168; CHECK-NEXT:   .byte   1
169; CHECK-NEXT:   .byte   0
170; CHECK-NEXT:   .half   8
171; CHECK-NEXT:   .half   {{[0-9]+}}
172; CHECK-NEXT:   .half   0
173; CHECK-NEXT:   .word   0
174define i64 @propertyRead(ptr %obj) {
175entry:
176  %resolveRead = inttoptr i64 244837814094590 to ptr
177  %result = call anyregcc i64 (i64, i32, ptr, i32, ...) @llvm.experimental.patchpoint.i64(i64 5, i32 28, ptr %resolveRead, i32 1, ptr %obj)
178  %add = add i64 %result, 3
179  ret i64 %add
180}
181
182; Property Write
183; CHECK:        .word   .L{{.*}}-propertyWrite
184; CHECK-NEXT:   .half   0
185; CHECK-NEXT:   .half   2
186; CHECK-NEXT:   .byte   1
187; CHECK-NEXT:   .byte   0
188; CHECK-NEXT:   .half   8
189; CHECK-NEXT:   .half   {{[0-9]+}}
190; CHECK-NEXT:   .half   0
191; CHECK-NEXT:   .word   0
192; CHECK-NEXT:   .byte   1
193; CHECK-NEXT:   .byte   0
194; CHECK-NEXT:   .half   8
195; CHECK-NEXT:   .half   {{[0-9]+}}
196; CHECK-NEXT:   .half   0
197; CHECK-NEXT:   .word   0
198define void @propertyWrite(i64 %dummy1, ptr %obj, i64 %dummy2, i64 %a) {
199entry:
200  %resolveWrite = inttoptr i64 244837814094590 to ptr
201  call anyregcc void (i64, i32, ptr, i32, ...) @llvm.experimental.patchpoint.void(i64 6, i32 28, ptr %resolveWrite, i32 2, ptr %obj, i64 %a)
202  ret void
203}
204
205; Void JS Call
206;
207; 2 live variables in registers.
208;
209; CHECK:        .word   .L{{.*}}-jsVoidCall
210; CHECK-NEXT:   .half   0
211; CHECK-NEXT:   .half   2
212; CHECK-NEXT:   .byte   1
213; CHECK-NEXT:   .byte   0
214; CHECK-NEXT:   .half   8
215; CHECK-NEXT:   .half   {{[0-9]+}}
216; CHECK-NEXT:   .half   0
217; CHECK-NEXT:   .word   0
218; CHECK-NEXT:   .byte   1
219; CHECK-NEXT:   .byte   0
220; CHECK-NEXT:   .half   8
221; CHECK-NEXT:   .half   {{[0-9]+}}
222; CHECK-NEXT:   .half   0
223; CHECK-NEXT:   .word   0
224define void @jsVoidCall(i64 %dummy1, ptr %obj, i64 %arg, i64 %l1, i64 %l2) {
225entry:
226  %resolveCall = inttoptr i64 244837814094590 to ptr
227  call void (i64, i32, ptr, i32, ...) @llvm.experimental.patchpoint.void(i64 7, i32 28, ptr %resolveCall, i32 2, ptr %obj, i64 %arg, i64 %l1, i64 %l2)
228  ret void
229}
230
231; i64 JS Call
232;
233; 2 live variables in registers.
234;
235; CHECK:        .word   .L{{.*}}-jsIntCall
236; CHECK-NEXT:   .half   0
237; CHECK-NEXT:   .half   2
238; CHECK-NEXT:   .byte   1
239; CHECK-NEXT:   .byte   0
240; CHECK-NEXT:   .half   8
241; CHECK-NEXT:   .half   {{[0-9]+}}
242; CHECK-NEXT:   .half   0
243; CHECK-NEXT:   .word   0
244; CHECK-NEXT:   .byte   1
245; CHECK-NEXT:   .byte   0
246; CHECK-NEXT:   .half   8
247; CHECK-NEXT:   .half   {{[0-9]+}}
248; CHECK-NEXT:   .half   0
249; CHECK-NEXT:   .word   0
250define i64 @jsIntCall(i64 %dummy1, ptr %obj, i64 %arg, i64 %l1, i64 %l2) {
251entry:
252  %resolveCall = inttoptr i64 244837814094590 to ptr
253  %result = call i64 (i64, i32, ptr, i32, ...) @llvm.experimental.patchpoint.i64(i64 8, i32 28, ptr %resolveCall, i32 2, ptr %obj, i64 %arg, i64 %l1, i64 %l2)
254  %add = add i64 %result, 3
255  ret i64 %add
256}
257
258; Map a constant value.
259;
260; CHECK:        .word   .L{{.*}}-liveConstant
261; CHECK-NEXT:   .half   0
262; 1 location
263; CHECK-NEXT:   .half   1
264; Loc 0: SmallConstant
265; CHECK-NEXT:   .byte   4
266; CHECK-NEXT:   .byte   0
267; CHECK-NEXT:   .half   8
268; CHECK-NEXT:   .half   0
269; CHECK-NEXT:   .half   0
270; CHECK-NEXT:   .word   33
271
272define void @liveConstant() {
273  tail call void (i64, i32, ...) @llvm.experimental.stackmap(i64 15, i32 8, i32 33)
274  ret void
275}
276
277; Spilled stack map values.
278;
279; Verify 28 stack map entries.
280;
281; CHECK-LABEL:  .word   .L{{.*}}-spilledValue
282; CHECK-NEXT:   .half   0
283; CHECK-NEXT:   .half   28
284;
285; Check that at least one is a spilled entry from RBP.
286; Location: Indirect RBP + ...
287; CHECK:        .byte   3
288; CHECK-NEXT:   .byte   0
289; CHECK-NEXT:   .half   8
290; CHECK-NEXT:   .half   2
291; CHECK-NEXT:   .half   0
292; CHECK-NEXT:   .word
293define void @spilledValue(i64 %arg0, i64 %arg1, i64 %arg2, i64 %arg3, i64 %arg4, i64 %l0, i64 %l1, i64 %l2, i64 %l3, i64 %l4, i64 %l5, i64 %l6, i64 %l7, i64 %l8, i64 %l9, i64 %l10, i64 %l11, i64 %l12, i64 %l13, i64 %l14, i64 %l15, i64 %l16, i64 %l17, i64 %l18, i64 %l19, i64 %l20, i64 %l21, i64 %l22, i64 %l23, i64 %l24, i64 %l25, i64 %l26, i64 %l27) {
294entry:
295  call void (i64, i32, ptr, i32, ...) @llvm.experimental.patchpoint.void(i64 11, i32 28, ptr null, i32 5, i64 %arg0, i64 %arg1, i64 %arg2, i64 %arg3, i64 %arg4, i64 %l0, i64 %l1, i64 %l2, i64 %l3, i64 %l4, i64 %l5, i64 %l6, i64 %l7, i64 %l8, i64 %l9, i64 %l10, i64 %l11, i64 %l12, i64 %l13, i64 %l14, i64 %l15, i64 %l16, i64 %l17, i64 %l18, i64 %l19, i64 %l20, i64 %l21, i64 %l22, i64 %l23, i64 %l24, i64 %l25, i64 %l26, i64 %l27)
296  ret void
297}
298
299; Directly map an alloca's address.
300;
301; Callsite 16
302; CHECK-LABEL:  .word .L{{.*}}-directFrameIdx
303; CHECK-NEXT:   .half   0
304; 1 location
305; CHECK-NEXT:   .half   1
306; Loc 0: Direct RBP - ofs
307; CHECK-NEXT:   .byte   2
308; CHECK-NEXT:   .byte   0
309; CHECK-NEXT:   .half   8
310; CHECK-NEXT:   .half   2
311; CHECK-NEXT:   .half   0
312; CHECK-NEXT:   .word
313
314; Callsite 17
315; CHECK-LABEL:  .word   .L{{.*}}-directFrameIdx
316; CHECK-NEXT:   .half   0
317; 2 locations
318; CHECK-NEXT:   .half   2
319; Loc 0: Direct RBP - ofs
320; CHECK-NEXT:   .byte   2
321; CHECK-NEXT:   .byte   0
322; CHECK-NEXT:   .half   8
323; CHECK-NEXT:   .half   2
324; CHECK-NEXT:   .half   0
325; CHECK-NEXT:   .word
326; Loc 1: Direct RBP - ofs
327; CHECK-NEXT:   .byte   2
328; CHECK-NEXT:   .byte   0
329; CHECK-NEXT:   .half   8
330; CHECK-NEXT:   .half   2
331; CHECK-NEXT:   .half   0
332; CHECK-NEXT:   .word
333define void @directFrameIdx() {
334entry:
335  %metadata1 = alloca i64, i32 3, align 8
336  store i64 11, ptr %metadata1
337  store i64 12, ptr %metadata1
338  store i64 13, ptr %metadata1
339  call void (i64, i32, ...) @llvm.experimental.stackmap(i64 16, i32 0, ptr %metadata1)
340  %metadata2 = alloca i8, i32 4, align 8
341  %metadata3 = alloca i16, i32 4, align 8
342  call void (i64, i32, ptr, i32, ...) @llvm.experimental.patchpoint.void(i64 17, i32 4, ptr null, i32 0, ptr %metadata2, ptr %metadata3)
343  ret void
344}
345
346; Test a 64-bit ID.
347;
348; CHECK:        .quad   4294967295
349; CHECK-LABEL:  .word   .L{{.*}}-longid
350; CHECK:        .quad   4294967296
351; CHECK-LABEL:  .word   .L{{.*}}-longid
352; CHECK:        .quad   9223372036854775807
353; CHECK-LABEL:  .word   .L{{.*}}-longid
354; CHECK:        .quad   -1
355; CHECK-LABEL:  .word   .L{{.*}}-longid
356define void @longid() {
357entry:
358  tail call void (i64, i32, ptr, i32, ...) @llvm.experimental.patchpoint.void(i64 4294967295, i32 0, ptr null, i32 0)
359  tail call void (i64, i32, ptr, i32, ...) @llvm.experimental.patchpoint.void(i64 4294967296, i32 0, ptr null, i32 0)
360  tail call void (i64, i32, ptr, i32, ...) @llvm.experimental.patchpoint.void(i64 9223372036854775807, i32 0, ptr null, i32 0)
361  tail call void (i64, i32, ptr, i32, ...) @llvm.experimental.patchpoint.void(i64 -1, i32 0, ptr null, i32 0)
362  ret void
363}
364
365; A stack frame which needs to be realigned at runtime (to meet alignment
366; criteria for values on the stack) does not have a fixed frame size.
367; CHECK-LABEL:  .word   .L{{.*}}-needsStackRealignment
368; CHECK-NEXT:   .half   0
369; 0 locations
370; CHECK-NEXT:   .half   0
371define void @needsStackRealignment() {
372  %val = alloca i64, i32 3, align 128
373  tail call void (...) @escape_values(ptr %val)
374; Note: Adding any non-constant to the stackmap would fail because we
375; expected to be able to address off the frame pointer.  In a realigned
376; frame, we must use the stack pointer instead.  This is a separate bug.
377  tail call void (i64, i32, ...) @llvm.experimental.stackmap(i64 0, i32 0)
378  ret void
379}
380declare void @escape_values(...)
381
382declare void @llvm.experimental.stackmap(i64, i32, ...)
383declare void @llvm.experimental.patchpoint.void(i64, i32, ptr, i32, ...)
384declare i64 @llvm.experimental.patchpoint.i64(i64, i32, ptr, i32, ...)
385