xref: /llvm-project/llvm/test/CodeGen/RISCV/rv64-patchpoint.ll (revision 97982a8c605fac7c86d02e641a6cd7898b3ca343)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=riscv64 -debug-entry-values -enable-misched=0 < %s | FileCheck %s
3
4; Trivial patchpoint codegen
5;
6define i64 @trivial_patchpoint_codegen(i64 %p1, i64 %p2, i64 %p3, i64 %p4) {
7; CHECK-LABEL: trivial_patchpoint_codegen:
8; CHECK:       # %bb.0: # %entry
9; CHECK-NEXT:    addi sp, sp, -16
10; CHECK-NEXT:    .cfi_def_cfa_offset 16
11; CHECK-NEXT:    sd s0, 8(sp) # 8-byte Folded Spill
12; CHECK-NEXT:    sd s1, 0(sp) # 8-byte Folded Spill
13; CHECK-NEXT:    .cfi_offset s0, -8
14; CHECK-NEXT:    .cfi_offset s1, -16
15; CHECK-NEXT:    mv s0, a0
16; CHECK-NEXT:  .Ltmp0:
17; CHECK-NEXT:    lui ra, 3563
18; CHECK-NEXT:    addiw ra, ra, -577
19; CHECK-NEXT:    slli ra, ra, 12
20; CHECK-NEXT:    addi ra, ra, -259
21; CHECK-NEXT:    slli ra, ra, 12
22; CHECK-NEXT:    addi ra, ra, -1282
23; CHECK-NEXT:    jalr ra
24; CHECK-NEXT:    mv s1, a0
25; CHECK-NEXT:    mv a0, s0
26; CHECK-NEXT:    mv a1, s1
27; CHECK-NEXT:  .Ltmp1:
28; CHECK-NEXT:    lui ra, 3563
29; CHECK-NEXT:    addiw ra, ra, -577
30; CHECK-NEXT:    slli ra, ra, 12
31; CHECK-NEXT:    addi ra, ra, -259
32; CHECK-NEXT:    slli ra, ra, 12
33; CHECK-NEXT:    addi ra, ra, -1281
34; CHECK-NEXT:    jalr ra
35; CHECK-NEXT:    mv a0, s1
36; CHECK-NEXT:    ld s0, 8(sp) # 8-byte Folded Reload
37; CHECK-NEXT:    ld s1, 0(sp) # 8-byte Folded Reload
38; CHECK-NEXT:    .cfi_restore s0
39; CHECK-NEXT:    .cfi_restore s1
40; CHECK-NEXT:    addi sp, sp, 16
41; CHECK-NEXT:    .cfi_def_cfa_offset 0
42; CHECK-NEXT:    ret
43entry:
44  %resolveCall2 = inttoptr i64 244837814094590 to i8*
45  %result = tail call i64 (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.i64(i64 2, i32 28, i8* %resolveCall2, i32 4, i64 %p1, i64 %p2, i64 %p3, i64 %p4)
46  %resolveCall3 = inttoptr i64 244837814094591 to i8*
47  tail call void (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.void(i64 3, i32 28, i8* %resolveCall3, i32 2, i64 %p1, i64 %result)
48  ret i64 %result
49}
50
51; Test small patchpoints that don't emit calls.
52define void @small_patchpoint_codegen(i64 %p1, i64 %p2, i64 %p3, i64 %p4) {
53; CHECK-LABEL: small_patchpoint_codegen:
54; CHECK:       # %bb.0: # %entry
55; CHECK-NEXT:  .Ltmp2:
56; CHECK-NEXT:    nop
57; CHECK-NEXT:    nop
58; CHECK-NEXT:    nop
59; CHECK-NEXT:    nop
60; CHECK-NEXT:    nop
61; CHECK-NEXT:    ret
62entry:
63  %result = tail call i64 (i64, i32, ptr, i32, ...) @llvm.experimental.patchpoint.i64(i64 5, i32 20, ptr null, i32 2, i64 %p1, i64 %p2)
64  ret void
65}
66
67declare void @llvm.experimental.stackmap(i64, i32, ...)
68declare void @llvm.experimental.patchpoint.void(i64, i32, ptr, i32, ...)
69declare i64 @llvm.experimental.patchpoint.i64(i64, i32, ptr, i32, ...)
70