xref: /llvm-project/llvm/test/CodeGen/RISCV/riscv-codegenprepare-asm.ll (revision 9122c5235ec85ce0c0ad337e862b006e7b349d84)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=riscv64 | FileCheck %s
3
4
5; Make sure we don't emit a pair of shift for the zext in the preheader. We
6; can tell that bit 31 is 0 in the preheader and rely on %n already being
7; sign extended without adding zeros explicitly.
8define void @test1(ptr nocapture noundef %a, i32 noundef signext %n) {
9; CHECK-LABEL: test1:
10; CHECK:       # %bb.0: # %entry
11; CHECK-NEXT:    blez a1, .LBB0_3
12; CHECK-NEXT:  # %bb.1: # %for.body.preheader
13; CHECK-NEXT:    slli a1, a1, 2
14; CHECK-NEXT:    add a1, a0, a1
15; CHECK-NEXT:  .LBB0_2: # %for.body
16; CHECK-NEXT:    # =>This Inner Loop Header: Depth=1
17; CHECK-NEXT:    lw a2, 0(a0)
18; CHECK-NEXT:    addi a2, a2, 4
19; CHECK-NEXT:    sw a2, 0(a0)
20; CHECK-NEXT:    addi a0, a0, 4
21; CHECK-NEXT:    bne a0, a1, .LBB0_2
22; CHECK-NEXT:  .LBB0_3: # %for.cond.cleanup
23; CHECK-NEXT:    ret
24entry:
25  %cmp3 = icmp sgt i32 %n, 0
26  br i1 %cmp3, label %for.body.preheader, label %for.cond.cleanup
27
28for.body.preheader:                               ; preds = %entry
29  %wide.trip.count = zext nneg i32 %n to i64
30  br label %for.body
31
32for.cond.cleanup:                                 ; preds = %for.body, %entry
33  ret void
34
35for.body:                                         ; preds = %for.body.preheader, %for.body
36  %indvars.iv = phi i64 [ 0, %for.body.preheader ], [ %indvars.iv.next, %for.body ]
37  %arrayidx = getelementptr inbounds i32, ptr %a, i64 %indvars.iv
38  %0 = load i32, ptr %arrayidx, align 4
39  %add = add nsw i32 %0, 4
40  store i32 %add, ptr %arrayidx, align 4
41  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
42  %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count
43  br i1 %exitcond.not, label %for.cond.cleanup, label %for.body
44}
45
46; Make sure we convert the 4294967294 in for.body.preheader.new to -2 based on
47; the upper 33 bits being zero by the dominating condition %cmp3.
48define void @test2(ptr nocapture noundef %a, i32 noundef signext %n) {
49; CHECK-LABEL: test2:
50; CHECK:       # %bb.0: # %entry
51; CHECK-NEXT:    blez a1, .LBB1_7
52; CHECK-NEXT:  # %bb.1: # %for.body.preheader
53; CHECK-NEXT:    li a3, 1
54; CHECK-NEXT:    andi a2, a1, 1
55; CHECK-NEXT:    bne a1, a3, .LBB1_3
56; CHECK-NEXT:  # %bb.2:
57; CHECK-NEXT:    li a3, 0
58; CHECK-NEXT:    j .LBB1_5
59; CHECK-NEXT:  .LBB1_3: # %for.body.preheader.new
60; CHECK-NEXT:    li a3, 0
61; CHECK-NEXT:    andi a1, a1, -2
62; CHECK-NEXT:    addi a4, a0, 4
63; CHECK-NEXT:  .LBB1_4: # %for.body
64; CHECK-NEXT:    # =>This Inner Loop Header: Depth=1
65; CHECK-NEXT:    lw a5, -4(a4)
66; CHECK-NEXT:    lw a6, 0(a4)
67; CHECK-NEXT:    addi a3, a3, 2
68; CHECK-NEXT:    addi a5, a5, 4
69; CHECK-NEXT:    addi a6, a6, 4
70; CHECK-NEXT:    sw a5, -4(a4)
71; CHECK-NEXT:    sw a6, 0(a4)
72; CHECK-NEXT:    addi a4, a4, 8
73; CHECK-NEXT:    bne a1, a3, .LBB1_4
74; CHECK-NEXT:  .LBB1_5: # %for.cond.cleanup.loopexit.unr-lcssa
75; CHECK-NEXT:    beqz a2, .LBB1_7
76; CHECK-NEXT:  # %bb.6: # %for.body.epil
77; CHECK-NEXT:    slli a3, a3, 2
78; CHECK-NEXT:    add a0, a0, a3
79; CHECK-NEXT:    lw a1, 0(a0)
80; CHECK-NEXT:    addi a1, a1, 4
81; CHECK-NEXT:    sw a1, 0(a0)
82; CHECK-NEXT:  .LBB1_7: # %for.cond.cleanup
83; CHECK-NEXT:    ret
84entry:
85  %cmp3 = icmp sgt i32 %n, 0
86  br i1 %cmp3, label %for.body.preheader, label %for.cond.cleanup
87
88for.body.preheader:                               ; preds = %entry
89  %wide.trip.count = zext nneg i32 %n to i64
90  %xtraiter = and i64 %wide.trip.count, 1
91  %0 = icmp eq i32 %n, 1
92  br i1 %0, label %for.cond.cleanup.loopexit.unr-lcssa, label %for.body.preheader.new
93
94for.body.preheader.new:                           ; preds = %for.body.preheader
95  %unroll_iter = and i64 %wide.trip.count, 4294967294
96  br label %for.body
97
98for.cond.cleanup.loopexit.unr-lcssa:              ; preds = %for.body, %for.body.preheader
99  %indvars.iv.unr = phi i64 [ 0, %for.body.preheader ], [ %indvars.iv.next.1, %for.body ]
100  %lcmp.mod.not = icmp eq i64 %xtraiter, 0
101  br i1 %lcmp.mod.not, label %for.cond.cleanup, label %for.body.epil
102
103for.body.epil:                                    ; preds = %for.cond.cleanup.loopexit.unr-lcssa
104  %arrayidx.epil = getelementptr inbounds i32, ptr %a, i64 %indvars.iv.unr
105  %1 = load i32, ptr %arrayidx.epil, align 4
106  %add.epil = add nsw i32 %1, 4
107  store i32 %add.epil, ptr %arrayidx.epil, align 4
108  br label %for.cond.cleanup
109
110for.cond.cleanup:                                 ; preds = %for.body.epil, %for.cond.cleanup.loopexit.unr-lcssa, %entry
111  ret void
112
113for.body:                                         ; preds = %for.body, %for.body.preheader.new
114  %indvars.iv = phi i64 [ 0, %for.body.preheader.new ], [ %indvars.iv.next.1, %for.body ]
115  %niter = phi i64 [ 0, %for.body.preheader.new ], [ %niter.next.1, %for.body ]
116  %arrayidx = getelementptr inbounds i32, ptr %a, i64 %indvars.iv
117  %2 = load i32, ptr %arrayidx, align 4
118  %add = add nsw i32 %2, 4
119  store i32 %add, ptr %arrayidx, align 4
120  %indvars.iv.next = or disjoint i64 %indvars.iv, 1
121  %arrayidx.1 = getelementptr inbounds i32, ptr %a, i64 %indvars.iv.next
122  %3 = load i32, ptr %arrayidx.1, align 4
123  %add.1 = add nsw i32 %3, 4
124  store i32 %add.1, ptr %arrayidx.1, align 4
125  %indvars.iv.next.1 = add nuw nsw i64 %indvars.iv, 2
126  %niter.next.1 = add i64 %niter, 2
127  %niter.ncmp.1 = icmp eq i64 %niter.next.1, %unroll_iter
128  br i1 %niter.ncmp.1, label %for.cond.cleanup.loopexit.unr-lcssa, label %for.body
129}
130