1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4 2; RUN: llc < %s -mtriple=riscv64 -mattr=+v | FileCheck %s 3 4 5define signext i32 @sum(ptr %a, i32 signext %n, i1 %prof.min.iters.check, <vscale x 8 x i1> %0, <vscale x 8 x i1> %1) { 6; CHECK-LABEL: sum: 7; CHECK: # %bb.0: # %entry 8; CHECK-NEXT: andi a2, a2, 1 9; CHECK-NEXT: beqz a2, .LBB0_4 10; CHECK-NEXT: # %bb.1: # %for.body.preheader 11; CHECK-NEXT: li a3, 0 12; CHECK-NEXT: .LBB0_2: # %for.body 13; CHECK-NEXT: # =>This Inner Loop Header: Depth=1 14; CHECK-NEXT: mv a2, a3 15; CHECK-NEXT: lw a3, 0(a0) 16; CHECK-NEXT: addi a0, a0, 4 17; CHECK-NEXT: bnez a1, .LBB0_2 18; CHECK-NEXT: # %bb.3: # %for.end 19; CHECK-NEXT: mv a0, a2 20; CHECK-NEXT: ret 21; CHECK-NEXT: .LBB0_4: # %vector.ph 22; CHECK-NEXT: vsetivli zero, 1, e32, m1, ta, ma 23; CHECK-NEXT: vmv.s.x v8, zero 24; CHECK-NEXT: vmv.v.i v12, 0 25; CHECK-NEXT: vsetivli zero, 1, e32, m4, ta, ma 26; CHECK-NEXT: vredsum.vs v8, v12, v8, v0.t 27; CHECK-NEXT: vmv.x.s a0, v8 28; CHECK-NEXT: ret 29entry: 30 br i1 %prof.min.iters.check, label %for.body, label %vector.ph 31 32vector.ph: ; preds = %entry 33 %2 = tail call i32 @llvm.vp.reduce.add.nxv8i32(i32 0, <vscale x 8 x i32> zeroinitializer, <vscale x 8 x i1> %0, i32 1) 34 br label %for.end 35 36for.body: ; preds = %for.body, %entry 37 %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ] 38 %red.05 = phi i32 [ %3, %for.body ], [ 0, %entry ] 39 %arrayidx = getelementptr i32, ptr %a, i64 %indvars.iv 40 %3 = load i32, ptr %arrayidx, align 4 41 %indvars.iv.next = add i64 %indvars.iv, 1 42 %exitcond.not = icmp eq i32 %n, 0 43 br i1 %exitcond.not, label %for.end, label %for.body 44 45for.end: ; preds = %for.body, %vector.ph 46 %red.0.lcssa = phi i32 [ %2, %vector.ph ], [ %red.05, %for.body ] 47 ret i32 %red.0.lcssa 48} 49 50declare i32 @llvm.vp.reduce.add.nxv8i32(i32, <vscale x 8 x i32>, <vscale x 8 x i1>, i32) 51