xref: /llvm-project/llvm/test/CodeGen/RISCV/prefer-w-inst.ll (revision dbaa1893c9afe6a245860efb8d68875ba4fd6794) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=riscv64 -mattr=+m -verify-machineinstrs < %s \
3; RUN:   | FileCheck -check-prefixes=NO-PREFER-W-INST %s
4; RUN: llc -mtriple=riscv64 -mattr=+m -riscv-disable-strip-w-suffix -verify-machineinstrs < %s \
5; RUN:   | FileCheck -check-prefixes=NO-STRIP %s
6; RUN: llc -mtriple=riscv64 -mattr=+m,+prefer-w-inst -verify-machineinstrs < %s \
7; RUN:   | FileCheck -check-prefixes=PREFER-W-INST %s
8
9define i32 @addiw(i32 %a) {
10; NO-PREFER-W-INST-LABEL: addiw:
11; NO-PREFER-W-INST:       # %bb.0:
12; NO-PREFER-W-INST-NEXT:    lui a1, 1
13; NO-PREFER-W-INST-NEXT:    addi a1, a1, -1
14; NO-PREFER-W-INST-NEXT:    addw a0, a0, a1
15; NO-PREFER-W-INST-NEXT:    ret
16;
17; NO-STRIP-LABEL: addiw:
18; NO-STRIP:       # %bb.0:
19; NO-STRIP-NEXT:    lui a1, 1
20; NO-STRIP-NEXT:    addiw a1, a1, -1
21; NO-STRIP-NEXT:    addw a0, a0, a1
22; NO-STRIP-NEXT:    ret
23;
24; PREFER-W-INST-LABEL: addiw:
25; PREFER-W-INST:       # %bb.0:
26; PREFER-W-INST-NEXT:    lui a1, 1
27; PREFER-W-INST-NEXT:    addiw a1, a1, -1
28; PREFER-W-INST-NEXT:    addw a0, a0, a1
29; PREFER-W-INST-NEXT:    ret
30  %ret = add i32 %a, 4095
31  ret i32 %ret
32}
33
34define i32 @addw(i32 %a, i32 %b) {
35; NO-PREFER-W-INST-LABEL: addw:
36; NO-PREFER-W-INST:       # %bb.0:
37; NO-PREFER-W-INST-NEXT:    add a0, a0, a1
38; NO-PREFER-W-INST-NEXT:    addiw a0, a0, 1024
39; NO-PREFER-W-INST-NEXT:    ret
40;
41; NO-STRIP-LABEL: addw:
42; NO-STRIP:       # %bb.0:
43; NO-STRIP-NEXT:    addw a0, a0, a1
44; NO-STRIP-NEXT:    addiw a0, a0, 1024
45; NO-STRIP-NEXT:    ret
46;
47; PREFER-W-INST-LABEL: addw:
48; PREFER-W-INST:       # %bb.0:
49; PREFER-W-INST-NEXT:    addw a0, a0, a1
50; PREFER-W-INST-NEXT:    addiw a0, a0, 1024
51; PREFER-W-INST-NEXT:    ret
52  %add = add i32 %a, %b
53  %ret = add i32 %add, 1024
54  ret i32 %ret
55}
56
57define i32 @mulw(i32 %a, i32 %b) {
58; NO-PREFER-W-INST-LABEL: mulw:
59; NO-PREFER-W-INST:       # %bb.0:
60; NO-PREFER-W-INST-NEXT:    mul a1, a0, a1
61; NO-PREFER-W-INST-NEXT:    mul a0, a0, a1
62; NO-PREFER-W-INST-NEXT:    addiw a0, a0, 1024
63; NO-PREFER-W-INST-NEXT:    ret
64;
65; NO-STRIP-LABEL: mulw:
66; NO-STRIP:       # %bb.0:
67; NO-STRIP-NEXT:    mulw a1, a0, a1
68; NO-STRIP-NEXT:    mulw a0, a0, a1
69; NO-STRIP-NEXT:    addiw a0, a0, 1024
70; NO-STRIP-NEXT:    ret
71;
72; PREFER-W-INST-LABEL: mulw:
73; PREFER-W-INST:       # %bb.0:
74; PREFER-W-INST-NEXT:    mulw a1, a0, a1
75; PREFER-W-INST-NEXT:    mulw a0, a0, a1
76; PREFER-W-INST-NEXT:    addiw a0, a0, 1024
77; PREFER-W-INST-NEXT:    ret
78  %mul1 = mul i32 %a, %b
79  %mul = mul i32 %a, %mul1
80  %ret = add i32 %mul, 1024
81  ret i32 %ret
82}
83
84define i32 @slliw(i32 %a) {
85; NO-PREFER-W-INST-LABEL: slliw:
86; NO-PREFER-W-INST:       # %bb.0:
87; NO-PREFER-W-INST-NEXT:    slli a0, a0, 1
88; NO-PREFER-W-INST-NEXT:    addiw a0, a0, 1024
89; NO-PREFER-W-INST-NEXT:    ret
90;
91; NO-STRIP-LABEL: slliw:
92; NO-STRIP:       # %bb.0:
93; NO-STRIP-NEXT:    slliw a0, a0, 1
94; NO-STRIP-NEXT:    addiw a0, a0, 1024
95; NO-STRIP-NEXT:    ret
96;
97; PREFER-W-INST-LABEL: slliw:
98; PREFER-W-INST:       # %bb.0:
99; PREFER-W-INST-NEXT:    slliw a0, a0, 1
100; PREFER-W-INST-NEXT:    addiw a0, a0, 1024
101; PREFER-W-INST-NEXT:    ret
102  %shl = shl i32 %a, 1
103  %ret = add i32 %shl, 1024
104  ret i32 %ret
105}
106