1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=riscv64 -mattr=+m | FileCheck %s 3 4define i32 @f(i1 %0, i32 %1, ptr %2) { 5; CHECK-LABEL: f: 6; CHECK: # %bb.0: # %BB 7; CHECK-NEXT: slli a0, a0, 63 8; CHECK-NEXT: lui a3, 4097 9; CHECK-NEXT: srai a0, a0, 63 10; CHECK-NEXT: addiw a3, a3, -2047 11; CHECK-NEXT: or a0, a0, a3 12; CHECK-NEXT: mul a1, a1, a3 13; CHECK-NEXT: sw a1, 0(a2) 14; CHECK-NEXT: ret 15BB: 16 %I = select i1 %0, i32 -1, i32 0 17 %I1 = mul i32 %1, 16779265 18 %I2 = or i32 16779265, %I 19 store i32 %I1, ptr %2 20 ret i32 %I2 21} 22 23define i32 @g(i1 %0, i32 %1, ptr %2) { 24; CHECK-LABEL: g: 25; CHECK: # %bb.0: # %BB 26; CHECK-NEXT: andi a0, a0, 1 27; CHECK-NEXT: lui a3, 4097 28; CHECK-NEXT: addi a0, a0, -1 29; CHECK-NEXT: addiw a3, a3, -2047 30; CHECK-NEXT: or a0, a0, a3 31; CHECK-NEXT: mul a1, a1, a3 32; CHECK-NEXT: sw a1, 0(a2) 33; CHECK-NEXT: ret 34BB: 35 %I = select i1 %0, i32 0, i32 -1 36 %I1 = mul i32 %1, 16779265 37 %I2 = or i32 16779265, %I 38 store i32 %I1, ptr %2 39 ret i32 %I2 40} 41 42define i32 @h(i1 %0, i32 %1, ptr %2) { 43; CHECK-LABEL: h: 44; CHECK: # %bb.0: # %BB 45; CHECK-NEXT: lui a3, 4097 46; CHECK-NEXT: slli a0, a0, 63 47; CHECK-NEXT: addiw a3, a3, -2047 48; CHECK-NEXT: srai a0, a0, 63 49; CHECK-NEXT: mul a1, a1, a3 50; CHECK-NEXT: and a0, a0, a3 51; CHECK-NEXT: sw a1, 0(a2) 52; CHECK-NEXT: ret 53BB: 54 %I = select i1 %0, i32 -1, i32 0 55 %I1 = mul i32 %1, 16779265 56 %I2 = and i32 16779265, %I 57 store i32 %I1, ptr %2 58 ret i32 %I2 59} 60 61define i32 @i(i1 %0, i32 %1, ptr %2) { 62; CHECK-LABEL: i: 63; CHECK: # %bb.0: # %BB 64; CHECK-NEXT: andi a0, a0, 1 65; CHECK-NEXT: lui a3, 4097 66; CHECK-NEXT: addiw a3, a3, -2047 67; CHECK-NEXT: addi a0, a0, -1 68; CHECK-NEXT: mul a1, a1, a3 69; CHECK-NEXT: and a0, a0, a3 70; CHECK-NEXT: sw a1, 0(a2) 71; CHECK-NEXT: ret 72BB: 73 %I = select i1 %0, i32 0, i32 -1 74 %I1 = mul i32 %1, 16779265 75 %I2 = and i32 16779265, %I 76 store i32 %I1, ptr %2 77 ret i32 %I2 78} 79