xref: /llvm-project/llvm/test/CodeGen/RISCV/module-target-abi2.ll (revision 227496dc09cf46df233aad041d6dc6113822e4bb)
1; RUN: llc -mtriple=riscv32 < %s 2>&1 \
2; RUN:   | FileCheck -check-prefix=DEFAULT %s
3; RUN: not --crash llc -mtriple=riscv32 -target-abi ilp32 < %s 2>&1 \
4; RUN:   | FileCheck -check-prefix=RV32IF-ILP32 %s
5; RUN: llc -mtriple=riscv32 -target-abi ilp32f < %s 2>&1 \
6; RUN:   | FileCheck -check-prefix=RV32IF-ILP32F %s
7; RUN: llc -mtriple=riscv32 -filetype=obj < %s | llvm-readelf -h - | FileCheck -check-prefixes=FLAGS %s
8
9; RV32IF-ILP32: -target-abi option != target-abi module flag
10
11; FLAGS: Flags: 0x2, single-float ABI
12
13define float @foo(i32 %a) nounwind #0 {
14; DEFAULT: # %bb.0:
15; DEFAULT-NEXT: fcvt.s.w fa0, a0
16; DEFAULT-NEXT: ret
17; RV32IF-ILP32F: # %bb.0:
18; RV32IF-ILP32F: fcvt.s.w fa0, a0
19; RV32IF-ILP32F: ret
20  %conv = sitofp i32 %a to float
21  ret float %conv
22}
23
24attributes #0 = { "target-features"="+f"}
25!llvm.module.flags = !{!0}
26!0 = !{i32 1, !"target-abi", !"ilp32f"}
27