1# RUN: llc -mtriple=riscv32 -x mir -run-pass=machine-outliner -simplify-mir -verify-machineinstrs < %s \ 2# RUN: | FileCheck -check-prefix=RV32I-MO %s 3# RUN: llc -mtriple=riscv64 -x mir -run-pass=machine-outliner -simplify-mir -verify-machineinstrs < %s \ 4# RUN: | FileCheck -check-prefix=RV64I-MO %s 5 6--- | 7 ; Cannot outline instructions with jump-table index operands 8 define i32 @foo(i32 %a, i32 %b) #0 { ret i32 0 } 9 10... 11--- 12name: foo 13tracksRegLiveness: true 14jumpTable: 15 kind: block-address 16 entries: 17 - id: 0 18 blocks: [ '%bb.0', '%bb.1', '%bb.2', '%bb.3' ] 19body: | 20 bb.0: 21 liveins: $x10, $x11 22 ; RV32I-MO-LABEL: name: foo 23 ; RV32I-MO: $x5 = PseudoCALLReg {{.*}} @OUTLINED_FUNCTION_0 24 ; RV32I-MO: $x12 = LUI target-flags(riscv-hi) %jump-table.0 25 ; RV32I-MO: $x12 = ADDI $x12, target-flags(riscv-lo) %jump-table.0 26 ; 27 ; RV64I-MO-LABEL: name: foo 28 ; RV64I-MO: $x5 = PseudoCALLReg {{.*}} @OUTLINED_FUNCTION_0 29 ; RV64I-MO: $x12 = LUI target-flags(riscv-hi) %jump-table.0 30 ; RV64I-MO: $x12 = ADDI $x12, target-flags(riscv-lo) %jump-table.0 31 32 $x11 = ORI $x11, 1023 33 $x12 = ADDI $x10, 17 34 $x11 = AND $x12, $x11 35 $x10 = SUB $x10, $x11 36 $x12 = LUI target-flags(riscv-hi) %jump-table.0 37 $x12 = ADDI $x12, target-flags(riscv-lo) %jump-table.0 38 PseudoBR %bb.3 39 40 bb.1: 41 liveins: $x10, $x11 42 43 $x11 = ORI $x11, 1023 44 $x12 = ADDI $x10, 17 45 $x11 = AND $x12, $x11 46 $x10 = SUB $x10, $x11 47 $x12 = LUI target-flags(riscv-hi) %jump-table.0 48 $x12 = ADDI $x12, target-flags(riscv-lo) %jump-table.0 49 PseudoBR %bb.3 50 51 bb.2: 52 liveins: $x10, $x11 53 54 $x11 = ORI $x11, 1023 55 $x12 = ADDI $x10, 17 56 $x11 = AND $x12, $x11 57 $x10 = SUB $x10, $x11 58 $x12 = LUI target-flags(riscv-hi) %jump-table.0 59 $x12 = ADDI $x12, target-flags(riscv-lo) %jump-table.0 60 PseudoBR %bb.3 61 62 bb.3: 63 PseudoRET 64 65... 66