1; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2; RUN: llc -mtriple=riscv64 -mattr=+d -verify-machineinstrs -mcpu=sifive-u74 \ 3; RUN: -O1 -riscv-enable-machine-combiner=true \ 4; RUN: -stop-after machine-combiner < %s | FileCheck %s 5 6define double @test_reassoc_fadd1(double %a0, double %a1, double %a2, double %a3) { 7 ; CHECK-LABEL: name: test_reassoc_fadd1 8 ; CHECK: bb.0 (%ir-block.0): 9 ; CHECK-NEXT: liveins: $f10_d, $f11_d, $f12_d, $f13_d 10 ; CHECK-NEXT: {{ $}} 11 ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr64 = COPY $f13_d 12 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr64 = COPY $f12_d 13 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:fpr64 = COPY $f11_d 14 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:fpr64 = COPY $f10_d 15 ; CHECK-NEXT: [[FADD_D:%[0-9]+]]:fpr64 = nsz reassoc nofpexcept FADD_D [[COPY3]], [[COPY2]], 7, implicit $frm 16 ; CHECK-NEXT: [[FADD_D1:%[0-9]+]]:fpr64 = nsz reassoc nofpexcept FADD_D [[COPY1]], [[COPY]], 7, implicit $frm 17 ; CHECK-NEXT: [[FADD_D2:%[0-9]+]]:fpr64 = nsz reassoc nofpexcept FADD_D killed [[FADD_D]], killed [[FADD_D1]], 7, implicit $frm 18 ; CHECK-NEXT: $f10_d = COPY [[FADD_D2]] 19 ; CHECK-NEXT: PseudoRET implicit $f10_d 20 %t0 = fadd nsz reassoc double %a0, %a1 21 %t1 = fadd nsz reassoc double %t0, %a2 22 %t2 = fadd nsz reassoc double %t1, %a3 23 ret double %t2 24} 25 26define double @test_reassoc_fmul1(double %a0, double %a1, double %a2, double %a3) { 27 ; CHECK-LABEL: name: test_reassoc_fmul1 28 ; CHECK: bb.0 (%ir-block.0): 29 ; CHECK-NEXT: liveins: $f10_d, $f11_d, $f12_d, $f13_d 30 ; CHECK-NEXT: {{ $}} 31 ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr64 = COPY $f13_d 32 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr64 = COPY $f12_d 33 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:fpr64 = COPY $f11_d 34 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:fpr64 = COPY $f10_d 35 ; CHECK-NEXT: [[FMUL_D:%[0-9]+]]:fpr64 = nsz reassoc nofpexcept FMUL_D [[COPY3]], [[COPY2]], 7, implicit $frm 36 ; CHECK-NEXT: [[FMUL_D1:%[0-9]+]]:fpr64 = nsz reassoc nofpexcept FMUL_D [[COPY1]], [[COPY]], 7, implicit $frm 37 ; CHECK-NEXT: [[FMUL_D2:%[0-9]+]]:fpr64 = nsz reassoc nofpexcept FMUL_D killed [[FMUL_D]], killed [[FMUL_D1]], 7, implicit $frm 38 ; CHECK-NEXT: $f10_d = COPY [[FMUL_D2]] 39 ; CHECK-NEXT: PseudoRET implicit $f10_d 40 %t0 = fmul nsz reassoc double %a0, %a1 41 %t1 = fmul nsz reassoc double %t0, %a2 42 %t2 = fmul nsz reassoc double %t1, %a3 43 ret double %t2 44} 45 46; Verify flags intersection 47define double @test_reassoc_flags1(double %a0, double %a1, double %a2, double %a3) { 48 ; CHECK-LABEL: name: test_reassoc_flags1 49 ; CHECK: bb.0 (%ir-block.0): 50 ; CHECK-NEXT: liveins: $f10_d, $f11_d, $f12_d, $f13_d 51 ; CHECK-NEXT: {{ $}} 52 ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr64 = COPY $f13_d 53 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr64 = COPY $f12_d 54 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:fpr64 = COPY $f11_d 55 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:fpr64 = COPY $f10_d 56 ; CHECK-NEXT: [[FADD_D:%[0-9]+]]:fpr64 = nsz reassoc nofpexcept FADD_D [[COPY3]], [[COPY2]], 7, implicit $frm 57 ; CHECK-NEXT: [[FADD_D1:%[0-9]+]]:fpr64 = nsz reassoc nofpexcept FADD_D [[COPY1]], [[COPY]], 7, implicit $frm 58 ; CHECK-NEXT: [[FADD_D2:%[0-9]+]]:fpr64 = nsz reassoc nofpexcept FADD_D killed [[FADD_D]], killed [[FADD_D1]], 7, implicit $frm 59 ; CHECK-NEXT: $f10_d = COPY [[FADD_D2]] 60 ; CHECK-NEXT: PseudoRET implicit $f10_d 61 %t0 = fadd nsz reassoc double %a0, %a1 62 %t1 = fadd contract nsz reassoc double %t0, %a2 63 %t2 = fadd nsz reassoc double %t1, %a3 64 ret double %t2 65} 66 67; Verify flags intersection 68define double @test_reassoc_flags2(double %a0, double %a1, double %a2, double %a3) { 69 ; CHECK-LABEL: name: test_reassoc_flags2 70 ; CHECK: bb.0 (%ir-block.0): 71 ; CHECK-NEXT: liveins: $f10_d, $f11_d, $f12_d, $f13_d 72 ; CHECK-NEXT: {{ $}} 73 ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr64 = COPY $f13_d 74 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr64 = COPY $f12_d 75 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:fpr64 = COPY $f11_d 76 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:fpr64 = COPY $f10_d 77 ; CHECK-NEXT: [[FADD_D:%[0-9]+]]:fpr64 = nsz reassoc nofpexcept FADD_D [[COPY3]], [[COPY2]], 7, implicit $frm 78 ; CHECK-NEXT: [[FADD_D1:%[0-9]+]]:fpr64 = nsz contract reassoc nofpexcept FADD_D [[COPY1]], [[COPY]], 7, implicit $frm 79 ; CHECK-NEXT: [[FADD_D2:%[0-9]+]]:fpr64 = nsz contract reassoc nofpexcept FADD_D killed [[FADD_D]], killed [[FADD_D1]], 7, implicit $frm 80 ; CHECK-NEXT: $f10_d = COPY [[FADD_D2]] 81 ; CHECK-NEXT: PseudoRET implicit $f10_d 82 %t0 = fadd nsz reassoc double %a0, %a1 83 %t1 = fadd contract nsz reassoc double %t0, %a2 84 %t2 = fadd contract nsz reassoc double %t1, %a3 85 ret double %t2 86} 87 88; Verify FRM 89define double @test_fmadd(double %a0, double %a1, double %a2) { 90 ; CHECK-LABEL: name: test_fmadd 91 ; CHECK: bb.0 (%ir-block.0): 92 ; CHECK-NEXT: liveins: $f10_d, $f11_d, $f12_d 93 ; CHECK-NEXT: {{ $}} 94 ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr64 = COPY $f12_d 95 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr64 = COPY $f11_d 96 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:fpr64 = COPY $f10_d 97 ; CHECK-NEXT: [[FMUL_D:%[0-9]+]]:fpr64 = contract nofpexcept FMUL_D [[COPY2]], [[COPY1]], 7, implicit $frm 98 ; CHECK-NEXT: [[FMADD_D:%[0-9]+]]:fpr64 = contract nofpexcept FMADD_D [[COPY2]], [[COPY1]], [[COPY]], 7, implicit $frm 99 ; CHECK-NEXT: [[FDIV_D:%[0-9]+]]:fpr64 = nofpexcept FDIV_D killed [[FMADD_D]], [[FMUL_D]], 7, implicit $frm 100 ; CHECK-NEXT: $f10_d = COPY [[FDIV_D]] 101 ; CHECK-NEXT: PseudoRET implicit $f10_d 102 %t0 = fmul contract double %a0, %a1 103 %t1 = fadd contract double %t0, %a2 104 %t2 = fdiv double %t1, %t0 105 ret double %t2 106} 107