xref: /llvm-project/llvm/test/CodeGen/RISCV/inline-asm-zfinx-constraint-r.ll (revision 1bc1a79a65a93a0224b5e5f69584219f9981bd23)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
2; RUN: llc -mtriple=riscv32 -mattr=+zfinx -target-abi=ilp32 -verify-machineinstrs < %s \
3; RUN:   | FileCheck -check-prefix=RV32FINX %s
4; RUN: llc -mtriple=riscv64 -mattr=+zfinx -target-abi=lp64 -verify-machineinstrs < %s \
5; RUN:   | FileCheck -check-prefix=RV64FINX %s
6
7@gf = external global float
8
9define float @constraint_r_float(float %a) nounwind {
10; RV32FINX-LABEL: constraint_r_float:
11; RV32FINX:       # %bb.0:
12; RV32FINX-NEXT:    lui a1, %hi(gf)
13; RV32FINX-NEXT:    lw a1, %lo(gf)(a1)
14; RV32FINX-NEXT:    #APP
15; RV32FINX-NEXT:    fadd.s a0, a0, a1
16; RV32FINX-NEXT:    #NO_APP
17; RV32FINX-NEXT:    ret
18;
19; RV64FINX-LABEL: constraint_r_float:
20; RV64FINX:       # %bb.0:
21; RV64FINX-NEXT:    lui a1, %hi(gf)
22; RV64FINX-NEXT:    lw a1, %lo(gf)(a1)
23; RV64FINX-NEXT:    #APP
24; RV64FINX-NEXT:    fadd.s a0, a0, a1
25; RV64FINX-NEXT:    #NO_APP
26; RV64FINX-NEXT:    ret
27  %1 = load float, ptr @gf
28  %2 = tail call float asm "fadd.s $0, $1, $2", "=r,r,r"(float %a, float %1)
29  ret float %2
30}
31
32define float @constraint_cr_float(float %a) nounwind {
33; RV32FINX-LABEL: constraint_cr_float:
34; RV32FINX:       # %bb.0:
35; RV32FINX-NEXT:    lui a1, %hi(gf)
36; RV32FINX-NEXT:    lw a1, %lo(gf)(a1)
37; RV32FINX-NEXT:    #APP
38; RV32FINX-NEXT:    fadd.s a0, a0, a1
39; RV32FINX-NEXT:    #NO_APP
40; RV32FINX-NEXT:    ret
41;
42; RV64FINX-LABEL: constraint_cr_float:
43; RV64FINX:       # %bb.0:
44; RV64FINX-NEXT:    lui a1, %hi(gf)
45; RV64FINX-NEXT:    lw a1, %lo(gf)(a1)
46; RV64FINX-NEXT:    #APP
47; RV64FINX-NEXT:    fadd.s a0, a0, a1
48; RV64FINX-NEXT:    #NO_APP
49; RV64FINX-NEXT:    ret
50  %1 = load float, ptr @gf
51  %2 = tail call float asm "fadd.s $0, $1, $2", "=^cr,cr,cr"(float %a, float %1)
52  ret float %2
53}
54
55define float @constraint_float_abi_name(float %a) nounwind {
56; RV32FINX-LABEL: constraint_float_abi_name:
57; RV32FINX:       # %bb.0:
58; RV32FINX-NEXT:    addi sp, sp, -16
59; RV32FINX-NEXT:    sw s0, 12(sp) # 4-byte Folded Spill
60; RV32FINX-NEXT:    lui a1, %hi(gf)
61; RV32FINX-NEXT:    lw s0, %lo(gf)(a1)
62; RV32FINX-NEXT:    # kill: def $x10_w killed $x10_w def $x10
63; RV32FINX-NEXT:    #APP
64; RV32FINX-NEXT:    fadd.s t0, a0, s0
65; RV32FINX-NEXT:    #NO_APP
66; RV32FINX-NEXT:    mv a0, t0
67; RV32FINX-NEXT:    lw s0, 12(sp) # 4-byte Folded Reload
68; RV32FINX-NEXT:    addi sp, sp, 16
69; RV32FINX-NEXT:    ret
70;
71; RV64FINX-LABEL: constraint_float_abi_name:
72; RV64FINX:       # %bb.0:
73; RV64FINX-NEXT:    addi sp, sp, -16
74; RV64FINX-NEXT:    sd s0, 8(sp) # 8-byte Folded Spill
75; RV64FINX-NEXT:    lui a1, %hi(gf)
76; RV64FINX-NEXT:    lw s0, %lo(gf)(a1)
77; RV64FINX-NEXT:    # kill: def $x10_w killed $x10_w def $x10
78; RV64FINX-NEXT:    #APP
79; RV64FINX-NEXT:    fadd.s t0, a0, s0
80; RV64FINX-NEXT:    #NO_APP
81; RV64FINX-NEXT:    mv a0, t0
82; RV64FINX-NEXT:    ld s0, 8(sp) # 8-byte Folded Reload
83; RV64FINX-NEXT:    addi sp, sp, 16
84; RV64FINX-NEXT:    ret
85  %1 = load float, ptr @gf
86  %2 = tail call float asm "fadd.s $0, $1, $2", "={t0},{a0},{s0}"(float %a, float %1)
87  ret float %2
88}
89
90define float @constraint_f_float(float %a) nounwind {
91; RV32FINX-LABEL: constraint_f_float:
92; RV32FINX:       # %bb.0:
93; RV32FINX-NEXT:    lui a1, %hi(gf)
94; RV32FINX-NEXT:    lw a1, %lo(gf)(a1)
95; RV32FINX-NEXT:    #APP
96; RV32FINX-NEXT:    fadd.s a0, a0, a1
97; RV32FINX-NEXT:    #NO_APP
98; RV32FINX-NEXT:    ret
99;
100; RV64FINX-LABEL: constraint_f_float:
101; RV64FINX:       # %bb.0:
102; RV64FINX-NEXT:    lui a1, %hi(gf)
103; RV64FINX-NEXT:    lw a1, %lo(gf)(a1)
104; RV64FINX-NEXT:    #APP
105; RV64FINX-NEXT:    fadd.s a0, a0, a1
106; RV64FINX-NEXT:    #NO_APP
107; RV64FINX-NEXT:    ret
108  %1 = load float, ptr @gf
109  %2 = tail call float asm "fadd.s $0, $1, $2", "=f,f,f"(float %a, float %1)
110  ret float %2
111}
112
113define float @constraint_cf_float(float %a) nounwind {
114; RV32FINX-LABEL: constraint_cf_float:
115; RV32FINX:       # %bb.0:
116; RV32FINX-NEXT:    lui a1, %hi(gf)
117; RV32FINX-NEXT:    lw a1, %lo(gf)(a1)
118; RV32FINX-NEXT:    #APP
119; RV32FINX-NEXT:    fadd.s a0, a0, a1
120; RV32FINX-NEXT:    #NO_APP
121; RV32FINX-NEXT:    ret
122;
123; RV64FINX-LABEL: constraint_cf_float:
124; RV64FINX:       # %bb.0:
125; RV64FINX-NEXT:    lui a1, %hi(gf)
126; RV64FINX-NEXT:    lw a1, %lo(gf)(a1)
127; RV64FINX-NEXT:    #APP
128; RV64FINX-NEXT:    fadd.s a0, a0, a1
129; RV64FINX-NEXT:    #NO_APP
130; RV64FINX-NEXT:    ret
131  %1 = load float, ptr @gf
132  %2 = tail call float asm "fadd.s $0, $1, $2", "=^cf,cf,cf"(float %a, float %1)
133  ret float %2
134}
135