1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=riscv32 -verify-machineinstrs -no-integrated-as < %s \ 3; RUN: | FileCheck -check-prefixes=RV32I %s 4; RUN: llc -mtriple=riscv64 -verify-machineinstrs -no-integrated-as < %s \ 5; RUN: | FileCheck -check-prefixes=RV64I %s 6; RUN: llc -mtriple=riscv32 -code-model=medium -verify-machineinstrs -no-integrated-as < %s \ 7; RUN: | FileCheck -check-prefixes=RV32I-MEDIUM %s 8; RUN: llc -mtriple=riscv64 -code-model=medium -verify-machineinstrs -no-integrated-as < %s \ 9; RUN: | FileCheck -check-prefixes=RV64I-MEDIUM %s 10; 11; integrated-as fails with error: unexpected token 12; sw zero, %lo(eg)(a0) \n sw zero, %lo(eg)(a0) 13; ^ 14 15@eg = external global [4000 x i32], align 4 16@ewg = extern_weak global [4000 x i32], align 4 17 18define void @constraint_o_with_multi_operands() nounwind { 19; RV32I-LABEL: constraint_o_with_multi_operands: 20; RV32I: # %bb.0: 21; RV32I-NEXT: lui a0, %hi(eg) 22; RV32I-NEXT: #APP 23; RV32I-NEXT: sw zero, %lo(eg)(a0) \n sw zero, %lo(eg)(a0) 24; RV32I-NEXT: #NO_APP 25; RV32I-NEXT: ret 26; 27; RV64I-LABEL: constraint_o_with_multi_operands: 28; RV64I: # %bb.0: 29; RV64I-NEXT: lui a0, %hi(eg) 30; RV64I-NEXT: #APP 31; RV64I-NEXT: sw zero, %lo(eg)(a0) \n sw zero, %lo(eg)(a0) 32; RV64I-NEXT: #NO_APP 33; RV64I-NEXT: ret 34; 35; RV32I-MEDIUM-LABEL: constraint_o_with_multi_operands: 36; RV32I-MEDIUM: # %bb.0: 37; RV32I-MEDIUM-NEXT: .Lpcrel_hi0: 38; RV32I-MEDIUM-NEXT: auipc a0, %pcrel_hi(eg) 39; RV32I-MEDIUM-NEXT: #APP 40; RV32I-MEDIUM-NEXT: sw zero, %pcrel_lo(.Lpcrel_hi0)(a0) \n sw zero, %pcrel_lo(.Lpcrel_hi0)(a0) 41; RV32I-MEDIUM-NEXT: #NO_APP 42; RV32I-MEDIUM-NEXT: ret 43; 44; RV64I-MEDIUM-LABEL: constraint_o_with_multi_operands: 45; RV64I-MEDIUM: # %bb.0: 46; RV64I-MEDIUM-NEXT: .Lpcrel_hi0: 47; RV64I-MEDIUM-NEXT: auipc a0, %pcrel_hi(eg) 48; RV64I-MEDIUM-NEXT: #APP 49; RV64I-MEDIUM-NEXT: sw zero, %pcrel_lo(.Lpcrel_hi0)(a0) \n sw zero, %pcrel_lo(.Lpcrel_hi0)(a0) 50; RV64I-MEDIUM-NEXT: #NO_APP 51; RV64I-MEDIUM-NEXT: ret 52 call void asm "sw zero, $0 \n sw zero, $1", "=*o,=*o"(ptr elementtype(i32) @eg, ptr elementtype(i32) @eg) 53 ret void 54} 55 56define void @constraint_A_with_multi_operands() nounwind { 57; RV32I-LABEL: constraint_A_with_multi_operands: 58; RV32I: # %bb.0: 59; RV32I-NEXT: lui a0, %hi(eg) 60; RV32I-NEXT: addi a0, a0, %lo(eg) 61; RV32I-NEXT: #APP 62; RV32I-NEXT: sw zero, 0(a0) \n sw zero, 0(a0) 63; RV32I-NEXT: #NO_APP 64; RV32I-NEXT: ret 65; 66; RV64I-LABEL: constraint_A_with_multi_operands: 67; RV64I: # %bb.0: 68; RV64I-NEXT: lui a0, %hi(eg) 69; RV64I-NEXT: addi a0, a0, %lo(eg) 70; RV64I-NEXT: #APP 71; RV64I-NEXT: sw zero, 0(a0) \n sw zero, 0(a0) 72; RV64I-NEXT: #NO_APP 73; RV64I-NEXT: ret 74; 75; RV32I-MEDIUM-LABEL: constraint_A_with_multi_operands: 76; RV32I-MEDIUM: # %bb.0: 77; RV32I-MEDIUM-NEXT: .Lpcrel_hi1: 78; RV32I-MEDIUM-NEXT: auipc a0, %pcrel_hi(eg) 79; RV32I-MEDIUM-NEXT: addi a0, a0, %pcrel_lo(.Lpcrel_hi1) 80; RV32I-MEDIUM-NEXT: #APP 81; RV32I-MEDIUM-NEXT: sw zero, 0(a0) \n sw zero, 0(a0) 82; RV32I-MEDIUM-NEXT: #NO_APP 83; RV32I-MEDIUM-NEXT: ret 84; 85; RV64I-MEDIUM-LABEL: constraint_A_with_multi_operands: 86; RV64I-MEDIUM: # %bb.0: 87; RV64I-MEDIUM-NEXT: .Lpcrel_hi1: 88; RV64I-MEDIUM-NEXT: auipc a0, %pcrel_hi(eg) 89; RV64I-MEDIUM-NEXT: addi a0, a0, %pcrel_lo(.Lpcrel_hi1) 90; RV64I-MEDIUM-NEXT: #APP 91; RV64I-MEDIUM-NEXT: sw zero, 0(a0) \n sw zero, 0(a0) 92; RV64I-MEDIUM-NEXT: #NO_APP 93; RV64I-MEDIUM-NEXT: ret 94 call void asm "sw zero, $0 \n sw zero, $1", "=*A,=*A"(ptr elementtype(i32) @eg, ptr elementtype(i32) @eg) 95 ret void 96} 97