1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=riscv32 -riscv-disable-using-constant-pool-for-large-ints -verify-machineinstrs < %s \ 3; RUN: | FileCheck %s -check-prefix=RV32I 4; RUN: llc -mtriple=riscv64 -riscv-disable-using-constant-pool-for-large-ints -verify-machineinstrs < %s \ 5; RUN: | FileCheck %s -check-prefixes=RV64I,RV64-NOPOOL 6; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s \ 7; RUN: | FileCheck %s -check-prefixes=RV64I,RV64I-POOL 8; RUN: llc -mtriple=riscv64 -riscv-disable-using-constant-pool-for-large-ints -mattr=+zba \ 9; RUN: -verify-machineinstrs < %s | FileCheck %s -check-prefix=RV64IZBA 10; RUN: llc -mtriple=riscv64 -riscv-disable-using-constant-pool-for-large-ints -mattr=+zbb \ 11; RUN: -verify-machineinstrs < %s | FileCheck %s -check-prefix=RV64IZBB 12; RUN: llc -mtriple=riscv64 -riscv-disable-using-constant-pool-for-large-ints -mattr=+zbs \ 13; RUN: -verify-machineinstrs < %s | FileCheck %s -check-prefix=RV64IZBS 14; RUN: llc -mtriple=riscv64 -riscv-disable-using-constant-pool-for-large-ints -mattr=+xtheadbb \ 15; RUN: -verify-machineinstrs < %s | FileCheck %s -check-prefix=RV64IXTHEADBB 16 17; RUN: llc -mtriple=riscv32 -riscv-disable-using-constant-pool-for-large-ints -verify-machineinstrs < %s \ 18; RUN: -riscv-use-rematerializable-movimm | FileCheck %s -check-prefix=RV32-REMAT 19; RUN: llc -mtriple=riscv64 -riscv-disable-using-constant-pool-for-large-ints -verify-machineinstrs < %s \ 20; RUN: -riscv-use-rematerializable-movimm | FileCheck %s -check-prefix=RV64-REMAT 21 22; Materializing constants 23 24; TODO: It would be preferable if anyext constant returns were sign rather 25; than zero extended. See PR39092. For now, mark returns as explicitly signext 26; (this matches what Clang would generate for equivalent C/C++ anyway). 27 28define signext i32 @zero() nounwind { 29; RV32I-LABEL: zero: 30; RV32I: # %bb.0: 31; RV32I-NEXT: li a0, 0 32; RV32I-NEXT: ret 33; 34; RV64I-LABEL: zero: 35; RV64I: # %bb.0: 36; RV64I-NEXT: li a0, 0 37; RV64I-NEXT: ret 38; 39; RV64IZBA-LABEL: zero: 40; RV64IZBA: # %bb.0: 41; RV64IZBA-NEXT: li a0, 0 42; RV64IZBA-NEXT: ret 43; 44; RV64IZBB-LABEL: zero: 45; RV64IZBB: # %bb.0: 46; RV64IZBB-NEXT: li a0, 0 47; RV64IZBB-NEXT: ret 48; 49; RV64IZBS-LABEL: zero: 50; RV64IZBS: # %bb.0: 51; RV64IZBS-NEXT: li a0, 0 52; RV64IZBS-NEXT: ret 53; 54; RV64IXTHEADBB-LABEL: zero: 55; RV64IXTHEADBB: # %bb.0: 56; RV64IXTHEADBB-NEXT: li a0, 0 57; RV64IXTHEADBB-NEXT: ret 58; 59; RV32-REMAT-LABEL: zero: 60; RV32-REMAT: # %bb.0: 61; RV32-REMAT-NEXT: li a0, 0 62; RV32-REMAT-NEXT: ret 63; 64; RV64-REMAT-LABEL: zero: 65; RV64-REMAT: # %bb.0: 66; RV64-REMAT-NEXT: li a0, 0 67; RV64-REMAT-NEXT: ret 68 ret i32 0 69} 70 71define signext i32 @pos_small() nounwind { 72; RV32I-LABEL: pos_small: 73; RV32I: # %bb.0: 74; RV32I-NEXT: li a0, 2047 75; RV32I-NEXT: ret 76; 77; RV64I-LABEL: pos_small: 78; RV64I: # %bb.0: 79; RV64I-NEXT: li a0, 2047 80; RV64I-NEXT: ret 81; 82; RV64IZBA-LABEL: pos_small: 83; RV64IZBA: # %bb.0: 84; RV64IZBA-NEXT: li a0, 2047 85; RV64IZBA-NEXT: ret 86; 87; RV64IZBB-LABEL: pos_small: 88; RV64IZBB: # %bb.0: 89; RV64IZBB-NEXT: li a0, 2047 90; RV64IZBB-NEXT: ret 91; 92; RV64IZBS-LABEL: pos_small: 93; RV64IZBS: # %bb.0: 94; RV64IZBS-NEXT: li a0, 2047 95; RV64IZBS-NEXT: ret 96; 97; RV64IXTHEADBB-LABEL: pos_small: 98; RV64IXTHEADBB: # %bb.0: 99; RV64IXTHEADBB-NEXT: li a0, 2047 100; RV64IXTHEADBB-NEXT: ret 101; 102; RV32-REMAT-LABEL: pos_small: 103; RV32-REMAT: # %bb.0: 104; RV32-REMAT-NEXT: li a0, 2047 105; RV32-REMAT-NEXT: ret 106; 107; RV64-REMAT-LABEL: pos_small: 108; RV64-REMAT: # %bb.0: 109; RV64-REMAT-NEXT: li a0, 2047 110; RV64-REMAT-NEXT: ret 111 ret i32 2047 112} 113 114define signext i32 @neg_small() nounwind { 115; RV32I-LABEL: neg_small: 116; RV32I: # %bb.0: 117; RV32I-NEXT: li a0, -2048 118; RV32I-NEXT: ret 119; 120; RV64I-LABEL: neg_small: 121; RV64I: # %bb.0: 122; RV64I-NEXT: li a0, -2048 123; RV64I-NEXT: ret 124; 125; RV64IZBA-LABEL: neg_small: 126; RV64IZBA: # %bb.0: 127; RV64IZBA-NEXT: li a0, -2048 128; RV64IZBA-NEXT: ret 129; 130; RV64IZBB-LABEL: neg_small: 131; RV64IZBB: # %bb.0: 132; RV64IZBB-NEXT: li a0, -2048 133; RV64IZBB-NEXT: ret 134; 135; RV64IZBS-LABEL: neg_small: 136; RV64IZBS: # %bb.0: 137; RV64IZBS-NEXT: li a0, -2048 138; RV64IZBS-NEXT: ret 139; 140; RV64IXTHEADBB-LABEL: neg_small: 141; RV64IXTHEADBB: # %bb.0: 142; RV64IXTHEADBB-NEXT: li a0, -2048 143; RV64IXTHEADBB-NEXT: ret 144; 145; RV32-REMAT-LABEL: neg_small: 146; RV32-REMAT: # %bb.0: 147; RV32-REMAT-NEXT: li a0, -2048 148; RV32-REMAT-NEXT: ret 149; 150; RV64-REMAT-LABEL: neg_small: 151; RV64-REMAT: # %bb.0: 152; RV64-REMAT-NEXT: li a0, -2048 153; RV64-REMAT-NEXT: ret 154 ret i32 -2048 155} 156 157define signext i32 @pos_i32() nounwind { 158; RV32I-LABEL: pos_i32: 159; RV32I: # %bb.0: 160; RV32I-NEXT: lui a0, 423811 161; RV32I-NEXT: addi a0, a0, -1297 162; RV32I-NEXT: ret 163; 164; RV64I-LABEL: pos_i32: 165; RV64I: # %bb.0: 166; RV64I-NEXT: lui a0, 423811 167; RV64I-NEXT: addiw a0, a0, -1297 168; RV64I-NEXT: ret 169; 170; RV64IZBA-LABEL: pos_i32: 171; RV64IZBA: # %bb.0: 172; RV64IZBA-NEXT: lui a0, 423811 173; RV64IZBA-NEXT: addiw a0, a0, -1297 174; RV64IZBA-NEXT: ret 175; 176; RV64IZBB-LABEL: pos_i32: 177; RV64IZBB: # %bb.0: 178; RV64IZBB-NEXT: lui a0, 423811 179; RV64IZBB-NEXT: addiw a0, a0, -1297 180; RV64IZBB-NEXT: ret 181; 182; RV64IZBS-LABEL: pos_i32: 183; RV64IZBS: # %bb.0: 184; RV64IZBS-NEXT: lui a0, 423811 185; RV64IZBS-NEXT: addiw a0, a0, -1297 186; RV64IZBS-NEXT: ret 187; 188; RV64IXTHEADBB-LABEL: pos_i32: 189; RV64IXTHEADBB: # %bb.0: 190; RV64IXTHEADBB-NEXT: lui a0, 423811 191; RV64IXTHEADBB-NEXT: addiw a0, a0, -1297 192; RV64IXTHEADBB-NEXT: ret 193; 194; RV32-REMAT-LABEL: pos_i32: 195; RV32-REMAT: # %bb.0: 196; RV32-REMAT-NEXT: lui a0, 423811 197; RV32-REMAT-NEXT: addi a0, a0, -1297 198; RV32-REMAT-NEXT: ret 199; 200; RV64-REMAT-LABEL: pos_i32: 201; RV64-REMAT: # %bb.0: 202; RV64-REMAT-NEXT: lui a0, 423811 203; RV64-REMAT-NEXT: addiw a0, a0, -1297 204; RV64-REMAT-NEXT: ret 205 ret i32 1735928559 206} 207 208define signext i32 @neg_i32() nounwind { 209; RV32I-LABEL: neg_i32: 210; RV32I: # %bb.0: 211; RV32I-NEXT: lui a0, 912092 212; RV32I-NEXT: addi a0, a0, -273 213; RV32I-NEXT: ret 214; 215; RV64I-LABEL: neg_i32: 216; RV64I: # %bb.0: 217; RV64I-NEXT: lui a0, 912092 218; RV64I-NEXT: addiw a0, a0, -273 219; RV64I-NEXT: ret 220; 221; RV64IZBA-LABEL: neg_i32: 222; RV64IZBA: # %bb.0: 223; RV64IZBA-NEXT: lui a0, 912092 224; RV64IZBA-NEXT: addiw a0, a0, -273 225; RV64IZBA-NEXT: ret 226; 227; RV64IZBB-LABEL: neg_i32: 228; RV64IZBB: # %bb.0: 229; RV64IZBB-NEXT: lui a0, 912092 230; RV64IZBB-NEXT: addiw a0, a0, -273 231; RV64IZBB-NEXT: ret 232; 233; RV64IZBS-LABEL: neg_i32: 234; RV64IZBS: # %bb.0: 235; RV64IZBS-NEXT: lui a0, 912092 236; RV64IZBS-NEXT: addiw a0, a0, -273 237; RV64IZBS-NEXT: ret 238; 239; RV64IXTHEADBB-LABEL: neg_i32: 240; RV64IXTHEADBB: # %bb.0: 241; RV64IXTHEADBB-NEXT: lui a0, 912092 242; RV64IXTHEADBB-NEXT: addiw a0, a0, -273 243; RV64IXTHEADBB-NEXT: ret 244; 245; RV32-REMAT-LABEL: neg_i32: 246; RV32-REMAT: # %bb.0: 247; RV32-REMAT-NEXT: lui a0, 912092 248; RV32-REMAT-NEXT: addi a0, a0, -273 249; RV32-REMAT-NEXT: ret 250; 251; RV64-REMAT-LABEL: neg_i32: 252; RV64-REMAT: # %bb.0: 253; RV64-REMAT-NEXT: lui a0, 912092 254; RV64-REMAT-NEXT: addiw a0, a0, -273 255; RV64-REMAT-NEXT: ret 256 ret i32 -559038737 257} 258 259define signext i32 @pos_i32_hi20_only() nounwind { 260; RV32I-LABEL: pos_i32_hi20_only: 261; RV32I: # %bb.0: 262; RV32I-NEXT: lui a0, 16 263; RV32I-NEXT: ret 264; 265; RV64I-LABEL: pos_i32_hi20_only: 266; RV64I: # %bb.0: 267; RV64I-NEXT: lui a0, 16 268; RV64I-NEXT: ret 269; 270; RV64IZBA-LABEL: pos_i32_hi20_only: 271; RV64IZBA: # %bb.0: 272; RV64IZBA-NEXT: lui a0, 16 273; RV64IZBA-NEXT: ret 274; 275; RV64IZBB-LABEL: pos_i32_hi20_only: 276; RV64IZBB: # %bb.0: 277; RV64IZBB-NEXT: lui a0, 16 278; RV64IZBB-NEXT: ret 279; 280; RV64IZBS-LABEL: pos_i32_hi20_only: 281; RV64IZBS: # %bb.0: 282; RV64IZBS-NEXT: lui a0, 16 283; RV64IZBS-NEXT: ret 284; 285; RV64IXTHEADBB-LABEL: pos_i32_hi20_only: 286; RV64IXTHEADBB: # %bb.0: 287; RV64IXTHEADBB-NEXT: lui a0, 16 288; RV64IXTHEADBB-NEXT: ret 289; 290; RV32-REMAT-LABEL: pos_i32_hi20_only: 291; RV32-REMAT: # %bb.0: 292; RV32-REMAT-NEXT: lui a0, 16 293; RV32-REMAT-NEXT: ret 294; 295; RV64-REMAT-LABEL: pos_i32_hi20_only: 296; RV64-REMAT: # %bb.0: 297; RV64-REMAT-NEXT: lui a0, 16 298; RV64-REMAT-NEXT: ret 299 ret i32 65536 ; 0x10000 300} 301 302define signext i32 @neg_i32_hi20_only() nounwind { 303; RV32I-LABEL: neg_i32_hi20_only: 304; RV32I: # %bb.0: 305; RV32I-NEXT: lui a0, 1048560 306; RV32I-NEXT: ret 307; 308; RV64I-LABEL: neg_i32_hi20_only: 309; RV64I: # %bb.0: 310; RV64I-NEXT: lui a0, 1048560 311; RV64I-NEXT: ret 312; 313; RV64IZBA-LABEL: neg_i32_hi20_only: 314; RV64IZBA: # %bb.0: 315; RV64IZBA-NEXT: lui a0, 1048560 316; RV64IZBA-NEXT: ret 317; 318; RV64IZBB-LABEL: neg_i32_hi20_only: 319; RV64IZBB: # %bb.0: 320; RV64IZBB-NEXT: lui a0, 1048560 321; RV64IZBB-NEXT: ret 322; 323; RV64IZBS-LABEL: neg_i32_hi20_only: 324; RV64IZBS: # %bb.0: 325; RV64IZBS-NEXT: lui a0, 1048560 326; RV64IZBS-NEXT: ret 327; 328; RV64IXTHEADBB-LABEL: neg_i32_hi20_only: 329; RV64IXTHEADBB: # %bb.0: 330; RV64IXTHEADBB-NEXT: lui a0, 1048560 331; RV64IXTHEADBB-NEXT: ret 332; 333; RV32-REMAT-LABEL: neg_i32_hi20_only: 334; RV32-REMAT: # %bb.0: 335; RV32-REMAT-NEXT: lui a0, 1048560 336; RV32-REMAT-NEXT: ret 337; 338; RV64-REMAT-LABEL: neg_i32_hi20_only: 339; RV64-REMAT: # %bb.0: 340; RV64-REMAT-NEXT: lui a0, 1048560 341; RV64-REMAT-NEXT: ret 342 ret i32 -65536 ; -0x10000 343} 344 345; This can be materialized with ADDI+SLLI, improving compressibility. 346 347define signext i32 @imm_left_shifted_addi() nounwind { 348; RV32I-LABEL: imm_left_shifted_addi: 349; RV32I: # %bb.0: 350; RV32I-NEXT: lui a0, 32 351; RV32I-NEXT: addi a0, a0, -64 352; RV32I-NEXT: ret 353; 354; RV64I-LABEL: imm_left_shifted_addi: 355; RV64I: # %bb.0: 356; RV64I-NEXT: lui a0, 32 357; RV64I-NEXT: addiw a0, a0, -64 358; RV64I-NEXT: ret 359; 360; RV64IZBA-LABEL: imm_left_shifted_addi: 361; RV64IZBA: # %bb.0: 362; RV64IZBA-NEXT: lui a0, 32 363; RV64IZBA-NEXT: addiw a0, a0, -64 364; RV64IZBA-NEXT: ret 365; 366; RV64IZBB-LABEL: imm_left_shifted_addi: 367; RV64IZBB: # %bb.0: 368; RV64IZBB-NEXT: lui a0, 32 369; RV64IZBB-NEXT: addiw a0, a0, -64 370; RV64IZBB-NEXT: ret 371; 372; RV64IZBS-LABEL: imm_left_shifted_addi: 373; RV64IZBS: # %bb.0: 374; RV64IZBS-NEXT: lui a0, 32 375; RV64IZBS-NEXT: addiw a0, a0, -64 376; RV64IZBS-NEXT: ret 377; 378; RV64IXTHEADBB-LABEL: imm_left_shifted_addi: 379; RV64IXTHEADBB: # %bb.0: 380; RV64IXTHEADBB-NEXT: lui a0, 32 381; RV64IXTHEADBB-NEXT: addiw a0, a0, -64 382; RV64IXTHEADBB-NEXT: ret 383; 384; RV32-REMAT-LABEL: imm_left_shifted_addi: 385; RV32-REMAT: # %bb.0: 386; RV32-REMAT-NEXT: lui a0, 32 387; RV32-REMAT-NEXT: addi a0, a0, -64 388; RV32-REMAT-NEXT: ret 389; 390; RV64-REMAT-LABEL: imm_left_shifted_addi: 391; RV64-REMAT: # %bb.0: 392; RV64-REMAT-NEXT: lui a0, 32 393; RV64-REMAT-NEXT: addiw a0, a0, -64 394; RV64-REMAT-NEXT: ret 395 ret i32 131008 ; 0x1FFC0 396} 397 398; This can be materialized with ADDI+SRLI, improving compressibility. 399 400define signext i32 @imm_right_shifted_addi() nounwind { 401; RV32I-LABEL: imm_right_shifted_addi: 402; RV32I: # %bb.0: 403; RV32I-NEXT: lui a0, 524288 404; RV32I-NEXT: addi a0, a0, -1 405; RV32I-NEXT: ret 406; 407; RV64I-LABEL: imm_right_shifted_addi: 408; RV64I: # %bb.0: 409; RV64I-NEXT: lui a0, 524288 410; RV64I-NEXT: addiw a0, a0, -1 411; RV64I-NEXT: ret 412; 413; RV64IZBA-LABEL: imm_right_shifted_addi: 414; RV64IZBA: # %bb.0: 415; RV64IZBA-NEXT: lui a0, 524288 416; RV64IZBA-NEXT: addiw a0, a0, -1 417; RV64IZBA-NEXT: ret 418; 419; RV64IZBB-LABEL: imm_right_shifted_addi: 420; RV64IZBB: # %bb.0: 421; RV64IZBB-NEXT: lui a0, 524288 422; RV64IZBB-NEXT: addiw a0, a0, -1 423; RV64IZBB-NEXT: ret 424; 425; RV64IZBS-LABEL: imm_right_shifted_addi: 426; RV64IZBS: # %bb.0: 427; RV64IZBS-NEXT: lui a0, 524288 428; RV64IZBS-NEXT: addiw a0, a0, -1 429; RV64IZBS-NEXT: ret 430; 431; RV64IXTHEADBB-LABEL: imm_right_shifted_addi: 432; RV64IXTHEADBB: # %bb.0: 433; RV64IXTHEADBB-NEXT: lui a0, 524288 434; RV64IXTHEADBB-NEXT: addiw a0, a0, -1 435; RV64IXTHEADBB-NEXT: ret 436; 437; RV32-REMAT-LABEL: imm_right_shifted_addi: 438; RV32-REMAT: # %bb.0: 439; RV32-REMAT-NEXT: lui a0, 524288 440; RV32-REMAT-NEXT: addi a0, a0, -1 441; RV32-REMAT-NEXT: ret 442; 443; RV64-REMAT-LABEL: imm_right_shifted_addi: 444; RV64-REMAT: # %bb.0: 445; RV64-REMAT-NEXT: lui a0, 524288 446; RV64-REMAT-NEXT: addiw a0, a0, -1 447; RV64-REMAT-NEXT: ret 448 ret i32 2147483647 ; 0x7FFFFFFF 449} 450 451; This can be materialized with LUI+SRLI, improving compressibility. 452 453define signext i32 @imm_right_shifted_lui() nounwind { 454; RV32I-LABEL: imm_right_shifted_lui: 455; RV32I: # %bb.0: 456; RV32I-NEXT: lui a0, 56 457; RV32I-NEXT: addi a0, a0, 580 458; RV32I-NEXT: ret 459; 460; RV64I-LABEL: imm_right_shifted_lui: 461; RV64I: # %bb.0: 462; RV64I-NEXT: lui a0, 56 463; RV64I-NEXT: addiw a0, a0, 580 464; RV64I-NEXT: ret 465; 466; RV64IZBA-LABEL: imm_right_shifted_lui: 467; RV64IZBA: # %bb.0: 468; RV64IZBA-NEXT: lui a0, 56 469; RV64IZBA-NEXT: addiw a0, a0, 580 470; RV64IZBA-NEXT: ret 471; 472; RV64IZBB-LABEL: imm_right_shifted_lui: 473; RV64IZBB: # %bb.0: 474; RV64IZBB-NEXT: lui a0, 56 475; RV64IZBB-NEXT: addiw a0, a0, 580 476; RV64IZBB-NEXT: ret 477; 478; RV64IZBS-LABEL: imm_right_shifted_lui: 479; RV64IZBS: # %bb.0: 480; RV64IZBS-NEXT: lui a0, 56 481; RV64IZBS-NEXT: addiw a0, a0, 580 482; RV64IZBS-NEXT: ret 483; 484; RV64IXTHEADBB-LABEL: imm_right_shifted_lui: 485; RV64IXTHEADBB: # %bb.0: 486; RV64IXTHEADBB-NEXT: lui a0, 56 487; RV64IXTHEADBB-NEXT: addiw a0, a0, 580 488; RV64IXTHEADBB-NEXT: ret 489; 490; RV32-REMAT-LABEL: imm_right_shifted_lui: 491; RV32-REMAT: # %bb.0: 492; RV32-REMAT-NEXT: lui a0, 56 493; RV32-REMAT-NEXT: addi a0, a0, 580 494; RV32-REMAT-NEXT: ret 495; 496; RV64-REMAT-LABEL: imm_right_shifted_lui: 497; RV64-REMAT: # %bb.0: 498; RV64-REMAT-NEXT: lui a0, 56 499; RV64-REMAT-NEXT: addiw a0, a0, 580 500; RV64-REMAT-NEXT: ret 501 ret i32 229956 ; 0x38244 502} 503 504define i64 @imm64_1() nounwind { 505; RV32I-LABEL: imm64_1: 506; RV32I: # %bb.0: 507; RV32I-NEXT: lui a0, 524288 508; RV32I-NEXT: li a1, 0 509; RV32I-NEXT: ret 510; 511; RV64I-LABEL: imm64_1: 512; RV64I: # %bb.0: 513; RV64I-NEXT: li a0, 1 514; RV64I-NEXT: slli a0, a0, 31 515; RV64I-NEXT: ret 516; 517; RV64IZBA-LABEL: imm64_1: 518; RV64IZBA: # %bb.0: 519; RV64IZBA-NEXT: li a0, 1 520; RV64IZBA-NEXT: slli a0, a0, 31 521; RV64IZBA-NEXT: ret 522; 523; RV64IZBB-LABEL: imm64_1: 524; RV64IZBB: # %bb.0: 525; RV64IZBB-NEXT: li a0, 1 526; RV64IZBB-NEXT: slli a0, a0, 31 527; RV64IZBB-NEXT: ret 528; 529; RV64IZBS-LABEL: imm64_1: 530; RV64IZBS: # %bb.0: 531; RV64IZBS-NEXT: bseti a0, zero, 31 532; RV64IZBS-NEXT: ret 533; 534; RV64IXTHEADBB-LABEL: imm64_1: 535; RV64IXTHEADBB: # %bb.0: 536; RV64IXTHEADBB-NEXT: li a0, 1 537; RV64IXTHEADBB-NEXT: slli a0, a0, 31 538; RV64IXTHEADBB-NEXT: ret 539; 540; RV32-REMAT-LABEL: imm64_1: 541; RV32-REMAT: # %bb.0: 542; RV32-REMAT-NEXT: lui a0, 524288 543; RV32-REMAT-NEXT: li a1, 0 544; RV32-REMAT-NEXT: ret 545; 546; RV64-REMAT-LABEL: imm64_1: 547; RV64-REMAT: # %bb.0: 548; RV64-REMAT-NEXT: li a0, 1 549; RV64-REMAT-NEXT: slli a0, a0, 31 550; RV64-REMAT-NEXT: ret 551 ret i64 2147483648 ; 0x8000_0000 552} 553 554define i64 @imm64_2() nounwind { 555; RV32I-LABEL: imm64_2: 556; RV32I: # %bb.0: 557; RV32I-NEXT: li a0, -1 558; RV32I-NEXT: li a1, 0 559; RV32I-NEXT: ret 560; 561; RV64I-LABEL: imm64_2: 562; RV64I: # %bb.0: 563; RV64I-NEXT: li a0, -1 564; RV64I-NEXT: srli a0, a0, 32 565; RV64I-NEXT: ret 566; 567; RV64IZBA-LABEL: imm64_2: 568; RV64IZBA: # %bb.0: 569; RV64IZBA-NEXT: li a0, -1 570; RV64IZBA-NEXT: srli a0, a0, 32 571; RV64IZBA-NEXT: ret 572; 573; RV64IZBB-LABEL: imm64_2: 574; RV64IZBB: # %bb.0: 575; RV64IZBB-NEXT: li a0, -1 576; RV64IZBB-NEXT: srli a0, a0, 32 577; RV64IZBB-NEXT: ret 578; 579; RV64IZBS-LABEL: imm64_2: 580; RV64IZBS: # %bb.0: 581; RV64IZBS-NEXT: li a0, -1 582; RV64IZBS-NEXT: srli a0, a0, 32 583; RV64IZBS-NEXT: ret 584; 585; RV64IXTHEADBB-LABEL: imm64_2: 586; RV64IXTHEADBB: # %bb.0: 587; RV64IXTHEADBB-NEXT: li a0, -1 588; RV64IXTHEADBB-NEXT: srli a0, a0, 32 589; RV64IXTHEADBB-NEXT: ret 590; 591; RV32-REMAT-LABEL: imm64_2: 592; RV32-REMAT: # %bb.0: 593; RV32-REMAT-NEXT: li a0, -1 594; RV32-REMAT-NEXT: li a1, 0 595; RV32-REMAT-NEXT: ret 596; 597; RV64-REMAT-LABEL: imm64_2: 598; RV64-REMAT: # %bb.0: 599; RV64-REMAT-NEXT: li a0, -1 600; RV64-REMAT-NEXT: srli a0, a0, 32 601; RV64-REMAT-NEXT: ret 602 ret i64 4294967295 ; 0xFFFF_FFFF 603} 604 605define i64 @imm64_3() nounwind { 606; RV32I-LABEL: imm64_3: 607; RV32I: # %bb.0: 608; RV32I-NEXT: li a1, 1 609; RV32I-NEXT: li a0, 0 610; RV32I-NEXT: ret 611; 612; RV64I-LABEL: imm64_3: 613; RV64I: # %bb.0: 614; RV64I-NEXT: li a0, 1 615; RV64I-NEXT: slli a0, a0, 32 616; RV64I-NEXT: ret 617; 618; RV64IZBA-LABEL: imm64_3: 619; RV64IZBA: # %bb.0: 620; RV64IZBA-NEXT: li a0, 1 621; RV64IZBA-NEXT: slli a0, a0, 32 622; RV64IZBA-NEXT: ret 623; 624; RV64IZBB-LABEL: imm64_3: 625; RV64IZBB: # %bb.0: 626; RV64IZBB-NEXT: li a0, 1 627; RV64IZBB-NEXT: slli a0, a0, 32 628; RV64IZBB-NEXT: ret 629; 630; RV64IZBS-LABEL: imm64_3: 631; RV64IZBS: # %bb.0: 632; RV64IZBS-NEXT: bseti a0, zero, 32 633; RV64IZBS-NEXT: ret 634; 635; RV64IXTHEADBB-LABEL: imm64_3: 636; RV64IXTHEADBB: # %bb.0: 637; RV64IXTHEADBB-NEXT: li a0, 1 638; RV64IXTHEADBB-NEXT: slli a0, a0, 32 639; RV64IXTHEADBB-NEXT: ret 640; 641; RV32-REMAT-LABEL: imm64_3: 642; RV32-REMAT: # %bb.0: 643; RV32-REMAT-NEXT: li a1, 1 644; RV32-REMAT-NEXT: li a0, 0 645; RV32-REMAT-NEXT: ret 646; 647; RV64-REMAT-LABEL: imm64_3: 648; RV64-REMAT: # %bb.0: 649; RV64-REMAT-NEXT: li a0, 1 650; RV64-REMAT-NEXT: slli a0, a0, 32 651; RV64-REMAT-NEXT: ret 652 ret i64 4294967296 ; 0x1_0000_0000 653} 654 655define i64 @imm64_4() nounwind { 656; RV32I-LABEL: imm64_4: 657; RV32I: # %bb.0: 658; RV32I-NEXT: lui a1, 524288 659; RV32I-NEXT: li a0, 0 660; RV32I-NEXT: ret 661; 662; RV64I-LABEL: imm64_4: 663; RV64I: # %bb.0: 664; RV64I-NEXT: li a0, -1 665; RV64I-NEXT: slli a0, a0, 63 666; RV64I-NEXT: ret 667; 668; RV64IZBA-LABEL: imm64_4: 669; RV64IZBA: # %bb.0: 670; RV64IZBA-NEXT: li a0, -1 671; RV64IZBA-NEXT: slli a0, a0, 63 672; RV64IZBA-NEXT: ret 673; 674; RV64IZBB-LABEL: imm64_4: 675; RV64IZBB: # %bb.0: 676; RV64IZBB-NEXT: li a0, -1 677; RV64IZBB-NEXT: slli a0, a0, 63 678; RV64IZBB-NEXT: ret 679; 680; RV64IZBS-LABEL: imm64_4: 681; RV64IZBS: # %bb.0: 682; RV64IZBS-NEXT: bseti a0, zero, 63 683; RV64IZBS-NEXT: ret 684; 685; RV64IXTHEADBB-LABEL: imm64_4: 686; RV64IXTHEADBB: # %bb.0: 687; RV64IXTHEADBB-NEXT: li a0, -1 688; RV64IXTHEADBB-NEXT: slli a0, a0, 63 689; RV64IXTHEADBB-NEXT: ret 690; 691; RV32-REMAT-LABEL: imm64_4: 692; RV32-REMAT: # %bb.0: 693; RV32-REMAT-NEXT: lui a1, 524288 694; RV32-REMAT-NEXT: li a0, 0 695; RV32-REMAT-NEXT: ret 696; 697; RV64-REMAT-LABEL: imm64_4: 698; RV64-REMAT: # %bb.0: 699; RV64-REMAT-NEXT: li a0, -1 700; RV64-REMAT-NEXT: slli a0, a0, 63 701; RV64-REMAT-NEXT: ret 702 ret i64 9223372036854775808 ; 0x8000_0000_0000_0000 703} 704 705define i64 @imm64_5() nounwind { 706; RV32I-LABEL: imm64_5: 707; RV32I: # %bb.0: 708; RV32I-NEXT: lui a1, 524288 709; RV32I-NEXT: li a0, 0 710; RV32I-NEXT: ret 711; 712; RV64I-LABEL: imm64_5: 713; RV64I: # %bb.0: 714; RV64I-NEXT: li a0, -1 715; RV64I-NEXT: slli a0, a0, 63 716; RV64I-NEXT: ret 717; 718; RV64IZBA-LABEL: imm64_5: 719; RV64IZBA: # %bb.0: 720; RV64IZBA-NEXT: li a0, -1 721; RV64IZBA-NEXT: slli a0, a0, 63 722; RV64IZBA-NEXT: ret 723; 724; RV64IZBB-LABEL: imm64_5: 725; RV64IZBB: # %bb.0: 726; RV64IZBB-NEXT: li a0, -1 727; RV64IZBB-NEXT: slli a0, a0, 63 728; RV64IZBB-NEXT: ret 729; 730; RV64IZBS-LABEL: imm64_5: 731; RV64IZBS: # %bb.0: 732; RV64IZBS-NEXT: bseti a0, zero, 63 733; RV64IZBS-NEXT: ret 734; 735; RV64IXTHEADBB-LABEL: imm64_5: 736; RV64IXTHEADBB: # %bb.0: 737; RV64IXTHEADBB-NEXT: li a0, -1 738; RV64IXTHEADBB-NEXT: slli a0, a0, 63 739; RV64IXTHEADBB-NEXT: ret 740; 741; RV32-REMAT-LABEL: imm64_5: 742; RV32-REMAT: # %bb.0: 743; RV32-REMAT-NEXT: lui a1, 524288 744; RV32-REMAT-NEXT: li a0, 0 745; RV32-REMAT-NEXT: ret 746; 747; RV64-REMAT-LABEL: imm64_5: 748; RV64-REMAT: # %bb.0: 749; RV64-REMAT-NEXT: li a0, -1 750; RV64-REMAT-NEXT: slli a0, a0, 63 751; RV64-REMAT-NEXT: ret 752 ret i64 -9223372036854775808 ; 0x8000_0000_0000_0000 753} 754 755define i64 @imm64_6() nounwind { 756; RV32I-LABEL: imm64_6: 757; RV32I: # %bb.0: 758; RV32I-NEXT: lui a0, 74565 759; RV32I-NEXT: addi a1, a0, 1656 760; RV32I-NEXT: li a0, 0 761; RV32I-NEXT: ret 762; 763; RV64I-LABEL: imm64_6: 764; RV64I: # %bb.0: 765; RV64I-NEXT: lui a0, 9321 766; RV64I-NEXT: addi a0, a0, -1329 767; RV64I-NEXT: slli a0, a0, 35 768; RV64I-NEXT: ret 769; 770; RV64IZBA-LABEL: imm64_6: 771; RV64IZBA: # %bb.0: 772; RV64IZBA-NEXT: lui a0, 9321 773; RV64IZBA-NEXT: addi a0, a0, -1329 774; RV64IZBA-NEXT: slli a0, a0, 35 775; RV64IZBA-NEXT: ret 776; 777; RV64IZBB-LABEL: imm64_6: 778; RV64IZBB: # %bb.0: 779; RV64IZBB-NEXT: lui a0, 9321 780; RV64IZBB-NEXT: addi a0, a0, -1329 781; RV64IZBB-NEXT: slli a0, a0, 35 782; RV64IZBB-NEXT: ret 783; 784; RV64IZBS-LABEL: imm64_6: 785; RV64IZBS: # %bb.0: 786; RV64IZBS-NEXT: lui a0, 9321 787; RV64IZBS-NEXT: addi a0, a0, -1329 788; RV64IZBS-NEXT: slli a0, a0, 35 789; RV64IZBS-NEXT: ret 790; 791; RV64IXTHEADBB-LABEL: imm64_6: 792; RV64IXTHEADBB: # %bb.0: 793; RV64IXTHEADBB-NEXT: lui a0, 9321 794; RV64IXTHEADBB-NEXT: addi a0, a0, -1329 795; RV64IXTHEADBB-NEXT: slli a0, a0, 35 796; RV64IXTHEADBB-NEXT: ret 797; 798; RV32-REMAT-LABEL: imm64_6: 799; RV32-REMAT: # %bb.0: 800; RV32-REMAT-NEXT: lui a1, 74565 801; RV32-REMAT-NEXT: addi a1, a1, 1656 802; RV32-REMAT-NEXT: li a0, 0 803; RV32-REMAT-NEXT: ret 804; 805; RV64-REMAT-LABEL: imm64_6: 806; RV64-REMAT: # %bb.0: 807; RV64-REMAT-NEXT: lui a0, 9321 808; RV64-REMAT-NEXT: addi a0, a0, -1329 809; RV64-REMAT-NEXT: slli a0, a0, 35 810; RV64-REMAT-NEXT: ret 811 ret i64 1311768464867721216 ; 0x1234_5678_0000_0000 812} 813 814define i64 @imm64_7() nounwind { 815; RV32I-LABEL: imm64_7: 816; RV32I: # %bb.0: 817; RV32I-NEXT: lui a0, 45056 818; RV32I-NEXT: addi a0, a0, 15 819; RV32I-NEXT: lui a1, 458752 820; RV32I-NEXT: ret 821; 822; RV64I-LABEL: imm64_7: 823; RV64I: # %bb.0: 824; RV64I-NEXT: li a0, 7 825; RV64I-NEXT: slli a0, a0, 36 826; RV64I-NEXT: addi a0, a0, 11 827; RV64I-NEXT: slli a0, a0, 24 828; RV64I-NEXT: addi a0, a0, 15 829; RV64I-NEXT: ret 830; 831; RV64IZBA-LABEL: imm64_7: 832; RV64IZBA: # %bb.0: 833; RV64IZBA-NEXT: li a0, 7 834; RV64IZBA-NEXT: slli a0, a0, 36 835; RV64IZBA-NEXT: addi a0, a0, 11 836; RV64IZBA-NEXT: slli a0, a0, 24 837; RV64IZBA-NEXT: addi a0, a0, 15 838; RV64IZBA-NEXT: ret 839; 840; RV64IZBB-LABEL: imm64_7: 841; RV64IZBB: # %bb.0: 842; RV64IZBB-NEXT: li a0, 7 843; RV64IZBB-NEXT: slli a0, a0, 36 844; RV64IZBB-NEXT: addi a0, a0, 11 845; RV64IZBB-NEXT: slli a0, a0, 24 846; RV64IZBB-NEXT: addi a0, a0, 15 847; RV64IZBB-NEXT: ret 848; 849; RV64IZBS-LABEL: imm64_7: 850; RV64IZBS: # %bb.0: 851; RV64IZBS-NEXT: li a0, 7 852; RV64IZBS-NEXT: slli a0, a0, 36 853; RV64IZBS-NEXT: addi a0, a0, 11 854; RV64IZBS-NEXT: slli a0, a0, 24 855; RV64IZBS-NEXT: addi a0, a0, 15 856; RV64IZBS-NEXT: ret 857; 858; RV64IXTHEADBB-LABEL: imm64_7: 859; RV64IXTHEADBB: # %bb.0: 860; RV64IXTHEADBB-NEXT: li a0, 7 861; RV64IXTHEADBB-NEXT: slli a0, a0, 36 862; RV64IXTHEADBB-NEXT: addi a0, a0, 11 863; RV64IXTHEADBB-NEXT: slli a0, a0, 24 864; RV64IXTHEADBB-NEXT: addi a0, a0, 15 865; RV64IXTHEADBB-NEXT: ret 866; 867; RV32-REMAT-LABEL: imm64_7: 868; RV32-REMAT: # %bb.0: 869; RV32-REMAT-NEXT: lui a0, 45056 870; RV32-REMAT-NEXT: addi a0, a0, 15 871; RV32-REMAT-NEXT: lui a1, 458752 872; RV32-REMAT-NEXT: ret 873; 874; RV64-REMAT-LABEL: imm64_7: 875; RV64-REMAT: # %bb.0: 876; RV64-REMAT-NEXT: li a0, 7 877; RV64-REMAT-NEXT: slli a0, a0, 36 878; RV64-REMAT-NEXT: addi a0, a0, 11 879; RV64-REMAT-NEXT: slli a0, a0, 24 880; RV64-REMAT-NEXT: addi a0, a0, 15 881; RV64-REMAT-NEXT: ret 882 ret i64 8070450532432478223 ; 0x7000_0000_0B00_000F 883} 884 885; TODO: it can be preferable to put constants that are expensive to materialise 886; into the constant pool, especially for -Os. 887define i64 @imm64_8() nounwind { 888; RV32I-LABEL: imm64_8: 889; RV32I: # %bb.0: 890; RV32I-NEXT: lui a0, 633806 891; RV32I-NEXT: lui a1, 74565 892; RV32I-NEXT: addi a0, a0, -272 893; RV32I-NEXT: addi a1, a1, 1656 894; RV32I-NEXT: ret 895; 896; RV64-NOPOOL-LABEL: imm64_8: 897; RV64-NOPOOL: # %bb.0: 898; RV64-NOPOOL-NEXT: lui a0, 583 899; RV64-NOPOOL-NEXT: addi a0, a0, -1875 900; RV64-NOPOOL-NEXT: slli a0, a0, 14 901; RV64-NOPOOL-NEXT: addi a0, a0, -947 902; RV64-NOPOOL-NEXT: slli a0, a0, 12 903; RV64-NOPOOL-NEXT: addi a0, a0, 1511 904; RV64-NOPOOL-NEXT: slli a0, a0, 13 905; RV64-NOPOOL-NEXT: addi a0, a0, -272 906; RV64-NOPOOL-NEXT: ret 907; 908; RV64I-POOL-LABEL: imm64_8: 909; RV64I-POOL: # %bb.0: 910; RV64I-POOL-NEXT: lui a0, %hi(.LCPI17_0) 911; RV64I-POOL-NEXT: ld a0, %lo(.LCPI17_0)(a0) 912; RV64I-POOL-NEXT: ret 913; 914; RV64IZBA-LABEL: imm64_8: 915; RV64IZBA: # %bb.0: 916; RV64IZBA-NEXT: lui a0, 596523 917; RV64IZBA-NEXT: addi a0, a0, 965 918; RV64IZBA-NEXT: slli.uw a0, a0, 13 919; RV64IZBA-NEXT: addi a0, a0, -1347 920; RV64IZBA-NEXT: slli a0, a0, 12 921; RV64IZBA-NEXT: addi a0, a0, -529 922; RV64IZBA-NEXT: slli a0, a0, 4 923; RV64IZBA-NEXT: ret 924; 925; RV64IZBB-LABEL: imm64_8: 926; RV64IZBB: # %bb.0: 927; RV64IZBB-NEXT: lui a0, 583 928; RV64IZBB-NEXT: addi a0, a0, -1875 929; RV64IZBB-NEXT: slli a0, a0, 14 930; RV64IZBB-NEXT: addi a0, a0, -947 931; RV64IZBB-NEXT: slli a0, a0, 12 932; RV64IZBB-NEXT: addi a0, a0, 1511 933; RV64IZBB-NEXT: slli a0, a0, 13 934; RV64IZBB-NEXT: addi a0, a0, -272 935; RV64IZBB-NEXT: ret 936; 937; RV64IZBS-LABEL: imm64_8: 938; RV64IZBS: # %bb.0: 939; RV64IZBS-NEXT: lui a0, 583 940; RV64IZBS-NEXT: addi a0, a0, -1875 941; RV64IZBS-NEXT: slli a0, a0, 14 942; RV64IZBS-NEXT: addi a0, a0, -947 943; RV64IZBS-NEXT: slli a0, a0, 12 944; RV64IZBS-NEXT: addi a0, a0, 1511 945; RV64IZBS-NEXT: slli a0, a0, 13 946; RV64IZBS-NEXT: addi a0, a0, -272 947; RV64IZBS-NEXT: ret 948; 949; RV64IXTHEADBB-LABEL: imm64_8: 950; RV64IXTHEADBB: # %bb.0: 951; RV64IXTHEADBB-NEXT: lui a0, 583 952; RV64IXTHEADBB-NEXT: addi a0, a0, -1875 953; RV64IXTHEADBB-NEXT: slli a0, a0, 14 954; RV64IXTHEADBB-NEXT: addi a0, a0, -947 955; RV64IXTHEADBB-NEXT: slli a0, a0, 12 956; RV64IXTHEADBB-NEXT: addi a0, a0, 1511 957; RV64IXTHEADBB-NEXT: slli a0, a0, 13 958; RV64IXTHEADBB-NEXT: addi a0, a0, -272 959; RV64IXTHEADBB-NEXT: ret 960; 961; RV32-REMAT-LABEL: imm64_8: 962; RV32-REMAT: # %bb.0: 963; RV32-REMAT-NEXT: lui a0, 633806 964; RV32-REMAT-NEXT: addi a0, a0, -272 965; RV32-REMAT-NEXT: lui a1, 74565 966; RV32-REMAT-NEXT: addi a1, a1, 1656 967; RV32-REMAT-NEXT: ret 968; 969; RV64-REMAT-LABEL: imm64_8: 970; RV64-REMAT: # %bb.0: 971; RV64-REMAT-NEXT: lui a0, 583 972; RV64-REMAT-NEXT: addi a0, a0, -1875 973; RV64-REMAT-NEXT: slli a0, a0, 14 974; RV64-REMAT-NEXT: addi a0, a0, -947 975; RV64-REMAT-NEXT: slli a0, a0, 12 976; RV64-REMAT-NEXT: addi a0, a0, 1511 977; RV64-REMAT-NEXT: slli a0, a0, 13 978; RV64-REMAT-NEXT: addi a0, a0, -272 979; RV64-REMAT-NEXT: ret 980 ret i64 1311768467463790320 ; 0x1234_5678_9ABC_DEF0 981} 982 983define i64 @imm64_9() nounwind { 984; RV32I-LABEL: imm64_9: 985; RV32I: # %bb.0: 986; RV32I-NEXT: li a0, -1 987; RV32I-NEXT: li a1, -1 988; RV32I-NEXT: ret 989; 990; RV64I-LABEL: imm64_9: 991; RV64I: # %bb.0: 992; RV64I-NEXT: li a0, -1 993; RV64I-NEXT: ret 994; 995; RV64IZBA-LABEL: imm64_9: 996; RV64IZBA: # %bb.0: 997; RV64IZBA-NEXT: li a0, -1 998; RV64IZBA-NEXT: ret 999; 1000; RV64IZBB-LABEL: imm64_9: 1001; RV64IZBB: # %bb.0: 1002; RV64IZBB-NEXT: li a0, -1 1003; RV64IZBB-NEXT: ret 1004; 1005; RV64IZBS-LABEL: imm64_9: 1006; RV64IZBS: # %bb.0: 1007; RV64IZBS-NEXT: li a0, -1 1008; RV64IZBS-NEXT: ret 1009; 1010; RV64IXTHEADBB-LABEL: imm64_9: 1011; RV64IXTHEADBB: # %bb.0: 1012; RV64IXTHEADBB-NEXT: li a0, -1 1013; RV64IXTHEADBB-NEXT: ret 1014; 1015; RV32-REMAT-LABEL: imm64_9: 1016; RV32-REMAT: # %bb.0: 1017; RV32-REMAT-NEXT: li a0, -1 1018; RV32-REMAT-NEXT: li a1, -1 1019; RV32-REMAT-NEXT: ret 1020; 1021; RV64-REMAT-LABEL: imm64_9: 1022; RV64-REMAT: # %bb.0: 1023; RV64-REMAT-NEXT: li a0, -1 1024; RV64-REMAT-NEXT: ret 1025 ret i64 -1 1026} 1027 1028; Various cases where extraneous ADDIs can be inserted where a (left shifted) 1029; LUI suffices. 1030 1031define i64 @imm_left_shifted_lui_1() nounwind { 1032; RV32I-LABEL: imm_left_shifted_lui_1: 1033; RV32I: # %bb.0: 1034; RV32I-NEXT: lui a0, 524290 1035; RV32I-NEXT: li a1, 0 1036; RV32I-NEXT: ret 1037; 1038; RV64I-LABEL: imm_left_shifted_lui_1: 1039; RV64I: # %bb.0: 1040; RV64I-NEXT: lui a0, 262145 1041; RV64I-NEXT: slli a0, a0, 1 1042; RV64I-NEXT: ret 1043; 1044; RV64IZBA-LABEL: imm_left_shifted_lui_1: 1045; RV64IZBA: # %bb.0: 1046; RV64IZBA-NEXT: lui a0, 262145 1047; RV64IZBA-NEXT: slli a0, a0, 1 1048; RV64IZBA-NEXT: ret 1049; 1050; RV64IZBB-LABEL: imm_left_shifted_lui_1: 1051; RV64IZBB: # %bb.0: 1052; RV64IZBB-NEXT: lui a0, 262145 1053; RV64IZBB-NEXT: slli a0, a0, 1 1054; RV64IZBB-NEXT: ret 1055; 1056; RV64IZBS-LABEL: imm_left_shifted_lui_1: 1057; RV64IZBS: # %bb.0: 1058; RV64IZBS-NEXT: lui a0, 262145 1059; RV64IZBS-NEXT: slli a0, a0, 1 1060; RV64IZBS-NEXT: ret 1061; 1062; RV64IXTHEADBB-LABEL: imm_left_shifted_lui_1: 1063; RV64IXTHEADBB: # %bb.0: 1064; RV64IXTHEADBB-NEXT: lui a0, 262145 1065; RV64IXTHEADBB-NEXT: slli a0, a0, 1 1066; RV64IXTHEADBB-NEXT: ret 1067; 1068; RV32-REMAT-LABEL: imm_left_shifted_lui_1: 1069; RV32-REMAT: # %bb.0: 1070; RV32-REMAT-NEXT: lui a0, 524290 1071; RV32-REMAT-NEXT: li a1, 0 1072; RV32-REMAT-NEXT: ret 1073; 1074; RV64-REMAT-LABEL: imm_left_shifted_lui_1: 1075; RV64-REMAT: # %bb.0: 1076; RV64-REMAT-NEXT: lui a0, 262145 1077; RV64-REMAT-NEXT: slli a0, a0, 1 1078; RV64-REMAT-NEXT: ret 1079 ret i64 2147491840 ; 0x8000_2000 1080} 1081 1082define i64 @imm_left_shifted_lui_2() nounwind { 1083; RV32I-LABEL: imm_left_shifted_lui_2: 1084; RV32I: # %bb.0: 1085; RV32I-NEXT: lui a0, 4 1086; RV32I-NEXT: li a1, 1 1087; RV32I-NEXT: ret 1088; 1089; RV64I-LABEL: imm_left_shifted_lui_2: 1090; RV64I: # %bb.0: 1091; RV64I-NEXT: lui a0, 262145 1092; RV64I-NEXT: slli a0, a0, 2 1093; RV64I-NEXT: ret 1094; 1095; RV64IZBA-LABEL: imm_left_shifted_lui_2: 1096; RV64IZBA: # %bb.0: 1097; RV64IZBA-NEXT: lui a0, 262145 1098; RV64IZBA-NEXT: slli a0, a0, 2 1099; RV64IZBA-NEXT: ret 1100; 1101; RV64IZBB-LABEL: imm_left_shifted_lui_2: 1102; RV64IZBB: # %bb.0: 1103; RV64IZBB-NEXT: lui a0, 262145 1104; RV64IZBB-NEXT: slli a0, a0, 2 1105; RV64IZBB-NEXT: ret 1106; 1107; RV64IZBS-LABEL: imm_left_shifted_lui_2: 1108; RV64IZBS: # %bb.0: 1109; RV64IZBS-NEXT: lui a0, 262145 1110; RV64IZBS-NEXT: slli a0, a0, 2 1111; RV64IZBS-NEXT: ret 1112; 1113; RV64IXTHEADBB-LABEL: imm_left_shifted_lui_2: 1114; RV64IXTHEADBB: # %bb.0: 1115; RV64IXTHEADBB-NEXT: lui a0, 262145 1116; RV64IXTHEADBB-NEXT: slli a0, a0, 2 1117; RV64IXTHEADBB-NEXT: ret 1118; 1119; RV32-REMAT-LABEL: imm_left_shifted_lui_2: 1120; RV32-REMAT: # %bb.0: 1121; RV32-REMAT-NEXT: lui a0, 4 1122; RV32-REMAT-NEXT: li a1, 1 1123; RV32-REMAT-NEXT: ret 1124; 1125; RV64-REMAT-LABEL: imm_left_shifted_lui_2: 1126; RV64-REMAT: # %bb.0: 1127; RV64-REMAT-NEXT: lui a0, 262145 1128; RV64-REMAT-NEXT: slli a0, a0, 2 1129; RV64-REMAT-NEXT: ret 1130 ret i64 4294983680 ; 0x1_0000_4000 1131} 1132 1133define i64 @imm_left_shifted_lui_3() nounwind { 1134; RV32I-LABEL: imm_left_shifted_lui_3: 1135; RV32I: # %bb.0: 1136; RV32I-NEXT: lui a1, 1 1137; RV32I-NEXT: addi a1, a1, 1 1138; RV32I-NEXT: li a0, 0 1139; RV32I-NEXT: ret 1140; 1141; RV64I-LABEL: imm_left_shifted_lui_3: 1142; RV64I: # %bb.0: 1143; RV64I-NEXT: lui a0, 4097 1144; RV64I-NEXT: slli a0, a0, 20 1145; RV64I-NEXT: ret 1146; 1147; RV64IZBA-LABEL: imm_left_shifted_lui_3: 1148; RV64IZBA: # %bb.0: 1149; RV64IZBA-NEXT: lui a0, 4097 1150; RV64IZBA-NEXT: slli a0, a0, 20 1151; RV64IZBA-NEXT: ret 1152; 1153; RV64IZBB-LABEL: imm_left_shifted_lui_3: 1154; RV64IZBB: # %bb.0: 1155; RV64IZBB-NEXT: lui a0, 4097 1156; RV64IZBB-NEXT: slli a0, a0, 20 1157; RV64IZBB-NEXT: ret 1158; 1159; RV64IZBS-LABEL: imm_left_shifted_lui_3: 1160; RV64IZBS: # %bb.0: 1161; RV64IZBS-NEXT: lui a0, 4097 1162; RV64IZBS-NEXT: slli a0, a0, 20 1163; RV64IZBS-NEXT: ret 1164; 1165; RV64IXTHEADBB-LABEL: imm_left_shifted_lui_3: 1166; RV64IXTHEADBB: # %bb.0: 1167; RV64IXTHEADBB-NEXT: lui a0, 4097 1168; RV64IXTHEADBB-NEXT: slli a0, a0, 20 1169; RV64IXTHEADBB-NEXT: ret 1170; 1171; RV32-REMAT-LABEL: imm_left_shifted_lui_3: 1172; RV32-REMAT: # %bb.0: 1173; RV32-REMAT-NEXT: lui a1, 1 1174; RV32-REMAT-NEXT: addi a1, a1, 1 1175; RV32-REMAT-NEXT: li a0, 0 1176; RV32-REMAT-NEXT: ret 1177; 1178; RV64-REMAT-LABEL: imm_left_shifted_lui_3: 1179; RV64-REMAT: # %bb.0: 1180; RV64-REMAT-NEXT: lui a0, 4097 1181; RV64-REMAT-NEXT: slli a0, a0, 20 1182; RV64-REMAT-NEXT: ret 1183 ret i64 17596481011712 ; 0x1001_0000_0000 1184} 1185 1186; Various cases where extraneous ADDIs can be inserted where a (right shifted) 1187; LUI suffices, or where multiple ADDIs can be used instead of a single LUI. 1188 1189define i64 @imm_right_shifted_lui_1() nounwind { 1190; RV32I-LABEL: imm_right_shifted_lui_1: 1191; RV32I: # %bb.0: 1192; RV32I-NEXT: lui a0, 1048575 1193; RV32I-NEXT: lui a1, 16 1194; RV32I-NEXT: addi a0, a0, 1 1195; RV32I-NEXT: addi a1, a1, -1 1196; RV32I-NEXT: ret 1197; 1198; RV64I-LABEL: imm_right_shifted_lui_1: 1199; RV64I: # %bb.0: 1200; RV64I-NEXT: lui a0, 983056 1201; RV64I-NEXT: srli a0, a0, 16 1202; RV64I-NEXT: ret 1203; 1204; RV64IZBA-LABEL: imm_right_shifted_lui_1: 1205; RV64IZBA: # %bb.0: 1206; RV64IZBA-NEXT: lui a0, 983056 1207; RV64IZBA-NEXT: srli a0, a0, 16 1208; RV64IZBA-NEXT: ret 1209; 1210; RV64IZBB-LABEL: imm_right_shifted_lui_1: 1211; RV64IZBB: # %bb.0: 1212; RV64IZBB-NEXT: lui a0, 983056 1213; RV64IZBB-NEXT: srli a0, a0, 16 1214; RV64IZBB-NEXT: ret 1215; 1216; RV64IZBS-LABEL: imm_right_shifted_lui_1: 1217; RV64IZBS: # %bb.0: 1218; RV64IZBS-NEXT: lui a0, 983056 1219; RV64IZBS-NEXT: srli a0, a0, 16 1220; RV64IZBS-NEXT: ret 1221; 1222; RV64IXTHEADBB-LABEL: imm_right_shifted_lui_1: 1223; RV64IXTHEADBB: # %bb.0: 1224; RV64IXTHEADBB-NEXT: lui a0, 983056 1225; RV64IXTHEADBB-NEXT: srli a0, a0, 16 1226; RV64IXTHEADBB-NEXT: ret 1227; 1228; RV32-REMAT-LABEL: imm_right_shifted_lui_1: 1229; RV32-REMAT: # %bb.0: 1230; RV32-REMAT-NEXT: lui a0, 1048575 1231; RV32-REMAT-NEXT: addi a0, a0, 1 1232; RV32-REMAT-NEXT: lui a1, 16 1233; RV32-REMAT-NEXT: addi a1, a1, -1 1234; RV32-REMAT-NEXT: ret 1235; 1236; RV64-REMAT-LABEL: imm_right_shifted_lui_1: 1237; RV64-REMAT: # %bb.0: 1238; RV64-REMAT-NEXT: lui a0, 983056 1239; RV64-REMAT-NEXT: srli a0, a0, 16 1240; RV64-REMAT-NEXT: ret 1241 ret i64 281474976706561 ; 0xFFFF_FFFF_F001 1242} 1243 1244define i64 @imm_right_shifted_lui_2() nounwind { 1245; RV32I-LABEL: imm_right_shifted_lui_2: 1246; RV32I: # %bb.0: 1247; RV32I-NEXT: lui a0, 1048575 1248; RV32I-NEXT: addi a0, a0, 1 1249; RV32I-NEXT: li a1, 255 1250; RV32I-NEXT: ret 1251; 1252; RV64I-LABEL: imm_right_shifted_lui_2: 1253; RV64I: # %bb.0: 1254; RV64I-NEXT: lui a0, 1044481 1255; RV64I-NEXT: slli a0, a0, 12 1256; RV64I-NEXT: srli a0, a0, 24 1257; RV64I-NEXT: ret 1258; 1259; RV64IZBA-LABEL: imm_right_shifted_lui_2: 1260; RV64IZBA: # %bb.0: 1261; RV64IZBA-NEXT: lui a0, 1044481 1262; RV64IZBA-NEXT: slli a0, a0, 12 1263; RV64IZBA-NEXT: srli a0, a0, 24 1264; RV64IZBA-NEXT: ret 1265; 1266; RV64IZBB-LABEL: imm_right_shifted_lui_2: 1267; RV64IZBB: # %bb.0: 1268; RV64IZBB-NEXT: lui a0, 1044481 1269; RV64IZBB-NEXT: slli a0, a0, 12 1270; RV64IZBB-NEXT: srli a0, a0, 24 1271; RV64IZBB-NEXT: ret 1272; 1273; RV64IZBS-LABEL: imm_right_shifted_lui_2: 1274; RV64IZBS: # %bb.0: 1275; RV64IZBS-NEXT: lui a0, 1044481 1276; RV64IZBS-NEXT: slli a0, a0, 12 1277; RV64IZBS-NEXT: srli a0, a0, 24 1278; RV64IZBS-NEXT: ret 1279; 1280; RV64IXTHEADBB-LABEL: imm_right_shifted_lui_2: 1281; RV64IXTHEADBB: # %bb.0: 1282; RV64IXTHEADBB-NEXT: lui a0, 1044481 1283; RV64IXTHEADBB-NEXT: slli a0, a0, 12 1284; RV64IXTHEADBB-NEXT: srli a0, a0, 24 1285; RV64IXTHEADBB-NEXT: ret 1286; 1287; RV32-REMAT-LABEL: imm_right_shifted_lui_2: 1288; RV32-REMAT: # %bb.0: 1289; RV32-REMAT-NEXT: lui a0, 1048575 1290; RV32-REMAT-NEXT: addi a0, a0, 1 1291; RV32-REMAT-NEXT: li a1, 255 1292; RV32-REMAT-NEXT: ret 1293; 1294; RV64-REMAT-LABEL: imm_right_shifted_lui_2: 1295; RV64-REMAT: # %bb.0: 1296; RV64-REMAT-NEXT: lui a0, 1044481 1297; RV64-REMAT-NEXT: slli a0, a0, 12 1298; RV64-REMAT-NEXT: srli a0, a0, 24 1299; RV64-REMAT-NEXT: ret 1300 ret i64 1099511623681 ; 0xFF_FFFF_F001 1301} 1302 1303; We can materialize the upper bits with a single (shifted) LUI, but that option 1304; can be missed due to the lower bits, which aren't just 1s or just 0s. 1305 1306define i64 @imm_decoupled_lui_addi() nounwind { 1307; RV32I-LABEL: imm_decoupled_lui_addi: 1308; RV32I: # %bb.0: 1309; RV32I-NEXT: li a0, -3 1310; RV32I-NEXT: lui a1, 1 1311; RV32I-NEXT: ret 1312; 1313; RV64I-LABEL: imm_decoupled_lui_addi: 1314; RV64I: # %bb.0: 1315; RV64I-NEXT: lui a0, 4097 1316; RV64I-NEXT: slli a0, a0, 20 1317; RV64I-NEXT: addi a0, a0, -3 1318; RV64I-NEXT: ret 1319; 1320; RV64IZBA-LABEL: imm_decoupled_lui_addi: 1321; RV64IZBA: # %bb.0: 1322; RV64IZBA-NEXT: lui a0, 4097 1323; RV64IZBA-NEXT: slli a0, a0, 20 1324; RV64IZBA-NEXT: addi a0, a0, -3 1325; RV64IZBA-NEXT: ret 1326; 1327; RV64IZBB-LABEL: imm_decoupled_lui_addi: 1328; RV64IZBB: # %bb.0: 1329; RV64IZBB-NEXT: lui a0, 4097 1330; RV64IZBB-NEXT: slli a0, a0, 20 1331; RV64IZBB-NEXT: addi a0, a0, -3 1332; RV64IZBB-NEXT: ret 1333; 1334; RV64IZBS-LABEL: imm_decoupled_lui_addi: 1335; RV64IZBS: # %bb.0: 1336; RV64IZBS-NEXT: lui a0, 4097 1337; RV64IZBS-NEXT: slli a0, a0, 20 1338; RV64IZBS-NEXT: addi a0, a0, -3 1339; RV64IZBS-NEXT: ret 1340; 1341; RV64IXTHEADBB-LABEL: imm_decoupled_lui_addi: 1342; RV64IXTHEADBB: # %bb.0: 1343; RV64IXTHEADBB-NEXT: lui a0, 4097 1344; RV64IXTHEADBB-NEXT: slli a0, a0, 20 1345; RV64IXTHEADBB-NEXT: addi a0, a0, -3 1346; RV64IXTHEADBB-NEXT: ret 1347; 1348; RV32-REMAT-LABEL: imm_decoupled_lui_addi: 1349; RV32-REMAT: # %bb.0: 1350; RV32-REMAT-NEXT: li a0, -3 1351; RV32-REMAT-NEXT: lui a1, 1 1352; RV32-REMAT-NEXT: ret 1353; 1354; RV64-REMAT-LABEL: imm_decoupled_lui_addi: 1355; RV64-REMAT: # %bb.0: 1356; RV64-REMAT-NEXT: lui a0, 4097 1357; RV64-REMAT-NEXT: slli a0, a0, 20 1358; RV64-REMAT-NEXT: addi a0, a0, -3 1359; RV64-REMAT-NEXT: ret 1360 ret i64 17596481011709 ; 0x1000_FFFF_FFFD 1361} 1362 1363; This constant can be materialized for RV64 with LUI+SRLI+XORI. 1364 1365define i64 @imm_end_xori_1() nounwind { 1366; RV32I-LABEL: imm_end_xori_1: 1367; RV32I: # %bb.0: 1368; RV32I-NEXT: lui a0, 8192 1369; RV32I-NEXT: addi a0, a0, -1 1370; RV32I-NEXT: lui a1, 917504 1371; RV32I-NEXT: ret 1372; 1373; RV64I-LABEL: imm_end_xori_1: 1374; RV64I: # %bb.0: 1375; RV64I-NEXT: lui a0, 983040 1376; RV64I-NEXT: srli a0, a0, 3 1377; RV64I-NEXT: not a0, a0 1378; RV64I-NEXT: ret 1379; 1380; RV64IZBA-LABEL: imm_end_xori_1: 1381; RV64IZBA: # %bb.0: 1382; RV64IZBA-NEXT: lui a0, 983040 1383; RV64IZBA-NEXT: srli a0, a0, 3 1384; RV64IZBA-NEXT: not a0, a0 1385; RV64IZBA-NEXT: ret 1386; 1387; RV64IZBB-LABEL: imm_end_xori_1: 1388; RV64IZBB: # %bb.0: 1389; RV64IZBB-NEXT: lui a0, 983040 1390; RV64IZBB-NEXT: srli a0, a0, 3 1391; RV64IZBB-NEXT: not a0, a0 1392; RV64IZBB-NEXT: ret 1393; 1394; RV64IZBS-LABEL: imm_end_xori_1: 1395; RV64IZBS: # %bb.0: 1396; RV64IZBS-NEXT: lui a0, 983040 1397; RV64IZBS-NEXT: srli a0, a0, 3 1398; RV64IZBS-NEXT: not a0, a0 1399; RV64IZBS-NEXT: ret 1400; 1401; RV64IXTHEADBB-LABEL: imm_end_xori_1: 1402; RV64IXTHEADBB: # %bb.0: 1403; RV64IXTHEADBB-NEXT: lui a0, 983040 1404; RV64IXTHEADBB-NEXT: srli a0, a0, 3 1405; RV64IXTHEADBB-NEXT: not a0, a0 1406; RV64IXTHEADBB-NEXT: ret 1407; 1408; RV32-REMAT-LABEL: imm_end_xori_1: 1409; RV32-REMAT: # %bb.0: 1410; RV32-REMAT-NEXT: lui a0, 8192 1411; RV32-REMAT-NEXT: addi a0, a0, -1 1412; RV32-REMAT-NEXT: lui a1, 917504 1413; RV32-REMAT-NEXT: ret 1414; 1415; RV64-REMAT-LABEL: imm_end_xori_1: 1416; RV64-REMAT: # %bb.0: 1417; RV64-REMAT-NEXT: lui a0, 983040 1418; RV64-REMAT-NEXT: srli a0, a0, 3 1419; RV64-REMAT-NEXT: not a0, a0 1420; RV64-REMAT-NEXT: ret 1421 ret i64 -2305843009180139521 ; 0xE000_0000_01FF_FFFF 1422} 1423 1424; This constant can be materialized for RV64 with ADDI+SLLI+ADDI+ADDI. 1425 1426define i64 @imm_end_2addi_1() nounwind { 1427; RV32I-LABEL: imm_end_2addi_1: 1428; RV32I: # %bb.0: 1429; RV32I-NEXT: lui a0, 1048575 1430; RV32I-NEXT: lui a1, 1048512 1431; RV32I-NEXT: addi a0, a0, 2047 1432; RV32I-NEXT: addi a1, a1, 127 1433; RV32I-NEXT: ret 1434; 1435; RV64I-LABEL: imm_end_2addi_1: 1436; RV64I: # %bb.0: 1437; RV64I-NEXT: li a0, -2047 1438; RV64I-NEXT: slli a0, a0, 39 1439; RV64I-NEXT: addi a0, a0, -2048 1440; RV64I-NEXT: addi a0, a0, -1 1441; RV64I-NEXT: ret 1442; 1443; RV64IZBA-LABEL: imm_end_2addi_1: 1444; RV64IZBA: # %bb.0: 1445; RV64IZBA-NEXT: li a0, -2047 1446; RV64IZBA-NEXT: slli a0, a0, 39 1447; RV64IZBA-NEXT: addi a0, a0, -2048 1448; RV64IZBA-NEXT: addi a0, a0, -1 1449; RV64IZBA-NEXT: ret 1450; 1451; RV64IZBB-LABEL: imm_end_2addi_1: 1452; RV64IZBB: # %bb.0: 1453; RV64IZBB-NEXT: li a0, -2047 1454; RV64IZBB-NEXT: slli a0, a0, 39 1455; RV64IZBB-NEXT: addi a0, a0, -2048 1456; RV64IZBB-NEXT: addi a0, a0, -1 1457; RV64IZBB-NEXT: ret 1458; 1459; RV64IZBS-LABEL: imm_end_2addi_1: 1460; RV64IZBS: # %bb.0: 1461; RV64IZBS-NEXT: li a0, -2047 1462; RV64IZBS-NEXT: slli a0, a0, 39 1463; RV64IZBS-NEXT: addi a0, a0, -2048 1464; RV64IZBS-NEXT: addi a0, a0, -1 1465; RV64IZBS-NEXT: ret 1466; 1467; RV64IXTHEADBB-LABEL: imm_end_2addi_1: 1468; RV64IXTHEADBB: # %bb.0: 1469; RV64IXTHEADBB-NEXT: li a0, -2047 1470; RV64IXTHEADBB-NEXT: slli a0, a0, 39 1471; RV64IXTHEADBB-NEXT: addi a0, a0, -2048 1472; RV64IXTHEADBB-NEXT: addi a0, a0, -1 1473; RV64IXTHEADBB-NEXT: ret 1474; 1475; RV32-REMAT-LABEL: imm_end_2addi_1: 1476; RV32-REMAT: # %bb.0: 1477; RV32-REMAT-NEXT: lui a0, 1048575 1478; RV32-REMAT-NEXT: addi a0, a0, 2047 1479; RV32-REMAT-NEXT: lui a1, 1048512 1480; RV32-REMAT-NEXT: addi a1, a1, 127 1481; RV32-REMAT-NEXT: ret 1482; 1483; RV64-REMAT-LABEL: imm_end_2addi_1: 1484; RV64-REMAT: # %bb.0: 1485; RV64-REMAT-NEXT: li a0, -2047 1486; RV64-REMAT-NEXT: slli a0, a0, 39 1487; RV64-REMAT-NEXT: addi a0, a0, -2048 1488; RV64-REMAT-NEXT: addi a0, a0, -1 1489; RV64-REMAT-NEXT: ret 1490 ret i64 -1125350151030785 ; 0xFFFC_007F_FFFF_F7FF 1491} 1492 1493; This constant can be more efficiently materialized for RV64 if we use two 1494; registers instead of one. 1495 1496define i64 @imm_2reg_1() nounwind { 1497; RV32I-LABEL: imm_2reg_1: 1498; RV32I: # %bb.0: 1499; RV32I-NEXT: lui a0, 74565 1500; RV32I-NEXT: addi a0, a0, 1656 1501; RV32I-NEXT: lui a1, 983040 1502; RV32I-NEXT: ret 1503; 1504; RV64I-LABEL: imm_2reg_1: 1505; RV64I: # %bb.0: 1506; RV64I-NEXT: lui a0, 74565 1507; RV64I-NEXT: addiw a0, a0, 1656 1508; RV64I-NEXT: slli a1, a0, 57 1509; RV64I-NEXT: add a0, a0, a1 1510; RV64I-NEXT: ret 1511; 1512; RV64IZBA-LABEL: imm_2reg_1: 1513; RV64IZBA: # %bb.0: 1514; RV64IZBA-NEXT: lui a0, 74565 1515; RV64IZBA-NEXT: addiw a0, a0, 1656 1516; RV64IZBA-NEXT: slli a1, a0, 57 1517; RV64IZBA-NEXT: add a0, a0, a1 1518; RV64IZBA-NEXT: ret 1519; 1520; RV64IZBB-LABEL: imm_2reg_1: 1521; RV64IZBB: # %bb.0: 1522; RV64IZBB-NEXT: lui a0, 74565 1523; RV64IZBB-NEXT: addiw a0, a0, 1656 1524; RV64IZBB-NEXT: slli a1, a0, 57 1525; RV64IZBB-NEXT: add a0, a0, a1 1526; RV64IZBB-NEXT: ret 1527; 1528; RV64IZBS-LABEL: imm_2reg_1: 1529; RV64IZBS: # %bb.0: 1530; RV64IZBS-NEXT: lui a0, 74565 1531; RV64IZBS-NEXT: addiw a0, a0, 1656 1532; RV64IZBS-NEXT: slli a1, a0, 57 1533; RV64IZBS-NEXT: add a0, a0, a1 1534; RV64IZBS-NEXT: ret 1535; 1536; RV64IXTHEADBB-LABEL: imm_2reg_1: 1537; RV64IXTHEADBB: # %bb.0: 1538; RV64IXTHEADBB-NEXT: lui a0, 74565 1539; RV64IXTHEADBB-NEXT: addiw a0, a0, 1656 1540; RV64IXTHEADBB-NEXT: slli a1, a0, 57 1541; RV64IXTHEADBB-NEXT: add a0, a0, a1 1542; RV64IXTHEADBB-NEXT: ret 1543; 1544; RV32-REMAT-LABEL: imm_2reg_1: 1545; RV32-REMAT: # %bb.0: 1546; RV32-REMAT-NEXT: lui a0, 74565 1547; RV32-REMAT-NEXT: addi a0, a0, 1656 1548; RV32-REMAT-NEXT: lui a1, 983040 1549; RV32-REMAT-NEXT: ret 1550; 1551; RV64-REMAT-LABEL: imm_2reg_1: 1552; RV64-REMAT: # %bb.0: 1553; RV64-REMAT-NEXT: lui a0, 74565 1554; RV64-REMAT-NEXT: addiw a0, a0, 1656 1555; RV64-REMAT-NEXT: slli a1, a0, 57 1556; RV64-REMAT-NEXT: add a0, a0, a1 1557; RV64-REMAT-NEXT: ret 1558 ret i64 -1152921504301427080 ; 0xF000_0000_1234_5678 1559} 1560 1561define void @imm_store_i8_neg1(ptr %p) nounwind { 1562; RV32I-LABEL: imm_store_i8_neg1: 1563; RV32I: # %bb.0: 1564; RV32I-NEXT: li a1, -1 1565; RV32I-NEXT: sb a1, 0(a0) 1566; RV32I-NEXT: ret 1567; 1568; RV64I-LABEL: imm_store_i8_neg1: 1569; RV64I: # %bb.0: 1570; RV64I-NEXT: li a1, -1 1571; RV64I-NEXT: sb a1, 0(a0) 1572; RV64I-NEXT: ret 1573; 1574; RV64IZBA-LABEL: imm_store_i8_neg1: 1575; RV64IZBA: # %bb.0: 1576; RV64IZBA-NEXT: li a1, -1 1577; RV64IZBA-NEXT: sb a1, 0(a0) 1578; RV64IZBA-NEXT: ret 1579; 1580; RV64IZBB-LABEL: imm_store_i8_neg1: 1581; RV64IZBB: # %bb.0: 1582; RV64IZBB-NEXT: li a1, -1 1583; RV64IZBB-NEXT: sb a1, 0(a0) 1584; RV64IZBB-NEXT: ret 1585; 1586; RV64IZBS-LABEL: imm_store_i8_neg1: 1587; RV64IZBS: # %bb.0: 1588; RV64IZBS-NEXT: li a1, -1 1589; RV64IZBS-NEXT: sb a1, 0(a0) 1590; RV64IZBS-NEXT: ret 1591; 1592; RV64IXTHEADBB-LABEL: imm_store_i8_neg1: 1593; RV64IXTHEADBB: # %bb.0: 1594; RV64IXTHEADBB-NEXT: li a1, -1 1595; RV64IXTHEADBB-NEXT: sb a1, 0(a0) 1596; RV64IXTHEADBB-NEXT: ret 1597; 1598; RV32-REMAT-LABEL: imm_store_i8_neg1: 1599; RV32-REMAT: # %bb.0: 1600; RV32-REMAT-NEXT: li a1, -1 1601; RV32-REMAT-NEXT: sb a1, 0(a0) 1602; RV32-REMAT-NEXT: ret 1603; 1604; RV64-REMAT-LABEL: imm_store_i8_neg1: 1605; RV64-REMAT: # %bb.0: 1606; RV64-REMAT-NEXT: li a1, -1 1607; RV64-REMAT-NEXT: sb a1, 0(a0) 1608; RV64-REMAT-NEXT: ret 1609 store i8 -1, ptr %p 1610 ret void 1611} 1612 1613define void @imm_store_i16_neg1(ptr %p) nounwind { 1614; RV32I-LABEL: imm_store_i16_neg1: 1615; RV32I: # %bb.0: 1616; RV32I-NEXT: li a1, -1 1617; RV32I-NEXT: sh a1, 0(a0) 1618; RV32I-NEXT: ret 1619; 1620; RV64I-LABEL: imm_store_i16_neg1: 1621; RV64I: # %bb.0: 1622; RV64I-NEXT: li a1, -1 1623; RV64I-NEXT: sh a1, 0(a0) 1624; RV64I-NEXT: ret 1625; 1626; RV64IZBA-LABEL: imm_store_i16_neg1: 1627; RV64IZBA: # %bb.0: 1628; RV64IZBA-NEXT: li a1, -1 1629; RV64IZBA-NEXT: sh a1, 0(a0) 1630; RV64IZBA-NEXT: ret 1631; 1632; RV64IZBB-LABEL: imm_store_i16_neg1: 1633; RV64IZBB: # %bb.0: 1634; RV64IZBB-NEXT: li a1, -1 1635; RV64IZBB-NEXT: sh a1, 0(a0) 1636; RV64IZBB-NEXT: ret 1637; 1638; RV64IZBS-LABEL: imm_store_i16_neg1: 1639; RV64IZBS: # %bb.0: 1640; RV64IZBS-NEXT: li a1, -1 1641; RV64IZBS-NEXT: sh a1, 0(a0) 1642; RV64IZBS-NEXT: ret 1643; 1644; RV64IXTHEADBB-LABEL: imm_store_i16_neg1: 1645; RV64IXTHEADBB: # %bb.0: 1646; RV64IXTHEADBB-NEXT: li a1, -1 1647; RV64IXTHEADBB-NEXT: sh a1, 0(a0) 1648; RV64IXTHEADBB-NEXT: ret 1649; 1650; RV32-REMAT-LABEL: imm_store_i16_neg1: 1651; RV32-REMAT: # %bb.0: 1652; RV32-REMAT-NEXT: li a1, -1 1653; RV32-REMAT-NEXT: sh a1, 0(a0) 1654; RV32-REMAT-NEXT: ret 1655; 1656; RV64-REMAT-LABEL: imm_store_i16_neg1: 1657; RV64-REMAT: # %bb.0: 1658; RV64-REMAT-NEXT: li a1, -1 1659; RV64-REMAT-NEXT: sh a1, 0(a0) 1660; RV64-REMAT-NEXT: ret 1661 store i16 -1, ptr %p 1662 ret void 1663} 1664 1665define void @imm_store_i32_neg1(ptr %p) nounwind { 1666; RV32I-LABEL: imm_store_i32_neg1: 1667; RV32I: # %bb.0: 1668; RV32I-NEXT: li a1, -1 1669; RV32I-NEXT: sw a1, 0(a0) 1670; RV32I-NEXT: ret 1671; 1672; RV64I-LABEL: imm_store_i32_neg1: 1673; RV64I: # %bb.0: 1674; RV64I-NEXT: li a1, -1 1675; RV64I-NEXT: sw a1, 0(a0) 1676; RV64I-NEXT: ret 1677; 1678; RV64IZBA-LABEL: imm_store_i32_neg1: 1679; RV64IZBA: # %bb.0: 1680; RV64IZBA-NEXT: li a1, -1 1681; RV64IZBA-NEXT: sw a1, 0(a0) 1682; RV64IZBA-NEXT: ret 1683; 1684; RV64IZBB-LABEL: imm_store_i32_neg1: 1685; RV64IZBB: # %bb.0: 1686; RV64IZBB-NEXT: li a1, -1 1687; RV64IZBB-NEXT: sw a1, 0(a0) 1688; RV64IZBB-NEXT: ret 1689; 1690; RV64IZBS-LABEL: imm_store_i32_neg1: 1691; RV64IZBS: # %bb.0: 1692; RV64IZBS-NEXT: li a1, -1 1693; RV64IZBS-NEXT: sw a1, 0(a0) 1694; RV64IZBS-NEXT: ret 1695; 1696; RV64IXTHEADBB-LABEL: imm_store_i32_neg1: 1697; RV64IXTHEADBB: # %bb.0: 1698; RV64IXTHEADBB-NEXT: li a1, -1 1699; RV64IXTHEADBB-NEXT: sw a1, 0(a0) 1700; RV64IXTHEADBB-NEXT: ret 1701; 1702; RV32-REMAT-LABEL: imm_store_i32_neg1: 1703; RV32-REMAT: # %bb.0: 1704; RV32-REMAT-NEXT: li a1, -1 1705; RV32-REMAT-NEXT: sw a1, 0(a0) 1706; RV32-REMAT-NEXT: ret 1707; 1708; RV64-REMAT-LABEL: imm_store_i32_neg1: 1709; RV64-REMAT: # %bb.0: 1710; RV64-REMAT-NEXT: li a1, -1 1711; RV64-REMAT-NEXT: sw a1, 0(a0) 1712; RV64-REMAT-NEXT: ret 1713 store i32 -1, ptr %p 1714 ret void 1715} 1716 1717define i64 @imm_5372288229() { 1718; RV32I-LABEL: imm_5372288229: 1719; RV32I: # %bb.0: 1720; RV32I-NEXT: lui a0, 263018 1721; RV32I-NEXT: addi a0, a0, -795 1722; RV32I-NEXT: li a1, 1 1723; RV32I-NEXT: ret 1724; 1725; RV64I-LABEL: imm_5372288229: 1726; RV64I: # %bb.0: 1727; RV64I-NEXT: lui a0, 160 1728; RV64I-NEXT: addiw a0, a0, 437 1729; RV64I-NEXT: slli a0, a0, 13 1730; RV64I-NEXT: addi a0, a0, -795 1731; RV64I-NEXT: ret 1732; 1733; RV64IZBA-LABEL: imm_5372288229: 1734; RV64IZBA: # %bb.0: 1735; RV64IZBA-NEXT: lui a0, 655797 1736; RV64IZBA-NEXT: slli.uw a0, a0, 1 1737; RV64IZBA-NEXT: addi a0, a0, -795 1738; RV64IZBA-NEXT: ret 1739; 1740; RV64IZBB-LABEL: imm_5372288229: 1741; RV64IZBB: # %bb.0: 1742; RV64IZBB-NEXT: lui a0, 160 1743; RV64IZBB-NEXT: addiw a0, a0, 437 1744; RV64IZBB-NEXT: slli a0, a0, 13 1745; RV64IZBB-NEXT: addi a0, a0, -795 1746; RV64IZBB-NEXT: ret 1747; 1748; RV64IZBS-LABEL: imm_5372288229: 1749; RV64IZBS: # %bb.0: 1750; RV64IZBS-NEXT: lui a0, 263018 1751; RV64IZBS-NEXT: addiw a0, a0, -795 1752; RV64IZBS-NEXT: bseti a0, a0, 32 1753; RV64IZBS-NEXT: ret 1754; 1755; RV64IXTHEADBB-LABEL: imm_5372288229: 1756; RV64IXTHEADBB: # %bb.0: 1757; RV64IXTHEADBB-NEXT: lui a0, 160 1758; RV64IXTHEADBB-NEXT: addiw a0, a0, 437 1759; RV64IXTHEADBB-NEXT: slli a0, a0, 13 1760; RV64IXTHEADBB-NEXT: addi a0, a0, -795 1761; RV64IXTHEADBB-NEXT: ret 1762; 1763; RV32-REMAT-LABEL: imm_5372288229: 1764; RV32-REMAT: # %bb.0: 1765; RV32-REMAT-NEXT: lui a0, 263018 1766; RV32-REMAT-NEXT: addi a0, a0, -795 1767; RV32-REMAT-NEXT: li a1, 1 1768; RV32-REMAT-NEXT: ret 1769; 1770; RV64-REMAT-LABEL: imm_5372288229: 1771; RV64-REMAT: # %bb.0: 1772; RV64-REMAT-NEXT: lui a0, 160 1773; RV64-REMAT-NEXT: addiw a0, a0, 437 1774; RV64-REMAT-NEXT: slli a0, a0, 13 1775; RV64-REMAT-NEXT: addi a0, a0, -795 1776; RV64-REMAT-NEXT: ret 1777 ret i64 5372288229 1778} 1779 1780define i64 @imm_neg_5372288229() { 1781; RV32I-LABEL: imm_neg_5372288229: 1782; RV32I: # %bb.0: 1783; RV32I-NEXT: lui a0, 785558 1784; RV32I-NEXT: addi a0, a0, 795 1785; RV32I-NEXT: li a1, -2 1786; RV32I-NEXT: ret 1787; 1788; RV64I-LABEL: imm_neg_5372288229: 1789; RV64I: # %bb.0: 1790; RV64I-NEXT: lui a0, 1048416 1791; RV64I-NEXT: addiw a0, a0, -437 1792; RV64I-NEXT: slli a0, a0, 13 1793; RV64I-NEXT: addi a0, a0, 795 1794; RV64I-NEXT: ret 1795; 1796; RV64IZBA-LABEL: imm_neg_5372288229: 1797; RV64IZBA: # %bb.0: 1798; RV64IZBA-NEXT: lui a0, 611378 1799; RV64IZBA-NEXT: addiw a0, a0, 265 1800; RV64IZBA-NEXT: sh1add a0, a0, a0 1801; RV64IZBA-NEXT: ret 1802; 1803; RV64IZBB-LABEL: imm_neg_5372288229: 1804; RV64IZBB: # %bb.0: 1805; RV64IZBB-NEXT: lui a0, 1048416 1806; RV64IZBB-NEXT: addiw a0, a0, -437 1807; RV64IZBB-NEXT: slli a0, a0, 13 1808; RV64IZBB-NEXT: addi a0, a0, 795 1809; RV64IZBB-NEXT: ret 1810; 1811; RV64IZBS-LABEL: imm_neg_5372288229: 1812; RV64IZBS: # %bb.0: 1813; RV64IZBS-NEXT: lui a0, 785558 1814; RV64IZBS-NEXT: addiw a0, a0, 795 1815; RV64IZBS-NEXT: bclri a0, a0, 32 1816; RV64IZBS-NEXT: ret 1817; 1818; RV64IXTHEADBB-LABEL: imm_neg_5372288229: 1819; RV64IXTHEADBB: # %bb.0: 1820; RV64IXTHEADBB-NEXT: lui a0, 1048416 1821; RV64IXTHEADBB-NEXT: addiw a0, a0, -437 1822; RV64IXTHEADBB-NEXT: slli a0, a0, 13 1823; RV64IXTHEADBB-NEXT: addi a0, a0, 795 1824; RV64IXTHEADBB-NEXT: ret 1825; 1826; RV32-REMAT-LABEL: imm_neg_5372288229: 1827; RV32-REMAT: # %bb.0: 1828; RV32-REMAT-NEXT: lui a0, 785558 1829; RV32-REMAT-NEXT: addi a0, a0, 795 1830; RV32-REMAT-NEXT: li a1, -2 1831; RV32-REMAT-NEXT: ret 1832; 1833; RV64-REMAT-LABEL: imm_neg_5372288229: 1834; RV64-REMAT: # %bb.0: 1835; RV64-REMAT-NEXT: lui a0, 1048416 1836; RV64-REMAT-NEXT: addiw a0, a0, -437 1837; RV64-REMAT-NEXT: slli a0, a0, 13 1838; RV64-REMAT-NEXT: addi a0, a0, 795 1839; RV64-REMAT-NEXT: ret 1840 ret i64 -5372288229 1841} 1842 1843define i64 @imm_8953813715() { 1844; RV32I-LABEL: imm_8953813715: 1845; RV32I: # %bb.0: 1846; RV32I-NEXT: lui a0, 88838 1847; RV32I-NEXT: addi a0, a0, -1325 1848; RV32I-NEXT: li a1, 2 1849; RV32I-NEXT: ret 1850; 1851; RV64I-LABEL: imm_8953813715: 1852; RV64I: # %bb.0: 1853; RV64I-NEXT: lui a0, 267 1854; RV64I-NEXT: addiw a0, a0, -637 1855; RV64I-NEXT: slli a0, a0, 13 1856; RV64I-NEXT: addi a0, a0, -1325 1857; RV64I-NEXT: ret 1858; 1859; RV64IZBA-LABEL: imm_8953813715: 1860; RV64IZBA: # %bb.0: 1861; RV64IZBA-NEXT: lui a0, 437198 1862; RV64IZBA-NEXT: addiw a0, a0, -265 1863; RV64IZBA-NEXT: sh2add a0, a0, a0 1864; RV64IZBA-NEXT: ret 1865; 1866; RV64IZBB-LABEL: imm_8953813715: 1867; RV64IZBB: # %bb.0: 1868; RV64IZBB-NEXT: lui a0, 267 1869; RV64IZBB-NEXT: addiw a0, a0, -637 1870; RV64IZBB-NEXT: slli a0, a0, 13 1871; RV64IZBB-NEXT: addi a0, a0, -1325 1872; RV64IZBB-NEXT: ret 1873; 1874; RV64IZBS-LABEL: imm_8953813715: 1875; RV64IZBS: # %bb.0: 1876; RV64IZBS-NEXT: lui a0, 88838 1877; RV64IZBS-NEXT: addiw a0, a0, -1325 1878; RV64IZBS-NEXT: bseti a0, a0, 33 1879; RV64IZBS-NEXT: ret 1880; 1881; RV64IXTHEADBB-LABEL: imm_8953813715: 1882; RV64IXTHEADBB: # %bb.0: 1883; RV64IXTHEADBB-NEXT: lui a0, 267 1884; RV64IXTHEADBB-NEXT: addiw a0, a0, -637 1885; RV64IXTHEADBB-NEXT: slli a0, a0, 13 1886; RV64IXTHEADBB-NEXT: addi a0, a0, -1325 1887; RV64IXTHEADBB-NEXT: ret 1888; 1889; RV32-REMAT-LABEL: imm_8953813715: 1890; RV32-REMAT: # %bb.0: 1891; RV32-REMAT-NEXT: lui a0, 88838 1892; RV32-REMAT-NEXT: addi a0, a0, -1325 1893; RV32-REMAT-NEXT: li a1, 2 1894; RV32-REMAT-NEXT: ret 1895; 1896; RV64-REMAT-LABEL: imm_8953813715: 1897; RV64-REMAT: # %bb.0: 1898; RV64-REMAT-NEXT: lui a0, 267 1899; RV64-REMAT-NEXT: addiw a0, a0, -637 1900; RV64-REMAT-NEXT: slli a0, a0, 13 1901; RV64-REMAT-NEXT: addi a0, a0, -1325 1902; RV64-REMAT-NEXT: ret 1903 ret i64 8953813715 1904} 1905 1906define i64 @imm_neg_8953813715() { 1907; RV32I-LABEL: imm_neg_8953813715: 1908; RV32I: # %bb.0: 1909; RV32I-NEXT: lui a0, 959738 1910; RV32I-NEXT: addi a0, a0, 1325 1911; RV32I-NEXT: li a1, -3 1912; RV32I-NEXT: ret 1913; 1914; RV64I-LABEL: imm_neg_8953813715: 1915; RV64I: # %bb.0: 1916; RV64I-NEXT: lui a0, 1048309 1917; RV64I-NEXT: addiw a0, a0, 637 1918; RV64I-NEXT: slli a0, a0, 13 1919; RV64I-NEXT: addi a0, a0, 1325 1920; RV64I-NEXT: ret 1921; 1922; RV64IZBA-LABEL: imm_neg_8953813715: 1923; RV64IZBA: # %bb.0: 1924; RV64IZBA-NEXT: lui a0, 611378 1925; RV64IZBA-NEXT: addiw a0, a0, 265 1926; RV64IZBA-NEXT: sh2add a0, a0, a0 1927; RV64IZBA-NEXT: ret 1928; 1929; RV64IZBB-LABEL: imm_neg_8953813715: 1930; RV64IZBB: # %bb.0: 1931; RV64IZBB-NEXT: lui a0, 1048309 1932; RV64IZBB-NEXT: addiw a0, a0, 637 1933; RV64IZBB-NEXT: slli a0, a0, 13 1934; RV64IZBB-NEXT: addi a0, a0, 1325 1935; RV64IZBB-NEXT: ret 1936; 1937; RV64IZBS-LABEL: imm_neg_8953813715: 1938; RV64IZBS: # %bb.0: 1939; RV64IZBS-NEXT: lui a0, 959738 1940; RV64IZBS-NEXT: addiw a0, a0, 1325 1941; RV64IZBS-NEXT: bclri a0, a0, 33 1942; RV64IZBS-NEXT: ret 1943; 1944; RV64IXTHEADBB-LABEL: imm_neg_8953813715: 1945; RV64IXTHEADBB: # %bb.0: 1946; RV64IXTHEADBB-NEXT: lui a0, 1048309 1947; RV64IXTHEADBB-NEXT: addiw a0, a0, 637 1948; RV64IXTHEADBB-NEXT: slli a0, a0, 13 1949; RV64IXTHEADBB-NEXT: addi a0, a0, 1325 1950; RV64IXTHEADBB-NEXT: ret 1951; 1952; RV32-REMAT-LABEL: imm_neg_8953813715: 1953; RV32-REMAT: # %bb.0: 1954; RV32-REMAT-NEXT: lui a0, 959738 1955; RV32-REMAT-NEXT: addi a0, a0, 1325 1956; RV32-REMAT-NEXT: li a1, -3 1957; RV32-REMAT-NEXT: ret 1958; 1959; RV64-REMAT-LABEL: imm_neg_8953813715: 1960; RV64-REMAT: # %bb.0: 1961; RV64-REMAT-NEXT: lui a0, 1048309 1962; RV64-REMAT-NEXT: addiw a0, a0, 637 1963; RV64-REMAT-NEXT: slli a0, a0, 13 1964; RV64-REMAT-NEXT: addi a0, a0, 1325 1965; RV64-REMAT-NEXT: ret 1966 ret i64 -8953813715 1967} 1968 1969define i64 @imm_16116864687() { 1970; RV32I-LABEL: imm_16116864687: 1971; RV32I: # %bb.0: 1972; RV32I-NEXT: lui a0, 789053 1973; RV32I-NEXT: addi a0, a0, 1711 1974; RV32I-NEXT: li a1, 3 1975; RV32I-NEXT: ret 1976; 1977; RV64I-LABEL: imm_16116864687: 1978; RV64I: # %bb.0: 1979; RV64I-NEXT: lui a0, 961 1980; RV64I-NEXT: addiw a0, a0, -1475 1981; RV64I-NEXT: slli a0, a0, 12 1982; RV64I-NEXT: addi a0, a0, 1711 1983; RV64I-NEXT: ret 1984; 1985; RV64IZBA-LABEL: imm_16116864687: 1986; RV64IZBA: # %bb.0: 1987; RV64IZBA-NEXT: lui a0, 437198 1988; RV64IZBA-NEXT: addiw a0, a0, -265 1989; RV64IZBA-NEXT: sh3add a0, a0, a0 1990; RV64IZBA-NEXT: ret 1991; 1992; RV64IZBB-LABEL: imm_16116864687: 1993; RV64IZBB: # %bb.0: 1994; RV64IZBB-NEXT: lui a0, 961 1995; RV64IZBB-NEXT: addiw a0, a0, -1475 1996; RV64IZBB-NEXT: slli a0, a0, 12 1997; RV64IZBB-NEXT: addi a0, a0, 1711 1998; RV64IZBB-NEXT: ret 1999; 2000; RV64IZBS-LABEL: imm_16116864687: 2001; RV64IZBS: # %bb.0: 2002; RV64IZBS-NEXT: lui a0, 961 2003; RV64IZBS-NEXT: addiw a0, a0, -1475 2004; RV64IZBS-NEXT: slli a0, a0, 12 2005; RV64IZBS-NEXT: addi a0, a0, 1711 2006; RV64IZBS-NEXT: ret 2007; 2008; RV64IXTHEADBB-LABEL: imm_16116864687: 2009; RV64IXTHEADBB: # %bb.0: 2010; RV64IXTHEADBB-NEXT: lui a0, 961 2011; RV64IXTHEADBB-NEXT: addiw a0, a0, -1475 2012; RV64IXTHEADBB-NEXT: slli a0, a0, 12 2013; RV64IXTHEADBB-NEXT: addi a0, a0, 1711 2014; RV64IXTHEADBB-NEXT: ret 2015; 2016; RV32-REMAT-LABEL: imm_16116864687: 2017; RV32-REMAT: # %bb.0: 2018; RV32-REMAT-NEXT: lui a0, 789053 2019; RV32-REMAT-NEXT: addi a0, a0, 1711 2020; RV32-REMAT-NEXT: li a1, 3 2021; RV32-REMAT-NEXT: ret 2022; 2023; RV64-REMAT-LABEL: imm_16116864687: 2024; RV64-REMAT: # %bb.0: 2025; RV64-REMAT-NEXT: lui a0, 961 2026; RV64-REMAT-NEXT: addiw a0, a0, -1475 2027; RV64-REMAT-NEXT: slli a0, a0, 12 2028; RV64-REMAT-NEXT: addi a0, a0, 1711 2029; RV64-REMAT-NEXT: ret 2030 ret i64 16116864687 2031} 2032 2033define i64 @imm_neg_16116864687() { 2034; RV32I-LABEL: imm_neg_16116864687: 2035; RV32I: # %bb.0: 2036; RV32I-NEXT: lui a0, 259523 2037; RV32I-NEXT: addi a0, a0, -1711 2038; RV32I-NEXT: li a1, -4 2039; RV32I-NEXT: ret 2040; 2041; RV64I-LABEL: imm_neg_16116864687: 2042; RV64I: # %bb.0: 2043; RV64I-NEXT: lui a0, 1047615 2044; RV64I-NEXT: addiw a0, a0, 1475 2045; RV64I-NEXT: slli a0, a0, 12 2046; RV64I-NEXT: addi a0, a0, -1711 2047; RV64I-NEXT: ret 2048; 2049; RV64IZBA-LABEL: imm_neg_16116864687: 2050; RV64IZBA: # %bb.0: 2051; RV64IZBA-NEXT: lui a0, 611378 2052; RV64IZBA-NEXT: addiw a0, a0, 265 2053; RV64IZBA-NEXT: sh3add a0, a0, a0 2054; RV64IZBA-NEXT: ret 2055; 2056; RV64IZBB-LABEL: imm_neg_16116864687: 2057; RV64IZBB: # %bb.0: 2058; RV64IZBB-NEXT: lui a0, 1047615 2059; RV64IZBB-NEXT: addiw a0, a0, 1475 2060; RV64IZBB-NEXT: slli a0, a0, 12 2061; RV64IZBB-NEXT: addi a0, a0, -1711 2062; RV64IZBB-NEXT: ret 2063; 2064; RV64IZBS-LABEL: imm_neg_16116864687: 2065; RV64IZBS: # %bb.0: 2066; RV64IZBS-NEXT: lui a0, 1047615 2067; RV64IZBS-NEXT: addiw a0, a0, 1475 2068; RV64IZBS-NEXT: slli a0, a0, 12 2069; RV64IZBS-NEXT: addi a0, a0, -1711 2070; RV64IZBS-NEXT: ret 2071; 2072; RV64IXTHEADBB-LABEL: imm_neg_16116864687: 2073; RV64IXTHEADBB: # %bb.0: 2074; RV64IXTHEADBB-NEXT: lui a0, 1047615 2075; RV64IXTHEADBB-NEXT: addiw a0, a0, 1475 2076; RV64IXTHEADBB-NEXT: slli a0, a0, 12 2077; RV64IXTHEADBB-NEXT: addi a0, a0, -1711 2078; RV64IXTHEADBB-NEXT: ret 2079; 2080; RV32-REMAT-LABEL: imm_neg_16116864687: 2081; RV32-REMAT: # %bb.0: 2082; RV32-REMAT-NEXT: lui a0, 259523 2083; RV32-REMAT-NEXT: addi a0, a0, -1711 2084; RV32-REMAT-NEXT: li a1, -4 2085; RV32-REMAT-NEXT: ret 2086; 2087; RV64-REMAT-LABEL: imm_neg_16116864687: 2088; RV64-REMAT: # %bb.0: 2089; RV64-REMAT-NEXT: lui a0, 1047615 2090; RV64-REMAT-NEXT: addiw a0, a0, 1475 2091; RV64-REMAT-NEXT: slli a0, a0, 12 2092; RV64-REMAT-NEXT: addi a0, a0, -1711 2093; RV64-REMAT-NEXT: ret 2094 ret i64 -16116864687 2095} 2096 2097define i64 @imm_2344336315() { 2098; RV32I-LABEL: imm_2344336315: 2099; RV32I: # %bb.0: 2100; RV32I-NEXT: lui a0, 572348 2101; RV32I-NEXT: addi a0, a0, -1093 2102; RV32I-NEXT: li a1, 0 2103; RV32I-NEXT: ret 2104; 2105; RV64I-LABEL: imm_2344336315: 2106; RV64I: # %bb.0: 2107; RV64I-NEXT: lui a0, 143087 2108; RV64I-NEXT: slli a0, a0, 2 2109; RV64I-NEXT: addi a0, a0, -1093 2110; RV64I-NEXT: ret 2111; 2112; RV64IZBA-LABEL: imm_2344336315: 2113; RV64IZBA: # %bb.0: 2114; RV64IZBA-NEXT: lui a0, 143087 2115; RV64IZBA-NEXT: slli a0, a0, 2 2116; RV64IZBA-NEXT: addi a0, a0, -1093 2117; RV64IZBA-NEXT: ret 2118; 2119; RV64IZBB-LABEL: imm_2344336315: 2120; RV64IZBB: # %bb.0: 2121; RV64IZBB-NEXT: lui a0, 143087 2122; RV64IZBB-NEXT: slli a0, a0, 2 2123; RV64IZBB-NEXT: addi a0, a0, -1093 2124; RV64IZBB-NEXT: ret 2125; 2126; RV64IZBS-LABEL: imm_2344336315: 2127; RV64IZBS: # %bb.0: 2128; RV64IZBS-NEXT: lui a0, 143087 2129; RV64IZBS-NEXT: slli a0, a0, 2 2130; RV64IZBS-NEXT: addi a0, a0, -1093 2131; RV64IZBS-NEXT: ret 2132; 2133; RV64IXTHEADBB-LABEL: imm_2344336315: 2134; RV64IXTHEADBB: # %bb.0: 2135; RV64IXTHEADBB-NEXT: lui a0, 143087 2136; RV64IXTHEADBB-NEXT: slli a0, a0, 2 2137; RV64IXTHEADBB-NEXT: addi a0, a0, -1093 2138; RV64IXTHEADBB-NEXT: ret 2139; 2140; RV32-REMAT-LABEL: imm_2344336315: 2141; RV32-REMAT: # %bb.0: 2142; RV32-REMAT-NEXT: lui a0, 572348 2143; RV32-REMAT-NEXT: addi a0, a0, -1093 2144; RV32-REMAT-NEXT: li a1, 0 2145; RV32-REMAT-NEXT: ret 2146; 2147; RV64-REMAT-LABEL: imm_2344336315: 2148; RV64-REMAT: # %bb.0: 2149; RV64-REMAT-NEXT: lui a0, 143087 2150; RV64-REMAT-NEXT: slli a0, a0, 2 2151; RV64-REMAT-NEXT: addi a0, a0, -1093 2152; RV64-REMAT-NEXT: ret 2153 ret i64 2344336315 ; 0x8bbbbbbb 2154} 2155 2156define i64 @imm_70370820078523() { 2157; RV32I-LABEL: imm_70370820078523: 2158; RV32I: # %bb.0: 2159; RV32I-NEXT: lui a0, 506812 2160; RV32I-NEXT: addi a0, a0, -1093 2161; RV32I-NEXT: lui a1, 4 2162; RV32I-NEXT: ret 2163; 2164; RV64-NOPOOL-LABEL: imm_70370820078523: 2165; RV64-NOPOOL: # %bb.0: 2166; RV64-NOPOOL-NEXT: lui a0, 256 2167; RV64-NOPOOL-NEXT: addiw a0, a0, 31 2168; RV64-NOPOOL-NEXT: slli a0, a0, 12 2169; RV64-NOPOOL-NEXT: addi a0, a0, -273 2170; RV64-NOPOOL-NEXT: slli a0, a0, 14 2171; RV64-NOPOOL-NEXT: addi a0, a0, -1093 2172; RV64-NOPOOL-NEXT: ret 2173; 2174; RV64I-POOL-LABEL: imm_70370820078523: 2175; RV64I-POOL: # %bb.0: 2176; RV64I-POOL-NEXT: lui a0, %hi(.LCPI38_0) 2177; RV64I-POOL-NEXT: ld a0, %lo(.LCPI38_0)(a0) 2178; RV64I-POOL-NEXT: ret 2179; 2180; RV64IZBA-LABEL: imm_70370820078523: 2181; RV64IZBA: # %bb.0: 2182; RV64IZBA-NEXT: lui a0, 256 2183; RV64IZBA-NEXT: addiw a0, a0, 31 2184; RV64IZBA-NEXT: slli a0, a0, 12 2185; RV64IZBA-NEXT: addi a0, a0, -273 2186; RV64IZBA-NEXT: slli a0, a0, 14 2187; RV64IZBA-NEXT: addi a0, a0, -1093 2188; RV64IZBA-NEXT: ret 2189; 2190; RV64IZBB-LABEL: imm_70370820078523: 2191; RV64IZBB: # %bb.0: 2192; RV64IZBB-NEXT: lui a0, 256 2193; RV64IZBB-NEXT: addiw a0, a0, 31 2194; RV64IZBB-NEXT: slli a0, a0, 12 2195; RV64IZBB-NEXT: addi a0, a0, -273 2196; RV64IZBB-NEXT: slli a0, a0, 14 2197; RV64IZBB-NEXT: addi a0, a0, -1093 2198; RV64IZBB-NEXT: ret 2199; 2200; RV64IZBS-LABEL: imm_70370820078523: 2201; RV64IZBS: # %bb.0: 2202; RV64IZBS-NEXT: lui a0, 506812 2203; RV64IZBS-NEXT: addiw a0, a0, -1093 2204; RV64IZBS-NEXT: bseti a0, a0, 46 2205; RV64IZBS-NEXT: ret 2206; 2207; RV64IXTHEADBB-LABEL: imm_70370820078523: 2208; RV64IXTHEADBB: # %bb.0: 2209; RV64IXTHEADBB-NEXT: lui a0, 256 2210; RV64IXTHEADBB-NEXT: addiw a0, a0, 31 2211; RV64IXTHEADBB-NEXT: slli a0, a0, 12 2212; RV64IXTHEADBB-NEXT: addi a0, a0, -273 2213; RV64IXTHEADBB-NEXT: slli a0, a0, 14 2214; RV64IXTHEADBB-NEXT: addi a0, a0, -1093 2215; RV64IXTHEADBB-NEXT: ret 2216; 2217; RV32-REMAT-LABEL: imm_70370820078523: 2218; RV32-REMAT: # %bb.0: 2219; RV32-REMAT-NEXT: lui a0, 506812 2220; RV32-REMAT-NEXT: addi a0, a0, -1093 2221; RV32-REMAT-NEXT: lui a1, 4 2222; RV32-REMAT-NEXT: ret 2223; 2224; RV64-REMAT-LABEL: imm_70370820078523: 2225; RV64-REMAT: # %bb.0: 2226; RV64-REMAT-NEXT: lui a0, 256 2227; RV64-REMAT-NEXT: addiw a0, a0, 31 2228; RV64-REMAT-NEXT: slli a0, a0, 12 2229; RV64-REMAT-NEXT: addi a0, a0, -273 2230; RV64-REMAT-NEXT: slli a0, a0, 14 2231; RV64-REMAT-NEXT: addi a0, a0, -1093 2232; RV64-REMAT-NEXT: ret 2233 ret i64 70370820078523 ; 0x40007bbbbbbb 2234} 2235 2236define i64 @imm_neg_9223372034778874949() { 2237; RV32I-LABEL: imm_neg_9223372034778874949: 2238; RV32I: # %bb.0: 2239; RV32I-NEXT: lui a0, 506812 2240; RV32I-NEXT: addi a0, a0, -1093 2241; RV32I-NEXT: lui a1, 524288 2242; RV32I-NEXT: ret 2243; 2244; RV64I-LABEL: imm_neg_9223372034778874949: 2245; RV64I: # %bb.0: 2246; RV64I-NEXT: lui a0, 506812 2247; RV64I-NEXT: addiw a0, a0, -1093 2248; RV64I-NEXT: slli a1, a0, 63 2249; RV64I-NEXT: add a0, a0, a1 2250; RV64I-NEXT: ret 2251; 2252; RV64IZBA-LABEL: imm_neg_9223372034778874949: 2253; RV64IZBA: # %bb.0: 2254; RV64IZBA-NEXT: lui a0, 506812 2255; RV64IZBA-NEXT: addiw a0, a0, -1093 2256; RV64IZBA-NEXT: slli a1, a0, 63 2257; RV64IZBA-NEXT: add a0, a0, a1 2258; RV64IZBA-NEXT: ret 2259; 2260; RV64IZBB-LABEL: imm_neg_9223372034778874949: 2261; RV64IZBB: # %bb.0: 2262; RV64IZBB-NEXT: lui a0, 506812 2263; RV64IZBB-NEXT: addiw a0, a0, -1093 2264; RV64IZBB-NEXT: slli a1, a0, 63 2265; RV64IZBB-NEXT: add a0, a0, a1 2266; RV64IZBB-NEXT: ret 2267; 2268; RV64IZBS-LABEL: imm_neg_9223372034778874949: 2269; RV64IZBS: # %bb.0: 2270; RV64IZBS-NEXT: lui a0, 506812 2271; RV64IZBS-NEXT: addiw a0, a0, -1093 2272; RV64IZBS-NEXT: bseti a0, a0, 63 2273; RV64IZBS-NEXT: ret 2274; 2275; RV64IXTHEADBB-LABEL: imm_neg_9223372034778874949: 2276; RV64IXTHEADBB: # %bb.0: 2277; RV64IXTHEADBB-NEXT: lui a0, 506812 2278; RV64IXTHEADBB-NEXT: addiw a0, a0, -1093 2279; RV64IXTHEADBB-NEXT: slli a1, a0, 63 2280; RV64IXTHEADBB-NEXT: add a0, a0, a1 2281; RV64IXTHEADBB-NEXT: ret 2282; 2283; RV32-REMAT-LABEL: imm_neg_9223372034778874949: 2284; RV32-REMAT: # %bb.0: 2285; RV32-REMAT-NEXT: lui a0, 506812 2286; RV32-REMAT-NEXT: addi a0, a0, -1093 2287; RV32-REMAT-NEXT: lui a1, 524288 2288; RV32-REMAT-NEXT: ret 2289; 2290; RV64-REMAT-LABEL: imm_neg_9223372034778874949: 2291; RV64-REMAT: # %bb.0: 2292; RV64-REMAT-NEXT: lui a0, 506812 2293; RV64-REMAT-NEXT: addiw a0, a0, -1093 2294; RV64-REMAT-NEXT: slli a1, a0, 63 2295; RV64-REMAT-NEXT: add a0, a0, a1 2296; RV64-REMAT-NEXT: ret 2297 ret i64 -9223372034778874949 ; 0x800000007bbbbbbb 2298} 2299 2300define i64 @imm_neg_9223301666034697285() { 2301; RV32I-LABEL: imm_neg_9223301666034697285: 2302; RV32I: # %bb.0: 2303; RV32I-NEXT: lui a0, 506812 2304; RV32I-NEXT: addi a0, a0, -1093 2305; RV32I-NEXT: lui a1, 524292 2306; RV32I-NEXT: ret 2307; 2308; RV64-NOPOOL-LABEL: imm_neg_9223301666034697285: 2309; RV64-NOPOOL: # %bb.0: 2310; RV64-NOPOOL-NEXT: lui a0, 917505 2311; RV64-NOPOOL-NEXT: slli a0, a0, 8 2312; RV64-NOPOOL-NEXT: addi a0, a0, 31 2313; RV64-NOPOOL-NEXT: slli a0, a0, 12 2314; RV64-NOPOOL-NEXT: addi a0, a0, -273 2315; RV64-NOPOOL-NEXT: slli a0, a0, 14 2316; RV64-NOPOOL-NEXT: addi a0, a0, -1093 2317; RV64-NOPOOL-NEXT: ret 2318; 2319; RV64I-POOL-LABEL: imm_neg_9223301666034697285: 2320; RV64I-POOL: # %bb.0: 2321; RV64I-POOL-NEXT: lui a0, %hi(.LCPI40_0) 2322; RV64I-POOL-NEXT: ld a0, %lo(.LCPI40_0)(a0) 2323; RV64I-POOL-NEXT: ret 2324; 2325; RV64IZBA-LABEL: imm_neg_9223301666034697285: 2326; RV64IZBA: # %bb.0: 2327; RV64IZBA-NEXT: lui a0, 917505 2328; RV64IZBA-NEXT: slli a0, a0, 8 2329; RV64IZBA-NEXT: addi a0, a0, 31 2330; RV64IZBA-NEXT: slli a0, a0, 12 2331; RV64IZBA-NEXT: addi a0, a0, -273 2332; RV64IZBA-NEXT: slli a0, a0, 14 2333; RV64IZBA-NEXT: addi a0, a0, -1093 2334; RV64IZBA-NEXT: ret 2335; 2336; RV64IZBB-LABEL: imm_neg_9223301666034697285: 2337; RV64IZBB: # %bb.0: 2338; RV64IZBB-NEXT: lui a0, 917505 2339; RV64IZBB-NEXT: slli a0, a0, 8 2340; RV64IZBB-NEXT: addi a0, a0, 31 2341; RV64IZBB-NEXT: slli a0, a0, 12 2342; RV64IZBB-NEXT: addi a0, a0, -273 2343; RV64IZBB-NEXT: slli a0, a0, 14 2344; RV64IZBB-NEXT: addi a0, a0, -1093 2345; RV64IZBB-NEXT: ret 2346; 2347; RV64IZBS-LABEL: imm_neg_9223301666034697285: 2348; RV64IZBS: # %bb.0: 2349; RV64IZBS-NEXT: lui a0, 506812 2350; RV64IZBS-NEXT: addiw a0, a0, -1093 2351; RV64IZBS-NEXT: bseti a0, a0, 46 2352; RV64IZBS-NEXT: bseti a0, a0, 63 2353; RV64IZBS-NEXT: ret 2354; 2355; RV64IXTHEADBB-LABEL: imm_neg_9223301666034697285: 2356; RV64IXTHEADBB: # %bb.0: 2357; RV64IXTHEADBB-NEXT: lui a0, 917505 2358; RV64IXTHEADBB-NEXT: slli a0, a0, 8 2359; RV64IXTHEADBB-NEXT: addi a0, a0, 31 2360; RV64IXTHEADBB-NEXT: slli a0, a0, 12 2361; RV64IXTHEADBB-NEXT: addi a0, a0, -273 2362; RV64IXTHEADBB-NEXT: slli a0, a0, 14 2363; RV64IXTHEADBB-NEXT: addi a0, a0, -1093 2364; RV64IXTHEADBB-NEXT: ret 2365; 2366; RV32-REMAT-LABEL: imm_neg_9223301666034697285: 2367; RV32-REMAT: # %bb.0: 2368; RV32-REMAT-NEXT: lui a0, 506812 2369; RV32-REMAT-NEXT: addi a0, a0, -1093 2370; RV32-REMAT-NEXT: lui a1, 524292 2371; RV32-REMAT-NEXT: ret 2372; 2373; RV64-REMAT-LABEL: imm_neg_9223301666034697285: 2374; RV64-REMAT: # %bb.0: 2375; RV64-REMAT-NEXT: lui a0, 917505 2376; RV64-REMAT-NEXT: slli a0, a0, 8 2377; RV64-REMAT-NEXT: addi a0, a0, 31 2378; RV64-REMAT-NEXT: slli a0, a0, 12 2379; RV64-REMAT-NEXT: addi a0, a0, -273 2380; RV64-REMAT-NEXT: slli a0, a0, 14 2381; RV64-REMAT-NEXT: addi a0, a0, -1093 2382; RV64-REMAT-NEXT: ret 2383 ret i64 -9223301666034697285 ; 0x800040007bbbbbbb 2384} 2385 2386define i64 @imm_neg_2219066437() { 2387; RV32I-LABEL: imm_neg_2219066437: 2388; RV32I: # %bb.0: 2389; RV32I-NEXT: lui a0, 506812 2390; RV32I-NEXT: addi a0, a0, -1093 2391; RV32I-NEXT: li a1, -1 2392; RV32I-NEXT: ret 2393; 2394; RV64I-LABEL: imm_neg_2219066437: 2395; RV64I: # %bb.0: 2396; RV64I-NEXT: lui a0, 913135 2397; RV64I-NEXT: slli a0, a0, 2 2398; RV64I-NEXT: addi a0, a0, -1093 2399; RV64I-NEXT: ret 2400; 2401; RV64IZBA-LABEL: imm_neg_2219066437: 2402; RV64IZBA: # %bb.0: 2403; RV64IZBA-NEXT: lui a0, 913135 2404; RV64IZBA-NEXT: slli a0, a0, 2 2405; RV64IZBA-NEXT: addi a0, a0, -1093 2406; RV64IZBA-NEXT: ret 2407; 2408; RV64IZBB-LABEL: imm_neg_2219066437: 2409; RV64IZBB: # %bb.0: 2410; RV64IZBB-NEXT: lui a0, 913135 2411; RV64IZBB-NEXT: slli a0, a0, 2 2412; RV64IZBB-NEXT: addi a0, a0, -1093 2413; RV64IZBB-NEXT: ret 2414; 2415; RV64IZBS-LABEL: imm_neg_2219066437: 2416; RV64IZBS: # %bb.0: 2417; RV64IZBS-NEXT: lui a0, 913135 2418; RV64IZBS-NEXT: slli a0, a0, 2 2419; RV64IZBS-NEXT: addi a0, a0, -1093 2420; RV64IZBS-NEXT: ret 2421; 2422; RV64IXTHEADBB-LABEL: imm_neg_2219066437: 2423; RV64IXTHEADBB: # %bb.0: 2424; RV64IXTHEADBB-NEXT: lui a0, 913135 2425; RV64IXTHEADBB-NEXT: slli a0, a0, 2 2426; RV64IXTHEADBB-NEXT: addi a0, a0, -1093 2427; RV64IXTHEADBB-NEXT: ret 2428; 2429; RV32-REMAT-LABEL: imm_neg_2219066437: 2430; RV32-REMAT: # %bb.0: 2431; RV32-REMAT-NEXT: lui a0, 506812 2432; RV32-REMAT-NEXT: addi a0, a0, -1093 2433; RV32-REMAT-NEXT: li a1, -1 2434; RV32-REMAT-NEXT: ret 2435; 2436; RV64-REMAT-LABEL: imm_neg_2219066437: 2437; RV64-REMAT: # %bb.0: 2438; RV64-REMAT-NEXT: lui a0, 913135 2439; RV64-REMAT-NEXT: slli a0, a0, 2 2440; RV64-REMAT-NEXT: addi a0, a0, -1093 2441; RV64-REMAT-NEXT: ret 2442 ret i64 -2219066437 ; 0xffffffff7bbbbbbb 2443} 2444 2445define i64 @imm_neg_8798043653189() { 2446; RV32I-LABEL: imm_neg_8798043653189: 2447; RV32I: # %bb.0: 2448; RV32I-NEXT: lui a0, 572348 2449; RV32I-NEXT: lui a1, 1048575 2450; RV32I-NEXT: addi a0, a0, -1093 2451; RV32I-NEXT: addi a1, a1, 2047 2452; RV32I-NEXT: ret 2453; 2454; RV64I-LABEL: imm_neg_8798043653189: 2455; RV64I: # %bb.0: 2456; RV64I-NEXT: lui a0, 917475 2457; RV64I-NEXT: addiw a0, a0, -273 2458; RV64I-NEXT: slli a0, a0, 14 2459; RV64I-NEXT: addi a0, a0, -1093 2460; RV64I-NEXT: ret 2461; 2462; RV64IZBA-LABEL: imm_neg_8798043653189: 2463; RV64IZBA: # %bb.0: 2464; RV64IZBA-NEXT: lui a0, 917475 2465; RV64IZBA-NEXT: addiw a0, a0, -273 2466; RV64IZBA-NEXT: slli a0, a0, 14 2467; RV64IZBA-NEXT: addi a0, a0, -1093 2468; RV64IZBA-NEXT: ret 2469; 2470; RV64IZBB-LABEL: imm_neg_8798043653189: 2471; RV64IZBB: # %bb.0: 2472; RV64IZBB-NEXT: lui a0, 917475 2473; RV64IZBB-NEXT: addiw a0, a0, -273 2474; RV64IZBB-NEXT: slli a0, a0, 14 2475; RV64IZBB-NEXT: addi a0, a0, -1093 2476; RV64IZBB-NEXT: ret 2477; 2478; RV64IZBS-LABEL: imm_neg_8798043653189: 2479; RV64IZBS: # %bb.0: 2480; RV64IZBS-NEXT: lui a0, 572348 2481; RV64IZBS-NEXT: addiw a0, a0, -1093 2482; RV64IZBS-NEXT: bclri a0, a0, 43 2483; RV64IZBS-NEXT: ret 2484; 2485; RV64IXTHEADBB-LABEL: imm_neg_8798043653189: 2486; RV64IXTHEADBB: # %bb.0: 2487; RV64IXTHEADBB-NEXT: lui a0, 917475 2488; RV64IXTHEADBB-NEXT: addiw a0, a0, -273 2489; RV64IXTHEADBB-NEXT: slli a0, a0, 14 2490; RV64IXTHEADBB-NEXT: addi a0, a0, -1093 2491; RV64IXTHEADBB-NEXT: ret 2492; 2493; RV32-REMAT-LABEL: imm_neg_8798043653189: 2494; RV32-REMAT: # %bb.0: 2495; RV32-REMAT-NEXT: lui a0, 572348 2496; RV32-REMAT-NEXT: addi a0, a0, -1093 2497; RV32-REMAT-NEXT: lui a1, 1048575 2498; RV32-REMAT-NEXT: addi a1, a1, 2047 2499; RV32-REMAT-NEXT: ret 2500; 2501; RV64-REMAT-LABEL: imm_neg_8798043653189: 2502; RV64-REMAT: # %bb.0: 2503; RV64-REMAT-NEXT: lui a0, 917475 2504; RV64-REMAT-NEXT: addiw a0, a0, -273 2505; RV64-REMAT-NEXT: slli a0, a0, 14 2506; RV64-REMAT-NEXT: addi a0, a0, -1093 2507; RV64-REMAT-NEXT: ret 2508 ret i64 -8798043653189 ; 0xfffff7ff8bbbbbbb 2509} 2510 2511define i64 @imm_9223372034904144827() { 2512; RV32I-LABEL: imm_9223372034904144827: 2513; RV32I: # %bb.0: 2514; RV32I-NEXT: lui a0, 572348 2515; RV32I-NEXT: lui a1, 524288 2516; RV32I-NEXT: addi a0, a0, -1093 2517; RV32I-NEXT: addi a1, a1, -1 2518; RV32I-NEXT: ret 2519; 2520; RV64I-LABEL: imm_9223372034904144827: 2521; RV64I: # %bb.0: 2522; RV64I-NEXT: lui a0, 572348 2523; RV64I-NEXT: addiw a0, a0, -1093 2524; RV64I-NEXT: slli a1, a0, 63 2525; RV64I-NEXT: add a0, a0, a1 2526; RV64I-NEXT: ret 2527; 2528; RV64IZBA-LABEL: imm_9223372034904144827: 2529; RV64IZBA: # %bb.0: 2530; RV64IZBA-NEXT: lui a0, 572348 2531; RV64IZBA-NEXT: addiw a0, a0, -1093 2532; RV64IZBA-NEXT: slli a1, a0, 63 2533; RV64IZBA-NEXT: add a0, a0, a1 2534; RV64IZBA-NEXT: ret 2535; 2536; RV64IZBB-LABEL: imm_9223372034904144827: 2537; RV64IZBB: # %bb.0: 2538; RV64IZBB-NEXT: lui a0, 572348 2539; RV64IZBB-NEXT: addiw a0, a0, -1093 2540; RV64IZBB-NEXT: slli a1, a0, 63 2541; RV64IZBB-NEXT: add a0, a0, a1 2542; RV64IZBB-NEXT: ret 2543; 2544; RV64IZBS-LABEL: imm_9223372034904144827: 2545; RV64IZBS: # %bb.0: 2546; RV64IZBS-NEXT: lui a0, 572348 2547; RV64IZBS-NEXT: addiw a0, a0, -1093 2548; RV64IZBS-NEXT: bclri a0, a0, 63 2549; RV64IZBS-NEXT: ret 2550; 2551; RV64IXTHEADBB-LABEL: imm_9223372034904144827: 2552; RV64IXTHEADBB: # %bb.0: 2553; RV64IXTHEADBB-NEXT: lui a0, 572348 2554; RV64IXTHEADBB-NEXT: addiw a0, a0, -1093 2555; RV64IXTHEADBB-NEXT: slli a1, a0, 63 2556; RV64IXTHEADBB-NEXT: add a0, a0, a1 2557; RV64IXTHEADBB-NEXT: ret 2558; 2559; RV32-REMAT-LABEL: imm_9223372034904144827: 2560; RV32-REMAT: # %bb.0: 2561; RV32-REMAT-NEXT: lui a0, 572348 2562; RV32-REMAT-NEXT: addi a0, a0, -1093 2563; RV32-REMAT-NEXT: lui a1, 524288 2564; RV32-REMAT-NEXT: addi a1, a1, -1 2565; RV32-REMAT-NEXT: ret 2566; 2567; RV64-REMAT-LABEL: imm_9223372034904144827: 2568; RV64-REMAT: # %bb.0: 2569; RV64-REMAT-NEXT: lui a0, 572348 2570; RV64-REMAT-NEXT: addiw a0, a0, -1093 2571; RV64-REMAT-NEXT: slli a1, a0, 63 2572; RV64-REMAT-NEXT: add a0, a0, a1 2573; RV64-REMAT-NEXT: ret 2574 ret i64 9223372034904144827 ; 0x7fffffff8bbbbbbb 2575} 2576 2577define i64 @imm_neg_9223354442718100411() { 2578; RV32I-LABEL: imm_neg_9223354442718100411: 2579; RV32I: # %bb.0: 2580; RV32I-NEXT: lui a0, 572348 2581; RV32I-NEXT: lui a1, 524287 2582; RV32I-NEXT: addi a0, a0, -1093 2583; RV32I-NEXT: addi a1, a1, -1 2584; RV32I-NEXT: ret 2585; 2586; RV64-NOPOOL-LABEL: imm_neg_9223354442718100411: 2587; RV64-NOPOOL: # %bb.0: 2588; RV64-NOPOOL-NEXT: lui a0, 524287 2589; RV64-NOPOOL-NEXT: slli a0, a0, 6 2590; RV64-NOPOOL-NEXT: addi a0, a0, -29 2591; RV64-NOPOOL-NEXT: slli a0, a0, 12 2592; RV64-NOPOOL-NEXT: addi a0, a0, -273 2593; RV64-NOPOOL-NEXT: slli a0, a0, 14 2594; RV64-NOPOOL-NEXT: addi a0, a0, -1093 2595; RV64-NOPOOL-NEXT: ret 2596; 2597; RV64I-POOL-LABEL: imm_neg_9223354442718100411: 2598; RV64I-POOL: # %bb.0: 2599; RV64I-POOL-NEXT: lui a0, %hi(.LCPI44_0) 2600; RV64I-POOL-NEXT: ld a0, %lo(.LCPI44_0)(a0) 2601; RV64I-POOL-NEXT: ret 2602; 2603; RV64IZBA-LABEL: imm_neg_9223354442718100411: 2604; RV64IZBA: # %bb.0: 2605; RV64IZBA-NEXT: lui a0, 524287 2606; RV64IZBA-NEXT: slli a0, a0, 6 2607; RV64IZBA-NEXT: addi a0, a0, -29 2608; RV64IZBA-NEXT: slli a0, a0, 12 2609; RV64IZBA-NEXT: addi a0, a0, -273 2610; RV64IZBA-NEXT: slli a0, a0, 14 2611; RV64IZBA-NEXT: addi a0, a0, -1093 2612; RV64IZBA-NEXT: ret 2613; 2614; RV64IZBB-LABEL: imm_neg_9223354442718100411: 2615; RV64IZBB: # %bb.0: 2616; RV64IZBB-NEXT: lui a0, 524287 2617; RV64IZBB-NEXT: slli a0, a0, 6 2618; RV64IZBB-NEXT: addi a0, a0, -29 2619; RV64IZBB-NEXT: slli a0, a0, 12 2620; RV64IZBB-NEXT: addi a0, a0, -273 2621; RV64IZBB-NEXT: slli a0, a0, 14 2622; RV64IZBB-NEXT: addi a0, a0, -1093 2623; RV64IZBB-NEXT: ret 2624; 2625; RV64IZBS-LABEL: imm_neg_9223354442718100411: 2626; RV64IZBS: # %bb.0: 2627; RV64IZBS-NEXT: lui a0, 572348 2628; RV64IZBS-NEXT: addiw a0, a0, -1093 2629; RV64IZBS-NEXT: bclri a0, a0, 44 2630; RV64IZBS-NEXT: bclri a0, a0, 63 2631; RV64IZBS-NEXT: ret 2632; 2633; RV64IXTHEADBB-LABEL: imm_neg_9223354442718100411: 2634; RV64IXTHEADBB: # %bb.0: 2635; RV64IXTHEADBB-NEXT: lui a0, 524287 2636; RV64IXTHEADBB-NEXT: slli a0, a0, 6 2637; RV64IXTHEADBB-NEXT: addi a0, a0, -29 2638; RV64IXTHEADBB-NEXT: slli a0, a0, 12 2639; RV64IXTHEADBB-NEXT: addi a0, a0, -273 2640; RV64IXTHEADBB-NEXT: slli a0, a0, 14 2641; RV64IXTHEADBB-NEXT: addi a0, a0, -1093 2642; RV64IXTHEADBB-NEXT: ret 2643; 2644; RV32-REMAT-LABEL: imm_neg_9223354442718100411: 2645; RV32-REMAT: # %bb.0: 2646; RV32-REMAT-NEXT: lui a0, 572348 2647; RV32-REMAT-NEXT: addi a0, a0, -1093 2648; RV32-REMAT-NEXT: lui a1, 524287 2649; RV32-REMAT-NEXT: addi a1, a1, -1 2650; RV32-REMAT-NEXT: ret 2651; 2652; RV64-REMAT-LABEL: imm_neg_9223354442718100411: 2653; RV64-REMAT: # %bb.0: 2654; RV64-REMAT-NEXT: lui a0, 524287 2655; RV64-REMAT-NEXT: slli a0, a0, 6 2656; RV64-REMAT-NEXT: addi a0, a0, -29 2657; RV64-REMAT-NEXT: slli a0, a0, 12 2658; RV64-REMAT-NEXT: addi a0, a0, -273 2659; RV64-REMAT-NEXT: slli a0, a0, 14 2660; RV64-REMAT-NEXT: addi a0, a0, -1093 2661; RV64-REMAT-NEXT: ret 2662 ret i64 9223354442718100411 ; 0x7fffefff8bbbbbbb 2663} 2664 2665define i64 @imm_2863311530() { 2666; RV32I-LABEL: imm_2863311530: 2667; RV32I: # %bb.0: 2668; RV32I-NEXT: lui a0, 699051 2669; RV32I-NEXT: addi a0, a0, -1366 2670; RV32I-NEXT: li a1, 0 2671; RV32I-NEXT: ret 2672; 2673; RV64I-LABEL: imm_2863311530: 2674; RV64I: # %bb.0: 2675; RV64I-NEXT: lui a0, 349525 2676; RV64I-NEXT: addiw a0, a0, 1365 2677; RV64I-NEXT: slli a0, a0, 1 2678; RV64I-NEXT: ret 2679; 2680; RV64IZBA-LABEL: imm_2863311530: 2681; RV64IZBA: # %bb.0: 2682; RV64IZBA-NEXT: lui a0, 349525 2683; RV64IZBA-NEXT: addiw a0, a0, 1365 2684; RV64IZBA-NEXT: slli a0, a0, 1 2685; RV64IZBA-NEXT: ret 2686; 2687; RV64IZBB-LABEL: imm_2863311530: 2688; RV64IZBB: # %bb.0: 2689; RV64IZBB-NEXT: lui a0, 349525 2690; RV64IZBB-NEXT: addiw a0, a0, 1365 2691; RV64IZBB-NEXT: slli a0, a0, 1 2692; RV64IZBB-NEXT: ret 2693; 2694; RV64IZBS-LABEL: imm_2863311530: 2695; RV64IZBS: # %bb.0: 2696; RV64IZBS-NEXT: lui a0, 349525 2697; RV64IZBS-NEXT: addiw a0, a0, 1365 2698; RV64IZBS-NEXT: slli a0, a0, 1 2699; RV64IZBS-NEXT: ret 2700; 2701; RV64IXTHEADBB-LABEL: imm_2863311530: 2702; RV64IXTHEADBB: # %bb.0: 2703; RV64IXTHEADBB-NEXT: lui a0, 349525 2704; RV64IXTHEADBB-NEXT: addiw a0, a0, 1365 2705; RV64IXTHEADBB-NEXT: slli a0, a0, 1 2706; RV64IXTHEADBB-NEXT: ret 2707; 2708; RV32-REMAT-LABEL: imm_2863311530: 2709; RV32-REMAT: # %bb.0: 2710; RV32-REMAT-NEXT: lui a0, 699051 2711; RV32-REMAT-NEXT: addi a0, a0, -1366 2712; RV32-REMAT-NEXT: li a1, 0 2713; RV32-REMAT-NEXT: ret 2714; 2715; RV64-REMAT-LABEL: imm_2863311530: 2716; RV64-REMAT: # %bb.0: 2717; RV64-REMAT-NEXT: lui a0, 349525 2718; RV64-REMAT-NEXT: addiw a0, a0, 1365 2719; RV64-REMAT-NEXT: slli a0, a0, 1 2720; RV64-REMAT-NEXT: ret 2721 ret i64 2863311530 ; #0xaaaaaaaa 2722} 2723 2724define i64 @imm_neg_2863311530() { 2725; RV32I-LABEL: imm_neg_2863311530: 2726; RV32I: # %bb.0: 2727; RV32I-NEXT: lui a0, 349525 2728; RV32I-NEXT: addi a0, a0, 1366 2729; RV32I-NEXT: li a1, -1 2730; RV32I-NEXT: ret 2731; 2732; RV64I-LABEL: imm_neg_2863311530: 2733; RV64I: # %bb.0: 2734; RV64I-NEXT: lui a0, 699051 2735; RV64I-NEXT: addiw a0, a0, -1365 2736; RV64I-NEXT: slli a0, a0, 1 2737; RV64I-NEXT: ret 2738; 2739; RV64IZBA-LABEL: imm_neg_2863311530: 2740; RV64IZBA: # %bb.0: 2741; RV64IZBA-NEXT: lui a0, 699051 2742; RV64IZBA-NEXT: addiw a0, a0, -1365 2743; RV64IZBA-NEXT: slli a0, a0, 1 2744; RV64IZBA-NEXT: ret 2745; 2746; RV64IZBB-LABEL: imm_neg_2863311530: 2747; RV64IZBB: # %bb.0: 2748; RV64IZBB-NEXT: lui a0, 699051 2749; RV64IZBB-NEXT: addiw a0, a0, -1365 2750; RV64IZBB-NEXT: slli a0, a0, 1 2751; RV64IZBB-NEXT: ret 2752; 2753; RV64IZBS-LABEL: imm_neg_2863311530: 2754; RV64IZBS: # %bb.0: 2755; RV64IZBS-NEXT: lui a0, 699051 2756; RV64IZBS-NEXT: addiw a0, a0, -1365 2757; RV64IZBS-NEXT: slli a0, a0, 1 2758; RV64IZBS-NEXT: ret 2759; 2760; RV64IXTHEADBB-LABEL: imm_neg_2863311530: 2761; RV64IXTHEADBB: # %bb.0: 2762; RV64IXTHEADBB-NEXT: lui a0, 699051 2763; RV64IXTHEADBB-NEXT: addiw a0, a0, -1365 2764; RV64IXTHEADBB-NEXT: slli a0, a0, 1 2765; RV64IXTHEADBB-NEXT: ret 2766; 2767; RV32-REMAT-LABEL: imm_neg_2863311530: 2768; RV32-REMAT: # %bb.0: 2769; RV32-REMAT-NEXT: lui a0, 349525 2770; RV32-REMAT-NEXT: addi a0, a0, 1366 2771; RV32-REMAT-NEXT: li a1, -1 2772; RV32-REMAT-NEXT: ret 2773; 2774; RV64-REMAT-LABEL: imm_neg_2863311530: 2775; RV64-REMAT: # %bb.0: 2776; RV64-REMAT-NEXT: lui a0, 699051 2777; RV64-REMAT-NEXT: addiw a0, a0, -1365 2778; RV64-REMAT-NEXT: slli a0, a0, 1 2779; RV64-REMAT-NEXT: ret 2780 ret i64 -2863311530 ; #0xffffffff55555556 2781} 2782 2783define i64 @imm_2147486378() { 2784; RV32I-LABEL: imm_2147486378: 2785; RV32I: # %bb.0: 2786; RV32I-NEXT: lui a0, 524288 2787; RV32I-NEXT: addi a0, a0, 1365 2788; RV32I-NEXT: li a1, 0 2789; RV32I-NEXT: ret 2790; 2791; RV64I-LABEL: imm_2147486378: 2792; RV64I: # %bb.0: 2793; RV64I-NEXT: li a0, 1 2794; RV64I-NEXT: slli a0, a0, 31 2795; RV64I-NEXT: addi a0, a0, 1365 2796; RV64I-NEXT: ret 2797; 2798; RV64IZBA-LABEL: imm_2147486378: 2799; RV64IZBA: # %bb.0: 2800; RV64IZBA-NEXT: li a0, 1 2801; RV64IZBA-NEXT: slli a0, a0, 31 2802; RV64IZBA-NEXT: addi a0, a0, 1365 2803; RV64IZBA-NEXT: ret 2804; 2805; RV64IZBB-LABEL: imm_2147486378: 2806; RV64IZBB: # %bb.0: 2807; RV64IZBB-NEXT: li a0, 1 2808; RV64IZBB-NEXT: slli a0, a0, 31 2809; RV64IZBB-NEXT: addi a0, a0, 1365 2810; RV64IZBB-NEXT: ret 2811; 2812; RV64IZBS-LABEL: imm_2147486378: 2813; RV64IZBS: # %bb.0: 2814; RV64IZBS-NEXT: li a0, 1365 2815; RV64IZBS-NEXT: bseti a0, a0, 31 2816; RV64IZBS-NEXT: ret 2817; 2818; RV64IXTHEADBB-LABEL: imm_2147486378: 2819; RV64IXTHEADBB: # %bb.0: 2820; RV64IXTHEADBB-NEXT: li a0, 1 2821; RV64IXTHEADBB-NEXT: slli a0, a0, 31 2822; RV64IXTHEADBB-NEXT: addi a0, a0, 1365 2823; RV64IXTHEADBB-NEXT: ret 2824; 2825; RV32-REMAT-LABEL: imm_2147486378: 2826; RV32-REMAT: # %bb.0: 2827; RV32-REMAT-NEXT: lui a0, 524288 2828; RV32-REMAT-NEXT: addi a0, a0, 1365 2829; RV32-REMAT-NEXT: li a1, 0 2830; RV32-REMAT-NEXT: ret 2831; 2832; RV64-REMAT-LABEL: imm_2147486378: 2833; RV64-REMAT: # %bb.0: 2834; RV64-REMAT-NEXT: li a0, 1 2835; RV64-REMAT-NEXT: slli a0, a0, 31 2836; RV64-REMAT-NEXT: addi a0, a0, 1365 2837; RV64-REMAT-NEXT: ret 2838 ret i64 2147485013 2839} 2840 2841define i64 @imm_neg_2147485013() { 2842; RV32I-LABEL: imm_neg_2147485013: 2843; RV32I: # %bb.0: 2844; RV32I-NEXT: lui a0, 524288 2845; RV32I-NEXT: addi a0, a0, -1365 2846; RV32I-NEXT: li a1, -1 2847; RV32I-NEXT: ret 2848; 2849; RV64I-LABEL: imm_neg_2147485013: 2850; RV64I: # %bb.0: 2851; RV64I-NEXT: lui a0, 524288 2852; RV64I-NEXT: addi a0, a0, -1365 2853; RV64I-NEXT: ret 2854; 2855; RV64IZBA-LABEL: imm_neg_2147485013: 2856; RV64IZBA: # %bb.0: 2857; RV64IZBA-NEXT: lui a0, 524288 2858; RV64IZBA-NEXT: addi a0, a0, -1365 2859; RV64IZBA-NEXT: ret 2860; 2861; RV64IZBB-LABEL: imm_neg_2147485013: 2862; RV64IZBB: # %bb.0: 2863; RV64IZBB-NEXT: lui a0, 524288 2864; RV64IZBB-NEXT: addi a0, a0, -1365 2865; RV64IZBB-NEXT: ret 2866; 2867; RV64IZBS-LABEL: imm_neg_2147485013: 2868; RV64IZBS: # %bb.0: 2869; RV64IZBS-NEXT: lui a0, 524288 2870; RV64IZBS-NEXT: addi a0, a0, -1365 2871; RV64IZBS-NEXT: ret 2872; 2873; RV64IXTHEADBB-LABEL: imm_neg_2147485013: 2874; RV64IXTHEADBB: # %bb.0: 2875; RV64IXTHEADBB-NEXT: lui a0, 524288 2876; RV64IXTHEADBB-NEXT: addi a0, a0, -1365 2877; RV64IXTHEADBB-NEXT: ret 2878; 2879; RV32-REMAT-LABEL: imm_neg_2147485013: 2880; RV32-REMAT: # %bb.0: 2881; RV32-REMAT-NEXT: lui a0, 524288 2882; RV32-REMAT-NEXT: addi a0, a0, -1365 2883; RV32-REMAT-NEXT: li a1, -1 2884; RV32-REMAT-NEXT: ret 2885; 2886; RV64-REMAT-LABEL: imm_neg_2147485013: 2887; RV64-REMAT: # %bb.0: 2888; RV64-REMAT-NEXT: lui a0, 524288 2889; RV64-REMAT-NEXT: addi a0, a0, -1365 2890; RV64-REMAT-NEXT: ret 2891 ret i64 -2147485013 2892} 2893 2894define i64 @imm_12900924131259() { 2895; RV32I-LABEL: imm_12900924131259: 2896; RV32I: # %bb.0: 2897; RV32I-NEXT: lui a0, 765952 2898; RV32I-NEXT: lui a1, 1 2899; RV32I-NEXT: addi a0, a0, 1979 2900; RV32I-NEXT: addi a1, a1, -1093 2901; RV32I-NEXT: ret 2902; 2903; RV64I-LABEL: imm_12900924131259: 2904; RV64I: # %bb.0: 2905; RV64I-NEXT: lui a0, 188 2906; RV64I-NEXT: addiw a0, a0, -1093 2907; RV64I-NEXT: slli a0, a0, 24 2908; RV64I-NEXT: addi a0, a0, 1979 2909; RV64I-NEXT: ret 2910; 2911; RV64IZBA-LABEL: imm_12900924131259: 2912; RV64IZBA: # %bb.0: 2913; RV64IZBA-NEXT: lui a0, 768955 2914; RV64IZBA-NEXT: slli.uw a0, a0, 12 2915; RV64IZBA-NEXT: addi a0, a0, 1979 2916; RV64IZBA-NEXT: ret 2917; 2918; RV64IZBB-LABEL: imm_12900924131259: 2919; RV64IZBB: # %bb.0: 2920; RV64IZBB-NEXT: lui a0, 188 2921; RV64IZBB-NEXT: addiw a0, a0, -1093 2922; RV64IZBB-NEXT: slli a0, a0, 24 2923; RV64IZBB-NEXT: addi a0, a0, 1979 2924; RV64IZBB-NEXT: ret 2925; 2926; RV64IZBS-LABEL: imm_12900924131259: 2927; RV64IZBS: # %bb.0: 2928; RV64IZBS-NEXT: lui a0, 188 2929; RV64IZBS-NEXT: addiw a0, a0, -1093 2930; RV64IZBS-NEXT: slli a0, a0, 24 2931; RV64IZBS-NEXT: addi a0, a0, 1979 2932; RV64IZBS-NEXT: ret 2933; 2934; RV64IXTHEADBB-LABEL: imm_12900924131259: 2935; RV64IXTHEADBB: # %bb.0: 2936; RV64IXTHEADBB-NEXT: lui a0, 188 2937; RV64IXTHEADBB-NEXT: addiw a0, a0, -1093 2938; RV64IXTHEADBB-NEXT: slli a0, a0, 24 2939; RV64IXTHEADBB-NEXT: addi a0, a0, 1979 2940; RV64IXTHEADBB-NEXT: ret 2941; 2942; RV32-REMAT-LABEL: imm_12900924131259: 2943; RV32-REMAT: # %bb.0: 2944; RV32-REMAT-NEXT: lui a0, 765952 2945; RV32-REMAT-NEXT: addi a0, a0, 1979 2946; RV32-REMAT-NEXT: lui a1, 1 2947; RV32-REMAT-NEXT: addi a1, a1, -1093 2948; RV32-REMAT-NEXT: ret 2949; 2950; RV64-REMAT-LABEL: imm_12900924131259: 2951; RV64-REMAT: # %bb.0: 2952; RV64-REMAT-NEXT: lui a0, 188 2953; RV64-REMAT-NEXT: addiw a0, a0, -1093 2954; RV64-REMAT-NEXT: slli a0, a0, 24 2955; RV64-REMAT-NEXT: addi a0, a0, 1979 2956; RV64-REMAT-NEXT: ret 2957 ret i64 12900924131259 2958} 2959 2960define i64 @imm_50394234880() { 2961; RV32I-LABEL: imm_50394234880: 2962; RV32I: # %bb.0: 2963; RV32I-NEXT: lui a0, 768944 2964; RV32I-NEXT: li a1, 11 2965; RV32I-NEXT: ret 2966; 2967; RV64I-LABEL: imm_50394234880: 2968; RV64I: # %bb.0: 2969; RV64I-NEXT: lui a0, 188 2970; RV64I-NEXT: addiw a0, a0, -1093 2971; RV64I-NEXT: slli a0, a0, 16 2972; RV64I-NEXT: ret 2973; 2974; RV64IZBA-LABEL: imm_50394234880: 2975; RV64IZBA: # %bb.0: 2976; RV64IZBA-NEXT: lui a0, 768955 2977; RV64IZBA-NEXT: slli.uw a0, a0, 4 2978; RV64IZBA-NEXT: ret 2979; 2980; RV64IZBB-LABEL: imm_50394234880: 2981; RV64IZBB: # %bb.0: 2982; RV64IZBB-NEXT: lui a0, 188 2983; RV64IZBB-NEXT: addiw a0, a0, -1093 2984; RV64IZBB-NEXT: slli a0, a0, 16 2985; RV64IZBB-NEXT: ret 2986; 2987; RV64IZBS-LABEL: imm_50394234880: 2988; RV64IZBS: # %bb.0: 2989; RV64IZBS-NEXT: lui a0, 188 2990; RV64IZBS-NEXT: addiw a0, a0, -1093 2991; RV64IZBS-NEXT: slli a0, a0, 16 2992; RV64IZBS-NEXT: ret 2993; 2994; RV64IXTHEADBB-LABEL: imm_50394234880: 2995; RV64IXTHEADBB: # %bb.0: 2996; RV64IXTHEADBB-NEXT: lui a0, 188 2997; RV64IXTHEADBB-NEXT: addiw a0, a0, -1093 2998; RV64IXTHEADBB-NEXT: slli a0, a0, 16 2999; RV64IXTHEADBB-NEXT: ret 3000; 3001; RV32-REMAT-LABEL: imm_50394234880: 3002; RV32-REMAT: # %bb.0: 3003; RV32-REMAT-NEXT: lui a0, 768944 3004; RV32-REMAT-NEXT: li a1, 11 3005; RV32-REMAT-NEXT: ret 3006; 3007; RV64-REMAT-LABEL: imm_50394234880: 3008; RV64-REMAT: # %bb.0: 3009; RV64-REMAT-NEXT: lui a0, 188 3010; RV64-REMAT-NEXT: addiw a0, a0, -1093 3011; RV64-REMAT-NEXT: slli a0, a0, 16 3012; RV64-REMAT-NEXT: ret 3013 ret i64 50394234880 3014} 3015 3016define i64 @imm_12900936431479() { 3017; RV32I-LABEL: imm_12900936431479: 3018; RV32I: # %bb.0: 3019; RV32I-NEXT: lui a0, 768955 3020; RV32I-NEXT: lui a1, 1 3021; RV32I-NEXT: addi a0, a0, 1911 3022; RV32I-NEXT: addi a1, a1, -1093 3023; RV32I-NEXT: ret 3024; 3025; RV64I-LABEL: imm_12900936431479: 3026; RV64I: # %bb.0: 3027; RV64I-NEXT: lui a0, 192239 3028; RV64I-NEXT: slli a0, a0, 2 3029; RV64I-NEXT: addi a0, a0, -1093 3030; RV64I-NEXT: slli a0, a0, 12 3031; RV64I-NEXT: addi a0, a0, 1911 3032; RV64I-NEXT: ret 3033; 3034; RV64IZBA-LABEL: imm_12900936431479: 3035; RV64IZBA: # %bb.0: 3036; RV64IZBA-NEXT: lui a0, 768956 3037; RV64IZBA-NEXT: addi a0, a0, -1093 3038; RV64IZBA-NEXT: slli.uw a0, a0, 12 3039; RV64IZBA-NEXT: addi a0, a0, 1911 3040; RV64IZBA-NEXT: ret 3041; 3042; RV64IZBB-LABEL: imm_12900936431479: 3043; RV64IZBB: # %bb.0: 3044; RV64IZBB-NEXT: lui a0, 192239 3045; RV64IZBB-NEXT: slli a0, a0, 2 3046; RV64IZBB-NEXT: addi a0, a0, -1093 3047; RV64IZBB-NEXT: slli a0, a0, 12 3048; RV64IZBB-NEXT: addi a0, a0, 1911 3049; RV64IZBB-NEXT: ret 3050; 3051; RV64IZBS-LABEL: imm_12900936431479: 3052; RV64IZBS: # %bb.0: 3053; RV64IZBS-NEXT: lui a0, 192239 3054; RV64IZBS-NEXT: slli a0, a0, 2 3055; RV64IZBS-NEXT: addi a0, a0, -1093 3056; RV64IZBS-NEXT: slli a0, a0, 12 3057; RV64IZBS-NEXT: addi a0, a0, 1911 3058; RV64IZBS-NEXT: ret 3059; 3060; RV64IXTHEADBB-LABEL: imm_12900936431479: 3061; RV64IXTHEADBB: # %bb.0: 3062; RV64IXTHEADBB-NEXT: lui a0, 192239 3063; RV64IXTHEADBB-NEXT: slli a0, a0, 2 3064; RV64IXTHEADBB-NEXT: addi a0, a0, -1093 3065; RV64IXTHEADBB-NEXT: slli a0, a0, 12 3066; RV64IXTHEADBB-NEXT: addi a0, a0, 1911 3067; RV64IXTHEADBB-NEXT: ret 3068; 3069; RV32-REMAT-LABEL: imm_12900936431479: 3070; RV32-REMAT: # %bb.0: 3071; RV32-REMAT-NEXT: lui a0, 768955 3072; RV32-REMAT-NEXT: addi a0, a0, 1911 3073; RV32-REMAT-NEXT: lui a1, 1 3074; RV32-REMAT-NEXT: addi a1, a1, -1093 3075; RV32-REMAT-NEXT: ret 3076; 3077; RV64-REMAT-LABEL: imm_12900936431479: 3078; RV64-REMAT: # %bb.0: 3079; RV64-REMAT-NEXT: lui a0, 192239 3080; RV64-REMAT-NEXT: slli a0, a0, 2 3081; RV64-REMAT-NEXT: addi a0, a0, -1093 3082; RV64-REMAT-NEXT: slli a0, a0, 12 3083; RV64-REMAT-NEXT: addi a0, a0, 1911 3084; RV64-REMAT-NEXT: ret 3085 ret i64 12900936431479 3086} 3087 3088define i64 @imm_12900918536874() { 3089; RV32I-LABEL: imm_12900918536874: 3090; RV32I: # %bb.0: 3091; RV32I-NEXT: lui a0, 764587 3092; RV32I-NEXT: lui a1, 1 3093; RV32I-NEXT: addi a0, a0, -1366 3094; RV32I-NEXT: addi a1, a1, -1093 3095; RV32I-NEXT: ret 3096; 3097; RV64I-LABEL: imm_12900918536874: 3098; RV64I: # %bb.0: 3099; RV64I-NEXT: lui a0, 384477 3100; RV64I-NEXT: addiw a0, a0, 1365 3101; RV64I-NEXT: slli a0, a0, 12 3102; RV64I-NEXT: addi a0, a0, 1365 3103; RV64I-NEXT: slli a0, a0, 1 3104; RV64I-NEXT: ret 3105; 3106; RV64IZBA-LABEL: imm_12900918536874: 3107; RV64IZBA: # %bb.0: 3108; RV64IZBA-NEXT: lui a0, 768955 3109; RV64IZBA-NEXT: addi a0, a0, -1365 3110; RV64IZBA-NEXT: slli.uw a0, a0, 12 3111; RV64IZBA-NEXT: addi a0, a0, -1366 3112; RV64IZBA-NEXT: ret 3113; 3114; RV64IZBB-LABEL: imm_12900918536874: 3115; RV64IZBB: # %bb.0: 3116; RV64IZBB-NEXT: lui a0, 384477 3117; RV64IZBB-NEXT: addiw a0, a0, 1365 3118; RV64IZBB-NEXT: slli a0, a0, 12 3119; RV64IZBB-NEXT: addi a0, a0, 1365 3120; RV64IZBB-NEXT: slli a0, a0, 1 3121; RV64IZBB-NEXT: ret 3122; 3123; RV64IZBS-LABEL: imm_12900918536874: 3124; RV64IZBS: # %bb.0: 3125; RV64IZBS-NEXT: lui a0, 384477 3126; RV64IZBS-NEXT: addiw a0, a0, 1365 3127; RV64IZBS-NEXT: slli a0, a0, 12 3128; RV64IZBS-NEXT: addi a0, a0, 1365 3129; RV64IZBS-NEXT: slli a0, a0, 1 3130; RV64IZBS-NEXT: ret 3131; 3132; RV64IXTHEADBB-LABEL: imm_12900918536874: 3133; RV64IXTHEADBB: # %bb.0: 3134; RV64IXTHEADBB-NEXT: lui a0, 384477 3135; RV64IXTHEADBB-NEXT: addiw a0, a0, 1365 3136; RV64IXTHEADBB-NEXT: slli a0, a0, 12 3137; RV64IXTHEADBB-NEXT: addi a0, a0, 1365 3138; RV64IXTHEADBB-NEXT: slli a0, a0, 1 3139; RV64IXTHEADBB-NEXT: ret 3140; 3141; RV32-REMAT-LABEL: imm_12900918536874: 3142; RV32-REMAT: # %bb.0: 3143; RV32-REMAT-NEXT: lui a0, 764587 3144; RV32-REMAT-NEXT: addi a0, a0, -1366 3145; RV32-REMAT-NEXT: lui a1, 1 3146; RV32-REMAT-NEXT: addi a1, a1, -1093 3147; RV32-REMAT-NEXT: ret 3148; 3149; RV64-REMAT-LABEL: imm_12900918536874: 3150; RV64-REMAT: # %bb.0: 3151; RV64-REMAT-NEXT: lui a0, 384477 3152; RV64-REMAT-NEXT: addiw a0, a0, 1365 3153; RV64-REMAT-NEXT: slli a0, a0, 12 3154; RV64-REMAT-NEXT: addi a0, a0, 1365 3155; RV64-REMAT-NEXT: slli a0, a0, 1 3156; RV64-REMAT-NEXT: ret 3157 ret i64 12900918536874 3158} 3159 3160define i64 @imm_12900925247761() { 3161; RV32I-LABEL: imm_12900925247761: 3162; RV32I: # %bb.0: 3163; RV32I-NEXT: lui a0, 766225 3164; RV32I-NEXT: lui a1, 1 3165; RV32I-NEXT: addi a0, a0, 273 3166; RV32I-NEXT: addi a1, a1, -1093 3167; RV32I-NEXT: ret 3168; 3169; RV64I-LABEL: imm_12900925247761: 3170; RV64I: # %bb.0: 3171; RV64I-NEXT: lui a0, 384478 3172; RV64I-NEXT: addiw a0, a0, -1911 3173; RV64I-NEXT: slli a0, a0, 13 3174; RV64I-NEXT: addi a0, a0, -2048 3175; RV64I-NEXT: addi a0, a0, -1775 3176; RV64I-NEXT: ret 3177; 3178; RV64IZBA-LABEL: imm_12900925247761: 3179; RV64IZBA: # %bb.0: 3180; RV64IZBA-NEXT: lui a0, 768955 3181; RV64IZBA-NEXT: addi a0, a0, 273 3182; RV64IZBA-NEXT: slli.uw a0, a0, 12 3183; RV64IZBA-NEXT: addi a0, a0, 273 3184; RV64IZBA-NEXT: ret 3185; 3186; RV64IZBB-LABEL: imm_12900925247761: 3187; RV64IZBB: # %bb.0: 3188; RV64IZBB-NEXT: lui a0, 384478 3189; RV64IZBB-NEXT: addiw a0, a0, -1911 3190; RV64IZBB-NEXT: slli a0, a0, 13 3191; RV64IZBB-NEXT: addi a0, a0, -2048 3192; RV64IZBB-NEXT: addi a0, a0, -1775 3193; RV64IZBB-NEXT: ret 3194; 3195; RV64IZBS-LABEL: imm_12900925247761: 3196; RV64IZBS: # %bb.0: 3197; RV64IZBS-NEXT: lui a0, 384478 3198; RV64IZBS-NEXT: addiw a0, a0, -1911 3199; RV64IZBS-NEXT: slli a0, a0, 13 3200; RV64IZBS-NEXT: addi a0, a0, -2048 3201; RV64IZBS-NEXT: addi a0, a0, -1775 3202; RV64IZBS-NEXT: ret 3203; 3204; RV64IXTHEADBB-LABEL: imm_12900925247761: 3205; RV64IXTHEADBB: # %bb.0: 3206; RV64IXTHEADBB-NEXT: lui a0, 384478 3207; RV64IXTHEADBB-NEXT: addiw a0, a0, -1911 3208; RV64IXTHEADBB-NEXT: slli a0, a0, 13 3209; RV64IXTHEADBB-NEXT: addi a0, a0, -2048 3210; RV64IXTHEADBB-NEXT: addi a0, a0, -1775 3211; RV64IXTHEADBB-NEXT: ret 3212; 3213; RV32-REMAT-LABEL: imm_12900925247761: 3214; RV32-REMAT: # %bb.0: 3215; RV32-REMAT-NEXT: lui a0, 766225 3216; RV32-REMAT-NEXT: addi a0, a0, 273 3217; RV32-REMAT-NEXT: lui a1, 1 3218; RV32-REMAT-NEXT: addi a1, a1, -1093 3219; RV32-REMAT-NEXT: ret 3220; 3221; RV64-REMAT-LABEL: imm_12900925247761: 3222; RV64-REMAT: # %bb.0: 3223; RV64-REMAT-NEXT: lui a0, 384478 3224; RV64-REMAT-NEXT: addiw a0, a0, -1911 3225; RV64-REMAT-NEXT: slli a0, a0, 13 3226; RV64-REMAT-NEXT: addi a0, a0, -2048 3227; RV64-REMAT-NEXT: addi a0, a0, -1775 3228; RV64-REMAT-NEXT: ret 3229 ret i64 12900925247761 3230} 3231 3232define i64 @imm_7158272001() { 3233; RV32I-LABEL: imm_7158272001: 3234; RV32I: # %bb.0: 3235; RV32I-NEXT: lui a0, 699049 3236; RV32I-NEXT: addi a0, a0, 1 3237; RV32I-NEXT: li a1, 1 3238; RV32I-NEXT: ret 3239; 3240; RV64I-LABEL: imm_7158272001: 3241; RV64I: # %bb.0: 3242; RV64I-NEXT: lui a0, 427 3243; RV64I-NEXT: addiw a0, a0, -1367 3244; RV64I-NEXT: slli a0, a0, 12 3245; RV64I-NEXT: addi a0, a0, 1 3246; RV64I-NEXT: ret 3247; 3248; RV64IZBA-LABEL: imm_7158272001: 3249; RV64IZBA: # %bb.0: 3250; RV64IZBA-NEXT: lui a0, 349525 3251; RV64IZBA-NEXT: sh2add a0, a0, a0 3252; RV64IZBA-NEXT: addi a0, a0, 1 3253; RV64IZBA-NEXT: ret 3254; 3255; RV64IZBB-LABEL: imm_7158272001: 3256; RV64IZBB: # %bb.0: 3257; RV64IZBB-NEXT: lui a0, 427 3258; RV64IZBB-NEXT: addiw a0, a0, -1367 3259; RV64IZBB-NEXT: slli a0, a0, 12 3260; RV64IZBB-NEXT: addi a0, a0, 1 3261; RV64IZBB-NEXT: ret 3262; 3263; RV64IZBS-LABEL: imm_7158272001: 3264; RV64IZBS: # %bb.0: 3265; RV64IZBS-NEXT: lui a0, 427 3266; RV64IZBS-NEXT: addiw a0, a0, -1367 3267; RV64IZBS-NEXT: slli a0, a0, 12 3268; RV64IZBS-NEXT: addi a0, a0, 1 3269; RV64IZBS-NEXT: ret 3270; 3271; RV64IXTHEADBB-LABEL: imm_7158272001: 3272; RV64IXTHEADBB: # %bb.0: 3273; RV64IXTHEADBB-NEXT: lui a0, 427 3274; RV64IXTHEADBB-NEXT: addiw a0, a0, -1367 3275; RV64IXTHEADBB-NEXT: slli a0, a0, 12 3276; RV64IXTHEADBB-NEXT: addi a0, a0, 1 3277; RV64IXTHEADBB-NEXT: ret 3278; 3279; RV32-REMAT-LABEL: imm_7158272001: 3280; RV32-REMAT: # %bb.0: 3281; RV32-REMAT-NEXT: lui a0, 699049 3282; RV32-REMAT-NEXT: addi a0, a0, 1 3283; RV32-REMAT-NEXT: li a1, 1 3284; RV32-REMAT-NEXT: ret 3285; 3286; RV64-REMAT-LABEL: imm_7158272001: 3287; RV64-REMAT: # %bb.0: 3288; RV64-REMAT-NEXT: lui a0, 427 3289; RV64-REMAT-NEXT: addiw a0, a0, -1367 3290; RV64-REMAT-NEXT: slli a0, a0, 12 3291; RV64-REMAT-NEXT: addi a0, a0, 1 3292; RV64-REMAT-NEXT: ret 3293 ret i64 7158272001 ; 0x0000_0001_aaaa_9001 3294} 3295 3296define i64 @imm_12884889601() { 3297; RV32I-LABEL: imm_12884889601: 3298; RV32I: # %bb.0: 3299; RV32I-NEXT: lui a0, 1048573 3300; RV32I-NEXT: addi a0, a0, 1 3301; RV32I-NEXT: li a1, 2 3302; RV32I-NEXT: ret 3303; 3304; RV64I-LABEL: imm_12884889601: 3305; RV64I: # %bb.0: 3306; RV64I-NEXT: lui a0, 768 3307; RV64I-NEXT: addiw a0, a0, -3 3308; RV64I-NEXT: slli a0, a0, 12 3309; RV64I-NEXT: addi a0, a0, 1 3310; RV64I-NEXT: ret 3311; 3312; RV64IZBA-LABEL: imm_12884889601: 3313; RV64IZBA: # %bb.0: 3314; RV64IZBA-NEXT: lui a0, 349525 3315; RV64IZBA-NEXT: sh3add a0, a0, a0 3316; RV64IZBA-NEXT: addi a0, a0, 1 3317; RV64IZBA-NEXT: ret 3318; 3319; RV64IZBB-LABEL: imm_12884889601: 3320; RV64IZBB: # %bb.0: 3321; RV64IZBB-NEXT: lui a0, 768 3322; RV64IZBB-NEXT: addiw a0, a0, -3 3323; RV64IZBB-NEXT: slli a0, a0, 12 3324; RV64IZBB-NEXT: addi a0, a0, 1 3325; RV64IZBB-NEXT: ret 3326; 3327; RV64IZBS-LABEL: imm_12884889601: 3328; RV64IZBS: # %bb.0: 3329; RV64IZBS-NEXT: lui a0, 768 3330; RV64IZBS-NEXT: addiw a0, a0, -3 3331; RV64IZBS-NEXT: slli a0, a0, 12 3332; RV64IZBS-NEXT: addi a0, a0, 1 3333; RV64IZBS-NEXT: ret 3334; 3335; RV64IXTHEADBB-LABEL: imm_12884889601: 3336; RV64IXTHEADBB: # %bb.0: 3337; RV64IXTHEADBB-NEXT: lui a0, 768 3338; RV64IXTHEADBB-NEXT: addiw a0, a0, -3 3339; RV64IXTHEADBB-NEXT: slli a0, a0, 12 3340; RV64IXTHEADBB-NEXT: addi a0, a0, 1 3341; RV64IXTHEADBB-NEXT: ret 3342; 3343; RV32-REMAT-LABEL: imm_12884889601: 3344; RV32-REMAT: # %bb.0: 3345; RV32-REMAT-NEXT: lui a0, 1048573 3346; RV32-REMAT-NEXT: addi a0, a0, 1 3347; RV32-REMAT-NEXT: li a1, 2 3348; RV32-REMAT-NEXT: ret 3349; 3350; RV64-REMAT-LABEL: imm_12884889601: 3351; RV64-REMAT: # %bb.0: 3352; RV64-REMAT-NEXT: lui a0, 768 3353; RV64-REMAT-NEXT: addiw a0, a0, -3 3354; RV64-REMAT-NEXT: slli a0, a0, 12 3355; RV64-REMAT-NEXT: addi a0, a0, 1 3356; RV64-REMAT-NEXT: ret 3357 ret i64 12884889601 ; 0x0000_0002_ffff_d001 3358} 3359 3360define i64 @imm_neg_3435982847() { 3361; RV32I-LABEL: imm_neg_3435982847: 3362; RV32I: # %bb.0: 3363; RV32I-NEXT: lui a0, 209713 3364; RV32I-NEXT: addi a0, a0, 1 3365; RV32I-NEXT: li a1, -1 3366; RV32I-NEXT: ret 3367; 3368; RV64I-LABEL: imm_neg_3435982847: 3369; RV64I: # %bb.0: 3370; RV64I-NEXT: lui a0, 1048371 3371; RV64I-NEXT: addiw a0, a0, 817 3372; RV64I-NEXT: slli a0, a0, 12 3373; RV64I-NEXT: addi a0, a0, 1 3374; RV64I-NEXT: ret 3375; 3376; RV64IZBA-LABEL: imm_neg_3435982847: 3377; RV64IZBA: # %bb.0: 3378; RV64IZBA-NEXT: lui a0, 768955 3379; RV64IZBA-NEXT: sh1add a0, a0, a0 3380; RV64IZBA-NEXT: addi a0, a0, 1 3381; RV64IZBA-NEXT: ret 3382; 3383; RV64IZBB-LABEL: imm_neg_3435982847: 3384; RV64IZBB: # %bb.0: 3385; RV64IZBB-NEXT: lui a0, 1048371 3386; RV64IZBB-NEXT: addiw a0, a0, 817 3387; RV64IZBB-NEXT: slli a0, a0, 12 3388; RV64IZBB-NEXT: addi a0, a0, 1 3389; RV64IZBB-NEXT: ret 3390; 3391; RV64IZBS-LABEL: imm_neg_3435982847: 3392; RV64IZBS: # %bb.0: 3393; RV64IZBS-NEXT: lui a0, 734001 3394; RV64IZBS-NEXT: addiw a0, a0, 1 3395; RV64IZBS-NEXT: bclri a0, a0, 31 3396; RV64IZBS-NEXT: ret 3397; 3398; RV64IXTHEADBB-LABEL: imm_neg_3435982847: 3399; RV64IXTHEADBB: # %bb.0: 3400; RV64IXTHEADBB-NEXT: lui a0, 1048371 3401; RV64IXTHEADBB-NEXT: addiw a0, a0, 817 3402; RV64IXTHEADBB-NEXT: slli a0, a0, 12 3403; RV64IXTHEADBB-NEXT: addi a0, a0, 1 3404; RV64IXTHEADBB-NEXT: ret 3405; 3406; RV32-REMAT-LABEL: imm_neg_3435982847: 3407; RV32-REMAT: # %bb.0: 3408; RV32-REMAT-NEXT: lui a0, 209713 3409; RV32-REMAT-NEXT: addi a0, a0, 1 3410; RV32-REMAT-NEXT: li a1, -1 3411; RV32-REMAT-NEXT: ret 3412; 3413; RV64-REMAT-LABEL: imm_neg_3435982847: 3414; RV64-REMAT: # %bb.0: 3415; RV64-REMAT-NEXT: lui a0, 1048371 3416; RV64-REMAT-NEXT: addiw a0, a0, 817 3417; RV64-REMAT-NEXT: slli a0, a0, 12 3418; RV64-REMAT-NEXT: addi a0, a0, 1 3419; RV64-REMAT-NEXT: ret 3420 ret i64 -3435982847 ; 0xffff_ffff_3333_1001 3421} 3422 3423define i64 @imm_neg_5726842879() { 3424; RV32I-LABEL: imm_neg_5726842879: 3425; RV32I: # %bb.0: 3426; RV32I-NEXT: lui a0, 698997 3427; RV32I-NEXT: addi a0, a0, 1 3428; RV32I-NEXT: li a1, -2 3429; RV32I-NEXT: ret 3430; 3431; RV64I-LABEL: imm_neg_5726842879: 3432; RV64I: # %bb.0: 3433; RV64I-NEXT: lui a0, 1048235 3434; RV64I-NEXT: addiw a0, a0, -1419 3435; RV64I-NEXT: slli a0, a0, 12 3436; RV64I-NEXT: addi a0, a0, 1 3437; RV64I-NEXT: ret 3438; 3439; RV64IZBA-LABEL: imm_neg_5726842879: 3440; RV64IZBA: # %bb.0: 3441; RV64IZBA-NEXT: lui a0, 768945 3442; RV64IZBA-NEXT: sh2add a0, a0, a0 3443; RV64IZBA-NEXT: addi a0, a0, 1 3444; RV64IZBA-NEXT: ret 3445; 3446; RV64IZBB-LABEL: imm_neg_5726842879: 3447; RV64IZBB: # %bb.0: 3448; RV64IZBB-NEXT: lui a0, 1048235 3449; RV64IZBB-NEXT: addiw a0, a0, -1419 3450; RV64IZBB-NEXT: slli a0, a0, 12 3451; RV64IZBB-NEXT: addi a0, a0, 1 3452; RV64IZBB-NEXT: ret 3453; 3454; RV64IZBS-LABEL: imm_neg_5726842879: 3455; RV64IZBS: # %bb.0: 3456; RV64IZBS-NEXT: lui a0, 698997 3457; RV64IZBS-NEXT: addiw a0, a0, 1 3458; RV64IZBS-NEXT: bclri a0, a0, 32 3459; RV64IZBS-NEXT: ret 3460; 3461; RV64IXTHEADBB-LABEL: imm_neg_5726842879: 3462; RV64IXTHEADBB: # %bb.0: 3463; RV64IXTHEADBB-NEXT: lui a0, 1048235 3464; RV64IXTHEADBB-NEXT: addiw a0, a0, -1419 3465; RV64IXTHEADBB-NEXT: slli a0, a0, 12 3466; RV64IXTHEADBB-NEXT: addi a0, a0, 1 3467; RV64IXTHEADBB-NEXT: ret 3468; 3469; RV32-REMAT-LABEL: imm_neg_5726842879: 3470; RV32-REMAT: # %bb.0: 3471; RV32-REMAT-NEXT: lui a0, 698997 3472; RV32-REMAT-NEXT: addi a0, a0, 1 3473; RV32-REMAT-NEXT: li a1, -2 3474; RV32-REMAT-NEXT: ret 3475; 3476; RV64-REMAT-LABEL: imm_neg_5726842879: 3477; RV64-REMAT: # %bb.0: 3478; RV64-REMAT-NEXT: lui a0, 1048235 3479; RV64-REMAT-NEXT: addiw a0, a0, -1419 3480; RV64-REMAT-NEXT: slli a0, a0, 12 3481; RV64-REMAT-NEXT: addi a0, a0, 1 3482; RV64-REMAT-NEXT: ret 3483 ret i64 -5726842879 ; 0xffff_fffe_aaa7_5001 3484} 3485 3486define i64 @imm_neg_10307948543() { 3487; RV32I-LABEL: imm_neg_10307948543: 3488; RV32I: # %bb.0: 3489; RV32I-NEXT: lui a0, 629139 3490; RV32I-NEXT: addi a0, a0, 1 3491; RV32I-NEXT: li a1, -3 3492; RV32I-NEXT: ret 3493; 3494; RV64I-LABEL: imm_neg_10307948543: 3495; RV64I: # %bb.0: 3496; RV64I-NEXT: lui a0, 1047962 3497; RV64I-NEXT: addiw a0, a0, -1645 3498; RV64I-NEXT: slli a0, a0, 12 3499; RV64I-NEXT: addi a0, a0, 1 3500; RV64I-NEXT: ret 3501; 3502; RV64IZBA-LABEL: imm_neg_10307948543: 3503; RV64IZBA: # %bb.0: 3504; RV64IZBA-NEXT: lui a0, 768955 3505; RV64IZBA-NEXT: sh3add a0, a0, a0 3506; RV64IZBA-NEXT: addi a0, a0, 1 3507; RV64IZBA-NEXT: ret 3508; 3509; RV64IZBB-LABEL: imm_neg_10307948543: 3510; RV64IZBB: # %bb.0: 3511; RV64IZBB-NEXT: lui a0, 1047962 3512; RV64IZBB-NEXT: addiw a0, a0, -1645 3513; RV64IZBB-NEXT: slli a0, a0, 12 3514; RV64IZBB-NEXT: addi a0, a0, 1 3515; RV64IZBB-NEXT: ret 3516; 3517; RV64IZBS-LABEL: imm_neg_10307948543: 3518; RV64IZBS: # %bb.0: 3519; RV64IZBS-NEXT: lui a0, 629139 3520; RV64IZBS-NEXT: addiw a0, a0, 1 3521; RV64IZBS-NEXT: bclri a0, a0, 33 3522; RV64IZBS-NEXT: ret 3523; 3524; RV64IXTHEADBB-LABEL: imm_neg_10307948543: 3525; RV64IXTHEADBB: # %bb.0: 3526; RV64IXTHEADBB-NEXT: lui a0, 1047962 3527; RV64IXTHEADBB-NEXT: addiw a0, a0, -1645 3528; RV64IXTHEADBB-NEXT: slli a0, a0, 12 3529; RV64IXTHEADBB-NEXT: addi a0, a0, 1 3530; RV64IXTHEADBB-NEXT: ret 3531; 3532; RV32-REMAT-LABEL: imm_neg_10307948543: 3533; RV32-REMAT: # %bb.0: 3534; RV32-REMAT-NEXT: lui a0, 629139 3535; RV32-REMAT-NEXT: addi a0, a0, 1 3536; RV32-REMAT-NEXT: li a1, -3 3537; RV32-REMAT-NEXT: ret 3538; 3539; RV64-REMAT-LABEL: imm_neg_10307948543: 3540; RV64-REMAT: # %bb.0: 3541; RV64-REMAT-NEXT: lui a0, 1047962 3542; RV64-REMAT-NEXT: addiw a0, a0, -1645 3543; RV64-REMAT-NEXT: slli a0, a0, 12 3544; RV64-REMAT-NEXT: addi a0, a0, 1 3545; RV64-REMAT-NEXT: ret 3546 ret i64 -10307948543 ; 0xffff_fffd_9999_3001 3547} 3548 3549define i64 @li_rori_1() { 3550; RV32I-LABEL: li_rori_1: 3551; RV32I: # %bb.0: 3552; RV32I-NEXT: lui a0, 1048567 3553; RV32I-NEXT: addi a1, a0, 2047 3554; RV32I-NEXT: li a0, -1 3555; RV32I-NEXT: ret 3556; 3557; RV64I-LABEL: li_rori_1: 3558; RV64I: # %bb.0: 3559; RV64I-NEXT: li a0, -17 3560; RV64I-NEXT: slli a0, a0, 43 3561; RV64I-NEXT: addi a0, a0, -1 3562; RV64I-NEXT: ret 3563; 3564; RV64IZBA-LABEL: li_rori_1: 3565; RV64IZBA: # %bb.0: 3566; RV64IZBA-NEXT: li a0, -17 3567; RV64IZBA-NEXT: slli a0, a0, 43 3568; RV64IZBA-NEXT: addi a0, a0, -1 3569; RV64IZBA-NEXT: ret 3570; 3571; RV64IZBB-LABEL: li_rori_1: 3572; RV64IZBB: # %bb.0: 3573; RV64IZBB-NEXT: li a0, -18 3574; RV64IZBB-NEXT: rori a0, a0, 21 3575; RV64IZBB-NEXT: ret 3576; 3577; RV64IZBS-LABEL: li_rori_1: 3578; RV64IZBS: # %bb.0: 3579; RV64IZBS-NEXT: li a0, -17 3580; RV64IZBS-NEXT: slli a0, a0, 43 3581; RV64IZBS-NEXT: addi a0, a0, -1 3582; RV64IZBS-NEXT: ret 3583; 3584; RV64IXTHEADBB-LABEL: li_rori_1: 3585; RV64IXTHEADBB: # %bb.0: 3586; RV64IXTHEADBB-NEXT: li a0, -18 3587; RV64IXTHEADBB-NEXT: th.srri a0, a0, 21 3588; RV64IXTHEADBB-NEXT: ret 3589; 3590; RV32-REMAT-LABEL: li_rori_1: 3591; RV32-REMAT: # %bb.0: 3592; RV32-REMAT-NEXT: lui a1, 1048567 3593; RV32-REMAT-NEXT: addi a1, a1, 2047 3594; RV32-REMAT-NEXT: li a0, -1 3595; RV32-REMAT-NEXT: ret 3596; 3597; RV64-REMAT-LABEL: li_rori_1: 3598; RV64-REMAT: # %bb.0: 3599; RV64-REMAT-NEXT: li a0, -17 3600; RV64-REMAT-NEXT: slli a0, a0, 43 3601; RV64-REMAT-NEXT: addi a0, a0, -1 3602; RV64-REMAT-NEXT: ret 3603 ret i64 -149533581377537 3604} 3605 3606define i64 @li_rori_2() { 3607; RV32I-LABEL: li_rori_2: 3608; RV32I: # %bb.0: 3609; RV32I-NEXT: lui a1, 720896 3610; RV32I-NEXT: addi a1, a1, -1 3611; RV32I-NEXT: li a0, -6 3612; RV32I-NEXT: ret 3613; 3614; RV64I-LABEL: li_rori_2: 3615; RV64I: # %bb.0: 3616; RV64I-NEXT: li a0, -5 3617; RV64I-NEXT: slli a0, a0, 60 3618; RV64I-NEXT: addi a0, a0, -6 3619; RV64I-NEXT: ret 3620; 3621; RV64IZBA-LABEL: li_rori_2: 3622; RV64IZBA: # %bb.0: 3623; RV64IZBA-NEXT: li a0, -5 3624; RV64IZBA-NEXT: slli a0, a0, 60 3625; RV64IZBA-NEXT: addi a0, a0, -6 3626; RV64IZBA-NEXT: ret 3627; 3628; RV64IZBB-LABEL: li_rori_2: 3629; RV64IZBB: # %bb.0: 3630; RV64IZBB-NEXT: li a0, -86 3631; RV64IZBB-NEXT: rori a0, a0, 4 3632; RV64IZBB-NEXT: ret 3633; 3634; RV64IZBS-LABEL: li_rori_2: 3635; RV64IZBS: # %bb.0: 3636; RV64IZBS-NEXT: li a0, -5 3637; RV64IZBS-NEXT: slli a0, a0, 60 3638; RV64IZBS-NEXT: addi a0, a0, -6 3639; RV64IZBS-NEXT: ret 3640; 3641; RV64IXTHEADBB-LABEL: li_rori_2: 3642; RV64IXTHEADBB: # %bb.0: 3643; RV64IXTHEADBB-NEXT: li a0, -86 3644; RV64IXTHEADBB-NEXT: th.srri a0, a0, 4 3645; RV64IXTHEADBB-NEXT: ret 3646; 3647; RV32-REMAT-LABEL: li_rori_2: 3648; RV32-REMAT: # %bb.0: 3649; RV32-REMAT-NEXT: lui a1, 720896 3650; RV32-REMAT-NEXT: addi a1, a1, -1 3651; RV32-REMAT-NEXT: li a0, -6 3652; RV32-REMAT-NEXT: ret 3653; 3654; RV64-REMAT-LABEL: li_rori_2: 3655; RV64-REMAT: # %bb.0: 3656; RV64-REMAT-NEXT: li a0, -5 3657; RV64-REMAT-NEXT: slli a0, a0, 60 3658; RV64-REMAT-NEXT: addi a0, a0, -6 3659; RV64-REMAT-NEXT: ret 3660 ret i64 -5764607523034234886 3661} 3662 3663define i64 @li_rori_3() { 3664; RV32I-LABEL: li_rori_3: 3665; RV32I: # %bb.0: 3666; RV32I-NEXT: lui a0, 491520 3667; RV32I-NEXT: addi a0, a0, -1 3668; RV32I-NEXT: li a1, -1 3669; RV32I-NEXT: ret 3670; 3671; RV64I-LABEL: li_rori_3: 3672; RV64I: # %bb.0: 3673; RV64I-NEXT: li a0, -17 3674; RV64I-NEXT: slli a0, a0, 27 3675; RV64I-NEXT: addi a0, a0, -1 3676; RV64I-NEXT: ret 3677; 3678; RV64IZBA-LABEL: li_rori_3: 3679; RV64IZBA: # %bb.0: 3680; RV64IZBA-NEXT: li a0, -17 3681; RV64IZBA-NEXT: slli a0, a0, 27 3682; RV64IZBA-NEXT: addi a0, a0, -1 3683; RV64IZBA-NEXT: ret 3684; 3685; RV64IZBB-LABEL: li_rori_3: 3686; RV64IZBB: # %bb.0: 3687; RV64IZBB-NEXT: li a0, -18 3688; RV64IZBB-NEXT: rori a0, a0, 37 3689; RV64IZBB-NEXT: ret 3690; 3691; RV64IZBS-LABEL: li_rori_3: 3692; RV64IZBS: # %bb.0: 3693; RV64IZBS-NEXT: li a0, -17 3694; RV64IZBS-NEXT: slli a0, a0, 27 3695; RV64IZBS-NEXT: addi a0, a0, -1 3696; RV64IZBS-NEXT: ret 3697; 3698; RV64IXTHEADBB-LABEL: li_rori_3: 3699; RV64IXTHEADBB: # %bb.0: 3700; RV64IXTHEADBB-NEXT: li a0, -18 3701; RV64IXTHEADBB-NEXT: th.srri a0, a0, 37 3702; RV64IXTHEADBB-NEXT: ret 3703; 3704; RV32-REMAT-LABEL: li_rori_3: 3705; RV32-REMAT: # %bb.0: 3706; RV32-REMAT-NEXT: lui a0, 491520 3707; RV32-REMAT-NEXT: addi a0, a0, -1 3708; RV32-REMAT-NEXT: li a1, -1 3709; RV32-REMAT-NEXT: ret 3710; 3711; RV64-REMAT-LABEL: li_rori_3: 3712; RV64-REMAT: # %bb.0: 3713; RV64-REMAT-NEXT: li a0, -17 3714; RV64-REMAT-NEXT: slli a0, a0, 27 3715; RV64-REMAT-NEXT: addi a0, a0, -1 3716; RV64-REMAT-NEXT: ret 3717 ret i64 -2281701377 3718} 3719 3720; This used to assert when compiled with Zba. 3721define i64 @PR54812() { 3722; RV32I-LABEL: PR54812: 3723; RV32I: # %bb.0: 3724; RV32I-NEXT: lui a0, 521599 3725; RV32I-NEXT: li a1, -1 3726; RV32I-NEXT: ret 3727; 3728; RV64I-LABEL: PR54812: 3729; RV64I: # %bb.0: 3730; RV64I-NEXT: lui a0, 1048447 3731; RV64I-NEXT: addiw a0, a0, 1407 3732; RV64I-NEXT: slli a0, a0, 12 3733; RV64I-NEXT: ret 3734; 3735; RV64IZBA-LABEL: PR54812: 3736; RV64IZBA: # %bb.0: 3737; RV64IZBA-NEXT: lui a0, 872917 3738; RV64IZBA-NEXT: sh1add a0, a0, a0 3739; RV64IZBA-NEXT: ret 3740; 3741; RV64IZBB-LABEL: PR54812: 3742; RV64IZBB: # %bb.0: 3743; RV64IZBB-NEXT: lui a0, 1048447 3744; RV64IZBB-NEXT: addiw a0, a0, 1407 3745; RV64IZBB-NEXT: slli a0, a0, 12 3746; RV64IZBB-NEXT: ret 3747; 3748; RV64IZBS-LABEL: PR54812: 3749; RV64IZBS: # %bb.0: 3750; RV64IZBS-NEXT: lui a0, 1045887 3751; RV64IZBS-NEXT: bclri a0, a0, 31 3752; RV64IZBS-NEXT: ret 3753; 3754; RV64IXTHEADBB-LABEL: PR54812: 3755; RV64IXTHEADBB: # %bb.0: 3756; RV64IXTHEADBB-NEXT: lui a0, 1048447 3757; RV64IXTHEADBB-NEXT: addiw a0, a0, 1407 3758; RV64IXTHEADBB-NEXT: slli a0, a0, 12 3759; RV64IXTHEADBB-NEXT: ret 3760; 3761; RV32-REMAT-LABEL: PR54812: 3762; RV32-REMAT: # %bb.0: 3763; RV32-REMAT-NEXT: lui a0, 521599 3764; RV32-REMAT-NEXT: li a1, -1 3765; RV32-REMAT-NEXT: ret 3766; 3767; RV64-REMAT-LABEL: PR54812: 3768; RV64-REMAT: # %bb.0: 3769; RV64-REMAT-NEXT: lui a0, 1048447 3770; RV64-REMAT-NEXT: addiw a0, a0, 1407 3771; RV64-REMAT-NEXT: slli a0, a0, 12 3772; RV64-REMAT-NEXT: ret 3773 ret i64 -2158497792; 3774} 3775 3776define signext i32 @pos_2048() nounwind { 3777; RV32I-LABEL: pos_2048: 3778; RV32I: # %bb.0: 3779; RV32I-NEXT: li a0, 1 3780; RV32I-NEXT: slli a0, a0, 11 3781; RV32I-NEXT: ret 3782; 3783; RV64I-LABEL: pos_2048: 3784; RV64I: # %bb.0: 3785; RV64I-NEXT: li a0, 1 3786; RV64I-NEXT: slli a0, a0, 11 3787; RV64I-NEXT: ret 3788; 3789; RV64IZBA-LABEL: pos_2048: 3790; RV64IZBA: # %bb.0: 3791; RV64IZBA-NEXT: li a0, 1 3792; RV64IZBA-NEXT: slli a0, a0, 11 3793; RV64IZBA-NEXT: ret 3794; 3795; RV64IZBB-LABEL: pos_2048: 3796; RV64IZBB: # %bb.0: 3797; RV64IZBB-NEXT: li a0, 1 3798; RV64IZBB-NEXT: slli a0, a0, 11 3799; RV64IZBB-NEXT: ret 3800; 3801; RV64IZBS-LABEL: pos_2048: 3802; RV64IZBS: # %bb.0: 3803; RV64IZBS-NEXT: bseti a0, zero, 11 3804; RV64IZBS-NEXT: ret 3805; 3806; RV64IXTHEADBB-LABEL: pos_2048: 3807; RV64IXTHEADBB: # %bb.0: 3808; RV64IXTHEADBB-NEXT: li a0, 1 3809; RV64IXTHEADBB-NEXT: slli a0, a0, 11 3810; RV64IXTHEADBB-NEXT: ret 3811; 3812; RV32-REMAT-LABEL: pos_2048: 3813; RV32-REMAT: # %bb.0: 3814; RV32-REMAT-NEXT: li a0, 1 3815; RV32-REMAT-NEXT: slli a0, a0, 11 3816; RV32-REMAT-NEXT: ret 3817; 3818; RV64-REMAT-LABEL: pos_2048: 3819; RV64-REMAT: # %bb.0: 3820; RV64-REMAT-NEXT: li a0, 1 3821; RV64-REMAT-NEXT: slli a0, a0, 11 3822; RV64-REMAT-NEXT: ret 3823 ret i32 2048 3824} 3825 3826define i64 @imm64_same_lo_hi() nounwind { 3827; RV32I-LABEL: imm64_same_lo_hi: 3828; RV32I: # %bb.0: 3829; RV32I-NEXT: lui a0, 65793 3830; RV32I-NEXT: addi a0, a0, 16 3831; RV32I-NEXT: mv a1, a0 3832; RV32I-NEXT: ret 3833; 3834; RV64I-LABEL: imm64_same_lo_hi: 3835; RV64I: # %bb.0: 3836; RV64I-NEXT: lui a0, 65793 3837; RV64I-NEXT: addiw a0, a0, 16 3838; RV64I-NEXT: slli a1, a0, 32 3839; RV64I-NEXT: add a0, a0, a1 3840; RV64I-NEXT: ret 3841; 3842; RV64IZBA-LABEL: imm64_same_lo_hi: 3843; RV64IZBA: # %bb.0: 3844; RV64IZBA-NEXT: lui a0, 65793 3845; RV64IZBA-NEXT: addiw a0, a0, 16 3846; RV64IZBA-NEXT: slli a1, a0, 32 3847; RV64IZBA-NEXT: add a0, a0, a1 3848; RV64IZBA-NEXT: ret 3849; 3850; RV64IZBB-LABEL: imm64_same_lo_hi: 3851; RV64IZBB: # %bb.0: 3852; RV64IZBB-NEXT: lui a0, 65793 3853; RV64IZBB-NEXT: addiw a0, a0, 16 3854; RV64IZBB-NEXT: slli a1, a0, 32 3855; RV64IZBB-NEXT: add a0, a0, a1 3856; RV64IZBB-NEXT: ret 3857; 3858; RV64IZBS-LABEL: imm64_same_lo_hi: 3859; RV64IZBS: # %bb.0: 3860; RV64IZBS-NEXT: lui a0, 65793 3861; RV64IZBS-NEXT: addiw a0, a0, 16 3862; RV64IZBS-NEXT: slli a1, a0, 32 3863; RV64IZBS-NEXT: add a0, a0, a1 3864; RV64IZBS-NEXT: ret 3865; 3866; RV64IXTHEADBB-LABEL: imm64_same_lo_hi: 3867; RV64IXTHEADBB: # %bb.0: 3868; RV64IXTHEADBB-NEXT: lui a0, 65793 3869; RV64IXTHEADBB-NEXT: addiw a0, a0, 16 3870; RV64IXTHEADBB-NEXT: slli a1, a0, 32 3871; RV64IXTHEADBB-NEXT: add a0, a0, a1 3872; RV64IXTHEADBB-NEXT: ret 3873; 3874; RV32-REMAT-LABEL: imm64_same_lo_hi: 3875; RV32-REMAT: # %bb.0: 3876; RV32-REMAT-NEXT: lui a0, 65793 3877; RV32-REMAT-NEXT: addi a0, a0, 16 3878; RV32-REMAT-NEXT: mv a1, a0 3879; RV32-REMAT-NEXT: ret 3880; 3881; RV64-REMAT-LABEL: imm64_same_lo_hi: 3882; RV64-REMAT: # %bb.0: 3883; RV64-REMAT-NEXT: lui a0, 65793 3884; RV64-REMAT-NEXT: addiw a0, a0, 16 3885; RV64-REMAT-NEXT: slli a1, a0, 32 3886; RV64-REMAT-NEXT: add a0, a0, a1 3887; RV64-REMAT-NEXT: ret 3888 ret i64 1157442765409226768 ; 0x0101010101010101 3889} 3890 3891; Same as above with optsize. Make sure we use constant pool on RV64 3892define i64 @imm64_same_lo_hi_optsize() nounwind optsize { 3893; RV32I-LABEL: imm64_same_lo_hi_optsize: 3894; RV32I: # %bb.0: 3895; RV32I-NEXT: lui a0, 65793 3896; RV32I-NEXT: addi a0, a0, 16 3897; RV32I-NEXT: mv a1, a0 3898; RV32I-NEXT: ret 3899; 3900; RV64-NOPOOL-LABEL: imm64_same_lo_hi_optsize: 3901; RV64-NOPOOL: # %bb.0: 3902; RV64-NOPOOL-NEXT: lui a0, 65793 3903; RV64-NOPOOL-NEXT: addiw a0, a0, 16 3904; RV64-NOPOOL-NEXT: slli a1, a0, 32 3905; RV64-NOPOOL-NEXT: add a0, a0, a1 3906; RV64-NOPOOL-NEXT: ret 3907; 3908; RV64I-POOL-LABEL: imm64_same_lo_hi_optsize: 3909; RV64I-POOL: # %bb.0: 3910; RV64I-POOL-NEXT: lui a0, %hi(.LCPI65_0) 3911; RV64I-POOL-NEXT: ld a0, %lo(.LCPI65_0)(a0) 3912; RV64I-POOL-NEXT: ret 3913; 3914; RV64IZBA-LABEL: imm64_same_lo_hi_optsize: 3915; RV64IZBA: # %bb.0: 3916; RV64IZBA-NEXT: lui a0, 65793 3917; RV64IZBA-NEXT: addiw a0, a0, 16 3918; RV64IZBA-NEXT: slli a1, a0, 32 3919; RV64IZBA-NEXT: add a0, a0, a1 3920; RV64IZBA-NEXT: ret 3921; 3922; RV64IZBB-LABEL: imm64_same_lo_hi_optsize: 3923; RV64IZBB: # %bb.0: 3924; RV64IZBB-NEXT: lui a0, 65793 3925; RV64IZBB-NEXT: addiw a0, a0, 16 3926; RV64IZBB-NEXT: slli a1, a0, 32 3927; RV64IZBB-NEXT: add a0, a0, a1 3928; RV64IZBB-NEXT: ret 3929; 3930; RV64IZBS-LABEL: imm64_same_lo_hi_optsize: 3931; RV64IZBS: # %bb.0: 3932; RV64IZBS-NEXT: lui a0, 65793 3933; RV64IZBS-NEXT: addiw a0, a0, 16 3934; RV64IZBS-NEXT: slli a1, a0, 32 3935; RV64IZBS-NEXT: add a0, a0, a1 3936; RV64IZBS-NEXT: ret 3937; 3938; RV64IXTHEADBB-LABEL: imm64_same_lo_hi_optsize: 3939; RV64IXTHEADBB: # %bb.0: 3940; RV64IXTHEADBB-NEXT: lui a0, 65793 3941; RV64IXTHEADBB-NEXT: addiw a0, a0, 16 3942; RV64IXTHEADBB-NEXT: slli a1, a0, 32 3943; RV64IXTHEADBB-NEXT: add a0, a0, a1 3944; RV64IXTHEADBB-NEXT: ret 3945; 3946; RV32-REMAT-LABEL: imm64_same_lo_hi_optsize: 3947; RV32-REMAT: # %bb.0: 3948; RV32-REMAT-NEXT: lui a0, 65793 3949; RV32-REMAT-NEXT: addi a0, a0, 16 3950; RV32-REMAT-NEXT: mv a1, a0 3951; RV32-REMAT-NEXT: ret 3952; 3953; RV64-REMAT-LABEL: imm64_same_lo_hi_optsize: 3954; RV64-REMAT: # %bb.0: 3955; RV64-REMAT-NEXT: lui a0, 65793 3956; RV64-REMAT-NEXT: addiw a0, a0, 16 3957; RV64-REMAT-NEXT: slli a1, a0, 32 3958; RV64-REMAT-NEXT: add a0, a0, a1 3959; RV64-REMAT-NEXT: ret 3960 ret i64 1157442765409226768 ; 0x0101010101010101 3961} 3962 3963; Hi and lo are the same and also negative. 3964define i64 @imm64_same_lo_hi_negative() nounwind { 3965; RV32I-LABEL: imm64_same_lo_hi_negative: 3966; RV32I: # %bb.0: 3967; RV32I-NEXT: lui a0, 526344 3968; RV32I-NEXT: addi a0, a0, 128 3969; RV32I-NEXT: mv a1, a0 3970; RV32I-NEXT: ret 3971; 3972; RV64-NOPOOL-LABEL: imm64_same_lo_hi_negative: 3973; RV64-NOPOOL: # %bb.0: 3974; RV64-NOPOOL-NEXT: lui a0, 983297 3975; RV64-NOPOOL-NEXT: slli a0, a0, 4 3976; RV64-NOPOOL-NEXT: addi a0, a0, 257 3977; RV64-NOPOOL-NEXT: slli a0, a0, 16 3978; RV64-NOPOOL-NEXT: addi a0, a0, 257 3979; RV64-NOPOOL-NEXT: slli a0, a0, 15 3980; RV64-NOPOOL-NEXT: addi a0, a0, 128 3981; RV64-NOPOOL-NEXT: ret 3982; 3983; RV64I-POOL-LABEL: imm64_same_lo_hi_negative: 3984; RV64I-POOL: # %bb.0: 3985; RV64I-POOL-NEXT: lui a0, %hi(.LCPI66_0) 3986; RV64I-POOL-NEXT: ld a0, %lo(.LCPI66_0)(a0) 3987; RV64I-POOL-NEXT: ret 3988; 3989; RV64IZBA-LABEL: imm64_same_lo_hi_negative: 3990; RV64IZBA: # %bb.0: 3991; RV64IZBA-NEXT: lui a0, 526344 3992; RV64IZBA-NEXT: addi a0, a0, 128 3993; RV64IZBA-NEXT: slli a1, a0, 32 3994; RV64IZBA-NEXT: add.uw a0, a0, a1 3995; RV64IZBA-NEXT: ret 3996; 3997; RV64IZBB-LABEL: imm64_same_lo_hi_negative: 3998; RV64IZBB: # %bb.0: 3999; RV64IZBB-NEXT: lui a0, 983297 4000; RV64IZBB-NEXT: slli a0, a0, 4 4001; RV64IZBB-NEXT: addi a0, a0, 257 4002; RV64IZBB-NEXT: slli a0, a0, 16 4003; RV64IZBB-NEXT: addi a0, a0, 257 4004; RV64IZBB-NEXT: slli a0, a0, 15 4005; RV64IZBB-NEXT: addi a0, a0, 128 4006; RV64IZBB-NEXT: ret 4007; 4008; RV64IZBS-LABEL: imm64_same_lo_hi_negative: 4009; RV64IZBS: # %bb.0: 4010; RV64IZBS-NEXT: lui a0, 983297 4011; RV64IZBS-NEXT: slli a0, a0, 4 4012; RV64IZBS-NEXT: addi a0, a0, 257 4013; RV64IZBS-NEXT: slli a0, a0, 16 4014; RV64IZBS-NEXT: addi a0, a0, 257 4015; RV64IZBS-NEXT: slli a0, a0, 15 4016; RV64IZBS-NEXT: addi a0, a0, 128 4017; RV64IZBS-NEXT: ret 4018; 4019; RV64IXTHEADBB-LABEL: imm64_same_lo_hi_negative: 4020; RV64IXTHEADBB: # %bb.0: 4021; RV64IXTHEADBB-NEXT: lui a0, 983297 4022; RV64IXTHEADBB-NEXT: slli a0, a0, 4 4023; RV64IXTHEADBB-NEXT: addi a0, a0, 257 4024; RV64IXTHEADBB-NEXT: slli a0, a0, 16 4025; RV64IXTHEADBB-NEXT: addi a0, a0, 257 4026; RV64IXTHEADBB-NEXT: slli a0, a0, 15 4027; RV64IXTHEADBB-NEXT: addi a0, a0, 128 4028; RV64IXTHEADBB-NEXT: ret 4029; 4030; RV32-REMAT-LABEL: imm64_same_lo_hi_negative: 4031; RV32-REMAT: # %bb.0: 4032; RV32-REMAT-NEXT: lui a0, 526344 4033; RV32-REMAT-NEXT: addi a0, a0, 128 4034; RV32-REMAT-NEXT: mv a1, a0 4035; RV32-REMAT-NEXT: ret 4036; 4037; RV64-REMAT-LABEL: imm64_same_lo_hi_negative: 4038; RV64-REMAT: # %bb.0: 4039; RV64-REMAT-NEXT: lui a0, 983297 4040; RV64-REMAT-NEXT: slli a0, a0, 4 4041; RV64-REMAT-NEXT: addi a0, a0, 257 4042; RV64-REMAT-NEXT: slli a0, a0, 16 4043; RV64-REMAT-NEXT: addi a0, a0, 257 4044; RV64-REMAT-NEXT: slli a0, a0, 15 4045; RV64-REMAT-NEXT: addi a0, a0, 128 4046; RV64-REMAT-NEXT: ret 4047 ret i64 9259542123273814144 ; 0x8080808080808080 4048} 4049 4050define i64 @imm64_0x8000080000000() { 4051; RV32I-LABEL: imm64_0x8000080000000: 4052; RV32I: # %bb.0: 4053; RV32I-NEXT: lui a0, 524288 4054; RV32I-NEXT: lui a1, 128 4055; RV32I-NEXT: ret 4056; 4057; RV64I-LABEL: imm64_0x8000080000000: 4058; RV64I: # %bb.0: 4059; RV64I-NEXT: lui a0, 256 4060; RV64I-NEXT: addiw a0, a0, 1 4061; RV64I-NEXT: slli a0, a0, 31 4062; RV64I-NEXT: ret 4063; 4064; RV64IZBA-LABEL: imm64_0x8000080000000: 4065; RV64IZBA: # %bb.0: 4066; RV64IZBA-NEXT: lui a0, 256 4067; RV64IZBA-NEXT: addiw a0, a0, 1 4068; RV64IZBA-NEXT: slli a0, a0, 31 4069; RV64IZBA-NEXT: ret 4070; 4071; RV64IZBB-LABEL: imm64_0x8000080000000: 4072; RV64IZBB: # %bb.0: 4073; RV64IZBB-NEXT: lui a0, 256 4074; RV64IZBB-NEXT: addiw a0, a0, 1 4075; RV64IZBB-NEXT: slli a0, a0, 31 4076; RV64IZBB-NEXT: ret 4077; 4078; RV64IZBS-LABEL: imm64_0x8000080000000: 4079; RV64IZBS: # %bb.0: 4080; RV64IZBS-NEXT: bseti a0, zero, 31 4081; RV64IZBS-NEXT: bseti a0, a0, 51 4082; RV64IZBS-NEXT: ret 4083; 4084; RV64IXTHEADBB-LABEL: imm64_0x8000080000000: 4085; RV64IXTHEADBB: # %bb.0: 4086; RV64IXTHEADBB-NEXT: lui a0, 256 4087; RV64IXTHEADBB-NEXT: addiw a0, a0, 1 4088; RV64IXTHEADBB-NEXT: slli a0, a0, 31 4089; RV64IXTHEADBB-NEXT: ret 4090; 4091; RV32-REMAT-LABEL: imm64_0x8000080000000: 4092; RV32-REMAT: # %bb.0: 4093; RV32-REMAT-NEXT: lui a0, 524288 4094; RV32-REMAT-NEXT: lui a1, 128 4095; RV32-REMAT-NEXT: ret 4096; 4097; RV64-REMAT-LABEL: imm64_0x8000080000000: 4098; RV64-REMAT: # %bb.0: 4099; RV64-REMAT-NEXT: lui a0, 256 4100; RV64-REMAT-NEXT: addiw a0, a0, 1 4101; RV64-REMAT-NEXT: slli a0, a0, 31 4102; RV64-REMAT-NEXT: ret 4103 ret i64 2251801961168896 ; 0x8000080000000 4104} 4105 4106define i64 @imm64_0x10000100000000() { 4107; RV32I-LABEL: imm64_0x10000100000000: 4108; RV32I: # %bb.0: 4109; RV32I-NEXT: lui a1, 256 4110; RV32I-NEXT: addi a1, a1, 1 4111; RV32I-NEXT: li a0, 0 4112; RV32I-NEXT: ret 4113; 4114; RV64I-LABEL: imm64_0x10000100000000: 4115; RV64I: # %bb.0: 4116; RV64I-NEXT: lui a0, 256 4117; RV64I-NEXT: addi a0, a0, 1 4118; RV64I-NEXT: slli a0, a0, 32 4119; RV64I-NEXT: ret 4120; 4121; RV64IZBA-LABEL: imm64_0x10000100000000: 4122; RV64IZBA: # %bb.0: 4123; RV64IZBA-NEXT: lui a0, 256 4124; RV64IZBA-NEXT: addi a0, a0, 1 4125; RV64IZBA-NEXT: slli a0, a0, 32 4126; RV64IZBA-NEXT: ret 4127; 4128; RV64IZBB-LABEL: imm64_0x10000100000000: 4129; RV64IZBB: # %bb.0: 4130; RV64IZBB-NEXT: lui a0, 256 4131; RV64IZBB-NEXT: addi a0, a0, 1 4132; RV64IZBB-NEXT: slli a0, a0, 32 4133; RV64IZBB-NEXT: ret 4134; 4135; RV64IZBS-LABEL: imm64_0x10000100000000: 4136; RV64IZBS: # %bb.0: 4137; RV64IZBS-NEXT: bseti a0, zero, 32 4138; RV64IZBS-NEXT: bseti a0, a0, 52 4139; RV64IZBS-NEXT: ret 4140; 4141; RV64IXTHEADBB-LABEL: imm64_0x10000100000000: 4142; RV64IXTHEADBB: # %bb.0: 4143; RV64IXTHEADBB-NEXT: lui a0, 256 4144; RV64IXTHEADBB-NEXT: addi a0, a0, 1 4145; RV64IXTHEADBB-NEXT: slli a0, a0, 32 4146; RV64IXTHEADBB-NEXT: ret 4147; 4148; RV32-REMAT-LABEL: imm64_0x10000100000000: 4149; RV32-REMAT: # %bb.0: 4150; RV32-REMAT-NEXT: lui a1, 256 4151; RV32-REMAT-NEXT: addi a1, a1, 1 4152; RV32-REMAT-NEXT: li a0, 0 4153; RV32-REMAT-NEXT: ret 4154; 4155; RV64-REMAT-LABEL: imm64_0x10000100000000: 4156; RV64-REMAT: # %bb.0: 4157; RV64-REMAT-NEXT: lui a0, 256 4158; RV64-REMAT-NEXT: addi a0, a0, 1 4159; RV64-REMAT-NEXT: slli a0, a0, 32 4160; RV64-REMAT-NEXT: ret 4161 ret i64 4503603922337792 ; 0x10000100000000 4162} 4163 4164define i64 @imm64_0xFF7FFFFF7FFFFFFE() { 4165; RV32I-LABEL: imm64_0xFF7FFFFF7FFFFFFE: 4166; RV32I: # %bb.0: 4167; RV32I-NEXT: lui a0, 524288 4168; RV32I-NEXT: lui a1, 1046528 4169; RV32I-NEXT: addi a0, a0, -1 4170; RV32I-NEXT: addi a1, a1, -1 4171; RV32I-NEXT: ret 4172; 4173; RV64I-LABEL: imm64_0xFF7FFFFF7FFFFFFE: 4174; RV64I: # %bb.0: 4175; RV64I-NEXT: lui a0, 1044480 4176; RV64I-NEXT: addiw a0, a0, -1 4177; RV64I-NEXT: slli a0, a0, 31 4178; RV64I-NEXT: addi a0, a0, -1 4179; RV64I-NEXT: ret 4180; 4181; RV64IZBA-LABEL: imm64_0xFF7FFFFF7FFFFFFE: 4182; RV64IZBA: # %bb.0: 4183; RV64IZBA-NEXT: lui a0, 1044480 4184; RV64IZBA-NEXT: addiw a0, a0, -1 4185; RV64IZBA-NEXT: slli a0, a0, 31 4186; RV64IZBA-NEXT: addi a0, a0, -1 4187; RV64IZBA-NEXT: ret 4188; 4189; RV64IZBB-LABEL: imm64_0xFF7FFFFF7FFFFFFE: 4190; RV64IZBB: # %bb.0: 4191; RV64IZBB-NEXT: lui a0, 1044480 4192; RV64IZBB-NEXT: addiw a0, a0, -1 4193; RV64IZBB-NEXT: slli a0, a0, 31 4194; RV64IZBB-NEXT: addi a0, a0, -1 4195; RV64IZBB-NEXT: ret 4196; 4197; RV64IZBS-LABEL: imm64_0xFF7FFFFF7FFFFFFE: 4198; RV64IZBS: # %bb.0: 4199; RV64IZBS-NEXT: li a0, -1 4200; RV64IZBS-NEXT: bclri a0, a0, 31 4201; RV64IZBS-NEXT: bclri a0, a0, 55 4202; RV64IZBS-NEXT: ret 4203; 4204; RV64IXTHEADBB-LABEL: imm64_0xFF7FFFFF7FFFFFFE: 4205; RV64IXTHEADBB: # %bb.0: 4206; RV64IXTHEADBB-NEXT: lui a0, 1044480 4207; RV64IXTHEADBB-NEXT: addiw a0, a0, -1 4208; RV64IXTHEADBB-NEXT: slli a0, a0, 31 4209; RV64IXTHEADBB-NEXT: addi a0, a0, -1 4210; RV64IXTHEADBB-NEXT: ret 4211; 4212; RV32-REMAT-LABEL: imm64_0xFF7FFFFF7FFFFFFE: 4213; RV32-REMAT: # %bb.0: 4214; RV32-REMAT-NEXT: lui a0, 524288 4215; RV32-REMAT-NEXT: addi a0, a0, -1 4216; RV32-REMAT-NEXT: lui a1, 1046528 4217; RV32-REMAT-NEXT: addi a1, a1, -1 4218; RV32-REMAT-NEXT: ret 4219; 4220; RV64-REMAT-LABEL: imm64_0xFF7FFFFF7FFFFFFE: 4221; RV64-REMAT: # %bb.0: 4222; RV64-REMAT-NEXT: lui a0, 1044480 4223; RV64-REMAT-NEXT: addiw a0, a0, -1 4224; RV64-REMAT-NEXT: slli a0, a0, 31 4225; RV64-REMAT-NEXT: addi a0, a0, -1 4226; RV64-REMAT-NEXT: ret 4227 ret i64 -36028799166447617 ; 0xFF7FFFFF7FFFFFFE 4228} 4229