1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+zfh \ 3; RUN: -verify-machineinstrs -target-abi ilp32f | \ 4; RUN: FileCheck -check-prefixes=CHECKIZFH,RV32IZFH,RV32IFZFH %s 5; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -mattr=+zfh \ 6; RUN: -verify-machineinstrs -target-abi lp64f | \ 7; RUN: FileCheck -check-prefixes=CHECKIZFH,RV64IZFH,RV64IFZFH %s 8; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+zhinx \ 9; RUN: -verify-machineinstrs -target-abi ilp32 | \ 10; RUN: FileCheck -check-prefixes=CHECKIZHINX,RV32IZHINX %s 11; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -mattr=+zhinx \ 12; RUN: -verify-machineinstrs -target-abi lp64 | \ 13; RUN: FileCheck -check-prefixes=CHECKIZHINX,RV64IZHINX %s 14; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+d \ 15; RUN: -mattr=+zfh -verify-machineinstrs -target-abi ilp32d | \ 16; RUN: FileCheck -check-prefixes=CHECKIZFH,RV32IZFH,RV32IDZFH %s 17; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -mattr=+d \ 18; RUN: -mattr=+zfh -verify-machineinstrs -target-abi lp64d | \ 19; RUN: FileCheck -check-prefixes=CHECKIZFH,RV64IZFH,RV64IDZFH %s 20; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+zdinx \ 21; RUN: -mattr=+zhinx -verify-machineinstrs -target-abi ilp32 | \ 22; RUN: FileCheck -check-prefixes=CHECKIZHINX,RV32IZHINX %s 23; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -mattr=+zdinx \ 24; RUN: -mattr=+zhinx -verify-machineinstrs -target-abi lp64 | \ 25; RUN: FileCheck -check-prefixes=CHECKIZHINX,RV64IZHINX %s 26; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 \ 27; RUN: -verify-machineinstrs | \ 28; RUN: FileCheck -check-prefix=RV32I %s 29; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 \ 30; RUN: -verify-machineinstrs | \ 31; RUN: FileCheck -check-prefix=RV64I %s 32 33; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+zfhmin \ 34; RUN: -verify-machineinstrs -target-abi ilp32f | \ 35; RUN: FileCheck -check-prefixes=CHECKIZFHMIN,RV32IZFHMIN,RV32IFZFHMIN %s 36; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -mattr=+zfhmin \ 37; RUN: -verify-machineinstrs -target-abi lp64f | \ 38; RUN: FileCheck -check-prefixes=CHECKIZFHMIN,RV64IZFHMIN,RV64IFZFHMIN %s 39; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+d \ 40; RUN: -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32d | \ 41; RUN: FileCheck -check-prefixes=CHECKIZFHMIN,RV32IZFHMIN,RV32IDZFHMIN %s 42; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -mattr=+d \ 43; RUN: -mattr=+zfhmin -verify-machineinstrs -target-abi lp64d | \ 44; RUN: FileCheck -check-prefixes=CHECKIZFHMIN,RV64IZFHMIN,RV64IDZFHMIN %s 45 46; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+zhinxmin \ 47; RUN: -verify-machineinstrs -target-abi ilp32 | \ 48; RUN: FileCheck -check-prefixes=CHECKIZHINXMIN,RV32IZHINXMIN %s 49; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -mattr=+zhinxmin \ 50; RUN: -verify-machineinstrs -target-abi lp64 | \ 51; RUN: FileCheck -check-prefixes=CHECKIZHINXMIN,RV64IZHINXMIN %s 52; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+zdinx \ 53; RUN: -mattr=+zhinxmin -verify-machineinstrs -target-abi ilp32 | \ 54; RUN: FileCheck -check-prefixes=CHECKIZHINXMIN,RV32IZHINXMIN %s 55; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -mattr=+zdinx \ 56; RUN: -mattr=+zhinxmin -verify-machineinstrs -target-abi lp64 | \ 57; RUN: FileCheck -check-prefixes=CHECKIZHINXMIN,RV64IZHINXMIN %s 58 59declare half @llvm.sqrt.f16(half) 60 61define half @sqrt_f16(half %a) nounwind { 62; CHECKIZFH-LABEL: sqrt_f16: 63; CHECKIZFH: # %bb.0: 64; CHECKIZFH-NEXT: fsqrt.h fa0, fa0 65; CHECKIZFH-NEXT: ret 66; 67; CHECKIZHINX-LABEL: sqrt_f16: 68; CHECKIZHINX: # %bb.0: 69; CHECKIZHINX-NEXT: fsqrt.h a0, a0 70; CHECKIZHINX-NEXT: ret 71; 72; RV32I-LABEL: sqrt_f16: 73; RV32I: # %bb.0: 74; RV32I-NEXT: addi sp, sp, -16 75; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 76; RV32I-NEXT: slli a0, a0, 16 77; RV32I-NEXT: srli a0, a0, 16 78; RV32I-NEXT: call __extendhfsf2 79; RV32I-NEXT: call sqrtf 80; RV32I-NEXT: call __truncsfhf2 81; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 82; RV32I-NEXT: addi sp, sp, 16 83; RV32I-NEXT: ret 84; 85; RV64I-LABEL: sqrt_f16: 86; RV64I: # %bb.0: 87; RV64I-NEXT: addi sp, sp, -16 88; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 89; RV64I-NEXT: slli a0, a0, 48 90; RV64I-NEXT: srli a0, a0, 48 91; RV64I-NEXT: call __extendhfsf2 92; RV64I-NEXT: call sqrtf 93; RV64I-NEXT: call __truncsfhf2 94; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 95; RV64I-NEXT: addi sp, sp, 16 96; RV64I-NEXT: ret 97; 98; CHECKIZFHMIN-LABEL: sqrt_f16: 99; CHECKIZFHMIN: # %bb.0: 100; CHECKIZFHMIN-NEXT: fcvt.s.h fa5, fa0 101; CHECKIZFHMIN-NEXT: fsqrt.s fa5, fa5 102; CHECKIZFHMIN-NEXT: fcvt.h.s fa0, fa5 103; CHECKIZFHMIN-NEXT: ret 104; 105; CHECKIZHINXMIN-LABEL: sqrt_f16: 106; CHECKIZHINXMIN: # %bb.0: 107; CHECKIZHINXMIN-NEXT: fcvt.s.h a0, a0 108; CHECKIZHINXMIN-NEXT: fsqrt.s a0, a0 109; CHECKIZHINXMIN-NEXT: fcvt.h.s a0, a0 110; CHECKIZHINXMIN-NEXT: ret 111 %1 = call half @llvm.sqrt.f16(half %a) 112 ret half %1 113} 114 115declare half @llvm.powi.f16.i32(half, i32) 116 117define half @powi_f16(half %a, i32 %b) nounwind { 118; RV32IZFH-LABEL: powi_f16: 119; RV32IZFH: # %bb.0: 120; RV32IZFH-NEXT: addi sp, sp, -16 121; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 122; RV32IZFH-NEXT: fcvt.s.h fa0, fa0 123; RV32IZFH-NEXT: call __powisf2 124; RV32IZFH-NEXT: fcvt.h.s fa0, fa0 125; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 126; RV32IZFH-NEXT: addi sp, sp, 16 127; RV32IZFH-NEXT: ret 128; 129; RV64IZFH-LABEL: powi_f16: 130; RV64IZFH: # %bb.0: 131; RV64IZFH-NEXT: addi sp, sp, -16 132; RV64IZFH-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 133; RV64IZFH-NEXT: fcvt.s.h fa0, fa0 134; RV64IZFH-NEXT: sext.w a0, a0 135; RV64IZFH-NEXT: call __powisf2 136; RV64IZFH-NEXT: fcvt.h.s fa0, fa0 137; RV64IZFH-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 138; RV64IZFH-NEXT: addi sp, sp, 16 139; RV64IZFH-NEXT: ret 140; 141; RV32IZHINX-LABEL: powi_f16: 142; RV32IZHINX: # %bb.0: 143; RV32IZHINX-NEXT: addi sp, sp, -16 144; RV32IZHINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 145; RV32IZHINX-NEXT: fcvt.s.h a0, a0 146; RV32IZHINX-NEXT: call __powisf2 147; RV32IZHINX-NEXT: fcvt.h.s a0, a0 148; RV32IZHINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 149; RV32IZHINX-NEXT: addi sp, sp, 16 150; RV32IZHINX-NEXT: ret 151; 152; RV64IZHINX-LABEL: powi_f16: 153; RV64IZHINX: # %bb.0: 154; RV64IZHINX-NEXT: addi sp, sp, -16 155; RV64IZHINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 156; RV64IZHINX-NEXT: fcvt.s.h a0, a0 157; RV64IZHINX-NEXT: sext.w a1, a1 158; RV64IZHINX-NEXT: call __powisf2 159; RV64IZHINX-NEXT: fcvt.h.s a0, a0 160; RV64IZHINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 161; RV64IZHINX-NEXT: addi sp, sp, 16 162; RV64IZHINX-NEXT: ret 163; 164; RV32I-LABEL: powi_f16: 165; RV32I: # %bb.0: 166; RV32I-NEXT: addi sp, sp, -16 167; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 168; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill 169; RV32I-NEXT: mv s0, a1 170; RV32I-NEXT: slli a0, a0, 16 171; RV32I-NEXT: srli a0, a0, 16 172; RV32I-NEXT: call __extendhfsf2 173; RV32I-NEXT: mv a1, s0 174; RV32I-NEXT: call __powisf2 175; RV32I-NEXT: call __truncsfhf2 176; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 177; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload 178; RV32I-NEXT: addi sp, sp, 16 179; RV32I-NEXT: ret 180; 181; RV64I-LABEL: powi_f16: 182; RV64I: # %bb.0: 183; RV64I-NEXT: addi sp, sp, -16 184; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 185; RV64I-NEXT: sd s0, 0(sp) # 8-byte Folded Spill 186; RV64I-NEXT: mv s0, a1 187; RV64I-NEXT: slli a0, a0, 48 188; RV64I-NEXT: srli a0, a0, 48 189; RV64I-NEXT: call __extendhfsf2 190; RV64I-NEXT: sext.w a1, s0 191; RV64I-NEXT: call __powisf2 192; RV64I-NEXT: call __truncsfhf2 193; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 194; RV64I-NEXT: ld s0, 0(sp) # 8-byte Folded Reload 195; RV64I-NEXT: addi sp, sp, 16 196; RV64I-NEXT: ret 197; 198; RV32IZFHMIN-LABEL: powi_f16: 199; RV32IZFHMIN: # %bb.0: 200; RV32IZFHMIN-NEXT: addi sp, sp, -16 201; RV32IZFHMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 202; RV32IZFHMIN-NEXT: fcvt.s.h fa0, fa0 203; RV32IZFHMIN-NEXT: call __powisf2 204; RV32IZFHMIN-NEXT: fcvt.h.s fa0, fa0 205; RV32IZFHMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 206; RV32IZFHMIN-NEXT: addi sp, sp, 16 207; RV32IZFHMIN-NEXT: ret 208; 209; RV64IZFHMIN-LABEL: powi_f16: 210; RV64IZFHMIN: # %bb.0: 211; RV64IZFHMIN-NEXT: addi sp, sp, -16 212; RV64IZFHMIN-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 213; RV64IZFHMIN-NEXT: fcvt.s.h fa0, fa0 214; RV64IZFHMIN-NEXT: sext.w a0, a0 215; RV64IZFHMIN-NEXT: call __powisf2 216; RV64IZFHMIN-NEXT: fcvt.h.s fa0, fa0 217; RV64IZFHMIN-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 218; RV64IZFHMIN-NEXT: addi sp, sp, 16 219; RV64IZFHMIN-NEXT: ret 220; 221; RV32IZHINXMIN-LABEL: powi_f16: 222; RV32IZHINXMIN: # %bb.0: 223; RV32IZHINXMIN-NEXT: addi sp, sp, -16 224; RV32IZHINXMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 225; RV32IZHINXMIN-NEXT: fcvt.s.h a0, a0 226; RV32IZHINXMIN-NEXT: call __powisf2 227; RV32IZHINXMIN-NEXT: fcvt.h.s a0, a0 228; RV32IZHINXMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 229; RV32IZHINXMIN-NEXT: addi sp, sp, 16 230; RV32IZHINXMIN-NEXT: ret 231; 232; RV64IZHINXMIN-LABEL: powi_f16: 233; RV64IZHINXMIN: # %bb.0: 234; RV64IZHINXMIN-NEXT: addi sp, sp, -16 235; RV64IZHINXMIN-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 236; RV64IZHINXMIN-NEXT: fcvt.s.h a0, a0 237; RV64IZHINXMIN-NEXT: sext.w a1, a1 238; RV64IZHINXMIN-NEXT: call __powisf2 239; RV64IZHINXMIN-NEXT: fcvt.h.s a0, a0 240; RV64IZHINXMIN-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 241; RV64IZHINXMIN-NEXT: addi sp, sp, 16 242; RV64IZHINXMIN-NEXT: ret 243 %1 = call half @llvm.powi.f16.i32(half %a, i32 %b) 244 ret half %1 245} 246 247declare half @llvm.sin.f16(half) 248 249define half @sin_f16(half %a) nounwind { 250; RV32IZFH-LABEL: sin_f16: 251; RV32IZFH: # %bb.0: 252; RV32IZFH-NEXT: addi sp, sp, -16 253; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 254; RV32IZFH-NEXT: fcvt.s.h fa0, fa0 255; RV32IZFH-NEXT: call sinf 256; RV32IZFH-NEXT: fcvt.h.s fa0, fa0 257; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 258; RV32IZFH-NEXT: addi sp, sp, 16 259; RV32IZFH-NEXT: ret 260; 261; RV64IZFH-LABEL: sin_f16: 262; RV64IZFH: # %bb.0: 263; RV64IZFH-NEXT: addi sp, sp, -16 264; RV64IZFH-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 265; RV64IZFH-NEXT: fcvt.s.h fa0, fa0 266; RV64IZFH-NEXT: call sinf 267; RV64IZFH-NEXT: fcvt.h.s fa0, fa0 268; RV64IZFH-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 269; RV64IZFH-NEXT: addi sp, sp, 16 270; RV64IZFH-NEXT: ret 271; 272; RV32IZHINX-LABEL: sin_f16: 273; RV32IZHINX: # %bb.0: 274; RV32IZHINX-NEXT: addi sp, sp, -16 275; RV32IZHINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 276; RV32IZHINX-NEXT: fcvt.s.h a0, a0 277; RV32IZHINX-NEXT: call sinf 278; RV32IZHINX-NEXT: fcvt.h.s a0, a0 279; RV32IZHINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 280; RV32IZHINX-NEXT: addi sp, sp, 16 281; RV32IZHINX-NEXT: ret 282; 283; RV64IZHINX-LABEL: sin_f16: 284; RV64IZHINX: # %bb.0: 285; RV64IZHINX-NEXT: addi sp, sp, -16 286; RV64IZHINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 287; RV64IZHINX-NEXT: fcvt.s.h a0, a0 288; RV64IZHINX-NEXT: call sinf 289; RV64IZHINX-NEXT: fcvt.h.s a0, a0 290; RV64IZHINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 291; RV64IZHINX-NEXT: addi sp, sp, 16 292; RV64IZHINX-NEXT: ret 293; 294; RV32I-LABEL: sin_f16: 295; RV32I: # %bb.0: 296; RV32I-NEXT: addi sp, sp, -16 297; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 298; RV32I-NEXT: slli a0, a0, 16 299; RV32I-NEXT: srli a0, a0, 16 300; RV32I-NEXT: call __extendhfsf2 301; RV32I-NEXT: call sinf 302; RV32I-NEXT: call __truncsfhf2 303; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 304; RV32I-NEXT: addi sp, sp, 16 305; RV32I-NEXT: ret 306; 307; RV64I-LABEL: sin_f16: 308; RV64I: # %bb.0: 309; RV64I-NEXT: addi sp, sp, -16 310; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 311; RV64I-NEXT: slli a0, a0, 48 312; RV64I-NEXT: srli a0, a0, 48 313; RV64I-NEXT: call __extendhfsf2 314; RV64I-NEXT: call sinf 315; RV64I-NEXT: call __truncsfhf2 316; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 317; RV64I-NEXT: addi sp, sp, 16 318; RV64I-NEXT: ret 319; 320; RV32IZFHMIN-LABEL: sin_f16: 321; RV32IZFHMIN: # %bb.0: 322; RV32IZFHMIN-NEXT: addi sp, sp, -16 323; RV32IZFHMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 324; RV32IZFHMIN-NEXT: fcvt.s.h fa0, fa0 325; RV32IZFHMIN-NEXT: call sinf 326; RV32IZFHMIN-NEXT: fcvt.h.s fa0, fa0 327; RV32IZFHMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 328; RV32IZFHMIN-NEXT: addi sp, sp, 16 329; RV32IZFHMIN-NEXT: ret 330; 331; RV64IZFHMIN-LABEL: sin_f16: 332; RV64IZFHMIN: # %bb.0: 333; RV64IZFHMIN-NEXT: addi sp, sp, -16 334; RV64IZFHMIN-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 335; RV64IZFHMIN-NEXT: fcvt.s.h fa0, fa0 336; RV64IZFHMIN-NEXT: call sinf 337; RV64IZFHMIN-NEXT: fcvt.h.s fa0, fa0 338; RV64IZFHMIN-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 339; RV64IZFHMIN-NEXT: addi sp, sp, 16 340; RV64IZFHMIN-NEXT: ret 341; 342; RV32IZHINXMIN-LABEL: sin_f16: 343; RV32IZHINXMIN: # %bb.0: 344; RV32IZHINXMIN-NEXT: addi sp, sp, -16 345; RV32IZHINXMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 346; RV32IZHINXMIN-NEXT: fcvt.s.h a0, a0 347; RV32IZHINXMIN-NEXT: call sinf 348; RV32IZHINXMIN-NEXT: fcvt.h.s a0, a0 349; RV32IZHINXMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 350; RV32IZHINXMIN-NEXT: addi sp, sp, 16 351; RV32IZHINXMIN-NEXT: ret 352; 353; RV64IZHINXMIN-LABEL: sin_f16: 354; RV64IZHINXMIN: # %bb.0: 355; RV64IZHINXMIN-NEXT: addi sp, sp, -16 356; RV64IZHINXMIN-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 357; RV64IZHINXMIN-NEXT: fcvt.s.h a0, a0 358; RV64IZHINXMIN-NEXT: call sinf 359; RV64IZHINXMIN-NEXT: fcvt.h.s a0, a0 360; RV64IZHINXMIN-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 361; RV64IZHINXMIN-NEXT: addi sp, sp, 16 362; RV64IZHINXMIN-NEXT: ret 363 %1 = call half @llvm.sin.f16(half %a) 364 ret half %1 365} 366 367declare half @llvm.cos.f16(half) 368 369define half @cos_f16(half %a) nounwind { 370; RV32IZFH-LABEL: cos_f16: 371; RV32IZFH: # %bb.0: 372; RV32IZFH-NEXT: addi sp, sp, -16 373; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 374; RV32IZFH-NEXT: fcvt.s.h fa0, fa0 375; RV32IZFH-NEXT: call cosf 376; RV32IZFH-NEXT: fcvt.h.s fa0, fa0 377; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 378; RV32IZFH-NEXT: addi sp, sp, 16 379; RV32IZFH-NEXT: ret 380; 381; RV64IZFH-LABEL: cos_f16: 382; RV64IZFH: # %bb.0: 383; RV64IZFH-NEXT: addi sp, sp, -16 384; RV64IZFH-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 385; RV64IZFH-NEXT: fcvt.s.h fa0, fa0 386; RV64IZFH-NEXT: call cosf 387; RV64IZFH-NEXT: fcvt.h.s fa0, fa0 388; RV64IZFH-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 389; RV64IZFH-NEXT: addi sp, sp, 16 390; RV64IZFH-NEXT: ret 391; 392; RV32IZHINX-LABEL: cos_f16: 393; RV32IZHINX: # %bb.0: 394; RV32IZHINX-NEXT: addi sp, sp, -16 395; RV32IZHINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 396; RV32IZHINX-NEXT: fcvt.s.h a0, a0 397; RV32IZHINX-NEXT: call cosf 398; RV32IZHINX-NEXT: fcvt.h.s a0, a0 399; RV32IZHINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 400; RV32IZHINX-NEXT: addi sp, sp, 16 401; RV32IZHINX-NEXT: ret 402; 403; RV64IZHINX-LABEL: cos_f16: 404; RV64IZHINX: # %bb.0: 405; RV64IZHINX-NEXT: addi sp, sp, -16 406; RV64IZHINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 407; RV64IZHINX-NEXT: fcvt.s.h a0, a0 408; RV64IZHINX-NEXT: call cosf 409; RV64IZHINX-NEXT: fcvt.h.s a0, a0 410; RV64IZHINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 411; RV64IZHINX-NEXT: addi sp, sp, 16 412; RV64IZHINX-NEXT: ret 413; 414; RV32I-LABEL: cos_f16: 415; RV32I: # %bb.0: 416; RV32I-NEXT: addi sp, sp, -16 417; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 418; RV32I-NEXT: slli a0, a0, 16 419; RV32I-NEXT: srli a0, a0, 16 420; RV32I-NEXT: call __extendhfsf2 421; RV32I-NEXT: call cosf 422; RV32I-NEXT: call __truncsfhf2 423; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 424; RV32I-NEXT: addi sp, sp, 16 425; RV32I-NEXT: ret 426; 427; RV64I-LABEL: cos_f16: 428; RV64I: # %bb.0: 429; RV64I-NEXT: addi sp, sp, -16 430; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 431; RV64I-NEXT: slli a0, a0, 48 432; RV64I-NEXT: srli a0, a0, 48 433; RV64I-NEXT: call __extendhfsf2 434; RV64I-NEXT: call cosf 435; RV64I-NEXT: call __truncsfhf2 436; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 437; RV64I-NEXT: addi sp, sp, 16 438; RV64I-NEXT: ret 439; 440; RV32IZFHMIN-LABEL: cos_f16: 441; RV32IZFHMIN: # %bb.0: 442; RV32IZFHMIN-NEXT: addi sp, sp, -16 443; RV32IZFHMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 444; RV32IZFHMIN-NEXT: fcvt.s.h fa0, fa0 445; RV32IZFHMIN-NEXT: call cosf 446; RV32IZFHMIN-NEXT: fcvt.h.s fa0, fa0 447; RV32IZFHMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 448; RV32IZFHMIN-NEXT: addi sp, sp, 16 449; RV32IZFHMIN-NEXT: ret 450; 451; RV64IZFHMIN-LABEL: cos_f16: 452; RV64IZFHMIN: # %bb.0: 453; RV64IZFHMIN-NEXT: addi sp, sp, -16 454; RV64IZFHMIN-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 455; RV64IZFHMIN-NEXT: fcvt.s.h fa0, fa0 456; RV64IZFHMIN-NEXT: call cosf 457; RV64IZFHMIN-NEXT: fcvt.h.s fa0, fa0 458; RV64IZFHMIN-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 459; RV64IZFHMIN-NEXT: addi sp, sp, 16 460; RV64IZFHMIN-NEXT: ret 461; 462; RV32IZHINXMIN-LABEL: cos_f16: 463; RV32IZHINXMIN: # %bb.0: 464; RV32IZHINXMIN-NEXT: addi sp, sp, -16 465; RV32IZHINXMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 466; RV32IZHINXMIN-NEXT: fcvt.s.h a0, a0 467; RV32IZHINXMIN-NEXT: call cosf 468; RV32IZHINXMIN-NEXT: fcvt.h.s a0, a0 469; RV32IZHINXMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 470; RV32IZHINXMIN-NEXT: addi sp, sp, 16 471; RV32IZHINXMIN-NEXT: ret 472; 473; RV64IZHINXMIN-LABEL: cos_f16: 474; RV64IZHINXMIN: # %bb.0: 475; RV64IZHINXMIN-NEXT: addi sp, sp, -16 476; RV64IZHINXMIN-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 477; RV64IZHINXMIN-NEXT: fcvt.s.h a0, a0 478; RV64IZHINXMIN-NEXT: call cosf 479; RV64IZHINXMIN-NEXT: fcvt.h.s a0, a0 480; RV64IZHINXMIN-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 481; RV64IZHINXMIN-NEXT: addi sp, sp, 16 482; RV64IZHINXMIN-NEXT: ret 483 %1 = call half @llvm.cos.f16(half %a) 484 ret half %1 485} 486 487; The sin+cos combination results in an FSINCOS SelectionDAG node. 488define half @sincos_f16(half %a) nounwind { 489; RV32IFZFH-LABEL: sincos_f16: 490; RV32IFZFH: # %bb.0: 491; RV32IFZFH-NEXT: addi sp, sp, -16 492; RV32IFZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 493; RV32IFZFH-NEXT: fsw fs0, 8(sp) # 4-byte Folded Spill 494; RV32IFZFH-NEXT: fsw fs1, 4(sp) # 4-byte Folded Spill 495; RV32IFZFH-NEXT: fcvt.s.h fs0, fa0 496; RV32IFZFH-NEXT: fmv.s fa0, fs0 497; RV32IFZFH-NEXT: call sinf 498; RV32IFZFH-NEXT: fcvt.h.s fs1, fa0 499; RV32IFZFH-NEXT: fmv.s fa0, fs0 500; RV32IFZFH-NEXT: call cosf 501; RV32IFZFH-NEXT: fcvt.h.s fa5, fa0 502; RV32IFZFH-NEXT: fadd.h fa0, fs1, fa5 503; RV32IFZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 504; RV32IFZFH-NEXT: flw fs0, 8(sp) # 4-byte Folded Reload 505; RV32IFZFH-NEXT: flw fs1, 4(sp) # 4-byte Folded Reload 506; RV32IFZFH-NEXT: addi sp, sp, 16 507; RV32IFZFH-NEXT: ret 508; 509; RV64IFZFH-LABEL: sincos_f16: 510; RV64IFZFH: # %bb.0: 511; RV64IFZFH-NEXT: addi sp, sp, -16 512; RV64IFZFH-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 513; RV64IFZFH-NEXT: fsw fs0, 4(sp) # 4-byte Folded Spill 514; RV64IFZFH-NEXT: fsw fs1, 0(sp) # 4-byte Folded Spill 515; RV64IFZFH-NEXT: fcvt.s.h fs0, fa0 516; RV64IFZFH-NEXT: fmv.s fa0, fs0 517; RV64IFZFH-NEXT: call sinf 518; RV64IFZFH-NEXT: fcvt.h.s fs1, fa0 519; RV64IFZFH-NEXT: fmv.s fa0, fs0 520; RV64IFZFH-NEXT: call cosf 521; RV64IFZFH-NEXT: fcvt.h.s fa5, fa0 522; RV64IFZFH-NEXT: fadd.h fa0, fs1, fa5 523; RV64IFZFH-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 524; RV64IFZFH-NEXT: flw fs0, 4(sp) # 4-byte Folded Reload 525; RV64IFZFH-NEXT: flw fs1, 0(sp) # 4-byte Folded Reload 526; RV64IFZFH-NEXT: addi sp, sp, 16 527; RV64IFZFH-NEXT: ret 528; 529; RV32IZHINX-LABEL: sincos_f16: 530; RV32IZHINX: # %bb.0: 531; RV32IZHINX-NEXT: addi sp, sp, -16 532; RV32IZHINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 533; RV32IZHINX-NEXT: sw s0, 8(sp) # 4-byte Folded Spill 534; RV32IZHINX-NEXT: sw s1, 4(sp) # 4-byte Folded Spill 535; RV32IZHINX-NEXT: fcvt.s.h s0, a0 536; RV32IZHINX-NEXT: mv a0, s0 537; RV32IZHINX-NEXT: call sinf 538; RV32IZHINX-NEXT: fcvt.h.s s1, a0 539; RV32IZHINX-NEXT: mv a0, s0 540; RV32IZHINX-NEXT: call cosf 541; RV32IZHINX-NEXT: fcvt.h.s a0, a0 542; RV32IZHINX-NEXT: fadd.h a0, s1, a0 543; RV32IZHINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 544; RV32IZHINX-NEXT: lw s0, 8(sp) # 4-byte Folded Reload 545; RV32IZHINX-NEXT: lw s1, 4(sp) # 4-byte Folded Reload 546; RV32IZHINX-NEXT: addi sp, sp, 16 547; RV32IZHINX-NEXT: ret 548; 549; RV64IZHINX-LABEL: sincos_f16: 550; RV64IZHINX: # %bb.0: 551; RV64IZHINX-NEXT: addi sp, sp, -32 552; RV64IZHINX-NEXT: sd ra, 24(sp) # 8-byte Folded Spill 553; RV64IZHINX-NEXT: sd s0, 16(sp) # 8-byte Folded Spill 554; RV64IZHINX-NEXT: sd s1, 8(sp) # 8-byte Folded Spill 555; RV64IZHINX-NEXT: fcvt.s.h s0, a0 556; RV64IZHINX-NEXT: mv a0, s0 557; RV64IZHINX-NEXT: call sinf 558; RV64IZHINX-NEXT: fcvt.h.s s1, a0 559; RV64IZHINX-NEXT: mv a0, s0 560; RV64IZHINX-NEXT: call cosf 561; RV64IZHINX-NEXT: fcvt.h.s a0, a0 562; RV64IZHINX-NEXT: fadd.h a0, s1, a0 563; RV64IZHINX-NEXT: ld ra, 24(sp) # 8-byte Folded Reload 564; RV64IZHINX-NEXT: ld s0, 16(sp) # 8-byte Folded Reload 565; RV64IZHINX-NEXT: ld s1, 8(sp) # 8-byte Folded Reload 566; RV64IZHINX-NEXT: addi sp, sp, 32 567; RV64IZHINX-NEXT: ret 568; 569; RV32IDZFH-LABEL: sincos_f16: 570; RV32IDZFH: # %bb.0: 571; RV32IDZFH-NEXT: addi sp, sp, -32 572; RV32IDZFH-NEXT: sw ra, 28(sp) # 4-byte Folded Spill 573; RV32IDZFH-NEXT: fsd fs0, 16(sp) # 8-byte Folded Spill 574; RV32IDZFH-NEXT: fsd fs1, 8(sp) # 8-byte Folded Spill 575; RV32IDZFH-NEXT: fcvt.s.h fs0, fa0 576; RV32IDZFH-NEXT: fmv.s fa0, fs0 577; RV32IDZFH-NEXT: call sinf 578; RV32IDZFH-NEXT: fcvt.h.s fs1, fa0 579; RV32IDZFH-NEXT: fmv.s fa0, fs0 580; RV32IDZFH-NEXT: call cosf 581; RV32IDZFH-NEXT: fcvt.h.s fa5, fa0 582; RV32IDZFH-NEXT: fadd.h fa0, fs1, fa5 583; RV32IDZFH-NEXT: lw ra, 28(sp) # 4-byte Folded Reload 584; RV32IDZFH-NEXT: fld fs0, 16(sp) # 8-byte Folded Reload 585; RV32IDZFH-NEXT: fld fs1, 8(sp) # 8-byte Folded Reload 586; RV32IDZFH-NEXT: addi sp, sp, 32 587; RV32IDZFH-NEXT: ret 588; 589; RV64IDZFH-LABEL: sincos_f16: 590; RV64IDZFH: # %bb.0: 591; RV64IDZFH-NEXT: addi sp, sp, -32 592; RV64IDZFH-NEXT: sd ra, 24(sp) # 8-byte Folded Spill 593; RV64IDZFH-NEXT: fsd fs0, 16(sp) # 8-byte Folded Spill 594; RV64IDZFH-NEXT: fsd fs1, 8(sp) # 8-byte Folded Spill 595; RV64IDZFH-NEXT: fcvt.s.h fs0, fa0 596; RV64IDZFH-NEXT: fmv.s fa0, fs0 597; RV64IDZFH-NEXT: call sinf 598; RV64IDZFH-NEXT: fcvt.h.s fs1, fa0 599; RV64IDZFH-NEXT: fmv.s fa0, fs0 600; RV64IDZFH-NEXT: call cosf 601; RV64IDZFH-NEXT: fcvt.h.s fa5, fa0 602; RV64IDZFH-NEXT: fadd.h fa0, fs1, fa5 603; RV64IDZFH-NEXT: ld ra, 24(sp) # 8-byte Folded Reload 604; RV64IDZFH-NEXT: fld fs0, 16(sp) # 8-byte Folded Reload 605; RV64IDZFH-NEXT: fld fs1, 8(sp) # 8-byte Folded Reload 606; RV64IDZFH-NEXT: addi sp, sp, 32 607; RV64IDZFH-NEXT: ret 608; 609; RV32I-LABEL: sincos_f16: 610; RV32I: # %bb.0: 611; RV32I-NEXT: addi sp, sp, -16 612; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 613; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill 614; RV32I-NEXT: sw s1, 4(sp) # 4-byte Folded Spill 615; RV32I-NEXT: sw s2, 0(sp) # 4-byte Folded Spill 616; RV32I-NEXT: lui a1, 16 617; RV32I-NEXT: addi s2, a1, -1 618; RV32I-NEXT: and a0, a0, s2 619; RV32I-NEXT: call __extendhfsf2 620; RV32I-NEXT: mv s0, a0 621; RV32I-NEXT: call sinf 622; RV32I-NEXT: call __truncsfhf2 623; RV32I-NEXT: mv s1, a0 624; RV32I-NEXT: mv a0, s0 625; RV32I-NEXT: call cosf 626; RV32I-NEXT: call __truncsfhf2 627; RV32I-NEXT: mv s0, a0 628; RV32I-NEXT: and a0, s1, s2 629; RV32I-NEXT: call __extendhfsf2 630; RV32I-NEXT: mv s1, a0 631; RV32I-NEXT: and a0, s0, s2 632; RV32I-NEXT: call __extendhfsf2 633; RV32I-NEXT: mv a1, a0 634; RV32I-NEXT: mv a0, s1 635; RV32I-NEXT: call __addsf3 636; RV32I-NEXT: call __truncsfhf2 637; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 638; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload 639; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload 640; RV32I-NEXT: lw s2, 0(sp) # 4-byte Folded Reload 641; RV32I-NEXT: addi sp, sp, 16 642; RV32I-NEXT: ret 643; 644; RV64I-LABEL: sincos_f16: 645; RV64I: # %bb.0: 646; RV64I-NEXT: addi sp, sp, -32 647; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill 648; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill 649; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill 650; RV64I-NEXT: sd s2, 0(sp) # 8-byte Folded Spill 651; RV64I-NEXT: lui a1, 16 652; RV64I-NEXT: addiw s2, a1, -1 653; RV64I-NEXT: and a0, a0, s2 654; RV64I-NEXT: call __extendhfsf2 655; RV64I-NEXT: mv s0, a0 656; RV64I-NEXT: call sinf 657; RV64I-NEXT: call __truncsfhf2 658; RV64I-NEXT: mv s1, a0 659; RV64I-NEXT: mv a0, s0 660; RV64I-NEXT: call cosf 661; RV64I-NEXT: call __truncsfhf2 662; RV64I-NEXT: mv s0, a0 663; RV64I-NEXT: and a0, s1, s2 664; RV64I-NEXT: call __extendhfsf2 665; RV64I-NEXT: mv s1, a0 666; RV64I-NEXT: and a0, s0, s2 667; RV64I-NEXT: call __extendhfsf2 668; RV64I-NEXT: mv a1, a0 669; RV64I-NEXT: mv a0, s1 670; RV64I-NEXT: call __addsf3 671; RV64I-NEXT: call __truncsfhf2 672; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload 673; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload 674; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload 675; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload 676; RV64I-NEXT: addi sp, sp, 32 677; RV64I-NEXT: ret 678; 679; RV32IFZFHMIN-LABEL: sincos_f16: 680; RV32IFZFHMIN: # %bb.0: 681; RV32IFZFHMIN-NEXT: addi sp, sp, -16 682; RV32IFZFHMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 683; RV32IFZFHMIN-NEXT: fsw fs0, 8(sp) # 4-byte Folded Spill 684; RV32IFZFHMIN-NEXT: fsw fs1, 4(sp) # 4-byte Folded Spill 685; RV32IFZFHMIN-NEXT: fcvt.s.h fs0, fa0 686; RV32IFZFHMIN-NEXT: fmv.s fa0, fs0 687; RV32IFZFHMIN-NEXT: call sinf 688; RV32IFZFHMIN-NEXT: fcvt.h.s fs1, fa0 689; RV32IFZFHMIN-NEXT: fmv.s fa0, fs0 690; RV32IFZFHMIN-NEXT: call cosf 691; RV32IFZFHMIN-NEXT: fcvt.h.s fa5, fa0 692; RV32IFZFHMIN-NEXT: fcvt.s.h fa5, fa5 693; RV32IFZFHMIN-NEXT: fcvt.s.h fa4, fs1 694; RV32IFZFHMIN-NEXT: fadd.s fa5, fa4, fa5 695; RV32IFZFHMIN-NEXT: fcvt.h.s fa0, fa5 696; RV32IFZFHMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 697; RV32IFZFHMIN-NEXT: flw fs0, 8(sp) # 4-byte Folded Reload 698; RV32IFZFHMIN-NEXT: flw fs1, 4(sp) # 4-byte Folded Reload 699; RV32IFZFHMIN-NEXT: addi sp, sp, 16 700; RV32IFZFHMIN-NEXT: ret 701; 702; RV64IFZFHMIN-LABEL: sincos_f16: 703; RV64IFZFHMIN: # %bb.0: 704; RV64IFZFHMIN-NEXT: addi sp, sp, -16 705; RV64IFZFHMIN-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 706; RV64IFZFHMIN-NEXT: fsw fs0, 4(sp) # 4-byte Folded Spill 707; RV64IFZFHMIN-NEXT: fsw fs1, 0(sp) # 4-byte Folded Spill 708; RV64IFZFHMIN-NEXT: fcvt.s.h fs0, fa0 709; RV64IFZFHMIN-NEXT: fmv.s fa0, fs0 710; RV64IFZFHMIN-NEXT: call sinf 711; RV64IFZFHMIN-NEXT: fcvt.h.s fs1, fa0 712; RV64IFZFHMIN-NEXT: fmv.s fa0, fs0 713; RV64IFZFHMIN-NEXT: call cosf 714; RV64IFZFHMIN-NEXT: fcvt.h.s fa5, fa0 715; RV64IFZFHMIN-NEXT: fcvt.s.h fa5, fa5 716; RV64IFZFHMIN-NEXT: fcvt.s.h fa4, fs1 717; RV64IFZFHMIN-NEXT: fadd.s fa5, fa4, fa5 718; RV64IFZFHMIN-NEXT: fcvt.h.s fa0, fa5 719; RV64IFZFHMIN-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 720; RV64IFZFHMIN-NEXT: flw fs0, 4(sp) # 4-byte Folded Reload 721; RV64IFZFHMIN-NEXT: flw fs1, 0(sp) # 4-byte Folded Reload 722; RV64IFZFHMIN-NEXT: addi sp, sp, 16 723; RV64IFZFHMIN-NEXT: ret 724; 725; RV32IDZFHMIN-LABEL: sincos_f16: 726; RV32IDZFHMIN: # %bb.0: 727; RV32IDZFHMIN-NEXT: addi sp, sp, -32 728; RV32IDZFHMIN-NEXT: sw ra, 28(sp) # 4-byte Folded Spill 729; RV32IDZFHMIN-NEXT: fsd fs0, 16(sp) # 8-byte Folded Spill 730; RV32IDZFHMIN-NEXT: fsd fs1, 8(sp) # 8-byte Folded Spill 731; RV32IDZFHMIN-NEXT: fcvt.s.h fs0, fa0 732; RV32IDZFHMIN-NEXT: fmv.s fa0, fs0 733; RV32IDZFHMIN-NEXT: call sinf 734; RV32IDZFHMIN-NEXT: fcvt.h.s fs1, fa0 735; RV32IDZFHMIN-NEXT: fmv.s fa0, fs0 736; RV32IDZFHMIN-NEXT: call cosf 737; RV32IDZFHMIN-NEXT: fcvt.h.s fa5, fa0 738; RV32IDZFHMIN-NEXT: fcvt.s.h fa5, fa5 739; RV32IDZFHMIN-NEXT: fcvt.s.h fa4, fs1 740; RV32IDZFHMIN-NEXT: fadd.s fa5, fa4, fa5 741; RV32IDZFHMIN-NEXT: fcvt.h.s fa0, fa5 742; RV32IDZFHMIN-NEXT: lw ra, 28(sp) # 4-byte Folded Reload 743; RV32IDZFHMIN-NEXT: fld fs0, 16(sp) # 8-byte Folded Reload 744; RV32IDZFHMIN-NEXT: fld fs1, 8(sp) # 8-byte Folded Reload 745; RV32IDZFHMIN-NEXT: addi sp, sp, 32 746; RV32IDZFHMIN-NEXT: ret 747; 748; RV64IDZFHMIN-LABEL: sincos_f16: 749; RV64IDZFHMIN: # %bb.0: 750; RV64IDZFHMIN-NEXT: addi sp, sp, -32 751; RV64IDZFHMIN-NEXT: sd ra, 24(sp) # 8-byte Folded Spill 752; RV64IDZFHMIN-NEXT: fsd fs0, 16(sp) # 8-byte Folded Spill 753; RV64IDZFHMIN-NEXT: fsd fs1, 8(sp) # 8-byte Folded Spill 754; RV64IDZFHMIN-NEXT: fcvt.s.h fs0, fa0 755; RV64IDZFHMIN-NEXT: fmv.s fa0, fs0 756; RV64IDZFHMIN-NEXT: call sinf 757; RV64IDZFHMIN-NEXT: fcvt.h.s fs1, fa0 758; RV64IDZFHMIN-NEXT: fmv.s fa0, fs0 759; RV64IDZFHMIN-NEXT: call cosf 760; RV64IDZFHMIN-NEXT: fcvt.h.s fa5, fa0 761; RV64IDZFHMIN-NEXT: fcvt.s.h fa5, fa5 762; RV64IDZFHMIN-NEXT: fcvt.s.h fa4, fs1 763; RV64IDZFHMIN-NEXT: fadd.s fa5, fa4, fa5 764; RV64IDZFHMIN-NEXT: fcvt.h.s fa0, fa5 765; RV64IDZFHMIN-NEXT: ld ra, 24(sp) # 8-byte Folded Reload 766; RV64IDZFHMIN-NEXT: fld fs0, 16(sp) # 8-byte Folded Reload 767; RV64IDZFHMIN-NEXT: fld fs1, 8(sp) # 8-byte Folded Reload 768; RV64IDZFHMIN-NEXT: addi sp, sp, 32 769; RV64IDZFHMIN-NEXT: ret 770; 771; RV32IZHINXMIN-LABEL: sincos_f16: 772; RV32IZHINXMIN: # %bb.0: 773; RV32IZHINXMIN-NEXT: addi sp, sp, -16 774; RV32IZHINXMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 775; RV32IZHINXMIN-NEXT: sw s0, 8(sp) # 4-byte Folded Spill 776; RV32IZHINXMIN-NEXT: sw s1, 4(sp) # 4-byte Folded Spill 777; RV32IZHINXMIN-NEXT: fcvt.s.h s0, a0 778; RV32IZHINXMIN-NEXT: mv a0, s0 779; RV32IZHINXMIN-NEXT: call sinf 780; RV32IZHINXMIN-NEXT: fcvt.h.s s1, a0 781; RV32IZHINXMIN-NEXT: mv a0, s0 782; RV32IZHINXMIN-NEXT: call cosf 783; RV32IZHINXMIN-NEXT: fcvt.h.s a0, a0 784; RV32IZHINXMIN-NEXT: fcvt.s.h a0, a0 785; RV32IZHINXMIN-NEXT: fcvt.s.h a1, s1 786; RV32IZHINXMIN-NEXT: fadd.s a0, a1, a0 787; RV32IZHINXMIN-NEXT: fcvt.h.s a0, a0 788; RV32IZHINXMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 789; RV32IZHINXMIN-NEXT: lw s0, 8(sp) # 4-byte Folded Reload 790; RV32IZHINXMIN-NEXT: lw s1, 4(sp) # 4-byte Folded Reload 791; RV32IZHINXMIN-NEXT: addi sp, sp, 16 792; RV32IZHINXMIN-NEXT: ret 793; 794; RV64IZHINXMIN-LABEL: sincos_f16: 795; RV64IZHINXMIN: # %bb.0: 796; RV64IZHINXMIN-NEXT: addi sp, sp, -32 797; RV64IZHINXMIN-NEXT: sd ra, 24(sp) # 8-byte Folded Spill 798; RV64IZHINXMIN-NEXT: sd s0, 16(sp) # 8-byte Folded Spill 799; RV64IZHINXMIN-NEXT: sd s1, 8(sp) # 8-byte Folded Spill 800; RV64IZHINXMIN-NEXT: fcvt.s.h s0, a0 801; RV64IZHINXMIN-NEXT: mv a0, s0 802; RV64IZHINXMIN-NEXT: call sinf 803; RV64IZHINXMIN-NEXT: fcvt.h.s s1, a0 804; RV64IZHINXMIN-NEXT: mv a0, s0 805; RV64IZHINXMIN-NEXT: call cosf 806; RV64IZHINXMIN-NEXT: fcvt.h.s a0, a0 807; RV64IZHINXMIN-NEXT: fcvt.s.h a0, a0 808; RV64IZHINXMIN-NEXT: fcvt.s.h a1, s1 809; RV64IZHINXMIN-NEXT: fadd.s a0, a1, a0 810; RV64IZHINXMIN-NEXT: fcvt.h.s a0, a0 811; RV64IZHINXMIN-NEXT: ld ra, 24(sp) # 8-byte Folded Reload 812; RV64IZHINXMIN-NEXT: ld s0, 16(sp) # 8-byte Folded Reload 813; RV64IZHINXMIN-NEXT: ld s1, 8(sp) # 8-byte Folded Reload 814; RV64IZHINXMIN-NEXT: addi sp, sp, 32 815; RV64IZHINXMIN-NEXT: ret 816 %1 = call half @llvm.sin.f16(half %a) 817 %2 = call half @llvm.cos.f16(half %a) 818 %3 = fadd half %1, %2 819 ret half %3 820} 821 822declare half @llvm.pow.f16(half, half) 823 824define half @pow_f16(half %a, half %b) nounwind { 825; RV32IZFH-LABEL: pow_f16: 826; RV32IZFH: # %bb.0: 827; RV32IZFH-NEXT: addi sp, sp, -16 828; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 829; RV32IZFH-NEXT: fcvt.s.h fa0, fa0 830; RV32IZFH-NEXT: fcvt.s.h fa1, fa1 831; RV32IZFH-NEXT: call powf 832; RV32IZFH-NEXT: fcvt.h.s fa0, fa0 833; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 834; RV32IZFH-NEXT: addi sp, sp, 16 835; RV32IZFH-NEXT: ret 836; 837; RV64IZFH-LABEL: pow_f16: 838; RV64IZFH: # %bb.0: 839; RV64IZFH-NEXT: addi sp, sp, -16 840; RV64IZFH-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 841; RV64IZFH-NEXT: fcvt.s.h fa0, fa0 842; RV64IZFH-NEXT: fcvt.s.h fa1, fa1 843; RV64IZFH-NEXT: call powf 844; RV64IZFH-NEXT: fcvt.h.s fa0, fa0 845; RV64IZFH-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 846; RV64IZFH-NEXT: addi sp, sp, 16 847; RV64IZFH-NEXT: ret 848; 849; RV32IZHINX-LABEL: pow_f16: 850; RV32IZHINX: # %bb.0: 851; RV32IZHINX-NEXT: addi sp, sp, -16 852; RV32IZHINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 853; RV32IZHINX-NEXT: fcvt.s.h a0, a0 854; RV32IZHINX-NEXT: fcvt.s.h a1, a1 855; RV32IZHINX-NEXT: call powf 856; RV32IZHINX-NEXT: fcvt.h.s a0, a0 857; RV32IZHINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 858; RV32IZHINX-NEXT: addi sp, sp, 16 859; RV32IZHINX-NEXT: ret 860; 861; RV64IZHINX-LABEL: pow_f16: 862; RV64IZHINX: # %bb.0: 863; RV64IZHINX-NEXT: addi sp, sp, -16 864; RV64IZHINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 865; RV64IZHINX-NEXT: fcvt.s.h a0, a0 866; RV64IZHINX-NEXT: fcvt.s.h a1, a1 867; RV64IZHINX-NEXT: call powf 868; RV64IZHINX-NEXT: fcvt.h.s a0, a0 869; RV64IZHINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 870; RV64IZHINX-NEXT: addi sp, sp, 16 871; RV64IZHINX-NEXT: ret 872; 873; RV32I-LABEL: pow_f16: 874; RV32I: # %bb.0: 875; RV32I-NEXT: addi sp, sp, -16 876; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 877; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill 878; RV32I-NEXT: sw s1, 4(sp) # 4-byte Folded Spill 879; RV32I-NEXT: sw s2, 0(sp) # 4-byte Folded Spill 880; RV32I-NEXT: mv s0, a1 881; RV32I-NEXT: lui a1, 16 882; RV32I-NEXT: addi s2, a1, -1 883; RV32I-NEXT: and a0, a0, s2 884; RV32I-NEXT: call __extendhfsf2 885; RV32I-NEXT: mv s1, a0 886; RV32I-NEXT: and a0, s0, s2 887; RV32I-NEXT: call __extendhfsf2 888; RV32I-NEXT: mv a1, a0 889; RV32I-NEXT: mv a0, s1 890; RV32I-NEXT: call powf 891; RV32I-NEXT: call __truncsfhf2 892; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 893; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload 894; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload 895; RV32I-NEXT: lw s2, 0(sp) # 4-byte Folded Reload 896; RV32I-NEXT: addi sp, sp, 16 897; RV32I-NEXT: ret 898; 899; RV64I-LABEL: pow_f16: 900; RV64I: # %bb.0: 901; RV64I-NEXT: addi sp, sp, -32 902; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill 903; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill 904; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill 905; RV64I-NEXT: sd s2, 0(sp) # 8-byte Folded Spill 906; RV64I-NEXT: mv s0, a1 907; RV64I-NEXT: lui a1, 16 908; RV64I-NEXT: addiw s2, a1, -1 909; RV64I-NEXT: and a0, a0, s2 910; RV64I-NEXT: call __extendhfsf2 911; RV64I-NEXT: mv s1, a0 912; RV64I-NEXT: and a0, s0, s2 913; RV64I-NEXT: call __extendhfsf2 914; RV64I-NEXT: mv a1, a0 915; RV64I-NEXT: mv a0, s1 916; RV64I-NEXT: call powf 917; RV64I-NEXT: call __truncsfhf2 918; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload 919; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload 920; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload 921; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload 922; RV64I-NEXT: addi sp, sp, 32 923; RV64I-NEXT: ret 924; 925; RV32IZFHMIN-LABEL: pow_f16: 926; RV32IZFHMIN: # %bb.0: 927; RV32IZFHMIN-NEXT: addi sp, sp, -16 928; RV32IZFHMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 929; RV32IZFHMIN-NEXT: fcvt.s.h fa0, fa0 930; RV32IZFHMIN-NEXT: fcvt.s.h fa1, fa1 931; RV32IZFHMIN-NEXT: call powf 932; RV32IZFHMIN-NEXT: fcvt.h.s fa0, fa0 933; RV32IZFHMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 934; RV32IZFHMIN-NEXT: addi sp, sp, 16 935; RV32IZFHMIN-NEXT: ret 936; 937; RV64IZFHMIN-LABEL: pow_f16: 938; RV64IZFHMIN: # %bb.0: 939; RV64IZFHMIN-NEXT: addi sp, sp, -16 940; RV64IZFHMIN-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 941; RV64IZFHMIN-NEXT: fcvt.s.h fa0, fa0 942; RV64IZFHMIN-NEXT: fcvt.s.h fa1, fa1 943; RV64IZFHMIN-NEXT: call powf 944; RV64IZFHMIN-NEXT: fcvt.h.s fa0, fa0 945; RV64IZFHMIN-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 946; RV64IZFHMIN-NEXT: addi sp, sp, 16 947; RV64IZFHMIN-NEXT: ret 948; 949; RV32IZHINXMIN-LABEL: pow_f16: 950; RV32IZHINXMIN: # %bb.0: 951; RV32IZHINXMIN-NEXT: addi sp, sp, -16 952; RV32IZHINXMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 953; RV32IZHINXMIN-NEXT: fcvt.s.h a0, a0 954; RV32IZHINXMIN-NEXT: fcvt.s.h a1, a1 955; RV32IZHINXMIN-NEXT: call powf 956; RV32IZHINXMIN-NEXT: fcvt.h.s a0, a0 957; RV32IZHINXMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 958; RV32IZHINXMIN-NEXT: addi sp, sp, 16 959; RV32IZHINXMIN-NEXT: ret 960; 961; RV64IZHINXMIN-LABEL: pow_f16: 962; RV64IZHINXMIN: # %bb.0: 963; RV64IZHINXMIN-NEXT: addi sp, sp, -16 964; RV64IZHINXMIN-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 965; RV64IZHINXMIN-NEXT: fcvt.s.h a0, a0 966; RV64IZHINXMIN-NEXT: fcvt.s.h a1, a1 967; RV64IZHINXMIN-NEXT: call powf 968; RV64IZHINXMIN-NEXT: fcvt.h.s a0, a0 969; RV64IZHINXMIN-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 970; RV64IZHINXMIN-NEXT: addi sp, sp, 16 971; RV64IZHINXMIN-NEXT: ret 972 %1 = call half @llvm.pow.f16(half %a, half %b) 973 ret half %1 974} 975 976declare half @llvm.exp.f16(half) 977 978define half @exp_f16(half %a) nounwind { 979; RV32IZFH-LABEL: exp_f16: 980; RV32IZFH: # %bb.0: 981; RV32IZFH-NEXT: addi sp, sp, -16 982; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 983; RV32IZFH-NEXT: fcvt.s.h fa0, fa0 984; RV32IZFH-NEXT: call expf 985; RV32IZFH-NEXT: fcvt.h.s fa0, fa0 986; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 987; RV32IZFH-NEXT: addi sp, sp, 16 988; RV32IZFH-NEXT: ret 989; 990; RV64IZFH-LABEL: exp_f16: 991; RV64IZFH: # %bb.0: 992; RV64IZFH-NEXT: addi sp, sp, -16 993; RV64IZFH-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 994; RV64IZFH-NEXT: fcvt.s.h fa0, fa0 995; RV64IZFH-NEXT: call expf 996; RV64IZFH-NEXT: fcvt.h.s fa0, fa0 997; RV64IZFH-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 998; RV64IZFH-NEXT: addi sp, sp, 16 999; RV64IZFH-NEXT: ret 1000; 1001; RV32IZHINX-LABEL: exp_f16: 1002; RV32IZHINX: # %bb.0: 1003; RV32IZHINX-NEXT: addi sp, sp, -16 1004; RV32IZHINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1005; RV32IZHINX-NEXT: fcvt.s.h a0, a0 1006; RV32IZHINX-NEXT: call expf 1007; RV32IZHINX-NEXT: fcvt.h.s a0, a0 1008; RV32IZHINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1009; RV32IZHINX-NEXT: addi sp, sp, 16 1010; RV32IZHINX-NEXT: ret 1011; 1012; RV64IZHINX-LABEL: exp_f16: 1013; RV64IZHINX: # %bb.0: 1014; RV64IZHINX-NEXT: addi sp, sp, -16 1015; RV64IZHINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 1016; RV64IZHINX-NEXT: fcvt.s.h a0, a0 1017; RV64IZHINX-NEXT: call expf 1018; RV64IZHINX-NEXT: fcvt.h.s a0, a0 1019; RV64IZHINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 1020; RV64IZHINX-NEXT: addi sp, sp, 16 1021; RV64IZHINX-NEXT: ret 1022; 1023; RV32I-LABEL: exp_f16: 1024; RV32I: # %bb.0: 1025; RV32I-NEXT: addi sp, sp, -16 1026; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1027; RV32I-NEXT: slli a0, a0, 16 1028; RV32I-NEXT: srli a0, a0, 16 1029; RV32I-NEXT: call __extendhfsf2 1030; RV32I-NEXT: call expf 1031; RV32I-NEXT: call __truncsfhf2 1032; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1033; RV32I-NEXT: addi sp, sp, 16 1034; RV32I-NEXT: ret 1035; 1036; RV64I-LABEL: exp_f16: 1037; RV64I: # %bb.0: 1038; RV64I-NEXT: addi sp, sp, -16 1039; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 1040; RV64I-NEXT: slli a0, a0, 48 1041; RV64I-NEXT: srli a0, a0, 48 1042; RV64I-NEXT: call __extendhfsf2 1043; RV64I-NEXT: call expf 1044; RV64I-NEXT: call __truncsfhf2 1045; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 1046; RV64I-NEXT: addi sp, sp, 16 1047; RV64I-NEXT: ret 1048; 1049; RV32IZFHMIN-LABEL: exp_f16: 1050; RV32IZFHMIN: # %bb.0: 1051; RV32IZFHMIN-NEXT: addi sp, sp, -16 1052; RV32IZFHMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1053; RV32IZFHMIN-NEXT: fcvt.s.h fa0, fa0 1054; RV32IZFHMIN-NEXT: call expf 1055; RV32IZFHMIN-NEXT: fcvt.h.s fa0, fa0 1056; RV32IZFHMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1057; RV32IZFHMIN-NEXT: addi sp, sp, 16 1058; RV32IZFHMIN-NEXT: ret 1059; 1060; RV64IZFHMIN-LABEL: exp_f16: 1061; RV64IZFHMIN: # %bb.0: 1062; RV64IZFHMIN-NEXT: addi sp, sp, -16 1063; RV64IZFHMIN-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 1064; RV64IZFHMIN-NEXT: fcvt.s.h fa0, fa0 1065; RV64IZFHMIN-NEXT: call expf 1066; RV64IZFHMIN-NEXT: fcvt.h.s fa0, fa0 1067; RV64IZFHMIN-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 1068; RV64IZFHMIN-NEXT: addi sp, sp, 16 1069; RV64IZFHMIN-NEXT: ret 1070; 1071; RV32IZHINXMIN-LABEL: exp_f16: 1072; RV32IZHINXMIN: # %bb.0: 1073; RV32IZHINXMIN-NEXT: addi sp, sp, -16 1074; RV32IZHINXMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1075; RV32IZHINXMIN-NEXT: fcvt.s.h a0, a0 1076; RV32IZHINXMIN-NEXT: call expf 1077; RV32IZHINXMIN-NEXT: fcvt.h.s a0, a0 1078; RV32IZHINXMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1079; RV32IZHINXMIN-NEXT: addi sp, sp, 16 1080; RV32IZHINXMIN-NEXT: ret 1081; 1082; RV64IZHINXMIN-LABEL: exp_f16: 1083; RV64IZHINXMIN: # %bb.0: 1084; RV64IZHINXMIN-NEXT: addi sp, sp, -16 1085; RV64IZHINXMIN-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 1086; RV64IZHINXMIN-NEXT: fcvt.s.h a0, a0 1087; RV64IZHINXMIN-NEXT: call expf 1088; RV64IZHINXMIN-NEXT: fcvt.h.s a0, a0 1089; RV64IZHINXMIN-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 1090; RV64IZHINXMIN-NEXT: addi sp, sp, 16 1091; RV64IZHINXMIN-NEXT: ret 1092 %1 = call half @llvm.exp.f16(half %a) 1093 ret half %1 1094} 1095 1096declare half @llvm.exp2.f16(half) 1097 1098define half @exp2_f16(half %a) nounwind { 1099; RV32IZFH-LABEL: exp2_f16: 1100; RV32IZFH: # %bb.0: 1101; RV32IZFH-NEXT: addi sp, sp, -16 1102; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1103; RV32IZFH-NEXT: fcvt.s.h fa0, fa0 1104; RV32IZFH-NEXT: call exp2f 1105; RV32IZFH-NEXT: fcvt.h.s fa0, fa0 1106; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1107; RV32IZFH-NEXT: addi sp, sp, 16 1108; RV32IZFH-NEXT: ret 1109; 1110; RV64IZFH-LABEL: exp2_f16: 1111; RV64IZFH: # %bb.0: 1112; RV64IZFH-NEXT: addi sp, sp, -16 1113; RV64IZFH-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 1114; RV64IZFH-NEXT: fcvt.s.h fa0, fa0 1115; RV64IZFH-NEXT: call exp2f 1116; RV64IZFH-NEXT: fcvt.h.s fa0, fa0 1117; RV64IZFH-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 1118; RV64IZFH-NEXT: addi sp, sp, 16 1119; RV64IZFH-NEXT: ret 1120; 1121; RV32IZHINX-LABEL: exp2_f16: 1122; RV32IZHINX: # %bb.0: 1123; RV32IZHINX-NEXT: addi sp, sp, -16 1124; RV32IZHINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1125; RV32IZHINX-NEXT: fcvt.s.h a0, a0 1126; RV32IZHINX-NEXT: call exp2f 1127; RV32IZHINX-NEXT: fcvt.h.s a0, a0 1128; RV32IZHINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1129; RV32IZHINX-NEXT: addi sp, sp, 16 1130; RV32IZHINX-NEXT: ret 1131; 1132; RV64IZHINX-LABEL: exp2_f16: 1133; RV64IZHINX: # %bb.0: 1134; RV64IZHINX-NEXT: addi sp, sp, -16 1135; RV64IZHINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 1136; RV64IZHINX-NEXT: fcvt.s.h a0, a0 1137; RV64IZHINX-NEXT: call exp2f 1138; RV64IZHINX-NEXT: fcvt.h.s a0, a0 1139; RV64IZHINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 1140; RV64IZHINX-NEXT: addi sp, sp, 16 1141; RV64IZHINX-NEXT: ret 1142; 1143; RV32I-LABEL: exp2_f16: 1144; RV32I: # %bb.0: 1145; RV32I-NEXT: addi sp, sp, -16 1146; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1147; RV32I-NEXT: slli a0, a0, 16 1148; RV32I-NEXT: srli a0, a0, 16 1149; RV32I-NEXT: call __extendhfsf2 1150; RV32I-NEXT: call exp2f 1151; RV32I-NEXT: call __truncsfhf2 1152; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1153; RV32I-NEXT: addi sp, sp, 16 1154; RV32I-NEXT: ret 1155; 1156; RV64I-LABEL: exp2_f16: 1157; RV64I: # %bb.0: 1158; RV64I-NEXT: addi sp, sp, -16 1159; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 1160; RV64I-NEXT: slli a0, a0, 48 1161; RV64I-NEXT: srli a0, a0, 48 1162; RV64I-NEXT: call __extendhfsf2 1163; RV64I-NEXT: call exp2f 1164; RV64I-NEXT: call __truncsfhf2 1165; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 1166; RV64I-NEXT: addi sp, sp, 16 1167; RV64I-NEXT: ret 1168; 1169; RV32IZFHMIN-LABEL: exp2_f16: 1170; RV32IZFHMIN: # %bb.0: 1171; RV32IZFHMIN-NEXT: addi sp, sp, -16 1172; RV32IZFHMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1173; RV32IZFHMIN-NEXT: fcvt.s.h fa0, fa0 1174; RV32IZFHMIN-NEXT: call exp2f 1175; RV32IZFHMIN-NEXT: fcvt.h.s fa0, fa0 1176; RV32IZFHMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1177; RV32IZFHMIN-NEXT: addi sp, sp, 16 1178; RV32IZFHMIN-NEXT: ret 1179; 1180; RV64IZFHMIN-LABEL: exp2_f16: 1181; RV64IZFHMIN: # %bb.0: 1182; RV64IZFHMIN-NEXT: addi sp, sp, -16 1183; RV64IZFHMIN-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 1184; RV64IZFHMIN-NEXT: fcvt.s.h fa0, fa0 1185; RV64IZFHMIN-NEXT: call exp2f 1186; RV64IZFHMIN-NEXT: fcvt.h.s fa0, fa0 1187; RV64IZFHMIN-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 1188; RV64IZFHMIN-NEXT: addi sp, sp, 16 1189; RV64IZFHMIN-NEXT: ret 1190; 1191; RV32IZHINXMIN-LABEL: exp2_f16: 1192; RV32IZHINXMIN: # %bb.0: 1193; RV32IZHINXMIN-NEXT: addi sp, sp, -16 1194; RV32IZHINXMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1195; RV32IZHINXMIN-NEXT: fcvt.s.h a0, a0 1196; RV32IZHINXMIN-NEXT: call exp2f 1197; RV32IZHINXMIN-NEXT: fcvt.h.s a0, a0 1198; RV32IZHINXMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1199; RV32IZHINXMIN-NEXT: addi sp, sp, 16 1200; RV32IZHINXMIN-NEXT: ret 1201; 1202; RV64IZHINXMIN-LABEL: exp2_f16: 1203; RV64IZHINXMIN: # %bb.0: 1204; RV64IZHINXMIN-NEXT: addi sp, sp, -16 1205; RV64IZHINXMIN-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 1206; RV64IZHINXMIN-NEXT: fcvt.s.h a0, a0 1207; RV64IZHINXMIN-NEXT: call exp2f 1208; RV64IZHINXMIN-NEXT: fcvt.h.s a0, a0 1209; RV64IZHINXMIN-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 1210; RV64IZHINXMIN-NEXT: addi sp, sp, 16 1211; RV64IZHINXMIN-NEXT: ret 1212 %1 = call half @llvm.exp2.f16(half %a) 1213 ret half %1 1214} 1215 1216define half @exp10_f16(half %a) nounwind { 1217; RV32IZFH-LABEL: exp10_f16: 1218; RV32IZFH: # %bb.0: 1219; RV32IZFH-NEXT: addi sp, sp, -16 1220; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1221; RV32IZFH-NEXT: fcvt.s.h fa0, fa0 1222; RV32IZFH-NEXT: call exp10f 1223; RV32IZFH-NEXT: fcvt.h.s fa0, fa0 1224; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1225; RV32IZFH-NEXT: addi sp, sp, 16 1226; RV32IZFH-NEXT: ret 1227; 1228; RV64IZFH-LABEL: exp10_f16: 1229; RV64IZFH: # %bb.0: 1230; RV64IZFH-NEXT: addi sp, sp, -16 1231; RV64IZFH-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 1232; RV64IZFH-NEXT: fcvt.s.h fa0, fa0 1233; RV64IZFH-NEXT: call exp10f 1234; RV64IZFH-NEXT: fcvt.h.s fa0, fa0 1235; RV64IZFH-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 1236; RV64IZFH-NEXT: addi sp, sp, 16 1237; RV64IZFH-NEXT: ret 1238; 1239; RV32IZHINX-LABEL: exp10_f16: 1240; RV32IZHINX: # %bb.0: 1241; RV32IZHINX-NEXT: addi sp, sp, -16 1242; RV32IZHINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1243; RV32IZHINX-NEXT: fcvt.s.h a0, a0 1244; RV32IZHINX-NEXT: call exp10f 1245; RV32IZHINX-NEXT: fcvt.h.s a0, a0 1246; RV32IZHINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1247; RV32IZHINX-NEXT: addi sp, sp, 16 1248; RV32IZHINX-NEXT: ret 1249; 1250; RV64IZHINX-LABEL: exp10_f16: 1251; RV64IZHINX: # %bb.0: 1252; RV64IZHINX-NEXT: addi sp, sp, -16 1253; RV64IZHINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 1254; RV64IZHINX-NEXT: fcvt.s.h a0, a0 1255; RV64IZHINX-NEXT: call exp10f 1256; RV64IZHINX-NEXT: fcvt.h.s a0, a0 1257; RV64IZHINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 1258; RV64IZHINX-NEXT: addi sp, sp, 16 1259; RV64IZHINX-NEXT: ret 1260; 1261; RV32I-LABEL: exp10_f16: 1262; RV32I: # %bb.0: 1263; RV32I-NEXT: addi sp, sp, -16 1264; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1265; RV32I-NEXT: slli a0, a0, 16 1266; RV32I-NEXT: srli a0, a0, 16 1267; RV32I-NEXT: call __extendhfsf2 1268; RV32I-NEXT: call exp10f 1269; RV32I-NEXT: call __truncsfhf2 1270; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1271; RV32I-NEXT: addi sp, sp, 16 1272; RV32I-NEXT: ret 1273; 1274; RV64I-LABEL: exp10_f16: 1275; RV64I: # %bb.0: 1276; RV64I-NEXT: addi sp, sp, -16 1277; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 1278; RV64I-NEXT: slli a0, a0, 48 1279; RV64I-NEXT: srli a0, a0, 48 1280; RV64I-NEXT: call __extendhfsf2 1281; RV64I-NEXT: call exp10f 1282; RV64I-NEXT: call __truncsfhf2 1283; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 1284; RV64I-NEXT: addi sp, sp, 16 1285; RV64I-NEXT: ret 1286; 1287; RV32IZFHMIN-LABEL: exp10_f16: 1288; RV32IZFHMIN: # %bb.0: 1289; RV32IZFHMIN-NEXT: addi sp, sp, -16 1290; RV32IZFHMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1291; RV32IZFHMIN-NEXT: fcvt.s.h fa0, fa0 1292; RV32IZFHMIN-NEXT: call exp10f 1293; RV32IZFHMIN-NEXT: fcvt.h.s fa0, fa0 1294; RV32IZFHMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1295; RV32IZFHMIN-NEXT: addi sp, sp, 16 1296; RV32IZFHMIN-NEXT: ret 1297; 1298; RV64IZFHMIN-LABEL: exp10_f16: 1299; RV64IZFHMIN: # %bb.0: 1300; RV64IZFHMIN-NEXT: addi sp, sp, -16 1301; RV64IZFHMIN-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 1302; RV64IZFHMIN-NEXT: fcvt.s.h fa0, fa0 1303; RV64IZFHMIN-NEXT: call exp10f 1304; RV64IZFHMIN-NEXT: fcvt.h.s fa0, fa0 1305; RV64IZFHMIN-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 1306; RV64IZFHMIN-NEXT: addi sp, sp, 16 1307; RV64IZFHMIN-NEXT: ret 1308; 1309; RV32IZHINXMIN-LABEL: exp10_f16: 1310; RV32IZHINXMIN: # %bb.0: 1311; RV32IZHINXMIN-NEXT: addi sp, sp, -16 1312; RV32IZHINXMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1313; RV32IZHINXMIN-NEXT: fcvt.s.h a0, a0 1314; RV32IZHINXMIN-NEXT: call exp10f 1315; RV32IZHINXMIN-NEXT: fcvt.h.s a0, a0 1316; RV32IZHINXMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1317; RV32IZHINXMIN-NEXT: addi sp, sp, 16 1318; RV32IZHINXMIN-NEXT: ret 1319; 1320; RV64IZHINXMIN-LABEL: exp10_f16: 1321; RV64IZHINXMIN: # %bb.0: 1322; RV64IZHINXMIN-NEXT: addi sp, sp, -16 1323; RV64IZHINXMIN-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 1324; RV64IZHINXMIN-NEXT: fcvt.s.h a0, a0 1325; RV64IZHINXMIN-NEXT: call exp10f 1326; RV64IZHINXMIN-NEXT: fcvt.h.s a0, a0 1327; RV64IZHINXMIN-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 1328; RV64IZHINXMIN-NEXT: addi sp, sp, 16 1329; RV64IZHINXMIN-NEXT: ret 1330 %1 = call half @llvm.exp10.f16(half %a) 1331 ret half %1 1332} 1333 1334declare half @llvm.log.f16(half) 1335 1336define half @log_f16(half %a) nounwind { 1337; RV32IZFH-LABEL: log_f16: 1338; RV32IZFH: # %bb.0: 1339; RV32IZFH-NEXT: addi sp, sp, -16 1340; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1341; RV32IZFH-NEXT: fcvt.s.h fa0, fa0 1342; RV32IZFH-NEXT: call logf 1343; RV32IZFH-NEXT: fcvt.h.s fa0, fa0 1344; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1345; RV32IZFH-NEXT: addi sp, sp, 16 1346; RV32IZFH-NEXT: ret 1347; 1348; RV64IZFH-LABEL: log_f16: 1349; RV64IZFH: # %bb.0: 1350; RV64IZFH-NEXT: addi sp, sp, -16 1351; RV64IZFH-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 1352; RV64IZFH-NEXT: fcvt.s.h fa0, fa0 1353; RV64IZFH-NEXT: call logf 1354; RV64IZFH-NEXT: fcvt.h.s fa0, fa0 1355; RV64IZFH-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 1356; RV64IZFH-NEXT: addi sp, sp, 16 1357; RV64IZFH-NEXT: ret 1358; 1359; RV32IZHINX-LABEL: log_f16: 1360; RV32IZHINX: # %bb.0: 1361; RV32IZHINX-NEXT: addi sp, sp, -16 1362; RV32IZHINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1363; RV32IZHINX-NEXT: fcvt.s.h a0, a0 1364; RV32IZHINX-NEXT: call logf 1365; RV32IZHINX-NEXT: fcvt.h.s a0, a0 1366; RV32IZHINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1367; RV32IZHINX-NEXT: addi sp, sp, 16 1368; RV32IZHINX-NEXT: ret 1369; 1370; RV64IZHINX-LABEL: log_f16: 1371; RV64IZHINX: # %bb.0: 1372; RV64IZHINX-NEXT: addi sp, sp, -16 1373; RV64IZHINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 1374; RV64IZHINX-NEXT: fcvt.s.h a0, a0 1375; RV64IZHINX-NEXT: call logf 1376; RV64IZHINX-NEXT: fcvt.h.s a0, a0 1377; RV64IZHINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 1378; RV64IZHINX-NEXT: addi sp, sp, 16 1379; RV64IZHINX-NEXT: ret 1380; 1381; RV32I-LABEL: log_f16: 1382; RV32I: # %bb.0: 1383; RV32I-NEXT: addi sp, sp, -16 1384; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1385; RV32I-NEXT: slli a0, a0, 16 1386; RV32I-NEXT: srli a0, a0, 16 1387; RV32I-NEXT: call __extendhfsf2 1388; RV32I-NEXT: call logf 1389; RV32I-NEXT: call __truncsfhf2 1390; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1391; RV32I-NEXT: addi sp, sp, 16 1392; RV32I-NEXT: ret 1393; 1394; RV64I-LABEL: log_f16: 1395; RV64I: # %bb.0: 1396; RV64I-NEXT: addi sp, sp, -16 1397; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 1398; RV64I-NEXT: slli a0, a0, 48 1399; RV64I-NEXT: srli a0, a0, 48 1400; RV64I-NEXT: call __extendhfsf2 1401; RV64I-NEXT: call logf 1402; RV64I-NEXT: call __truncsfhf2 1403; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 1404; RV64I-NEXT: addi sp, sp, 16 1405; RV64I-NEXT: ret 1406; 1407; RV32IZFHMIN-LABEL: log_f16: 1408; RV32IZFHMIN: # %bb.0: 1409; RV32IZFHMIN-NEXT: addi sp, sp, -16 1410; RV32IZFHMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1411; RV32IZFHMIN-NEXT: fcvt.s.h fa0, fa0 1412; RV32IZFHMIN-NEXT: call logf 1413; RV32IZFHMIN-NEXT: fcvt.h.s fa0, fa0 1414; RV32IZFHMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1415; RV32IZFHMIN-NEXT: addi sp, sp, 16 1416; RV32IZFHMIN-NEXT: ret 1417; 1418; RV64IZFHMIN-LABEL: log_f16: 1419; RV64IZFHMIN: # %bb.0: 1420; RV64IZFHMIN-NEXT: addi sp, sp, -16 1421; RV64IZFHMIN-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 1422; RV64IZFHMIN-NEXT: fcvt.s.h fa0, fa0 1423; RV64IZFHMIN-NEXT: call logf 1424; RV64IZFHMIN-NEXT: fcvt.h.s fa0, fa0 1425; RV64IZFHMIN-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 1426; RV64IZFHMIN-NEXT: addi sp, sp, 16 1427; RV64IZFHMIN-NEXT: ret 1428; 1429; RV32IZHINXMIN-LABEL: log_f16: 1430; RV32IZHINXMIN: # %bb.0: 1431; RV32IZHINXMIN-NEXT: addi sp, sp, -16 1432; RV32IZHINXMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1433; RV32IZHINXMIN-NEXT: fcvt.s.h a0, a0 1434; RV32IZHINXMIN-NEXT: call logf 1435; RV32IZHINXMIN-NEXT: fcvt.h.s a0, a0 1436; RV32IZHINXMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1437; RV32IZHINXMIN-NEXT: addi sp, sp, 16 1438; RV32IZHINXMIN-NEXT: ret 1439; 1440; RV64IZHINXMIN-LABEL: log_f16: 1441; RV64IZHINXMIN: # %bb.0: 1442; RV64IZHINXMIN-NEXT: addi sp, sp, -16 1443; RV64IZHINXMIN-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 1444; RV64IZHINXMIN-NEXT: fcvt.s.h a0, a0 1445; RV64IZHINXMIN-NEXT: call logf 1446; RV64IZHINXMIN-NEXT: fcvt.h.s a0, a0 1447; RV64IZHINXMIN-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 1448; RV64IZHINXMIN-NEXT: addi sp, sp, 16 1449; RV64IZHINXMIN-NEXT: ret 1450 %1 = call half @llvm.log.f16(half %a) 1451 ret half %1 1452} 1453 1454declare half @llvm.log10.f16(half) 1455 1456define half @log10_f16(half %a) nounwind { 1457; RV32IZFH-LABEL: log10_f16: 1458; RV32IZFH: # %bb.0: 1459; RV32IZFH-NEXT: addi sp, sp, -16 1460; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1461; RV32IZFH-NEXT: fcvt.s.h fa0, fa0 1462; RV32IZFH-NEXT: call log10f 1463; RV32IZFH-NEXT: fcvt.h.s fa0, fa0 1464; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1465; RV32IZFH-NEXT: addi sp, sp, 16 1466; RV32IZFH-NEXT: ret 1467; 1468; RV64IZFH-LABEL: log10_f16: 1469; RV64IZFH: # %bb.0: 1470; RV64IZFH-NEXT: addi sp, sp, -16 1471; RV64IZFH-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 1472; RV64IZFH-NEXT: fcvt.s.h fa0, fa0 1473; RV64IZFH-NEXT: call log10f 1474; RV64IZFH-NEXT: fcvt.h.s fa0, fa0 1475; RV64IZFH-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 1476; RV64IZFH-NEXT: addi sp, sp, 16 1477; RV64IZFH-NEXT: ret 1478; 1479; RV32IZHINX-LABEL: log10_f16: 1480; RV32IZHINX: # %bb.0: 1481; RV32IZHINX-NEXT: addi sp, sp, -16 1482; RV32IZHINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1483; RV32IZHINX-NEXT: fcvt.s.h a0, a0 1484; RV32IZHINX-NEXT: call log10f 1485; RV32IZHINX-NEXT: fcvt.h.s a0, a0 1486; RV32IZHINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1487; RV32IZHINX-NEXT: addi sp, sp, 16 1488; RV32IZHINX-NEXT: ret 1489; 1490; RV64IZHINX-LABEL: log10_f16: 1491; RV64IZHINX: # %bb.0: 1492; RV64IZHINX-NEXT: addi sp, sp, -16 1493; RV64IZHINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 1494; RV64IZHINX-NEXT: fcvt.s.h a0, a0 1495; RV64IZHINX-NEXT: call log10f 1496; RV64IZHINX-NEXT: fcvt.h.s a0, a0 1497; RV64IZHINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 1498; RV64IZHINX-NEXT: addi sp, sp, 16 1499; RV64IZHINX-NEXT: ret 1500; 1501; RV32I-LABEL: log10_f16: 1502; RV32I: # %bb.0: 1503; RV32I-NEXT: addi sp, sp, -16 1504; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1505; RV32I-NEXT: slli a0, a0, 16 1506; RV32I-NEXT: srli a0, a0, 16 1507; RV32I-NEXT: call __extendhfsf2 1508; RV32I-NEXT: call log10f 1509; RV32I-NEXT: call __truncsfhf2 1510; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1511; RV32I-NEXT: addi sp, sp, 16 1512; RV32I-NEXT: ret 1513; 1514; RV64I-LABEL: log10_f16: 1515; RV64I: # %bb.0: 1516; RV64I-NEXT: addi sp, sp, -16 1517; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 1518; RV64I-NEXT: slli a0, a0, 48 1519; RV64I-NEXT: srli a0, a0, 48 1520; RV64I-NEXT: call __extendhfsf2 1521; RV64I-NEXT: call log10f 1522; RV64I-NEXT: call __truncsfhf2 1523; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 1524; RV64I-NEXT: addi sp, sp, 16 1525; RV64I-NEXT: ret 1526; 1527; RV32IZFHMIN-LABEL: log10_f16: 1528; RV32IZFHMIN: # %bb.0: 1529; RV32IZFHMIN-NEXT: addi sp, sp, -16 1530; RV32IZFHMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1531; RV32IZFHMIN-NEXT: fcvt.s.h fa0, fa0 1532; RV32IZFHMIN-NEXT: call log10f 1533; RV32IZFHMIN-NEXT: fcvt.h.s fa0, fa0 1534; RV32IZFHMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1535; RV32IZFHMIN-NEXT: addi sp, sp, 16 1536; RV32IZFHMIN-NEXT: ret 1537; 1538; RV64IZFHMIN-LABEL: log10_f16: 1539; RV64IZFHMIN: # %bb.0: 1540; RV64IZFHMIN-NEXT: addi sp, sp, -16 1541; RV64IZFHMIN-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 1542; RV64IZFHMIN-NEXT: fcvt.s.h fa0, fa0 1543; RV64IZFHMIN-NEXT: call log10f 1544; RV64IZFHMIN-NEXT: fcvt.h.s fa0, fa0 1545; RV64IZFHMIN-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 1546; RV64IZFHMIN-NEXT: addi sp, sp, 16 1547; RV64IZFHMIN-NEXT: ret 1548; 1549; RV32IZHINXMIN-LABEL: log10_f16: 1550; RV32IZHINXMIN: # %bb.0: 1551; RV32IZHINXMIN-NEXT: addi sp, sp, -16 1552; RV32IZHINXMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1553; RV32IZHINXMIN-NEXT: fcvt.s.h a0, a0 1554; RV32IZHINXMIN-NEXT: call log10f 1555; RV32IZHINXMIN-NEXT: fcvt.h.s a0, a0 1556; RV32IZHINXMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1557; RV32IZHINXMIN-NEXT: addi sp, sp, 16 1558; RV32IZHINXMIN-NEXT: ret 1559; 1560; RV64IZHINXMIN-LABEL: log10_f16: 1561; RV64IZHINXMIN: # %bb.0: 1562; RV64IZHINXMIN-NEXT: addi sp, sp, -16 1563; RV64IZHINXMIN-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 1564; RV64IZHINXMIN-NEXT: fcvt.s.h a0, a0 1565; RV64IZHINXMIN-NEXT: call log10f 1566; RV64IZHINXMIN-NEXT: fcvt.h.s a0, a0 1567; RV64IZHINXMIN-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 1568; RV64IZHINXMIN-NEXT: addi sp, sp, 16 1569; RV64IZHINXMIN-NEXT: ret 1570 %1 = call half @llvm.log10.f16(half %a) 1571 ret half %1 1572} 1573 1574declare half @llvm.log2.f16(half) 1575 1576define half @log2_f16(half %a) nounwind { 1577; RV32IZFH-LABEL: log2_f16: 1578; RV32IZFH: # %bb.0: 1579; RV32IZFH-NEXT: addi sp, sp, -16 1580; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1581; RV32IZFH-NEXT: fcvt.s.h fa0, fa0 1582; RV32IZFH-NEXT: call log2f 1583; RV32IZFH-NEXT: fcvt.h.s fa0, fa0 1584; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1585; RV32IZFH-NEXT: addi sp, sp, 16 1586; RV32IZFH-NEXT: ret 1587; 1588; RV64IZFH-LABEL: log2_f16: 1589; RV64IZFH: # %bb.0: 1590; RV64IZFH-NEXT: addi sp, sp, -16 1591; RV64IZFH-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 1592; RV64IZFH-NEXT: fcvt.s.h fa0, fa0 1593; RV64IZFH-NEXT: call log2f 1594; RV64IZFH-NEXT: fcvt.h.s fa0, fa0 1595; RV64IZFH-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 1596; RV64IZFH-NEXT: addi sp, sp, 16 1597; RV64IZFH-NEXT: ret 1598; 1599; RV32IZHINX-LABEL: log2_f16: 1600; RV32IZHINX: # %bb.0: 1601; RV32IZHINX-NEXT: addi sp, sp, -16 1602; RV32IZHINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1603; RV32IZHINX-NEXT: fcvt.s.h a0, a0 1604; RV32IZHINX-NEXT: call log2f 1605; RV32IZHINX-NEXT: fcvt.h.s a0, a0 1606; RV32IZHINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1607; RV32IZHINX-NEXT: addi sp, sp, 16 1608; RV32IZHINX-NEXT: ret 1609; 1610; RV64IZHINX-LABEL: log2_f16: 1611; RV64IZHINX: # %bb.0: 1612; RV64IZHINX-NEXT: addi sp, sp, -16 1613; RV64IZHINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 1614; RV64IZHINX-NEXT: fcvt.s.h a0, a0 1615; RV64IZHINX-NEXT: call log2f 1616; RV64IZHINX-NEXT: fcvt.h.s a0, a0 1617; RV64IZHINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 1618; RV64IZHINX-NEXT: addi sp, sp, 16 1619; RV64IZHINX-NEXT: ret 1620; 1621; RV32I-LABEL: log2_f16: 1622; RV32I: # %bb.0: 1623; RV32I-NEXT: addi sp, sp, -16 1624; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1625; RV32I-NEXT: slli a0, a0, 16 1626; RV32I-NEXT: srli a0, a0, 16 1627; RV32I-NEXT: call __extendhfsf2 1628; RV32I-NEXT: call log2f 1629; RV32I-NEXT: call __truncsfhf2 1630; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1631; RV32I-NEXT: addi sp, sp, 16 1632; RV32I-NEXT: ret 1633; 1634; RV64I-LABEL: log2_f16: 1635; RV64I: # %bb.0: 1636; RV64I-NEXT: addi sp, sp, -16 1637; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 1638; RV64I-NEXT: slli a0, a0, 48 1639; RV64I-NEXT: srli a0, a0, 48 1640; RV64I-NEXT: call __extendhfsf2 1641; RV64I-NEXT: call log2f 1642; RV64I-NEXT: call __truncsfhf2 1643; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 1644; RV64I-NEXT: addi sp, sp, 16 1645; RV64I-NEXT: ret 1646; 1647; RV32IZFHMIN-LABEL: log2_f16: 1648; RV32IZFHMIN: # %bb.0: 1649; RV32IZFHMIN-NEXT: addi sp, sp, -16 1650; RV32IZFHMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1651; RV32IZFHMIN-NEXT: fcvt.s.h fa0, fa0 1652; RV32IZFHMIN-NEXT: call log2f 1653; RV32IZFHMIN-NEXT: fcvt.h.s fa0, fa0 1654; RV32IZFHMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1655; RV32IZFHMIN-NEXT: addi sp, sp, 16 1656; RV32IZFHMIN-NEXT: ret 1657; 1658; RV64IZFHMIN-LABEL: log2_f16: 1659; RV64IZFHMIN: # %bb.0: 1660; RV64IZFHMIN-NEXT: addi sp, sp, -16 1661; RV64IZFHMIN-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 1662; RV64IZFHMIN-NEXT: fcvt.s.h fa0, fa0 1663; RV64IZFHMIN-NEXT: call log2f 1664; RV64IZFHMIN-NEXT: fcvt.h.s fa0, fa0 1665; RV64IZFHMIN-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 1666; RV64IZFHMIN-NEXT: addi sp, sp, 16 1667; RV64IZFHMIN-NEXT: ret 1668; 1669; RV32IZHINXMIN-LABEL: log2_f16: 1670; RV32IZHINXMIN: # %bb.0: 1671; RV32IZHINXMIN-NEXT: addi sp, sp, -16 1672; RV32IZHINXMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1673; RV32IZHINXMIN-NEXT: fcvt.s.h a0, a0 1674; RV32IZHINXMIN-NEXT: call log2f 1675; RV32IZHINXMIN-NEXT: fcvt.h.s a0, a0 1676; RV32IZHINXMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1677; RV32IZHINXMIN-NEXT: addi sp, sp, 16 1678; RV32IZHINXMIN-NEXT: ret 1679; 1680; RV64IZHINXMIN-LABEL: log2_f16: 1681; RV64IZHINXMIN: # %bb.0: 1682; RV64IZHINXMIN-NEXT: addi sp, sp, -16 1683; RV64IZHINXMIN-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 1684; RV64IZHINXMIN-NEXT: fcvt.s.h a0, a0 1685; RV64IZHINXMIN-NEXT: call log2f 1686; RV64IZHINXMIN-NEXT: fcvt.h.s a0, a0 1687; RV64IZHINXMIN-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 1688; RV64IZHINXMIN-NEXT: addi sp, sp, 16 1689; RV64IZHINXMIN-NEXT: ret 1690 %1 = call half @llvm.log2.f16(half %a) 1691 ret half %1 1692} 1693 1694declare half @llvm.fma.f16(half, half, half) 1695 1696define half @fma_f16(half %a, half %b, half %c) nounwind { 1697; CHECKIZFH-LABEL: fma_f16: 1698; CHECKIZFH: # %bb.0: 1699; CHECKIZFH-NEXT: fmadd.h fa0, fa0, fa1, fa2 1700; CHECKIZFH-NEXT: ret 1701; 1702; CHECKIZHINX-LABEL: fma_f16: 1703; CHECKIZHINX: # %bb.0: 1704; CHECKIZHINX-NEXT: fmadd.h a0, a0, a1, a2 1705; CHECKIZHINX-NEXT: ret 1706; 1707; RV32I-LABEL: fma_f16: 1708; RV32I: # %bb.0: 1709; RV32I-NEXT: addi sp, sp, -32 1710; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill 1711; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill 1712; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill 1713; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill 1714; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill 1715; RV32I-NEXT: mv s0, a2 1716; RV32I-NEXT: mv s1, a1 1717; RV32I-NEXT: lui a1, 16 1718; RV32I-NEXT: addi s3, a1, -1 1719; RV32I-NEXT: and a0, a0, s3 1720; RV32I-NEXT: call __extendhfsf2 1721; RV32I-NEXT: mv s2, a0 1722; RV32I-NEXT: and a0, s1, s3 1723; RV32I-NEXT: call __extendhfsf2 1724; RV32I-NEXT: mv s1, a0 1725; RV32I-NEXT: and a0, s0, s3 1726; RV32I-NEXT: call __extendhfsf2 1727; RV32I-NEXT: mv a2, a0 1728; RV32I-NEXT: mv a0, s2 1729; RV32I-NEXT: mv a1, s1 1730; RV32I-NEXT: call fmaf 1731; RV32I-NEXT: call __truncsfhf2 1732; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload 1733; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload 1734; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload 1735; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload 1736; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload 1737; RV32I-NEXT: addi sp, sp, 32 1738; RV32I-NEXT: ret 1739; 1740; RV64I-LABEL: fma_f16: 1741; RV64I: # %bb.0: 1742; RV64I-NEXT: addi sp, sp, -48 1743; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill 1744; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill 1745; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill 1746; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill 1747; RV64I-NEXT: sd s3, 8(sp) # 8-byte Folded Spill 1748; RV64I-NEXT: mv s0, a2 1749; RV64I-NEXT: mv s1, a1 1750; RV64I-NEXT: lui a1, 16 1751; RV64I-NEXT: addiw s3, a1, -1 1752; RV64I-NEXT: and a0, a0, s3 1753; RV64I-NEXT: call __extendhfsf2 1754; RV64I-NEXT: mv s2, a0 1755; RV64I-NEXT: and a0, s1, s3 1756; RV64I-NEXT: call __extendhfsf2 1757; RV64I-NEXT: mv s1, a0 1758; RV64I-NEXT: and a0, s0, s3 1759; RV64I-NEXT: call __extendhfsf2 1760; RV64I-NEXT: mv a2, a0 1761; RV64I-NEXT: mv a0, s2 1762; RV64I-NEXT: mv a1, s1 1763; RV64I-NEXT: call fmaf 1764; RV64I-NEXT: call __truncsfhf2 1765; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload 1766; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload 1767; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload 1768; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload 1769; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload 1770; RV64I-NEXT: addi sp, sp, 48 1771; RV64I-NEXT: ret 1772; 1773; CHECKIZFHMIN-LABEL: fma_f16: 1774; CHECKIZFHMIN: # %bb.0: 1775; CHECKIZFHMIN-NEXT: fcvt.s.h fa5, fa2 1776; CHECKIZFHMIN-NEXT: fcvt.s.h fa4, fa1 1777; CHECKIZFHMIN-NEXT: fcvt.s.h fa3, fa0 1778; CHECKIZFHMIN-NEXT: fmadd.s fa5, fa3, fa4, fa5 1779; CHECKIZFHMIN-NEXT: fcvt.h.s fa0, fa5 1780; CHECKIZFHMIN-NEXT: ret 1781; 1782; CHECKIZHINXMIN-LABEL: fma_f16: 1783; CHECKIZHINXMIN: # %bb.0: 1784; CHECKIZHINXMIN-NEXT: fcvt.s.h a2, a2 1785; CHECKIZHINXMIN-NEXT: fcvt.s.h a1, a1 1786; CHECKIZHINXMIN-NEXT: fcvt.s.h a0, a0 1787; CHECKIZHINXMIN-NEXT: fmadd.s a0, a0, a1, a2 1788; CHECKIZHINXMIN-NEXT: fcvt.h.s a0, a0 1789; CHECKIZHINXMIN-NEXT: ret 1790 %1 = call half @llvm.fma.f16(half %a, half %b, half %c) 1791 ret half %1 1792} 1793 1794declare half @llvm.fmuladd.f16(half, half, half) 1795 1796define half @fmuladd_f16(half %a, half %b, half %c) nounwind { 1797; CHECKIZFH-LABEL: fmuladd_f16: 1798; CHECKIZFH: # %bb.0: 1799; CHECKIZFH-NEXT: fmadd.h fa0, fa0, fa1, fa2 1800; CHECKIZFH-NEXT: ret 1801; 1802; CHECKIZHINX-LABEL: fmuladd_f16: 1803; CHECKIZHINX: # %bb.0: 1804; CHECKIZHINX-NEXT: fmadd.h a0, a0, a1, a2 1805; CHECKIZHINX-NEXT: ret 1806; 1807; RV32I-LABEL: fmuladd_f16: 1808; RV32I: # %bb.0: 1809; RV32I-NEXT: addi sp, sp, -32 1810; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill 1811; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill 1812; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill 1813; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill 1814; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill 1815; RV32I-NEXT: mv s0, a2 1816; RV32I-NEXT: mv s1, a1 1817; RV32I-NEXT: lui a1, 16 1818; RV32I-NEXT: addi s3, a1, -1 1819; RV32I-NEXT: and a0, a0, s3 1820; RV32I-NEXT: call __extendhfsf2 1821; RV32I-NEXT: mv s2, a0 1822; RV32I-NEXT: and a0, s1, s3 1823; RV32I-NEXT: call __extendhfsf2 1824; RV32I-NEXT: mv a1, a0 1825; RV32I-NEXT: mv a0, s2 1826; RV32I-NEXT: call __mulsf3 1827; RV32I-NEXT: call __truncsfhf2 1828; RV32I-NEXT: mv s1, a0 1829; RV32I-NEXT: and a0, s0, s3 1830; RV32I-NEXT: call __extendhfsf2 1831; RV32I-NEXT: mv s0, a0 1832; RV32I-NEXT: and a0, s1, s3 1833; RV32I-NEXT: call __extendhfsf2 1834; RV32I-NEXT: mv a1, s0 1835; RV32I-NEXT: call __addsf3 1836; RV32I-NEXT: call __truncsfhf2 1837; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload 1838; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload 1839; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload 1840; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload 1841; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload 1842; RV32I-NEXT: addi sp, sp, 32 1843; RV32I-NEXT: ret 1844; 1845; RV64I-LABEL: fmuladd_f16: 1846; RV64I: # %bb.0: 1847; RV64I-NEXT: addi sp, sp, -48 1848; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill 1849; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill 1850; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill 1851; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill 1852; RV64I-NEXT: sd s3, 8(sp) # 8-byte Folded Spill 1853; RV64I-NEXT: mv s0, a2 1854; RV64I-NEXT: mv s1, a1 1855; RV64I-NEXT: lui a1, 16 1856; RV64I-NEXT: addiw s3, a1, -1 1857; RV64I-NEXT: and a0, a0, s3 1858; RV64I-NEXT: call __extendhfsf2 1859; RV64I-NEXT: mv s2, a0 1860; RV64I-NEXT: and a0, s1, s3 1861; RV64I-NEXT: call __extendhfsf2 1862; RV64I-NEXT: mv a1, a0 1863; RV64I-NEXT: mv a0, s2 1864; RV64I-NEXT: call __mulsf3 1865; RV64I-NEXT: call __truncsfhf2 1866; RV64I-NEXT: mv s1, a0 1867; RV64I-NEXT: and a0, s0, s3 1868; RV64I-NEXT: call __extendhfsf2 1869; RV64I-NEXT: mv s0, a0 1870; RV64I-NEXT: and a0, s1, s3 1871; RV64I-NEXT: call __extendhfsf2 1872; RV64I-NEXT: mv a1, s0 1873; RV64I-NEXT: call __addsf3 1874; RV64I-NEXT: call __truncsfhf2 1875; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload 1876; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload 1877; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload 1878; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload 1879; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload 1880; RV64I-NEXT: addi sp, sp, 48 1881; RV64I-NEXT: ret 1882; 1883; CHECKIZFHMIN-LABEL: fmuladd_f16: 1884; CHECKIZFHMIN: # %bb.0: 1885; CHECKIZFHMIN-NEXT: fcvt.s.h fa5, fa1 1886; CHECKIZFHMIN-NEXT: fcvt.s.h fa4, fa0 1887; CHECKIZFHMIN-NEXT: fmul.s fa5, fa4, fa5 1888; CHECKIZFHMIN-NEXT: fcvt.h.s fa5, fa5 1889; CHECKIZFHMIN-NEXT: fcvt.s.h fa5, fa5 1890; CHECKIZFHMIN-NEXT: fcvt.s.h fa4, fa2 1891; CHECKIZFHMIN-NEXT: fadd.s fa5, fa5, fa4 1892; CHECKIZFHMIN-NEXT: fcvt.h.s fa0, fa5 1893; CHECKIZFHMIN-NEXT: ret 1894; 1895; CHECKIZHINXMIN-LABEL: fmuladd_f16: 1896; CHECKIZHINXMIN: # %bb.0: 1897; CHECKIZHINXMIN-NEXT: fcvt.s.h a1, a1 1898; CHECKIZHINXMIN-NEXT: fcvt.s.h a0, a0 1899; CHECKIZHINXMIN-NEXT: fmul.s a0, a0, a1 1900; CHECKIZHINXMIN-NEXT: fcvt.h.s a0, a0 1901; CHECKIZHINXMIN-NEXT: fcvt.s.h a0, a0 1902; CHECKIZHINXMIN-NEXT: fcvt.s.h a1, a2 1903; CHECKIZHINXMIN-NEXT: fadd.s a0, a0, a1 1904; CHECKIZHINXMIN-NEXT: fcvt.h.s a0, a0 1905; CHECKIZHINXMIN-NEXT: ret 1906 %1 = call half @llvm.fmuladd.f16(half %a, half %b, half %c) 1907 ret half %1 1908} 1909 1910declare half @llvm.fabs.f16(half) 1911 1912define half @fabs_f16(half %a) nounwind { 1913; CHECKIZFH-LABEL: fabs_f16: 1914; CHECKIZFH: # %bb.0: 1915; CHECKIZFH-NEXT: fabs.h fa0, fa0 1916; CHECKIZFH-NEXT: ret 1917; 1918; CHECKIZHINX-LABEL: fabs_f16: 1919; CHECKIZHINX: # %bb.0: 1920; CHECKIZHINX-NEXT: fabs.h a0, a0 1921; CHECKIZHINX-NEXT: ret 1922; 1923; RV32I-LABEL: fabs_f16: 1924; RV32I: # %bb.0: 1925; RV32I-NEXT: slli a0, a0, 17 1926; RV32I-NEXT: srli a0, a0, 17 1927; RV32I-NEXT: ret 1928; 1929; RV64I-LABEL: fabs_f16: 1930; RV64I: # %bb.0: 1931; RV64I-NEXT: slli a0, a0, 49 1932; RV64I-NEXT: srli a0, a0, 49 1933; RV64I-NEXT: ret 1934; 1935; RV32IZFHMIN-LABEL: fabs_f16: 1936; RV32IZFHMIN: # %bb.0: 1937; RV32IZFHMIN-NEXT: fmv.x.h a0, fa0 1938; RV32IZFHMIN-NEXT: slli a0, a0, 17 1939; RV32IZFHMIN-NEXT: srli a0, a0, 17 1940; RV32IZFHMIN-NEXT: fmv.h.x fa0, a0 1941; RV32IZFHMIN-NEXT: ret 1942; 1943; RV64IZFHMIN-LABEL: fabs_f16: 1944; RV64IZFHMIN: # %bb.0: 1945; RV64IZFHMIN-NEXT: fmv.x.h a0, fa0 1946; RV64IZFHMIN-NEXT: slli a0, a0, 49 1947; RV64IZFHMIN-NEXT: srli a0, a0, 49 1948; RV64IZFHMIN-NEXT: fmv.h.x fa0, a0 1949; RV64IZFHMIN-NEXT: ret 1950; 1951; RV32IZHINXMIN-LABEL: fabs_f16: 1952; RV32IZHINXMIN: # %bb.0: 1953; RV32IZHINXMIN-NEXT: # kill: def $x10_h killed $x10_h def $x10 1954; RV32IZHINXMIN-NEXT: slli a0, a0, 17 1955; RV32IZHINXMIN-NEXT: srli a0, a0, 17 1956; RV32IZHINXMIN-NEXT: # kill: def $x10_h killed $x10_h killed $x10 1957; RV32IZHINXMIN-NEXT: ret 1958; 1959; RV64IZHINXMIN-LABEL: fabs_f16: 1960; RV64IZHINXMIN: # %bb.0: 1961; RV64IZHINXMIN-NEXT: # kill: def $x10_h killed $x10_h def $x10 1962; RV64IZHINXMIN-NEXT: slli a0, a0, 49 1963; RV64IZHINXMIN-NEXT: srli a0, a0, 49 1964; RV64IZHINXMIN-NEXT: # kill: def $x10_h killed $x10_h killed $x10 1965; RV64IZHINXMIN-NEXT: ret 1966 %1 = call half @llvm.fabs.f16(half %a) 1967 ret half %1 1968} 1969 1970declare half @llvm.minnum.f16(half, half) 1971 1972define half @minnum_f16(half %a, half %b) nounwind { 1973; CHECKIZFH-LABEL: minnum_f16: 1974; CHECKIZFH: # %bb.0: 1975; CHECKIZFH-NEXT: fmin.h fa0, fa0, fa1 1976; CHECKIZFH-NEXT: ret 1977; 1978; CHECKIZHINX-LABEL: minnum_f16: 1979; CHECKIZHINX: # %bb.0: 1980; CHECKIZHINX-NEXT: fmin.h a0, a0, a1 1981; CHECKIZHINX-NEXT: ret 1982; 1983; RV32I-LABEL: minnum_f16: 1984; RV32I: # %bb.0: 1985; RV32I-NEXT: addi sp, sp, -16 1986; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1987; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill 1988; RV32I-NEXT: sw s1, 4(sp) # 4-byte Folded Spill 1989; RV32I-NEXT: sw s2, 0(sp) # 4-byte Folded Spill 1990; RV32I-NEXT: mv s0, a1 1991; RV32I-NEXT: lui a1, 16 1992; RV32I-NEXT: addi s2, a1, -1 1993; RV32I-NEXT: and a0, a0, s2 1994; RV32I-NEXT: call __extendhfsf2 1995; RV32I-NEXT: mv s1, a0 1996; RV32I-NEXT: and a0, s0, s2 1997; RV32I-NEXT: call __extendhfsf2 1998; RV32I-NEXT: mv a1, a0 1999; RV32I-NEXT: mv a0, s1 2000; RV32I-NEXT: call fminf 2001; RV32I-NEXT: call __truncsfhf2 2002; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 2003; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload 2004; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload 2005; RV32I-NEXT: lw s2, 0(sp) # 4-byte Folded Reload 2006; RV32I-NEXT: addi sp, sp, 16 2007; RV32I-NEXT: ret 2008; 2009; RV64I-LABEL: minnum_f16: 2010; RV64I: # %bb.0: 2011; RV64I-NEXT: addi sp, sp, -32 2012; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill 2013; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill 2014; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill 2015; RV64I-NEXT: sd s2, 0(sp) # 8-byte Folded Spill 2016; RV64I-NEXT: mv s0, a1 2017; RV64I-NEXT: lui a1, 16 2018; RV64I-NEXT: addiw s2, a1, -1 2019; RV64I-NEXT: and a0, a0, s2 2020; RV64I-NEXT: call __extendhfsf2 2021; RV64I-NEXT: mv s1, a0 2022; RV64I-NEXT: and a0, s0, s2 2023; RV64I-NEXT: call __extendhfsf2 2024; RV64I-NEXT: mv a1, a0 2025; RV64I-NEXT: mv a0, s1 2026; RV64I-NEXT: call fminf 2027; RV64I-NEXT: call __truncsfhf2 2028; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload 2029; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload 2030; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload 2031; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload 2032; RV64I-NEXT: addi sp, sp, 32 2033; RV64I-NEXT: ret 2034; 2035; CHECKIZFHMIN-LABEL: minnum_f16: 2036; CHECKIZFHMIN: # %bb.0: 2037; CHECKIZFHMIN-NEXT: fcvt.s.h fa5, fa1 2038; CHECKIZFHMIN-NEXT: fcvt.s.h fa4, fa0 2039; CHECKIZFHMIN-NEXT: fmin.s fa5, fa4, fa5 2040; CHECKIZFHMIN-NEXT: fcvt.h.s fa0, fa5 2041; CHECKIZFHMIN-NEXT: ret 2042; 2043; CHECKIZHINXMIN-LABEL: minnum_f16: 2044; CHECKIZHINXMIN: # %bb.0: 2045; CHECKIZHINXMIN-NEXT: fcvt.s.h a1, a1 2046; CHECKIZHINXMIN-NEXT: fcvt.s.h a0, a0 2047; CHECKIZHINXMIN-NEXT: fmin.s a0, a0, a1 2048; CHECKIZHINXMIN-NEXT: fcvt.h.s a0, a0 2049; CHECKIZHINXMIN-NEXT: ret 2050 %1 = call half @llvm.minnum.f16(half %a, half %b) 2051 ret half %1 2052} 2053 2054declare half @llvm.maxnum.f16(half, half) 2055 2056define half @maxnum_f16(half %a, half %b) nounwind { 2057; CHECKIZFH-LABEL: maxnum_f16: 2058; CHECKIZFH: # %bb.0: 2059; CHECKIZFH-NEXT: fmax.h fa0, fa0, fa1 2060; CHECKIZFH-NEXT: ret 2061; 2062; CHECKIZHINX-LABEL: maxnum_f16: 2063; CHECKIZHINX: # %bb.0: 2064; CHECKIZHINX-NEXT: fmax.h a0, a0, a1 2065; CHECKIZHINX-NEXT: ret 2066; 2067; RV32I-LABEL: maxnum_f16: 2068; RV32I: # %bb.0: 2069; RV32I-NEXT: addi sp, sp, -16 2070; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 2071; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill 2072; RV32I-NEXT: sw s1, 4(sp) # 4-byte Folded Spill 2073; RV32I-NEXT: sw s2, 0(sp) # 4-byte Folded Spill 2074; RV32I-NEXT: mv s0, a1 2075; RV32I-NEXT: lui a1, 16 2076; RV32I-NEXT: addi s2, a1, -1 2077; RV32I-NEXT: and a0, a0, s2 2078; RV32I-NEXT: call __extendhfsf2 2079; RV32I-NEXT: mv s1, a0 2080; RV32I-NEXT: and a0, s0, s2 2081; RV32I-NEXT: call __extendhfsf2 2082; RV32I-NEXT: mv a1, a0 2083; RV32I-NEXT: mv a0, s1 2084; RV32I-NEXT: call fmaxf 2085; RV32I-NEXT: call __truncsfhf2 2086; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 2087; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload 2088; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload 2089; RV32I-NEXT: lw s2, 0(sp) # 4-byte Folded Reload 2090; RV32I-NEXT: addi sp, sp, 16 2091; RV32I-NEXT: ret 2092; 2093; RV64I-LABEL: maxnum_f16: 2094; RV64I: # %bb.0: 2095; RV64I-NEXT: addi sp, sp, -32 2096; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill 2097; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill 2098; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill 2099; RV64I-NEXT: sd s2, 0(sp) # 8-byte Folded Spill 2100; RV64I-NEXT: mv s0, a1 2101; RV64I-NEXT: lui a1, 16 2102; RV64I-NEXT: addiw s2, a1, -1 2103; RV64I-NEXT: and a0, a0, s2 2104; RV64I-NEXT: call __extendhfsf2 2105; RV64I-NEXT: mv s1, a0 2106; RV64I-NEXT: and a0, s0, s2 2107; RV64I-NEXT: call __extendhfsf2 2108; RV64I-NEXT: mv a1, a0 2109; RV64I-NEXT: mv a0, s1 2110; RV64I-NEXT: call fmaxf 2111; RV64I-NEXT: call __truncsfhf2 2112; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload 2113; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload 2114; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload 2115; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload 2116; RV64I-NEXT: addi sp, sp, 32 2117; RV64I-NEXT: ret 2118; 2119; CHECKIZFHMIN-LABEL: maxnum_f16: 2120; CHECKIZFHMIN: # %bb.0: 2121; CHECKIZFHMIN-NEXT: fcvt.s.h fa5, fa1 2122; CHECKIZFHMIN-NEXT: fcvt.s.h fa4, fa0 2123; CHECKIZFHMIN-NEXT: fmax.s fa5, fa4, fa5 2124; CHECKIZFHMIN-NEXT: fcvt.h.s fa0, fa5 2125; CHECKIZFHMIN-NEXT: ret 2126; 2127; CHECKIZHINXMIN-LABEL: maxnum_f16: 2128; CHECKIZHINXMIN: # %bb.0: 2129; CHECKIZHINXMIN-NEXT: fcvt.s.h a1, a1 2130; CHECKIZHINXMIN-NEXT: fcvt.s.h a0, a0 2131; CHECKIZHINXMIN-NEXT: fmax.s a0, a0, a1 2132; CHECKIZHINXMIN-NEXT: fcvt.h.s a0, a0 2133; CHECKIZHINXMIN-NEXT: ret 2134 %1 = call half @llvm.maxnum.f16(half %a, half %b) 2135 ret half %1 2136} 2137 2138; TODO: FMINNAN and FMAXNAN aren't handled in 2139; SelectionDAGLegalize::ExpandNode. 2140 2141; declare half @llvm.minimum.f16(half, half) 2142 2143; define half @fminimum_f16(half %a, half %b) nounwind { 2144; %1 = call half @llvm.minimum.f16(half %a, half %b) 2145; ret half %1 2146; } 2147 2148; declare half @llvm.maximum.f16(half, half) 2149 2150; define half @fmaximum_f16(half %a, half %b) nounwind { 2151; %1 = call half @llvm.maximum.f16(half %a, half %b) 2152; ret half %1 2153; } 2154 2155declare half @llvm.copysign.f16(half, half) 2156 2157define half @copysign_f16(half %a, half %b) nounwind { 2158; CHECKIZFH-LABEL: copysign_f16: 2159; CHECKIZFH: # %bb.0: 2160; CHECKIZFH-NEXT: fsgnj.h fa0, fa0, fa1 2161; CHECKIZFH-NEXT: ret 2162; 2163; CHECKIZHINX-LABEL: copysign_f16: 2164; CHECKIZHINX: # %bb.0: 2165; CHECKIZHINX-NEXT: fsgnj.h a0, a0, a1 2166; CHECKIZHINX-NEXT: ret 2167; 2168; RV32I-LABEL: copysign_f16: 2169; RV32I: # %bb.0: 2170; RV32I-NEXT: lui a2, 1048568 2171; RV32I-NEXT: slli a0, a0, 17 2172; RV32I-NEXT: and a1, a1, a2 2173; RV32I-NEXT: srli a0, a0, 17 2174; RV32I-NEXT: or a0, a0, a1 2175; RV32I-NEXT: ret 2176; 2177; RV64I-LABEL: copysign_f16: 2178; RV64I: # %bb.0: 2179; RV64I-NEXT: lui a2, 1048568 2180; RV64I-NEXT: slli a0, a0, 49 2181; RV64I-NEXT: and a1, a1, a2 2182; RV64I-NEXT: srli a0, a0, 49 2183; RV64I-NEXT: or a0, a0, a1 2184; RV64I-NEXT: ret 2185; 2186; RV32IZFHMIN-LABEL: copysign_f16: 2187; RV32IZFHMIN: # %bb.0: 2188; RV32IZFHMIN-NEXT: fmv.x.h a0, fa1 2189; RV32IZFHMIN-NEXT: lui a1, 1048568 2190; RV32IZFHMIN-NEXT: and a0, a0, a1 2191; RV32IZFHMIN-NEXT: fmv.x.h a1, fa0 2192; RV32IZFHMIN-NEXT: slli a1, a1, 17 2193; RV32IZFHMIN-NEXT: srli a1, a1, 17 2194; RV32IZFHMIN-NEXT: or a0, a1, a0 2195; RV32IZFHMIN-NEXT: fmv.h.x fa0, a0 2196; RV32IZFHMIN-NEXT: ret 2197; 2198; RV64IZFHMIN-LABEL: copysign_f16: 2199; RV64IZFHMIN: # %bb.0: 2200; RV64IZFHMIN-NEXT: fmv.x.h a0, fa1 2201; RV64IZFHMIN-NEXT: lui a1, 1048568 2202; RV64IZFHMIN-NEXT: and a0, a0, a1 2203; RV64IZFHMIN-NEXT: fmv.x.h a1, fa0 2204; RV64IZFHMIN-NEXT: slli a1, a1, 49 2205; RV64IZFHMIN-NEXT: srli a1, a1, 49 2206; RV64IZFHMIN-NEXT: or a0, a1, a0 2207; RV64IZFHMIN-NEXT: fmv.h.x fa0, a0 2208; RV64IZFHMIN-NEXT: ret 2209; 2210; RV32IZHINXMIN-LABEL: copysign_f16: 2211; RV32IZHINXMIN: # %bb.0: 2212; RV32IZHINXMIN-NEXT: # kill: def $x11_h killed $x11_h def $x11 2213; RV32IZHINXMIN-NEXT: # kill: def $x10_h killed $x10_h def $x10 2214; RV32IZHINXMIN-NEXT: lui a2, 1048568 2215; RV32IZHINXMIN-NEXT: slli a0, a0, 17 2216; RV32IZHINXMIN-NEXT: and a1, a1, a2 2217; RV32IZHINXMIN-NEXT: srli a0, a0, 17 2218; RV32IZHINXMIN-NEXT: or a0, a0, a1 2219; RV32IZHINXMIN-NEXT: # kill: def $x10_h killed $x10_h killed $x10 2220; RV32IZHINXMIN-NEXT: ret 2221; 2222; RV64IZHINXMIN-LABEL: copysign_f16: 2223; RV64IZHINXMIN: # %bb.0: 2224; RV64IZHINXMIN-NEXT: # kill: def $x11_h killed $x11_h def $x11 2225; RV64IZHINXMIN-NEXT: # kill: def $x10_h killed $x10_h def $x10 2226; RV64IZHINXMIN-NEXT: lui a2, 1048568 2227; RV64IZHINXMIN-NEXT: slli a0, a0, 49 2228; RV64IZHINXMIN-NEXT: and a1, a1, a2 2229; RV64IZHINXMIN-NEXT: srli a0, a0, 49 2230; RV64IZHINXMIN-NEXT: or a0, a0, a1 2231; RV64IZHINXMIN-NEXT: # kill: def $x10_h killed $x10_h killed $x10 2232; RV64IZHINXMIN-NEXT: ret 2233 %1 = call half @llvm.copysign.f16(half %a, half %b) 2234 ret half %1 2235} 2236 2237declare half @llvm.floor.f16(half) 2238 2239define half @floor_f16(half %a) nounwind { 2240; CHECKIZFH-LABEL: floor_f16: 2241; CHECKIZFH: # %bb.0: 2242; CHECKIZFH-NEXT: lui a0, %hi(.LCPI18_0) 2243; CHECKIZFH-NEXT: flh fa5, %lo(.LCPI18_0)(a0) 2244; CHECKIZFH-NEXT: fabs.h fa4, fa0 2245; CHECKIZFH-NEXT: flt.h a0, fa4, fa5 2246; CHECKIZFH-NEXT: beqz a0, .LBB18_2 2247; CHECKIZFH-NEXT: # %bb.1: 2248; CHECKIZFH-NEXT: fcvt.w.h a0, fa0, rdn 2249; CHECKIZFH-NEXT: fcvt.h.w fa5, a0, rdn 2250; CHECKIZFH-NEXT: fsgnj.h fa0, fa5, fa0 2251; CHECKIZFH-NEXT: .LBB18_2: 2252; CHECKIZFH-NEXT: ret 2253; 2254; CHECKIZHINX-LABEL: floor_f16: 2255; CHECKIZHINX: # %bb.0: 2256; CHECKIZHINX-NEXT: li a1, 25 2257; CHECKIZHINX-NEXT: slli a1, a1, 10 2258; CHECKIZHINX-NEXT: fabs.h a2, a0 2259; CHECKIZHINX-NEXT: flt.h a1, a2, a1 2260; CHECKIZHINX-NEXT: beqz a1, .LBB18_2 2261; CHECKIZHINX-NEXT: # %bb.1: 2262; CHECKIZHINX-NEXT: fcvt.w.h a1, a0, rdn 2263; CHECKIZHINX-NEXT: fcvt.h.w a1, a1, rdn 2264; CHECKIZHINX-NEXT: fsgnj.h a0, a1, a0 2265; CHECKIZHINX-NEXT: .LBB18_2: 2266; CHECKIZHINX-NEXT: ret 2267; 2268; RV32I-LABEL: floor_f16: 2269; RV32I: # %bb.0: 2270; RV32I-NEXT: addi sp, sp, -16 2271; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 2272; RV32I-NEXT: slli a0, a0, 16 2273; RV32I-NEXT: srli a0, a0, 16 2274; RV32I-NEXT: call __extendhfsf2 2275; RV32I-NEXT: call floorf 2276; RV32I-NEXT: call __truncsfhf2 2277; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 2278; RV32I-NEXT: addi sp, sp, 16 2279; RV32I-NEXT: ret 2280; 2281; RV64I-LABEL: floor_f16: 2282; RV64I: # %bb.0: 2283; RV64I-NEXT: addi sp, sp, -16 2284; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 2285; RV64I-NEXT: slli a0, a0, 48 2286; RV64I-NEXT: srli a0, a0, 48 2287; RV64I-NEXT: call __extendhfsf2 2288; RV64I-NEXT: call floorf 2289; RV64I-NEXT: call __truncsfhf2 2290; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 2291; RV64I-NEXT: addi sp, sp, 16 2292; RV64I-NEXT: ret 2293; 2294; CHECKIZFHMIN-LABEL: floor_f16: 2295; CHECKIZFHMIN: # %bb.0: 2296; CHECKIZFHMIN-NEXT: fcvt.s.h fa5, fa0 2297; CHECKIZFHMIN-NEXT: lui a0, 307200 2298; CHECKIZFHMIN-NEXT: fmv.w.x fa4, a0 2299; CHECKIZFHMIN-NEXT: fabs.s fa3, fa5 2300; CHECKIZFHMIN-NEXT: flt.s a0, fa3, fa4 2301; CHECKIZFHMIN-NEXT: beqz a0, .LBB18_2 2302; CHECKIZFHMIN-NEXT: # %bb.1: 2303; CHECKIZFHMIN-NEXT: fcvt.w.s a0, fa5, rdn 2304; CHECKIZFHMIN-NEXT: fcvt.s.w fa4, a0, rdn 2305; CHECKIZFHMIN-NEXT: fsgnj.s fa5, fa4, fa5 2306; CHECKIZFHMIN-NEXT: .LBB18_2: 2307; CHECKIZFHMIN-NEXT: fcvt.h.s fa0, fa5 2308; CHECKIZFHMIN-NEXT: ret 2309; 2310; CHECKIZHINXMIN-LABEL: floor_f16: 2311; CHECKIZHINXMIN: # %bb.0: 2312; CHECKIZHINXMIN-NEXT: fcvt.s.h a0, a0 2313; CHECKIZHINXMIN-NEXT: lui a1, 307200 2314; CHECKIZHINXMIN-NEXT: fabs.s a2, a0 2315; CHECKIZHINXMIN-NEXT: flt.s a1, a2, a1 2316; CHECKIZHINXMIN-NEXT: beqz a1, .LBB18_2 2317; CHECKIZHINXMIN-NEXT: # %bb.1: 2318; CHECKIZHINXMIN-NEXT: fcvt.w.s a1, a0, rdn 2319; CHECKIZHINXMIN-NEXT: fcvt.s.w a1, a1, rdn 2320; CHECKIZHINXMIN-NEXT: fsgnj.s a0, a1, a0 2321; CHECKIZHINXMIN-NEXT: .LBB18_2: 2322; CHECKIZHINXMIN-NEXT: fcvt.h.s a0, a0 2323; CHECKIZHINXMIN-NEXT: ret 2324 %1 = call half @llvm.floor.f16(half %a) 2325 ret half %1 2326} 2327 2328declare half @llvm.ceil.f16(half) 2329 2330define half @ceil_f16(half %a) nounwind { 2331; CHECKIZFH-LABEL: ceil_f16: 2332; CHECKIZFH: # %bb.0: 2333; CHECKIZFH-NEXT: lui a0, %hi(.LCPI19_0) 2334; CHECKIZFH-NEXT: flh fa5, %lo(.LCPI19_0)(a0) 2335; CHECKIZFH-NEXT: fabs.h fa4, fa0 2336; CHECKIZFH-NEXT: flt.h a0, fa4, fa5 2337; CHECKIZFH-NEXT: beqz a0, .LBB19_2 2338; CHECKIZFH-NEXT: # %bb.1: 2339; CHECKIZFH-NEXT: fcvt.w.h a0, fa0, rup 2340; CHECKIZFH-NEXT: fcvt.h.w fa5, a0, rup 2341; CHECKIZFH-NEXT: fsgnj.h fa0, fa5, fa0 2342; CHECKIZFH-NEXT: .LBB19_2: 2343; CHECKIZFH-NEXT: ret 2344; 2345; CHECKIZHINX-LABEL: ceil_f16: 2346; CHECKIZHINX: # %bb.0: 2347; CHECKIZHINX-NEXT: li a1, 25 2348; CHECKIZHINX-NEXT: slli a1, a1, 10 2349; CHECKIZHINX-NEXT: fabs.h a2, a0 2350; CHECKIZHINX-NEXT: flt.h a1, a2, a1 2351; CHECKIZHINX-NEXT: beqz a1, .LBB19_2 2352; CHECKIZHINX-NEXT: # %bb.1: 2353; CHECKIZHINX-NEXT: fcvt.w.h a1, a0, rup 2354; CHECKIZHINX-NEXT: fcvt.h.w a1, a1, rup 2355; CHECKIZHINX-NEXT: fsgnj.h a0, a1, a0 2356; CHECKIZHINX-NEXT: .LBB19_2: 2357; CHECKIZHINX-NEXT: ret 2358; 2359; RV32I-LABEL: ceil_f16: 2360; RV32I: # %bb.0: 2361; RV32I-NEXT: addi sp, sp, -16 2362; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 2363; RV32I-NEXT: slli a0, a0, 16 2364; RV32I-NEXT: srli a0, a0, 16 2365; RV32I-NEXT: call __extendhfsf2 2366; RV32I-NEXT: call ceilf 2367; RV32I-NEXT: call __truncsfhf2 2368; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 2369; RV32I-NEXT: addi sp, sp, 16 2370; RV32I-NEXT: ret 2371; 2372; RV64I-LABEL: ceil_f16: 2373; RV64I: # %bb.0: 2374; RV64I-NEXT: addi sp, sp, -16 2375; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 2376; RV64I-NEXT: slli a0, a0, 48 2377; RV64I-NEXT: srli a0, a0, 48 2378; RV64I-NEXT: call __extendhfsf2 2379; RV64I-NEXT: call ceilf 2380; RV64I-NEXT: call __truncsfhf2 2381; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 2382; RV64I-NEXT: addi sp, sp, 16 2383; RV64I-NEXT: ret 2384; 2385; CHECKIZFHMIN-LABEL: ceil_f16: 2386; CHECKIZFHMIN: # %bb.0: 2387; CHECKIZFHMIN-NEXT: fcvt.s.h fa5, fa0 2388; CHECKIZFHMIN-NEXT: lui a0, 307200 2389; CHECKIZFHMIN-NEXT: fmv.w.x fa4, a0 2390; CHECKIZFHMIN-NEXT: fabs.s fa3, fa5 2391; CHECKIZFHMIN-NEXT: flt.s a0, fa3, fa4 2392; CHECKIZFHMIN-NEXT: beqz a0, .LBB19_2 2393; CHECKIZFHMIN-NEXT: # %bb.1: 2394; CHECKIZFHMIN-NEXT: fcvt.w.s a0, fa5, rup 2395; CHECKIZFHMIN-NEXT: fcvt.s.w fa4, a0, rup 2396; CHECKIZFHMIN-NEXT: fsgnj.s fa5, fa4, fa5 2397; CHECKIZFHMIN-NEXT: .LBB19_2: 2398; CHECKIZFHMIN-NEXT: fcvt.h.s fa0, fa5 2399; CHECKIZFHMIN-NEXT: ret 2400; 2401; CHECKIZHINXMIN-LABEL: ceil_f16: 2402; CHECKIZHINXMIN: # %bb.0: 2403; CHECKIZHINXMIN-NEXT: fcvt.s.h a0, a0 2404; CHECKIZHINXMIN-NEXT: lui a1, 307200 2405; CHECKIZHINXMIN-NEXT: fabs.s a2, a0 2406; CHECKIZHINXMIN-NEXT: flt.s a1, a2, a1 2407; CHECKIZHINXMIN-NEXT: beqz a1, .LBB19_2 2408; CHECKIZHINXMIN-NEXT: # %bb.1: 2409; CHECKIZHINXMIN-NEXT: fcvt.w.s a1, a0, rup 2410; CHECKIZHINXMIN-NEXT: fcvt.s.w a1, a1, rup 2411; CHECKIZHINXMIN-NEXT: fsgnj.s a0, a1, a0 2412; CHECKIZHINXMIN-NEXT: .LBB19_2: 2413; CHECKIZHINXMIN-NEXT: fcvt.h.s a0, a0 2414; CHECKIZHINXMIN-NEXT: ret 2415 %1 = call half @llvm.ceil.f16(half %a) 2416 ret half %1 2417} 2418 2419declare half @llvm.trunc.f16(half) 2420 2421define half @trunc_f16(half %a) nounwind { 2422; CHECKIZFH-LABEL: trunc_f16: 2423; CHECKIZFH: # %bb.0: 2424; CHECKIZFH-NEXT: lui a0, %hi(.LCPI20_0) 2425; CHECKIZFH-NEXT: flh fa5, %lo(.LCPI20_0)(a0) 2426; CHECKIZFH-NEXT: fabs.h fa4, fa0 2427; CHECKIZFH-NEXT: flt.h a0, fa4, fa5 2428; CHECKIZFH-NEXT: beqz a0, .LBB20_2 2429; CHECKIZFH-NEXT: # %bb.1: 2430; CHECKIZFH-NEXT: fcvt.w.h a0, fa0, rtz 2431; CHECKIZFH-NEXT: fcvt.h.w fa5, a0, rtz 2432; CHECKIZFH-NEXT: fsgnj.h fa0, fa5, fa0 2433; CHECKIZFH-NEXT: .LBB20_2: 2434; CHECKIZFH-NEXT: ret 2435; 2436; CHECKIZHINX-LABEL: trunc_f16: 2437; CHECKIZHINX: # %bb.0: 2438; CHECKIZHINX-NEXT: li a1, 25 2439; CHECKIZHINX-NEXT: slli a1, a1, 10 2440; CHECKIZHINX-NEXT: fabs.h a2, a0 2441; CHECKIZHINX-NEXT: flt.h a1, a2, a1 2442; CHECKIZHINX-NEXT: beqz a1, .LBB20_2 2443; CHECKIZHINX-NEXT: # %bb.1: 2444; CHECKIZHINX-NEXT: fcvt.w.h a1, a0, rtz 2445; CHECKIZHINX-NEXT: fcvt.h.w a1, a1, rtz 2446; CHECKIZHINX-NEXT: fsgnj.h a0, a1, a0 2447; CHECKIZHINX-NEXT: .LBB20_2: 2448; CHECKIZHINX-NEXT: ret 2449; 2450; RV32I-LABEL: trunc_f16: 2451; RV32I: # %bb.0: 2452; RV32I-NEXT: addi sp, sp, -16 2453; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 2454; RV32I-NEXT: slli a0, a0, 16 2455; RV32I-NEXT: srli a0, a0, 16 2456; RV32I-NEXT: call __extendhfsf2 2457; RV32I-NEXT: call truncf 2458; RV32I-NEXT: call __truncsfhf2 2459; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 2460; RV32I-NEXT: addi sp, sp, 16 2461; RV32I-NEXT: ret 2462; 2463; RV64I-LABEL: trunc_f16: 2464; RV64I: # %bb.0: 2465; RV64I-NEXT: addi sp, sp, -16 2466; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 2467; RV64I-NEXT: slli a0, a0, 48 2468; RV64I-NEXT: srli a0, a0, 48 2469; RV64I-NEXT: call __extendhfsf2 2470; RV64I-NEXT: call truncf 2471; RV64I-NEXT: call __truncsfhf2 2472; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 2473; RV64I-NEXT: addi sp, sp, 16 2474; RV64I-NEXT: ret 2475; 2476; CHECKIZFHMIN-LABEL: trunc_f16: 2477; CHECKIZFHMIN: # %bb.0: 2478; CHECKIZFHMIN-NEXT: fcvt.s.h fa5, fa0 2479; CHECKIZFHMIN-NEXT: lui a0, 307200 2480; CHECKIZFHMIN-NEXT: fmv.w.x fa4, a0 2481; CHECKIZFHMIN-NEXT: fabs.s fa3, fa5 2482; CHECKIZFHMIN-NEXT: flt.s a0, fa3, fa4 2483; CHECKIZFHMIN-NEXT: beqz a0, .LBB20_2 2484; CHECKIZFHMIN-NEXT: # %bb.1: 2485; CHECKIZFHMIN-NEXT: fcvt.w.s a0, fa5, rtz 2486; CHECKIZFHMIN-NEXT: fcvt.s.w fa4, a0, rtz 2487; CHECKIZFHMIN-NEXT: fsgnj.s fa5, fa4, fa5 2488; CHECKIZFHMIN-NEXT: .LBB20_2: 2489; CHECKIZFHMIN-NEXT: fcvt.h.s fa0, fa5 2490; CHECKIZFHMIN-NEXT: ret 2491; 2492; CHECKIZHINXMIN-LABEL: trunc_f16: 2493; CHECKIZHINXMIN: # %bb.0: 2494; CHECKIZHINXMIN-NEXT: fcvt.s.h a0, a0 2495; CHECKIZHINXMIN-NEXT: lui a1, 307200 2496; CHECKIZHINXMIN-NEXT: fabs.s a2, a0 2497; CHECKIZHINXMIN-NEXT: flt.s a1, a2, a1 2498; CHECKIZHINXMIN-NEXT: beqz a1, .LBB20_2 2499; CHECKIZHINXMIN-NEXT: # %bb.1: 2500; CHECKIZHINXMIN-NEXT: fcvt.w.s a1, a0, rtz 2501; CHECKIZHINXMIN-NEXT: fcvt.s.w a1, a1, rtz 2502; CHECKIZHINXMIN-NEXT: fsgnj.s a0, a1, a0 2503; CHECKIZHINXMIN-NEXT: .LBB20_2: 2504; CHECKIZHINXMIN-NEXT: fcvt.h.s a0, a0 2505; CHECKIZHINXMIN-NEXT: ret 2506 %1 = call half @llvm.trunc.f16(half %a) 2507 ret half %1 2508} 2509 2510declare half @llvm.rint.f16(half) 2511 2512define half @rint_f16(half %a) nounwind { 2513; CHECKIZFH-LABEL: rint_f16: 2514; CHECKIZFH: # %bb.0: 2515; CHECKIZFH-NEXT: lui a0, %hi(.LCPI21_0) 2516; CHECKIZFH-NEXT: flh fa5, %lo(.LCPI21_0)(a0) 2517; CHECKIZFH-NEXT: fabs.h fa4, fa0 2518; CHECKIZFH-NEXT: flt.h a0, fa4, fa5 2519; CHECKIZFH-NEXT: beqz a0, .LBB21_2 2520; CHECKIZFH-NEXT: # %bb.1: 2521; CHECKIZFH-NEXT: fcvt.w.h a0, fa0 2522; CHECKIZFH-NEXT: fcvt.h.w fa5, a0 2523; CHECKIZFH-NEXT: fsgnj.h fa0, fa5, fa0 2524; CHECKIZFH-NEXT: .LBB21_2: 2525; CHECKIZFH-NEXT: ret 2526; 2527; CHECKIZHINX-LABEL: rint_f16: 2528; CHECKIZHINX: # %bb.0: 2529; CHECKIZHINX-NEXT: li a1, 25 2530; CHECKIZHINX-NEXT: slli a1, a1, 10 2531; CHECKIZHINX-NEXT: fabs.h a2, a0 2532; CHECKIZHINX-NEXT: flt.h a1, a2, a1 2533; CHECKIZHINX-NEXT: beqz a1, .LBB21_2 2534; CHECKIZHINX-NEXT: # %bb.1: 2535; CHECKIZHINX-NEXT: fcvt.w.h a1, a0 2536; CHECKIZHINX-NEXT: fcvt.h.w a1, a1 2537; CHECKIZHINX-NEXT: fsgnj.h a0, a1, a0 2538; CHECKIZHINX-NEXT: .LBB21_2: 2539; CHECKIZHINX-NEXT: ret 2540; 2541; RV32I-LABEL: rint_f16: 2542; RV32I: # %bb.0: 2543; RV32I-NEXT: addi sp, sp, -16 2544; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 2545; RV32I-NEXT: slli a0, a0, 16 2546; RV32I-NEXT: srli a0, a0, 16 2547; RV32I-NEXT: call __extendhfsf2 2548; RV32I-NEXT: call rintf 2549; RV32I-NEXT: call __truncsfhf2 2550; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 2551; RV32I-NEXT: addi sp, sp, 16 2552; RV32I-NEXT: ret 2553; 2554; RV64I-LABEL: rint_f16: 2555; RV64I: # %bb.0: 2556; RV64I-NEXT: addi sp, sp, -16 2557; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 2558; RV64I-NEXT: slli a0, a0, 48 2559; RV64I-NEXT: srli a0, a0, 48 2560; RV64I-NEXT: call __extendhfsf2 2561; RV64I-NEXT: call rintf 2562; RV64I-NEXT: call __truncsfhf2 2563; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 2564; RV64I-NEXT: addi sp, sp, 16 2565; RV64I-NEXT: ret 2566; 2567; CHECKIZFHMIN-LABEL: rint_f16: 2568; CHECKIZFHMIN: # %bb.0: 2569; CHECKIZFHMIN-NEXT: fcvt.s.h fa5, fa0 2570; CHECKIZFHMIN-NEXT: lui a0, 307200 2571; CHECKIZFHMIN-NEXT: fmv.w.x fa4, a0 2572; CHECKIZFHMIN-NEXT: fabs.s fa3, fa5 2573; CHECKIZFHMIN-NEXT: flt.s a0, fa3, fa4 2574; CHECKIZFHMIN-NEXT: beqz a0, .LBB21_2 2575; CHECKIZFHMIN-NEXT: # %bb.1: 2576; CHECKIZFHMIN-NEXT: fcvt.w.s a0, fa5 2577; CHECKIZFHMIN-NEXT: fcvt.s.w fa4, a0 2578; CHECKIZFHMIN-NEXT: fsgnj.s fa5, fa4, fa5 2579; CHECKIZFHMIN-NEXT: .LBB21_2: 2580; CHECKIZFHMIN-NEXT: fcvt.h.s fa0, fa5 2581; CHECKIZFHMIN-NEXT: ret 2582; 2583; CHECKIZHINXMIN-LABEL: rint_f16: 2584; CHECKIZHINXMIN: # %bb.0: 2585; CHECKIZHINXMIN-NEXT: fcvt.s.h a0, a0 2586; CHECKIZHINXMIN-NEXT: lui a1, 307200 2587; CHECKIZHINXMIN-NEXT: fabs.s a2, a0 2588; CHECKIZHINXMIN-NEXT: flt.s a1, a2, a1 2589; CHECKIZHINXMIN-NEXT: beqz a1, .LBB21_2 2590; CHECKIZHINXMIN-NEXT: # %bb.1: 2591; CHECKIZHINXMIN-NEXT: fcvt.w.s a1, a0 2592; CHECKIZHINXMIN-NEXT: fcvt.s.w a1, a1 2593; CHECKIZHINXMIN-NEXT: fsgnj.s a0, a1, a0 2594; CHECKIZHINXMIN-NEXT: .LBB21_2: 2595; CHECKIZHINXMIN-NEXT: fcvt.h.s a0, a0 2596; CHECKIZHINXMIN-NEXT: ret 2597 %1 = call half @llvm.rint.f16(half %a) 2598 ret half %1 2599} 2600 2601declare half @llvm.nearbyint.f16(half) 2602 2603define half @nearbyint_f16(half %a) nounwind { 2604; RV32IZFH-LABEL: nearbyint_f16: 2605; RV32IZFH: # %bb.0: 2606; RV32IZFH-NEXT: addi sp, sp, -16 2607; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 2608; RV32IZFH-NEXT: fcvt.s.h fa0, fa0 2609; RV32IZFH-NEXT: call nearbyintf 2610; RV32IZFH-NEXT: fcvt.h.s fa0, fa0 2611; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 2612; RV32IZFH-NEXT: addi sp, sp, 16 2613; RV32IZFH-NEXT: ret 2614; 2615; RV64IZFH-LABEL: nearbyint_f16: 2616; RV64IZFH: # %bb.0: 2617; RV64IZFH-NEXT: addi sp, sp, -16 2618; RV64IZFH-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 2619; RV64IZFH-NEXT: fcvt.s.h fa0, fa0 2620; RV64IZFH-NEXT: call nearbyintf 2621; RV64IZFH-NEXT: fcvt.h.s fa0, fa0 2622; RV64IZFH-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 2623; RV64IZFH-NEXT: addi sp, sp, 16 2624; RV64IZFH-NEXT: ret 2625; 2626; RV32IZHINX-LABEL: nearbyint_f16: 2627; RV32IZHINX: # %bb.0: 2628; RV32IZHINX-NEXT: addi sp, sp, -16 2629; RV32IZHINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 2630; RV32IZHINX-NEXT: fcvt.s.h a0, a0 2631; RV32IZHINX-NEXT: call nearbyintf 2632; RV32IZHINX-NEXT: fcvt.h.s a0, a0 2633; RV32IZHINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 2634; RV32IZHINX-NEXT: addi sp, sp, 16 2635; RV32IZHINX-NEXT: ret 2636; 2637; RV64IZHINX-LABEL: nearbyint_f16: 2638; RV64IZHINX: # %bb.0: 2639; RV64IZHINX-NEXT: addi sp, sp, -16 2640; RV64IZHINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 2641; RV64IZHINX-NEXT: fcvt.s.h a0, a0 2642; RV64IZHINX-NEXT: call nearbyintf 2643; RV64IZHINX-NEXT: fcvt.h.s a0, a0 2644; RV64IZHINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 2645; RV64IZHINX-NEXT: addi sp, sp, 16 2646; RV64IZHINX-NEXT: ret 2647; 2648; RV32I-LABEL: nearbyint_f16: 2649; RV32I: # %bb.0: 2650; RV32I-NEXT: addi sp, sp, -16 2651; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 2652; RV32I-NEXT: slli a0, a0, 16 2653; RV32I-NEXT: srli a0, a0, 16 2654; RV32I-NEXT: call __extendhfsf2 2655; RV32I-NEXT: call nearbyintf 2656; RV32I-NEXT: call __truncsfhf2 2657; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 2658; RV32I-NEXT: addi sp, sp, 16 2659; RV32I-NEXT: ret 2660; 2661; RV64I-LABEL: nearbyint_f16: 2662; RV64I: # %bb.0: 2663; RV64I-NEXT: addi sp, sp, -16 2664; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 2665; RV64I-NEXT: slli a0, a0, 48 2666; RV64I-NEXT: srli a0, a0, 48 2667; RV64I-NEXT: call __extendhfsf2 2668; RV64I-NEXT: call nearbyintf 2669; RV64I-NEXT: call __truncsfhf2 2670; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 2671; RV64I-NEXT: addi sp, sp, 16 2672; RV64I-NEXT: ret 2673; 2674; RV32IZFHMIN-LABEL: nearbyint_f16: 2675; RV32IZFHMIN: # %bb.0: 2676; RV32IZFHMIN-NEXT: addi sp, sp, -16 2677; RV32IZFHMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 2678; RV32IZFHMIN-NEXT: fcvt.s.h fa0, fa0 2679; RV32IZFHMIN-NEXT: call nearbyintf 2680; RV32IZFHMIN-NEXT: fcvt.h.s fa0, fa0 2681; RV32IZFHMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 2682; RV32IZFHMIN-NEXT: addi sp, sp, 16 2683; RV32IZFHMIN-NEXT: ret 2684; 2685; RV64IZFHMIN-LABEL: nearbyint_f16: 2686; RV64IZFHMIN: # %bb.0: 2687; RV64IZFHMIN-NEXT: addi sp, sp, -16 2688; RV64IZFHMIN-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 2689; RV64IZFHMIN-NEXT: fcvt.s.h fa0, fa0 2690; RV64IZFHMIN-NEXT: call nearbyintf 2691; RV64IZFHMIN-NEXT: fcvt.h.s fa0, fa0 2692; RV64IZFHMIN-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 2693; RV64IZFHMIN-NEXT: addi sp, sp, 16 2694; RV64IZFHMIN-NEXT: ret 2695; 2696; RV32IZHINXMIN-LABEL: nearbyint_f16: 2697; RV32IZHINXMIN: # %bb.0: 2698; RV32IZHINXMIN-NEXT: addi sp, sp, -16 2699; RV32IZHINXMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 2700; RV32IZHINXMIN-NEXT: fcvt.s.h a0, a0 2701; RV32IZHINXMIN-NEXT: call nearbyintf 2702; RV32IZHINXMIN-NEXT: fcvt.h.s a0, a0 2703; RV32IZHINXMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 2704; RV32IZHINXMIN-NEXT: addi sp, sp, 16 2705; RV32IZHINXMIN-NEXT: ret 2706; 2707; RV64IZHINXMIN-LABEL: nearbyint_f16: 2708; RV64IZHINXMIN: # %bb.0: 2709; RV64IZHINXMIN-NEXT: addi sp, sp, -16 2710; RV64IZHINXMIN-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 2711; RV64IZHINXMIN-NEXT: fcvt.s.h a0, a0 2712; RV64IZHINXMIN-NEXT: call nearbyintf 2713; RV64IZHINXMIN-NEXT: fcvt.h.s a0, a0 2714; RV64IZHINXMIN-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 2715; RV64IZHINXMIN-NEXT: addi sp, sp, 16 2716; RV64IZHINXMIN-NEXT: ret 2717 %1 = call half @llvm.nearbyint.f16(half %a) 2718 ret half %1 2719} 2720 2721declare half @llvm.round.f16(half) 2722 2723define half @round_f16(half %a) nounwind { 2724; CHECKIZFH-LABEL: round_f16: 2725; CHECKIZFH: # %bb.0: 2726; CHECKIZFH-NEXT: lui a0, %hi(.LCPI23_0) 2727; CHECKIZFH-NEXT: flh fa5, %lo(.LCPI23_0)(a0) 2728; CHECKIZFH-NEXT: fabs.h fa4, fa0 2729; CHECKIZFH-NEXT: flt.h a0, fa4, fa5 2730; CHECKIZFH-NEXT: beqz a0, .LBB23_2 2731; CHECKIZFH-NEXT: # %bb.1: 2732; CHECKIZFH-NEXT: fcvt.w.h a0, fa0, rmm 2733; CHECKIZFH-NEXT: fcvt.h.w fa5, a0, rmm 2734; CHECKIZFH-NEXT: fsgnj.h fa0, fa5, fa0 2735; CHECKIZFH-NEXT: .LBB23_2: 2736; CHECKIZFH-NEXT: ret 2737; 2738; CHECKIZHINX-LABEL: round_f16: 2739; CHECKIZHINX: # %bb.0: 2740; CHECKIZHINX-NEXT: li a1, 25 2741; CHECKIZHINX-NEXT: slli a1, a1, 10 2742; CHECKIZHINX-NEXT: fabs.h a2, a0 2743; CHECKIZHINX-NEXT: flt.h a1, a2, a1 2744; CHECKIZHINX-NEXT: beqz a1, .LBB23_2 2745; CHECKIZHINX-NEXT: # %bb.1: 2746; CHECKIZHINX-NEXT: fcvt.w.h a1, a0, rmm 2747; CHECKIZHINX-NEXT: fcvt.h.w a1, a1, rmm 2748; CHECKIZHINX-NEXT: fsgnj.h a0, a1, a0 2749; CHECKIZHINX-NEXT: .LBB23_2: 2750; CHECKIZHINX-NEXT: ret 2751; 2752; RV32I-LABEL: round_f16: 2753; RV32I: # %bb.0: 2754; RV32I-NEXT: addi sp, sp, -16 2755; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 2756; RV32I-NEXT: slli a0, a0, 16 2757; RV32I-NEXT: srli a0, a0, 16 2758; RV32I-NEXT: call __extendhfsf2 2759; RV32I-NEXT: call roundf 2760; RV32I-NEXT: call __truncsfhf2 2761; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 2762; RV32I-NEXT: addi sp, sp, 16 2763; RV32I-NEXT: ret 2764; 2765; RV64I-LABEL: round_f16: 2766; RV64I: # %bb.0: 2767; RV64I-NEXT: addi sp, sp, -16 2768; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 2769; RV64I-NEXT: slli a0, a0, 48 2770; RV64I-NEXT: srli a0, a0, 48 2771; RV64I-NEXT: call __extendhfsf2 2772; RV64I-NEXT: call roundf 2773; RV64I-NEXT: call __truncsfhf2 2774; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 2775; RV64I-NEXT: addi sp, sp, 16 2776; RV64I-NEXT: ret 2777; 2778; CHECKIZFHMIN-LABEL: round_f16: 2779; CHECKIZFHMIN: # %bb.0: 2780; CHECKIZFHMIN-NEXT: fcvt.s.h fa5, fa0 2781; CHECKIZFHMIN-NEXT: lui a0, 307200 2782; CHECKIZFHMIN-NEXT: fmv.w.x fa4, a0 2783; CHECKIZFHMIN-NEXT: fabs.s fa3, fa5 2784; CHECKIZFHMIN-NEXT: flt.s a0, fa3, fa4 2785; CHECKIZFHMIN-NEXT: beqz a0, .LBB23_2 2786; CHECKIZFHMIN-NEXT: # %bb.1: 2787; CHECKIZFHMIN-NEXT: fcvt.w.s a0, fa5, rmm 2788; CHECKIZFHMIN-NEXT: fcvt.s.w fa4, a0, rmm 2789; CHECKIZFHMIN-NEXT: fsgnj.s fa5, fa4, fa5 2790; CHECKIZFHMIN-NEXT: .LBB23_2: 2791; CHECKIZFHMIN-NEXT: fcvt.h.s fa0, fa5 2792; CHECKIZFHMIN-NEXT: ret 2793; 2794; CHECKIZHINXMIN-LABEL: round_f16: 2795; CHECKIZHINXMIN: # %bb.0: 2796; CHECKIZHINXMIN-NEXT: fcvt.s.h a0, a0 2797; CHECKIZHINXMIN-NEXT: lui a1, 307200 2798; CHECKIZHINXMIN-NEXT: fabs.s a2, a0 2799; CHECKIZHINXMIN-NEXT: flt.s a1, a2, a1 2800; CHECKIZHINXMIN-NEXT: beqz a1, .LBB23_2 2801; CHECKIZHINXMIN-NEXT: # %bb.1: 2802; CHECKIZHINXMIN-NEXT: fcvt.w.s a1, a0, rmm 2803; CHECKIZHINXMIN-NEXT: fcvt.s.w a1, a1, rmm 2804; CHECKIZHINXMIN-NEXT: fsgnj.s a0, a1, a0 2805; CHECKIZHINXMIN-NEXT: .LBB23_2: 2806; CHECKIZHINXMIN-NEXT: fcvt.h.s a0, a0 2807; CHECKIZHINXMIN-NEXT: ret 2808 %1 = call half @llvm.round.f16(half %a) 2809 ret half %1 2810} 2811 2812declare half @llvm.roundeven.f16(half) 2813 2814define half @roundeven_f16(half %a) nounwind { 2815; CHECKIZFH-LABEL: roundeven_f16: 2816; CHECKIZFH: # %bb.0: 2817; CHECKIZFH-NEXT: lui a0, %hi(.LCPI24_0) 2818; CHECKIZFH-NEXT: flh fa5, %lo(.LCPI24_0)(a0) 2819; CHECKIZFH-NEXT: fabs.h fa4, fa0 2820; CHECKIZFH-NEXT: flt.h a0, fa4, fa5 2821; CHECKIZFH-NEXT: beqz a0, .LBB24_2 2822; CHECKIZFH-NEXT: # %bb.1: 2823; CHECKIZFH-NEXT: fcvt.w.h a0, fa0, rne 2824; CHECKIZFH-NEXT: fcvt.h.w fa5, a0, rne 2825; CHECKIZFH-NEXT: fsgnj.h fa0, fa5, fa0 2826; CHECKIZFH-NEXT: .LBB24_2: 2827; CHECKIZFH-NEXT: ret 2828; 2829; CHECKIZHINX-LABEL: roundeven_f16: 2830; CHECKIZHINX: # %bb.0: 2831; CHECKIZHINX-NEXT: li a1, 25 2832; CHECKIZHINX-NEXT: slli a1, a1, 10 2833; CHECKIZHINX-NEXT: fabs.h a2, a0 2834; CHECKIZHINX-NEXT: flt.h a1, a2, a1 2835; CHECKIZHINX-NEXT: beqz a1, .LBB24_2 2836; CHECKIZHINX-NEXT: # %bb.1: 2837; CHECKIZHINX-NEXT: fcvt.w.h a1, a0, rne 2838; CHECKIZHINX-NEXT: fcvt.h.w a1, a1, rne 2839; CHECKIZHINX-NEXT: fsgnj.h a0, a1, a0 2840; CHECKIZHINX-NEXT: .LBB24_2: 2841; CHECKIZHINX-NEXT: ret 2842; 2843; RV32I-LABEL: roundeven_f16: 2844; RV32I: # %bb.0: 2845; RV32I-NEXT: addi sp, sp, -16 2846; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 2847; RV32I-NEXT: slli a0, a0, 16 2848; RV32I-NEXT: srli a0, a0, 16 2849; RV32I-NEXT: call __extendhfsf2 2850; RV32I-NEXT: call roundevenf 2851; RV32I-NEXT: call __truncsfhf2 2852; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 2853; RV32I-NEXT: addi sp, sp, 16 2854; RV32I-NEXT: ret 2855; 2856; RV64I-LABEL: roundeven_f16: 2857; RV64I: # %bb.0: 2858; RV64I-NEXT: addi sp, sp, -16 2859; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 2860; RV64I-NEXT: slli a0, a0, 48 2861; RV64I-NEXT: srli a0, a0, 48 2862; RV64I-NEXT: call __extendhfsf2 2863; RV64I-NEXT: call roundevenf 2864; RV64I-NEXT: call __truncsfhf2 2865; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 2866; RV64I-NEXT: addi sp, sp, 16 2867; RV64I-NEXT: ret 2868; 2869; CHECKIZFHMIN-LABEL: roundeven_f16: 2870; CHECKIZFHMIN: # %bb.0: 2871; CHECKIZFHMIN-NEXT: fcvt.s.h fa5, fa0 2872; CHECKIZFHMIN-NEXT: lui a0, 307200 2873; CHECKIZFHMIN-NEXT: fmv.w.x fa4, a0 2874; CHECKIZFHMIN-NEXT: fabs.s fa3, fa5 2875; CHECKIZFHMIN-NEXT: flt.s a0, fa3, fa4 2876; CHECKIZFHMIN-NEXT: beqz a0, .LBB24_2 2877; CHECKIZFHMIN-NEXT: # %bb.1: 2878; CHECKIZFHMIN-NEXT: fcvt.w.s a0, fa5, rne 2879; CHECKIZFHMIN-NEXT: fcvt.s.w fa4, a0, rne 2880; CHECKIZFHMIN-NEXT: fsgnj.s fa5, fa4, fa5 2881; CHECKIZFHMIN-NEXT: .LBB24_2: 2882; CHECKIZFHMIN-NEXT: fcvt.h.s fa0, fa5 2883; CHECKIZFHMIN-NEXT: ret 2884; 2885; CHECKIZHINXMIN-LABEL: roundeven_f16: 2886; CHECKIZHINXMIN: # %bb.0: 2887; CHECKIZHINXMIN-NEXT: fcvt.s.h a0, a0 2888; CHECKIZHINXMIN-NEXT: lui a1, 307200 2889; CHECKIZHINXMIN-NEXT: fabs.s a2, a0 2890; CHECKIZHINXMIN-NEXT: flt.s a1, a2, a1 2891; CHECKIZHINXMIN-NEXT: beqz a1, .LBB24_2 2892; CHECKIZHINXMIN-NEXT: # %bb.1: 2893; CHECKIZHINXMIN-NEXT: fcvt.w.s a1, a0, rne 2894; CHECKIZHINXMIN-NEXT: fcvt.s.w a1, a1, rne 2895; CHECKIZHINXMIN-NEXT: fsgnj.s a0, a1, a0 2896; CHECKIZHINXMIN-NEXT: .LBB24_2: 2897; CHECKIZHINXMIN-NEXT: fcvt.h.s a0, a0 2898; CHECKIZHINXMIN-NEXT: ret 2899 %1 = call half @llvm.roundeven.f16(half %a) 2900 ret half %1 2901} 2902 2903declare i1 @llvm.is.fpclass.f16(half, i32) 2904define i1 @isnan_d_fpclass(half %x) { 2905; CHECKIZFH-LABEL: isnan_d_fpclass: 2906; CHECKIZFH: # %bb.0: 2907; CHECKIZFH-NEXT: fclass.h a0, fa0 2908; CHECKIZFH-NEXT: andi a0, a0, 768 2909; CHECKIZFH-NEXT: snez a0, a0 2910; CHECKIZFH-NEXT: ret 2911; 2912; CHECKIZHINX-LABEL: isnan_d_fpclass: 2913; CHECKIZHINX: # %bb.0: 2914; CHECKIZHINX-NEXT: fclass.h a0, a0 2915; CHECKIZHINX-NEXT: andi a0, a0, 768 2916; CHECKIZHINX-NEXT: snez a0, a0 2917; CHECKIZHINX-NEXT: ret 2918; 2919; RV32I-LABEL: isnan_d_fpclass: 2920; RV32I: # %bb.0: 2921; RV32I-NEXT: slli a0, a0, 17 2922; RV32I-NEXT: li a1, 31 2923; RV32I-NEXT: srli a0, a0, 17 2924; RV32I-NEXT: slli a1, a1, 10 2925; RV32I-NEXT: slt a0, a1, a0 2926; RV32I-NEXT: ret 2927; 2928; RV64I-LABEL: isnan_d_fpclass: 2929; RV64I: # %bb.0: 2930; RV64I-NEXT: slli a0, a0, 49 2931; RV64I-NEXT: li a1, 31 2932; RV64I-NEXT: srli a0, a0, 49 2933; RV64I-NEXT: slli a1, a1, 10 2934; RV64I-NEXT: slt a0, a1, a0 2935; RV64I-NEXT: ret 2936; 2937; RV32IZFHMIN-LABEL: isnan_d_fpclass: 2938; RV32IZFHMIN: # %bb.0: 2939; RV32IZFHMIN-NEXT: fmv.x.h a0, fa0 2940; RV32IZFHMIN-NEXT: li a1, 31 2941; RV32IZFHMIN-NEXT: slli a0, a0, 17 2942; RV32IZFHMIN-NEXT: srli a0, a0, 17 2943; RV32IZFHMIN-NEXT: slli a1, a1, 10 2944; RV32IZFHMIN-NEXT: slt a0, a1, a0 2945; RV32IZFHMIN-NEXT: ret 2946; 2947; RV64IZFHMIN-LABEL: isnan_d_fpclass: 2948; RV64IZFHMIN: # %bb.0: 2949; RV64IZFHMIN-NEXT: fmv.x.h a0, fa0 2950; RV64IZFHMIN-NEXT: li a1, 31 2951; RV64IZFHMIN-NEXT: slli a0, a0, 49 2952; RV64IZFHMIN-NEXT: srli a0, a0, 49 2953; RV64IZFHMIN-NEXT: slli a1, a1, 10 2954; RV64IZFHMIN-NEXT: slt a0, a1, a0 2955; RV64IZFHMIN-NEXT: ret 2956; 2957; RV32IZHINXMIN-LABEL: isnan_d_fpclass: 2958; RV32IZHINXMIN: # %bb.0: 2959; RV32IZHINXMIN-NEXT: # kill: def $x10_h killed $x10_h def $x10 2960; RV32IZHINXMIN-NEXT: slli a0, a0, 17 2961; RV32IZHINXMIN-NEXT: li a1, 31 2962; RV32IZHINXMIN-NEXT: srli a0, a0, 17 2963; RV32IZHINXMIN-NEXT: slli a1, a1, 10 2964; RV32IZHINXMIN-NEXT: slt a0, a1, a0 2965; RV32IZHINXMIN-NEXT: ret 2966; 2967; RV64IZHINXMIN-LABEL: isnan_d_fpclass: 2968; RV64IZHINXMIN: # %bb.0: 2969; RV64IZHINXMIN-NEXT: # kill: def $x10_h killed $x10_h def $x10 2970; RV64IZHINXMIN-NEXT: slli a0, a0, 49 2971; RV64IZHINXMIN-NEXT: li a1, 31 2972; RV64IZHINXMIN-NEXT: srli a0, a0, 49 2973; RV64IZHINXMIN-NEXT: slli a1, a1, 10 2974; RV64IZHINXMIN-NEXT: slt a0, a1, a0 2975; RV64IZHINXMIN-NEXT: ret 2976 %1 = call i1 @llvm.is.fpclass.f16(half %x, i32 3) ; nan 2977 ret i1 %1 2978} 2979 2980declare half @llvm.tan.f16(half) 2981 2982define half @tan_f16(half %a) nounwind { 2983; RV32IZFH-LABEL: tan_f16: 2984; RV32IZFH: # %bb.0: 2985; RV32IZFH-NEXT: addi sp, sp, -16 2986; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 2987; RV32IZFH-NEXT: fcvt.s.h fa0, fa0 2988; RV32IZFH-NEXT: call tanf 2989; RV32IZFH-NEXT: fcvt.h.s fa0, fa0 2990; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 2991; RV32IZFH-NEXT: addi sp, sp, 16 2992; RV32IZFH-NEXT: ret 2993; 2994; RV64IZFH-LABEL: tan_f16: 2995; RV64IZFH: # %bb.0: 2996; RV64IZFH-NEXT: addi sp, sp, -16 2997; RV64IZFH-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 2998; RV64IZFH-NEXT: fcvt.s.h fa0, fa0 2999; RV64IZFH-NEXT: call tanf 3000; RV64IZFH-NEXT: fcvt.h.s fa0, fa0 3001; RV64IZFH-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 3002; RV64IZFH-NEXT: addi sp, sp, 16 3003; RV64IZFH-NEXT: ret 3004; 3005; RV32IZHINX-LABEL: tan_f16: 3006; RV32IZHINX: # %bb.0: 3007; RV32IZHINX-NEXT: addi sp, sp, -16 3008; RV32IZHINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 3009; RV32IZHINX-NEXT: fcvt.s.h a0, a0 3010; RV32IZHINX-NEXT: call tanf 3011; RV32IZHINX-NEXT: fcvt.h.s a0, a0 3012; RV32IZHINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 3013; RV32IZHINX-NEXT: addi sp, sp, 16 3014; RV32IZHINX-NEXT: ret 3015; 3016; RV64IZHINX-LABEL: tan_f16: 3017; RV64IZHINX: # %bb.0: 3018; RV64IZHINX-NEXT: addi sp, sp, -16 3019; RV64IZHINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 3020; RV64IZHINX-NEXT: fcvt.s.h a0, a0 3021; RV64IZHINX-NEXT: call tanf 3022; RV64IZHINX-NEXT: fcvt.h.s a0, a0 3023; RV64IZHINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 3024; RV64IZHINX-NEXT: addi sp, sp, 16 3025; RV64IZHINX-NEXT: ret 3026; 3027; RV32I-LABEL: tan_f16: 3028; RV32I: # %bb.0: 3029; RV32I-NEXT: addi sp, sp, -16 3030; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 3031; RV32I-NEXT: slli a0, a0, 16 3032; RV32I-NEXT: srli a0, a0, 16 3033; RV32I-NEXT: call __extendhfsf2 3034; RV32I-NEXT: call tanf 3035; RV32I-NEXT: call __truncsfhf2 3036; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 3037; RV32I-NEXT: addi sp, sp, 16 3038; RV32I-NEXT: ret 3039; 3040; RV64I-LABEL: tan_f16: 3041; RV64I: # %bb.0: 3042; RV64I-NEXT: addi sp, sp, -16 3043; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 3044; RV64I-NEXT: slli a0, a0, 48 3045; RV64I-NEXT: srli a0, a0, 48 3046; RV64I-NEXT: call __extendhfsf2 3047; RV64I-NEXT: call tanf 3048; RV64I-NEXT: call __truncsfhf2 3049; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 3050; RV64I-NEXT: addi sp, sp, 16 3051; RV64I-NEXT: ret 3052; 3053; RV32IZFHMIN-LABEL: tan_f16: 3054; RV32IZFHMIN: # %bb.0: 3055; RV32IZFHMIN-NEXT: addi sp, sp, -16 3056; RV32IZFHMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 3057; RV32IZFHMIN-NEXT: fcvt.s.h fa0, fa0 3058; RV32IZFHMIN-NEXT: call tanf 3059; RV32IZFHMIN-NEXT: fcvt.h.s fa0, fa0 3060; RV32IZFHMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 3061; RV32IZFHMIN-NEXT: addi sp, sp, 16 3062; RV32IZFHMIN-NEXT: ret 3063; 3064; RV64IZFHMIN-LABEL: tan_f16: 3065; RV64IZFHMIN: # %bb.0: 3066; RV64IZFHMIN-NEXT: addi sp, sp, -16 3067; RV64IZFHMIN-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 3068; RV64IZFHMIN-NEXT: fcvt.s.h fa0, fa0 3069; RV64IZFHMIN-NEXT: call tanf 3070; RV64IZFHMIN-NEXT: fcvt.h.s fa0, fa0 3071; RV64IZFHMIN-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 3072; RV64IZFHMIN-NEXT: addi sp, sp, 16 3073; RV64IZFHMIN-NEXT: ret 3074; 3075; RV32IZHINXMIN-LABEL: tan_f16: 3076; RV32IZHINXMIN: # %bb.0: 3077; RV32IZHINXMIN-NEXT: addi sp, sp, -16 3078; RV32IZHINXMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 3079; RV32IZHINXMIN-NEXT: fcvt.s.h a0, a0 3080; RV32IZHINXMIN-NEXT: call tanf 3081; RV32IZHINXMIN-NEXT: fcvt.h.s a0, a0 3082; RV32IZHINXMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 3083; RV32IZHINXMIN-NEXT: addi sp, sp, 16 3084; RV32IZHINXMIN-NEXT: ret 3085; 3086; RV64IZHINXMIN-LABEL: tan_f16: 3087; RV64IZHINXMIN: # %bb.0: 3088; RV64IZHINXMIN-NEXT: addi sp, sp, -16 3089; RV64IZHINXMIN-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 3090; RV64IZHINXMIN-NEXT: fcvt.s.h a0, a0 3091; RV64IZHINXMIN-NEXT: call tanf 3092; RV64IZHINXMIN-NEXT: fcvt.h.s a0, a0 3093; RV64IZHINXMIN-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 3094; RV64IZHINXMIN-NEXT: addi sp, sp, 16 3095; RV64IZHINXMIN-NEXT: ret 3096 %1 = call half @llvm.tan.f16(half %a) 3097 ret half %1 3098} 3099 3100declare half @llvm.maximumnum.f16(half, half) 3101 3102define half @maximumnum_half(half %x, half %y) { 3103; CHECKIZFH-LABEL: maximumnum_half: 3104; CHECKIZFH: # %bb.0: 3105; CHECKIZFH-NEXT: fmax.h fa0, fa0, fa1 3106; CHECKIZFH-NEXT: ret 3107; 3108; CHECKIZHINX-LABEL: maximumnum_half: 3109; CHECKIZHINX: # %bb.0: 3110; CHECKIZHINX-NEXT: fmax.h a0, a0, a1 3111; CHECKIZHINX-NEXT: ret 3112; 3113; RV32I-LABEL: maximumnum_half: 3114; RV32I: # %bb.0: 3115; RV32I-NEXT: addi sp, sp, -16 3116; RV32I-NEXT: .cfi_def_cfa_offset 16 3117; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 3118; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill 3119; RV32I-NEXT: sw s1, 4(sp) # 4-byte Folded Spill 3120; RV32I-NEXT: sw s2, 0(sp) # 4-byte Folded Spill 3121; RV32I-NEXT: .cfi_offset ra, -4 3122; RV32I-NEXT: .cfi_offset s0, -8 3123; RV32I-NEXT: .cfi_offset s1, -12 3124; RV32I-NEXT: .cfi_offset s2, -16 3125; RV32I-NEXT: mv s0, a1 3126; RV32I-NEXT: lui a1, 16 3127; RV32I-NEXT: addi s2, a1, -1 3128; RV32I-NEXT: and a0, a0, s2 3129; RV32I-NEXT: call __extendhfsf2 3130; RV32I-NEXT: mv s1, a0 3131; RV32I-NEXT: and a0, s0, s2 3132; RV32I-NEXT: call __extendhfsf2 3133; RV32I-NEXT: mv a1, a0 3134; RV32I-NEXT: mv a0, s1 3135; RV32I-NEXT: call fmaximum_numf 3136; RV32I-NEXT: call __truncsfhf2 3137; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 3138; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload 3139; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload 3140; RV32I-NEXT: lw s2, 0(sp) # 4-byte Folded Reload 3141; RV32I-NEXT: .cfi_restore ra 3142; RV32I-NEXT: .cfi_restore s0 3143; RV32I-NEXT: .cfi_restore s1 3144; RV32I-NEXT: .cfi_restore s2 3145; RV32I-NEXT: addi sp, sp, 16 3146; RV32I-NEXT: .cfi_def_cfa_offset 0 3147; RV32I-NEXT: ret 3148; 3149; RV64I-LABEL: maximumnum_half: 3150; RV64I: # %bb.0: 3151; RV64I-NEXT: addi sp, sp, -32 3152; RV64I-NEXT: .cfi_def_cfa_offset 32 3153; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill 3154; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill 3155; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill 3156; RV64I-NEXT: sd s2, 0(sp) # 8-byte Folded Spill 3157; RV64I-NEXT: .cfi_offset ra, -8 3158; RV64I-NEXT: .cfi_offset s0, -16 3159; RV64I-NEXT: .cfi_offset s1, -24 3160; RV64I-NEXT: .cfi_offset s2, -32 3161; RV64I-NEXT: mv s0, a1 3162; RV64I-NEXT: lui a1, 16 3163; RV64I-NEXT: addiw s2, a1, -1 3164; RV64I-NEXT: and a0, a0, s2 3165; RV64I-NEXT: call __extendhfsf2 3166; RV64I-NEXT: mv s1, a0 3167; RV64I-NEXT: and a0, s0, s2 3168; RV64I-NEXT: call __extendhfsf2 3169; RV64I-NEXT: mv a1, a0 3170; RV64I-NEXT: mv a0, s1 3171; RV64I-NEXT: call fmaximum_numf 3172; RV64I-NEXT: call __truncsfhf2 3173; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload 3174; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload 3175; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload 3176; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload 3177; RV64I-NEXT: .cfi_restore ra 3178; RV64I-NEXT: .cfi_restore s0 3179; RV64I-NEXT: .cfi_restore s1 3180; RV64I-NEXT: .cfi_restore s2 3181; RV64I-NEXT: addi sp, sp, 32 3182; RV64I-NEXT: .cfi_def_cfa_offset 0 3183; RV64I-NEXT: ret 3184; 3185; CHECKIZFHMIN-LABEL: maximumnum_half: 3186; CHECKIZFHMIN: # %bb.0: 3187; CHECKIZFHMIN-NEXT: fcvt.s.h fa5, fa1 3188; CHECKIZFHMIN-NEXT: fcvt.s.h fa4, fa0 3189; CHECKIZFHMIN-NEXT: fmax.s fa5, fa4, fa5 3190; CHECKIZFHMIN-NEXT: fcvt.h.s fa0, fa5 3191; CHECKIZFHMIN-NEXT: ret 3192; 3193; CHECKIZHINXMIN-LABEL: maximumnum_half: 3194; CHECKIZHINXMIN: # %bb.0: 3195; CHECKIZHINXMIN-NEXT: fcvt.s.h a1, a1 3196; CHECKIZHINXMIN-NEXT: fcvt.s.h a0, a0 3197; CHECKIZHINXMIN-NEXT: fmax.s a0, a0, a1 3198; CHECKIZHINXMIN-NEXT: fcvt.h.s a0, a0 3199; CHECKIZHINXMIN-NEXT: ret 3200 %z = call half @llvm.maximumnum.f16(half %x, half %y) 3201 ret half %z 3202} 3203 3204declare half @llvm.minimumnum.f16(half, half) 3205 3206define half @minimumnum_half(half %x, half %y) { 3207; CHECKIZFH-LABEL: minimumnum_half: 3208; CHECKIZFH: # %bb.0: 3209; CHECKIZFH-NEXT: fmin.h fa0, fa0, fa1 3210; CHECKIZFH-NEXT: ret 3211; 3212; CHECKIZHINX-LABEL: minimumnum_half: 3213; CHECKIZHINX: # %bb.0: 3214; CHECKIZHINX-NEXT: fmin.h a0, a0, a1 3215; CHECKIZHINX-NEXT: ret 3216; 3217; RV32I-LABEL: minimumnum_half: 3218; RV32I: # %bb.0: 3219; RV32I-NEXT: addi sp, sp, -16 3220; RV32I-NEXT: .cfi_def_cfa_offset 16 3221; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 3222; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill 3223; RV32I-NEXT: sw s1, 4(sp) # 4-byte Folded Spill 3224; RV32I-NEXT: sw s2, 0(sp) # 4-byte Folded Spill 3225; RV32I-NEXT: .cfi_offset ra, -4 3226; RV32I-NEXT: .cfi_offset s0, -8 3227; RV32I-NEXT: .cfi_offset s1, -12 3228; RV32I-NEXT: .cfi_offset s2, -16 3229; RV32I-NEXT: mv s0, a1 3230; RV32I-NEXT: lui a1, 16 3231; RV32I-NEXT: addi s2, a1, -1 3232; RV32I-NEXT: and a0, a0, s2 3233; RV32I-NEXT: call __extendhfsf2 3234; RV32I-NEXT: mv s1, a0 3235; RV32I-NEXT: and a0, s0, s2 3236; RV32I-NEXT: call __extendhfsf2 3237; RV32I-NEXT: mv a1, a0 3238; RV32I-NEXT: mv a0, s1 3239; RV32I-NEXT: call fminimum_numf 3240; RV32I-NEXT: call __truncsfhf2 3241; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 3242; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload 3243; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload 3244; RV32I-NEXT: lw s2, 0(sp) # 4-byte Folded Reload 3245; RV32I-NEXT: .cfi_restore ra 3246; RV32I-NEXT: .cfi_restore s0 3247; RV32I-NEXT: .cfi_restore s1 3248; RV32I-NEXT: .cfi_restore s2 3249; RV32I-NEXT: addi sp, sp, 16 3250; RV32I-NEXT: .cfi_def_cfa_offset 0 3251; RV32I-NEXT: ret 3252; 3253; RV64I-LABEL: minimumnum_half: 3254; RV64I: # %bb.0: 3255; RV64I-NEXT: addi sp, sp, -32 3256; RV64I-NEXT: .cfi_def_cfa_offset 32 3257; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill 3258; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill 3259; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill 3260; RV64I-NEXT: sd s2, 0(sp) # 8-byte Folded Spill 3261; RV64I-NEXT: .cfi_offset ra, -8 3262; RV64I-NEXT: .cfi_offset s0, -16 3263; RV64I-NEXT: .cfi_offset s1, -24 3264; RV64I-NEXT: .cfi_offset s2, -32 3265; RV64I-NEXT: mv s0, a1 3266; RV64I-NEXT: lui a1, 16 3267; RV64I-NEXT: addiw s2, a1, -1 3268; RV64I-NEXT: and a0, a0, s2 3269; RV64I-NEXT: call __extendhfsf2 3270; RV64I-NEXT: mv s1, a0 3271; RV64I-NEXT: and a0, s0, s2 3272; RV64I-NEXT: call __extendhfsf2 3273; RV64I-NEXT: mv a1, a0 3274; RV64I-NEXT: mv a0, s1 3275; RV64I-NEXT: call fminimum_numf 3276; RV64I-NEXT: call __truncsfhf2 3277; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload 3278; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload 3279; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload 3280; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload 3281; RV64I-NEXT: .cfi_restore ra 3282; RV64I-NEXT: .cfi_restore s0 3283; RV64I-NEXT: .cfi_restore s1 3284; RV64I-NEXT: .cfi_restore s2 3285; RV64I-NEXT: addi sp, sp, 32 3286; RV64I-NEXT: .cfi_def_cfa_offset 0 3287; RV64I-NEXT: ret 3288; 3289; CHECKIZFHMIN-LABEL: minimumnum_half: 3290; CHECKIZFHMIN: # %bb.0: 3291; CHECKIZFHMIN-NEXT: fcvt.s.h fa5, fa1 3292; CHECKIZFHMIN-NEXT: fcvt.s.h fa4, fa0 3293; CHECKIZFHMIN-NEXT: fmin.s fa5, fa4, fa5 3294; CHECKIZFHMIN-NEXT: fcvt.h.s fa0, fa5 3295; CHECKIZFHMIN-NEXT: ret 3296; 3297; CHECKIZHINXMIN-LABEL: minimumnum_half: 3298; CHECKIZHINXMIN: # %bb.0: 3299; CHECKIZHINXMIN-NEXT: fcvt.s.h a1, a1 3300; CHECKIZHINXMIN-NEXT: fcvt.s.h a0, a0 3301; CHECKIZHINXMIN-NEXT: fmin.s a0, a0, a1 3302; CHECKIZHINXMIN-NEXT: fcvt.h.s a0, a0 3303; CHECKIZHINXMIN-NEXT: ret 3304 %z = call half @llvm.minimumnum.f16(half %x, half %y) 3305 ret half %z 3306} 3307 3308define half @ldexp_half(half %x, i32 signext %y) nounwind { 3309; RV32IZFH-LABEL: ldexp_half: 3310; RV32IZFH: # %bb.0: 3311; RV32IZFH-NEXT: addi sp, sp, -16 3312; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 3313; RV32IZFH-NEXT: fcvt.s.h fa0, fa0 3314; RV32IZFH-NEXT: call ldexpf 3315; RV32IZFH-NEXT: fcvt.h.s fa0, fa0 3316; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 3317; RV32IZFH-NEXT: addi sp, sp, 16 3318; RV32IZFH-NEXT: ret 3319; 3320; RV64IZFH-LABEL: ldexp_half: 3321; RV64IZFH: # %bb.0: 3322; RV64IZFH-NEXT: addi sp, sp, -16 3323; RV64IZFH-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 3324; RV64IZFH-NEXT: fcvt.s.h fa0, fa0 3325; RV64IZFH-NEXT: call ldexpf 3326; RV64IZFH-NEXT: fcvt.h.s fa0, fa0 3327; RV64IZFH-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 3328; RV64IZFH-NEXT: addi sp, sp, 16 3329; RV64IZFH-NEXT: ret 3330; 3331; RV32IZHINX-LABEL: ldexp_half: 3332; RV32IZHINX: # %bb.0: 3333; RV32IZHINX-NEXT: addi sp, sp, -16 3334; RV32IZHINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 3335; RV32IZHINX-NEXT: fcvt.s.h a0, a0 3336; RV32IZHINX-NEXT: call ldexpf 3337; RV32IZHINX-NEXT: fcvt.h.s a0, a0 3338; RV32IZHINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 3339; RV32IZHINX-NEXT: addi sp, sp, 16 3340; RV32IZHINX-NEXT: ret 3341; 3342; RV64IZHINX-LABEL: ldexp_half: 3343; RV64IZHINX: # %bb.0: 3344; RV64IZHINX-NEXT: addi sp, sp, -16 3345; RV64IZHINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 3346; RV64IZHINX-NEXT: fcvt.s.h a0, a0 3347; RV64IZHINX-NEXT: call ldexpf 3348; RV64IZHINX-NEXT: fcvt.h.s a0, a0 3349; RV64IZHINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 3350; RV64IZHINX-NEXT: addi sp, sp, 16 3351; RV64IZHINX-NEXT: ret 3352; 3353; RV32I-LABEL: ldexp_half: 3354; RV32I: # %bb.0: 3355; RV32I-NEXT: addi sp, sp, -16 3356; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 3357; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill 3358; RV32I-NEXT: mv s0, a1 3359; RV32I-NEXT: slli a0, a0, 16 3360; RV32I-NEXT: srli a0, a0, 16 3361; RV32I-NEXT: call __extendhfsf2 3362; RV32I-NEXT: mv a1, s0 3363; RV32I-NEXT: call ldexpf 3364; RV32I-NEXT: call __truncsfhf2 3365; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 3366; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload 3367; RV32I-NEXT: addi sp, sp, 16 3368; RV32I-NEXT: ret 3369; 3370; RV64I-LABEL: ldexp_half: 3371; RV64I: # %bb.0: 3372; RV64I-NEXT: addi sp, sp, -16 3373; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 3374; RV64I-NEXT: sd s0, 0(sp) # 8-byte Folded Spill 3375; RV64I-NEXT: mv s0, a1 3376; RV64I-NEXT: slli a0, a0, 48 3377; RV64I-NEXT: srli a0, a0, 48 3378; RV64I-NEXT: call __extendhfsf2 3379; RV64I-NEXT: mv a1, s0 3380; RV64I-NEXT: call ldexpf 3381; RV64I-NEXT: call __truncsfhf2 3382; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 3383; RV64I-NEXT: ld s0, 0(sp) # 8-byte Folded Reload 3384; RV64I-NEXT: addi sp, sp, 16 3385; RV64I-NEXT: ret 3386; 3387; RV32IZFHMIN-LABEL: ldexp_half: 3388; RV32IZFHMIN: # %bb.0: 3389; RV32IZFHMIN-NEXT: addi sp, sp, -16 3390; RV32IZFHMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 3391; RV32IZFHMIN-NEXT: fcvt.s.h fa0, fa0 3392; RV32IZFHMIN-NEXT: call ldexpf 3393; RV32IZFHMIN-NEXT: fcvt.h.s fa0, fa0 3394; RV32IZFHMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 3395; RV32IZFHMIN-NEXT: addi sp, sp, 16 3396; RV32IZFHMIN-NEXT: ret 3397; 3398; RV64IZFHMIN-LABEL: ldexp_half: 3399; RV64IZFHMIN: # %bb.0: 3400; RV64IZFHMIN-NEXT: addi sp, sp, -16 3401; RV64IZFHMIN-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 3402; RV64IZFHMIN-NEXT: fcvt.s.h fa0, fa0 3403; RV64IZFHMIN-NEXT: call ldexpf 3404; RV64IZFHMIN-NEXT: fcvt.h.s fa0, fa0 3405; RV64IZFHMIN-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 3406; RV64IZFHMIN-NEXT: addi sp, sp, 16 3407; RV64IZFHMIN-NEXT: ret 3408; 3409; RV32IZHINXMIN-LABEL: ldexp_half: 3410; RV32IZHINXMIN: # %bb.0: 3411; RV32IZHINXMIN-NEXT: addi sp, sp, -16 3412; RV32IZHINXMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 3413; RV32IZHINXMIN-NEXT: fcvt.s.h a0, a0 3414; RV32IZHINXMIN-NEXT: call ldexpf 3415; RV32IZHINXMIN-NEXT: fcvt.h.s a0, a0 3416; RV32IZHINXMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 3417; RV32IZHINXMIN-NEXT: addi sp, sp, 16 3418; RV32IZHINXMIN-NEXT: ret 3419; 3420; RV64IZHINXMIN-LABEL: ldexp_half: 3421; RV64IZHINXMIN: # %bb.0: 3422; RV64IZHINXMIN-NEXT: addi sp, sp, -16 3423; RV64IZHINXMIN-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 3424; RV64IZHINXMIN-NEXT: fcvt.s.h a0, a0 3425; RV64IZHINXMIN-NEXT: call ldexpf 3426; RV64IZHINXMIN-NEXT: fcvt.h.s a0, a0 3427; RV64IZHINXMIN-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 3428; RV64IZHINXMIN-NEXT: addi sp, sp, 16 3429; RV64IZHINXMIN-NEXT: ret 3430 %z = call half @llvm.ldexp.f16.i32(half %x, i32 %y) 3431 ret half %z 3432} 3433 3434define {half, i32} @frexp_half(half %x) nounwind { 3435; RV32IZFH-LABEL: frexp_half: 3436; RV32IZFH: # %bb.0: 3437; RV32IZFH-NEXT: addi sp, sp, -16 3438; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 3439; RV32IZFH-NEXT: fcvt.s.h fa0, fa0 3440; RV32IZFH-NEXT: addi a0, sp, 8 3441; RV32IZFH-NEXT: call frexpf 3442; RV32IZFH-NEXT: lw a0, 8(sp) 3443; RV32IZFH-NEXT: fcvt.h.s fa0, fa0 3444; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 3445; RV32IZFH-NEXT: addi sp, sp, 16 3446; RV32IZFH-NEXT: ret 3447; 3448; RV64IZFH-LABEL: frexp_half: 3449; RV64IZFH: # %bb.0: 3450; RV64IZFH-NEXT: addi sp, sp, -16 3451; RV64IZFH-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 3452; RV64IZFH-NEXT: fcvt.s.h fa0, fa0 3453; RV64IZFH-NEXT: mv a0, sp 3454; RV64IZFH-NEXT: call frexpf 3455; RV64IZFH-NEXT: ld a0, 0(sp) 3456; RV64IZFH-NEXT: fcvt.h.s fa0, fa0 3457; RV64IZFH-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 3458; RV64IZFH-NEXT: addi sp, sp, 16 3459; RV64IZFH-NEXT: ret 3460; 3461; RV32IZHINX-LABEL: frexp_half: 3462; RV32IZHINX: # %bb.0: 3463; RV32IZHINX-NEXT: addi sp, sp, -16 3464; RV32IZHINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 3465; RV32IZHINX-NEXT: fcvt.s.h a0, a0 3466; RV32IZHINX-NEXT: addi a1, sp, 8 3467; RV32IZHINX-NEXT: call frexpf 3468; RV32IZHINX-NEXT: lw a1, 8(sp) 3469; RV32IZHINX-NEXT: fcvt.h.s a0, a0 3470; RV32IZHINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 3471; RV32IZHINX-NEXT: addi sp, sp, 16 3472; RV32IZHINX-NEXT: ret 3473; 3474; RV64IZHINX-LABEL: frexp_half: 3475; RV64IZHINX: # %bb.0: 3476; RV64IZHINX-NEXT: addi sp, sp, -16 3477; RV64IZHINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 3478; RV64IZHINX-NEXT: fcvt.s.h a0, a0 3479; RV64IZHINX-NEXT: mv a1, sp 3480; RV64IZHINX-NEXT: call frexpf 3481; RV64IZHINX-NEXT: ld a1, 0(sp) 3482; RV64IZHINX-NEXT: fcvt.h.s a0, a0 3483; RV64IZHINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 3484; RV64IZHINX-NEXT: addi sp, sp, 16 3485; RV64IZHINX-NEXT: ret 3486; 3487; RV32I-LABEL: frexp_half: 3488; RV32I: # %bb.0: 3489; RV32I-NEXT: addi sp, sp, -16 3490; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 3491; RV32I-NEXT: slli a0, a0, 16 3492; RV32I-NEXT: srli a0, a0, 16 3493; RV32I-NEXT: call __extendhfsf2 3494; RV32I-NEXT: addi a1, sp, 8 3495; RV32I-NEXT: call frexpf 3496; RV32I-NEXT: call __truncsfhf2 3497; RV32I-NEXT: lw a1, 8(sp) 3498; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 3499; RV32I-NEXT: addi sp, sp, 16 3500; RV32I-NEXT: ret 3501; 3502; RV64I-LABEL: frexp_half: 3503; RV64I: # %bb.0: 3504; RV64I-NEXT: addi sp, sp, -16 3505; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 3506; RV64I-NEXT: slli a0, a0, 48 3507; RV64I-NEXT: srli a0, a0, 48 3508; RV64I-NEXT: call __extendhfsf2 3509; RV64I-NEXT: addi a1, sp, 4 3510; RV64I-NEXT: call frexpf 3511; RV64I-NEXT: call __truncsfhf2 3512; RV64I-NEXT: lw a1, 4(sp) 3513; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 3514; RV64I-NEXT: addi sp, sp, 16 3515; RV64I-NEXT: ret 3516; 3517; RV32IZFHMIN-LABEL: frexp_half: 3518; RV32IZFHMIN: # %bb.0: 3519; RV32IZFHMIN-NEXT: addi sp, sp, -16 3520; RV32IZFHMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 3521; RV32IZFHMIN-NEXT: fcvt.s.h fa0, fa0 3522; RV32IZFHMIN-NEXT: addi a0, sp, 8 3523; RV32IZFHMIN-NEXT: call frexpf 3524; RV32IZFHMIN-NEXT: lw a0, 8(sp) 3525; RV32IZFHMIN-NEXT: fcvt.h.s fa0, fa0 3526; RV32IZFHMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 3527; RV32IZFHMIN-NEXT: addi sp, sp, 16 3528; RV32IZFHMIN-NEXT: ret 3529; 3530; RV64IZFHMIN-LABEL: frexp_half: 3531; RV64IZFHMIN: # %bb.0: 3532; RV64IZFHMIN-NEXT: addi sp, sp, -16 3533; RV64IZFHMIN-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 3534; RV64IZFHMIN-NEXT: fcvt.s.h fa0, fa0 3535; RV64IZFHMIN-NEXT: mv a0, sp 3536; RV64IZFHMIN-NEXT: call frexpf 3537; RV64IZFHMIN-NEXT: ld a0, 0(sp) 3538; RV64IZFHMIN-NEXT: fcvt.h.s fa0, fa0 3539; RV64IZFHMIN-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 3540; RV64IZFHMIN-NEXT: addi sp, sp, 16 3541; RV64IZFHMIN-NEXT: ret 3542; 3543; RV32IZHINXMIN-LABEL: frexp_half: 3544; RV32IZHINXMIN: # %bb.0: 3545; RV32IZHINXMIN-NEXT: addi sp, sp, -16 3546; RV32IZHINXMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 3547; RV32IZHINXMIN-NEXT: fcvt.s.h a0, a0 3548; RV32IZHINXMIN-NEXT: addi a1, sp, 8 3549; RV32IZHINXMIN-NEXT: call frexpf 3550; RV32IZHINXMIN-NEXT: lw a1, 8(sp) 3551; RV32IZHINXMIN-NEXT: fcvt.h.s a0, a0 3552; RV32IZHINXMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 3553; RV32IZHINXMIN-NEXT: addi sp, sp, 16 3554; RV32IZHINXMIN-NEXT: ret 3555; 3556; RV64IZHINXMIN-LABEL: frexp_half: 3557; RV64IZHINXMIN: # %bb.0: 3558; RV64IZHINXMIN-NEXT: addi sp, sp, -16 3559; RV64IZHINXMIN-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 3560; RV64IZHINXMIN-NEXT: fcvt.s.h a0, a0 3561; RV64IZHINXMIN-NEXT: mv a1, sp 3562; RV64IZHINXMIN-NEXT: call frexpf 3563; RV64IZHINXMIN-NEXT: ld a1, 0(sp) 3564; RV64IZHINXMIN-NEXT: fcvt.h.s a0, a0 3565; RV64IZHINXMIN-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 3566; RV64IZHINXMIN-NEXT: addi sp, sp, 16 3567; RV64IZHINXMIN-NEXT: ret 3568 %a = call {half, i32} @llvm.frexp.f16.i32(half %x) 3569 ret {half, i32} %a 3570} 3571 3572define half @asin_f16(half %a) nounwind { 3573; RV32IZFH-LABEL: asin_f16: 3574; RV32IZFH: # %bb.0: 3575; RV32IZFH-NEXT: addi sp, sp, -16 3576; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 3577; RV32IZFH-NEXT: fcvt.s.h fa0, fa0 3578; RV32IZFH-NEXT: call asinf 3579; RV32IZFH-NEXT: fcvt.h.s fa0, fa0 3580; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 3581; RV32IZFH-NEXT: addi sp, sp, 16 3582; RV32IZFH-NEXT: ret 3583; 3584; RV64IZFH-LABEL: asin_f16: 3585; RV64IZFH: # %bb.0: 3586; RV64IZFH-NEXT: addi sp, sp, -16 3587; RV64IZFH-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 3588; RV64IZFH-NEXT: fcvt.s.h fa0, fa0 3589; RV64IZFH-NEXT: call asinf 3590; RV64IZFH-NEXT: fcvt.h.s fa0, fa0 3591; RV64IZFH-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 3592; RV64IZFH-NEXT: addi sp, sp, 16 3593; RV64IZFH-NEXT: ret 3594; 3595; RV32IZHINX-LABEL: asin_f16: 3596; RV32IZHINX: # %bb.0: 3597; RV32IZHINX-NEXT: addi sp, sp, -16 3598; RV32IZHINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 3599; RV32IZHINX-NEXT: fcvt.s.h a0, a0 3600; RV32IZHINX-NEXT: call asinf 3601; RV32IZHINX-NEXT: fcvt.h.s a0, a0 3602; RV32IZHINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 3603; RV32IZHINX-NEXT: addi sp, sp, 16 3604; RV32IZHINX-NEXT: ret 3605; 3606; RV64IZHINX-LABEL: asin_f16: 3607; RV64IZHINX: # %bb.0: 3608; RV64IZHINX-NEXT: addi sp, sp, -16 3609; RV64IZHINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 3610; RV64IZHINX-NEXT: fcvt.s.h a0, a0 3611; RV64IZHINX-NEXT: call asinf 3612; RV64IZHINX-NEXT: fcvt.h.s a0, a0 3613; RV64IZHINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 3614; RV64IZHINX-NEXT: addi sp, sp, 16 3615; RV64IZHINX-NEXT: ret 3616; 3617; RV32I-LABEL: asin_f16: 3618; RV32I: # %bb.0: 3619; RV32I-NEXT: addi sp, sp, -16 3620; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 3621; RV32I-NEXT: slli a0, a0, 16 3622; RV32I-NEXT: srli a0, a0, 16 3623; RV32I-NEXT: call __extendhfsf2 3624; RV32I-NEXT: call asinf 3625; RV32I-NEXT: call __truncsfhf2 3626; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 3627; RV32I-NEXT: addi sp, sp, 16 3628; RV32I-NEXT: ret 3629; 3630; RV64I-LABEL: asin_f16: 3631; RV64I: # %bb.0: 3632; RV64I-NEXT: addi sp, sp, -16 3633; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 3634; RV64I-NEXT: slli a0, a0, 48 3635; RV64I-NEXT: srli a0, a0, 48 3636; RV64I-NEXT: call __extendhfsf2 3637; RV64I-NEXT: call asinf 3638; RV64I-NEXT: call __truncsfhf2 3639; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 3640; RV64I-NEXT: addi sp, sp, 16 3641; RV64I-NEXT: ret 3642; 3643; RV32IZFHMIN-LABEL: asin_f16: 3644; RV32IZFHMIN: # %bb.0: 3645; RV32IZFHMIN-NEXT: addi sp, sp, -16 3646; RV32IZFHMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 3647; RV32IZFHMIN-NEXT: fcvt.s.h fa0, fa0 3648; RV32IZFHMIN-NEXT: call asinf 3649; RV32IZFHMIN-NEXT: fcvt.h.s fa0, fa0 3650; RV32IZFHMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 3651; RV32IZFHMIN-NEXT: addi sp, sp, 16 3652; RV32IZFHMIN-NEXT: ret 3653; 3654; RV64IZFHMIN-LABEL: asin_f16: 3655; RV64IZFHMIN: # %bb.0: 3656; RV64IZFHMIN-NEXT: addi sp, sp, -16 3657; RV64IZFHMIN-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 3658; RV64IZFHMIN-NEXT: fcvt.s.h fa0, fa0 3659; RV64IZFHMIN-NEXT: call asinf 3660; RV64IZFHMIN-NEXT: fcvt.h.s fa0, fa0 3661; RV64IZFHMIN-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 3662; RV64IZFHMIN-NEXT: addi sp, sp, 16 3663; RV64IZFHMIN-NEXT: ret 3664; 3665; RV32IZHINXMIN-LABEL: asin_f16: 3666; RV32IZHINXMIN: # %bb.0: 3667; RV32IZHINXMIN-NEXT: addi sp, sp, -16 3668; RV32IZHINXMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 3669; RV32IZHINXMIN-NEXT: fcvt.s.h a0, a0 3670; RV32IZHINXMIN-NEXT: call asinf 3671; RV32IZHINXMIN-NEXT: fcvt.h.s a0, a0 3672; RV32IZHINXMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 3673; RV32IZHINXMIN-NEXT: addi sp, sp, 16 3674; RV32IZHINXMIN-NEXT: ret 3675; 3676; RV64IZHINXMIN-LABEL: asin_f16: 3677; RV64IZHINXMIN: # %bb.0: 3678; RV64IZHINXMIN-NEXT: addi sp, sp, -16 3679; RV64IZHINXMIN-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 3680; RV64IZHINXMIN-NEXT: fcvt.s.h a0, a0 3681; RV64IZHINXMIN-NEXT: call asinf 3682; RV64IZHINXMIN-NEXT: fcvt.h.s a0, a0 3683; RV64IZHINXMIN-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 3684; RV64IZHINXMIN-NEXT: addi sp, sp, 16 3685; RV64IZHINXMIN-NEXT: ret 3686 %1 = call half @llvm.asin.f16(half %a) 3687 ret half %1 3688} 3689 3690define half @acos_f16(half %a) nounwind { 3691; RV32IZFH-LABEL: acos_f16: 3692; RV32IZFH: # %bb.0: 3693; RV32IZFH-NEXT: addi sp, sp, -16 3694; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 3695; RV32IZFH-NEXT: fcvt.s.h fa0, fa0 3696; RV32IZFH-NEXT: call acosf 3697; RV32IZFH-NEXT: fcvt.h.s fa0, fa0 3698; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 3699; RV32IZFH-NEXT: addi sp, sp, 16 3700; RV32IZFH-NEXT: ret 3701; 3702; RV64IZFH-LABEL: acos_f16: 3703; RV64IZFH: # %bb.0: 3704; RV64IZFH-NEXT: addi sp, sp, -16 3705; RV64IZFH-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 3706; RV64IZFH-NEXT: fcvt.s.h fa0, fa0 3707; RV64IZFH-NEXT: call acosf 3708; RV64IZFH-NEXT: fcvt.h.s fa0, fa0 3709; RV64IZFH-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 3710; RV64IZFH-NEXT: addi sp, sp, 16 3711; RV64IZFH-NEXT: ret 3712; 3713; RV32IZHINX-LABEL: acos_f16: 3714; RV32IZHINX: # %bb.0: 3715; RV32IZHINX-NEXT: addi sp, sp, -16 3716; RV32IZHINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 3717; RV32IZHINX-NEXT: fcvt.s.h a0, a0 3718; RV32IZHINX-NEXT: call acosf 3719; RV32IZHINX-NEXT: fcvt.h.s a0, a0 3720; RV32IZHINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 3721; RV32IZHINX-NEXT: addi sp, sp, 16 3722; RV32IZHINX-NEXT: ret 3723; 3724; RV64IZHINX-LABEL: acos_f16: 3725; RV64IZHINX: # %bb.0: 3726; RV64IZHINX-NEXT: addi sp, sp, -16 3727; RV64IZHINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 3728; RV64IZHINX-NEXT: fcvt.s.h a0, a0 3729; RV64IZHINX-NEXT: call acosf 3730; RV64IZHINX-NEXT: fcvt.h.s a0, a0 3731; RV64IZHINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 3732; RV64IZHINX-NEXT: addi sp, sp, 16 3733; RV64IZHINX-NEXT: ret 3734; 3735; RV32I-LABEL: acos_f16: 3736; RV32I: # %bb.0: 3737; RV32I-NEXT: addi sp, sp, -16 3738; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 3739; RV32I-NEXT: slli a0, a0, 16 3740; RV32I-NEXT: srli a0, a0, 16 3741; RV32I-NEXT: call __extendhfsf2 3742; RV32I-NEXT: call acosf 3743; RV32I-NEXT: call __truncsfhf2 3744; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 3745; RV32I-NEXT: addi sp, sp, 16 3746; RV32I-NEXT: ret 3747; 3748; RV64I-LABEL: acos_f16: 3749; RV64I: # %bb.0: 3750; RV64I-NEXT: addi sp, sp, -16 3751; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 3752; RV64I-NEXT: slli a0, a0, 48 3753; RV64I-NEXT: srli a0, a0, 48 3754; RV64I-NEXT: call __extendhfsf2 3755; RV64I-NEXT: call acosf 3756; RV64I-NEXT: call __truncsfhf2 3757; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 3758; RV64I-NEXT: addi sp, sp, 16 3759; RV64I-NEXT: ret 3760; 3761; RV32IZFHMIN-LABEL: acos_f16: 3762; RV32IZFHMIN: # %bb.0: 3763; RV32IZFHMIN-NEXT: addi sp, sp, -16 3764; RV32IZFHMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 3765; RV32IZFHMIN-NEXT: fcvt.s.h fa0, fa0 3766; RV32IZFHMIN-NEXT: call acosf 3767; RV32IZFHMIN-NEXT: fcvt.h.s fa0, fa0 3768; RV32IZFHMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 3769; RV32IZFHMIN-NEXT: addi sp, sp, 16 3770; RV32IZFHMIN-NEXT: ret 3771; 3772; RV64IZFHMIN-LABEL: acos_f16: 3773; RV64IZFHMIN: # %bb.0: 3774; RV64IZFHMIN-NEXT: addi sp, sp, -16 3775; RV64IZFHMIN-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 3776; RV64IZFHMIN-NEXT: fcvt.s.h fa0, fa0 3777; RV64IZFHMIN-NEXT: call acosf 3778; RV64IZFHMIN-NEXT: fcvt.h.s fa0, fa0 3779; RV64IZFHMIN-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 3780; RV64IZFHMIN-NEXT: addi sp, sp, 16 3781; RV64IZFHMIN-NEXT: ret 3782; 3783; RV32IZHINXMIN-LABEL: acos_f16: 3784; RV32IZHINXMIN: # %bb.0: 3785; RV32IZHINXMIN-NEXT: addi sp, sp, -16 3786; RV32IZHINXMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 3787; RV32IZHINXMIN-NEXT: fcvt.s.h a0, a0 3788; RV32IZHINXMIN-NEXT: call acosf 3789; RV32IZHINXMIN-NEXT: fcvt.h.s a0, a0 3790; RV32IZHINXMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 3791; RV32IZHINXMIN-NEXT: addi sp, sp, 16 3792; RV32IZHINXMIN-NEXT: ret 3793; 3794; RV64IZHINXMIN-LABEL: acos_f16: 3795; RV64IZHINXMIN: # %bb.0: 3796; RV64IZHINXMIN-NEXT: addi sp, sp, -16 3797; RV64IZHINXMIN-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 3798; RV64IZHINXMIN-NEXT: fcvt.s.h a0, a0 3799; RV64IZHINXMIN-NEXT: call acosf 3800; RV64IZHINXMIN-NEXT: fcvt.h.s a0, a0 3801; RV64IZHINXMIN-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 3802; RV64IZHINXMIN-NEXT: addi sp, sp, 16 3803; RV64IZHINXMIN-NEXT: ret 3804 %1 = call half @llvm.acos.f16(half %a) 3805 ret half %1 3806} 3807 3808define half @atan_f16(half %a) nounwind { 3809; RV32IZFH-LABEL: atan_f16: 3810; RV32IZFH: # %bb.0: 3811; RV32IZFH-NEXT: addi sp, sp, -16 3812; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 3813; RV32IZFH-NEXT: fcvt.s.h fa0, fa0 3814; RV32IZFH-NEXT: call atanf 3815; RV32IZFH-NEXT: fcvt.h.s fa0, fa0 3816; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 3817; RV32IZFH-NEXT: addi sp, sp, 16 3818; RV32IZFH-NEXT: ret 3819; 3820; RV64IZFH-LABEL: atan_f16: 3821; RV64IZFH: # %bb.0: 3822; RV64IZFH-NEXT: addi sp, sp, -16 3823; RV64IZFH-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 3824; RV64IZFH-NEXT: fcvt.s.h fa0, fa0 3825; RV64IZFH-NEXT: call atanf 3826; RV64IZFH-NEXT: fcvt.h.s fa0, fa0 3827; RV64IZFH-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 3828; RV64IZFH-NEXT: addi sp, sp, 16 3829; RV64IZFH-NEXT: ret 3830; 3831; RV32IZHINX-LABEL: atan_f16: 3832; RV32IZHINX: # %bb.0: 3833; RV32IZHINX-NEXT: addi sp, sp, -16 3834; RV32IZHINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 3835; RV32IZHINX-NEXT: fcvt.s.h a0, a0 3836; RV32IZHINX-NEXT: call atanf 3837; RV32IZHINX-NEXT: fcvt.h.s a0, a0 3838; RV32IZHINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 3839; RV32IZHINX-NEXT: addi sp, sp, 16 3840; RV32IZHINX-NEXT: ret 3841; 3842; RV64IZHINX-LABEL: atan_f16: 3843; RV64IZHINX: # %bb.0: 3844; RV64IZHINX-NEXT: addi sp, sp, -16 3845; RV64IZHINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 3846; RV64IZHINX-NEXT: fcvt.s.h a0, a0 3847; RV64IZHINX-NEXT: call atanf 3848; RV64IZHINX-NEXT: fcvt.h.s a0, a0 3849; RV64IZHINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 3850; RV64IZHINX-NEXT: addi sp, sp, 16 3851; RV64IZHINX-NEXT: ret 3852; 3853; RV32I-LABEL: atan_f16: 3854; RV32I: # %bb.0: 3855; RV32I-NEXT: addi sp, sp, -16 3856; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 3857; RV32I-NEXT: slli a0, a0, 16 3858; RV32I-NEXT: srli a0, a0, 16 3859; RV32I-NEXT: call __extendhfsf2 3860; RV32I-NEXT: call atanf 3861; RV32I-NEXT: call __truncsfhf2 3862; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 3863; RV32I-NEXT: addi sp, sp, 16 3864; RV32I-NEXT: ret 3865; 3866; RV64I-LABEL: atan_f16: 3867; RV64I: # %bb.0: 3868; RV64I-NEXT: addi sp, sp, -16 3869; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 3870; RV64I-NEXT: slli a0, a0, 48 3871; RV64I-NEXT: srli a0, a0, 48 3872; RV64I-NEXT: call __extendhfsf2 3873; RV64I-NEXT: call atanf 3874; RV64I-NEXT: call __truncsfhf2 3875; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 3876; RV64I-NEXT: addi sp, sp, 16 3877; RV64I-NEXT: ret 3878; 3879; RV32IZFHMIN-LABEL: atan_f16: 3880; RV32IZFHMIN: # %bb.0: 3881; RV32IZFHMIN-NEXT: addi sp, sp, -16 3882; RV32IZFHMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 3883; RV32IZFHMIN-NEXT: fcvt.s.h fa0, fa0 3884; RV32IZFHMIN-NEXT: call atanf 3885; RV32IZFHMIN-NEXT: fcvt.h.s fa0, fa0 3886; RV32IZFHMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 3887; RV32IZFHMIN-NEXT: addi sp, sp, 16 3888; RV32IZFHMIN-NEXT: ret 3889; 3890; RV64IZFHMIN-LABEL: atan_f16: 3891; RV64IZFHMIN: # %bb.0: 3892; RV64IZFHMIN-NEXT: addi sp, sp, -16 3893; RV64IZFHMIN-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 3894; RV64IZFHMIN-NEXT: fcvt.s.h fa0, fa0 3895; RV64IZFHMIN-NEXT: call atanf 3896; RV64IZFHMIN-NEXT: fcvt.h.s fa0, fa0 3897; RV64IZFHMIN-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 3898; RV64IZFHMIN-NEXT: addi sp, sp, 16 3899; RV64IZFHMIN-NEXT: ret 3900; 3901; RV32IZHINXMIN-LABEL: atan_f16: 3902; RV32IZHINXMIN: # %bb.0: 3903; RV32IZHINXMIN-NEXT: addi sp, sp, -16 3904; RV32IZHINXMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 3905; RV32IZHINXMIN-NEXT: fcvt.s.h a0, a0 3906; RV32IZHINXMIN-NEXT: call atanf 3907; RV32IZHINXMIN-NEXT: fcvt.h.s a0, a0 3908; RV32IZHINXMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 3909; RV32IZHINXMIN-NEXT: addi sp, sp, 16 3910; RV32IZHINXMIN-NEXT: ret 3911; 3912; RV64IZHINXMIN-LABEL: atan_f16: 3913; RV64IZHINXMIN: # %bb.0: 3914; RV64IZHINXMIN-NEXT: addi sp, sp, -16 3915; RV64IZHINXMIN-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 3916; RV64IZHINXMIN-NEXT: fcvt.s.h a0, a0 3917; RV64IZHINXMIN-NEXT: call atanf 3918; RV64IZHINXMIN-NEXT: fcvt.h.s a0, a0 3919; RV64IZHINXMIN-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 3920; RV64IZHINXMIN-NEXT: addi sp, sp, 16 3921; RV64IZHINXMIN-NEXT: ret 3922 %1 = call half @llvm.atan.f16(half %a) 3923 ret half %1 3924} 3925 3926define half @atan2_f16(half %a, half %b) nounwind { 3927; RV32IZFH-LABEL: atan2_f16: 3928; RV32IZFH: # %bb.0: 3929; RV32IZFH-NEXT: addi sp, sp, -16 3930; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 3931; RV32IZFH-NEXT: fcvt.s.h fa0, fa0 3932; RV32IZFH-NEXT: fcvt.s.h fa1, fa1 3933; RV32IZFH-NEXT: call atan2f 3934; RV32IZFH-NEXT: fcvt.h.s fa0, fa0 3935; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 3936; RV32IZFH-NEXT: addi sp, sp, 16 3937; RV32IZFH-NEXT: ret 3938; 3939; RV64IZFH-LABEL: atan2_f16: 3940; RV64IZFH: # %bb.0: 3941; RV64IZFH-NEXT: addi sp, sp, -16 3942; RV64IZFH-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 3943; RV64IZFH-NEXT: fcvt.s.h fa0, fa0 3944; RV64IZFH-NEXT: fcvt.s.h fa1, fa1 3945; RV64IZFH-NEXT: call atan2f 3946; RV64IZFH-NEXT: fcvt.h.s fa0, fa0 3947; RV64IZFH-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 3948; RV64IZFH-NEXT: addi sp, sp, 16 3949; RV64IZFH-NEXT: ret 3950; 3951; RV32IZHINX-LABEL: atan2_f16: 3952; RV32IZHINX: # %bb.0: 3953; RV32IZHINX-NEXT: addi sp, sp, -16 3954; RV32IZHINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 3955; RV32IZHINX-NEXT: fcvt.s.h a0, a0 3956; RV32IZHINX-NEXT: fcvt.s.h a1, a1 3957; RV32IZHINX-NEXT: call atan2f 3958; RV32IZHINX-NEXT: fcvt.h.s a0, a0 3959; RV32IZHINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 3960; RV32IZHINX-NEXT: addi sp, sp, 16 3961; RV32IZHINX-NEXT: ret 3962; 3963; RV64IZHINX-LABEL: atan2_f16: 3964; RV64IZHINX: # %bb.0: 3965; RV64IZHINX-NEXT: addi sp, sp, -16 3966; RV64IZHINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 3967; RV64IZHINX-NEXT: fcvt.s.h a0, a0 3968; RV64IZHINX-NEXT: fcvt.s.h a1, a1 3969; RV64IZHINX-NEXT: call atan2f 3970; RV64IZHINX-NEXT: fcvt.h.s a0, a0 3971; RV64IZHINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 3972; RV64IZHINX-NEXT: addi sp, sp, 16 3973; RV64IZHINX-NEXT: ret 3974; 3975; RV32I-LABEL: atan2_f16: 3976; RV32I: # %bb.0: 3977; RV32I-NEXT: addi sp, sp, -16 3978; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 3979; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill 3980; RV32I-NEXT: sw s1, 4(sp) # 4-byte Folded Spill 3981; RV32I-NEXT: sw s2, 0(sp) # 4-byte Folded Spill 3982; RV32I-NEXT: mv s0, a1 3983; RV32I-NEXT: lui a1, 16 3984; RV32I-NEXT: addi s2, a1, -1 3985; RV32I-NEXT: and a0, a0, s2 3986; RV32I-NEXT: call __extendhfsf2 3987; RV32I-NEXT: mv s1, a0 3988; RV32I-NEXT: and a0, s0, s2 3989; RV32I-NEXT: call __extendhfsf2 3990; RV32I-NEXT: mv a1, a0 3991; RV32I-NEXT: mv a0, s1 3992; RV32I-NEXT: call atan2f 3993; RV32I-NEXT: call __truncsfhf2 3994; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 3995; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload 3996; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload 3997; RV32I-NEXT: lw s2, 0(sp) # 4-byte Folded Reload 3998; RV32I-NEXT: addi sp, sp, 16 3999; RV32I-NEXT: ret 4000; 4001; RV64I-LABEL: atan2_f16: 4002; RV64I: # %bb.0: 4003; RV64I-NEXT: addi sp, sp, -32 4004; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill 4005; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill 4006; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill 4007; RV64I-NEXT: sd s2, 0(sp) # 8-byte Folded Spill 4008; RV64I-NEXT: mv s0, a1 4009; RV64I-NEXT: lui a1, 16 4010; RV64I-NEXT: addiw s2, a1, -1 4011; RV64I-NEXT: and a0, a0, s2 4012; RV64I-NEXT: call __extendhfsf2 4013; RV64I-NEXT: mv s1, a0 4014; RV64I-NEXT: and a0, s0, s2 4015; RV64I-NEXT: call __extendhfsf2 4016; RV64I-NEXT: mv a1, a0 4017; RV64I-NEXT: mv a0, s1 4018; RV64I-NEXT: call atan2f 4019; RV64I-NEXT: call __truncsfhf2 4020; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload 4021; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload 4022; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload 4023; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload 4024; RV64I-NEXT: addi sp, sp, 32 4025; RV64I-NEXT: ret 4026; 4027; RV32IZFHMIN-LABEL: atan2_f16: 4028; RV32IZFHMIN: # %bb.0: 4029; RV32IZFHMIN-NEXT: addi sp, sp, -16 4030; RV32IZFHMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 4031; RV32IZFHMIN-NEXT: fcvt.s.h fa0, fa0 4032; RV32IZFHMIN-NEXT: fcvt.s.h fa1, fa1 4033; RV32IZFHMIN-NEXT: call atan2f 4034; RV32IZFHMIN-NEXT: fcvt.h.s fa0, fa0 4035; RV32IZFHMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 4036; RV32IZFHMIN-NEXT: addi sp, sp, 16 4037; RV32IZFHMIN-NEXT: ret 4038; 4039; RV64IZFHMIN-LABEL: atan2_f16: 4040; RV64IZFHMIN: # %bb.0: 4041; RV64IZFHMIN-NEXT: addi sp, sp, -16 4042; RV64IZFHMIN-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 4043; RV64IZFHMIN-NEXT: fcvt.s.h fa0, fa0 4044; RV64IZFHMIN-NEXT: fcvt.s.h fa1, fa1 4045; RV64IZFHMIN-NEXT: call atan2f 4046; RV64IZFHMIN-NEXT: fcvt.h.s fa0, fa0 4047; RV64IZFHMIN-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 4048; RV64IZFHMIN-NEXT: addi sp, sp, 16 4049; RV64IZFHMIN-NEXT: ret 4050; 4051; RV32IZHINXMIN-LABEL: atan2_f16: 4052; RV32IZHINXMIN: # %bb.0: 4053; RV32IZHINXMIN-NEXT: addi sp, sp, -16 4054; RV32IZHINXMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 4055; RV32IZHINXMIN-NEXT: fcvt.s.h a0, a0 4056; RV32IZHINXMIN-NEXT: fcvt.s.h a1, a1 4057; RV32IZHINXMIN-NEXT: call atan2f 4058; RV32IZHINXMIN-NEXT: fcvt.h.s a0, a0 4059; RV32IZHINXMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 4060; RV32IZHINXMIN-NEXT: addi sp, sp, 16 4061; RV32IZHINXMIN-NEXT: ret 4062; 4063; RV64IZHINXMIN-LABEL: atan2_f16: 4064; RV64IZHINXMIN: # %bb.0: 4065; RV64IZHINXMIN-NEXT: addi sp, sp, -16 4066; RV64IZHINXMIN-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 4067; RV64IZHINXMIN-NEXT: fcvt.s.h a0, a0 4068; RV64IZHINXMIN-NEXT: fcvt.s.h a1, a1 4069; RV64IZHINXMIN-NEXT: call atan2f 4070; RV64IZHINXMIN-NEXT: fcvt.h.s a0, a0 4071; RV64IZHINXMIN-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 4072; RV64IZHINXMIN-NEXT: addi sp, sp, 16 4073; RV64IZHINXMIN-NEXT: ret 4074 %1 = call half @llvm.atan2.f16(half %a, half %b) 4075 ret half %1 4076} 4077 4078define half @sinh_f16(half %a) nounwind { 4079; RV32IZFH-LABEL: sinh_f16: 4080; RV32IZFH: # %bb.0: 4081; RV32IZFH-NEXT: addi sp, sp, -16 4082; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 4083; RV32IZFH-NEXT: fcvt.s.h fa0, fa0 4084; RV32IZFH-NEXT: call sinhf 4085; RV32IZFH-NEXT: fcvt.h.s fa0, fa0 4086; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 4087; RV32IZFH-NEXT: addi sp, sp, 16 4088; RV32IZFH-NEXT: ret 4089; 4090; RV64IZFH-LABEL: sinh_f16: 4091; RV64IZFH: # %bb.0: 4092; RV64IZFH-NEXT: addi sp, sp, -16 4093; RV64IZFH-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 4094; RV64IZFH-NEXT: fcvt.s.h fa0, fa0 4095; RV64IZFH-NEXT: call sinhf 4096; RV64IZFH-NEXT: fcvt.h.s fa0, fa0 4097; RV64IZFH-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 4098; RV64IZFH-NEXT: addi sp, sp, 16 4099; RV64IZFH-NEXT: ret 4100; 4101; RV32IZHINX-LABEL: sinh_f16: 4102; RV32IZHINX: # %bb.0: 4103; RV32IZHINX-NEXT: addi sp, sp, -16 4104; RV32IZHINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 4105; RV32IZHINX-NEXT: fcvt.s.h a0, a0 4106; RV32IZHINX-NEXT: call sinhf 4107; RV32IZHINX-NEXT: fcvt.h.s a0, a0 4108; RV32IZHINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 4109; RV32IZHINX-NEXT: addi sp, sp, 16 4110; RV32IZHINX-NEXT: ret 4111; 4112; RV64IZHINX-LABEL: sinh_f16: 4113; RV64IZHINX: # %bb.0: 4114; RV64IZHINX-NEXT: addi sp, sp, -16 4115; RV64IZHINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 4116; RV64IZHINX-NEXT: fcvt.s.h a0, a0 4117; RV64IZHINX-NEXT: call sinhf 4118; RV64IZHINX-NEXT: fcvt.h.s a0, a0 4119; RV64IZHINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 4120; RV64IZHINX-NEXT: addi sp, sp, 16 4121; RV64IZHINX-NEXT: ret 4122; 4123; RV32I-LABEL: sinh_f16: 4124; RV32I: # %bb.0: 4125; RV32I-NEXT: addi sp, sp, -16 4126; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 4127; RV32I-NEXT: slli a0, a0, 16 4128; RV32I-NEXT: srli a0, a0, 16 4129; RV32I-NEXT: call __extendhfsf2 4130; RV32I-NEXT: call sinhf 4131; RV32I-NEXT: call __truncsfhf2 4132; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 4133; RV32I-NEXT: addi sp, sp, 16 4134; RV32I-NEXT: ret 4135; 4136; RV64I-LABEL: sinh_f16: 4137; RV64I: # %bb.0: 4138; RV64I-NEXT: addi sp, sp, -16 4139; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 4140; RV64I-NEXT: slli a0, a0, 48 4141; RV64I-NEXT: srli a0, a0, 48 4142; RV64I-NEXT: call __extendhfsf2 4143; RV64I-NEXT: call sinhf 4144; RV64I-NEXT: call __truncsfhf2 4145; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 4146; RV64I-NEXT: addi sp, sp, 16 4147; RV64I-NEXT: ret 4148; 4149; RV32IZFHMIN-LABEL: sinh_f16: 4150; RV32IZFHMIN: # %bb.0: 4151; RV32IZFHMIN-NEXT: addi sp, sp, -16 4152; RV32IZFHMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 4153; RV32IZFHMIN-NEXT: fcvt.s.h fa0, fa0 4154; RV32IZFHMIN-NEXT: call sinhf 4155; RV32IZFHMIN-NEXT: fcvt.h.s fa0, fa0 4156; RV32IZFHMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 4157; RV32IZFHMIN-NEXT: addi sp, sp, 16 4158; RV32IZFHMIN-NEXT: ret 4159; 4160; RV64IZFHMIN-LABEL: sinh_f16: 4161; RV64IZFHMIN: # %bb.0: 4162; RV64IZFHMIN-NEXT: addi sp, sp, -16 4163; RV64IZFHMIN-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 4164; RV64IZFHMIN-NEXT: fcvt.s.h fa0, fa0 4165; RV64IZFHMIN-NEXT: call sinhf 4166; RV64IZFHMIN-NEXT: fcvt.h.s fa0, fa0 4167; RV64IZFHMIN-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 4168; RV64IZFHMIN-NEXT: addi sp, sp, 16 4169; RV64IZFHMIN-NEXT: ret 4170; 4171; RV32IZHINXMIN-LABEL: sinh_f16: 4172; RV32IZHINXMIN: # %bb.0: 4173; RV32IZHINXMIN-NEXT: addi sp, sp, -16 4174; RV32IZHINXMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 4175; RV32IZHINXMIN-NEXT: fcvt.s.h a0, a0 4176; RV32IZHINXMIN-NEXT: call sinhf 4177; RV32IZHINXMIN-NEXT: fcvt.h.s a0, a0 4178; RV32IZHINXMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 4179; RV32IZHINXMIN-NEXT: addi sp, sp, 16 4180; RV32IZHINXMIN-NEXT: ret 4181; 4182; RV64IZHINXMIN-LABEL: sinh_f16: 4183; RV64IZHINXMIN: # %bb.0: 4184; RV64IZHINXMIN-NEXT: addi sp, sp, -16 4185; RV64IZHINXMIN-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 4186; RV64IZHINXMIN-NEXT: fcvt.s.h a0, a0 4187; RV64IZHINXMIN-NEXT: call sinhf 4188; RV64IZHINXMIN-NEXT: fcvt.h.s a0, a0 4189; RV64IZHINXMIN-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 4190; RV64IZHINXMIN-NEXT: addi sp, sp, 16 4191; RV64IZHINXMIN-NEXT: ret 4192 %1 = call half @llvm.sinh.f16(half %a) 4193 ret half %1 4194} 4195 4196define half @cosh_f16(half %a) nounwind { 4197; RV32IZFH-LABEL: cosh_f16: 4198; RV32IZFH: # %bb.0: 4199; RV32IZFH-NEXT: addi sp, sp, -16 4200; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 4201; RV32IZFH-NEXT: fcvt.s.h fa0, fa0 4202; RV32IZFH-NEXT: call coshf 4203; RV32IZFH-NEXT: fcvt.h.s fa0, fa0 4204; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 4205; RV32IZFH-NEXT: addi sp, sp, 16 4206; RV32IZFH-NEXT: ret 4207; 4208; RV64IZFH-LABEL: cosh_f16: 4209; RV64IZFH: # %bb.0: 4210; RV64IZFH-NEXT: addi sp, sp, -16 4211; RV64IZFH-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 4212; RV64IZFH-NEXT: fcvt.s.h fa0, fa0 4213; RV64IZFH-NEXT: call coshf 4214; RV64IZFH-NEXT: fcvt.h.s fa0, fa0 4215; RV64IZFH-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 4216; RV64IZFH-NEXT: addi sp, sp, 16 4217; RV64IZFH-NEXT: ret 4218; 4219; RV32IZHINX-LABEL: cosh_f16: 4220; RV32IZHINX: # %bb.0: 4221; RV32IZHINX-NEXT: addi sp, sp, -16 4222; RV32IZHINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 4223; RV32IZHINX-NEXT: fcvt.s.h a0, a0 4224; RV32IZHINX-NEXT: call coshf 4225; RV32IZHINX-NEXT: fcvt.h.s a0, a0 4226; RV32IZHINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 4227; RV32IZHINX-NEXT: addi sp, sp, 16 4228; RV32IZHINX-NEXT: ret 4229; 4230; RV64IZHINX-LABEL: cosh_f16: 4231; RV64IZHINX: # %bb.0: 4232; RV64IZHINX-NEXT: addi sp, sp, -16 4233; RV64IZHINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 4234; RV64IZHINX-NEXT: fcvt.s.h a0, a0 4235; RV64IZHINX-NEXT: call coshf 4236; RV64IZHINX-NEXT: fcvt.h.s a0, a0 4237; RV64IZHINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 4238; RV64IZHINX-NEXT: addi sp, sp, 16 4239; RV64IZHINX-NEXT: ret 4240; 4241; RV32I-LABEL: cosh_f16: 4242; RV32I: # %bb.0: 4243; RV32I-NEXT: addi sp, sp, -16 4244; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 4245; RV32I-NEXT: slli a0, a0, 16 4246; RV32I-NEXT: srli a0, a0, 16 4247; RV32I-NEXT: call __extendhfsf2 4248; RV32I-NEXT: call coshf 4249; RV32I-NEXT: call __truncsfhf2 4250; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 4251; RV32I-NEXT: addi sp, sp, 16 4252; RV32I-NEXT: ret 4253; 4254; RV64I-LABEL: cosh_f16: 4255; RV64I: # %bb.0: 4256; RV64I-NEXT: addi sp, sp, -16 4257; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 4258; RV64I-NEXT: slli a0, a0, 48 4259; RV64I-NEXT: srli a0, a0, 48 4260; RV64I-NEXT: call __extendhfsf2 4261; RV64I-NEXT: call coshf 4262; RV64I-NEXT: call __truncsfhf2 4263; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 4264; RV64I-NEXT: addi sp, sp, 16 4265; RV64I-NEXT: ret 4266; 4267; RV32IZFHMIN-LABEL: cosh_f16: 4268; RV32IZFHMIN: # %bb.0: 4269; RV32IZFHMIN-NEXT: addi sp, sp, -16 4270; RV32IZFHMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 4271; RV32IZFHMIN-NEXT: fcvt.s.h fa0, fa0 4272; RV32IZFHMIN-NEXT: call coshf 4273; RV32IZFHMIN-NEXT: fcvt.h.s fa0, fa0 4274; RV32IZFHMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 4275; RV32IZFHMIN-NEXT: addi sp, sp, 16 4276; RV32IZFHMIN-NEXT: ret 4277; 4278; RV64IZFHMIN-LABEL: cosh_f16: 4279; RV64IZFHMIN: # %bb.0: 4280; RV64IZFHMIN-NEXT: addi sp, sp, -16 4281; RV64IZFHMIN-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 4282; RV64IZFHMIN-NEXT: fcvt.s.h fa0, fa0 4283; RV64IZFHMIN-NEXT: call coshf 4284; RV64IZFHMIN-NEXT: fcvt.h.s fa0, fa0 4285; RV64IZFHMIN-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 4286; RV64IZFHMIN-NEXT: addi sp, sp, 16 4287; RV64IZFHMIN-NEXT: ret 4288; 4289; RV32IZHINXMIN-LABEL: cosh_f16: 4290; RV32IZHINXMIN: # %bb.0: 4291; RV32IZHINXMIN-NEXT: addi sp, sp, -16 4292; RV32IZHINXMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 4293; RV32IZHINXMIN-NEXT: fcvt.s.h a0, a0 4294; RV32IZHINXMIN-NEXT: call coshf 4295; RV32IZHINXMIN-NEXT: fcvt.h.s a0, a0 4296; RV32IZHINXMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 4297; RV32IZHINXMIN-NEXT: addi sp, sp, 16 4298; RV32IZHINXMIN-NEXT: ret 4299; 4300; RV64IZHINXMIN-LABEL: cosh_f16: 4301; RV64IZHINXMIN: # %bb.0: 4302; RV64IZHINXMIN-NEXT: addi sp, sp, -16 4303; RV64IZHINXMIN-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 4304; RV64IZHINXMIN-NEXT: fcvt.s.h a0, a0 4305; RV64IZHINXMIN-NEXT: call coshf 4306; RV64IZHINXMIN-NEXT: fcvt.h.s a0, a0 4307; RV64IZHINXMIN-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 4308; RV64IZHINXMIN-NEXT: addi sp, sp, 16 4309; RV64IZHINXMIN-NEXT: ret 4310 %1 = call half @llvm.cosh.f16(half %a) 4311 ret half %1 4312} 4313 4314define half @tanh_f16(half %a) nounwind { 4315; RV32IZFH-LABEL: tanh_f16: 4316; RV32IZFH: # %bb.0: 4317; RV32IZFH-NEXT: addi sp, sp, -16 4318; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 4319; RV32IZFH-NEXT: fcvt.s.h fa0, fa0 4320; RV32IZFH-NEXT: call tanhf 4321; RV32IZFH-NEXT: fcvt.h.s fa0, fa0 4322; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 4323; RV32IZFH-NEXT: addi sp, sp, 16 4324; RV32IZFH-NEXT: ret 4325; 4326; RV64IZFH-LABEL: tanh_f16: 4327; RV64IZFH: # %bb.0: 4328; RV64IZFH-NEXT: addi sp, sp, -16 4329; RV64IZFH-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 4330; RV64IZFH-NEXT: fcvt.s.h fa0, fa0 4331; RV64IZFH-NEXT: call tanhf 4332; RV64IZFH-NEXT: fcvt.h.s fa0, fa0 4333; RV64IZFH-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 4334; RV64IZFH-NEXT: addi sp, sp, 16 4335; RV64IZFH-NEXT: ret 4336; 4337; RV32IZHINX-LABEL: tanh_f16: 4338; RV32IZHINX: # %bb.0: 4339; RV32IZHINX-NEXT: addi sp, sp, -16 4340; RV32IZHINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 4341; RV32IZHINX-NEXT: fcvt.s.h a0, a0 4342; RV32IZHINX-NEXT: call tanhf 4343; RV32IZHINX-NEXT: fcvt.h.s a0, a0 4344; RV32IZHINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 4345; RV32IZHINX-NEXT: addi sp, sp, 16 4346; RV32IZHINX-NEXT: ret 4347; 4348; RV64IZHINX-LABEL: tanh_f16: 4349; RV64IZHINX: # %bb.0: 4350; RV64IZHINX-NEXT: addi sp, sp, -16 4351; RV64IZHINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 4352; RV64IZHINX-NEXT: fcvt.s.h a0, a0 4353; RV64IZHINX-NEXT: call tanhf 4354; RV64IZHINX-NEXT: fcvt.h.s a0, a0 4355; RV64IZHINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 4356; RV64IZHINX-NEXT: addi sp, sp, 16 4357; RV64IZHINX-NEXT: ret 4358; 4359; RV32I-LABEL: tanh_f16: 4360; RV32I: # %bb.0: 4361; RV32I-NEXT: addi sp, sp, -16 4362; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 4363; RV32I-NEXT: slli a0, a0, 16 4364; RV32I-NEXT: srli a0, a0, 16 4365; RV32I-NEXT: call __extendhfsf2 4366; RV32I-NEXT: call tanhf 4367; RV32I-NEXT: call __truncsfhf2 4368; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 4369; RV32I-NEXT: addi sp, sp, 16 4370; RV32I-NEXT: ret 4371; 4372; RV64I-LABEL: tanh_f16: 4373; RV64I: # %bb.0: 4374; RV64I-NEXT: addi sp, sp, -16 4375; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 4376; RV64I-NEXT: slli a0, a0, 48 4377; RV64I-NEXT: srli a0, a0, 48 4378; RV64I-NEXT: call __extendhfsf2 4379; RV64I-NEXT: call tanhf 4380; RV64I-NEXT: call __truncsfhf2 4381; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 4382; RV64I-NEXT: addi sp, sp, 16 4383; RV64I-NEXT: ret 4384; 4385; RV32IZFHMIN-LABEL: tanh_f16: 4386; RV32IZFHMIN: # %bb.0: 4387; RV32IZFHMIN-NEXT: addi sp, sp, -16 4388; RV32IZFHMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 4389; RV32IZFHMIN-NEXT: fcvt.s.h fa0, fa0 4390; RV32IZFHMIN-NEXT: call tanhf 4391; RV32IZFHMIN-NEXT: fcvt.h.s fa0, fa0 4392; RV32IZFHMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 4393; RV32IZFHMIN-NEXT: addi sp, sp, 16 4394; RV32IZFHMIN-NEXT: ret 4395; 4396; RV64IZFHMIN-LABEL: tanh_f16: 4397; RV64IZFHMIN: # %bb.0: 4398; RV64IZFHMIN-NEXT: addi sp, sp, -16 4399; RV64IZFHMIN-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 4400; RV64IZFHMIN-NEXT: fcvt.s.h fa0, fa0 4401; RV64IZFHMIN-NEXT: call tanhf 4402; RV64IZFHMIN-NEXT: fcvt.h.s fa0, fa0 4403; RV64IZFHMIN-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 4404; RV64IZFHMIN-NEXT: addi sp, sp, 16 4405; RV64IZFHMIN-NEXT: ret 4406; 4407; RV32IZHINXMIN-LABEL: tanh_f16: 4408; RV32IZHINXMIN: # %bb.0: 4409; RV32IZHINXMIN-NEXT: addi sp, sp, -16 4410; RV32IZHINXMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 4411; RV32IZHINXMIN-NEXT: fcvt.s.h a0, a0 4412; RV32IZHINXMIN-NEXT: call tanhf 4413; RV32IZHINXMIN-NEXT: fcvt.h.s a0, a0 4414; RV32IZHINXMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 4415; RV32IZHINXMIN-NEXT: addi sp, sp, 16 4416; RV32IZHINXMIN-NEXT: ret 4417; 4418; RV64IZHINXMIN-LABEL: tanh_f16: 4419; RV64IZHINXMIN: # %bb.0: 4420; RV64IZHINXMIN-NEXT: addi sp, sp, -16 4421; RV64IZHINXMIN-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 4422; RV64IZHINXMIN-NEXT: fcvt.s.h a0, a0 4423; RV64IZHINXMIN-NEXT: call tanhf 4424; RV64IZHINXMIN-NEXT: fcvt.h.s a0, a0 4425; RV64IZHINXMIN-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 4426; RV64IZHINXMIN-NEXT: addi sp, sp, 16 4427; RV64IZHINXMIN-NEXT: ret 4428 %1 = call half @llvm.tanh.f16(half %a) 4429 ret half %1 4430} 4431