1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=riscv32 -mattr=+zfh -verify-machineinstrs \ 3; RUN: -target-abi ilp32f -disable-strictnode-mutation < %s \ 4; RUN: | FileCheck -check-prefixes=CHECKIZFH,RV32IZFH %s 5; RUN: llc -mtriple=riscv64 -mattr=+zfh -verify-machineinstrs \ 6; RUN: -target-abi lp64f -disable-strictnode-mutation < %s \ 7; RUN: | FileCheck -check-prefixes=CHECKIZFH,RV64IZFH %s 8; RUN: llc -mtriple=riscv32 -mattr=+zhinx -verify-machineinstrs \ 9; RUN: -target-abi ilp32 -disable-strictnode-mutation < %s \ 10; RUN: | FileCheck -check-prefixes=CHECKIZHINX,RV32IZHINX %s 11; RUN: llc -mtriple=riscv64 -mattr=+zhinx -verify-machineinstrs \ 12; RUN: -target-abi lp64 -disable-strictnode-mutation < %s \ 13; RUN: | FileCheck -check-prefixes=CHECKIZHINX,RV64IZHINX %s 14; RUN: llc -mtriple=riscv32 -mattr=+d,+zfh -verify-machineinstrs \ 15; RUN: -target-abi ilp32d -disable-strictnode-mutation < %s \ 16; RUN: | FileCheck -check-prefix=RV32IDZFH %s 17; RUN: llc -mtriple=riscv64 -mattr=+d,+zfh -verify-machineinstrs \ 18; RUN: -target-abi lp64d -disable-strictnode-mutation < %s \ 19; RUN: | FileCheck -check-prefix=RV64IDZFH %s 20; RUN: llc -mtriple=riscv32 -mattr=+zdinx,+zhinx -verify-machineinstrs \ 21; RUN: -target-abi ilp32 -disable-strictnode-mutation < %s \ 22; RUN: | FileCheck -check-prefix=RV32IZDINXZHINX %s 23; RUN: llc -mtriple=riscv64 -mattr=+zdinx,+zhinx -verify-machineinstrs \ 24; RUN: -target-abi lp64 -disable-strictnode-mutation < %s \ 25; RUN: | FileCheck -check-prefix=RV64IZDINXZHINX %s 26; RUN: llc -mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs \ 27; RUN: -target-abi ilp32f -disable-strictnode-mutation < %s \ 28; RUN: | FileCheck -check-prefixes=CHECK32-IZFHMIN,RV32IFZFHMIN %s 29; RUN: llc -mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs \ 30; RUN: -target-abi lp64f -disable-strictnode-mutation < %s \ 31; RUN: | FileCheck -check-prefixes=CHECK64-IZFHMIN,RV64IFZFHMIN %s 32; RUN: llc -mtriple=riscv32 -mattr=+zhinxmin -verify-machineinstrs \ 33; RUN: -target-abi ilp32 -disable-strictnode-mutation < %s \ 34; RUN: | FileCheck -check-prefixes=CHECK32-IZHINXMIN %s 35; RUN: llc -mtriple=riscv64 -mattr=+zhinxmin -verify-machineinstrs \ 36; RUN: -target-abi lp64 -disable-strictnode-mutation < %s \ 37; RUN: | FileCheck -check-prefixes=CHECK64-IZHINXMIN %s 38; RUN: llc -mtriple=riscv32 -mattr=+d,+zfhmin -verify-machineinstrs \ 39; RUN: -target-abi ilp32d -disable-strictnode-mutation < %s \ 40; RUN: | FileCheck -check-prefixes=CHECK32-IZFHMIN,RV32IDZFHMIN %s 41; RUN: llc -mtriple=riscv64 -mattr=+d,+zfhmin -verify-machineinstrs \ 42; RUN: -target-abi lp64d -disable-strictnode-mutation < %s \ 43; RUN: | FileCheck -check-prefixes=CHECK64-IZFHMIN,RV64IDZFHMIN %s 44; RUN: llc -mtriple=riscv32 -mattr=+zdinx,+zhinxmin -verify-machineinstrs \ 45; RUN: -target-abi ilp32 -disable-strictnode-mutation < %s \ 46; RUN: | FileCheck -check-prefixes=CHECK32-IZDINXZHINXMIN %s 47; RUN: llc -mtriple=riscv64 -mattr=+zdinx,+zhinxmin -verify-machineinstrs \ 48; RUN: -target-abi lp64 -disable-strictnode-mutation < %s \ 49; RUN: | FileCheck -check-prefixes=CHECK64-IZDINXZHINXMIN %s 50; RUN: llc -mtriple=riscv32 -mattr=+d -verify-machineinstrs \ 51; RUN: -target-abi ilp32d -disable-strictnode-mutation < %s \ 52; RUN: | FileCheck -check-prefixes=CHECK32-D %s 53 54; NOTE: The rounding mode metadata does not effect which instruction is 55; selected. Dynamic rounding mode is always used for operations that 56; support rounding mode. 57 58define i16 @fcvt_si_h(half %a) nounwind strictfp { 59; RV32IZFH-LABEL: fcvt_si_h: 60; RV32IZFH: # %bb.0: 61; RV32IZFH-NEXT: fcvt.w.h a0, fa0, rtz 62; RV32IZFH-NEXT: ret 63; 64; RV64IZFH-LABEL: fcvt_si_h: 65; RV64IZFH: # %bb.0: 66; RV64IZFH-NEXT: fcvt.l.h a0, fa0, rtz 67; RV64IZFH-NEXT: ret 68; 69; RV32IZHINX-LABEL: fcvt_si_h: 70; RV32IZHINX: # %bb.0: 71; RV32IZHINX-NEXT: fcvt.w.h a0, a0, rtz 72; RV32IZHINX-NEXT: ret 73; 74; RV64IZHINX-LABEL: fcvt_si_h: 75; RV64IZHINX: # %bb.0: 76; RV64IZHINX-NEXT: fcvt.l.h a0, a0, rtz 77; RV64IZHINX-NEXT: ret 78; 79; RV32IDZFH-LABEL: fcvt_si_h: 80; RV32IDZFH: # %bb.0: 81; RV32IDZFH-NEXT: fcvt.w.h a0, fa0, rtz 82; RV32IDZFH-NEXT: ret 83; 84; RV64IDZFH-LABEL: fcvt_si_h: 85; RV64IDZFH: # %bb.0: 86; RV64IDZFH-NEXT: fcvt.l.h a0, fa0, rtz 87; RV64IDZFH-NEXT: ret 88; 89; RV32IZDINXZHINX-LABEL: fcvt_si_h: 90; RV32IZDINXZHINX: # %bb.0: 91; RV32IZDINXZHINX-NEXT: fcvt.w.h a0, a0, rtz 92; RV32IZDINXZHINX-NEXT: ret 93; 94; RV64IZDINXZHINX-LABEL: fcvt_si_h: 95; RV64IZDINXZHINX: # %bb.0: 96; RV64IZDINXZHINX-NEXT: fcvt.l.h a0, a0, rtz 97; RV64IZDINXZHINX-NEXT: ret 98; 99; CHECK32-IZFHMIN-LABEL: fcvt_si_h: 100; CHECK32-IZFHMIN: # %bb.0: 101; CHECK32-IZFHMIN-NEXT: fcvt.s.h fa5, fa0 102; CHECK32-IZFHMIN-NEXT: fcvt.w.s a0, fa5, rtz 103; CHECK32-IZFHMIN-NEXT: ret 104; 105; CHECK64-IZFHMIN-LABEL: fcvt_si_h: 106; CHECK64-IZFHMIN: # %bb.0: 107; CHECK64-IZFHMIN-NEXT: fcvt.s.h fa5, fa0 108; CHECK64-IZFHMIN-NEXT: fcvt.l.s a0, fa5, rtz 109; CHECK64-IZFHMIN-NEXT: ret 110; 111; CHECK32-IZHINXMIN-LABEL: fcvt_si_h: 112; CHECK32-IZHINXMIN: # %bb.0: 113; CHECK32-IZHINXMIN-NEXT: fcvt.s.h a0, a0 114; CHECK32-IZHINXMIN-NEXT: fcvt.w.s a0, a0, rtz 115; CHECK32-IZHINXMIN-NEXT: ret 116; 117; CHECK64-IZHINXMIN-LABEL: fcvt_si_h: 118; CHECK64-IZHINXMIN: # %bb.0: 119; CHECK64-IZHINXMIN-NEXT: fcvt.s.h a0, a0 120; CHECK64-IZHINXMIN-NEXT: fcvt.l.s a0, a0, rtz 121; CHECK64-IZHINXMIN-NEXT: ret 122; 123; CHECK32-IZDINXZHINXMIN-LABEL: fcvt_si_h: 124; CHECK32-IZDINXZHINXMIN: # %bb.0: 125; CHECK32-IZDINXZHINXMIN-NEXT: fcvt.s.h a0, a0 126; CHECK32-IZDINXZHINXMIN-NEXT: fcvt.w.s a0, a0, rtz 127; CHECK32-IZDINXZHINXMIN-NEXT: ret 128; 129; CHECK64-IZDINXZHINXMIN-LABEL: fcvt_si_h: 130; CHECK64-IZDINXZHINXMIN: # %bb.0: 131; CHECK64-IZDINXZHINXMIN-NEXT: fcvt.s.h a0, a0 132; CHECK64-IZDINXZHINXMIN-NEXT: fcvt.l.s a0, a0, rtz 133; CHECK64-IZDINXZHINXMIN-NEXT: ret 134; 135; CHECK32-D-LABEL: fcvt_si_h: 136; CHECK32-D: # %bb.0: 137; CHECK32-D-NEXT: addi sp, sp, -16 138; CHECK32-D-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 139; CHECK32-D-NEXT: fmv.x.w a0, fa0 140; CHECK32-D-NEXT: slli a0, a0, 16 141; CHECK32-D-NEXT: srli a0, a0, 16 142; CHECK32-D-NEXT: fmv.w.x fa0, a0 143; CHECK32-D-NEXT: call __extendhfsf2 144; CHECK32-D-NEXT: fcvt.w.s a0, fa0, rtz 145; CHECK32-D-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 146; CHECK32-D-NEXT: addi sp, sp, 16 147; CHECK32-D-NEXT: ret 148 %1 = call i16 @llvm.experimental.constrained.fptosi.i16.f16(half %a, metadata !"fpexcept.strict") 149 ret i16 %1 150} 151declare i16 @llvm.experimental.constrained.fptosi.i16.f16(half, metadata) 152 153define i16 @fcvt_ui_h(half %a) nounwind strictfp { 154; RV32IZFH-LABEL: fcvt_ui_h: 155; RV32IZFH: # %bb.0: 156; RV32IZFH-NEXT: fcvt.w.h a0, fa0, rtz 157; RV32IZFH-NEXT: ret 158; 159; RV64IZFH-LABEL: fcvt_ui_h: 160; RV64IZFH: # %bb.0: 161; RV64IZFH-NEXT: fcvt.l.h a0, fa0, rtz 162; RV64IZFH-NEXT: ret 163; 164; RV32IZHINX-LABEL: fcvt_ui_h: 165; RV32IZHINX: # %bb.0: 166; RV32IZHINX-NEXT: fcvt.w.h a0, a0, rtz 167; RV32IZHINX-NEXT: ret 168; 169; RV64IZHINX-LABEL: fcvt_ui_h: 170; RV64IZHINX: # %bb.0: 171; RV64IZHINX-NEXT: fcvt.l.h a0, a0, rtz 172; RV64IZHINX-NEXT: ret 173; 174; RV32IDZFH-LABEL: fcvt_ui_h: 175; RV32IDZFH: # %bb.0: 176; RV32IDZFH-NEXT: fcvt.w.h a0, fa0, rtz 177; RV32IDZFH-NEXT: ret 178; 179; RV64IDZFH-LABEL: fcvt_ui_h: 180; RV64IDZFH: # %bb.0: 181; RV64IDZFH-NEXT: fcvt.l.h a0, fa0, rtz 182; RV64IDZFH-NEXT: ret 183; 184; RV32IZDINXZHINX-LABEL: fcvt_ui_h: 185; RV32IZDINXZHINX: # %bb.0: 186; RV32IZDINXZHINX-NEXT: fcvt.w.h a0, a0, rtz 187; RV32IZDINXZHINX-NEXT: ret 188; 189; RV64IZDINXZHINX-LABEL: fcvt_ui_h: 190; RV64IZDINXZHINX: # %bb.0: 191; RV64IZDINXZHINX-NEXT: fcvt.l.h a0, a0, rtz 192; RV64IZDINXZHINX-NEXT: ret 193; 194; CHECK32-IZFHMIN-LABEL: fcvt_ui_h: 195; CHECK32-IZFHMIN: # %bb.0: 196; CHECK32-IZFHMIN-NEXT: fcvt.s.h fa5, fa0 197; CHECK32-IZFHMIN-NEXT: fcvt.w.s a0, fa5, rtz 198; CHECK32-IZFHMIN-NEXT: ret 199; 200; CHECK64-IZFHMIN-LABEL: fcvt_ui_h: 201; CHECK64-IZFHMIN: # %bb.0: 202; CHECK64-IZFHMIN-NEXT: fcvt.s.h fa5, fa0 203; CHECK64-IZFHMIN-NEXT: fcvt.l.s a0, fa5, rtz 204; CHECK64-IZFHMIN-NEXT: ret 205; 206; CHECK32-IZHINXMIN-LABEL: fcvt_ui_h: 207; CHECK32-IZHINXMIN: # %bb.0: 208; CHECK32-IZHINXMIN-NEXT: fcvt.s.h a0, a0 209; CHECK32-IZHINXMIN-NEXT: fcvt.w.s a0, a0, rtz 210; CHECK32-IZHINXMIN-NEXT: ret 211; 212; CHECK64-IZHINXMIN-LABEL: fcvt_ui_h: 213; CHECK64-IZHINXMIN: # %bb.0: 214; CHECK64-IZHINXMIN-NEXT: fcvt.s.h a0, a0 215; CHECK64-IZHINXMIN-NEXT: fcvt.l.s a0, a0, rtz 216; CHECK64-IZHINXMIN-NEXT: ret 217; 218; CHECK32-IZDINXZHINXMIN-LABEL: fcvt_ui_h: 219; CHECK32-IZDINXZHINXMIN: # %bb.0: 220; CHECK32-IZDINXZHINXMIN-NEXT: fcvt.s.h a0, a0 221; CHECK32-IZDINXZHINXMIN-NEXT: fcvt.w.s a0, a0, rtz 222; CHECK32-IZDINXZHINXMIN-NEXT: ret 223; 224; CHECK64-IZDINXZHINXMIN-LABEL: fcvt_ui_h: 225; CHECK64-IZDINXZHINXMIN: # %bb.0: 226; CHECK64-IZDINXZHINXMIN-NEXT: fcvt.s.h a0, a0 227; CHECK64-IZDINXZHINXMIN-NEXT: fcvt.l.s a0, a0, rtz 228; CHECK64-IZDINXZHINXMIN-NEXT: ret 229; 230; CHECK32-D-LABEL: fcvt_ui_h: 231; CHECK32-D: # %bb.0: 232; CHECK32-D-NEXT: addi sp, sp, -16 233; CHECK32-D-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 234; CHECK32-D-NEXT: fmv.x.w a0, fa0 235; CHECK32-D-NEXT: slli a0, a0, 16 236; CHECK32-D-NEXT: srli a0, a0, 16 237; CHECK32-D-NEXT: fmv.w.x fa0, a0 238; CHECK32-D-NEXT: call __extendhfsf2 239; CHECK32-D-NEXT: fcvt.w.s a0, fa0, rtz 240; CHECK32-D-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 241; CHECK32-D-NEXT: addi sp, sp, 16 242; CHECK32-D-NEXT: ret 243 %1 = call i16 @llvm.experimental.constrained.fptoui.i16.f16(half %a, metadata !"fpexcept.strict") 244 ret i16 %1 245} 246declare i16 @llvm.experimental.constrained.fptoui.i16.f16(half, metadata) 247 248define i32 @fcvt_w_h(half %a) nounwind strictfp { 249; CHECKIZFH-LABEL: fcvt_w_h: 250; CHECKIZFH: # %bb.0: 251; CHECKIZFH-NEXT: fcvt.w.h a0, fa0, rtz 252; CHECKIZFH-NEXT: ret 253; 254; CHECKIZHINX-LABEL: fcvt_w_h: 255; CHECKIZHINX: # %bb.0: 256; CHECKIZHINX-NEXT: fcvt.w.h a0, a0, rtz 257; CHECKIZHINX-NEXT: ret 258; 259; RV32IDZFH-LABEL: fcvt_w_h: 260; RV32IDZFH: # %bb.0: 261; RV32IDZFH-NEXT: fcvt.w.h a0, fa0, rtz 262; RV32IDZFH-NEXT: ret 263; 264; RV64IDZFH-LABEL: fcvt_w_h: 265; RV64IDZFH: # %bb.0: 266; RV64IDZFH-NEXT: fcvt.w.h a0, fa0, rtz 267; RV64IDZFH-NEXT: ret 268; 269; RV32IZDINXZHINX-LABEL: fcvt_w_h: 270; RV32IZDINXZHINX: # %bb.0: 271; RV32IZDINXZHINX-NEXT: fcvt.w.h a0, a0, rtz 272; RV32IZDINXZHINX-NEXT: ret 273; 274; RV64IZDINXZHINX-LABEL: fcvt_w_h: 275; RV64IZDINXZHINX: # %bb.0: 276; RV64IZDINXZHINX-NEXT: fcvt.w.h a0, a0, rtz 277; RV64IZDINXZHINX-NEXT: ret 278; 279; CHECK32-IZFHMIN-LABEL: fcvt_w_h: 280; CHECK32-IZFHMIN: # %bb.0: 281; CHECK32-IZFHMIN-NEXT: fcvt.s.h fa5, fa0 282; CHECK32-IZFHMIN-NEXT: fcvt.w.s a0, fa5, rtz 283; CHECK32-IZFHMIN-NEXT: ret 284; 285; CHECK64-IZFHMIN-LABEL: fcvt_w_h: 286; CHECK64-IZFHMIN: # %bb.0: 287; CHECK64-IZFHMIN-NEXT: fcvt.s.h fa5, fa0 288; CHECK64-IZFHMIN-NEXT: fcvt.w.s a0, fa5, rtz 289; CHECK64-IZFHMIN-NEXT: ret 290; 291; CHECK32-IZHINXMIN-LABEL: fcvt_w_h: 292; CHECK32-IZHINXMIN: # %bb.0: 293; CHECK32-IZHINXMIN-NEXT: fcvt.s.h a0, a0 294; CHECK32-IZHINXMIN-NEXT: fcvt.w.s a0, a0, rtz 295; CHECK32-IZHINXMIN-NEXT: ret 296; 297; CHECK64-IZHINXMIN-LABEL: fcvt_w_h: 298; CHECK64-IZHINXMIN: # %bb.0: 299; CHECK64-IZHINXMIN-NEXT: fcvt.s.h a0, a0 300; CHECK64-IZHINXMIN-NEXT: fcvt.w.s a0, a0, rtz 301; CHECK64-IZHINXMIN-NEXT: ret 302; 303; CHECK32-IZDINXZHINXMIN-LABEL: fcvt_w_h: 304; CHECK32-IZDINXZHINXMIN: # %bb.0: 305; CHECK32-IZDINXZHINXMIN-NEXT: fcvt.s.h a0, a0 306; CHECK32-IZDINXZHINXMIN-NEXT: fcvt.w.s a0, a0, rtz 307; CHECK32-IZDINXZHINXMIN-NEXT: ret 308; 309; CHECK64-IZDINXZHINXMIN-LABEL: fcvt_w_h: 310; CHECK64-IZDINXZHINXMIN: # %bb.0: 311; CHECK64-IZDINXZHINXMIN-NEXT: fcvt.s.h a0, a0 312; CHECK64-IZDINXZHINXMIN-NEXT: fcvt.w.s a0, a0, rtz 313; CHECK64-IZDINXZHINXMIN-NEXT: ret 314; 315; CHECK32-D-LABEL: fcvt_w_h: 316; CHECK32-D: # %bb.0: 317; CHECK32-D-NEXT: addi sp, sp, -16 318; CHECK32-D-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 319; CHECK32-D-NEXT: fmv.x.w a0, fa0 320; CHECK32-D-NEXT: slli a0, a0, 16 321; CHECK32-D-NEXT: srli a0, a0, 16 322; CHECK32-D-NEXT: fmv.w.x fa0, a0 323; CHECK32-D-NEXT: call __extendhfsf2 324; CHECK32-D-NEXT: fcvt.w.s a0, fa0, rtz 325; CHECK32-D-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 326; CHECK32-D-NEXT: addi sp, sp, 16 327; CHECK32-D-NEXT: ret 328 %1 = call i32 @llvm.experimental.constrained.fptosi.i32.f16(half %a, metadata !"fpexcept.strict") 329 ret i32 %1 330} 331declare i32 @llvm.experimental.constrained.fptosi.i32.f16(half, metadata) 332 333define i32 @fcvt_wu_h(half %a) nounwind strictfp { 334; CHECKIZFH-LABEL: fcvt_wu_h: 335; CHECKIZFH: # %bb.0: 336; CHECKIZFH-NEXT: fcvt.wu.h a0, fa0, rtz 337; CHECKIZFH-NEXT: ret 338; 339; CHECKIZHINX-LABEL: fcvt_wu_h: 340; CHECKIZHINX: # %bb.0: 341; CHECKIZHINX-NEXT: fcvt.wu.h a0, a0, rtz 342; CHECKIZHINX-NEXT: ret 343; 344; RV32IDZFH-LABEL: fcvt_wu_h: 345; RV32IDZFH: # %bb.0: 346; RV32IDZFH-NEXT: fcvt.wu.h a0, fa0, rtz 347; RV32IDZFH-NEXT: ret 348; 349; RV64IDZFH-LABEL: fcvt_wu_h: 350; RV64IDZFH: # %bb.0: 351; RV64IDZFH-NEXT: fcvt.wu.h a0, fa0, rtz 352; RV64IDZFH-NEXT: ret 353; 354; RV32IZDINXZHINX-LABEL: fcvt_wu_h: 355; RV32IZDINXZHINX: # %bb.0: 356; RV32IZDINXZHINX-NEXT: fcvt.wu.h a0, a0, rtz 357; RV32IZDINXZHINX-NEXT: ret 358; 359; RV64IZDINXZHINX-LABEL: fcvt_wu_h: 360; RV64IZDINXZHINX: # %bb.0: 361; RV64IZDINXZHINX-NEXT: fcvt.wu.h a0, a0, rtz 362; RV64IZDINXZHINX-NEXT: ret 363; 364; CHECK32-IZFHMIN-LABEL: fcvt_wu_h: 365; CHECK32-IZFHMIN: # %bb.0: 366; CHECK32-IZFHMIN-NEXT: fcvt.s.h fa5, fa0 367; CHECK32-IZFHMIN-NEXT: fcvt.wu.s a0, fa5, rtz 368; CHECK32-IZFHMIN-NEXT: ret 369; 370; CHECK64-IZFHMIN-LABEL: fcvt_wu_h: 371; CHECK64-IZFHMIN: # %bb.0: 372; CHECK64-IZFHMIN-NEXT: fcvt.s.h fa5, fa0 373; CHECK64-IZFHMIN-NEXT: fcvt.wu.s a0, fa5, rtz 374; CHECK64-IZFHMIN-NEXT: ret 375; 376; CHECK32-IZHINXMIN-LABEL: fcvt_wu_h: 377; CHECK32-IZHINXMIN: # %bb.0: 378; CHECK32-IZHINXMIN-NEXT: fcvt.s.h a0, a0 379; CHECK32-IZHINXMIN-NEXT: fcvt.wu.s a0, a0, rtz 380; CHECK32-IZHINXMIN-NEXT: ret 381; 382; CHECK64-IZHINXMIN-LABEL: fcvt_wu_h: 383; CHECK64-IZHINXMIN: # %bb.0: 384; CHECK64-IZHINXMIN-NEXT: fcvt.s.h a0, a0 385; CHECK64-IZHINXMIN-NEXT: fcvt.wu.s a0, a0, rtz 386; CHECK64-IZHINXMIN-NEXT: ret 387; 388; CHECK32-IZDINXZHINXMIN-LABEL: fcvt_wu_h: 389; CHECK32-IZDINXZHINXMIN: # %bb.0: 390; CHECK32-IZDINXZHINXMIN-NEXT: fcvt.s.h a0, a0 391; CHECK32-IZDINXZHINXMIN-NEXT: fcvt.wu.s a0, a0, rtz 392; CHECK32-IZDINXZHINXMIN-NEXT: ret 393; 394; CHECK64-IZDINXZHINXMIN-LABEL: fcvt_wu_h: 395; CHECK64-IZDINXZHINXMIN: # %bb.0: 396; CHECK64-IZDINXZHINXMIN-NEXT: fcvt.s.h a0, a0 397; CHECK64-IZDINXZHINXMIN-NEXT: fcvt.wu.s a0, a0, rtz 398; CHECK64-IZDINXZHINXMIN-NEXT: ret 399; 400; CHECK32-D-LABEL: fcvt_wu_h: 401; CHECK32-D: # %bb.0: 402; CHECK32-D-NEXT: addi sp, sp, -16 403; CHECK32-D-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 404; CHECK32-D-NEXT: fmv.x.w a0, fa0 405; CHECK32-D-NEXT: slli a0, a0, 16 406; CHECK32-D-NEXT: srli a0, a0, 16 407; CHECK32-D-NEXT: fmv.w.x fa0, a0 408; CHECK32-D-NEXT: call __extendhfsf2 409; CHECK32-D-NEXT: fcvt.wu.s a0, fa0, rtz 410; CHECK32-D-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 411; CHECK32-D-NEXT: addi sp, sp, 16 412; CHECK32-D-NEXT: ret 413 %1 = call i32 @llvm.experimental.constrained.fptoui.i32.f16(half %a, metadata !"fpexcept.strict") 414 ret i32 %1 415} 416declare i32 @llvm.experimental.constrained.fptoui.i32.f16(half, metadata) 417 418; Test where the fptoui has multiple uses, one of which causes a sext to be 419; inserted on RV64. 420; FIXME: We should not have an fcvt.wu.h and an fcvt.lu.h. 421define i32 @fcvt_wu_h_multiple_use(half %x, ptr %y) strictfp { 422; CHECKIZFH-LABEL: fcvt_wu_h_multiple_use: 423; CHECKIZFH: # %bb.0: 424; CHECKIZFH-NEXT: fcvt.wu.h a0, fa0, rtz 425; CHECKIZFH-NEXT: seqz a1, a0 426; CHECKIZFH-NEXT: add a0, a0, a1 427; CHECKIZFH-NEXT: ret 428; 429; CHECKIZHINX-LABEL: fcvt_wu_h_multiple_use: 430; CHECKIZHINX: # %bb.0: 431; CHECKIZHINX-NEXT: fcvt.wu.h a0, a0, rtz 432; CHECKIZHINX-NEXT: seqz a1, a0 433; CHECKIZHINX-NEXT: add a0, a0, a1 434; CHECKIZHINX-NEXT: ret 435; 436; RV32IDZFH-LABEL: fcvt_wu_h_multiple_use: 437; RV32IDZFH: # %bb.0: 438; RV32IDZFH-NEXT: fcvt.wu.h a0, fa0, rtz 439; RV32IDZFH-NEXT: seqz a1, a0 440; RV32IDZFH-NEXT: add a0, a0, a1 441; RV32IDZFH-NEXT: ret 442; 443; RV64IDZFH-LABEL: fcvt_wu_h_multiple_use: 444; RV64IDZFH: # %bb.0: 445; RV64IDZFH-NEXT: fcvt.wu.h a0, fa0, rtz 446; RV64IDZFH-NEXT: seqz a1, a0 447; RV64IDZFH-NEXT: add a0, a0, a1 448; RV64IDZFH-NEXT: ret 449; 450; RV32IZDINXZHINX-LABEL: fcvt_wu_h_multiple_use: 451; RV32IZDINXZHINX: # %bb.0: 452; RV32IZDINXZHINX-NEXT: fcvt.wu.h a0, a0, rtz 453; RV32IZDINXZHINX-NEXT: seqz a1, a0 454; RV32IZDINXZHINX-NEXT: add a0, a0, a1 455; RV32IZDINXZHINX-NEXT: ret 456; 457; RV64IZDINXZHINX-LABEL: fcvt_wu_h_multiple_use: 458; RV64IZDINXZHINX: # %bb.0: 459; RV64IZDINXZHINX-NEXT: fcvt.wu.h a0, a0, rtz 460; RV64IZDINXZHINX-NEXT: seqz a1, a0 461; RV64IZDINXZHINX-NEXT: add a0, a0, a1 462; RV64IZDINXZHINX-NEXT: ret 463; 464; CHECK32-IZFHMIN-LABEL: fcvt_wu_h_multiple_use: 465; CHECK32-IZFHMIN: # %bb.0: 466; CHECK32-IZFHMIN-NEXT: fcvt.s.h fa5, fa0 467; CHECK32-IZFHMIN-NEXT: fcvt.wu.s a0, fa5, rtz 468; CHECK32-IZFHMIN-NEXT: seqz a1, a0 469; CHECK32-IZFHMIN-NEXT: add a0, a0, a1 470; CHECK32-IZFHMIN-NEXT: ret 471; 472; CHECK64-IZFHMIN-LABEL: fcvt_wu_h_multiple_use: 473; CHECK64-IZFHMIN: # %bb.0: 474; CHECK64-IZFHMIN-NEXT: fcvt.s.h fa5, fa0 475; CHECK64-IZFHMIN-NEXT: fcvt.wu.s a0, fa5, rtz 476; CHECK64-IZFHMIN-NEXT: seqz a1, a0 477; CHECK64-IZFHMIN-NEXT: add a0, a0, a1 478; CHECK64-IZFHMIN-NEXT: ret 479; 480; CHECK32-IZHINXMIN-LABEL: fcvt_wu_h_multiple_use: 481; CHECK32-IZHINXMIN: # %bb.0: 482; CHECK32-IZHINXMIN-NEXT: fcvt.s.h a0, a0 483; CHECK32-IZHINXMIN-NEXT: fcvt.wu.s a0, a0, rtz 484; CHECK32-IZHINXMIN-NEXT: seqz a1, a0 485; CHECK32-IZHINXMIN-NEXT: add a0, a0, a1 486; CHECK32-IZHINXMIN-NEXT: ret 487; 488; CHECK64-IZHINXMIN-LABEL: fcvt_wu_h_multiple_use: 489; CHECK64-IZHINXMIN: # %bb.0: 490; CHECK64-IZHINXMIN-NEXT: fcvt.s.h a0, a0 491; CHECK64-IZHINXMIN-NEXT: fcvt.wu.s a0, a0, rtz 492; CHECK64-IZHINXMIN-NEXT: seqz a1, a0 493; CHECK64-IZHINXMIN-NEXT: add a0, a0, a1 494; CHECK64-IZHINXMIN-NEXT: ret 495; 496; CHECK32-IZDINXZHINXMIN-LABEL: fcvt_wu_h_multiple_use: 497; CHECK32-IZDINXZHINXMIN: # %bb.0: 498; CHECK32-IZDINXZHINXMIN-NEXT: fcvt.s.h a0, a0 499; CHECK32-IZDINXZHINXMIN-NEXT: fcvt.wu.s a0, a0, rtz 500; CHECK32-IZDINXZHINXMIN-NEXT: seqz a1, a0 501; CHECK32-IZDINXZHINXMIN-NEXT: add a0, a0, a1 502; CHECK32-IZDINXZHINXMIN-NEXT: ret 503; 504; CHECK64-IZDINXZHINXMIN-LABEL: fcvt_wu_h_multiple_use: 505; CHECK64-IZDINXZHINXMIN: # %bb.0: 506; CHECK64-IZDINXZHINXMIN-NEXT: fcvt.s.h a0, a0 507; CHECK64-IZDINXZHINXMIN-NEXT: fcvt.wu.s a0, a0, rtz 508; CHECK64-IZDINXZHINXMIN-NEXT: seqz a1, a0 509; CHECK64-IZDINXZHINXMIN-NEXT: add a0, a0, a1 510; CHECK64-IZDINXZHINXMIN-NEXT: ret 511; 512; CHECK32-D-LABEL: fcvt_wu_h_multiple_use: 513; CHECK32-D: # %bb.0: 514; CHECK32-D-NEXT: addi sp, sp, -16 515; CHECK32-D-NEXT: .cfi_def_cfa_offset 16 516; CHECK32-D-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 517; CHECK32-D-NEXT: .cfi_offset ra, -4 518; CHECK32-D-NEXT: fmv.x.w a0, fa0 519; CHECK32-D-NEXT: slli a0, a0, 16 520; CHECK32-D-NEXT: srli a0, a0, 16 521; CHECK32-D-NEXT: fmv.w.x fa0, a0 522; CHECK32-D-NEXT: call __extendhfsf2 523; CHECK32-D-NEXT: fcvt.wu.s a0, fa0, rtz 524; CHECK32-D-NEXT: seqz a1, a0 525; CHECK32-D-NEXT: add a0, a0, a1 526; CHECK32-D-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 527; CHECK32-D-NEXT: .cfi_restore ra 528; CHECK32-D-NEXT: addi sp, sp, 16 529; CHECK32-D-NEXT: .cfi_def_cfa_offset 0 530; CHECK32-D-NEXT: ret 531 %a = call i32 @llvm.experimental.constrained.fptoui.i32.f16(half %x, metadata !"fpexcept.strict") 532 %b = icmp eq i32 %a, 0 533 %c = select i1 %b, i32 1, i32 %a 534 ret i32 %c 535} 536 537define i64 @fcvt_l_h(half %a) nounwind strictfp { 538; RV32IZFH-LABEL: fcvt_l_h: 539; RV32IZFH: # %bb.0: 540; RV32IZFH-NEXT: addi sp, sp, -16 541; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 542; RV32IZFH-NEXT: call __fixhfdi 543; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 544; RV32IZFH-NEXT: addi sp, sp, 16 545; RV32IZFH-NEXT: ret 546; 547; RV64IZFH-LABEL: fcvt_l_h: 548; RV64IZFH: # %bb.0: 549; RV64IZFH-NEXT: fcvt.l.h a0, fa0, rtz 550; RV64IZFH-NEXT: ret 551; 552; RV32IZHINX-LABEL: fcvt_l_h: 553; RV32IZHINX: # %bb.0: 554; RV32IZHINX-NEXT: addi sp, sp, -16 555; RV32IZHINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 556; RV32IZHINX-NEXT: call __fixhfdi 557; RV32IZHINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 558; RV32IZHINX-NEXT: addi sp, sp, 16 559; RV32IZHINX-NEXT: ret 560; 561; RV64IZHINX-LABEL: fcvt_l_h: 562; RV64IZHINX: # %bb.0: 563; RV64IZHINX-NEXT: fcvt.l.h a0, a0, rtz 564; RV64IZHINX-NEXT: ret 565; 566; RV32IDZFH-LABEL: fcvt_l_h: 567; RV32IDZFH: # %bb.0: 568; RV32IDZFH-NEXT: addi sp, sp, -16 569; RV32IDZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 570; RV32IDZFH-NEXT: call __fixhfdi 571; RV32IDZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 572; RV32IDZFH-NEXT: addi sp, sp, 16 573; RV32IDZFH-NEXT: ret 574; 575; RV64IDZFH-LABEL: fcvt_l_h: 576; RV64IDZFH: # %bb.0: 577; RV64IDZFH-NEXT: fcvt.l.h a0, fa0, rtz 578; RV64IDZFH-NEXT: ret 579; 580; RV32IZDINXZHINX-LABEL: fcvt_l_h: 581; RV32IZDINXZHINX: # %bb.0: 582; RV32IZDINXZHINX-NEXT: addi sp, sp, -16 583; RV32IZDINXZHINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 584; RV32IZDINXZHINX-NEXT: call __fixhfdi 585; RV32IZDINXZHINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 586; RV32IZDINXZHINX-NEXT: addi sp, sp, 16 587; RV32IZDINXZHINX-NEXT: ret 588; 589; RV64IZDINXZHINX-LABEL: fcvt_l_h: 590; RV64IZDINXZHINX: # %bb.0: 591; RV64IZDINXZHINX-NEXT: fcvt.l.h a0, a0, rtz 592; RV64IZDINXZHINX-NEXT: ret 593; 594; CHECK32-IZFHMIN-LABEL: fcvt_l_h: 595; CHECK32-IZFHMIN: # %bb.0: 596; CHECK32-IZFHMIN-NEXT: addi sp, sp, -16 597; CHECK32-IZFHMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 598; CHECK32-IZFHMIN-NEXT: call __fixhfdi 599; CHECK32-IZFHMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 600; CHECK32-IZFHMIN-NEXT: addi sp, sp, 16 601; CHECK32-IZFHMIN-NEXT: ret 602; 603; CHECK64-IZFHMIN-LABEL: fcvt_l_h: 604; CHECK64-IZFHMIN: # %bb.0: 605; CHECK64-IZFHMIN-NEXT: fcvt.s.h fa5, fa0 606; CHECK64-IZFHMIN-NEXT: fcvt.l.s a0, fa5, rtz 607; CHECK64-IZFHMIN-NEXT: ret 608; 609; CHECK32-IZHINXMIN-LABEL: fcvt_l_h: 610; CHECK32-IZHINXMIN: # %bb.0: 611; CHECK32-IZHINXMIN-NEXT: addi sp, sp, -16 612; CHECK32-IZHINXMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 613; CHECK32-IZHINXMIN-NEXT: call __fixhfdi 614; CHECK32-IZHINXMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 615; CHECK32-IZHINXMIN-NEXT: addi sp, sp, 16 616; CHECK32-IZHINXMIN-NEXT: ret 617; 618; CHECK64-IZHINXMIN-LABEL: fcvt_l_h: 619; CHECK64-IZHINXMIN: # %bb.0: 620; CHECK64-IZHINXMIN-NEXT: fcvt.s.h a0, a0 621; CHECK64-IZHINXMIN-NEXT: fcvt.l.s a0, a0, rtz 622; CHECK64-IZHINXMIN-NEXT: ret 623; 624; CHECK32-IZDINXZHINXMIN-LABEL: fcvt_l_h: 625; CHECK32-IZDINXZHINXMIN: # %bb.0: 626; CHECK32-IZDINXZHINXMIN-NEXT: addi sp, sp, -16 627; CHECK32-IZDINXZHINXMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 628; CHECK32-IZDINXZHINXMIN-NEXT: call __fixhfdi 629; CHECK32-IZDINXZHINXMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 630; CHECK32-IZDINXZHINXMIN-NEXT: addi sp, sp, 16 631; CHECK32-IZDINXZHINXMIN-NEXT: ret 632; 633; CHECK64-IZDINXZHINXMIN-LABEL: fcvt_l_h: 634; CHECK64-IZDINXZHINXMIN: # %bb.0: 635; CHECK64-IZDINXZHINXMIN-NEXT: fcvt.s.h a0, a0 636; CHECK64-IZDINXZHINXMIN-NEXT: fcvt.l.s a0, a0, rtz 637; CHECK64-IZDINXZHINXMIN-NEXT: ret 638; 639; CHECK32-D-LABEL: fcvt_l_h: 640; CHECK32-D: # %bb.0: 641; CHECK32-D-NEXT: addi sp, sp, -16 642; CHECK32-D-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 643; CHECK32-D-NEXT: fmv.x.w a0, fa0 644; CHECK32-D-NEXT: slli a0, a0, 16 645; CHECK32-D-NEXT: srli a0, a0, 16 646; CHECK32-D-NEXT: fmv.w.x fa0, a0 647; CHECK32-D-NEXT: call __extendhfsf2 648; CHECK32-D-NEXT: call __fixsfdi 649; CHECK32-D-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 650; CHECK32-D-NEXT: addi sp, sp, 16 651; CHECK32-D-NEXT: ret 652 %1 = call i64 @llvm.experimental.constrained.fptosi.i64.f16(half %a, metadata !"fpexcept.strict") 653 ret i64 %1 654} 655declare i64 @llvm.experimental.constrained.fptosi.i64.f16(half, metadata) 656 657define i64 @fcvt_lu_h(half %a) nounwind strictfp { 658; RV32IZFH-LABEL: fcvt_lu_h: 659; RV32IZFH: # %bb.0: 660; RV32IZFH-NEXT: addi sp, sp, -16 661; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 662; RV32IZFH-NEXT: call __fixunshfdi 663; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 664; RV32IZFH-NEXT: addi sp, sp, 16 665; RV32IZFH-NEXT: ret 666; 667; RV64IZFH-LABEL: fcvt_lu_h: 668; RV64IZFH: # %bb.0: 669; RV64IZFH-NEXT: fcvt.lu.h a0, fa0, rtz 670; RV64IZFH-NEXT: ret 671; 672; RV32IZHINX-LABEL: fcvt_lu_h: 673; RV32IZHINX: # %bb.0: 674; RV32IZHINX-NEXT: addi sp, sp, -16 675; RV32IZHINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 676; RV32IZHINX-NEXT: call __fixunshfdi 677; RV32IZHINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 678; RV32IZHINX-NEXT: addi sp, sp, 16 679; RV32IZHINX-NEXT: ret 680; 681; RV64IZHINX-LABEL: fcvt_lu_h: 682; RV64IZHINX: # %bb.0: 683; RV64IZHINX-NEXT: fcvt.lu.h a0, a0, rtz 684; RV64IZHINX-NEXT: ret 685; 686; RV32IDZFH-LABEL: fcvt_lu_h: 687; RV32IDZFH: # %bb.0: 688; RV32IDZFH-NEXT: addi sp, sp, -16 689; RV32IDZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 690; RV32IDZFH-NEXT: call __fixunshfdi 691; RV32IDZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 692; RV32IDZFH-NEXT: addi sp, sp, 16 693; RV32IDZFH-NEXT: ret 694; 695; RV64IDZFH-LABEL: fcvt_lu_h: 696; RV64IDZFH: # %bb.0: 697; RV64IDZFH-NEXT: fcvt.lu.h a0, fa0, rtz 698; RV64IDZFH-NEXT: ret 699; 700; RV32IZDINXZHINX-LABEL: fcvt_lu_h: 701; RV32IZDINXZHINX: # %bb.0: 702; RV32IZDINXZHINX-NEXT: addi sp, sp, -16 703; RV32IZDINXZHINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 704; RV32IZDINXZHINX-NEXT: call __fixunshfdi 705; RV32IZDINXZHINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 706; RV32IZDINXZHINX-NEXT: addi sp, sp, 16 707; RV32IZDINXZHINX-NEXT: ret 708; 709; RV64IZDINXZHINX-LABEL: fcvt_lu_h: 710; RV64IZDINXZHINX: # %bb.0: 711; RV64IZDINXZHINX-NEXT: fcvt.lu.h a0, a0, rtz 712; RV64IZDINXZHINX-NEXT: ret 713; 714; CHECK32-IZFHMIN-LABEL: fcvt_lu_h: 715; CHECK32-IZFHMIN: # %bb.0: 716; CHECK32-IZFHMIN-NEXT: addi sp, sp, -16 717; CHECK32-IZFHMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 718; CHECK32-IZFHMIN-NEXT: call __fixunshfdi 719; CHECK32-IZFHMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 720; CHECK32-IZFHMIN-NEXT: addi sp, sp, 16 721; CHECK32-IZFHMIN-NEXT: ret 722; 723; CHECK64-IZFHMIN-LABEL: fcvt_lu_h: 724; CHECK64-IZFHMIN: # %bb.0: 725; CHECK64-IZFHMIN-NEXT: fcvt.s.h fa5, fa0 726; CHECK64-IZFHMIN-NEXT: fcvt.lu.s a0, fa5, rtz 727; CHECK64-IZFHMIN-NEXT: ret 728; 729; CHECK32-IZHINXMIN-LABEL: fcvt_lu_h: 730; CHECK32-IZHINXMIN: # %bb.0: 731; CHECK32-IZHINXMIN-NEXT: addi sp, sp, -16 732; CHECK32-IZHINXMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 733; CHECK32-IZHINXMIN-NEXT: call __fixunshfdi 734; CHECK32-IZHINXMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 735; CHECK32-IZHINXMIN-NEXT: addi sp, sp, 16 736; CHECK32-IZHINXMIN-NEXT: ret 737; 738; CHECK64-IZHINXMIN-LABEL: fcvt_lu_h: 739; CHECK64-IZHINXMIN: # %bb.0: 740; CHECK64-IZHINXMIN-NEXT: fcvt.s.h a0, a0 741; CHECK64-IZHINXMIN-NEXT: fcvt.lu.s a0, a0, rtz 742; CHECK64-IZHINXMIN-NEXT: ret 743; 744; CHECK32-IZDINXZHINXMIN-LABEL: fcvt_lu_h: 745; CHECK32-IZDINXZHINXMIN: # %bb.0: 746; CHECK32-IZDINXZHINXMIN-NEXT: addi sp, sp, -16 747; CHECK32-IZDINXZHINXMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 748; CHECK32-IZDINXZHINXMIN-NEXT: call __fixunshfdi 749; CHECK32-IZDINXZHINXMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 750; CHECK32-IZDINXZHINXMIN-NEXT: addi sp, sp, 16 751; CHECK32-IZDINXZHINXMIN-NEXT: ret 752; 753; CHECK64-IZDINXZHINXMIN-LABEL: fcvt_lu_h: 754; CHECK64-IZDINXZHINXMIN: # %bb.0: 755; CHECK64-IZDINXZHINXMIN-NEXT: fcvt.s.h a0, a0 756; CHECK64-IZDINXZHINXMIN-NEXT: fcvt.lu.s a0, a0, rtz 757; CHECK64-IZDINXZHINXMIN-NEXT: ret 758; 759; CHECK32-D-LABEL: fcvt_lu_h: 760; CHECK32-D: # %bb.0: 761; CHECK32-D-NEXT: addi sp, sp, -16 762; CHECK32-D-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 763; CHECK32-D-NEXT: fmv.x.w a0, fa0 764; CHECK32-D-NEXT: slli a0, a0, 16 765; CHECK32-D-NEXT: srli a0, a0, 16 766; CHECK32-D-NEXT: fmv.w.x fa0, a0 767; CHECK32-D-NEXT: call __extendhfsf2 768; CHECK32-D-NEXT: call __fixunssfdi 769; CHECK32-D-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 770; CHECK32-D-NEXT: addi sp, sp, 16 771; CHECK32-D-NEXT: ret 772 %1 = call i64 @llvm.experimental.constrained.fptoui.i64.f16(half %a, metadata !"fpexcept.strict") 773 ret i64 %1 774} 775declare i64 @llvm.experimental.constrained.fptoui.i64.f16(half, metadata) 776 777define half @fcvt_h_si(i16 %a) nounwind strictfp { 778; RV32IZFH-LABEL: fcvt_h_si: 779; RV32IZFH: # %bb.0: 780; RV32IZFH-NEXT: slli a0, a0, 16 781; RV32IZFH-NEXT: srai a0, a0, 16 782; RV32IZFH-NEXT: fcvt.h.w fa0, a0 783; RV32IZFH-NEXT: ret 784; 785; RV64IZFH-LABEL: fcvt_h_si: 786; RV64IZFH: # %bb.0: 787; RV64IZFH-NEXT: slli a0, a0, 48 788; RV64IZFH-NEXT: srai a0, a0, 48 789; RV64IZFH-NEXT: fcvt.h.w fa0, a0 790; RV64IZFH-NEXT: ret 791; 792; RV32IZHINX-LABEL: fcvt_h_si: 793; RV32IZHINX: # %bb.0: 794; RV32IZHINX-NEXT: slli a0, a0, 16 795; RV32IZHINX-NEXT: srai a0, a0, 16 796; RV32IZHINX-NEXT: fcvt.h.w a0, a0 797; RV32IZHINX-NEXT: ret 798; 799; RV64IZHINX-LABEL: fcvt_h_si: 800; RV64IZHINX: # %bb.0: 801; RV64IZHINX-NEXT: slli a0, a0, 48 802; RV64IZHINX-NEXT: srai a0, a0, 48 803; RV64IZHINX-NEXT: fcvt.h.w a0, a0 804; RV64IZHINX-NEXT: ret 805; 806; RV32IDZFH-LABEL: fcvt_h_si: 807; RV32IDZFH: # %bb.0: 808; RV32IDZFH-NEXT: slli a0, a0, 16 809; RV32IDZFH-NEXT: srai a0, a0, 16 810; RV32IDZFH-NEXT: fcvt.h.w fa0, a0 811; RV32IDZFH-NEXT: ret 812; 813; RV64IDZFH-LABEL: fcvt_h_si: 814; RV64IDZFH: # %bb.0: 815; RV64IDZFH-NEXT: slli a0, a0, 48 816; RV64IDZFH-NEXT: srai a0, a0, 48 817; RV64IDZFH-NEXT: fcvt.h.w fa0, a0 818; RV64IDZFH-NEXT: ret 819; 820; RV32IZDINXZHINX-LABEL: fcvt_h_si: 821; RV32IZDINXZHINX: # %bb.0: 822; RV32IZDINXZHINX-NEXT: slli a0, a0, 16 823; RV32IZDINXZHINX-NEXT: srai a0, a0, 16 824; RV32IZDINXZHINX-NEXT: fcvt.h.w a0, a0 825; RV32IZDINXZHINX-NEXT: ret 826; 827; RV64IZDINXZHINX-LABEL: fcvt_h_si: 828; RV64IZDINXZHINX: # %bb.0: 829; RV64IZDINXZHINX-NEXT: slli a0, a0, 48 830; RV64IZDINXZHINX-NEXT: srai a0, a0, 48 831; RV64IZDINXZHINX-NEXT: fcvt.h.w a0, a0 832; RV64IZDINXZHINX-NEXT: ret 833; 834; CHECK32-IZFHMIN-LABEL: fcvt_h_si: 835; CHECK32-IZFHMIN: # %bb.0: 836; CHECK32-IZFHMIN-NEXT: slli a0, a0, 16 837; CHECK32-IZFHMIN-NEXT: srai a0, a0, 16 838; CHECK32-IZFHMIN-NEXT: fcvt.s.w fa5, a0 839; CHECK32-IZFHMIN-NEXT: fcvt.h.s fa0, fa5 840; CHECK32-IZFHMIN-NEXT: ret 841; 842; CHECK64-IZFHMIN-LABEL: fcvt_h_si: 843; CHECK64-IZFHMIN: # %bb.0: 844; CHECK64-IZFHMIN-NEXT: slli a0, a0, 48 845; CHECK64-IZFHMIN-NEXT: srai a0, a0, 48 846; CHECK64-IZFHMIN-NEXT: fcvt.s.w fa5, a0 847; CHECK64-IZFHMIN-NEXT: fcvt.h.s fa0, fa5 848; CHECK64-IZFHMIN-NEXT: ret 849; 850; CHECK32-IZHINXMIN-LABEL: fcvt_h_si: 851; CHECK32-IZHINXMIN: # %bb.0: 852; CHECK32-IZHINXMIN-NEXT: slli a0, a0, 16 853; CHECK32-IZHINXMIN-NEXT: srai a0, a0, 16 854; CHECK32-IZHINXMIN-NEXT: fcvt.s.w a0, a0 855; CHECK32-IZHINXMIN-NEXT: fcvt.h.s a0, a0 856; CHECK32-IZHINXMIN-NEXT: ret 857; 858; CHECK64-IZHINXMIN-LABEL: fcvt_h_si: 859; CHECK64-IZHINXMIN: # %bb.0: 860; CHECK64-IZHINXMIN-NEXT: slli a0, a0, 48 861; CHECK64-IZHINXMIN-NEXT: srai a0, a0, 48 862; CHECK64-IZHINXMIN-NEXT: fcvt.s.w a0, a0 863; CHECK64-IZHINXMIN-NEXT: fcvt.h.s a0, a0 864; CHECK64-IZHINXMIN-NEXT: ret 865; 866; CHECK32-IZDINXZHINXMIN-LABEL: fcvt_h_si: 867; CHECK32-IZDINXZHINXMIN: # %bb.0: 868; CHECK32-IZDINXZHINXMIN-NEXT: slli a0, a0, 16 869; CHECK32-IZDINXZHINXMIN-NEXT: srai a0, a0, 16 870; CHECK32-IZDINXZHINXMIN-NEXT: fcvt.s.w a0, a0 871; CHECK32-IZDINXZHINXMIN-NEXT: fcvt.h.s a0, a0 872; CHECK32-IZDINXZHINXMIN-NEXT: ret 873; 874; CHECK64-IZDINXZHINXMIN-LABEL: fcvt_h_si: 875; CHECK64-IZDINXZHINXMIN: # %bb.0: 876; CHECK64-IZDINXZHINXMIN-NEXT: slli a0, a0, 48 877; CHECK64-IZDINXZHINXMIN-NEXT: srai a0, a0, 48 878; CHECK64-IZDINXZHINXMIN-NEXT: fcvt.s.w a0, a0 879; CHECK64-IZDINXZHINXMIN-NEXT: fcvt.h.s a0, a0 880; CHECK64-IZDINXZHINXMIN-NEXT: ret 881; 882; CHECK32-D-LABEL: fcvt_h_si: 883; CHECK32-D: # %bb.0: 884; CHECK32-D-NEXT: addi sp, sp, -16 885; CHECK32-D-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 886; CHECK32-D-NEXT: slli a0, a0, 16 887; CHECK32-D-NEXT: srai a0, a0, 16 888; CHECK32-D-NEXT: fcvt.s.w fa0, a0 889; CHECK32-D-NEXT: call __truncsfhf2 890; CHECK32-D-NEXT: fmv.x.w a0, fa0 891; CHECK32-D-NEXT: lui a1, 1048560 892; CHECK32-D-NEXT: or a0, a0, a1 893; CHECK32-D-NEXT: fmv.w.x fa0, a0 894; CHECK32-D-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 895; CHECK32-D-NEXT: addi sp, sp, 16 896; CHECK32-D-NEXT: ret 897 %1 = call half @llvm.experimental.constrained.sitofp.f16.i16(i16 %a, metadata !"round.dynamic", metadata !"fpexcept.strict") 898 ret half %1 899} 900declare half @llvm.experimental.constrained.sitofp.f16.i16(i16, metadata, metadata) 901 902define half @fcvt_h_si_signext(i16 signext %a) nounwind strictfp { 903; CHECKIZFH-LABEL: fcvt_h_si_signext: 904; CHECKIZFH: # %bb.0: 905; CHECKIZFH-NEXT: fcvt.h.w fa0, a0 906; CHECKIZFH-NEXT: ret 907; 908; CHECKIZHINX-LABEL: fcvt_h_si_signext: 909; CHECKIZHINX: # %bb.0: 910; CHECKIZHINX-NEXT: fcvt.h.w a0, a0 911; CHECKIZHINX-NEXT: ret 912; 913; RV32IDZFH-LABEL: fcvt_h_si_signext: 914; RV32IDZFH: # %bb.0: 915; RV32IDZFH-NEXT: fcvt.h.w fa0, a0 916; RV32IDZFH-NEXT: ret 917; 918; RV64IDZFH-LABEL: fcvt_h_si_signext: 919; RV64IDZFH: # %bb.0: 920; RV64IDZFH-NEXT: fcvt.h.w fa0, a0 921; RV64IDZFH-NEXT: ret 922; 923; RV32IZDINXZHINX-LABEL: fcvt_h_si_signext: 924; RV32IZDINXZHINX: # %bb.0: 925; RV32IZDINXZHINX-NEXT: fcvt.h.w a0, a0 926; RV32IZDINXZHINX-NEXT: ret 927; 928; RV64IZDINXZHINX-LABEL: fcvt_h_si_signext: 929; RV64IZDINXZHINX: # %bb.0: 930; RV64IZDINXZHINX-NEXT: fcvt.h.w a0, a0 931; RV64IZDINXZHINX-NEXT: ret 932; 933; CHECK32-IZFHMIN-LABEL: fcvt_h_si_signext: 934; CHECK32-IZFHMIN: # %bb.0: 935; CHECK32-IZFHMIN-NEXT: fcvt.s.w fa5, a0 936; CHECK32-IZFHMIN-NEXT: fcvt.h.s fa0, fa5 937; CHECK32-IZFHMIN-NEXT: ret 938; 939; CHECK64-IZFHMIN-LABEL: fcvt_h_si_signext: 940; CHECK64-IZFHMIN: # %bb.0: 941; CHECK64-IZFHMIN-NEXT: fcvt.s.w fa5, a0 942; CHECK64-IZFHMIN-NEXT: fcvt.h.s fa0, fa5 943; CHECK64-IZFHMIN-NEXT: ret 944; 945; CHECK32-IZHINXMIN-LABEL: fcvt_h_si_signext: 946; CHECK32-IZHINXMIN: # %bb.0: 947; CHECK32-IZHINXMIN-NEXT: fcvt.s.w a0, a0 948; CHECK32-IZHINXMIN-NEXT: fcvt.h.s a0, a0 949; CHECK32-IZHINXMIN-NEXT: ret 950; 951; CHECK64-IZHINXMIN-LABEL: fcvt_h_si_signext: 952; CHECK64-IZHINXMIN: # %bb.0: 953; CHECK64-IZHINXMIN-NEXT: fcvt.s.w a0, a0 954; CHECK64-IZHINXMIN-NEXT: fcvt.h.s a0, a0 955; CHECK64-IZHINXMIN-NEXT: ret 956; 957; CHECK32-IZDINXZHINXMIN-LABEL: fcvt_h_si_signext: 958; CHECK32-IZDINXZHINXMIN: # %bb.0: 959; CHECK32-IZDINXZHINXMIN-NEXT: fcvt.s.w a0, a0 960; CHECK32-IZDINXZHINXMIN-NEXT: fcvt.h.s a0, a0 961; CHECK32-IZDINXZHINXMIN-NEXT: ret 962; 963; CHECK64-IZDINXZHINXMIN-LABEL: fcvt_h_si_signext: 964; CHECK64-IZDINXZHINXMIN: # %bb.0: 965; CHECK64-IZDINXZHINXMIN-NEXT: fcvt.s.w a0, a0 966; CHECK64-IZDINXZHINXMIN-NEXT: fcvt.h.s a0, a0 967; CHECK64-IZDINXZHINXMIN-NEXT: ret 968; 969; CHECK32-D-LABEL: fcvt_h_si_signext: 970; CHECK32-D: # %bb.0: 971; CHECK32-D-NEXT: addi sp, sp, -16 972; CHECK32-D-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 973; CHECK32-D-NEXT: fcvt.s.w fa0, a0 974; CHECK32-D-NEXT: call __truncsfhf2 975; CHECK32-D-NEXT: fmv.x.w a0, fa0 976; CHECK32-D-NEXT: lui a1, 1048560 977; CHECK32-D-NEXT: or a0, a0, a1 978; CHECK32-D-NEXT: fmv.w.x fa0, a0 979; CHECK32-D-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 980; CHECK32-D-NEXT: addi sp, sp, 16 981; CHECK32-D-NEXT: ret 982 %1 = call half @llvm.experimental.constrained.sitofp.f16.i16(i16 %a, metadata !"round.dynamic", metadata !"fpexcept.strict") 983 ret half %1 984} 985 986define half @fcvt_h_ui(i16 %a) nounwind strictfp { 987; RV32IZFH-LABEL: fcvt_h_ui: 988; RV32IZFH: # %bb.0: 989; RV32IZFH-NEXT: slli a0, a0, 16 990; RV32IZFH-NEXT: srli a0, a0, 16 991; RV32IZFH-NEXT: fcvt.h.wu fa0, a0 992; RV32IZFH-NEXT: ret 993; 994; RV64IZFH-LABEL: fcvt_h_ui: 995; RV64IZFH: # %bb.0: 996; RV64IZFH-NEXT: slli a0, a0, 48 997; RV64IZFH-NEXT: srli a0, a0, 48 998; RV64IZFH-NEXT: fcvt.h.wu fa0, a0 999; RV64IZFH-NEXT: ret 1000; 1001; RV32IZHINX-LABEL: fcvt_h_ui: 1002; RV32IZHINX: # %bb.0: 1003; RV32IZHINX-NEXT: slli a0, a0, 16 1004; RV32IZHINX-NEXT: srli a0, a0, 16 1005; RV32IZHINX-NEXT: fcvt.h.wu a0, a0 1006; RV32IZHINX-NEXT: ret 1007; 1008; RV64IZHINX-LABEL: fcvt_h_ui: 1009; RV64IZHINX: # %bb.0: 1010; RV64IZHINX-NEXT: slli a0, a0, 48 1011; RV64IZHINX-NEXT: srli a0, a0, 48 1012; RV64IZHINX-NEXT: fcvt.h.wu a0, a0 1013; RV64IZHINX-NEXT: ret 1014; 1015; RV32IDZFH-LABEL: fcvt_h_ui: 1016; RV32IDZFH: # %bb.0: 1017; RV32IDZFH-NEXT: slli a0, a0, 16 1018; RV32IDZFH-NEXT: srli a0, a0, 16 1019; RV32IDZFH-NEXT: fcvt.h.wu fa0, a0 1020; RV32IDZFH-NEXT: ret 1021; 1022; RV64IDZFH-LABEL: fcvt_h_ui: 1023; RV64IDZFH: # %bb.0: 1024; RV64IDZFH-NEXT: slli a0, a0, 48 1025; RV64IDZFH-NEXT: srli a0, a0, 48 1026; RV64IDZFH-NEXT: fcvt.h.wu fa0, a0 1027; RV64IDZFH-NEXT: ret 1028; 1029; RV32IZDINXZHINX-LABEL: fcvt_h_ui: 1030; RV32IZDINXZHINX: # %bb.0: 1031; RV32IZDINXZHINX-NEXT: slli a0, a0, 16 1032; RV32IZDINXZHINX-NEXT: srli a0, a0, 16 1033; RV32IZDINXZHINX-NEXT: fcvt.h.wu a0, a0 1034; RV32IZDINXZHINX-NEXT: ret 1035; 1036; RV64IZDINXZHINX-LABEL: fcvt_h_ui: 1037; RV64IZDINXZHINX: # %bb.0: 1038; RV64IZDINXZHINX-NEXT: slli a0, a0, 48 1039; RV64IZDINXZHINX-NEXT: srli a0, a0, 48 1040; RV64IZDINXZHINX-NEXT: fcvt.h.wu a0, a0 1041; RV64IZDINXZHINX-NEXT: ret 1042; 1043; CHECK32-IZFHMIN-LABEL: fcvt_h_ui: 1044; CHECK32-IZFHMIN: # %bb.0: 1045; CHECK32-IZFHMIN-NEXT: slli a0, a0, 16 1046; CHECK32-IZFHMIN-NEXT: srli a0, a0, 16 1047; CHECK32-IZFHMIN-NEXT: fcvt.s.wu fa5, a0 1048; CHECK32-IZFHMIN-NEXT: fcvt.h.s fa0, fa5 1049; CHECK32-IZFHMIN-NEXT: ret 1050; 1051; CHECK64-IZFHMIN-LABEL: fcvt_h_ui: 1052; CHECK64-IZFHMIN: # %bb.0: 1053; CHECK64-IZFHMIN-NEXT: slli a0, a0, 48 1054; CHECK64-IZFHMIN-NEXT: srli a0, a0, 48 1055; CHECK64-IZFHMIN-NEXT: fcvt.s.wu fa5, a0 1056; CHECK64-IZFHMIN-NEXT: fcvt.h.s fa0, fa5 1057; CHECK64-IZFHMIN-NEXT: ret 1058; 1059; CHECK32-IZHINXMIN-LABEL: fcvt_h_ui: 1060; CHECK32-IZHINXMIN: # %bb.0: 1061; CHECK32-IZHINXMIN-NEXT: slli a0, a0, 16 1062; CHECK32-IZHINXMIN-NEXT: srli a0, a0, 16 1063; CHECK32-IZHINXMIN-NEXT: fcvt.s.wu a0, a0 1064; CHECK32-IZHINXMIN-NEXT: fcvt.h.s a0, a0 1065; CHECK32-IZHINXMIN-NEXT: ret 1066; 1067; CHECK64-IZHINXMIN-LABEL: fcvt_h_ui: 1068; CHECK64-IZHINXMIN: # %bb.0: 1069; CHECK64-IZHINXMIN-NEXT: slli a0, a0, 48 1070; CHECK64-IZHINXMIN-NEXT: srli a0, a0, 48 1071; CHECK64-IZHINXMIN-NEXT: fcvt.s.wu a0, a0 1072; CHECK64-IZHINXMIN-NEXT: fcvt.h.s a0, a0 1073; CHECK64-IZHINXMIN-NEXT: ret 1074; 1075; CHECK32-IZDINXZHINXMIN-LABEL: fcvt_h_ui: 1076; CHECK32-IZDINXZHINXMIN: # %bb.0: 1077; CHECK32-IZDINXZHINXMIN-NEXT: slli a0, a0, 16 1078; CHECK32-IZDINXZHINXMIN-NEXT: srli a0, a0, 16 1079; CHECK32-IZDINXZHINXMIN-NEXT: fcvt.s.wu a0, a0 1080; CHECK32-IZDINXZHINXMIN-NEXT: fcvt.h.s a0, a0 1081; CHECK32-IZDINXZHINXMIN-NEXT: ret 1082; 1083; CHECK64-IZDINXZHINXMIN-LABEL: fcvt_h_ui: 1084; CHECK64-IZDINXZHINXMIN: # %bb.0: 1085; CHECK64-IZDINXZHINXMIN-NEXT: slli a0, a0, 48 1086; CHECK64-IZDINXZHINXMIN-NEXT: srli a0, a0, 48 1087; CHECK64-IZDINXZHINXMIN-NEXT: fcvt.s.wu a0, a0 1088; CHECK64-IZDINXZHINXMIN-NEXT: fcvt.h.s a0, a0 1089; CHECK64-IZDINXZHINXMIN-NEXT: ret 1090; 1091; CHECK32-D-LABEL: fcvt_h_ui: 1092; CHECK32-D: # %bb.0: 1093; CHECK32-D-NEXT: addi sp, sp, -16 1094; CHECK32-D-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1095; CHECK32-D-NEXT: slli a0, a0, 16 1096; CHECK32-D-NEXT: srli a0, a0, 16 1097; CHECK32-D-NEXT: fcvt.s.wu fa0, a0 1098; CHECK32-D-NEXT: call __truncsfhf2 1099; CHECK32-D-NEXT: fmv.x.w a0, fa0 1100; CHECK32-D-NEXT: lui a1, 1048560 1101; CHECK32-D-NEXT: or a0, a0, a1 1102; CHECK32-D-NEXT: fmv.w.x fa0, a0 1103; CHECK32-D-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1104; CHECK32-D-NEXT: addi sp, sp, 16 1105; CHECK32-D-NEXT: ret 1106 %1 = call half @llvm.experimental.constrained.uitofp.f16.i16(i16 %a, metadata !"round.dynamic", metadata !"fpexcept.strict") 1107 ret half %1 1108} 1109declare half @llvm.experimental.constrained.uitofp.f16.i16(i16, metadata, metadata) 1110 1111define half @fcvt_h_ui_zeroext(i16 zeroext %a) nounwind strictfp { 1112; CHECKIZFH-LABEL: fcvt_h_ui_zeroext: 1113; CHECKIZFH: # %bb.0: 1114; CHECKIZFH-NEXT: fcvt.h.wu fa0, a0 1115; CHECKIZFH-NEXT: ret 1116; 1117; CHECKIZHINX-LABEL: fcvt_h_ui_zeroext: 1118; CHECKIZHINX: # %bb.0: 1119; CHECKIZHINX-NEXT: fcvt.h.wu a0, a0 1120; CHECKIZHINX-NEXT: ret 1121; 1122; RV32IDZFH-LABEL: fcvt_h_ui_zeroext: 1123; RV32IDZFH: # %bb.0: 1124; RV32IDZFH-NEXT: fcvt.h.wu fa0, a0 1125; RV32IDZFH-NEXT: ret 1126; 1127; RV64IDZFH-LABEL: fcvt_h_ui_zeroext: 1128; RV64IDZFH: # %bb.0: 1129; RV64IDZFH-NEXT: fcvt.h.wu fa0, a0 1130; RV64IDZFH-NEXT: ret 1131; 1132; RV32IZDINXZHINX-LABEL: fcvt_h_ui_zeroext: 1133; RV32IZDINXZHINX: # %bb.0: 1134; RV32IZDINXZHINX-NEXT: fcvt.h.wu a0, a0 1135; RV32IZDINXZHINX-NEXT: ret 1136; 1137; RV64IZDINXZHINX-LABEL: fcvt_h_ui_zeroext: 1138; RV64IZDINXZHINX: # %bb.0: 1139; RV64IZDINXZHINX-NEXT: fcvt.h.wu a0, a0 1140; RV64IZDINXZHINX-NEXT: ret 1141; 1142; CHECK32-IZFHMIN-LABEL: fcvt_h_ui_zeroext: 1143; CHECK32-IZFHMIN: # %bb.0: 1144; CHECK32-IZFHMIN-NEXT: fcvt.s.wu fa5, a0 1145; CHECK32-IZFHMIN-NEXT: fcvt.h.s fa0, fa5 1146; CHECK32-IZFHMIN-NEXT: ret 1147; 1148; CHECK64-IZFHMIN-LABEL: fcvt_h_ui_zeroext: 1149; CHECK64-IZFHMIN: # %bb.0: 1150; CHECK64-IZFHMIN-NEXT: fcvt.s.wu fa5, a0 1151; CHECK64-IZFHMIN-NEXT: fcvt.h.s fa0, fa5 1152; CHECK64-IZFHMIN-NEXT: ret 1153; 1154; CHECK32-IZHINXMIN-LABEL: fcvt_h_ui_zeroext: 1155; CHECK32-IZHINXMIN: # %bb.0: 1156; CHECK32-IZHINXMIN-NEXT: fcvt.s.wu a0, a0 1157; CHECK32-IZHINXMIN-NEXT: fcvt.h.s a0, a0 1158; CHECK32-IZHINXMIN-NEXT: ret 1159; 1160; CHECK64-IZHINXMIN-LABEL: fcvt_h_ui_zeroext: 1161; CHECK64-IZHINXMIN: # %bb.0: 1162; CHECK64-IZHINXMIN-NEXT: fcvt.s.wu a0, a0 1163; CHECK64-IZHINXMIN-NEXT: fcvt.h.s a0, a0 1164; CHECK64-IZHINXMIN-NEXT: ret 1165; 1166; CHECK32-IZDINXZHINXMIN-LABEL: fcvt_h_ui_zeroext: 1167; CHECK32-IZDINXZHINXMIN: # %bb.0: 1168; CHECK32-IZDINXZHINXMIN-NEXT: fcvt.s.wu a0, a0 1169; CHECK32-IZDINXZHINXMIN-NEXT: fcvt.h.s a0, a0 1170; CHECK32-IZDINXZHINXMIN-NEXT: ret 1171; 1172; CHECK64-IZDINXZHINXMIN-LABEL: fcvt_h_ui_zeroext: 1173; CHECK64-IZDINXZHINXMIN: # %bb.0: 1174; CHECK64-IZDINXZHINXMIN-NEXT: fcvt.s.wu a0, a0 1175; CHECK64-IZDINXZHINXMIN-NEXT: fcvt.h.s a0, a0 1176; CHECK64-IZDINXZHINXMIN-NEXT: ret 1177; 1178; CHECK32-D-LABEL: fcvt_h_ui_zeroext: 1179; CHECK32-D: # %bb.0: 1180; CHECK32-D-NEXT: addi sp, sp, -16 1181; CHECK32-D-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1182; CHECK32-D-NEXT: fcvt.s.wu fa0, a0 1183; CHECK32-D-NEXT: call __truncsfhf2 1184; CHECK32-D-NEXT: fmv.x.w a0, fa0 1185; CHECK32-D-NEXT: lui a1, 1048560 1186; CHECK32-D-NEXT: or a0, a0, a1 1187; CHECK32-D-NEXT: fmv.w.x fa0, a0 1188; CHECK32-D-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1189; CHECK32-D-NEXT: addi sp, sp, 16 1190; CHECK32-D-NEXT: ret 1191 %1 = call half @llvm.experimental.constrained.uitofp.f16.i16(i16 %a, metadata !"round.dynamic", metadata !"fpexcept.strict") 1192 ret half %1 1193} 1194 1195define half @fcvt_h_w(i32 %a) nounwind strictfp { 1196; CHECKIZFH-LABEL: fcvt_h_w: 1197; CHECKIZFH: # %bb.0: 1198; CHECKIZFH-NEXT: fcvt.h.w fa0, a0 1199; CHECKIZFH-NEXT: ret 1200; 1201; CHECKIZHINX-LABEL: fcvt_h_w: 1202; CHECKIZHINX: # %bb.0: 1203; CHECKIZHINX-NEXT: fcvt.h.w a0, a0 1204; CHECKIZHINX-NEXT: ret 1205; 1206; RV32IDZFH-LABEL: fcvt_h_w: 1207; RV32IDZFH: # %bb.0: 1208; RV32IDZFH-NEXT: fcvt.h.w fa0, a0 1209; RV32IDZFH-NEXT: ret 1210; 1211; RV64IDZFH-LABEL: fcvt_h_w: 1212; RV64IDZFH: # %bb.0: 1213; RV64IDZFH-NEXT: fcvt.h.w fa0, a0 1214; RV64IDZFH-NEXT: ret 1215; 1216; RV32IZDINXZHINX-LABEL: fcvt_h_w: 1217; RV32IZDINXZHINX: # %bb.0: 1218; RV32IZDINXZHINX-NEXT: fcvt.h.w a0, a0 1219; RV32IZDINXZHINX-NEXT: ret 1220; 1221; RV64IZDINXZHINX-LABEL: fcvt_h_w: 1222; RV64IZDINXZHINX: # %bb.0: 1223; RV64IZDINXZHINX-NEXT: fcvt.h.w a0, a0 1224; RV64IZDINXZHINX-NEXT: ret 1225; 1226; CHECK32-IZFHMIN-LABEL: fcvt_h_w: 1227; CHECK32-IZFHMIN: # %bb.0: 1228; CHECK32-IZFHMIN-NEXT: fcvt.s.w fa5, a0 1229; CHECK32-IZFHMIN-NEXT: fcvt.h.s fa0, fa5 1230; CHECK32-IZFHMIN-NEXT: ret 1231; 1232; CHECK64-IZFHMIN-LABEL: fcvt_h_w: 1233; CHECK64-IZFHMIN: # %bb.0: 1234; CHECK64-IZFHMIN-NEXT: fcvt.s.w fa5, a0 1235; CHECK64-IZFHMIN-NEXT: fcvt.h.s fa0, fa5 1236; CHECK64-IZFHMIN-NEXT: ret 1237; 1238; CHECK32-IZHINXMIN-LABEL: fcvt_h_w: 1239; CHECK32-IZHINXMIN: # %bb.0: 1240; CHECK32-IZHINXMIN-NEXT: fcvt.s.w a0, a0 1241; CHECK32-IZHINXMIN-NEXT: fcvt.h.s a0, a0 1242; CHECK32-IZHINXMIN-NEXT: ret 1243; 1244; CHECK64-IZHINXMIN-LABEL: fcvt_h_w: 1245; CHECK64-IZHINXMIN: # %bb.0: 1246; CHECK64-IZHINXMIN-NEXT: fcvt.s.w a0, a0 1247; CHECK64-IZHINXMIN-NEXT: fcvt.h.s a0, a0 1248; CHECK64-IZHINXMIN-NEXT: ret 1249; 1250; CHECK32-IZDINXZHINXMIN-LABEL: fcvt_h_w: 1251; CHECK32-IZDINXZHINXMIN: # %bb.0: 1252; CHECK32-IZDINXZHINXMIN-NEXT: fcvt.s.w a0, a0 1253; CHECK32-IZDINXZHINXMIN-NEXT: fcvt.h.s a0, a0 1254; CHECK32-IZDINXZHINXMIN-NEXT: ret 1255; 1256; CHECK64-IZDINXZHINXMIN-LABEL: fcvt_h_w: 1257; CHECK64-IZDINXZHINXMIN: # %bb.0: 1258; CHECK64-IZDINXZHINXMIN-NEXT: fcvt.s.w a0, a0 1259; CHECK64-IZDINXZHINXMIN-NEXT: fcvt.h.s a0, a0 1260; CHECK64-IZDINXZHINXMIN-NEXT: ret 1261; 1262; CHECK32-D-LABEL: fcvt_h_w: 1263; CHECK32-D: # %bb.0: 1264; CHECK32-D-NEXT: addi sp, sp, -16 1265; CHECK32-D-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1266; CHECK32-D-NEXT: fcvt.s.w fa0, a0 1267; CHECK32-D-NEXT: call __truncsfhf2 1268; CHECK32-D-NEXT: fmv.x.w a0, fa0 1269; CHECK32-D-NEXT: lui a1, 1048560 1270; CHECK32-D-NEXT: or a0, a0, a1 1271; CHECK32-D-NEXT: fmv.w.x fa0, a0 1272; CHECK32-D-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1273; CHECK32-D-NEXT: addi sp, sp, 16 1274; CHECK32-D-NEXT: ret 1275 %1 = call half @llvm.experimental.constrained.sitofp.f16.i32(i32 %a, metadata !"round.dynamic", metadata !"fpexcept.strict") 1276 ret half %1 1277} 1278declare half @llvm.experimental.constrained.sitofp.f16.i32(i32, metadata, metadata) 1279 1280define half @fcvt_h_w_load(ptr %p) nounwind strictfp { 1281; CHECKIZFH-LABEL: fcvt_h_w_load: 1282; CHECKIZFH: # %bb.0: 1283; CHECKIZFH-NEXT: lw a0, 0(a0) 1284; CHECKIZFH-NEXT: fcvt.h.w fa0, a0 1285; CHECKIZFH-NEXT: ret 1286; 1287; CHECKIZHINX-LABEL: fcvt_h_w_load: 1288; CHECKIZHINX: # %bb.0: 1289; CHECKIZHINX-NEXT: lw a0, 0(a0) 1290; CHECKIZHINX-NEXT: fcvt.h.w a0, a0 1291; CHECKIZHINX-NEXT: ret 1292; 1293; RV32IDZFH-LABEL: fcvt_h_w_load: 1294; RV32IDZFH: # %bb.0: 1295; RV32IDZFH-NEXT: lw a0, 0(a0) 1296; RV32IDZFH-NEXT: fcvt.h.w fa0, a0 1297; RV32IDZFH-NEXT: ret 1298; 1299; RV64IDZFH-LABEL: fcvt_h_w_load: 1300; RV64IDZFH: # %bb.0: 1301; RV64IDZFH-NEXT: lw a0, 0(a0) 1302; RV64IDZFH-NEXT: fcvt.h.w fa0, a0 1303; RV64IDZFH-NEXT: ret 1304; 1305; RV32IZDINXZHINX-LABEL: fcvt_h_w_load: 1306; RV32IZDINXZHINX: # %bb.0: 1307; RV32IZDINXZHINX-NEXT: lw a0, 0(a0) 1308; RV32IZDINXZHINX-NEXT: fcvt.h.w a0, a0 1309; RV32IZDINXZHINX-NEXT: ret 1310; 1311; RV64IZDINXZHINX-LABEL: fcvt_h_w_load: 1312; RV64IZDINXZHINX: # %bb.0: 1313; RV64IZDINXZHINX-NEXT: lw a0, 0(a0) 1314; RV64IZDINXZHINX-NEXT: fcvt.h.w a0, a0 1315; RV64IZDINXZHINX-NEXT: ret 1316; 1317; CHECK32-IZFHMIN-LABEL: fcvt_h_w_load: 1318; CHECK32-IZFHMIN: # %bb.0: 1319; CHECK32-IZFHMIN-NEXT: lw a0, 0(a0) 1320; CHECK32-IZFHMIN-NEXT: fcvt.s.w fa5, a0 1321; CHECK32-IZFHMIN-NEXT: fcvt.h.s fa0, fa5 1322; CHECK32-IZFHMIN-NEXT: ret 1323; 1324; CHECK64-IZFHMIN-LABEL: fcvt_h_w_load: 1325; CHECK64-IZFHMIN: # %bb.0: 1326; CHECK64-IZFHMIN-NEXT: lw a0, 0(a0) 1327; CHECK64-IZFHMIN-NEXT: fcvt.s.w fa5, a0 1328; CHECK64-IZFHMIN-NEXT: fcvt.h.s fa0, fa5 1329; CHECK64-IZFHMIN-NEXT: ret 1330; 1331; CHECK32-IZHINXMIN-LABEL: fcvt_h_w_load: 1332; CHECK32-IZHINXMIN: # %bb.0: 1333; CHECK32-IZHINXMIN-NEXT: lw a0, 0(a0) 1334; CHECK32-IZHINXMIN-NEXT: fcvt.s.w a0, a0 1335; CHECK32-IZHINXMIN-NEXT: fcvt.h.s a0, a0 1336; CHECK32-IZHINXMIN-NEXT: ret 1337; 1338; CHECK64-IZHINXMIN-LABEL: fcvt_h_w_load: 1339; CHECK64-IZHINXMIN: # %bb.0: 1340; CHECK64-IZHINXMIN-NEXT: lw a0, 0(a0) 1341; CHECK64-IZHINXMIN-NEXT: fcvt.s.w a0, a0 1342; CHECK64-IZHINXMIN-NEXT: fcvt.h.s a0, a0 1343; CHECK64-IZHINXMIN-NEXT: ret 1344; 1345; CHECK32-IZDINXZHINXMIN-LABEL: fcvt_h_w_load: 1346; CHECK32-IZDINXZHINXMIN: # %bb.0: 1347; CHECK32-IZDINXZHINXMIN-NEXT: lw a0, 0(a0) 1348; CHECK32-IZDINXZHINXMIN-NEXT: fcvt.s.w a0, a0 1349; CHECK32-IZDINXZHINXMIN-NEXT: fcvt.h.s a0, a0 1350; CHECK32-IZDINXZHINXMIN-NEXT: ret 1351; 1352; CHECK64-IZDINXZHINXMIN-LABEL: fcvt_h_w_load: 1353; CHECK64-IZDINXZHINXMIN: # %bb.0: 1354; CHECK64-IZDINXZHINXMIN-NEXT: lw a0, 0(a0) 1355; CHECK64-IZDINXZHINXMIN-NEXT: fcvt.s.w a0, a0 1356; CHECK64-IZDINXZHINXMIN-NEXT: fcvt.h.s a0, a0 1357; CHECK64-IZDINXZHINXMIN-NEXT: ret 1358; 1359; CHECK32-D-LABEL: fcvt_h_w_load: 1360; CHECK32-D: # %bb.0: 1361; CHECK32-D-NEXT: addi sp, sp, -16 1362; CHECK32-D-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1363; CHECK32-D-NEXT: lw a0, 0(a0) 1364; CHECK32-D-NEXT: fcvt.s.w fa0, a0 1365; CHECK32-D-NEXT: call __truncsfhf2 1366; CHECK32-D-NEXT: fmv.x.w a0, fa0 1367; CHECK32-D-NEXT: lui a1, 1048560 1368; CHECK32-D-NEXT: or a0, a0, a1 1369; CHECK32-D-NEXT: fmv.w.x fa0, a0 1370; CHECK32-D-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1371; CHECK32-D-NEXT: addi sp, sp, 16 1372; CHECK32-D-NEXT: ret 1373 %a = load i32, ptr %p 1374 %1 = call half @llvm.experimental.constrained.sitofp.f16.i32(i32 %a, metadata !"round.dynamic", metadata !"fpexcept.strict") 1375 ret half %1 1376} 1377 1378define half @fcvt_h_wu(i32 %a) nounwind strictfp { 1379; CHECKIZFH-LABEL: fcvt_h_wu: 1380; CHECKIZFH: # %bb.0: 1381; CHECKIZFH-NEXT: fcvt.h.wu fa0, a0 1382; CHECKIZFH-NEXT: ret 1383; 1384; CHECKIZHINX-LABEL: fcvt_h_wu: 1385; CHECKIZHINX: # %bb.0: 1386; CHECKIZHINX-NEXT: fcvt.h.wu a0, a0 1387; CHECKIZHINX-NEXT: ret 1388; 1389; RV32IDZFH-LABEL: fcvt_h_wu: 1390; RV32IDZFH: # %bb.0: 1391; RV32IDZFH-NEXT: fcvt.h.wu fa0, a0 1392; RV32IDZFH-NEXT: ret 1393; 1394; RV64IDZFH-LABEL: fcvt_h_wu: 1395; RV64IDZFH: # %bb.0: 1396; RV64IDZFH-NEXT: fcvt.h.wu fa0, a0 1397; RV64IDZFH-NEXT: ret 1398; 1399; RV32IZDINXZHINX-LABEL: fcvt_h_wu: 1400; RV32IZDINXZHINX: # %bb.0: 1401; RV32IZDINXZHINX-NEXT: fcvt.h.wu a0, a0 1402; RV32IZDINXZHINX-NEXT: ret 1403; 1404; RV64IZDINXZHINX-LABEL: fcvt_h_wu: 1405; RV64IZDINXZHINX: # %bb.0: 1406; RV64IZDINXZHINX-NEXT: fcvt.h.wu a0, a0 1407; RV64IZDINXZHINX-NEXT: ret 1408; 1409; CHECK32-IZFHMIN-LABEL: fcvt_h_wu: 1410; CHECK32-IZFHMIN: # %bb.0: 1411; CHECK32-IZFHMIN-NEXT: fcvt.s.wu fa5, a0 1412; CHECK32-IZFHMIN-NEXT: fcvt.h.s fa0, fa5 1413; CHECK32-IZFHMIN-NEXT: ret 1414; 1415; CHECK64-IZFHMIN-LABEL: fcvt_h_wu: 1416; CHECK64-IZFHMIN: # %bb.0: 1417; CHECK64-IZFHMIN-NEXT: fcvt.s.wu fa5, a0 1418; CHECK64-IZFHMIN-NEXT: fcvt.h.s fa0, fa5 1419; CHECK64-IZFHMIN-NEXT: ret 1420; 1421; CHECK32-IZHINXMIN-LABEL: fcvt_h_wu: 1422; CHECK32-IZHINXMIN: # %bb.0: 1423; CHECK32-IZHINXMIN-NEXT: fcvt.s.wu a0, a0 1424; CHECK32-IZHINXMIN-NEXT: fcvt.h.s a0, a0 1425; CHECK32-IZHINXMIN-NEXT: ret 1426; 1427; CHECK64-IZHINXMIN-LABEL: fcvt_h_wu: 1428; CHECK64-IZHINXMIN: # %bb.0: 1429; CHECK64-IZHINXMIN-NEXT: fcvt.s.wu a0, a0 1430; CHECK64-IZHINXMIN-NEXT: fcvt.h.s a0, a0 1431; CHECK64-IZHINXMIN-NEXT: ret 1432; 1433; CHECK32-IZDINXZHINXMIN-LABEL: fcvt_h_wu: 1434; CHECK32-IZDINXZHINXMIN: # %bb.0: 1435; CHECK32-IZDINXZHINXMIN-NEXT: fcvt.s.wu a0, a0 1436; CHECK32-IZDINXZHINXMIN-NEXT: fcvt.h.s a0, a0 1437; CHECK32-IZDINXZHINXMIN-NEXT: ret 1438; 1439; CHECK64-IZDINXZHINXMIN-LABEL: fcvt_h_wu: 1440; CHECK64-IZDINXZHINXMIN: # %bb.0: 1441; CHECK64-IZDINXZHINXMIN-NEXT: fcvt.s.wu a0, a0 1442; CHECK64-IZDINXZHINXMIN-NEXT: fcvt.h.s a0, a0 1443; CHECK64-IZDINXZHINXMIN-NEXT: ret 1444; 1445; CHECK32-D-LABEL: fcvt_h_wu: 1446; CHECK32-D: # %bb.0: 1447; CHECK32-D-NEXT: addi sp, sp, -16 1448; CHECK32-D-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1449; CHECK32-D-NEXT: fcvt.s.wu fa0, a0 1450; CHECK32-D-NEXT: call __truncsfhf2 1451; CHECK32-D-NEXT: fmv.x.w a0, fa0 1452; CHECK32-D-NEXT: lui a1, 1048560 1453; CHECK32-D-NEXT: or a0, a0, a1 1454; CHECK32-D-NEXT: fmv.w.x fa0, a0 1455; CHECK32-D-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1456; CHECK32-D-NEXT: addi sp, sp, 16 1457; CHECK32-D-NEXT: ret 1458 %1 = call half @llvm.experimental.constrained.uitofp.f16.i32(i32 %a, metadata !"round.dynamic", metadata !"fpexcept.strict") 1459 ret half %1 1460} 1461declare half @llvm.experimental.constrained.uitofp.f16.i32(i32, metadata, metadata) 1462 1463define half @fcvt_h_wu_load(ptr %p) nounwind strictfp { 1464; RV32IZFH-LABEL: fcvt_h_wu_load: 1465; RV32IZFH: # %bb.0: 1466; RV32IZFH-NEXT: lw a0, 0(a0) 1467; RV32IZFH-NEXT: fcvt.h.wu fa0, a0 1468; RV32IZFH-NEXT: ret 1469; 1470; RV64IZFH-LABEL: fcvt_h_wu_load: 1471; RV64IZFH: # %bb.0: 1472; RV64IZFH-NEXT: lwu a0, 0(a0) 1473; RV64IZFH-NEXT: fcvt.h.wu fa0, a0 1474; RV64IZFH-NEXT: ret 1475; 1476; RV32IZHINX-LABEL: fcvt_h_wu_load: 1477; RV32IZHINX: # %bb.0: 1478; RV32IZHINX-NEXT: lw a0, 0(a0) 1479; RV32IZHINX-NEXT: fcvt.h.wu a0, a0 1480; RV32IZHINX-NEXT: ret 1481; 1482; RV64IZHINX-LABEL: fcvt_h_wu_load: 1483; RV64IZHINX: # %bb.0: 1484; RV64IZHINX-NEXT: lwu a0, 0(a0) 1485; RV64IZHINX-NEXT: fcvt.h.wu a0, a0 1486; RV64IZHINX-NEXT: ret 1487; 1488; RV32IDZFH-LABEL: fcvt_h_wu_load: 1489; RV32IDZFH: # %bb.0: 1490; RV32IDZFH-NEXT: lw a0, 0(a0) 1491; RV32IDZFH-NEXT: fcvt.h.wu fa0, a0 1492; RV32IDZFH-NEXT: ret 1493; 1494; RV64IDZFH-LABEL: fcvt_h_wu_load: 1495; RV64IDZFH: # %bb.0: 1496; RV64IDZFH-NEXT: lwu a0, 0(a0) 1497; RV64IDZFH-NEXT: fcvt.h.wu fa0, a0 1498; RV64IDZFH-NEXT: ret 1499; 1500; RV32IZDINXZHINX-LABEL: fcvt_h_wu_load: 1501; RV32IZDINXZHINX: # %bb.0: 1502; RV32IZDINXZHINX-NEXT: lw a0, 0(a0) 1503; RV32IZDINXZHINX-NEXT: fcvt.h.wu a0, a0 1504; RV32IZDINXZHINX-NEXT: ret 1505; 1506; RV64IZDINXZHINX-LABEL: fcvt_h_wu_load: 1507; RV64IZDINXZHINX: # %bb.0: 1508; RV64IZDINXZHINX-NEXT: lwu a0, 0(a0) 1509; RV64IZDINXZHINX-NEXT: fcvt.h.wu a0, a0 1510; RV64IZDINXZHINX-NEXT: ret 1511; 1512; CHECK32-IZFHMIN-LABEL: fcvt_h_wu_load: 1513; CHECK32-IZFHMIN: # %bb.0: 1514; CHECK32-IZFHMIN-NEXT: lw a0, 0(a0) 1515; CHECK32-IZFHMIN-NEXT: fcvt.s.wu fa5, a0 1516; CHECK32-IZFHMIN-NEXT: fcvt.h.s fa0, fa5 1517; CHECK32-IZFHMIN-NEXT: ret 1518; 1519; CHECK64-IZFHMIN-LABEL: fcvt_h_wu_load: 1520; CHECK64-IZFHMIN: # %bb.0: 1521; CHECK64-IZFHMIN-NEXT: lwu a0, 0(a0) 1522; CHECK64-IZFHMIN-NEXT: fcvt.s.wu fa5, a0 1523; CHECK64-IZFHMIN-NEXT: fcvt.h.s fa0, fa5 1524; CHECK64-IZFHMIN-NEXT: ret 1525; 1526; CHECK32-IZHINXMIN-LABEL: fcvt_h_wu_load: 1527; CHECK32-IZHINXMIN: # %bb.0: 1528; CHECK32-IZHINXMIN-NEXT: lw a0, 0(a0) 1529; CHECK32-IZHINXMIN-NEXT: fcvt.s.wu a0, a0 1530; CHECK32-IZHINXMIN-NEXT: fcvt.h.s a0, a0 1531; CHECK32-IZHINXMIN-NEXT: ret 1532; 1533; CHECK64-IZHINXMIN-LABEL: fcvt_h_wu_load: 1534; CHECK64-IZHINXMIN: # %bb.0: 1535; CHECK64-IZHINXMIN-NEXT: lwu a0, 0(a0) 1536; CHECK64-IZHINXMIN-NEXT: fcvt.s.wu a0, a0 1537; CHECK64-IZHINXMIN-NEXT: fcvt.h.s a0, a0 1538; CHECK64-IZHINXMIN-NEXT: ret 1539; 1540; CHECK32-IZDINXZHINXMIN-LABEL: fcvt_h_wu_load: 1541; CHECK32-IZDINXZHINXMIN: # %bb.0: 1542; CHECK32-IZDINXZHINXMIN-NEXT: lw a0, 0(a0) 1543; CHECK32-IZDINXZHINXMIN-NEXT: fcvt.s.wu a0, a0 1544; CHECK32-IZDINXZHINXMIN-NEXT: fcvt.h.s a0, a0 1545; CHECK32-IZDINXZHINXMIN-NEXT: ret 1546; 1547; CHECK64-IZDINXZHINXMIN-LABEL: fcvt_h_wu_load: 1548; CHECK64-IZDINXZHINXMIN: # %bb.0: 1549; CHECK64-IZDINXZHINXMIN-NEXT: lwu a0, 0(a0) 1550; CHECK64-IZDINXZHINXMIN-NEXT: fcvt.s.wu a0, a0 1551; CHECK64-IZDINXZHINXMIN-NEXT: fcvt.h.s a0, a0 1552; CHECK64-IZDINXZHINXMIN-NEXT: ret 1553; 1554; CHECK32-D-LABEL: fcvt_h_wu_load: 1555; CHECK32-D: # %bb.0: 1556; CHECK32-D-NEXT: addi sp, sp, -16 1557; CHECK32-D-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1558; CHECK32-D-NEXT: lw a0, 0(a0) 1559; CHECK32-D-NEXT: fcvt.s.wu fa0, a0 1560; CHECK32-D-NEXT: call __truncsfhf2 1561; CHECK32-D-NEXT: fmv.x.w a0, fa0 1562; CHECK32-D-NEXT: lui a1, 1048560 1563; CHECK32-D-NEXT: or a0, a0, a1 1564; CHECK32-D-NEXT: fmv.w.x fa0, a0 1565; CHECK32-D-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1566; CHECK32-D-NEXT: addi sp, sp, 16 1567; CHECK32-D-NEXT: ret 1568 %a = load i32, ptr %p 1569 %1 = call half @llvm.experimental.constrained.uitofp.f16.i32(i32 %a, metadata !"round.dynamic", metadata !"fpexcept.strict") 1570 ret half %1 1571} 1572 1573define half @fcvt_h_l(i64 %a) nounwind strictfp { 1574; RV32IZFH-LABEL: fcvt_h_l: 1575; RV32IZFH: # %bb.0: 1576; RV32IZFH-NEXT: addi sp, sp, -16 1577; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1578; RV32IZFH-NEXT: call __floatdihf 1579; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1580; RV32IZFH-NEXT: addi sp, sp, 16 1581; RV32IZFH-NEXT: ret 1582; 1583; RV64IZFH-LABEL: fcvt_h_l: 1584; RV64IZFH: # %bb.0: 1585; RV64IZFH-NEXT: fcvt.h.l fa0, a0 1586; RV64IZFH-NEXT: ret 1587; 1588; RV32IZHINX-LABEL: fcvt_h_l: 1589; RV32IZHINX: # %bb.0: 1590; RV32IZHINX-NEXT: addi sp, sp, -16 1591; RV32IZHINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1592; RV32IZHINX-NEXT: call __floatdihf 1593; RV32IZHINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1594; RV32IZHINX-NEXT: addi sp, sp, 16 1595; RV32IZHINX-NEXT: ret 1596; 1597; RV64IZHINX-LABEL: fcvt_h_l: 1598; RV64IZHINX: # %bb.0: 1599; RV64IZHINX-NEXT: fcvt.h.l a0, a0 1600; RV64IZHINX-NEXT: ret 1601; 1602; RV32IDZFH-LABEL: fcvt_h_l: 1603; RV32IDZFH: # %bb.0: 1604; RV32IDZFH-NEXT: addi sp, sp, -16 1605; RV32IDZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1606; RV32IDZFH-NEXT: call __floatdihf 1607; RV32IDZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1608; RV32IDZFH-NEXT: addi sp, sp, 16 1609; RV32IDZFH-NEXT: ret 1610; 1611; RV64IDZFH-LABEL: fcvt_h_l: 1612; RV64IDZFH: # %bb.0: 1613; RV64IDZFH-NEXT: fcvt.h.l fa0, a0 1614; RV64IDZFH-NEXT: ret 1615; 1616; RV32IZDINXZHINX-LABEL: fcvt_h_l: 1617; RV32IZDINXZHINX: # %bb.0: 1618; RV32IZDINXZHINX-NEXT: addi sp, sp, -16 1619; RV32IZDINXZHINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1620; RV32IZDINXZHINX-NEXT: call __floatdihf 1621; RV32IZDINXZHINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1622; RV32IZDINXZHINX-NEXT: addi sp, sp, 16 1623; RV32IZDINXZHINX-NEXT: ret 1624; 1625; RV64IZDINXZHINX-LABEL: fcvt_h_l: 1626; RV64IZDINXZHINX: # %bb.0: 1627; RV64IZDINXZHINX-NEXT: fcvt.h.l a0, a0 1628; RV64IZDINXZHINX-NEXT: ret 1629; 1630; CHECK32-IZFHMIN-LABEL: fcvt_h_l: 1631; CHECK32-IZFHMIN: # %bb.0: 1632; CHECK32-IZFHMIN-NEXT: addi sp, sp, -16 1633; CHECK32-IZFHMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1634; CHECK32-IZFHMIN-NEXT: call __floatdihf 1635; CHECK32-IZFHMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1636; CHECK32-IZFHMIN-NEXT: addi sp, sp, 16 1637; CHECK32-IZFHMIN-NEXT: ret 1638; 1639; CHECK64-IZFHMIN-LABEL: fcvt_h_l: 1640; CHECK64-IZFHMIN: # %bb.0: 1641; CHECK64-IZFHMIN-NEXT: fcvt.s.l fa5, a0 1642; CHECK64-IZFHMIN-NEXT: fcvt.h.s fa0, fa5 1643; CHECK64-IZFHMIN-NEXT: ret 1644; 1645; CHECK32-IZHINXMIN-LABEL: fcvt_h_l: 1646; CHECK32-IZHINXMIN: # %bb.0: 1647; CHECK32-IZHINXMIN-NEXT: addi sp, sp, -16 1648; CHECK32-IZHINXMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1649; CHECK32-IZHINXMIN-NEXT: call __floatdihf 1650; CHECK32-IZHINXMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1651; CHECK32-IZHINXMIN-NEXT: addi sp, sp, 16 1652; CHECK32-IZHINXMIN-NEXT: ret 1653; 1654; CHECK64-IZHINXMIN-LABEL: fcvt_h_l: 1655; CHECK64-IZHINXMIN: # %bb.0: 1656; CHECK64-IZHINXMIN-NEXT: fcvt.s.l a0, a0 1657; CHECK64-IZHINXMIN-NEXT: fcvt.h.s a0, a0 1658; CHECK64-IZHINXMIN-NEXT: ret 1659; 1660; CHECK32-IZDINXZHINXMIN-LABEL: fcvt_h_l: 1661; CHECK32-IZDINXZHINXMIN: # %bb.0: 1662; CHECK32-IZDINXZHINXMIN-NEXT: addi sp, sp, -16 1663; CHECK32-IZDINXZHINXMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1664; CHECK32-IZDINXZHINXMIN-NEXT: call __floatdihf 1665; CHECK32-IZDINXZHINXMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1666; CHECK32-IZDINXZHINXMIN-NEXT: addi sp, sp, 16 1667; CHECK32-IZDINXZHINXMIN-NEXT: ret 1668; 1669; CHECK64-IZDINXZHINXMIN-LABEL: fcvt_h_l: 1670; CHECK64-IZDINXZHINXMIN: # %bb.0: 1671; CHECK64-IZDINXZHINXMIN-NEXT: fcvt.s.l a0, a0 1672; CHECK64-IZDINXZHINXMIN-NEXT: fcvt.h.s a0, a0 1673; CHECK64-IZDINXZHINXMIN-NEXT: ret 1674; 1675; CHECK32-D-LABEL: fcvt_h_l: 1676; CHECK32-D: # %bb.0: 1677; CHECK32-D-NEXT: addi sp, sp, -16 1678; CHECK32-D-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1679; CHECK32-D-NEXT: call __floatdisf 1680; CHECK32-D-NEXT: call __truncsfhf2 1681; CHECK32-D-NEXT: fmv.x.w a0, fa0 1682; CHECK32-D-NEXT: lui a1, 1048560 1683; CHECK32-D-NEXT: or a0, a0, a1 1684; CHECK32-D-NEXT: fmv.w.x fa0, a0 1685; CHECK32-D-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1686; CHECK32-D-NEXT: addi sp, sp, 16 1687; CHECK32-D-NEXT: ret 1688 %1 = call half @llvm.experimental.constrained.sitofp.f16.i64(i64 %a, metadata !"round.dynamic", metadata !"fpexcept.strict") 1689 ret half %1 1690} 1691declare half @llvm.experimental.constrained.sitofp.f16.i64(i64, metadata, metadata) 1692 1693define half @fcvt_h_lu(i64 %a) nounwind strictfp { 1694; RV32IZFH-LABEL: fcvt_h_lu: 1695; RV32IZFH: # %bb.0: 1696; RV32IZFH-NEXT: addi sp, sp, -16 1697; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1698; RV32IZFH-NEXT: call __floatundihf 1699; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1700; RV32IZFH-NEXT: addi sp, sp, 16 1701; RV32IZFH-NEXT: ret 1702; 1703; RV64IZFH-LABEL: fcvt_h_lu: 1704; RV64IZFH: # %bb.0: 1705; RV64IZFH-NEXT: fcvt.h.lu fa0, a0 1706; RV64IZFH-NEXT: ret 1707; 1708; RV32IZHINX-LABEL: fcvt_h_lu: 1709; RV32IZHINX: # %bb.0: 1710; RV32IZHINX-NEXT: addi sp, sp, -16 1711; RV32IZHINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1712; RV32IZHINX-NEXT: call __floatundihf 1713; RV32IZHINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1714; RV32IZHINX-NEXT: addi sp, sp, 16 1715; RV32IZHINX-NEXT: ret 1716; 1717; RV64IZHINX-LABEL: fcvt_h_lu: 1718; RV64IZHINX: # %bb.0: 1719; RV64IZHINX-NEXT: fcvt.h.lu a0, a0 1720; RV64IZHINX-NEXT: ret 1721; 1722; RV32IDZFH-LABEL: fcvt_h_lu: 1723; RV32IDZFH: # %bb.0: 1724; RV32IDZFH-NEXT: addi sp, sp, -16 1725; RV32IDZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1726; RV32IDZFH-NEXT: call __floatundihf 1727; RV32IDZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1728; RV32IDZFH-NEXT: addi sp, sp, 16 1729; RV32IDZFH-NEXT: ret 1730; 1731; RV64IDZFH-LABEL: fcvt_h_lu: 1732; RV64IDZFH: # %bb.0: 1733; RV64IDZFH-NEXT: fcvt.h.lu fa0, a0 1734; RV64IDZFH-NEXT: ret 1735; 1736; RV32IZDINXZHINX-LABEL: fcvt_h_lu: 1737; RV32IZDINXZHINX: # %bb.0: 1738; RV32IZDINXZHINX-NEXT: addi sp, sp, -16 1739; RV32IZDINXZHINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1740; RV32IZDINXZHINX-NEXT: call __floatundihf 1741; RV32IZDINXZHINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1742; RV32IZDINXZHINX-NEXT: addi sp, sp, 16 1743; RV32IZDINXZHINX-NEXT: ret 1744; 1745; RV64IZDINXZHINX-LABEL: fcvt_h_lu: 1746; RV64IZDINXZHINX: # %bb.0: 1747; RV64IZDINXZHINX-NEXT: fcvt.h.lu a0, a0 1748; RV64IZDINXZHINX-NEXT: ret 1749; 1750; CHECK32-IZFHMIN-LABEL: fcvt_h_lu: 1751; CHECK32-IZFHMIN: # %bb.0: 1752; CHECK32-IZFHMIN-NEXT: addi sp, sp, -16 1753; CHECK32-IZFHMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1754; CHECK32-IZFHMIN-NEXT: call __floatundihf 1755; CHECK32-IZFHMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1756; CHECK32-IZFHMIN-NEXT: addi sp, sp, 16 1757; CHECK32-IZFHMIN-NEXT: ret 1758; 1759; CHECK64-IZFHMIN-LABEL: fcvt_h_lu: 1760; CHECK64-IZFHMIN: # %bb.0: 1761; CHECK64-IZFHMIN-NEXT: fcvt.s.lu fa5, a0 1762; CHECK64-IZFHMIN-NEXT: fcvt.h.s fa0, fa5 1763; CHECK64-IZFHMIN-NEXT: ret 1764; 1765; CHECK32-IZHINXMIN-LABEL: fcvt_h_lu: 1766; CHECK32-IZHINXMIN: # %bb.0: 1767; CHECK32-IZHINXMIN-NEXT: addi sp, sp, -16 1768; CHECK32-IZHINXMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1769; CHECK32-IZHINXMIN-NEXT: call __floatundihf 1770; CHECK32-IZHINXMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1771; CHECK32-IZHINXMIN-NEXT: addi sp, sp, 16 1772; CHECK32-IZHINXMIN-NEXT: ret 1773; 1774; CHECK64-IZHINXMIN-LABEL: fcvt_h_lu: 1775; CHECK64-IZHINXMIN: # %bb.0: 1776; CHECK64-IZHINXMIN-NEXT: fcvt.s.lu a0, a0 1777; CHECK64-IZHINXMIN-NEXT: fcvt.h.s a0, a0 1778; CHECK64-IZHINXMIN-NEXT: ret 1779; 1780; CHECK32-IZDINXZHINXMIN-LABEL: fcvt_h_lu: 1781; CHECK32-IZDINXZHINXMIN: # %bb.0: 1782; CHECK32-IZDINXZHINXMIN-NEXT: addi sp, sp, -16 1783; CHECK32-IZDINXZHINXMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1784; CHECK32-IZDINXZHINXMIN-NEXT: call __floatundihf 1785; CHECK32-IZDINXZHINXMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1786; CHECK32-IZDINXZHINXMIN-NEXT: addi sp, sp, 16 1787; CHECK32-IZDINXZHINXMIN-NEXT: ret 1788; 1789; CHECK64-IZDINXZHINXMIN-LABEL: fcvt_h_lu: 1790; CHECK64-IZDINXZHINXMIN: # %bb.0: 1791; CHECK64-IZDINXZHINXMIN-NEXT: fcvt.s.lu a0, a0 1792; CHECK64-IZDINXZHINXMIN-NEXT: fcvt.h.s a0, a0 1793; CHECK64-IZDINXZHINXMIN-NEXT: ret 1794; 1795; CHECK32-D-LABEL: fcvt_h_lu: 1796; CHECK32-D: # %bb.0: 1797; CHECK32-D-NEXT: addi sp, sp, -16 1798; CHECK32-D-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1799; CHECK32-D-NEXT: call __floatundisf 1800; CHECK32-D-NEXT: call __truncsfhf2 1801; CHECK32-D-NEXT: fmv.x.w a0, fa0 1802; CHECK32-D-NEXT: lui a1, 1048560 1803; CHECK32-D-NEXT: or a0, a0, a1 1804; CHECK32-D-NEXT: fmv.w.x fa0, a0 1805; CHECK32-D-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1806; CHECK32-D-NEXT: addi sp, sp, 16 1807; CHECK32-D-NEXT: ret 1808 %1 = call half @llvm.experimental.constrained.uitofp.f16.i64(i64 %a, metadata !"round.dynamic", metadata !"fpexcept.strict") 1809 ret half %1 1810} 1811declare half @llvm.experimental.constrained.uitofp.f16.i64(i64, metadata, metadata) 1812 1813define half @fcvt_h_s(float %a) nounwind strictfp { 1814; CHECKIZFH-LABEL: fcvt_h_s: 1815; CHECKIZFH: # %bb.0: 1816; CHECKIZFH-NEXT: fcvt.h.s fa0, fa0 1817; CHECKIZFH-NEXT: ret 1818; 1819; CHECKIZHINX-LABEL: fcvt_h_s: 1820; CHECKIZHINX: # %bb.0: 1821; CHECKIZHINX-NEXT: fcvt.h.s a0, a0 1822; CHECKIZHINX-NEXT: ret 1823; 1824; RV32IDZFH-LABEL: fcvt_h_s: 1825; RV32IDZFH: # %bb.0: 1826; RV32IDZFH-NEXT: fcvt.h.s fa0, fa0 1827; RV32IDZFH-NEXT: ret 1828; 1829; RV64IDZFH-LABEL: fcvt_h_s: 1830; RV64IDZFH: # %bb.0: 1831; RV64IDZFH-NEXT: fcvt.h.s fa0, fa0 1832; RV64IDZFH-NEXT: ret 1833; 1834; RV32IZDINXZHINX-LABEL: fcvt_h_s: 1835; RV32IZDINXZHINX: # %bb.0: 1836; RV32IZDINXZHINX-NEXT: fcvt.h.s a0, a0 1837; RV32IZDINXZHINX-NEXT: ret 1838; 1839; RV64IZDINXZHINX-LABEL: fcvt_h_s: 1840; RV64IZDINXZHINX: # %bb.0: 1841; RV64IZDINXZHINX-NEXT: fcvt.h.s a0, a0 1842; RV64IZDINXZHINX-NEXT: ret 1843; 1844; CHECK32-IZFHMIN-LABEL: fcvt_h_s: 1845; CHECK32-IZFHMIN: # %bb.0: 1846; CHECK32-IZFHMIN-NEXT: fcvt.h.s fa0, fa0 1847; CHECK32-IZFHMIN-NEXT: ret 1848; 1849; CHECK64-IZFHMIN-LABEL: fcvt_h_s: 1850; CHECK64-IZFHMIN: # %bb.0: 1851; CHECK64-IZFHMIN-NEXT: fcvt.h.s fa0, fa0 1852; CHECK64-IZFHMIN-NEXT: ret 1853; 1854; CHECK32-IZHINXMIN-LABEL: fcvt_h_s: 1855; CHECK32-IZHINXMIN: # %bb.0: 1856; CHECK32-IZHINXMIN-NEXT: fcvt.h.s a0, a0 1857; CHECK32-IZHINXMIN-NEXT: ret 1858; 1859; CHECK64-IZHINXMIN-LABEL: fcvt_h_s: 1860; CHECK64-IZHINXMIN: # %bb.0: 1861; CHECK64-IZHINXMIN-NEXT: fcvt.h.s a0, a0 1862; CHECK64-IZHINXMIN-NEXT: ret 1863; 1864; CHECK32-IZDINXZHINXMIN-LABEL: fcvt_h_s: 1865; CHECK32-IZDINXZHINXMIN: # %bb.0: 1866; CHECK32-IZDINXZHINXMIN-NEXT: fcvt.h.s a0, a0 1867; CHECK32-IZDINXZHINXMIN-NEXT: ret 1868; 1869; CHECK64-IZDINXZHINXMIN-LABEL: fcvt_h_s: 1870; CHECK64-IZDINXZHINXMIN: # %bb.0: 1871; CHECK64-IZDINXZHINXMIN-NEXT: fcvt.h.s a0, a0 1872; CHECK64-IZDINXZHINXMIN-NEXT: ret 1873; 1874; CHECK32-D-LABEL: fcvt_h_s: 1875; CHECK32-D: # %bb.0: 1876; CHECK32-D-NEXT: addi sp, sp, -16 1877; CHECK32-D-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1878; CHECK32-D-NEXT: call __truncsfhf2 1879; CHECK32-D-NEXT: fmv.x.w a0, fa0 1880; CHECK32-D-NEXT: lui a1, 1048560 1881; CHECK32-D-NEXT: or a0, a0, a1 1882; CHECK32-D-NEXT: fmv.w.x fa0, a0 1883; CHECK32-D-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1884; CHECK32-D-NEXT: addi sp, sp, 16 1885; CHECK32-D-NEXT: ret 1886 %1 = call half @llvm.experimental.constrained.fptrunc.f16.f32(float %a, metadata !"round.dynamic", metadata !"fpexcept.strict") 1887 ret half %1 1888} 1889declare half @llvm.experimental.constrained.fptrunc.f16.f32(float, metadata, metadata) 1890 1891define float @fcvt_s_h(half %a) nounwind strictfp { 1892; CHECKIZFH-LABEL: fcvt_s_h: 1893; CHECKIZFH: # %bb.0: 1894; CHECKIZFH-NEXT: fcvt.s.h fa0, fa0 1895; CHECKIZFH-NEXT: ret 1896; 1897; CHECKIZHINX-LABEL: fcvt_s_h: 1898; CHECKIZHINX: # %bb.0: 1899; CHECKIZHINX-NEXT: fcvt.s.h a0, a0 1900; CHECKIZHINX-NEXT: ret 1901; 1902; RV32IDZFH-LABEL: fcvt_s_h: 1903; RV32IDZFH: # %bb.0: 1904; RV32IDZFH-NEXT: fcvt.s.h fa0, fa0 1905; RV32IDZFH-NEXT: ret 1906; 1907; RV64IDZFH-LABEL: fcvt_s_h: 1908; RV64IDZFH: # %bb.0: 1909; RV64IDZFH-NEXT: fcvt.s.h fa0, fa0 1910; RV64IDZFH-NEXT: ret 1911; 1912; RV32IZDINXZHINX-LABEL: fcvt_s_h: 1913; RV32IZDINXZHINX: # %bb.0: 1914; RV32IZDINXZHINX-NEXT: fcvt.s.h a0, a0 1915; RV32IZDINXZHINX-NEXT: ret 1916; 1917; RV64IZDINXZHINX-LABEL: fcvt_s_h: 1918; RV64IZDINXZHINX: # %bb.0: 1919; RV64IZDINXZHINX-NEXT: fcvt.s.h a0, a0 1920; RV64IZDINXZHINX-NEXT: ret 1921; 1922; CHECK32-IZFHMIN-LABEL: fcvt_s_h: 1923; CHECK32-IZFHMIN: # %bb.0: 1924; CHECK32-IZFHMIN-NEXT: fcvt.s.h fa0, fa0 1925; CHECK32-IZFHMIN-NEXT: ret 1926; 1927; CHECK64-IZFHMIN-LABEL: fcvt_s_h: 1928; CHECK64-IZFHMIN: # %bb.0: 1929; CHECK64-IZFHMIN-NEXT: fcvt.s.h fa0, fa0 1930; CHECK64-IZFHMIN-NEXT: ret 1931; 1932; CHECK32-IZHINXMIN-LABEL: fcvt_s_h: 1933; CHECK32-IZHINXMIN: # %bb.0: 1934; CHECK32-IZHINXMIN-NEXT: fcvt.s.h a0, a0 1935; CHECK32-IZHINXMIN-NEXT: ret 1936; 1937; CHECK64-IZHINXMIN-LABEL: fcvt_s_h: 1938; CHECK64-IZHINXMIN: # %bb.0: 1939; CHECK64-IZHINXMIN-NEXT: fcvt.s.h a0, a0 1940; CHECK64-IZHINXMIN-NEXT: ret 1941; 1942; CHECK32-IZDINXZHINXMIN-LABEL: fcvt_s_h: 1943; CHECK32-IZDINXZHINXMIN: # %bb.0: 1944; CHECK32-IZDINXZHINXMIN-NEXT: fcvt.s.h a0, a0 1945; CHECK32-IZDINXZHINXMIN-NEXT: ret 1946; 1947; CHECK64-IZDINXZHINXMIN-LABEL: fcvt_s_h: 1948; CHECK64-IZDINXZHINXMIN: # %bb.0: 1949; CHECK64-IZDINXZHINXMIN-NEXT: fcvt.s.h a0, a0 1950; CHECK64-IZDINXZHINXMIN-NEXT: ret 1951; 1952; CHECK32-D-LABEL: fcvt_s_h: 1953; CHECK32-D: # %bb.0: 1954; CHECK32-D-NEXT: addi sp, sp, -16 1955; CHECK32-D-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1956; CHECK32-D-NEXT: fmv.x.w a0, fa0 1957; CHECK32-D-NEXT: slli a0, a0, 16 1958; CHECK32-D-NEXT: srli a0, a0, 16 1959; CHECK32-D-NEXT: fmv.w.x fa0, a0 1960; CHECK32-D-NEXT: call __extendhfsf2 1961; CHECK32-D-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1962; CHECK32-D-NEXT: addi sp, sp, 16 1963; CHECK32-D-NEXT: ret 1964 %1 = call float @llvm.experimental.constrained.fpext.f32.f16(half %a, metadata !"fpexcept.strict") 1965 ret float %1 1966} 1967declare float @llvm.experimental.constrained.fpext.f32.f16(half, metadata) 1968 1969define half @fcvt_h_d(double %a) nounwind strictfp { 1970; RV32IZFH-LABEL: fcvt_h_d: 1971; RV32IZFH: # %bb.0: 1972; RV32IZFH-NEXT: addi sp, sp, -16 1973; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1974; RV32IZFH-NEXT: call __truncdfhf2 1975; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1976; RV32IZFH-NEXT: addi sp, sp, 16 1977; RV32IZFH-NEXT: ret 1978; 1979; RV64IZFH-LABEL: fcvt_h_d: 1980; RV64IZFH: # %bb.0: 1981; RV64IZFH-NEXT: addi sp, sp, -16 1982; RV64IZFH-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 1983; RV64IZFH-NEXT: call __truncdfhf2 1984; RV64IZFH-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 1985; RV64IZFH-NEXT: addi sp, sp, 16 1986; RV64IZFH-NEXT: ret 1987; 1988; RV32IZHINX-LABEL: fcvt_h_d: 1989; RV32IZHINX: # %bb.0: 1990; RV32IZHINX-NEXT: addi sp, sp, -16 1991; RV32IZHINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1992; RV32IZHINX-NEXT: call __truncdfhf2 1993; RV32IZHINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1994; RV32IZHINX-NEXT: addi sp, sp, 16 1995; RV32IZHINX-NEXT: ret 1996; 1997; RV64IZHINX-LABEL: fcvt_h_d: 1998; RV64IZHINX: # %bb.0: 1999; RV64IZHINX-NEXT: addi sp, sp, -16 2000; RV64IZHINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 2001; RV64IZHINX-NEXT: call __truncdfhf2 2002; RV64IZHINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 2003; RV64IZHINX-NEXT: addi sp, sp, 16 2004; RV64IZHINX-NEXT: ret 2005; 2006; RV32IDZFH-LABEL: fcvt_h_d: 2007; RV32IDZFH: # %bb.0: 2008; RV32IDZFH-NEXT: fcvt.h.d fa0, fa0 2009; RV32IDZFH-NEXT: ret 2010; 2011; RV64IDZFH-LABEL: fcvt_h_d: 2012; RV64IDZFH: # %bb.0: 2013; RV64IDZFH-NEXT: fcvt.h.d fa0, fa0 2014; RV64IDZFH-NEXT: ret 2015; 2016; RV32IZDINXZHINX-LABEL: fcvt_h_d: 2017; RV32IZDINXZHINX: # %bb.0: 2018; RV32IZDINXZHINX-NEXT: fcvt.h.d a0, a0 2019; RV32IZDINXZHINX-NEXT: ret 2020; 2021; RV64IZDINXZHINX-LABEL: fcvt_h_d: 2022; RV64IZDINXZHINX: # %bb.0: 2023; RV64IZDINXZHINX-NEXT: fcvt.h.d a0, a0 2024; RV64IZDINXZHINX-NEXT: ret 2025; 2026; RV32IFZFHMIN-LABEL: fcvt_h_d: 2027; RV32IFZFHMIN: # %bb.0: 2028; RV32IFZFHMIN-NEXT: addi sp, sp, -16 2029; RV32IFZFHMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 2030; RV32IFZFHMIN-NEXT: call __truncdfhf2 2031; RV32IFZFHMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 2032; RV32IFZFHMIN-NEXT: addi sp, sp, 16 2033; RV32IFZFHMIN-NEXT: ret 2034; 2035; RV64IFZFHMIN-LABEL: fcvt_h_d: 2036; RV64IFZFHMIN: # %bb.0: 2037; RV64IFZFHMIN-NEXT: addi sp, sp, -16 2038; RV64IFZFHMIN-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 2039; RV64IFZFHMIN-NEXT: call __truncdfhf2 2040; RV64IFZFHMIN-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 2041; RV64IFZFHMIN-NEXT: addi sp, sp, 16 2042; RV64IFZFHMIN-NEXT: ret 2043; 2044; CHECK32-IZHINXMIN-LABEL: fcvt_h_d: 2045; CHECK32-IZHINXMIN: # %bb.0: 2046; CHECK32-IZHINXMIN-NEXT: addi sp, sp, -16 2047; CHECK32-IZHINXMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 2048; CHECK32-IZHINXMIN-NEXT: call __truncdfhf2 2049; CHECK32-IZHINXMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 2050; CHECK32-IZHINXMIN-NEXT: addi sp, sp, 16 2051; CHECK32-IZHINXMIN-NEXT: ret 2052; 2053; CHECK64-IZHINXMIN-LABEL: fcvt_h_d: 2054; CHECK64-IZHINXMIN: # %bb.0: 2055; CHECK64-IZHINXMIN-NEXT: addi sp, sp, -16 2056; CHECK64-IZHINXMIN-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 2057; CHECK64-IZHINXMIN-NEXT: call __truncdfhf2 2058; CHECK64-IZHINXMIN-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 2059; CHECK64-IZHINXMIN-NEXT: addi sp, sp, 16 2060; CHECK64-IZHINXMIN-NEXT: ret 2061; 2062; RV32IDZFHMIN-LABEL: fcvt_h_d: 2063; RV32IDZFHMIN: # %bb.0: 2064; RV32IDZFHMIN-NEXT: fcvt.h.d fa0, fa0 2065; RV32IDZFHMIN-NEXT: ret 2066; 2067; RV64IDZFHMIN-LABEL: fcvt_h_d: 2068; RV64IDZFHMIN: # %bb.0: 2069; RV64IDZFHMIN-NEXT: fcvt.h.d fa0, fa0 2070; RV64IDZFHMIN-NEXT: ret 2071; 2072; CHECK32-IZDINXZHINXMIN-LABEL: fcvt_h_d: 2073; CHECK32-IZDINXZHINXMIN: # %bb.0: 2074; CHECK32-IZDINXZHINXMIN-NEXT: fcvt.h.d a0, a0 2075; CHECK32-IZDINXZHINXMIN-NEXT: ret 2076; 2077; CHECK64-IZDINXZHINXMIN-LABEL: fcvt_h_d: 2078; CHECK64-IZDINXZHINXMIN: # %bb.0: 2079; CHECK64-IZDINXZHINXMIN-NEXT: fcvt.h.d a0, a0 2080; CHECK64-IZDINXZHINXMIN-NEXT: ret 2081; 2082; CHECK32-D-LABEL: fcvt_h_d: 2083; CHECK32-D: # %bb.0: 2084; CHECK32-D-NEXT: addi sp, sp, -16 2085; CHECK32-D-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 2086; CHECK32-D-NEXT: call __truncdfhf2 2087; CHECK32-D-NEXT: fmv.x.w a0, fa0 2088; CHECK32-D-NEXT: lui a1, 1048560 2089; CHECK32-D-NEXT: or a0, a0, a1 2090; CHECK32-D-NEXT: fmv.w.x fa0, a0 2091; CHECK32-D-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 2092; CHECK32-D-NEXT: addi sp, sp, 16 2093; CHECK32-D-NEXT: ret 2094 %1 = call half @llvm.experimental.constrained.fptrunc.f16.f64(double %a, metadata !"round.dynamic", metadata !"fpexcept.strict") 2095 ret half %1 2096} 2097declare half @llvm.experimental.constrained.fptrunc.f16.f64(double, metadata, metadata) 2098 2099define double @fcvt_d_h(half %a) nounwind strictfp { 2100; RV32IZFH-LABEL: fcvt_d_h: 2101; RV32IZFH: # %bb.0: 2102; RV32IZFH-NEXT: addi sp, sp, -16 2103; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 2104; RV32IZFH-NEXT: fcvt.s.h fa0, fa0 2105; RV32IZFH-NEXT: call __extendsfdf2 2106; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 2107; RV32IZFH-NEXT: addi sp, sp, 16 2108; RV32IZFH-NEXT: ret 2109; 2110; RV64IZFH-LABEL: fcvt_d_h: 2111; RV64IZFH: # %bb.0: 2112; RV64IZFH-NEXT: addi sp, sp, -16 2113; RV64IZFH-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 2114; RV64IZFH-NEXT: fcvt.s.h fa0, fa0 2115; RV64IZFH-NEXT: call __extendsfdf2 2116; RV64IZFH-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 2117; RV64IZFH-NEXT: addi sp, sp, 16 2118; RV64IZFH-NEXT: ret 2119; 2120; RV32IZHINX-LABEL: fcvt_d_h: 2121; RV32IZHINX: # %bb.0: 2122; RV32IZHINX-NEXT: addi sp, sp, -16 2123; RV32IZHINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 2124; RV32IZHINX-NEXT: fcvt.s.h a0, a0 2125; RV32IZHINX-NEXT: call __extendsfdf2 2126; RV32IZHINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 2127; RV32IZHINX-NEXT: addi sp, sp, 16 2128; RV32IZHINX-NEXT: ret 2129; 2130; RV64IZHINX-LABEL: fcvt_d_h: 2131; RV64IZHINX: # %bb.0: 2132; RV64IZHINX-NEXT: addi sp, sp, -16 2133; RV64IZHINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 2134; RV64IZHINX-NEXT: fcvt.s.h a0, a0 2135; RV64IZHINX-NEXT: call __extendsfdf2 2136; RV64IZHINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 2137; RV64IZHINX-NEXT: addi sp, sp, 16 2138; RV64IZHINX-NEXT: ret 2139; 2140; RV32IDZFH-LABEL: fcvt_d_h: 2141; RV32IDZFH: # %bb.0: 2142; RV32IDZFH-NEXT: fcvt.d.h fa0, fa0 2143; RV32IDZFH-NEXT: ret 2144; 2145; RV64IDZFH-LABEL: fcvt_d_h: 2146; RV64IDZFH: # %bb.0: 2147; RV64IDZFH-NEXT: fcvt.d.h fa0, fa0 2148; RV64IDZFH-NEXT: ret 2149; 2150; RV32IZDINXZHINX-LABEL: fcvt_d_h: 2151; RV32IZDINXZHINX: # %bb.0: 2152; RV32IZDINXZHINX-NEXT: fcvt.d.h a0, a0 2153; RV32IZDINXZHINX-NEXT: ret 2154; 2155; RV64IZDINXZHINX-LABEL: fcvt_d_h: 2156; RV64IZDINXZHINX: # %bb.0: 2157; RV64IZDINXZHINX-NEXT: fcvt.d.h a0, a0 2158; RV64IZDINXZHINX-NEXT: ret 2159; 2160; RV32IFZFHMIN-LABEL: fcvt_d_h: 2161; RV32IFZFHMIN: # %bb.0: 2162; RV32IFZFHMIN-NEXT: addi sp, sp, -16 2163; RV32IFZFHMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 2164; RV32IFZFHMIN-NEXT: fcvt.s.h fa0, fa0 2165; RV32IFZFHMIN-NEXT: call __extendsfdf2 2166; RV32IFZFHMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 2167; RV32IFZFHMIN-NEXT: addi sp, sp, 16 2168; RV32IFZFHMIN-NEXT: ret 2169; 2170; RV64IFZFHMIN-LABEL: fcvt_d_h: 2171; RV64IFZFHMIN: # %bb.0: 2172; RV64IFZFHMIN-NEXT: addi sp, sp, -16 2173; RV64IFZFHMIN-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 2174; RV64IFZFHMIN-NEXT: fcvt.s.h fa0, fa0 2175; RV64IFZFHMIN-NEXT: call __extendsfdf2 2176; RV64IFZFHMIN-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 2177; RV64IFZFHMIN-NEXT: addi sp, sp, 16 2178; RV64IFZFHMIN-NEXT: ret 2179; 2180; CHECK32-IZHINXMIN-LABEL: fcvt_d_h: 2181; CHECK32-IZHINXMIN: # %bb.0: 2182; CHECK32-IZHINXMIN-NEXT: addi sp, sp, -16 2183; CHECK32-IZHINXMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 2184; CHECK32-IZHINXMIN-NEXT: fcvt.s.h a0, a0 2185; CHECK32-IZHINXMIN-NEXT: call __extendsfdf2 2186; CHECK32-IZHINXMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 2187; CHECK32-IZHINXMIN-NEXT: addi sp, sp, 16 2188; CHECK32-IZHINXMIN-NEXT: ret 2189; 2190; CHECK64-IZHINXMIN-LABEL: fcvt_d_h: 2191; CHECK64-IZHINXMIN: # %bb.0: 2192; CHECK64-IZHINXMIN-NEXT: addi sp, sp, -16 2193; CHECK64-IZHINXMIN-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 2194; CHECK64-IZHINXMIN-NEXT: fcvt.s.h a0, a0 2195; CHECK64-IZHINXMIN-NEXT: call __extendsfdf2 2196; CHECK64-IZHINXMIN-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 2197; CHECK64-IZHINXMIN-NEXT: addi sp, sp, 16 2198; CHECK64-IZHINXMIN-NEXT: ret 2199; 2200; RV32IDZFHMIN-LABEL: fcvt_d_h: 2201; RV32IDZFHMIN: # %bb.0: 2202; RV32IDZFHMIN-NEXT: fcvt.d.h fa0, fa0 2203; RV32IDZFHMIN-NEXT: ret 2204; 2205; RV64IDZFHMIN-LABEL: fcvt_d_h: 2206; RV64IDZFHMIN: # %bb.0: 2207; RV64IDZFHMIN-NEXT: fcvt.d.h fa0, fa0 2208; RV64IDZFHMIN-NEXT: ret 2209; 2210; CHECK32-IZDINXZHINXMIN-LABEL: fcvt_d_h: 2211; CHECK32-IZDINXZHINXMIN: # %bb.0: 2212; CHECK32-IZDINXZHINXMIN-NEXT: fcvt.d.h a0, a0 2213; CHECK32-IZDINXZHINXMIN-NEXT: ret 2214; 2215; CHECK64-IZDINXZHINXMIN-LABEL: fcvt_d_h: 2216; CHECK64-IZDINXZHINXMIN: # %bb.0: 2217; CHECK64-IZDINXZHINXMIN-NEXT: fcvt.d.h a0, a0 2218; CHECK64-IZDINXZHINXMIN-NEXT: ret 2219; 2220; CHECK32-D-LABEL: fcvt_d_h: 2221; CHECK32-D: # %bb.0: 2222; CHECK32-D-NEXT: addi sp, sp, -16 2223; CHECK32-D-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 2224; CHECK32-D-NEXT: fmv.x.w a0, fa0 2225; CHECK32-D-NEXT: slli a0, a0, 16 2226; CHECK32-D-NEXT: srli a0, a0, 16 2227; CHECK32-D-NEXT: fmv.w.x fa0, a0 2228; CHECK32-D-NEXT: call __extendhfsf2 2229; CHECK32-D-NEXT: fcvt.d.s fa0, fa0 2230; CHECK32-D-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 2231; CHECK32-D-NEXT: addi sp, sp, 16 2232; CHECK32-D-NEXT: ret 2233 %1 = call double @llvm.experimental.constrained.fpext.f64.f16(half %a, metadata !"fpexcept.strict") 2234 ret double %1 2235} 2236declare double @llvm.experimental.constrained.fpext.f64.f16(half, metadata) 2237 2238; Make sure we select W version of addi on RV64. 2239define signext i32 @fcvt_h_w_demanded_bits(i32 signext %0, ptr %1) strictfp { 2240; RV32IZFH-LABEL: fcvt_h_w_demanded_bits: 2241; RV32IZFH: # %bb.0: 2242; RV32IZFH-NEXT: addi a0, a0, 1 2243; RV32IZFH-NEXT: fcvt.h.w fa5, a0 2244; RV32IZFH-NEXT: fsh fa5, 0(a1) 2245; RV32IZFH-NEXT: ret 2246; 2247; RV64IZFH-LABEL: fcvt_h_w_demanded_bits: 2248; RV64IZFH: # %bb.0: 2249; RV64IZFH-NEXT: addiw a0, a0, 1 2250; RV64IZFH-NEXT: fcvt.h.w fa5, a0 2251; RV64IZFH-NEXT: fsh fa5, 0(a1) 2252; RV64IZFH-NEXT: ret 2253; 2254; RV32IZHINX-LABEL: fcvt_h_w_demanded_bits: 2255; RV32IZHINX: # %bb.0: 2256; RV32IZHINX-NEXT: addi a0, a0, 1 2257; RV32IZHINX-NEXT: fcvt.h.w a2, a0 2258; RV32IZHINX-NEXT: sh a2, 0(a1) 2259; RV32IZHINX-NEXT: ret 2260; 2261; RV64IZHINX-LABEL: fcvt_h_w_demanded_bits: 2262; RV64IZHINX: # %bb.0: 2263; RV64IZHINX-NEXT: addiw a0, a0, 1 2264; RV64IZHINX-NEXT: fcvt.h.w a2, a0 2265; RV64IZHINX-NEXT: sh a2, 0(a1) 2266; RV64IZHINX-NEXT: ret 2267; 2268; RV32IDZFH-LABEL: fcvt_h_w_demanded_bits: 2269; RV32IDZFH: # %bb.0: 2270; RV32IDZFH-NEXT: addi a0, a0, 1 2271; RV32IDZFH-NEXT: fcvt.h.w fa5, a0 2272; RV32IDZFH-NEXT: fsh fa5, 0(a1) 2273; RV32IDZFH-NEXT: ret 2274; 2275; RV64IDZFH-LABEL: fcvt_h_w_demanded_bits: 2276; RV64IDZFH: # %bb.0: 2277; RV64IDZFH-NEXT: addiw a0, a0, 1 2278; RV64IDZFH-NEXT: fcvt.h.w fa5, a0 2279; RV64IDZFH-NEXT: fsh fa5, 0(a1) 2280; RV64IDZFH-NEXT: ret 2281; 2282; RV32IZDINXZHINX-LABEL: fcvt_h_w_demanded_bits: 2283; RV32IZDINXZHINX: # %bb.0: 2284; RV32IZDINXZHINX-NEXT: addi a0, a0, 1 2285; RV32IZDINXZHINX-NEXT: fcvt.h.w a2, a0 2286; RV32IZDINXZHINX-NEXT: sh a2, 0(a1) 2287; RV32IZDINXZHINX-NEXT: ret 2288; 2289; RV64IZDINXZHINX-LABEL: fcvt_h_w_demanded_bits: 2290; RV64IZDINXZHINX: # %bb.0: 2291; RV64IZDINXZHINX-NEXT: addiw a0, a0, 1 2292; RV64IZDINXZHINX-NEXT: fcvt.h.w a2, a0 2293; RV64IZDINXZHINX-NEXT: sh a2, 0(a1) 2294; RV64IZDINXZHINX-NEXT: ret 2295; 2296; CHECK32-IZFHMIN-LABEL: fcvt_h_w_demanded_bits: 2297; CHECK32-IZFHMIN: # %bb.0: 2298; CHECK32-IZFHMIN-NEXT: addi a0, a0, 1 2299; CHECK32-IZFHMIN-NEXT: fcvt.s.w fa5, a0 2300; CHECK32-IZFHMIN-NEXT: fcvt.h.s fa5, fa5 2301; CHECK32-IZFHMIN-NEXT: fsh fa5, 0(a1) 2302; CHECK32-IZFHMIN-NEXT: ret 2303; 2304; CHECK64-IZFHMIN-LABEL: fcvt_h_w_demanded_bits: 2305; CHECK64-IZFHMIN: # %bb.0: 2306; CHECK64-IZFHMIN-NEXT: addiw a0, a0, 1 2307; CHECK64-IZFHMIN-NEXT: fcvt.s.w fa5, a0 2308; CHECK64-IZFHMIN-NEXT: fcvt.h.s fa5, fa5 2309; CHECK64-IZFHMIN-NEXT: fsh fa5, 0(a1) 2310; CHECK64-IZFHMIN-NEXT: ret 2311; 2312; CHECK32-IZHINXMIN-LABEL: fcvt_h_w_demanded_bits: 2313; CHECK32-IZHINXMIN: # %bb.0: 2314; CHECK32-IZHINXMIN-NEXT: addi a0, a0, 1 2315; CHECK32-IZHINXMIN-NEXT: fcvt.s.w a2, a0 2316; CHECK32-IZHINXMIN-NEXT: fcvt.h.s a2, a2 2317; CHECK32-IZHINXMIN-NEXT: sh a2, 0(a1) 2318; CHECK32-IZHINXMIN-NEXT: ret 2319; 2320; CHECK64-IZHINXMIN-LABEL: fcvt_h_w_demanded_bits: 2321; CHECK64-IZHINXMIN: # %bb.0: 2322; CHECK64-IZHINXMIN-NEXT: addiw a0, a0, 1 2323; CHECK64-IZHINXMIN-NEXT: fcvt.s.w a2, a0 2324; CHECK64-IZHINXMIN-NEXT: fcvt.h.s a2, a2 2325; CHECK64-IZHINXMIN-NEXT: sh a2, 0(a1) 2326; CHECK64-IZHINXMIN-NEXT: ret 2327; 2328; CHECK32-IZDINXZHINXMIN-LABEL: fcvt_h_w_demanded_bits: 2329; CHECK32-IZDINXZHINXMIN: # %bb.0: 2330; CHECK32-IZDINXZHINXMIN-NEXT: addi a0, a0, 1 2331; CHECK32-IZDINXZHINXMIN-NEXT: fcvt.s.w a2, a0 2332; CHECK32-IZDINXZHINXMIN-NEXT: fcvt.h.s a2, a2 2333; CHECK32-IZDINXZHINXMIN-NEXT: sh a2, 0(a1) 2334; CHECK32-IZDINXZHINXMIN-NEXT: ret 2335; 2336; CHECK64-IZDINXZHINXMIN-LABEL: fcvt_h_w_demanded_bits: 2337; CHECK64-IZDINXZHINXMIN: # %bb.0: 2338; CHECK64-IZDINXZHINXMIN-NEXT: addiw a0, a0, 1 2339; CHECK64-IZDINXZHINXMIN-NEXT: fcvt.s.w a2, a0 2340; CHECK64-IZDINXZHINXMIN-NEXT: fcvt.h.s a2, a2 2341; CHECK64-IZDINXZHINXMIN-NEXT: sh a2, 0(a1) 2342; CHECK64-IZDINXZHINXMIN-NEXT: ret 2343; 2344; CHECK32-D-LABEL: fcvt_h_w_demanded_bits: 2345; CHECK32-D: # %bb.0: 2346; CHECK32-D-NEXT: addi sp, sp, -16 2347; CHECK32-D-NEXT: .cfi_def_cfa_offset 16 2348; CHECK32-D-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 2349; CHECK32-D-NEXT: sw s0, 8(sp) # 4-byte Folded Spill 2350; CHECK32-D-NEXT: sw s1, 4(sp) # 4-byte Folded Spill 2351; CHECK32-D-NEXT: .cfi_offset ra, -4 2352; CHECK32-D-NEXT: .cfi_offset s0, -8 2353; CHECK32-D-NEXT: .cfi_offset s1, -12 2354; CHECK32-D-NEXT: mv s0, a1 2355; CHECK32-D-NEXT: addi s1, a0, 1 2356; CHECK32-D-NEXT: fcvt.s.w fa0, s1 2357; CHECK32-D-NEXT: call __truncsfhf2 2358; CHECK32-D-NEXT: fmv.x.w a0, fa0 2359; CHECK32-D-NEXT: sh a0, 0(s0) 2360; CHECK32-D-NEXT: mv a0, s1 2361; CHECK32-D-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 2362; CHECK32-D-NEXT: lw s0, 8(sp) # 4-byte Folded Reload 2363; CHECK32-D-NEXT: lw s1, 4(sp) # 4-byte Folded Reload 2364; CHECK32-D-NEXT: .cfi_restore ra 2365; CHECK32-D-NEXT: .cfi_restore s0 2366; CHECK32-D-NEXT: .cfi_restore s1 2367; CHECK32-D-NEXT: addi sp, sp, 16 2368; CHECK32-D-NEXT: .cfi_def_cfa_offset 0 2369; CHECK32-D-NEXT: ret 2370 %3 = add i32 %0, 1 2371 %4 = call half @llvm.experimental.constrained.sitofp.f16.i32(i32 %3, metadata !"round.dynamic", metadata !"fpexcept.strict") 2372 store half %4, ptr %1, align 2 2373 ret i32 %3 2374} 2375 2376; Make sure we select W version of addi on RV64. 2377define signext i32 @fcvt_h_wu_demanded_bits(i32 signext %0, ptr %1) strictfp { 2378; RV32IZFH-LABEL: fcvt_h_wu_demanded_bits: 2379; RV32IZFH: # %bb.0: 2380; RV32IZFH-NEXT: addi a0, a0, 1 2381; RV32IZFH-NEXT: fcvt.h.wu fa5, a0 2382; RV32IZFH-NEXT: fsh fa5, 0(a1) 2383; RV32IZFH-NEXT: ret 2384; 2385; RV64IZFH-LABEL: fcvt_h_wu_demanded_bits: 2386; RV64IZFH: # %bb.0: 2387; RV64IZFH-NEXT: addiw a0, a0, 1 2388; RV64IZFH-NEXT: fcvt.h.wu fa5, a0 2389; RV64IZFH-NEXT: fsh fa5, 0(a1) 2390; RV64IZFH-NEXT: ret 2391; 2392; RV32IZHINX-LABEL: fcvt_h_wu_demanded_bits: 2393; RV32IZHINX: # %bb.0: 2394; RV32IZHINX-NEXT: addi a0, a0, 1 2395; RV32IZHINX-NEXT: fcvt.h.wu a2, a0 2396; RV32IZHINX-NEXT: sh a2, 0(a1) 2397; RV32IZHINX-NEXT: ret 2398; 2399; RV64IZHINX-LABEL: fcvt_h_wu_demanded_bits: 2400; RV64IZHINX: # %bb.0: 2401; RV64IZHINX-NEXT: addiw a0, a0, 1 2402; RV64IZHINX-NEXT: fcvt.h.wu a2, a0 2403; RV64IZHINX-NEXT: sh a2, 0(a1) 2404; RV64IZHINX-NEXT: ret 2405; 2406; RV32IDZFH-LABEL: fcvt_h_wu_demanded_bits: 2407; RV32IDZFH: # %bb.0: 2408; RV32IDZFH-NEXT: addi a0, a0, 1 2409; RV32IDZFH-NEXT: fcvt.h.wu fa5, a0 2410; RV32IDZFH-NEXT: fsh fa5, 0(a1) 2411; RV32IDZFH-NEXT: ret 2412; 2413; RV64IDZFH-LABEL: fcvt_h_wu_demanded_bits: 2414; RV64IDZFH: # %bb.0: 2415; RV64IDZFH-NEXT: addiw a0, a0, 1 2416; RV64IDZFH-NEXT: fcvt.h.wu fa5, a0 2417; RV64IDZFH-NEXT: fsh fa5, 0(a1) 2418; RV64IDZFH-NEXT: ret 2419; 2420; RV32IZDINXZHINX-LABEL: fcvt_h_wu_demanded_bits: 2421; RV32IZDINXZHINX: # %bb.0: 2422; RV32IZDINXZHINX-NEXT: addi a0, a0, 1 2423; RV32IZDINXZHINX-NEXT: fcvt.h.wu a2, a0 2424; RV32IZDINXZHINX-NEXT: sh a2, 0(a1) 2425; RV32IZDINXZHINX-NEXT: ret 2426; 2427; RV64IZDINXZHINX-LABEL: fcvt_h_wu_demanded_bits: 2428; RV64IZDINXZHINX: # %bb.0: 2429; RV64IZDINXZHINX-NEXT: addiw a0, a0, 1 2430; RV64IZDINXZHINX-NEXT: fcvt.h.wu a2, a0 2431; RV64IZDINXZHINX-NEXT: sh a2, 0(a1) 2432; RV64IZDINXZHINX-NEXT: ret 2433; 2434; CHECK32-IZFHMIN-LABEL: fcvt_h_wu_demanded_bits: 2435; CHECK32-IZFHMIN: # %bb.0: 2436; CHECK32-IZFHMIN-NEXT: addi a0, a0, 1 2437; CHECK32-IZFHMIN-NEXT: fcvt.s.wu fa5, a0 2438; CHECK32-IZFHMIN-NEXT: fcvt.h.s fa5, fa5 2439; CHECK32-IZFHMIN-NEXT: fsh fa5, 0(a1) 2440; CHECK32-IZFHMIN-NEXT: ret 2441; 2442; CHECK64-IZFHMIN-LABEL: fcvt_h_wu_demanded_bits: 2443; CHECK64-IZFHMIN: # %bb.0: 2444; CHECK64-IZFHMIN-NEXT: addiw a0, a0, 1 2445; CHECK64-IZFHMIN-NEXT: fcvt.s.wu fa5, a0 2446; CHECK64-IZFHMIN-NEXT: fcvt.h.s fa5, fa5 2447; CHECK64-IZFHMIN-NEXT: fsh fa5, 0(a1) 2448; CHECK64-IZFHMIN-NEXT: ret 2449; 2450; CHECK32-IZHINXMIN-LABEL: fcvt_h_wu_demanded_bits: 2451; CHECK32-IZHINXMIN: # %bb.0: 2452; CHECK32-IZHINXMIN-NEXT: addi a0, a0, 1 2453; CHECK32-IZHINXMIN-NEXT: fcvt.s.wu a2, a0 2454; CHECK32-IZHINXMIN-NEXT: fcvt.h.s a2, a2 2455; CHECK32-IZHINXMIN-NEXT: sh a2, 0(a1) 2456; CHECK32-IZHINXMIN-NEXT: ret 2457; 2458; CHECK64-IZHINXMIN-LABEL: fcvt_h_wu_demanded_bits: 2459; CHECK64-IZHINXMIN: # %bb.0: 2460; CHECK64-IZHINXMIN-NEXT: addiw a0, a0, 1 2461; CHECK64-IZHINXMIN-NEXT: fcvt.s.wu a2, a0 2462; CHECK64-IZHINXMIN-NEXT: fcvt.h.s a2, a2 2463; CHECK64-IZHINXMIN-NEXT: sh a2, 0(a1) 2464; CHECK64-IZHINXMIN-NEXT: ret 2465; 2466; CHECK32-IZDINXZHINXMIN-LABEL: fcvt_h_wu_demanded_bits: 2467; CHECK32-IZDINXZHINXMIN: # %bb.0: 2468; CHECK32-IZDINXZHINXMIN-NEXT: addi a0, a0, 1 2469; CHECK32-IZDINXZHINXMIN-NEXT: fcvt.s.wu a2, a0 2470; CHECK32-IZDINXZHINXMIN-NEXT: fcvt.h.s a2, a2 2471; CHECK32-IZDINXZHINXMIN-NEXT: sh a2, 0(a1) 2472; CHECK32-IZDINXZHINXMIN-NEXT: ret 2473; 2474; CHECK64-IZDINXZHINXMIN-LABEL: fcvt_h_wu_demanded_bits: 2475; CHECK64-IZDINXZHINXMIN: # %bb.0: 2476; CHECK64-IZDINXZHINXMIN-NEXT: addiw a0, a0, 1 2477; CHECK64-IZDINXZHINXMIN-NEXT: fcvt.s.wu a2, a0 2478; CHECK64-IZDINXZHINXMIN-NEXT: fcvt.h.s a2, a2 2479; CHECK64-IZDINXZHINXMIN-NEXT: sh a2, 0(a1) 2480; CHECK64-IZDINXZHINXMIN-NEXT: ret 2481; 2482; CHECK32-D-LABEL: fcvt_h_wu_demanded_bits: 2483; CHECK32-D: # %bb.0: 2484; CHECK32-D-NEXT: addi sp, sp, -16 2485; CHECK32-D-NEXT: .cfi_def_cfa_offset 16 2486; CHECK32-D-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 2487; CHECK32-D-NEXT: sw s0, 8(sp) # 4-byte Folded Spill 2488; CHECK32-D-NEXT: sw s1, 4(sp) # 4-byte Folded Spill 2489; CHECK32-D-NEXT: .cfi_offset ra, -4 2490; CHECK32-D-NEXT: .cfi_offset s0, -8 2491; CHECK32-D-NEXT: .cfi_offset s1, -12 2492; CHECK32-D-NEXT: mv s0, a1 2493; CHECK32-D-NEXT: addi s1, a0, 1 2494; CHECK32-D-NEXT: fcvt.s.wu fa0, s1 2495; CHECK32-D-NEXT: call __truncsfhf2 2496; CHECK32-D-NEXT: fmv.x.w a0, fa0 2497; CHECK32-D-NEXT: sh a0, 0(s0) 2498; CHECK32-D-NEXT: mv a0, s1 2499; CHECK32-D-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 2500; CHECK32-D-NEXT: lw s0, 8(sp) # 4-byte Folded Reload 2501; CHECK32-D-NEXT: lw s1, 4(sp) # 4-byte Folded Reload 2502; CHECK32-D-NEXT: .cfi_restore ra 2503; CHECK32-D-NEXT: .cfi_restore s0 2504; CHECK32-D-NEXT: .cfi_restore s1 2505; CHECK32-D-NEXT: addi sp, sp, 16 2506; CHECK32-D-NEXT: .cfi_def_cfa_offset 0 2507; CHECK32-D-NEXT: ret 2508 %3 = add i32 %0, 1 2509 %4 = call half @llvm.experimental.constrained.uitofp.f16.i32(i32 %3, metadata !"round.dynamic", metadata !"fpexcept.strict") 2510 store half %4, ptr %1, align 2 2511 ret i32 %3 2512} 2513 2514define half @fcvt_h_q(fp128 %a) nounwind strictfp { 2515; RV32IZFH-LABEL: fcvt_h_q: 2516; RV32IZFH: # %bb.0: 2517; RV32IZFH-NEXT: addi sp, sp, -32 2518; RV32IZFH-NEXT: sw ra, 28(sp) # 4-byte Folded Spill 2519; RV32IZFH-NEXT: lw a1, 0(a0) 2520; RV32IZFH-NEXT: lw a2, 4(a0) 2521; RV32IZFH-NEXT: lw a3, 8(a0) 2522; RV32IZFH-NEXT: lw a4, 12(a0) 2523; RV32IZFH-NEXT: addi a0, sp, 8 2524; RV32IZFH-NEXT: sw a1, 8(sp) 2525; RV32IZFH-NEXT: sw a2, 12(sp) 2526; RV32IZFH-NEXT: sw a3, 16(sp) 2527; RV32IZFH-NEXT: sw a4, 20(sp) 2528; RV32IZFH-NEXT: call __trunctfhf2 2529; RV32IZFH-NEXT: lw ra, 28(sp) # 4-byte Folded Reload 2530; RV32IZFH-NEXT: addi sp, sp, 32 2531; RV32IZFH-NEXT: ret 2532; 2533; RV64IZFH-LABEL: fcvt_h_q: 2534; RV64IZFH: # %bb.0: 2535; RV64IZFH-NEXT: addi sp, sp, -16 2536; RV64IZFH-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 2537; RV64IZFH-NEXT: call __trunctfhf2 2538; RV64IZFH-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 2539; RV64IZFH-NEXT: addi sp, sp, 16 2540; RV64IZFH-NEXT: ret 2541; 2542; RV32IZHINX-LABEL: fcvt_h_q: 2543; RV32IZHINX: # %bb.0: 2544; RV32IZHINX-NEXT: addi sp, sp, -32 2545; RV32IZHINX-NEXT: sw ra, 28(sp) # 4-byte Folded Spill 2546; RV32IZHINX-NEXT: lw a1, 0(a0) 2547; RV32IZHINX-NEXT: lw a2, 4(a0) 2548; RV32IZHINX-NEXT: lw a3, 8(a0) 2549; RV32IZHINX-NEXT: lw a4, 12(a0) 2550; RV32IZHINX-NEXT: addi a0, sp, 8 2551; RV32IZHINX-NEXT: sw a1, 8(sp) 2552; RV32IZHINX-NEXT: sw a2, 12(sp) 2553; RV32IZHINX-NEXT: sw a3, 16(sp) 2554; RV32IZHINX-NEXT: sw a4, 20(sp) 2555; RV32IZHINX-NEXT: call __trunctfhf2 2556; RV32IZHINX-NEXT: lw ra, 28(sp) # 4-byte Folded Reload 2557; RV32IZHINX-NEXT: addi sp, sp, 32 2558; RV32IZHINX-NEXT: ret 2559; 2560; RV64IZHINX-LABEL: fcvt_h_q: 2561; RV64IZHINX: # %bb.0: 2562; RV64IZHINX-NEXT: addi sp, sp, -16 2563; RV64IZHINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 2564; RV64IZHINX-NEXT: call __trunctfhf2 2565; RV64IZHINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 2566; RV64IZHINX-NEXT: addi sp, sp, 16 2567; RV64IZHINX-NEXT: ret 2568; 2569; RV32IDZFH-LABEL: fcvt_h_q: 2570; RV32IDZFH: # %bb.0: 2571; RV32IDZFH-NEXT: addi sp, sp, -32 2572; RV32IDZFH-NEXT: sw ra, 28(sp) # 4-byte Folded Spill 2573; RV32IDZFH-NEXT: lw a1, 0(a0) 2574; RV32IDZFH-NEXT: lw a2, 4(a0) 2575; RV32IDZFH-NEXT: lw a3, 8(a0) 2576; RV32IDZFH-NEXT: lw a4, 12(a0) 2577; RV32IDZFH-NEXT: addi a0, sp, 8 2578; RV32IDZFH-NEXT: sw a1, 8(sp) 2579; RV32IDZFH-NEXT: sw a2, 12(sp) 2580; RV32IDZFH-NEXT: sw a3, 16(sp) 2581; RV32IDZFH-NEXT: sw a4, 20(sp) 2582; RV32IDZFH-NEXT: call __trunctfhf2 2583; RV32IDZFH-NEXT: lw ra, 28(sp) # 4-byte Folded Reload 2584; RV32IDZFH-NEXT: addi sp, sp, 32 2585; RV32IDZFH-NEXT: ret 2586; 2587; RV64IDZFH-LABEL: fcvt_h_q: 2588; RV64IDZFH: # %bb.0: 2589; RV64IDZFH-NEXT: addi sp, sp, -16 2590; RV64IDZFH-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 2591; RV64IDZFH-NEXT: call __trunctfhf2 2592; RV64IDZFH-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 2593; RV64IDZFH-NEXT: addi sp, sp, 16 2594; RV64IDZFH-NEXT: ret 2595; 2596; RV32IZDINXZHINX-LABEL: fcvt_h_q: 2597; RV32IZDINXZHINX: # %bb.0: 2598; RV32IZDINXZHINX-NEXT: addi sp, sp, -32 2599; RV32IZDINXZHINX-NEXT: sw ra, 28(sp) # 4-byte Folded Spill 2600; RV32IZDINXZHINX-NEXT: lw a1, 0(a0) 2601; RV32IZDINXZHINX-NEXT: lw a2, 4(a0) 2602; RV32IZDINXZHINX-NEXT: lw a3, 8(a0) 2603; RV32IZDINXZHINX-NEXT: lw a4, 12(a0) 2604; RV32IZDINXZHINX-NEXT: addi a0, sp, 8 2605; RV32IZDINXZHINX-NEXT: sw a1, 8(sp) 2606; RV32IZDINXZHINX-NEXT: sw a2, 12(sp) 2607; RV32IZDINXZHINX-NEXT: sw a3, 16(sp) 2608; RV32IZDINXZHINX-NEXT: sw a4, 20(sp) 2609; RV32IZDINXZHINX-NEXT: call __trunctfhf2 2610; RV32IZDINXZHINX-NEXT: lw ra, 28(sp) # 4-byte Folded Reload 2611; RV32IZDINXZHINX-NEXT: addi sp, sp, 32 2612; RV32IZDINXZHINX-NEXT: ret 2613; 2614; RV64IZDINXZHINX-LABEL: fcvt_h_q: 2615; RV64IZDINXZHINX: # %bb.0: 2616; RV64IZDINXZHINX-NEXT: addi sp, sp, -16 2617; RV64IZDINXZHINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 2618; RV64IZDINXZHINX-NEXT: call __trunctfhf2 2619; RV64IZDINXZHINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 2620; RV64IZDINXZHINX-NEXT: addi sp, sp, 16 2621; RV64IZDINXZHINX-NEXT: ret 2622; 2623; CHECK32-IZFHMIN-LABEL: fcvt_h_q: 2624; CHECK32-IZFHMIN: # %bb.0: 2625; CHECK32-IZFHMIN-NEXT: addi sp, sp, -32 2626; CHECK32-IZFHMIN-NEXT: sw ra, 28(sp) # 4-byte Folded Spill 2627; CHECK32-IZFHMIN-NEXT: lw a1, 0(a0) 2628; CHECK32-IZFHMIN-NEXT: lw a2, 4(a0) 2629; CHECK32-IZFHMIN-NEXT: lw a3, 8(a0) 2630; CHECK32-IZFHMIN-NEXT: lw a4, 12(a0) 2631; CHECK32-IZFHMIN-NEXT: addi a0, sp, 8 2632; CHECK32-IZFHMIN-NEXT: sw a1, 8(sp) 2633; CHECK32-IZFHMIN-NEXT: sw a2, 12(sp) 2634; CHECK32-IZFHMIN-NEXT: sw a3, 16(sp) 2635; CHECK32-IZFHMIN-NEXT: sw a4, 20(sp) 2636; CHECK32-IZFHMIN-NEXT: call __trunctfhf2 2637; CHECK32-IZFHMIN-NEXT: lw ra, 28(sp) # 4-byte Folded Reload 2638; CHECK32-IZFHMIN-NEXT: addi sp, sp, 32 2639; CHECK32-IZFHMIN-NEXT: ret 2640; 2641; CHECK64-IZFHMIN-LABEL: fcvt_h_q: 2642; CHECK64-IZFHMIN: # %bb.0: 2643; CHECK64-IZFHMIN-NEXT: addi sp, sp, -16 2644; CHECK64-IZFHMIN-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 2645; CHECK64-IZFHMIN-NEXT: call __trunctfhf2 2646; CHECK64-IZFHMIN-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 2647; CHECK64-IZFHMIN-NEXT: addi sp, sp, 16 2648; CHECK64-IZFHMIN-NEXT: ret 2649; 2650; CHECK32-IZHINXMIN-LABEL: fcvt_h_q: 2651; CHECK32-IZHINXMIN: # %bb.0: 2652; CHECK32-IZHINXMIN-NEXT: addi sp, sp, -32 2653; CHECK32-IZHINXMIN-NEXT: sw ra, 28(sp) # 4-byte Folded Spill 2654; CHECK32-IZHINXMIN-NEXT: lw a1, 0(a0) 2655; CHECK32-IZHINXMIN-NEXT: lw a2, 4(a0) 2656; CHECK32-IZHINXMIN-NEXT: lw a3, 8(a0) 2657; CHECK32-IZHINXMIN-NEXT: lw a4, 12(a0) 2658; CHECK32-IZHINXMIN-NEXT: addi a0, sp, 8 2659; CHECK32-IZHINXMIN-NEXT: sw a1, 8(sp) 2660; CHECK32-IZHINXMIN-NEXT: sw a2, 12(sp) 2661; CHECK32-IZHINXMIN-NEXT: sw a3, 16(sp) 2662; CHECK32-IZHINXMIN-NEXT: sw a4, 20(sp) 2663; CHECK32-IZHINXMIN-NEXT: call __trunctfhf2 2664; CHECK32-IZHINXMIN-NEXT: lw ra, 28(sp) # 4-byte Folded Reload 2665; CHECK32-IZHINXMIN-NEXT: addi sp, sp, 32 2666; CHECK32-IZHINXMIN-NEXT: ret 2667; 2668; CHECK64-IZHINXMIN-LABEL: fcvt_h_q: 2669; CHECK64-IZHINXMIN: # %bb.0: 2670; CHECK64-IZHINXMIN-NEXT: addi sp, sp, -16 2671; CHECK64-IZHINXMIN-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 2672; CHECK64-IZHINXMIN-NEXT: call __trunctfhf2 2673; CHECK64-IZHINXMIN-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 2674; CHECK64-IZHINXMIN-NEXT: addi sp, sp, 16 2675; CHECK64-IZHINXMIN-NEXT: ret 2676; 2677; CHECK32-IZDINXZHINXMIN-LABEL: fcvt_h_q: 2678; CHECK32-IZDINXZHINXMIN: # %bb.0: 2679; CHECK32-IZDINXZHINXMIN-NEXT: addi sp, sp, -32 2680; CHECK32-IZDINXZHINXMIN-NEXT: sw ra, 28(sp) # 4-byte Folded Spill 2681; CHECK32-IZDINXZHINXMIN-NEXT: lw a1, 0(a0) 2682; CHECK32-IZDINXZHINXMIN-NEXT: lw a2, 4(a0) 2683; CHECK32-IZDINXZHINXMIN-NEXT: lw a3, 8(a0) 2684; CHECK32-IZDINXZHINXMIN-NEXT: lw a4, 12(a0) 2685; CHECK32-IZDINXZHINXMIN-NEXT: addi a0, sp, 8 2686; CHECK32-IZDINXZHINXMIN-NEXT: sw a1, 8(sp) 2687; CHECK32-IZDINXZHINXMIN-NEXT: sw a2, 12(sp) 2688; CHECK32-IZDINXZHINXMIN-NEXT: sw a3, 16(sp) 2689; CHECK32-IZDINXZHINXMIN-NEXT: sw a4, 20(sp) 2690; CHECK32-IZDINXZHINXMIN-NEXT: call __trunctfhf2 2691; CHECK32-IZDINXZHINXMIN-NEXT: lw ra, 28(sp) # 4-byte Folded Reload 2692; CHECK32-IZDINXZHINXMIN-NEXT: addi sp, sp, 32 2693; CHECK32-IZDINXZHINXMIN-NEXT: ret 2694; 2695; CHECK64-IZDINXZHINXMIN-LABEL: fcvt_h_q: 2696; CHECK64-IZDINXZHINXMIN: # %bb.0: 2697; CHECK64-IZDINXZHINXMIN-NEXT: addi sp, sp, -16 2698; CHECK64-IZDINXZHINXMIN-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 2699; CHECK64-IZDINXZHINXMIN-NEXT: call __trunctfhf2 2700; CHECK64-IZDINXZHINXMIN-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 2701; CHECK64-IZDINXZHINXMIN-NEXT: addi sp, sp, 16 2702; CHECK64-IZDINXZHINXMIN-NEXT: ret 2703; 2704; CHECK32-D-LABEL: fcvt_h_q: 2705; CHECK32-D: # %bb.0: 2706; CHECK32-D-NEXT: addi sp, sp, -32 2707; CHECK32-D-NEXT: sw ra, 28(sp) # 4-byte Folded Spill 2708; CHECK32-D-NEXT: lw a1, 0(a0) 2709; CHECK32-D-NEXT: lw a2, 4(a0) 2710; CHECK32-D-NEXT: lw a3, 8(a0) 2711; CHECK32-D-NEXT: lw a4, 12(a0) 2712; CHECK32-D-NEXT: addi a0, sp, 8 2713; CHECK32-D-NEXT: sw a1, 8(sp) 2714; CHECK32-D-NEXT: sw a2, 12(sp) 2715; CHECK32-D-NEXT: sw a3, 16(sp) 2716; CHECK32-D-NEXT: sw a4, 20(sp) 2717; CHECK32-D-NEXT: call __trunctfhf2 2718; CHECK32-D-NEXT: fmv.x.w a0, fa0 2719; CHECK32-D-NEXT: lui a1, 1048560 2720; CHECK32-D-NEXT: or a0, a0, a1 2721; CHECK32-D-NEXT: fmv.w.x fa0, a0 2722; CHECK32-D-NEXT: lw ra, 28(sp) # 4-byte Folded Reload 2723; CHECK32-D-NEXT: addi sp, sp, 32 2724; CHECK32-D-NEXT: ret 2725 %1 = call half @llvm.experimental.constrained.fptrunc.f16.f128(fp128 %a, metadata !"round.dynamic", metadata !"fpexcept.strict") 2726 ret half %1 2727} 2728 2729define fp128 @fcvt_q_h(half %a) nounwind strictfp { 2730; RV32IZFH-LABEL: fcvt_q_h: 2731; RV32IZFH: # %bb.0: 2732; RV32IZFH-NEXT: addi sp, sp, -32 2733; RV32IZFH-NEXT: sw ra, 28(sp) # 4-byte Folded Spill 2734; RV32IZFH-NEXT: sw s0, 24(sp) # 4-byte Folded Spill 2735; RV32IZFH-NEXT: mv s0, a0 2736; RV32IZFH-NEXT: fcvt.s.h fa0, fa0 2737; RV32IZFH-NEXT: addi a0, sp, 8 2738; RV32IZFH-NEXT: call __extendsftf2 2739; RV32IZFH-NEXT: lw a0, 8(sp) 2740; RV32IZFH-NEXT: lw a1, 12(sp) 2741; RV32IZFH-NEXT: lw a2, 16(sp) 2742; RV32IZFH-NEXT: lw a3, 20(sp) 2743; RV32IZFH-NEXT: sw a0, 0(s0) 2744; RV32IZFH-NEXT: sw a1, 4(s0) 2745; RV32IZFH-NEXT: sw a2, 8(s0) 2746; RV32IZFH-NEXT: sw a3, 12(s0) 2747; RV32IZFH-NEXT: lw ra, 28(sp) # 4-byte Folded Reload 2748; RV32IZFH-NEXT: lw s0, 24(sp) # 4-byte Folded Reload 2749; RV32IZFH-NEXT: addi sp, sp, 32 2750; RV32IZFH-NEXT: ret 2751; 2752; RV64IZFH-LABEL: fcvt_q_h: 2753; RV64IZFH: # %bb.0: 2754; RV64IZFH-NEXT: addi sp, sp, -16 2755; RV64IZFH-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 2756; RV64IZFH-NEXT: fcvt.s.h fa0, fa0 2757; RV64IZFH-NEXT: call __extendsftf2 2758; RV64IZFH-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 2759; RV64IZFH-NEXT: addi sp, sp, 16 2760; RV64IZFH-NEXT: ret 2761; 2762; RV32IZHINX-LABEL: fcvt_q_h: 2763; RV32IZHINX: # %bb.0: 2764; RV32IZHINX-NEXT: addi sp, sp, -32 2765; RV32IZHINX-NEXT: sw ra, 28(sp) # 4-byte Folded Spill 2766; RV32IZHINX-NEXT: sw s0, 24(sp) # 4-byte Folded Spill 2767; RV32IZHINX-NEXT: mv s0, a0 2768; RV32IZHINX-NEXT: fcvt.s.h a1, a1 2769; RV32IZHINX-NEXT: addi a0, sp, 8 2770; RV32IZHINX-NEXT: call __extendsftf2 2771; RV32IZHINX-NEXT: lw a0, 8(sp) 2772; RV32IZHINX-NEXT: lw a1, 12(sp) 2773; RV32IZHINX-NEXT: lw a2, 16(sp) 2774; RV32IZHINX-NEXT: lw a3, 20(sp) 2775; RV32IZHINX-NEXT: sw a0, 0(s0) 2776; RV32IZHINX-NEXT: sw a1, 4(s0) 2777; RV32IZHINX-NEXT: sw a2, 8(s0) 2778; RV32IZHINX-NEXT: sw a3, 12(s0) 2779; RV32IZHINX-NEXT: lw ra, 28(sp) # 4-byte Folded Reload 2780; RV32IZHINX-NEXT: lw s0, 24(sp) # 4-byte Folded Reload 2781; RV32IZHINX-NEXT: addi sp, sp, 32 2782; RV32IZHINX-NEXT: ret 2783; 2784; RV64IZHINX-LABEL: fcvt_q_h: 2785; RV64IZHINX: # %bb.0: 2786; RV64IZHINX-NEXT: addi sp, sp, -16 2787; RV64IZHINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 2788; RV64IZHINX-NEXT: fcvt.s.h a0, a0 2789; RV64IZHINX-NEXT: call __extendsftf2 2790; RV64IZHINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 2791; RV64IZHINX-NEXT: addi sp, sp, 16 2792; RV64IZHINX-NEXT: ret 2793; 2794; RV32IDZFH-LABEL: fcvt_q_h: 2795; RV32IDZFH: # %bb.0: 2796; RV32IDZFH-NEXT: addi sp, sp, -32 2797; RV32IDZFH-NEXT: sw ra, 28(sp) # 4-byte Folded Spill 2798; RV32IDZFH-NEXT: sw s0, 24(sp) # 4-byte Folded Spill 2799; RV32IDZFH-NEXT: mv s0, a0 2800; RV32IDZFH-NEXT: fcvt.s.h fa0, fa0 2801; RV32IDZFH-NEXT: addi a0, sp, 8 2802; RV32IDZFH-NEXT: call __extendsftf2 2803; RV32IDZFH-NEXT: lw a0, 8(sp) 2804; RV32IDZFH-NEXT: lw a1, 12(sp) 2805; RV32IDZFH-NEXT: lw a2, 16(sp) 2806; RV32IDZFH-NEXT: lw a3, 20(sp) 2807; RV32IDZFH-NEXT: sw a0, 0(s0) 2808; RV32IDZFH-NEXT: sw a1, 4(s0) 2809; RV32IDZFH-NEXT: sw a2, 8(s0) 2810; RV32IDZFH-NEXT: sw a3, 12(s0) 2811; RV32IDZFH-NEXT: lw ra, 28(sp) # 4-byte Folded Reload 2812; RV32IDZFH-NEXT: lw s0, 24(sp) # 4-byte Folded Reload 2813; RV32IDZFH-NEXT: addi sp, sp, 32 2814; RV32IDZFH-NEXT: ret 2815; 2816; RV64IDZFH-LABEL: fcvt_q_h: 2817; RV64IDZFH: # %bb.0: 2818; RV64IDZFH-NEXT: addi sp, sp, -16 2819; RV64IDZFH-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 2820; RV64IDZFH-NEXT: fcvt.s.h fa0, fa0 2821; RV64IDZFH-NEXT: call __extendsftf2 2822; RV64IDZFH-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 2823; RV64IDZFH-NEXT: addi sp, sp, 16 2824; RV64IDZFH-NEXT: ret 2825; 2826; RV32IZDINXZHINX-LABEL: fcvt_q_h: 2827; RV32IZDINXZHINX: # %bb.0: 2828; RV32IZDINXZHINX-NEXT: addi sp, sp, -32 2829; RV32IZDINXZHINX-NEXT: sw ra, 28(sp) # 4-byte Folded Spill 2830; RV32IZDINXZHINX-NEXT: sw s0, 24(sp) # 4-byte Folded Spill 2831; RV32IZDINXZHINX-NEXT: mv s0, a0 2832; RV32IZDINXZHINX-NEXT: fcvt.s.h a1, a1 2833; RV32IZDINXZHINX-NEXT: addi a0, sp, 8 2834; RV32IZDINXZHINX-NEXT: call __extendsftf2 2835; RV32IZDINXZHINX-NEXT: lw a0, 8(sp) 2836; RV32IZDINXZHINX-NEXT: lw a1, 12(sp) 2837; RV32IZDINXZHINX-NEXT: lw a2, 16(sp) 2838; RV32IZDINXZHINX-NEXT: lw a3, 20(sp) 2839; RV32IZDINXZHINX-NEXT: sw a0, 0(s0) 2840; RV32IZDINXZHINX-NEXT: sw a1, 4(s0) 2841; RV32IZDINXZHINX-NEXT: sw a2, 8(s0) 2842; RV32IZDINXZHINX-NEXT: sw a3, 12(s0) 2843; RV32IZDINXZHINX-NEXT: lw ra, 28(sp) # 4-byte Folded Reload 2844; RV32IZDINXZHINX-NEXT: lw s0, 24(sp) # 4-byte Folded Reload 2845; RV32IZDINXZHINX-NEXT: addi sp, sp, 32 2846; RV32IZDINXZHINX-NEXT: ret 2847; 2848; RV64IZDINXZHINX-LABEL: fcvt_q_h: 2849; RV64IZDINXZHINX: # %bb.0: 2850; RV64IZDINXZHINX-NEXT: addi sp, sp, -16 2851; RV64IZDINXZHINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 2852; RV64IZDINXZHINX-NEXT: fcvt.s.h a0, a0 2853; RV64IZDINXZHINX-NEXT: call __extendsftf2 2854; RV64IZDINXZHINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 2855; RV64IZDINXZHINX-NEXT: addi sp, sp, 16 2856; RV64IZDINXZHINX-NEXT: ret 2857; 2858; CHECK32-IZFHMIN-LABEL: fcvt_q_h: 2859; CHECK32-IZFHMIN: # %bb.0: 2860; CHECK32-IZFHMIN-NEXT: addi sp, sp, -32 2861; CHECK32-IZFHMIN-NEXT: sw ra, 28(sp) # 4-byte Folded Spill 2862; CHECK32-IZFHMIN-NEXT: sw s0, 24(sp) # 4-byte Folded Spill 2863; CHECK32-IZFHMIN-NEXT: mv s0, a0 2864; CHECK32-IZFHMIN-NEXT: fcvt.s.h fa0, fa0 2865; CHECK32-IZFHMIN-NEXT: addi a0, sp, 8 2866; CHECK32-IZFHMIN-NEXT: call __extendsftf2 2867; CHECK32-IZFHMIN-NEXT: lw a0, 8(sp) 2868; CHECK32-IZFHMIN-NEXT: lw a1, 12(sp) 2869; CHECK32-IZFHMIN-NEXT: lw a2, 16(sp) 2870; CHECK32-IZFHMIN-NEXT: lw a3, 20(sp) 2871; CHECK32-IZFHMIN-NEXT: sw a0, 0(s0) 2872; CHECK32-IZFHMIN-NEXT: sw a1, 4(s0) 2873; CHECK32-IZFHMIN-NEXT: sw a2, 8(s0) 2874; CHECK32-IZFHMIN-NEXT: sw a3, 12(s0) 2875; CHECK32-IZFHMIN-NEXT: lw ra, 28(sp) # 4-byte Folded Reload 2876; CHECK32-IZFHMIN-NEXT: lw s0, 24(sp) # 4-byte Folded Reload 2877; CHECK32-IZFHMIN-NEXT: addi sp, sp, 32 2878; CHECK32-IZFHMIN-NEXT: ret 2879; 2880; CHECK64-IZFHMIN-LABEL: fcvt_q_h: 2881; CHECK64-IZFHMIN: # %bb.0: 2882; CHECK64-IZFHMIN-NEXT: addi sp, sp, -16 2883; CHECK64-IZFHMIN-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 2884; CHECK64-IZFHMIN-NEXT: fcvt.s.h fa0, fa0 2885; CHECK64-IZFHMIN-NEXT: call __extendsftf2 2886; CHECK64-IZFHMIN-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 2887; CHECK64-IZFHMIN-NEXT: addi sp, sp, 16 2888; CHECK64-IZFHMIN-NEXT: ret 2889; 2890; CHECK32-IZHINXMIN-LABEL: fcvt_q_h: 2891; CHECK32-IZHINXMIN: # %bb.0: 2892; CHECK32-IZHINXMIN-NEXT: addi sp, sp, -32 2893; CHECK32-IZHINXMIN-NEXT: sw ra, 28(sp) # 4-byte Folded Spill 2894; CHECK32-IZHINXMIN-NEXT: sw s0, 24(sp) # 4-byte Folded Spill 2895; CHECK32-IZHINXMIN-NEXT: mv s0, a0 2896; CHECK32-IZHINXMIN-NEXT: fcvt.s.h a1, a1 2897; CHECK32-IZHINXMIN-NEXT: addi a0, sp, 8 2898; CHECK32-IZHINXMIN-NEXT: call __extendsftf2 2899; CHECK32-IZHINXMIN-NEXT: lw a0, 8(sp) 2900; CHECK32-IZHINXMIN-NEXT: lw a1, 12(sp) 2901; CHECK32-IZHINXMIN-NEXT: lw a2, 16(sp) 2902; CHECK32-IZHINXMIN-NEXT: lw a3, 20(sp) 2903; CHECK32-IZHINXMIN-NEXT: sw a0, 0(s0) 2904; CHECK32-IZHINXMIN-NEXT: sw a1, 4(s0) 2905; CHECK32-IZHINXMIN-NEXT: sw a2, 8(s0) 2906; CHECK32-IZHINXMIN-NEXT: sw a3, 12(s0) 2907; CHECK32-IZHINXMIN-NEXT: lw ra, 28(sp) # 4-byte Folded Reload 2908; CHECK32-IZHINXMIN-NEXT: lw s0, 24(sp) # 4-byte Folded Reload 2909; CHECK32-IZHINXMIN-NEXT: addi sp, sp, 32 2910; CHECK32-IZHINXMIN-NEXT: ret 2911; 2912; CHECK64-IZHINXMIN-LABEL: fcvt_q_h: 2913; CHECK64-IZHINXMIN: # %bb.0: 2914; CHECK64-IZHINXMIN-NEXT: addi sp, sp, -16 2915; CHECK64-IZHINXMIN-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 2916; CHECK64-IZHINXMIN-NEXT: fcvt.s.h a0, a0 2917; CHECK64-IZHINXMIN-NEXT: call __extendsftf2 2918; CHECK64-IZHINXMIN-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 2919; CHECK64-IZHINXMIN-NEXT: addi sp, sp, 16 2920; CHECK64-IZHINXMIN-NEXT: ret 2921; 2922; CHECK32-IZDINXZHINXMIN-LABEL: fcvt_q_h: 2923; CHECK32-IZDINXZHINXMIN: # %bb.0: 2924; CHECK32-IZDINXZHINXMIN-NEXT: addi sp, sp, -32 2925; CHECK32-IZDINXZHINXMIN-NEXT: sw ra, 28(sp) # 4-byte Folded Spill 2926; CHECK32-IZDINXZHINXMIN-NEXT: sw s0, 24(sp) # 4-byte Folded Spill 2927; CHECK32-IZDINXZHINXMIN-NEXT: mv s0, a0 2928; CHECK32-IZDINXZHINXMIN-NEXT: fcvt.s.h a1, a1 2929; CHECK32-IZDINXZHINXMIN-NEXT: addi a0, sp, 8 2930; CHECK32-IZDINXZHINXMIN-NEXT: call __extendsftf2 2931; CHECK32-IZDINXZHINXMIN-NEXT: lw a0, 8(sp) 2932; CHECK32-IZDINXZHINXMIN-NEXT: lw a1, 12(sp) 2933; CHECK32-IZDINXZHINXMIN-NEXT: lw a2, 16(sp) 2934; CHECK32-IZDINXZHINXMIN-NEXT: lw a3, 20(sp) 2935; CHECK32-IZDINXZHINXMIN-NEXT: sw a0, 0(s0) 2936; CHECK32-IZDINXZHINXMIN-NEXT: sw a1, 4(s0) 2937; CHECK32-IZDINXZHINXMIN-NEXT: sw a2, 8(s0) 2938; CHECK32-IZDINXZHINXMIN-NEXT: sw a3, 12(s0) 2939; CHECK32-IZDINXZHINXMIN-NEXT: lw ra, 28(sp) # 4-byte Folded Reload 2940; CHECK32-IZDINXZHINXMIN-NEXT: lw s0, 24(sp) # 4-byte Folded Reload 2941; CHECK32-IZDINXZHINXMIN-NEXT: addi sp, sp, 32 2942; CHECK32-IZDINXZHINXMIN-NEXT: ret 2943; 2944; CHECK64-IZDINXZHINXMIN-LABEL: fcvt_q_h: 2945; CHECK64-IZDINXZHINXMIN: # %bb.0: 2946; CHECK64-IZDINXZHINXMIN-NEXT: addi sp, sp, -16 2947; CHECK64-IZDINXZHINXMIN-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 2948; CHECK64-IZDINXZHINXMIN-NEXT: fcvt.s.h a0, a0 2949; CHECK64-IZDINXZHINXMIN-NEXT: call __extendsftf2 2950; CHECK64-IZDINXZHINXMIN-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 2951; CHECK64-IZDINXZHINXMIN-NEXT: addi sp, sp, 16 2952; CHECK64-IZDINXZHINXMIN-NEXT: ret 2953; 2954; CHECK32-D-LABEL: fcvt_q_h: 2955; CHECK32-D: # %bb.0: 2956; CHECK32-D-NEXT: addi sp, sp, -32 2957; CHECK32-D-NEXT: sw ra, 28(sp) # 4-byte Folded Spill 2958; CHECK32-D-NEXT: sw s0, 24(sp) # 4-byte Folded Spill 2959; CHECK32-D-NEXT: mv s0, a0 2960; CHECK32-D-NEXT: fmv.x.w a0, fa0 2961; CHECK32-D-NEXT: slli a0, a0, 16 2962; CHECK32-D-NEXT: srli a0, a0, 16 2963; CHECK32-D-NEXT: fmv.w.x fa0, a0 2964; CHECK32-D-NEXT: call __extendhfsf2 2965; CHECK32-D-NEXT: addi a0, sp, 8 2966; CHECK32-D-NEXT: call __extendsftf2 2967; CHECK32-D-NEXT: lw a0, 8(sp) 2968; CHECK32-D-NEXT: lw a1, 12(sp) 2969; CHECK32-D-NEXT: lw a2, 16(sp) 2970; CHECK32-D-NEXT: lw a3, 20(sp) 2971; CHECK32-D-NEXT: sw a0, 0(s0) 2972; CHECK32-D-NEXT: sw a1, 4(s0) 2973; CHECK32-D-NEXT: sw a2, 8(s0) 2974; CHECK32-D-NEXT: sw a3, 12(s0) 2975; CHECK32-D-NEXT: lw ra, 28(sp) # 4-byte Folded Reload 2976; CHECK32-D-NEXT: lw s0, 24(sp) # 4-byte Folded Reload 2977; CHECK32-D-NEXT: addi sp, sp, 32 2978; CHECK32-D-NEXT: ret 2979 %1 = call fp128 @llvm.experimental.constrained.fpext.f128.f16(half %a, metadata !"fpexcept.strict") 2980 ret fp128 %1 2981} 2982declare fp128 @llvm.experimental.constrained.fpext.f128.f16(half, metadata) 2983