xref: /llvm-project/llvm/test/CodeGen/RISCV/global-merge-offset.ll (revision 3787fbf0402b4e03e316c13231f8873769701250)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: sed 's/ArrSize/100/g' %s | llc -mtriple=riscv32 \
3; RUN:   -verify-machineinstrs | FileCheck %s
4; RUN: sed 's/ArrSize/100/g' %s | llc -mtriple=riscv64 \
5; RUN:   -verify-machineinstrs | FileCheck %s
6; RUN: sed 's/ArrSize/101/g' %s | llc -mtriple=riscv32 \
7; RUN:   -verify-machineinstrs | FileCheck %s -check-prefix=CHECK-TOOBIG
8; RUN: sed 's/ArrSize/101/g' %s | llc -mtriple=riscv64 \
9; RUN:   -verify-machineinstrs | FileCheck %s -check-prefix=CHECK-TOOBIG
10
11; This test demonstrates that the MaxOffset is set correctly for RISC-V by
12; constructing an input that is at the limit and comparing.
13
14@ga1 = dso_local global [410 x i32] zeroinitializer, align 4
15@ga2 = dso_local global [ArrSize x i32] zeroinitializer, align 4
16@gi = dso_local global i32 0, align 4
17
18; TODO: It would be better for codesize if the final store below was
19; `sw a0, 0(a2)`.
20
21define void @f1(i32 %a) nounwind {
22; CHECK-LABEL: f1:
23; CHECK:       # %bb.0:
24; CHECK-NEXT:    lui a1, %hi(.L_MergedGlobals)
25; CHECK-NEXT:    addi a2, a1, %lo(.L_MergedGlobals)
26; CHECK-NEXT:    sw a0, 2044(a2)
27; CHECK-NEXT:    sw a0, 404(a2)
28; CHECK-NEXT:    sw a0, %lo(.L_MergedGlobals)(a1)
29; CHECK-NEXT:    ret
30;
31; CHECK-TOOBIG-LABEL: f1:
32; CHECK-TOOBIG:       # %bb.0:
33; CHECK-TOOBIG-NEXT:    lui a1, %hi(ga1+1640)
34; CHECK-TOOBIG-NEXT:    lui a2, %hi(.L_MergedGlobals)
35; CHECK-TOOBIG-NEXT:    addi a3, a2, %lo(.L_MergedGlobals)
36; CHECK-TOOBIG-NEXT:    sw a0, %lo(ga1+1640)(a1)
37; CHECK-TOOBIG-NEXT:    sw a0, 408(a3)
38; CHECK-TOOBIG-NEXT:    sw a0, %lo(.L_MergedGlobals)(a2)
39; CHECK-TOOBIG-NEXT:    ret
40  %ga1_end = getelementptr inbounds [410 x i32], ptr @ga1, i32 0, i64 410
41  %ga2_end = getelementptr inbounds [ArrSize x i32], ptr @ga2, i32 0, i64 ArrSize
42  store i32 %a, ptr %ga1_end, align 4
43  store i32 %a, ptr %ga2_end, align 4
44  store i32 %a, ptr @gi, align 4
45  ret void
46}
47