1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \ 3; RUN: | FileCheck -check-prefix=RV32I %s 4 5define void @getSetCCResultType(ptr %p, ptr %q) nounwind { 6; RV32I-LABEL: getSetCCResultType: 7; RV32I: # %bb.0: # %entry 8; RV32I-NEXT: lw a1, 12(a0) 9; RV32I-NEXT: lw a2, 8(a0) 10; RV32I-NEXT: lw a3, 4(a0) 11; RV32I-NEXT: lw a4, 0(a0) 12; RV32I-NEXT: snez a1, a1 13; RV32I-NEXT: snez a2, a2 14; RV32I-NEXT: snez a3, a3 15; RV32I-NEXT: snez a4, a4 16; RV32I-NEXT: addi a4, a4, -1 17; RV32I-NEXT: addi a3, a3, -1 18; RV32I-NEXT: addi a2, a2, -1 19; RV32I-NEXT: addi a1, a1, -1 20; RV32I-NEXT: sw a4, 0(a0) 21; RV32I-NEXT: sw a3, 4(a0) 22; RV32I-NEXT: sw a2, 8(a0) 23; RV32I-NEXT: sw a1, 12(a0) 24; RV32I-NEXT: ret 25entry: 26 %0 = load <4 x i32>, ptr %p, align 16 27 %cmp = icmp eq <4 x i32> %0, zeroinitializer 28 %sext = sext <4 x i1> %cmp to <4 x i32> 29 store <4 x i32> %sext, ptr %p, align 16 30 ret void 31} 32