xref: /llvm-project/llvm/test/CodeGen/RISCV/fpenv.ll (revision 9122c5235ec85ce0c0ad337e862b006e7b349d84) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=riscv32 -mattr=+f -verify-machineinstrs < %s | FileCheck -check-prefix=RV32IF %s
3; RUN: llc -mtriple=riscv64 -mattr=+f -verify-machineinstrs < %s | FileCheck -check-prefix=RV64IF %s
4
5define i32 @func_01() {
6; RV32IF-LABEL: func_01:
7; RV32IF:       # %bb.0:
8; RV32IF-NEXT:    frrm a0
9; RV32IF-NEXT:    lui a1, 66
10; RV32IF-NEXT:    slli a0, a0, 2
11; RV32IF-NEXT:    addi a1, a1, 769
12; RV32IF-NEXT:    srl a0, a1, a0
13; RV32IF-NEXT:    andi a0, a0, 7
14; RV32IF-NEXT:    ret
15;
16; RV64IF-LABEL: func_01:
17; RV64IF:       # %bb.0:
18; RV64IF-NEXT:    frrm a0
19; RV64IF-NEXT:    lui a1, 66
20; RV64IF-NEXT:    slli a0, a0, 2
21; RV64IF-NEXT:    addiw a1, a1, 769
22; RV64IF-NEXT:    srl a0, a1, a0
23; RV64IF-NEXT:    andi a0, a0, 7
24; RV64IF-NEXT:    ret
25  %rm = call i32 @llvm.get.rounding()
26  ret i32 %rm
27}
28
29define void @func_02(i32 %rm) {
30; RV32IF-LABEL: func_02:
31; RV32IF:       # %bb.0:
32; RV32IF-NEXT:    slli a0, a0, 2
33; RV32IF-NEXT:    lui a1, 66
34; RV32IF-NEXT:    addi a1, a1, 769
35; RV32IF-NEXT:    srl a0, a1, a0
36; RV32IF-NEXT:    andi a0, a0, 7
37; RV32IF-NEXT:    fsrm a0
38; RV32IF-NEXT:    ret
39;
40; RV64IF-LABEL: func_02:
41; RV64IF:       # %bb.0:
42; RV64IF-NEXT:    slli a0, a0, 32
43; RV64IF-NEXT:    lui a1, 66
44; RV64IF-NEXT:    srli a0, a0, 30
45; RV64IF-NEXT:    addiw a1, a1, 769
46; RV64IF-NEXT:    srl a0, a1, a0
47; RV64IF-NEXT:    andi a0, a0, 7
48; RV64IF-NEXT:    fsrm a0
49; RV64IF-NEXT:    ret
50  call void @llvm.set.rounding(i32 %rm)
51  ret void
52}
53
54define void @func_03() {
55; RV32IF-LABEL: func_03:
56; RV32IF:       # %bb.0:
57; RV32IF-NEXT:    fsrmi 1
58; RV32IF-NEXT:    ret
59;
60; RV64IF-LABEL: func_03:
61; RV64IF:       # %bb.0:
62; RV64IF-NEXT:    fsrmi 1
63; RV64IF-NEXT:    ret
64  call void @llvm.set.rounding(i32 0)
65  ret void
66}
67
68define void @func_04() {
69; RV32IF-LABEL: func_04:
70; RV32IF:       # %bb.0:
71; RV32IF-NEXT:    fsrmi 0
72; RV32IF-NEXT:    ret
73;
74; RV64IF-LABEL: func_04:
75; RV64IF:       # %bb.0:
76; RV64IF-NEXT:    fsrmi 0
77; RV64IF-NEXT:    ret
78  call void @llvm.set.rounding(i32 1)
79  ret void
80}
81
82define void @func_05() {
83; RV32IF-LABEL: func_05:
84; RV32IF:       # %bb.0:
85; RV32IF-NEXT:    fsrmi 3
86; RV32IF-NEXT:    ret
87;
88; RV64IF-LABEL: func_05:
89; RV64IF:       # %bb.0:
90; RV64IF-NEXT:    fsrmi 3
91; RV64IF-NEXT:    ret
92  call void @llvm.set.rounding(i32 2)
93  ret void
94}
95
96define void @func_06() {
97; RV32IF-LABEL: func_06:
98; RV32IF:       # %bb.0:
99; RV32IF-NEXT:    fsrmi 2
100; RV32IF-NEXT:    ret
101;
102; RV64IF-LABEL: func_06:
103; RV64IF:       # %bb.0:
104; RV64IF-NEXT:    fsrmi 2
105; RV64IF-NEXT:    ret
106  call void @llvm.set.rounding(i32 3)
107  ret void
108}
109
110define void @func_07() {
111; RV32IF-LABEL: func_07:
112; RV32IF:       # %bb.0:
113; RV32IF-NEXT:    fsrmi 4
114; RV32IF-NEXT:    ret
115;
116; RV64IF-LABEL: func_07:
117; RV64IF:       # %bb.0:
118; RV64IF-NEXT:    fsrmi 4
119; RV64IF-NEXT:    ret
120  call void @llvm.set.rounding(i32 4)
121  ret void
122}
123
124declare void @llvm.set.rounding(i32)
125declare i32 @llvm.get.rounding()
126