1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \ 3; RUN: | FileCheck -check-prefix=RV32I %s 4 5@x = local_unnamed_addr global fp128 0xL00000000000000007FFF000000000000, align 16 6@y = local_unnamed_addr global fp128 0xL00000000000000007FFF000000000000, align 16 7 8; Besides anything else, these tests help verify that libcall ABI lowering 9; works correctly 10 11define i32 @test_load_and_cmp() nounwind { 12; RV32I-LABEL: test_load_and_cmp: 13; RV32I: # %bb.0: 14; RV32I-NEXT: addi sp, sp, -48 15; RV32I-NEXT: sw ra, 44(sp) # 4-byte Folded Spill 16; RV32I-NEXT: lui a0, %hi(x) 17; RV32I-NEXT: lui a1, %hi(y) 18; RV32I-NEXT: lw a2, %lo(x)(a0) 19; RV32I-NEXT: lw a3, %lo(x+4)(a0) 20; RV32I-NEXT: lw a4, %lo(x+8)(a0) 21; RV32I-NEXT: lw a5, %lo(x+12)(a0) 22; RV32I-NEXT: lw a0, %lo(y)(a1) 23; RV32I-NEXT: lw a6, %lo(y+4)(a1) 24; RV32I-NEXT: lw a7, %lo(y+8)(a1) 25; RV32I-NEXT: lw a1, %lo(y+12)(a1) 26; RV32I-NEXT: sw a0, 8(sp) 27; RV32I-NEXT: sw a6, 12(sp) 28; RV32I-NEXT: sw a7, 16(sp) 29; RV32I-NEXT: sw a1, 20(sp) 30; RV32I-NEXT: addi a0, sp, 24 31; RV32I-NEXT: addi a1, sp, 8 32; RV32I-NEXT: sw a2, 24(sp) 33; RV32I-NEXT: sw a3, 28(sp) 34; RV32I-NEXT: sw a4, 32(sp) 35; RV32I-NEXT: sw a5, 36(sp) 36; RV32I-NEXT: call __netf2 37; RV32I-NEXT: snez a0, a0 38; RV32I-NEXT: lw ra, 44(sp) # 4-byte Folded Reload 39; RV32I-NEXT: addi sp, sp, 48 40; RV32I-NEXT: ret 41 %1 = load fp128, ptr @x, align 16 42 %2 = load fp128, ptr @y, align 16 43 %cmp = fcmp une fp128 %1, %2 44 %3 = zext i1 %cmp to i32 45 ret i32 %3 46} 47 48define i32 @test_add_and_fptosi() nounwind { 49; RV32I-LABEL: test_add_and_fptosi: 50; RV32I: # %bb.0: 51; RV32I-NEXT: addi sp, sp, -80 52; RV32I-NEXT: sw ra, 76(sp) # 4-byte Folded Spill 53; RV32I-NEXT: lui a0, %hi(x) 54; RV32I-NEXT: lui a1, %hi(y) 55; RV32I-NEXT: lw a3, %lo(x)(a0) 56; RV32I-NEXT: lw a4, %lo(x+4)(a0) 57; RV32I-NEXT: lw a5, %lo(x+8)(a0) 58; RV32I-NEXT: lw a6, %lo(x+12)(a0) 59; RV32I-NEXT: lw a0, %lo(y)(a1) 60; RV32I-NEXT: lw a2, %lo(y+4)(a1) 61; RV32I-NEXT: lw a7, %lo(y+8)(a1) 62; RV32I-NEXT: lw a1, %lo(y+12)(a1) 63; RV32I-NEXT: sw a0, 24(sp) 64; RV32I-NEXT: sw a2, 28(sp) 65; RV32I-NEXT: sw a7, 32(sp) 66; RV32I-NEXT: sw a1, 36(sp) 67; RV32I-NEXT: addi a0, sp, 56 68; RV32I-NEXT: addi a1, sp, 40 69; RV32I-NEXT: addi a2, sp, 24 70; RV32I-NEXT: sw a3, 40(sp) 71; RV32I-NEXT: sw a4, 44(sp) 72; RV32I-NEXT: sw a5, 48(sp) 73; RV32I-NEXT: sw a6, 52(sp) 74; RV32I-NEXT: call __addtf3 75; RV32I-NEXT: lw a1, 56(sp) 76; RV32I-NEXT: lw a2, 60(sp) 77; RV32I-NEXT: lw a3, 64(sp) 78; RV32I-NEXT: lw a4, 68(sp) 79; RV32I-NEXT: addi a0, sp, 8 80; RV32I-NEXT: sw a1, 8(sp) 81; RV32I-NEXT: sw a2, 12(sp) 82; RV32I-NEXT: sw a3, 16(sp) 83; RV32I-NEXT: sw a4, 20(sp) 84; RV32I-NEXT: call __fixtfsi 85; RV32I-NEXT: lw ra, 76(sp) # 4-byte Folded Reload 86; RV32I-NEXT: addi sp, sp, 80 87; RV32I-NEXT: ret 88 %1 = load fp128, ptr @x, align 16 89 %2 = load fp128, ptr @y, align 16 90 %3 = fadd fp128 %1, %2 91 %4 = fptosi fp128 %3 to i32 92 ret i32 %4 93} 94 95define fp128 @fmaximum(fp128 %x, fp128 %y) { 96; RV32I-LABEL: fmaximum: 97; RV32I: # %bb.0: 98; RV32I-NEXT: addi sp, sp, -64 99; RV32I-NEXT: .cfi_def_cfa_offset 64 100; RV32I-NEXT: sw ra, 60(sp) # 4-byte Folded Spill 101; RV32I-NEXT: sw s0, 56(sp) # 4-byte Folded Spill 102; RV32I-NEXT: .cfi_offset ra, -4 103; RV32I-NEXT: .cfi_offset s0, -8 104; RV32I-NEXT: lw a3, 0(a1) 105; RV32I-NEXT: lw a4, 4(a1) 106; RV32I-NEXT: lw a5, 8(a1) 107; RV32I-NEXT: lw a6, 12(a1) 108; RV32I-NEXT: lw a1, 0(a2) 109; RV32I-NEXT: lw a7, 4(a2) 110; RV32I-NEXT: lw t0, 8(a2) 111; RV32I-NEXT: lw a2, 12(a2) 112; RV32I-NEXT: mv s0, a0 113; RV32I-NEXT: sw a1, 8(sp) 114; RV32I-NEXT: sw a7, 12(sp) 115; RV32I-NEXT: sw t0, 16(sp) 116; RV32I-NEXT: sw a2, 20(sp) 117; RV32I-NEXT: addi a0, sp, 40 118; RV32I-NEXT: addi a1, sp, 24 119; RV32I-NEXT: addi a2, sp, 8 120; RV32I-NEXT: sw a3, 24(sp) 121; RV32I-NEXT: sw a4, 28(sp) 122; RV32I-NEXT: sw a5, 32(sp) 123; RV32I-NEXT: sw a6, 36(sp) 124; RV32I-NEXT: call fmaximuml 125; RV32I-NEXT: lw a0, 40(sp) 126; RV32I-NEXT: lw a1, 44(sp) 127; RV32I-NEXT: lw a2, 48(sp) 128; RV32I-NEXT: lw a3, 52(sp) 129; RV32I-NEXT: sw a0, 0(s0) 130; RV32I-NEXT: sw a1, 4(s0) 131; RV32I-NEXT: sw a2, 8(s0) 132; RV32I-NEXT: sw a3, 12(s0) 133; RV32I-NEXT: lw ra, 60(sp) # 4-byte Folded Reload 134; RV32I-NEXT: lw s0, 56(sp) # 4-byte Folded Reload 135; RV32I-NEXT: .cfi_restore ra 136; RV32I-NEXT: .cfi_restore s0 137; RV32I-NEXT: addi sp, sp, 64 138; RV32I-NEXT: .cfi_def_cfa_offset 0 139; RV32I-NEXT: ret 140 %a = call fp128 @llvm.maximum.fp128(fp128 %x, fp128 %y) 141 ret fp128 %a 142} 143 144define fp128 @fminimum(fp128 %x, fp128 %y) { 145; RV32I-LABEL: fminimum: 146; RV32I: # %bb.0: 147; RV32I-NEXT: addi sp, sp, -64 148; RV32I-NEXT: .cfi_def_cfa_offset 64 149; RV32I-NEXT: sw ra, 60(sp) # 4-byte Folded Spill 150; RV32I-NEXT: sw s0, 56(sp) # 4-byte Folded Spill 151; RV32I-NEXT: .cfi_offset ra, -4 152; RV32I-NEXT: .cfi_offset s0, -8 153; RV32I-NEXT: lw a3, 0(a1) 154; RV32I-NEXT: lw a4, 4(a1) 155; RV32I-NEXT: lw a5, 8(a1) 156; RV32I-NEXT: lw a6, 12(a1) 157; RV32I-NEXT: lw a1, 0(a2) 158; RV32I-NEXT: lw a7, 4(a2) 159; RV32I-NEXT: lw t0, 8(a2) 160; RV32I-NEXT: lw a2, 12(a2) 161; RV32I-NEXT: mv s0, a0 162; RV32I-NEXT: sw a1, 8(sp) 163; RV32I-NEXT: sw a7, 12(sp) 164; RV32I-NEXT: sw t0, 16(sp) 165; RV32I-NEXT: sw a2, 20(sp) 166; RV32I-NEXT: addi a0, sp, 40 167; RV32I-NEXT: addi a1, sp, 24 168; RV32I-NEXT: addi a2, sp, 8 169; RV32I-NEXT: sw a3, 24(sp) 170; RV32I-NEXT: sw a4, 28(sp) 171; RV32I-NEXT: sw a5, 32(sp) 172; RV32I-NEXT: sw a6, 36(sp) 173; RV32I-NEXT: call fminimuml 174; RV32I-NEXT: lw a0, 40(sp) 175; RV32I-NEXT: lw a1, 44(sp) 176; RV32I-NEXT: lw a2, 48(sp) 177; RV32I-NEXT: lw a3, 52(sp) 178; RV32I-NEXT: sw a0, 0(s0) 179; RV32I-NEXT: sw a1, 4(s0) 180; RV32I-NEXT: sw a2, 8(s0) 181; RV32I-NEXT: sw a3, 12(s0) 182; RV32I-NEXT: lw ra, 60(sp) # 4-byte Folded Reload 183; RV32I-NEXT: lw s0, 56(sp) # 4-byte Folded Reload 184; RV32I-NEXT: .cfi_restore ra 185; RV32I-NEXT: .cfi_restore s0 186; RV32I-NEXT: addi sp, sp, 64 187; RV32I-NEXT: .cfi_def_cfa_offset 0 188; RV32I-NEXT: ret 189 %a = call fp128 @llvm.minimum.fp128(fp128 %x, fp128 %y) 190 ret fp128 %a 191} 192