1; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2; RUN: llc -mtriple=riscv64 -mattr=+f -target-abi lp64 -stop-after=finalize-isel < %s | FileCheck %s 3 4define dso_local void @buz(i1 %pred, float %a, float %b) { 5 ; CHECK-LABEL: name: buz 6 ; CHECK: bb.0.entry: 7 ; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000) 8 ; CHECK-NEXT: liveins: $x10, $x11, $x12 9 ; CHECK-NEXT: {{ $}} 10 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x12 11 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11 12 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr = COPY $x10 13 ; CHECK-NEXT: [[FMV_W_X:%[0-9]+]]:fpr32 = FMV_W_X [[COPY]] 14 ; CHECK-NEXT: [[ANDI:%[0-9]+]]:gpr = ANDI [[COPY2]], 1 15 ; CHECK-NEXT: [[FMV_W_X1:%[0-9]+]]:fpr32 = FMV_W_X [[COPY1]] 16 ; CHECK-NEXT: [[LUI:%[0-9]+]]:gpr = LUI 307200 17 ; CHECK-NEXT: [[FMV_W_X2:%[0-9]+]]:fpr32 = FMV_W_X killed [[LUI]] 18 ; CHECK-NEXT: [[FSGNJX_S:%[0-9]+]]:fpr32 = FSGNJX_S [[FMV_W_X1]], [[FMV_W_X1]] 19 ; CHECK-NEXT: [[FLT_S:%[0-9]+]]:gpr = nofpexcept FLT_S [[FSGNJX_S]], [[FMV_W_X2]] 20 ; CHECK-NEXT: BEQ [[FLT_S]], $x0, %bb.2 21 ; CHECK-NEXT: {{ $}} 22 ; CHECK-NEXT: bb.1.entry: 23 ; CHECK-NEXT: successors: %bb.2(0x80000000) 24 ; CHECK-NEXT: {{ $}} 25 ; CHECK-NEXT: [[FCVT_W_S:%[0-9]+]]:gpr = nofpexcept FCVT_W_S [[FMV_W_X1]], 4 26 ; CHECK-NEXT: [[FCVT_S_W:%[0-9]+]]:fpr32 = nofpexcept FCVT_S_W [[FCVT_W_S]], 4 27 ; CHECK-NEXT: [[FSGNJ_S:%[0-9]+]]:fpr32 = FSGNJ_S [[FCVT_S_W]], [[FMV_W_X1]] 28 ; CHECK-NEXT: {{ $}} 29 ; CHECK-NEXT: bb.2.entry: 30 ; CHECK-NEXT: successors: %bb.3(0x40000000), %bb.4(0x40000000) 31 ; CHECK-NEXT: {{ $}} 32 ; CHECK-NEXT: [[PHI:%[0-9]+]]:fpr32 = PHI [[FMV_W_X1]], %bb.0, [[FSGNJ_S]], %bb.1 33 ; CHECK-NEXT: BNE [[ANDI]], $x0, %bb.4 34 ; CHECK-NEXT: {{ $}} 35 ; CHECK-NEXT: bb.3.entry: 36 ; CHECK-NEXT: successors: %bb.4(0x80000000) 37 ; CHECK-NEXT: {{ $}} 38 ; CHECK-NEXT: bb.4.entry: 39 ; CHECK-NEXT: successors: %bb.5(0x40000000), %bb.6(0x40000000) 40 ; CHECK-NEXT: {{ $}} 41 ; CHECK-NEXT: [[PHI1:%[0-9]+]]:fpr32 = PHI [[PHI]], %bb.2, [[FMV_W_X1]], %bb.3 42 ; CHECK-NEXT: [[FSGNJX_S1:%[0-9]+]]:fpr32 = FSGNJX_S [[FMV_W_X]], [[FMV_W_X]] 43 ; CHECK-NEXT: [[FLT_S1:%[0-9]+]]:gpr = nofpexcept FLT_S [[FSGNJX_S1]], [[FMV_W_X2]] 44 ; CHECK-NEXT: BEQ [[FLT_S1]], $x0, %bb.6 45 ; CHECK-NEXT: {{ $}} 46 ; CHECK-NEXT: bb.5.entry: 47 ; CHECK-NEXT: successors: %bb.6(0x80000000) 48 ; CHECK-NEXT: {{ $}} 49 ; CHECK-NEXT: [[FCVT_W_S1:%[0-9]+]]:gpr = nofpexcept FCVT_W_S [[FMV_W_X]], 4 50 ; CHECK-NEXT: [[FCVT_S_W1:%[0-9]+]]:fpr32 = nofpexcept FCVT_S_W [[FCVT_W_S1]], 4 51 ; CHECK-NEXT: [[FSGNJ_S1:%[0-9]+]]:fpr32 = FSGNJ_S [[FCVT_S_W1]], [[FMV_W_X]] 52 ; CHECK-NEXT: {{ $}} 53 ; CHECK-NEXT: bb.6.entry: 54 ; CHECK-NEXT: successors: %bb.7(0x40000000), %bb.8(0x40000000) 55 ; CHECK-NEXT: {{ $}} 56 ; CHECK-NEXT: [[PHI2:%[0-9]+]]:fpr32 = PHI [[FMV_W_X]], %bb.4, [[FSGNJ_S1]], %bb.5 57 ; CHECK-NEXT: BNE [[ANDI]], $x0, %bb.8 58 ; CHECK-NEXT: {{ $}} 59 ; CHECK-NEXT: bb.7.entry: 60 ; CHECK-NEXT: successors: %bb.8(0x80000000) 61 ; CHECK-NEXT: {{ $}} 62 ; CHECK-NEXT: bb.8.entry: 63 ; CHECK-NEXT: [[PHI3:%[0-9]+]]:fpr32 = PHI [[PHI2]], %bb.6, [[FMV_W_X]], %bb.7 64 ; CHECK-NEXT: [[FCVT_L_S:%[0-9]+]]:gpr = nofpexcept FCVT_L_S killed [[PHI3]], 1 65 ; CHECK-NEXT: [[FMV_X_W:%[0-9]+]]:gpr = FMV_X_W killed [[PHI1]] 66 ; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def dead $x2, implicit $x2 67 ; CHECK-NEXT: $x10 = COPY [[FMV_X_W]] 68 ; CHECK-NEXT: PseudoCALL target-flags(riscv-call) @bar, csr_ilp32_lp64, implicit-def dead $x1, implicit $x10, implicit-def $x2 69 ; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def dead $x2, implicit $x2 70 ; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def dead $x2, implicit $x2 71 ; CHECK-NEXT: $x10 = COPY [[FCVT_L_S]] 72 ; CHECK-NEXT: PseudoCALL target-flags(riscv-call) @foo, csr_ilp32_lp64, implicit-def dead $x1, implicit $x10, implicit-def $x2 73 ; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def dead $x2, implicit $x2 74 ; CHECK-NEXT: PseudoRET 75entry: 76 %0 = call float @llvm.round.f32(float %a) 77 %cond = select i1 %pred, float %0, float %a 78 %1 = call float @llvm.round.f32(float %b) 79 %cond2 = select i1 %pred, float %1, float %b 80 %conv = fptosi float %cond2 to i64 81 call void @bar(float %cond) 82 call void @foo(i64 %conv) 83 ret void 84} 85 86declare void @foo(i64) 87 88declare void @bar(float) 89 90declare float @llvm.round.f32(float) 91