1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=riscv32 -mattr=+d -verify-machineinstrs < %s \ 3; RUN: | FileCheck -check-prefix=RV32IFD %s 4; RUN: llc -mtriple=riscv64 -mattr=+d -verify-machineinstrs < %s \ 5; RUN: | FileCheck -check-prefix=RV64IFD %s 6; RUN: llc -mtriple=riscv32 -mattr=+zdinx -verify-machineinstrs < %s \ 7; RUN: | FileCheck -check-prefix=RV32IZFINXZDINX %s 8; RUN: llc -mtriple=riscv64 -mattr=+zdinx -verify-machineinstrs < %s \ 9; RUN: | FileCheck -check-prefix=RV64IZFINXZDINX %s 10 11define double @frem_f64(double %a, double %b) nounwind { 12; RV32IFD-LABEL: frem_f64: 13; RV32IFD: # %bb.0: 14; RV32IFD-NEXT: tail fmod 15; 16; RV64IFD-LABEL: frem_f64: 17; RV64IFD: # %bb.0: 18; RV64IFD-NEXT: tail fmod 19; 20; RV32IZFINXZDINX-LABEL: frem_f64: 21; RV32IZFINXZDINX: # %bb.0: 22; RV32IZFINXZDINX-NEXT: addi sp, sp, -16 23; RV32IZFINXZDINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 24; RV32IZFINXZDINX-NEXT: call fmod 25; RV32IZFINXZDINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 26; RV32IZFINXZDINX-NEXT: addi sp, sp, 16 27; RV32IZFINXZDINX-NEXT: ret 28; 29; RV64IZFINXZDINX-LABEL: frem_f64: 30; RV64IZFINXZDINX: # %bb.0: 31; RV64IZFINXZDINX-NEXT: tail fmod 32 %1 = frem double %a, %b 33 ret double %1 34} 35