1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5 2; RUN: llc -mtriple=riscv32 -target-abi ilp32d -mattr=+c,+f,+d \ 3; RUN: -riscv-no-aliases < %s \ 4; RUN: | FileCheck -check-prefix=RV32IFDC %s 5; RUN: llc -mtriple=riscv32 -target-abi ilp32d -mattr=-c,+f,+d \ 6; RUN: -riscv-no-aliases < %s \ 7; RUN: | FileCheck -check-prefix=RV32IFD %s 8 9; constant is small and fit in 6 bit (compress imm) 10define i32 @ne_small_pos(i32 %in0) minsize { 11; RV32IFDC-LABEL: ne_small_pos: 12; RV32IFDC: # %bb.0: 13; RV32IFDC-NEXT: c.li a1, 20 14; RV32IFDC-NEXT: bne a0, a1, .LBB0_2 15; RV32IFDC-NEXT: # %bb.1: 16; RV32IFDC-NEXT: tail OUTLINED_FUNCTION_1 17; RV32IFDC-NEXT: .LBB0_2: 18; RV32IFDC-NEXT: tail OUTLINED_FUNCTION_0 19; 20; RV32IFD-LABEL: ne_small_pos: 21; RV32IFD: # %bb.0: 22; RV32IFD-NEXT: addi a1, zero, 20 23; RV32IFD-NEXT: bne a0, a1, .LBB0_2 24; RV32IFD-NEXT: # %bb.1: 25; RV32IFD-NEXT: addi a0, zero, 42 26; RV32IFD-NEXT: jalr zero, 0(ra) 27; RV32IFD-NEXT: .LBB0_2: 28; RV32IFD-NEXT: addi a0, zero, -99 29; RV32IFD-NEXT: jalr zero, 0(ra) 30 %cmp = icmp ne i32 %in0, 20 31 %toRet = select i1 %cmp, i32 -99, i32 42 32 ret i32 %toRet 33} 34 35; constant is small and fit in 6 bit (compress imm) 36define i32 @ne_small_neg(i32 %in0) minsize { 37; RV32IFDC-LABEL: ne_small_neg: 38; RV32IFDC: # %bb.0: 39; RV32IFDC-NEXT: c.li a1, -20 40; RV32IFDC-NEXT: bne a0, a1, .LBB1_2 41; RV32IFDC-NEXT: # %bb.1: 42; RV32IFDC-NEXT: tail OUTLINED_FUNCTION_1 43; RV32IFDC-NEXT: .LBB1_2: 44; RV32IFDC-NEXT: tail OUTLINED_FUNCTION_0 45; 46; RV32IFD-LABEL: ne_small_neg: 47; RV32IFD: # %bb.0: 48; RV32IFD-NEXT: addi a1, zero, -20 49; RV32IFD-NEXT: bne a0, a1, .LBB1_2 50; RV32IFD-NEXT: # %bb.1: 51; RV32IFD-NEXT: addi a0, zero, 42 52; RV32IFD-NEXT: jalr zero, 0(ra) 53; RV32IFD-NEXT: .LBB1_2: 54; RV32IFD-NEXT: addi a0, zero, -99 55; RV32IFD-NEXT: jalr zero, 0(ra) 56 %cmp = icmp ne i32 %in0, -20 57 %toRet = select i1 %cmp, i32 -99, i32 42 58 ret i32 %toRet 59} 60 61; constant is small and fit in 6 bit (compress imm) 62define i32 @ne_small_edge_pos(i32 %in0) minsize { 63; RV32IFDC-LABEL: ne_small_edge_pos: 64; RV32IFDC: # %bb.0: 65; RV32IFDC-NEXT: c.li a1, 31 66; RV32IFDC-NEXT: bne a0, a1, .LBB2_2 67; RV32IFDC-NEXT: # %bb.1: 68; RV32IFDC-NEXT: tail OUTLINED_FUNCTION_1 69; RV32IFDC-NEXT: .LBB2_2: 70; RV32IFDC-NEXT: tail OUTLINED_FUNCTION_0 71; 72; RV32IFD-LABEL: ne_small_edge_pos: 73; RV32IFD: # %bb.0: 74; RV32IFD-NEXT: addi a1, zero, 31 75; RV32IFD-NEXT: bne a0, a1, .LBB2_2 76; RV32IFD-NEXT: # %bb.1: 77; RV32IFD-NEXT: addi a0, zero, 42 78; RV32IFD-NEXT: jalr zero, 0(ra) 79; RV32IFD-NEXT: .LBB2_2: 80; RV32IFD-NEXT: addi a0, zero, -99 81; RV32IFD-NEXT: jalr zero, 0(ra) 82 %cmp = icmp ne i32 %in0, 31 83 %toRet = select i1 %cmp, i32 -99, i32 42 84 ret i32 %toRet 85} 86 87; constant is small and fit in 6 bit (compress imm) 88define i32 @ne_small_edge_neg(i32 %in0) minsize { 89; RV32IFDC-LABEL: ne_small_edge_neg: 90; RV32IFDC: # %bb.0: 91; RV32IFDC-NEXT: c.li a1, -32 92; RV32IFDC-NEXT: bne a0, a1, .LBB3_2 93; RV32IFDC-NEXT: # %bb.1: 94; RV32IFDC-NEXT: tail OUTLINED_FUNCTION_1 95; RV32IFDC-NEXT: .LBB3_2: 96; RV32IFDC-NEXT: tail OUTLINED_FUNCTION_0 97; 98; RV32IFD-LABEL: ne_small_edge_neg: 99; RV32IFD: # %bb.0: 100; RV32IFD-NEXT: addi a1, zero, -32 101; RV32IFD-NEXT: bne a0, a1, .LBB3_2 102; RV32IFD-NEXT: # %bb.1: 103; RV32IFD-NEXT: addi a0, zero, 42 104; RV32IFD-NEXT: jalr zero, 0(ra) 105; RV32IFD-NEXT: .LBB3_2: 106; RV32IFD-NEXT: addi a0, zero, -99 107; RV32IFD-NEXT: jalr zero, 0(ra) 108 %cmp = icmp ne i32 %in0, -32 109 %toRet = select i1 %cmp, i32 -99, i32 42 110 ret i32 %toRet 111} 112 113; constant is medium and not fit in 6 bit (compress imm), 114; but fit in 12 bit (imm) 115define i32 @ne_medium_ledge_pos(i32 %in0) minsize { 116; RV32IFDC-LABEL: ne_medium_ledge_pos: 117; RV32IFDC: # %bb.0: 118; RV32IFDC-NEXT: addi a0, a0, -33 119; RV32IFDC-NEXT: c.bnez a0, .LBB4_2 120; RV32IFDC-NEXT: # %bb.1: 121; RV32IFDC-NEXT: tail OUTLINED_FUNCTION_1 122; RV32IFDC-NEXT: .LBB4_2: 123; RV32IFDC-NEXT: tail OUTLINED_FUNCTION_0 124; 125; RV32IFD-LABEL: ne_medium_ledge_pos: 126; RV32IFD: # %bb.0: 127; RV32IFD-NEXT: addi a1, zero, 33 128; RV32IFD-NEXT: bne a0, a1, .LBB4_2 129; RV32IFD-NEXT: # %bb.1: 130; RV32IFD-NEXT: addi a0, zero, 42 131; RV32IFD-NEXT: jalr zero, 0(ra) 132; RV32IFD-NEXT: .LBB4_2: 133; RV32IFD-NEXT: addi a0, zero, -99 134; RV32IFD-NEXT: jalr zero, 0(ra) 135 %cmp = icmp ne i32 %in0, 33 136 %toRet = select i1 %cmp, i32 -99, i32 42 137 ret i32 %toRet 138} 139 140; constant is medium and not fit in 6 bit (compress imm), 141; but fit in 12 bit (imm) 142define i32 @ne_medium_ledge_neg(i32 %in0) minsize { 143; RV32IFDC-LABEL: ne_medium_ledge_neg: 144; RV32IFDC: # %bb.0: 145; RV32IFDC-NEXT: addi a0, a0, 33 146; RV32IFDC-NEXT: c.bnez a0, .LBB5_2 147; RV32IFDC-NEXT: # %bb.1: 148; RV32IFDC-NEXT: tail OUTLINED_FUNCTION_1 149; RV32IFDC-NEXT: .LBB5_2: 150; RV32IFDC-NEXT: tail OUTLINED_FUNCTION_0 151; 152; RV32IFD-LABEL: ne_medium_ledge_neg: 153; RV32IFD: # %bb.0: 154; RV32IFD-NEXT: addi a1, zero, -33 155; RV32IFD-NEXT: bne a0, a1, .LBB5_2 156; RV32IFD-NEXT: # %bb.1: 157; RV32IFD-NEXT: addi a0, zero, 42 158; RV32IFD-NEXT: jalr zero, 0(ra) 159; RV32IFD-NEXT: .LBB5_2: 160; RV32IFD-NEXT: addi a0, zero, -99 161; RV32IFD-NEXT: jalr zero, 0(ra) 162 %cmp = icmp ne i32 %in0, -33 163 %toRet = select i1 %cmp, i32 -99, i32 42 164 ret i32 %toRet 165} 166 167; constant is medium and not fit in 6 bit (compress imm), 168; but fit in 12 bit (imm) 169define i32 @ne_medium_pos(i32 %in0) minsize { 170; RV32IFDC-LABEL: ne_medium_pos: 171; RV32IFDC: # %bb.0: 172; RV32IFDC-NEXT: addi a0, a0, -63 173; RV32IFDC-NEXT: c.bnez a0, .LBB6_2 174; RV32IFDC-NEXT: # %bb.1: 175; RV32IFDC-NEXT: tail OUTLINED_FUNCTION_1 176; RV32IFDC-NEXT: .LBB6_2: 177; RV32IFDC-NEXT: tail OUTLINED_FUNCTION_0 178; 179; RV32IFD-LABEL: ne_medium_pos: 180; RV32IFD: # %bb.0: 181; RV32IFD-NEXT: addi a1, zero, 63 182; RV32IFD-NEXT: bne a0, a1, .LBB6_2 183; RV32IFD-NEXT: # %bb.1: 184; RV32IFD-NEXT: addi a0, zero, 42 185; RV32IFD-NEXT: jalr zero, 0(ra) 186; RV32IFD-NEXT: .LBB6_2: 187; RV32IFD-NEXT: addi a0, zero, -99 188; RV32IFD-NEXT: jalr zero, 0(ra) 189 %cmp = icmp ne i32 %in0, 63 190 %toRet = select i1 %cmp, i32 -99, i32 42 191 ret i32 %toRet 192} 193 194; constant is medium and not fit in 6 bit (compress imm), 195; but fit in 12 bit (imm) 196define i32 @ne_medium_neg(i32 %in0) minsize { 197; RV32IFDC-LABEL: ne_medium_neg: 198; RV32IFDC: # %bb.0: 199; RV32IFDC-NEXT: addi a0, a0, 63 200; RV32IFDC-NEXT: c.bnez a0, .LBB7_2 201; RV32IFDC-NEXT: # %bb.1: 202; RV32IFDC-NEXT: tail OUTLINED_FUNCTION_1 203; RV32IFDC-NEXT: .LBB7_2: 204; RV32IFDC-NEXT: tail OUTLINED_FUNCTION_0 205; 206; RV32IFD-LABEL: ne_medium_neg: 207; RV32IFD: # %bb.0: 208; RV32IFD-NEXT: addi a1, zero, -63 209; RV32IFD-NEXT: bne a0, a1, .LBB7_2 210; RV32IFD-NEXT: # %bb.1: 211; RV32IFD-NEXT: addi a0, zero, 42 212; RV32IFD-NEXT: jalr zero, 0(ra) 213; RV32IFD-NEXT: .LBB7_2: 214; RV32IFD-NEXT: addi a0, zero, -99 215; RV32IFD-NEXT: jalr zero, 0(ra) 216 %cmp = icmp ne i32 %in0, -63 217 %toRet = select i1 %cmp, i32 -99, i32 42 218 ret i32 %toRet 219} 220 221; constant is medium and not fit in 6 bit (compress imm), 222; but fit in 12 bit (imm) 223define i32 @ne_medium_bedge_pos(i32 %in0) minsize { 224; RV32IFDC-LABEL: ne_medium_bedge_pos: 225; RV32IFDC: # %bb.0: 226; RV32IFDC-NEXT: addi a0, a0, -2047 227; RV32IFDC-NEXT: c.bnez a0, .LBB8_2 228; RV32IFDC-NEXT: # %bb.1: 229; RV32IFDC-NEXT: tail OUTLINED_FUNCTION_1 230; RV32IFDC-NEXT: .LBB8_2: 231; RV32IFDC-NEXT: tail OUTLINED_FUNCTION_0 232; 233; RV32IFD-LABEL: ne_medium_bedge_pos: 234; RV32IFD: # %bb.0: 235; RV32IFD-NEXT: addi a1, zero, 2047 236; RV32IFD-NEXT: bne a0, a1, .LBB8_2 237; RV32IFD-NEXT: # %bb.1: 238; RV32IFD-NEXT: addi a0, zero, 42 239; RV32IFD-NEXT: jalr zero, 0(ra) 240; RV32IFD-NEXT: .LBB8_2: 241; RV32IFD-NEXT: addi a0, zero, -99 242; RV32IFD-NEXT: jalr zero, 0(ra) 243 %cmp = icmp ne i32 %in0, 2047 244 %toRet = select i1 %cmp, i32 -99, i32 42 245 ret i32 %toRet 246} 247 248; constant is medium and not fit in 6 bit (compress imm), 249; but fit in 12 bit (imm), negative value fit in 12 bit too. 250define i32 @ne_medium_bedge_neg(i32 %in0) minsize { 251; RV32IFDC-LABEL: ne_medium_bedge_neg: 252; RV32IFDC: # %bb.0: 253; RV32IFDC-NEXT: addi a0, a0, 2047 254; RV32IFDC-NEXT: c.bnez a0, .LBB9_2 255; RV32IFDC-NEXT: # %bb.1: 256; RV32IFDC-NEXT: tail OUTLINED_FUNCTION_1 257; RV32IFDC-NEXT: .LBB9_2: 258; RV32IFDC-NEXT: tail OUTLINED_FUNCTION_0 259; 260; RV32IFD-LABEL: ne_medium_bedge_neg: 261; RV32IFD: # %bb.0: 262; RV32IFD-NEXT: addi a1, zero, -2047 263; RV32IFD-NEXT: bne a0, a1, .LBB9_2 264; RV32IFD-NEXT: # %bb.1: 265; RV32IFD-NEXT: addi a0, zero, 42 266; RV32IFD-NEXT: jalr zero, 0(ra) 267; RV32IFD-NEXT: .LBB9_2: 268; RV32IFD-NEXT: addi a0, zero, -99 269; RV32IFD-NEXT: jalr zero, 0(ra) 270 %cmp = icmp ne i32 %in0, -2047 271 %toRet = select i1 %cmp, i32 -99, i32 42 272 ret i32 %toRet 273} 274 275; constant is big and do not fit in 12 bit (imm), fit in i32 276define i32 @ne_big_ledge_pos(i32 %in0) minsize { 277; RV32IFDC-LABEL: ne_big_ledge_pos: 278; RV32IFDC: # %bb.0: 279; RV32IFDC-NEXT: c.li a1, 1 280; RV32IFDC-NEXT: c.slli a1, 11 281; RV32IFDC-NEXT: bne a0, a1, .LBB10_2 282; RV32IFDC-NEXT: # %bb.1: 283; RV32IFDC-NEXT: tail OUTLINED_FUNCTION_1 284; RV32IFDC-NEXT: .LBB10_2: 285; RV32IFDC-NEXT: tail OUTLINED_FUNCTION_0 286; 287; RV32IFD-LABEL: ne_big_ledge_pos: 288; RV32IFD: # %bb.0: 289; RV32IFD-NEXT: addi a1, zero, 1 290; RV32IFD-NEXT: slli a1, a1, 11 291; RV32IFD-NEXT: bne a0, a1, .LBB10_2 292; RV32IFD-NEXT: # %bb.1: 293; RV32IFD-NEXT: addi a0, zero, 42 294; RV32IFD-NEXT: jalr zero, 0(ra) 295; RV32IFD-NEXT: .LBB10_2: 296; RV32IFD-NEXT: addi a0, zero, -99 297; RV32IFD-NEXT: jalr zero, 0(ra) 298 %cmp = icmp ne i32 %in0, 2048 299 %toRet = select i1 %cmp, i32 -99, i32 42 300 ret i32 %toRet 301} 302 303; constant is big and do not fit in 12 bit (imm), fit in i32 304define i32 @ne_big_ledge_neg(i32 %in0) minsize { 305; RV32IFDC-LABEL: ne_big_ledge_neg: 306; RV32IFDC: # %bb.0: 307; RV32IFDC-NEXT: addi a1, zero, -2048 308; RV32IFDC-NEXT: bne a0, a1, .LBB11_2 309; RV32IFDC-NEXT: # %bb.1: 310; RV32IFDC-NEXT: tail OUTLINED_FUNCTION_1 311; RV32IFDC-NEXT: .LBB11_2: 312; RV32IFDC-NEXT: tail OUTLINED_FUNCTION_0 313; 314; RV32IFD-LABEL: ne_big_ledge_neg: 315; RV32IFD: # %bb.0: 316; RV32IFD-NEXT: addi a1, zero, -2048 317; RV32IFD-NEXT: bne a0, a1, .LBB11_2 318; RV32IFD-NEXT: # %bb.1: 319; RV32IFD-NEXT: addi a0, zero, 42 320; RV32IFD-NEXT: jalr zero, 0(ra) 321; RV32IFD-NEXT: .LBB11_2: 322; RV32IFD-NEXT: addi a0, zero, -99 323; RV32IFD-NEXT: jalr zero, 0(ra) 324 %cmp = icmp ne i32 %in0, -2048 325 %toRet = select i1 %cmp, i32 -99, i32 42 326 ret i32 %toRet 327} 328 329 330;; Same as above, but for eq 331 332; constant is small and fit in 6 bit (compress imm) 333define i32 @eq_small_pos(i32 %in0) minsize { 334; RV32IFDC-LABEL: eq_small_pos: 335; RV32IFDC: # %bb.0: 336; RV32IFDC-NEXT: c.li a1, 20 337; RV32IFDC-NEXT: beq a0, a1, .LBB12_2 338; RV32IFDC-NEXT: # %bb.1: 339; RV32IFDC-NEXT: tail OUTLINED_FUNCTION_1 340; RV32IFDC-NEXT: .LBB12_2: 341; RV32IFDC-NEXT: tail OUTLINED_FUNCTION_0 342; 343; RV32IFD-LABEL: eq_small_pos: 344; RV32IFD: # %bb.0: 345; RV32IFD-NEXT: addi a1, zero, 20 346; RV32IFD-NEXT: beq a0, a1, .LBB12_2 347; RV32IFD-NEXT: # %bb.1: 348; RV32IFD-NEXT: addi a0, zero, 42 349; RV32IFD-NEXT: jalr zero, 0(ra) 350; RV32IFD-NEXT: .LBB12_2: 351; RV32IFD-NEXT: addi a0, zero, -99 352; RV32IFD-NEXT: jalr zero, 0(ra) 353 %cmp = icmp eq i32 %in0, 20 354 %toRet = select i1 %cmp, i32 -99, i32 42 355 ret i32 %toRet 356} 357 358; constant is small and fit in 6 bit (compress imm) 359define i32 @eq_small_neg(i32 %in0) minsize { 360; RV32IFDC-LABEL: eq_small_neg: 361; RV32IFDC: # %bb.0: 362; RV32IFDC-NEXT: c.li a1, -20 363; RV32IFDC-NEXT: beq a0, a1, .LBB13_2 364; RV32IFDC-NEXT: # %bb.1: 365; RV32IFDC-NEXT: tail OUTLINED_FUNCTION_1 366; RV32IFDC-NEXT: .LBB13_2: 367; RV32IFDC-NEXT: tail OUTLINED_FUNCTION_0 368; 369; RV32IFD-LABEL: eq_small_neg: 370; RV32IFD: # %bb.0: 371; RV32IFD-NEXT: addi a1, zero, -20 372; RV32IFD-NEXT: beq a0, a1, .LBB13_2 373; RV32IFD-NEXT: # %bb.1: 374; RV32IFD-NEXT: addi a0, zero, 42 375; RV32IFD-NEXT: jalr zero, 0(ra) 376; RV32IFD-NEXT: .LBB13_2: 377; RV32IFD-NEXT: addi a0, zero, -99 378; RV32IFD-NEXT: jalr zero, 0(ra) 379 %cmp = icmp eq i32 %in0, -20 380 %toRet = select i1 %cmp, i32 -99, i32 42 381 ret i32 %toRet 382} 383 384; constant is small and fit in 6 bit (compress imm) 385define i32 @eq_small_edge_pos(i32 %in0) minsize { 386; RV32IFDC-LABEL: eq_small_edge_pos: 387; RV32IFDC: # %bb.0: 388; RV32IFDC-NEXT: c.li a1, 31 389; RV32IFDC-NEXT: beq a0, a1, .LBB14_2 390; RV32IFDC-NEXT: # %bb.1: 391; RV32IFDC-NEXT: tail OUTLINED_FUNCTION_1 392; RV32IFDC-NEXT: .LBB14_2: 393; RV32IFDC-NEXT: tail OUTLINED_FUNCTION_0 394; 395; RV32IFD-LABEL: eq_small_edge_pos: 396; RV32IFD: # %bb.0: 397; RV32IFD-NEXT: addi a1, zero, 31 398; RV32IFD-NEXT: beq a0, a1, .LBB14_2 399; RV32IFD-NEXT: # %bb.1: 400; RV32IFD-NEXT: addi a0, zero, 42 401; RV32IFD-NEXT: jalr zero, 0(ra) 402; RV32IFD-NEXT: .LBB14_2: 403; RV32IFD-NEXT: addi a0, zero, -99 404; RV32IFD-NEXT: jalr zero, 0(ra) 405 %cmp = icmp eq i32 %in0, 31 406 %toRet = select i1 %cmp, i32 -99, i32 42 407 ret i32 %toRet 408} 409 410; constant is small and fit in 6 bit (compress imm) 411define i32 @eq_small_edge_neg(i32 %in0) minsize { 412; RV32IFDC-LABEL: eq_small_edge_neg: 413; RV32IFDC: # %bb.0: 414; RV32IFDC-NEXT: c.li a1, -32 415; RV32IFDC-NEXT: beq a0, a1, .LBB15_2 416; RV32IFDC-NEXT: # %bb.1: 417; RV32IFDC-NEXT: tail OUTLINED_FUNCTION_1 418; RV32IFDC-NEXT: .LBB15_2: 419; RV32IFDC-NEXT: tail OUTLINED_FUNCTION_0 420; 421; RV32IFD-LABEL: eq_small_edge_neg: 422; RV32IFD: # %bb.0: 423; RV32IFD-NEXT: addi a1, zero, -32 424; RV32IFD-NEXT: beq a0, a1, .LBB15_2 425; RV32IFD-NEXT: # %bb.1: 426; RV32IFD-NEXT: addi a0, zero, 42 427; RV32IFD-NEXT: jalr zero, 0(ra) 428; RV32IFD-NEXT: .LBB15_2: 429; RV32IFD-NEXT: addi a0, zero, -99 430; RV32IFD-NEXT: jalr zero, 0(ra) 431 %cmp = icmp eq i32 %in0, -32 432 %toRet = select i1 %cmp, i32 -99, i32 42 433 ret i32 %toRet 434} 435 436; constant is medium and not fit in 6 bit (compress imm), 437; but fit in 12 bit (imm) 438define i32 @eq_medium_ledge_pos(i32 %in0) minsize { 439; RV32IFDC-LABEL: eq_medium_ledge_pos: 440; RV32IFDC: # %bb.0: 441; RV32IFDC-NEXT: addi a0, a0, -33 442; RV32IFDC-NEXT: c.beqz a0, .LBB16_2 443; RV32IFDC-NEXT: # %bb.1: 444; RV32IFDC-NEXT: tail OUTLINED_FUNCTION_1 445; RV32IFDC-NEXT: .LBB16_2: 446; RV32IFDC-NEXT: tail OUTLINED_FUNCTION_0 447; 448; RV32IFD-LABEL: eq_medium_ledge_pos: 449; RV32IFD: # %bb.0: 450; RV32IFD-NEXT: addi a1, zero, 33 451; RV32IFD-NEXT: beq a0, a1, .LBB16_2 452; RV32IFD-NEXT: # %bb.1: 453; RV32IFD-NEXT: addi a0, zero, 42 454; RV32IFD-NEXT: jalr zero, 0(ra) 455; RV32IFD-NEXT: .LBB16_2: 456; RV32IFD-NEXT: addi a0, zero, -99 457; RV32IFD-NEXT: jalr zero, 0(ra) 458 %cmp = icmp eq i32 %in0, 33 459 %toRet = select i1 %cmp, i32 -99, i32 42 460 ret i32 %toRet 461} 462 463; constant is medium and not fit in 6 bit (compress imm), 464; but fit in 12 bit (imm) 465define i32 @eq_medium_ledge_neg(i32 %in0) minsize { 466; RV32IFDC-LABEL: eq_medium_ledge_neg: 467; RV32IFDC: # %bb.0: 468; RV32IFDC-NEXT: addi a0, a0, 33 469; RV32IFDC-NEXT: c.beqz a0, .LBB17_2 470; RV32IFDC-NEXT: # %bb.1: 471; RV32IFDC-NEXT: tail OUTLINED_FUNCTION_1 472; RV32IFDC-NEXT: .LBB17_2: 473; RV32IFDC-NEXT: tail OUTLINED_FUNCTION_0 474; 475; RV32IFD-LABEL: eq_medium_ledge_neg: 476; RV32IFD: # %bb.0: 477; RV32IFD-NEXT: addi a1, zero, -33 478; RV32IFD-NEXT: beq a0, a1, .LBB17_2 479; RV32IFD-NEXT: # %bb.1: 480; RV32IFD-NEXT: addi a0, zero, 42 481; RV32IFD-NEXT: jalr zero, 0(ra) 482; RV32IFD-NEXT: .LBB17_2: 483; RV32IFD-NEXT: addi a0, zero, -99 484; RV32IFD-NEXT: jalr zero, 0(ra) 485 %cmp = icmp eq i32 %in0, -33 486 %toRet = select i1 %cmp, i32 -99, i32 42 487 ret i32 %toRet 488} 489 490; constant is medium and not fit in 6 bit (compress imm), 491; but fit in 12 bit (imm) 492define i32 @eq_medium_pos(i32 %in0) minsize { 493; RV32IFDC-LABEL: eq_medium_pos: 494; RV32IFDC: # %bb.0: 495; RV32IFDC-NEXT: addi a0, a0, -63 496; RV32IFDC-NEXT: c.beqz a0, .LBB18_2 497; RV32IFDC-NEXT: # %bb.1: 498; RV32IFDC-NEXT: tail OUTLINED_FUNCTION_1 499; RV32IFDC-NEXT: .LBB18_2: 500; RV32IFDC-NEXT: tail OUTLINED_FUNCTION_0 501; 502; RV32IFD-LABEL: eq_medium_pos: 503; RV32IFD: # %bb.0: 504; RV32IFD-NEXT: addi a1, zero, 63 505; RV32IFD-NEXT: beq a0, a1, .LBB18_2 506; RV32IFD-NEXT: # %bb.1: 507; RV32IFD-NEXT: addi a0, zero, 42 508; RV32IFD-NEXT: jalr zero, 0(ra) 509; RV32IFD-NEXT: .LBB18_2: 510; RV32IFD-NEXT: addi a0, zero, -99 511; RV32IFD-NEXT: jalr zero, 0(ra) 512 %cmp = icmp eq i32 %in0, 63 513 %toRet = select i1 %cmp, i32 -99, i32 42 514 ret i32 %toRet 515} 516 517; constant is medium and not fit in 6 bit (compress imm), 518; but fit in 12 bit (imm) 519define i32 @eq_medium_neg(i32 %in0) minsize { 520; RV32IFDC-LABEL: eq_medium_neg: 521; RV32IFDC: # %bb.0: 522; RV32IFDC-NEXT: addi a0, a0, 63 523; RV32IFDC-NEXT: c.beqz a0, .LBB19_2 524; RV32IFDC-NEXT: # %bb.1: 525; RV32IFDC-NEXT: tail OUTLINED_FUNCTION_1 526; RV32IFDC-NEXT: .LBB19_2: 527; RV32IFDC-NEXT: tail OUTLINED_FUNCTION_0 528; 529; RV32IFD-LABEL: eq_medium_neg: 530; RV32IFD: # %bb.0: 531; RV32IFD-NEXT: addi a1, zero, -63 532; RV32IFD-NEXT: beq a0, a1, .LBB19_2 533; RV32IFD-NEXT: # %bb.1: 534; RV32IFD-NEXT: addi a0, zero, 42 535; RV32IFD-NEXT: jalr zero, 0(ra) 536; RV32IFD-NEXT: .LBB19_2: 537; RV32IFD-NEXT: addi a0, zero, -99 538; RV32IFD-NEXT: jalr zero, 0(ra) 539 %cmp = icmp eq i32 %in0, -63 540 %toRet = select i1 %cmp, i32 -99, i32 42 541 ret i32 %toRet 542} 543 544; constant is medium and not fit in 6 bit (compress imm), 545; but fit in 12 bit (imm) 546define i32 @eq_medium_bedge_pos(i32 %in0) minsize { 547; RV32IFDC-LABEL: eq_medium_bedge_pos: 548; RV32IFDC: # %bb.0: 549; RV32IFDC-NEXT: addi a0, a0, -2047 550; RV32IFDC-NEXT: c.beqz a0, .LBB20_2 551; RV32IFDC-NEXT: # %bb.1: 552; RV32IFDC-NEXT: tail OUTLINED_FUNCTION_1 553; RV32IFDC-NEXT: .LBB20_2: 554; RV32IFDC-NEXT: tail OUTLINED_FUNCTION_0 555; 556; RV32IFD-LABEL: eq_medium_bedge_pos: 557; RV32IFD: # %bb.0: 558; RV32IFD-NEXT: addi a1, zero, 2047 559; RV32IFD-NEXT: beq a0, a1, .LBB20_2 560; RV32IFD-NEXT: # %bb.1: 561; RV32IFD-NEXT: addi a0, zero, 42 562; RV32IFD-NEXT: jalr zero, 0(ra) 563; RV32IFD-NEXT: .LBB20_2: 564; RV32IFD-NEXT: addi a0, zero, -99 565; RV32IFD-NEXT: jalr zero, 0(ra) 566 %cmp = icmp eq i32 %in0, 2047 567 %toRet = select i1 %cmp, i32 -99, i32 42 568 ret i32 %toRet 569} 570 571; constant is medium and not fit in 6 bit (compress imm), 572; but fit in 12 bit (imm), negative value fit in 12 bit too. 573define i32 @eq_medium_bedge_neg(i32 %in0) minsize { 574; RV32IFDC-LABEL: eq_medium_bedge_neg: 575; RV32IFDC: # %bb.0: 576; RV32IFDC-NEXT: addi a0, a0, 2047 577; RV32IFDC-NEXT: c.beqz a0, .LBB21_2 578; RV32IFDC-NEXT: # %bb.1: 579; RV32IFDC-NEXT: tail OUTLINED_FUNCTION_1 580; RV32IFDC-NEXT: .LBB21_2: 581; RV32IFDC-NEXT: tail OUTLINED_FUNCTION_0 582; 583; RV32IFD-LABEL: eq_medium_bedge_neg: 584; RV32IFD: # %bb.0: 585; RV32IFD-NEXT: addi a1, zero, -2047 586; RV32IFD-NEXT: beq a0, a1, .LBB21_2 587; RV32IFD-NEXT: # %bb.1: 588; RV32IFD-NEXT: addi a0, zero, 42 589; RV32IFD-NEXT: jalr zero, 0(ra) 590; RV32IFD-NEXT: .LBB21_2: 591; RV32IFD-NEXT: addi a0, zero, -99 592; RV32IFD-NEXT: jalr zero, 0(ra) 593 %cmp = icmp eq i32 %in0, -2047 594 %toRet = select i1 %cmp, i32 -99, i32 42 595 ret i32 %toRet 596} 597 598; constant is big and do not fit in 12 bit (imm), fit in i32 599define i32 @eq_big_ledge_pos(i32 %in0) minsize { 600; RV32IFDC-LABEL: eq_big_ledge_pos: 601; RV32IFDC: # %bb.0: 602; RV32IFDC-NEXT: c.li a1, 1 603; RV32IFDC-NEXT: c.slli a1, 11 604; RV32IFDC-NEXT: beq a0, a1, .LBB22_2 605; RV32IFDC-NEXT: # %bb.1: 606; RV32IFDC-NEXT: tail OUTLINED_FUNCTION_1 607; RV32IFDC-NEXT: .LBB22_2: 608; RV32IFDC-NEXT: tail OUTLINED_FUNCTION_0 609; 610; RV32IFD-LABEL: eq_big_ledge_pos: 611; RV32IFD: # %bb.0: 612; RV32IFD-NEXT: addi a1, zero, 1 613; RV32IFD-NEXT: slli a1, a1, 11 614; RV32IFD-NEXT: beq a0, a1, .LBB22_2 615; RV32IFD-NEXT: # %bb.1: 616; RV32IFD-NEXT: addi a0, zero, 42 617; RV32IFD-NEXT: jalr zero, 0(ra) 618; RV32IFD-NEXT: .LBB22_2: 619; RV32IFD-NEXT: addi a0, zero, -99 620; RV32IFD-NEXT: jalr zero, 0(ra) 621 %cmp = icmp eq i32 %in0, 2048 622 %toRet = select i1 %cmp, i32 -99, i32 42 623 ret i32 %toRet 624} 625 626; constant is big and do not fit in 12 bit (imm), fit in i32 627define i32 @eq_big_ledge_neg(i32 %in0) minsize { 628; RV32IFDC-LABEL: eq_big_ledge_neg: 629; RV32IFDC: # %bb.0: 630; RV32IFDC-NEXT: addi a1, zero, -2048 631; RV32IFDC-NEXT: beq a0, a1, .LBB23_2 632; RV32IFDC-NEXT: # %bb.1: 633; RV32IFDC-NEXT: tail OUTLINED_FUNCTION_1 634; RV32IFDC-NEXT: .LBB23_2: 635; RV32IFDC-NEXT: tail OUTLINED_FUNCTION_0 636; 637; RV32IFD-LABEL: eq_big_ledge_neg: 638; RV32IFD: # %bb.0: 639; RV32IFD-NEXT: addi a1, zero, -2048 640; RV32IFD-NEXT: beq a0, a1, .LBB23_2 641; RV32IFD-NEXT: # %bb.1: 642; RV32IFD-NEXT: addi a0, zero, 42 643; RV32IFD-NEXT: jalr zero, 0(ra) 644; RV32IFD-NEXT: .LBB23_2: 645; RV32IFD-NEXT: addi a0, zero, -99 646; RV32IFD-NEXT: jalr zero, 0(ra) 647 %cmp = icmp eq i32 %in0, -2048 648 %toRet = select i1 %cmp, i32 -99, i32 42 649 ret i32 %toRet 650} 651