16e4be7e1SCraig Topper; This test is designed to run three times, once with function attributes, once 26e4be7e1SCraig Topper; with all target attributes added on the command line, and once with compress 36e4be7e1SCraig Topper; added with the command line and float added via function attributes, all 46e4be7e1SCraig Topper; three of these should result in the same output. 56e4be7e1SCraig Topper; 66e4be7e1SCraig Topper; RUN: cat %s > %t.tgtattr 76e4be7e1SCraig Topper; RUN: echo 'attributes #0 = { nounwind }' >> %t.tgtattr 86e4be7e1SCraig Topper; RUN: llc -mtriple=riscv32 -target-abi ilp32d -mattr=+zcd,+d -filetype=obj \ 96e4be7e1SCraig Topper; RUN: -disable-block-placement < %t.tgtattr \ 106e4be7e1SCraig Topper; RUN: | llvm-objdump -d --triple=riscv32 --mattr=+zcd,+d -M no-aliases - \ 116e4be7e1SCraig Topper; RUN: | FileCheck -check-prefix=RV32IFDC %s 126e4be7e1SCraig Topper; 136e4be7e1SCraig Topper; RUN: cat %s > %t.fnattr 146e4be7e1SCraig Topper; RUN: echo 'attributes #0 = { nounwind "target-features"="+zcd,+d" }' >> %t.fnattr 156e4be7e1SCraig Topper; RUN: llc -mtriple=riscv32 -target-abi ilp32d -filetype=obj \ 166e4be7e1SCraig Topper; RUN: -disable-block-placement < %t.fnattr \ 176e4be7e1SCraig Topper; RUN: | llvm-objdump -d --triple=riscv32 --mattr=+zcd,+d -M no-aliases - \ 186e4be7e1SCraig Topper; RUN: | FileCheck -check-prefix=RV32IFDC %s 196e4be7e1SCraig Topper; 206e4be7e1SCraig Topper; RUN: cat %s > %t.mixedattr 216e4be7e1SCraig Topper; RUN: echo 'attributes #0 = { nounwind "target-features"="+d" }' >> %t.mixedattr 226e4be7e1SCraig Topper; RUN: llc -mtriple=riscv32 -target-abi ilp32d -mattr=+zcd -filetype=obj \ 236e4be7e1SCraig Topper; RUN: -disable-block-placement < %t.mixedattr \ 246e4be7e1SCraig Topper; RUN: | llvm-objdump -d --triple=riscv32 --mattr=+zcd,+d -M no-aliases - \ 256e4be7e1SCraig Topper; RUN: | FileCheck -check-prefix=RV32IFDC %s 266e4be7e1SCraig Topper 276e4be7e1SCraig Topper; This acts as a basic correctness check for the codegen instruction compression 286e4be7e1SCraig Topper; path, verifying that the assembled file contains compressed instructions when 296e4be7e1SCraig Topper; expected. Handling of the compressed ISA is implemented so the same 306e4be7e1SCraig Topper; transformation patterns should be used whether compressing an input .s file or 316e4be7e1SCraig Topper; compressing codegen output. This file contains basic functionality tests using 326e4be7e1SCraig Topper; instructions which also require one of the floating point extensions. 336e4be7e1SCraig Topper 346e4be7e1SCraig Topperdefine double @double_load(ptr %a) #0 { 356e4be7e1SCraig Topper; RV32IFDC-LABEL: <double_load>: 36*c532ba4eSWang Yaduo; RV32IFDC: c.fld fa0, 0x0(a0) 376e4be7e1SCraig Topper; RV32IFDC-NEXT: c.jr ra 386e4be7e1SCraig Topper %1 = load volatile double, ptr %a 396e4be7e1SCraig Topper ret double %1 406e4be7e1SCraig Topper} 41