xref: /llvm-project/llvm/test/CodeGen/RISCV/byval.ll (revision eabaee0c59110d0e11b33a69db54ccda526b35fd)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \
3; RUN:   | FileCheck -check-prefix=RV32I %s
4
5%struct.Foo = type { i32, i32, i32, i16, i8 }
6@foo = global %struct.Foo { i32 1, i32 2, i32 3, i16 4, i8 5 }, align 4
7
8define i32 @callee(ptr byval(%struct.Foo) %f) nounwind {
9; RV32I-LABEL: callee:
10; RV32I:       # %bb.0: # %entry
11; RV32I-NEXT:    lw a0, 0(a0)
12; RV32I-NEXT:    ret
13entry:
14  %0 = load i32, ptr %f, align 4
15  ret i32 %0
16}
17
18
19define void @caller() nounwind {
20; RV32I-LABEL: caller:
21; RV32I:       # %bb.0: # %entry
22; RV32I-NEXT:    addi sp, sp, -32
23; RV32I-NEXT:    sw ra, 28(sp) # 4-byte Folded Spill
24; RV32I-NEXT:    lui a0, %hi(foo)
25; RV32I-NEXT:    lw a1, %lo(foo)(a0)
26; RV32I-NEXT:    sw a1, 12(sp)
27; RV32I-NEXT:    addi a0, a0, %lo(foo)
28; RV32I-NEXT:    lw a1, 12(a0)
29; RV32I-NEXT:    sw a1, 24(sp)
30; RV32I-NEXT:    lw a1, 8(a0)
31; RV32I-NEXT:    sw a1, 20(sp)
32; RV32I-NEXT:    lw a0, 4(a0)
33; RV32I-NEXT:    sw a0, 16(sp)
34; RV32I-NEXT:    addi a0, sp, 12
35; RV32I-NEXT:    call callee
36; RV32I-NEXT:    lw ra, 28(sp) # 4-byte Folded Reload
37; RV32I-NEXT:    addi sp, sp, 32
38; RV32I-NEXT:    ret
39entry:
40  %call = call i32 @callee(ptr byval(%struct.Foo) @foo)
41  ret void
42}
43