xref: /llvm-project/llvm/test/CodeGen/RISCV/bfloat-select-fcmp.ll (revision 1c874bbbd67c5795113fa307512ea514f06dac29)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
2; RUN: llc -mtriple=riscv32 -mattr=+zfbfmin -verify-machineinstrs \
3; RUN:   -target-abi ilp32f < %s | FileCheck %s
4; RUN: llc -mtriple=riscv64 -mattr=+zfbfmin -verify-machineinstrs \
5; RUN:   -target-abi lp64f < %s | FileCheck %s
6
7define bfloat @select_fcmp_false(bfloat %a, bfloat %b) nounwind {
8; CHECK-LABEL: select_fcmp_false:
9; CHECK:       # %bb.0:
10; CHECK-NEXT:    fmv.s fa0, fa1
11; CHECK-NEXT:    ret
12  %1 = fcmp false bfloat %a, %b
13  %2 = select i1 %1, bfloat %a, bfloat %b
14  ret bfloat %2
15}
16
17define bfloat @select_fcmp_oeq(bfloat %a, bfloat %b) nounwind {
18; CHECK-LABEL: select_fcmp_oeq:
19; CHECK:       # %bb.0:
20; CHECK-NEXT:    fcvt.s.bf16 fa5, fa1
21; CHECK-NEXT:    fcvt.s.bf16 fa4, fa0
22; CHECK-NEXT:    feq.s a0, fa4, fa5
23; CHECK-NEXT:    bnez a0, .LBB1_2
24; CHECK-NEXT:  # %bb.1:
25; CHECK-NEXT:    fmv.s fa0, fa1
26; CHECK-NEXT:  .LBB1_2:
27; CHECK-NEXT:    ret
28  %1 = fcmp oeq bfloat %a, %b
29  %2 = select i1 %1, bfloat %a, bfloat %b
30  ret bfloat %2
31}
32
33define bfloat @select_fcmp_ogt(bfloat %a, bfloat %b) nounwind {
34; CHECK-LABEL: select_fcmp_ogt:
35; CHECK:       # %bb.0:
36; CHECK-NEXT:    fcvt.s.bf16 fa5, fa0
37; CHECK-NEXT:    fcvt.s.bf16 fa4, fa1
38; CHECK-NEXT:    flt.s a0, fa4, fa5
39; CHECK-NEXT:    bnez a0, .LBB2_2
40; CHECK-NEXT:  # %bb.1:
41; CHECK-NEXT:    fmv.s fa0, fa1
42; CHECK-NEXT:  .LBB2_2:
43; CHECK-NEXT:    ret
44  %1 = fcmp ogt bfloat %a, %b
45  %2 = select i1 %1, bfloat %a, bfloat %b
46  ret bfloat %2
47}
48
49define bfloat @select_fcmp_oge(bfloat %a, bfloat %b) nounwind {
50; CHECK-LABEL: select_fcmp_oge:
51; CHECK:       # %bb.0:
52; CHECK-NEXT:    fcvt.s.bf16 fa5, fa0
53; CHECK-NEXT:    fcvt.s.bf16 fa4, fa1
54; CHECK-NEXT:    fle.s a0, fa4, fa5
55; CHECK-NEXT:    bnez a0, .LBB3_2
56; CHECK-NEXT:  # %bb.1:
57; CHECK-NEXT:    fmv.s fa0, fa1
58; CHECK-NEXT:  .LBB3_2:
59; CHECK-NEXT:    ret
60  %1 = fcmp oge bfloat %a, %b
61  %2 = select i1 %1, bfloat %a, bfloat %b
62  ret bfloat %2
63}
64
65define bfloat @select_fcmp_olt(bfloat %a, bfloat %b) nounwind {
66; CHECK-LABEL: select_fcmp_olt:
67; CHECK:       # %bb.0:
68; CHECK-NEXT:    fcvt.s.bf16 fa5, fa1
69; CHECK-NEXT:    fcvt.s.bf16 fa4, fa0
70; CHECK-NEXT:    flt.s a0, fa4, fa5
71; CHECK-NEXT:    bnez a0, .LBB4_2
72; CHECK-NEXT:  # %bb.1:
73; CHECK-NEXT:    fmv.s fa0, fa1
74; CHECK-NEXT:  .LBB4_2:
75; CHECK-NEXT:    ret
76  %1 = fcmp olt bfloat %a, %b
77  %2 = select i1 %1, bfloat %a, bfloat %b
78  ret bfloat %2
79}
80
81define bfloat @select_fcmp_ole(bfloat %a, bfloat %b) nounwind {
82; CHECK-LABEL: select_fcmp_ole:
83; CHECK:       # %bb.0:
84; CHECK-NEXT:    fcvt.s.bf16 fa5, fa1
85; CHECK-NEXT:    fcvt.s.bf16 fa4, fa0
86; CHECK-NEXT:    fle.s a0, fa4, fa5
87; CHECK-NEXT:    bnez a0, .LBB5_2
88; CHECK-NEXT:  # %bb.1:
89; CHECK-NEXT:    fmv.s fa0, fa1
90; CHECK-NEXT:  .LBB5_2:
91; CHECK-NEXT:    ret
92  %1 = fcmp ole bfloat %a, %b
93  %2 = select i1 %1, bfloat %a, bfloat %b
94  ret bfloat %2
95}
96
97define bfloat @select_fcmp_one(bfloat %a, bfloat %b) nounwind {
98; CHECK-LABEL: select_fcmp_one:
99; CHECK:       # %bb.0:
100; CHECK-NEXT:    fcvt.s.bf16 fa5, fa1
101; CHECK-NEXT:    fcvt.s.bf16 fa4, fa0
102; CHECK-NEXT:    flt.s a0, fa4, fa5
103; CHECK-NEXT:    flt.s a1, fa5, fa4
104; CHECK-NEXT:    or a0, a1, a0
105; CHECK-NEXT:    bnez a0, .LBB6_2
106; CHECK-NEXT:  # %bb.1:
107; CHECK-NEXT:    fmv.s fa0, fa1
108; CHECK-NEXT:  .LBB6_2:
109; CHECK-NEXT:    ret
110  %1 = fcmp one bfloat %a, %b
111  %2 = select i1 %1, bfloat %a, bfloat %b
112  ret bfloat %2
113}
114
115define bfloat @select_fcmp_ord(bfloat %a, bfloat %b) nounwind {
116; CHECK-LABEL: select_fcmp_ord:
117; CHECK:       # %bb.0:
118; CHECK-NEXT:    fcvt.s.bf16 fa5, fa1
119; CHECK-NEXT:    feq.s a0, fa5, fa5
120; CHECK-NEXT:    fcvt.s.bf16 fa5, fa0
121; CHECK-NEXT:    feq.s a1, fa5, fa5
122; CHECK-NEXT:    and a0, a1, a0
123; CHECK-NEXT:    bnez a0, .LBB7_2
124; CHECK-NEXT:  # %bb.1:
125; CHECK-NEXT:    fmv.s fa0, fa1
126; CHECK-NEXT:  .LBB7_2:
127; CHECK-NEXT:    ret
128  %1 = fcmp ord bfloat %a, %b
129  %2 = select i1 %1, bfloat %a, bfloat %b
130  ret bfloat %2
131}
132
133define bfloat @select_fcmp_ueq(bfloat %a, bfloat %b) nounwind {
134; CHECK-LABEL: select_fcmp_ueq:
135; CHECK:       # %bb.0:
136; CHECK-NEXT:    fcvt.s.bf16 fa5, fa1
137; CHECK-NEXT:    fcvt.s.bf16 fa4, fa0
138; CHECK-NEXT:    flt.s a0, fa4, fa5
139; CHECK-NEXT:    flt.s a1, fa5, fa4
140; CHECK-NEXT:    or a0, a1, a0
141; CHECK-NEXT:    beqz a0, .LBB8_2
142; CHECK-NEXT:  # %bb.1:
143; CHECK-NEXT:    fmv.s fa0, fa1
144; CHECK-NEXT:  .LBB8_2:
145; CHECK-NEXT:    ret
146  %1 = fcmp ueq bfloat %a, %b
147  %2 = select i1 %1, bfloat %a, bfloat %b
148  ret bfloat %2
149}
150
151define bfloat @select_fcmp_ugt(bfloat %a, bfloat %b) nounwind {
152; CHECK-LABEL: select_fcmp_ugt:
153; CHECK:       # %bb.0:
154; CHECK-NEXT:    fcvt.s.bf16 fa5, fa1
155; CHECK-NEXT:    fcvt.s.bf16 fa4, fa0
156; CHECK-NEXT:    fle.s a0, fa4, fa5
157; CHECK-NEXT:    beqz a0, .LBB9_2
158; CHECK-NEXT:  # %bb.1:
159; CHECK-NEXT:    fmv.s fa0, fa1
160; CHECK-NEXT:  .LBB9_2:
161; CHECK-NEXT:    ret
162  %1 = fcmp ugt bfloat %a, %b
163  %2 = select i1 %1, bfloat %a, bfloat %b
164  ret bfloat %2
165}
166
167define bfloat @select_fcmp_uge(bfloat %a, bfloat %b) nounwind {
168; CHECK-LABEL: select_fcmp_uge:
169; CHECK:       # %bb.0:
170; CHECK-NEXT:    fcvt.s.bf16 fa5, fa1
171; CHECK-NEXT:    fcvt.s.bf16 fa4, fa0
172; CHECK-NEXT:    flt.s a0, fa4, fa5
173; CHECK-NEXT:    beqz a0, .LBB10_2
174; CHECK-NEXT:  # %bb.1:
175; CHECK-NEXT:    fmv.s fa0, fa1
176; CHECK-NEXT:  .LBB10_2:
177; CHECK-NEXT:    ret
178  %1 = fcmp uge bfloat %a, %b
179  %2 = select i1 %1, bfloat %a, bfloat %b
180  ret bfloat %2
181}
182
183define bfloat @select_fcmp_ult(bfloat %a, bfloat %b) nounwind {
184; CHECK-LABEL: select_fcmp_ult:
185; CHECK:       # %bb.0:
186; CHECK-NEXT:    fcvt.s.bf16 fa5, fa0
187; CHECK-NEXT:    fcvt.s.bf16 fa4, fa1
188; CHECK-NEXT:    fle.s a0, fa4, fa5
189; CHECK-NEXT:    beqz a0, .LBB11_2
190; CHECK-NEXT:  # %bb.1:
191; CHECK-NEXT:    fmv.s fa0, fa1
192; CHECK-NEXT:  .LBB11_2:
193; CHECK-NEXT:    ret
194  %1 = fcmp ult bfloat %a, %b
195  %2 = select i1 %1, bfloat %a, bfloat %b
196  ret bfloat %2
197}
198
199define bfloat @select_fcmp_ule(bfloat %a, bfloat %b) nounwind {
200; CHECK-LABEL: select_fcmp_ule:
201; CHECK:       # %bb.0:
202; CHECK-NEXT:    fcvt.s.bf16 fa5, fa0
203; CHECK-NEXT:    fcvt.s.bf16 fa4, fa1
204; CHECK-NEXT:    flt.s a0, fa4, fa5
205; CHECK-NEXT:    beqz a0, .LBB12_2
206; CHECK-NEXT:  # %bb.1:
207; CHECK-NEXT:    fmv.s fa0, fa1
208; CHECK-NEXT:  .LBB12_2:
209; CHECK-NEXT:    ret
210  %1 = fcmp ule bfloat %a, %b
211  %2 = select i1 %1, bfloat %a, bfloat %b
212  ret bfloat %2
213}
214
215define bfloat @select_fcmp_une(bfloat %a, bfloat %b) nounwind {
216; CHECK-LABEL: select_fcmp_une:
217; CHECK:       # %bb.0:
218; CHECK-NEXT:    fcvt.s.bf16 fa5, fa1
219; CHECK-NEXT:    fcvt.s.bf16 fa4, fa0
220; CHECK-NEXT:    feq.s a0, fa4, fa5
221; CHECK-NEXT:    beqz a0, .LBB13_2
222; CHECK-NEXT:  # %bb.1:
223; CHECK-NEXT:    fmv.s fa0, fa1
224; CHECK-NEXT:  .LBB13_2:
225; CHECK-NEXT:    ret
226  %1 = fcmp une bfloat %a, %b
227  %2 = select i1 %1, bfloat %a, bfloat %b
228  ret bfloat %2
229}
230
231define bfloat @select_fcmp_uno(bfloat %a, bfloat %b) nounwind {
232; CHECK-LABEL: select_fcmp_uno:
233; CHECK:       # %bb.0:
234; CHECK-NEXT:    fcvt.s.bf16 fa5, fa1
235; CHECK-NEXT:    feq.s a0, fa5, fa5
236; CHECK-NEXT:    fcvt.s.bf16 fa5, fa0
237; CHECK-NEXT:    feq.s a1, fa5, fa5
238; CHECK-NEXT:    and a0, a1, a0
239; CHECK-NEXT:    beqz a0, .LBB14_2
240; CHECK-NEXT:  # %bb.1:
241; CHECK-NEXT:    fmv.s fa0, fa1
242; CHECK-NEXT:  .LBB14_2:
243; CHECK-NEXT:    ret
244  %1 = fcmp uno bfloat %a, %b
245  %2 = select i1 %1, bfloat %a, bfloat %b
246  ret bfloat %2
247}
248
249define bfloat @select_fcmp_true(bfloat %a, bfloat %b) nounwind {
250; CHECK-LABEL: select_fcmp_true:
251; CHECK:       # %bb.0:
252; CHECK-NEXT:    ret
253  %1 = fcmp true bfloat %a, %b
254  %2 = select i1 %1, bfloat %a, bfloat %b
255  ret bfloat %2
256}
257
258; Ensure that ISel succeeds for a select+fcmp that has an i32 result type.
259define i32 @i32_select_fcmp_oeq(bfloat %a, bfloat %b, i32 %c, i32 %d) nounwind {
260; CHECK-LABEL: i32_select_fcmp_oeq:
261; CHECK:       # %bb.0:
262; CHECK-NEXT:    fcvt.s.bf16 fa5, fa1
263; CHECK-NEXT:    fcvt.s.bf16 fa4, fa0
264; CHECK-NEXT:    feq.s a2, fa4, fa5
265; CHECK-NEXT:    bnez a2, .LBB16_2
266; CHECK-NEXT:  # %bb.1:
267; CHECK-NEXT:    mv a0, a1
268; CHECK-NEXT:  .LBB16_2:
269; CHECK-NEXT:    ret
270  %1 = fcmp oeq bfloat %a, %b
271  %2 = select i1 %1, i32 %c, i32 %d
272  ret i32 %2
273}
274
275define i32 @select_fcmp_oeq_1_2(bfloat %a, bfloat %b) {
276; CHECK-LABEL: select_fcmp_oeq_1_2:
277; CHECK:       # %bb.0:
278; CHECK-NEXT:    fcvt.s.bf16 fa5, fa1
279; CHECK-NEXT:    fcvt.s.bf16 fa4, fa0
280; CHECK-NEXT:    feq.s a0, fa4, fa5
281; CHECK-NEXT:    li a1, 2
282; CHECK-NEXT:    sub a0, a1, a0
283; CHECK-NEXT:    ret
284  %1 = fcmp fast oeq bfloat %a, %b
285  %2 = select i1 %1, i32 1, i32 2
286  ret i32 %2
287}
288
289define signext i32 @select_fcmp_uge_negone_zero(bfloat %a, bfloat %b) nounwind {
290; CHECK-LABEL: select_fcmp_uge_negone_zero:
291; CHECK:       # %bb.0:
292; CHECK-NEXT:    fcvt.s.bf16 fa5, fa1
293; CHECK-NEXT:    fcvt.s.bf16 fa4, fa0
294; CHECK-NEXT:    fle.s a0, fa4, fa5
295; CHECK-NEXT:    addi a0, a0, -1
296; CHECK-NEXT:    ret
297  %1 = fcmp ugt bfloat %a, %b
298  %2 = select i1 %1, i32 -1, i32 0
299  ret i32 %2
300}
301
302define signext i32 @select_fcmp_uge_1_2(bfloat %a, bfloat %b) nounwind {
303; CHECK-LABEL: select_fcmp_uge_1_2:
304; CHECK:       # %bb.0:
305; CHECK-NEXT:    fcvt.s.bf16 fa5, fa1
306; CHECK-NEXT:    fcvt.s.bf16 fa4, fa0
307; CHECK-NEXT:    fle.s a0, fa4, fa5
308; CHECK-NEXT:    addi a0, a0, 1
309; CHECK-NEXT:    ret
310  %1 = fcmp ugt bfloat %a, %b
311  %2 = select i1 %1, i32 1, i32 2
312  ret i32 %2
313}
314