1bd653f64SHaocong.Lu; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2bd653f64SHaocong.Lu; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \ 3bd653f64SHaocong.Lu; RUN: | FileCheck %s -check-prefix=RV32I 4bd653f64SHaocong.Lu; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s \ 5bd653f64SHaocong.Lu; RUN: | FileCheck %s -check-prefix=RV64I 6bd653f64SHaocong.Lu 7bd653f64SHaocong.Lu; Test for handling of AND with constant. If this constant exceeds simm12 and 8bd653f64SHaocong.Lu; also is a non-empty sequence of ones starting at the least significant bit 9bd653f64SHaocong.Lu; with the remainder zero, we can replace it with SLLI + SLRI 10bd653f64SHaocong.Lu 11bd653f64SHaocong.Ludefine i32 @and32_0x7ff(i32 %x) { 12bd653f64SHaocong.Lu; RV32I-LABEL: and32_0x7ff: 13bd653f64SHaocong.Lu; RV32I: # %bb.0: 14bd653f64SHaocong.Lu; RV32I-NEXT: andi a0, a0, 2047 15bd653f64SHaocong.Lu; RV32I-NEXT: ret 16bd653f64SHaocong.Lu; 17bd653f64SHaocong.Lu; RV64I-LABEL: and32_0x7ff: 18bd653f64SHaocong.Lu; RV64I: # %bb.0: 19bd653f64SHaocong.Lu; RV64I-NEXT: andi a0, a0, 2047 20bd653f64SHaocong.Lu; RV64I-NEXT: ret 21bd653f64SHaocong.Lu %a = and i32 %x, 2047 22bd653f64SHaocong.Lu ret i32 %a 23bd653f64SHaocong.Lu} 24bd653f64SHaocong.Lu 25bd653f64SHaocong.Ludefine i32 @and32_0xfff(i32 %x) { 26bd653f64SHaocong.Lu; RV32I-LABEL: and32_0xfff: 27bd653f64SHaocong.Lu; RV32I: # %bb.0: 28bd653f64SHaocong.Lu; RV32I-NEXT: slli a0, a0, 20 29bd653f64SHaocong.Lu; RV32I-NEXT: srli a0, a0, 20 30bd653f64SHaocong.Lu; RV32I-NEXT: ret 31bd653f64SHaocong.Lu; 32bd653f64SHaocong.Lu; RV64I-LABEL: and32_0xfff: 33bd653f64SHaocong.Lu; RV64I: # %bb.0: 34bd653f64SHaocong.Lu; RV64I-NEXT: slli a0, a0, 52 35bd653f64SHaocong.Lu; RV64I-NEXT: srli a0, a0, 52 36bd653f64SHaocong.Lu; RV64I-NEXT: ret 37bd653f64SHaocong.Lu %a = and i32 %x, 4095 38bd653f64SHaocong.Lu ret i32 %a 39bd653f64SHaocong.Lu} 40bd653f64SHaocong.Lu 41bd653f64SHaocong.Ludefine i64 @and64_0x7ff(i64 %x) { 42bd653f64SHaocong.Lu; RV32I-LABEL: and64_0x7ff: 43bd653f64SHaocong.Lu; RV32I: # %bb.0: 44bd653f64SHaocong.Lu; RV32I-NEXT: andi a0, a0, 2047 45bd653f64SHaocong.Lu; RV32I-NEXT: li a1, 0 46bd653f64SHaocong.Lu; RV32I-NEXT: ret 47bd653f64SHaocong.Lu; 48bd653f64SHaocong.Lu; RV64I-LABEL: and64_0x7ff: 49bd653f64SHaocong.Lu; RV64I: # %bb.0: 50bd653f64SHaocong.Lu; RV64I-NEXT: andi a0, a0, 2047 51bd653f64SHaocong.Lu; RV64I-NEXT: ret 52bd653f64SHaocong.Lu %a = and i64 %x, 2047 53bd653f64SHaocong.Lu ret i64 %a 54bd653f64SHaocong.Lu} 55bd653f64SHaocong.Lu 56bd653f64SHaocong.Ludefine i64 @and64_0xfff(i64 %x) { 57bd653f64SHaocong.Lu; RV32I-LABEL: and64_0xfff: 58bd653f64SHaocong.Lu; RV32I: # %bb.0: 59bd653f64SHaocong.Lu; RV32I-NEXT: slli a0, a0, 20 60bd653f64SHaocong.Lu; RV32I-NEXT: srli a0, a0, 20 61bd653f64SHaocong.Lu; RV32I-NEXT: li a1, 0 62bd653f64SHaocong.Lu; RV32I-NEXT: ret 63bd653f64SHaocong.Lu; 64bd653f64SHaocong.Lu; RV64I-LABEL: and64_0xfff: 65bd653f64SHaocong.Lu; RV64I: # %bb.0: 66bd653f64SHaocong.Lu; RV64I-NEXT: slli a0, a0, 52 67bd653f64SHaocong.Lu; RV64I-NEXT: srli a0, a0, 52 68bd653f64SHaocong.Lu; RV64I-NEXT: ret 69bd653f64SHaocong.Lu %a = and i64 %x, 4095 70bd653f64SHaocong.Lu ret i64 %a 71bd653f64SHaocong.Lu} 72bd653f64SHaocong.Lu 736a54776fSHaocong.Lu; Test for handling of AND with constant. If this constant exceeds simm32 and 746a54776fSHaocong.Lu; also is a non-empty sequence of ones starting at the most significant bit 756a54776fSHaocong.Lu; with the remainder zero, we can replace it with SRLI + SLLI. 766a54776fSHaocong.Lu 776a54776fSHaocong.Ludefine i32 @and32_0x7ffff000(i32 %x) { 786a54776fSHaocong.Lu; RV32I-LABEL: and32_0x7ffff000: 796a54776fSHaocong.Lu; RV32I: # %bb.0: 806a54776fSHaocong.Lu; RV32I-NEXT: lui a1, 524287 816a54776fSHaocong.Lu; RV32I-NEXT: and a0, a0, a1 826a54776fSHaocong.Lu; RV32I-NEXT: ret 836a54776fSHaocong.Lu; 846a54776fSHaocong.Lu; RV64I-LABEL: and32_0x7ffff000: 856a54776fSHaocong.Lu; RV64I: # %bb.0: 866a54776fSHaocong.Lu; RV64I-NEXT: lui a1, 524287 876a54776fSHaocong.Lu; RV64I-NEXT: and a0, a0, a1 886a54776fSHaocong.Lu; RV64I-NEXT: ret 896a54776fSHaocong.Lu %a = and i32 %x, 2147479552 906a54776fSHaocong.Lu ret i32 %a 916a54776fSHaocong.Lu} 926a54776fSHaocong.Lu 93ad94dfb9SCraig Topperdefine i32 @and32_0xfffff000(i32 %x) { 94ad94dfb9SCraig Topper; RV32I-LABEL: and32_0xfffff000: 95ad94dfb9SCraig Topper; RV32I: # %bb.0: 96ad94dfb9SCraig Topper; RV32I-NEXT: lui a1, 1048575 97ad94dfb9SCraig Topper; RV32I-NEXT: and a0, a0, a1 98ad94dfb9SCraig Topper; RV32I-NEXT: ret 99ad94dfb9SCraig Topper; 100ad94dfb9SCraig Topper; RV64I-LABEL: and32_0xfffff000: 101ad94dfb9SCraig Topper; RV64I: # %bb.0: 102ad94dfb9SCraig Topper; RV64I-NEXT: lui a1, 1048575 103ad94dfb9SCraig Topper; RV64I-NEXT: and a0, a0, a1 104ad94dfb9SCraig Topper; RV64I-NEXT: ret 105ad94dfb9SCraig Topper %a = and i32 %x, -4096 106ad94dfb9SCraig Topper ret i32 %a 107ad94dfb9SCraig Topper} 108ad94dfb9SCraig Topper 109ad94dfb9SCraig Topperdefine i32 @and32_0xfffffa00(i32 %x) { 110ad94dfb9SCraig Topper; RV32I-LABEL: and32_0xfffffa00: 111ad94dfb9SCraig Topper; RV32I: # %bb.0: 112ad94dfb9SCraig Topper; RV32I-NEXT: andi a0, a0, -1536 113ad94dfb9SCraig Topper; RV32I-NEXT: ret 114ad94dfb9SCraig Topper; 115ad94dfb9SCraig Topper; RV64I-LABEL: and32_0xfffffa00: 116ad94dfb9SCraig Topper; RV64I: # %bb.0: 117ad94dfb9SCraig Topper; RV64I-NEXT: andi a0, a0, -1536 118ad94dfb9SCraig Topper; RV64I-NEXT: ret 119ad94dfb9SCraig Topper %a = and i32 %x, -1536 120ad94dfb9SCraig Topper ret i32 %a 121ad94dfb9SCraig Topper} 1226a54776fSHaocong.Lu 1236a54776fSHaocong.Ludefine i64 @and64_0x7ffffffffffff000(i64 %x) { 1246a54776fSHaocong.Lu; RV32I-LABEL: and64_0x7ffffffffffff000: 1256a54776fSHaocong.Lu; RV32I: # %bb.0: 1266a54776fSHaocong.Lu; RV32I-NEXT: lui a2, 1048575 1276a54776fSHaocong.Lu; RV32I-NEXT: slli a1, a1, 1 128*9122c523SPengcheng Wang; RV32I-NEXT: and a0, a0, a2 1296a54776fSHaocong.Lu; RV32I-NEXT: srli a1, a1, 1 1306a54776fSHaocong.Lu; RV32I-NEXT: ret 1316a54776fSHaocong.Lu; 1326a54776fSHaocong.Lu; RV64I-LABEL: and64_0x7ffffffffffff000: 1336a54776fSHaocong.Lu; RV64I: # %bb.0: 1346a54776fSHaocong.Lu; RV64I-NEXT: lui a1, 1048574 1356a54776fSHaocong.Lu; RV64I-NEXT: srli a1, a1, 1 1366a54776fSHaocong.Lu; RV64I-NEXT: and a0, a0, a1 1376a54776fSHaocong.Lu; RV64I-NEXT: ret 1386a54776fSHaocong.Lu %a = and i64 %x, 9223372036854771712 1396a54776fSHaocong.Lu ret i64 %a 1406a54776fSHaocong.Lu} 1416a54776fSHaocong.Lu 1426a54776fSHaocong.Ludefine i64 @and64_0xfffffffffffff000(i64 %x) { 1436a54776fSHaocong.Lu; RV32I-LABEL: and64_0xfffffffffffff000: 1446a54776fSHaocong.Lu; RV32I: # %bb.0: 1456a54776fSHaocong.Lu; RV32I-NEXT: lui a2, 1048575 1466a54776fSHaocong.Lu; RV32I-NEXT: and a0, a0, a2 1476a54776fSHaocong.Lu; RV32I-NEXT: ret 1486a54776fSHaocong.Lu; 1496a54776fSHaocong.Lu; RV64I-LABEL: and64_0xfffffffffffff000: 1506a54776fSHaocong.Lu; RV64I: # %bb.0: 1516a54776fSHaocong.Lu; RV64I-NEXT: lui a1, 1048575 1526a54776fSHaocong.Lu; RV64I-NEXT: and a0, a0, a1 1536a54776fSHaocong.Lu; RV64I-NEXT: ret 1546a54776fSHaocong.Lu %a = and i64 %x, -4096 1556a54776fSHaocong.Lu ret i64 %a 1566a54776fSHaocong.Lu} 1576a54776fSHaocong.Lu 1586a54776fSHaocong.Ludefine i64 @and64_0xfffffffffffffa00(i64 %x) { 1596a54776fSHaocong.Lu; RV32I-LABEL: and64_0xfffffffffffffa00: 1606a54776fSHaocong.Lu; RV32I: # %bb.0: 1616a54776fSHaocong.Lu; RV32I-NEXT: andi a0, a0, -1536 1626a54776fSHaocong.Lu; RV32I-NEXT: ret 1636a54776fSHaocong.Lu; 1646a54776fSHaocong.Lu; RV64I-LABEL: and64_0xfffffffffffffa00: 1656a54776fSHaocong.Lu; RV64I: # %bb.0: 1666a54776fSHaocong.Lu; RV64I-NEXT: andi a0, a0, -1536 1676a54776fSHaocong.Lu; RV64I-NEXT: ret 1686a54776fSHaocong.Lu %a = and i64 %x, -1536 1696a54776fSHaocong.Lu ret i64 %a 1706a54776fSHaocong.Lu} 1716a54776fSHaocong.Lu 1726a54776fSHaocong.Ludefine i64 @and64_0xffffffff00000000(i64 %x) { 1736a54776fSHaocong.Lu; RV32I-LABEL: and64_0xffffffff00000000: 1746a54776fSHaocong.Lu; RV32I: # %bb.0: 1756a54776fSHaocong.Lu; RV32I-NEXT: li a0, 0 1766a54776fSHaocong.Lu; RV32I-NEXT: ret 1776a54776fSHaocong.Lu; 1786a54776fSHaocong.Lu; RV64I-LABEL: and64_0xffffffff00000000: 1796a54776fSHaocong.Lu; RV64I: # %bb.0: 1806a54776fSHaocong.Lu; RV64I-NEXT: srli a0, a0, 32 1816a54776fSHaocong.Lu; RV64I-NEXT: slli a0, a0, 32 1826a54776fSHaocong.Lu; RV64I-NEXT: ret 1836a54776fSHaocong.Lu %a = and i64 %x, -4294967296 1846a54776fSHaocong.Lu ret i64 %a 1856a54776fSHaocong.Lu} 1866a54776fSHaocong.Lu 1876a54776fSHaocong.Ludefine i64 @and64_0x7fffffff00000000(i64 %x) { 1886a54776fSHaocong.Lu; RV32I-LABEL: and64_0x7fffffff00000000: 1896a54776fSHaocong.Lu; RV32I: # %bb.0: 190a2b5b584SCraig Topper; RV32I-NEXT: slli a1, a1, 1 191a2b5b584SCraig Topper; RV32I-NEXT: srli a1, a1, 1 1926a54776fSHaocong.Lu; RV32I-NEXT: li a0, 0 1936a54776fSHaocong.Lu; RV32I-NEXT: ret 1946a54776fSHaocong.Lu; 1956a54776fSHaocong.Lu; RV64I-LABEL: and64_0x7fffffff00000000: 1966a54776fSHaocong.Lu; RV64I: # %bb.0: 1976a54776fSHaocong.Lu; RV64I-NEXT: lui a1, 524288 19886240751SPhilip Reames; RV64I-NEXT: addi a1, a1, -1 1996a54776fSHaocong.Lu; RV64I-NEXT: slli a1, a1, 32 2006a54776fSHaocong.Lu; RV64I-NEXT: and a0, a0, a1 2016a54776fSHaocong.Lu; RV64I-NEXT: ret 2026a54776fSHaocong.Lu %a = and i64 %x, 9223372032559808512 2036a54776fSHaocong.Lu ret i64 %a 2046a54776fSHaocong.Lu} 2056a54776fSHaocong.Lu 2066a54776fSHaocong.Ludefine i64 @and64_0xffffffff80000000(i64 %x) { 2076a54776fSHaocong.Lu; RV32I-LABEL: and64_0xffffffff80000000: 2086a54776fSHaocong.Lu; RV32I: # %bb.0: 2096a54776fSHaocong.Lu; RV32I-NEXT: lui a2, 524288 2106a54776fSHaocong.Lu; RV32I-NEXT: and a0, a0, a2 2116a54776fSHaocong.Lu; RV32I-NEXT: ret 2126a54776fSHaocong.Lu; 2136a54776fSHaocong.Lu; RV64I-LABEL: and64_0xffffffff80000000: 2146a54776fSHaocong.Lu; RV64I: # %bb.0: 2156a54776fSHaocong.Lu; RV64I-NEXT: lui a1, 524288 2166a54776fSHaocong.Lu; RV64I-NEXT: and a0, a0, a1 2176a54776fSHaocong.Lu; RV64I-NEXT: ret 2186a54776fSHaocong.Lu %a = and i64 %x, -2147483648 2196a54776fSHaocong.Lu ret i64 %a 2206a54776fSHaocong.Lu} 221893f5e95SCraig Topper 222893f5e95SCraig Topperdefine i64 @and64_0x00000000fffffff8(i64 %x) { 223893f5e95SCraig Topper; RV32I-LABEL: and64_0x00000000fffffff8: 224893f5e95SCraig Topper; RV32I: # %bb.0: 225893f5e95SCraig Topper; RV32I-NEXT: andi a0, a0, -8 226893f5e95SCraig Topper; RV32I-NEXT: li a1, 0 227893f5e95SCraig Topper; RV32I-NEXT: ret 228893f5e95SCraig Topper; 229893f5e95SCraig Topper; RV64I-LABEL: and64_0x00000000fffffff8: 230893f5e95SCraig Topper; RV64I: # %bb.0: 231893f5e95SCraig Topper; RV64I-NEXT: srliw a0, a0, 3 232893f5e95SCraig Topper; RV64I-NEXT: slli a0, a0, 3 233893f5e95SCraig Topper; RV64I-NEXT: ret 234893f5e95SCraig Topper %a = and i64 %x, 4294967288 235893f5e95SCraig Topper ret i64 %a 236893f5e95SCraig Topper} 237